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c9353ae1 JI |
1 | /* |
2 | * Copyright 2010-2011 Picochip Ltd., Jamie Iles | |
3 | * http://www.picochip.com | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version | |
8 | * 2 of the License, or (at your option) any later version. | |
9 | * | |
10 | * This file implements a driver for the Synopsys DesignWare watchdog device | |
58a251f2 | 11 | * in the many subsystems. The watchdog has 16 different timeout periods |
c9353ae1 JI |
12 | * and these are a function of the input clock frequency. |
13 | * | |
14 | * The DesignWare watchdog cannot be stopped once it has been started so we | |
15 | * use a software timer to implement a ping that will keep the watchdog alive. | |
16 | * If we receive an expected close for the watchdog then we keep the timer | |
17 | * running, otherwise the timer is stopped and the watchdog will expire. | |
18 | */ | |
27c766aa JP |
19 | |
20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
c9353ae1 JI |
21 | |
22 | #include <linux/bitops.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/err.h> | |
26 | #include <linux/fs.h> | |
27 | #include <linux/io.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/miscdevice.h> | |
30 | #include <linux/module.h> | |
31 | #include <linux/moduleparam.h> | |
58e56373 | 32 | #include <linux/of.h> |
c9353ae1 JI |
33 | #include <linux/pm.h> |
34 | #include <linux/platform_device.h> | |
35 | #include <linux/spinlock.h> | |
36 | #include <linux/timer.h> | |
37 | #include <linux/uaccess.h> | |
38 | #include <linux/watchdog.h> | |
39 | ||
40 | #define WDOG_CONTROL_REG_OFFSET 0x00 | |
41 | #define WDOG_CONTROL_REG_WDT_EN_MASK 0x01 | |
42 | #define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04 | |
dfa07141 | 43 | #define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4 |
c9353ae1 JI |
44 | #define WDOG_CURRENT_COUNT_REG_OFFSET 0x08 |
45 | #define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c | |
46 | #define WDOG_COUNTER_RESTART_KICK_VALUE 0x76 | |
47 | ||
48 | /* The maximum TOP (timeout period) value that can be set in the watchdog. */ | |
49 | #define DW_WDT_MAX_TOP 15 | |
50 | ||
86a1e189 WVS |
51 | static bool nowayout = WATCHDOG_NOWAYOUT; |
52 | module_param(nowayout, bool, 0); | |
c9353ae1 JI |
53 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " |
54 | "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
55 | ||
56 | #define WDT_TIMEOUT (HZ / 2) | |
57 | ||
58 | static struct { | |
59 | spinlock_t lock; | |
60 | void __iomem *regs; | |
61 | struct clk *clk; | |
62 | unsigned long in_use; | |
63 | unsigned long next_heartbeat; | |
64 | struct timer_list timer; | |
65 | int expect_close; | |
66 | } dw_wdt; | |
67 | ||
68 | static inline int dw_wdt_is_enabled(void) | |
69 | { | |
70 | return readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET) & | |
71 | WDOG_CONTROL_REG_WDT_EN_MASK; | |
72 | } | |
73 | ||
74 | static inline int dw_wdt_top_in_seconds(unsigned top) | |
75 | { | |
76 | /* | |
77 | * There are 16 possible timeout values in 0..15 where the number of | |
78 | * cycles is 2 ^ (16 + i) and the watchdog counts down. | |
79 | */ | |
80 | return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk); | |
81 | } | |
82 | ||
83 | static int dw_wdt_get_top(void) | |
84 | { | |
85 | int top = readl(dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF; | |
86 | ||
87 | return dw_wdt_top_in_seconds(top); | |
88 | } | |
89 | ||
90 | static inline void dw_wdt_set_next_heartbeat(void) | |
91 | { | |
92 | dw_wdt.next_heartbeat = jiffies + dw_wdt_get_top() * HZ; | |
93 | } | |
94 | ||
95 | static int dw_wdt_set_top(unsigned top_s) | |
96 | { | |
97 | int i, top_val = DW_WDT_MAX_TOP; | |
98 | ||
99 | /* | |
100 | * Iterate over the timeout values until we find the closest match. We | |
101 | * always look for >=. | |
102 | */ | |
103 | for (i = 0; i <= DW_WDT_MAX_TOP; ++i) | |
104 | if (dw_wdt_top_in_seconds(i) >= top_s) { | |
105 | top_val = i; | |
106 | break; | |
107 | } | |
108 | ||
109 | /* Set the new value in the watchdog. */ | |
dfa07141 JZ |
110 | writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT, |
111 | dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET); | |
c9353ae1 JI |
112 | |
113 | dw_wdt_set_next_heartbeat(); | |
114 | ||
115 | return dw_wdt_top_in_seconds(top_val); | |
116 | } | |
117 | ||
118 | static void dw_wdt_keepalive(void) | |
119 | { | |
120 | writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs + | |
121 | WDOG_COUNTER_RESTART_REG_OFFSET); | |
122 | } | |
123 | ||
124 | static void dw_wdt_ping(unsigned long data) | |
125 | { | |
126 | if (time_before(jiffies, dw_wdt.next_heartbeat) || | |
127 | (!nowayout && !dw_wdt.in_use)) { | |
128 | dw_wdt_keepalive(); | |
129 | mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT); | |
130 | } else | |
131 | pr_crit("keepalive missed, machine will reset\n"); | |
132 | } | |
133 | ||
134 | static int dw_wdt_open(struct inode *inode, struct file *filp) | |
135 | { | |
136 | if (test_and_set_bit(0, &dw_wdt.in_use)) | |
137 | return -EBUSY; | |
138 | ||
139 | /* Make sure we don't get unloaded. */ | |
140 | __module_get(THIS_MODULE); | |
141 | ||
142 | spin_lock(&dw_wdt.lock); | |
143 | if (!dw_wdt_is_enabled()) { | |
144 | /* | |
145 | * The watchdog is not currently enabled. Set the timeout to | |
146 | * the maximum and then start it. | |
147 | */ | |
148 | dw_wdt_set_top(DW_WDT_MAX_TOP); | |
149 | writel(WDOG_CONTROL_REG_WDT_EN_MASK, | |
150 | dw_wdt.regs + WDOG_CONTROL_REG_OFFSET); | |
151 | } | |
152 | ||
153 | dw_wdt_set_next_heartbeat(); | |
154 | ||
155 | spin_unlock(&dw_wdt.lock); | |
156 | ||
157 | return nonseekable_open(inode, filp); | |
158 | } | |
159 | ||
0b930261 SK |
160 | static ssize_t dw_wdt_write(struct file *filp, const char __user *buf, |
161 | size_t len, loff_t *offset) | |
c9353ae1 JI |
162 | { |
163 | if (!len) | |
164 | return 0; | |
165 | ||
166 | if (!nowayout) { | |
167 | size_t i; | |
168 | ||
169 | dw_wdt.expect_close = 0; | |
170 | ||
171 | for (i = 0; i < len; ++i) { | |
172 | char c; | |
173 | ||
174 | if (get_user(c, buf + i)) | |
175 | return -EFAULT; | |
176 | ||
177 | if (c == 'V') { | |
178 | dw_wdt.expect_close = 1; | |
179 | break; | |
180 | } | |
181 | } | |
182 | } | |
183 | ||
184 | dw_wdt_set_next_heartbeat(); | |
185 | mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT); | |
186 | ||
187 | return len; | |
188 | } | |
189 | ||
190 | static u32 dw_wdt_time_left(void) | |
191 | { | |
192 | return readl(dw_wdt.regs + WDOG_CURRENT_COUNT_REG_OFFSET) / | |
193 | clk_get_rate(dw_wdt.clk); | |
194 | } | |
195 | ||
196 | static const struct watchdog_info dw_wdt_ident = { | |
197 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | | |
198 | WDIOF_MAGICCLOSE, | |
199 | .identity = "Synopsys DesignWare Watchdog", | |
200 | }; | |
201 | ||
202 | static long dw_wdt_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |
203 | { | |
204 | unsigned long val; | |
205 | int timeout; | |
206 | ||
207 | switch (cmd) { | |
208 | case WDIOC_GETSUPPORT: | |
60295507 | 209 | return copy_to_user((void __user *)arg, &dw_wdt_ident, |
c9353ae1 JI |
210 | sizeof(dw_wdt_ident)) ? -EFAULT : 0; |
211 | ||
212 | case WDIOC_GETSTATUS: | |
213 | case WDIOC_GETBOOTSTATUS: | |
60295507 | 214 | return put_user(0, (int __user *)arg); |
c9353ae1 JI |
215 | |
216 | case WDIOC_KEEPALIVE: | |
217 | dw_wdt_set_next_heartbeat(); | |
218 | return 0; | |
219 | ||
220 | case WDIOC_SETTIMEOUT: | |
221 | if (get_user(val, (int __user *)arg)) | |
222 | return -EFAULT; | |
223 | timeout = dw_wdt_set_top(val); | |
224 | return put_user(timeout , (int __user *)arg); | |
225 | ||
226 | case WDIOC_GETTIMEOUT: | |
227 | return put_user(dw_wdt_get_top(), (int __user *)arg); | |
228 | ||
229 | case WDIOC_GETTIMELEFT: | |
230 | /* Get the time left until expiry. */ | |
231 | if (get_user(val, (int __user *)arg)) | |
232 | return -EFAULT; | |
233 | return put_user(dw_wdt_time_left(), (int __user *)arg); | |
234 | ||
235 | default: | |
236 | return -ENOTTY; | |
237 | } | |
238 | } | |
239 | ||
240 | static int dw_wdt_release(struct inode *inode, struct file *filp) | |
241 | { | |
242 | clear_bit(0, &dw_wdt.in_use); | |
243 | ||
244 | if (!dw_wdt.expect_close) { | |
245 | del_timer(&dw_wdt.timer); | |
246 | ||
247 | if (!nowayout) | |
248 | pr_crit("unexpected close, system will reboot soon\n"); | |
249 | else | |
250 | pr_crit("watchdog cannot be disabled, system will reboot soon\n"); | |
251 | } | |
252 | ||
253 | dw_wdt.expect_close = 0; | |
254 | ||
255 | return 0; | |
256 | } | |
257 | ||
ad83c6cb | 258 | #ifdef CONFIG_PM_SLEEP |
c9353ae1 JI |
259 | static int dw_wdt_suspend(struct device *dev) |
260 | { | |
280103e6 | 261 | clk_disable_unprepare(dw_wdt.clk); |
c9353ae1 JI |
262 | |
263 | return 0; | |
264 | } | |
265 | ||
266 | static int dw_wdt_resume(struct device *dev) | |
267 | { | |
280103e6 | 268 | int err = clk_prepare_enable(dw_wdt.clk); |
c9353ae1 JI |
269 | |
270 | if (err) | |
271 | return err; | |
272 | ||
273 | dw_wdt_keepalive(); | |
274 | ||
275 | return 0; | |
276 | } | |
ad83c6cb | 277 | #endif /* CONFIG_PM_SLEEP */ |
c9353ae1 | 278 | |
ad83c6cb | 279 | static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume); |
c9353ae1 JI |
280 | |
281 | static const struct file_operations wdt_fops = { | |
282 | .owner = THIS_MODULE, | |
283 | .llseek = no_llseek, | |
284 | .open = dw_wdt_open, | |
285 | .write = dw_wdt_write, | |
286 | .unlocked_ioctl = dw_wdt_ioctl, | |
287 | .release = dw_wdt_release | |
288 | }; | |
289 | ||
290 | static struct miscdevice dw_wdt_miscdev = { | |
291 | .fops = &wdt_fops, | |
292 | .name = "watchdog", | |
293 | .minor = WATCHDOG_MINOR, | |
294 | }; | |
295 | ||
2d991a16 | 296 | static int dw_wdt_drv_probe(struct platform_device *pdev) |
c9353ae1 JI |
297 | { |
298 | int ret; | |
299 | struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
300 | ||
4c271bb6 TR |
301 | dw_wdt.regs = devm_ioremap_resource(&pdev->dev, mem); |
302 | if (IS_ERR(dw_wdt.regs)) | |
303 | return PTR_ERR(dw_wdt.regs); | |
c9353ae1 | 304 | |
cf3cc8c2 | 305 | dw_wdt.clk = devm_clk_get(&pdev->dev, NULL); |
c9353ae1 JI |
306 | if (IS_ERR(dw_wdt.clk)) |
307 | return PTR_ERR(dw_wdt.clk); | |
308 | ||
280103e6 | 309 | ret = clk_prepare_enable(dw_wdt.clk); |
c9353ae1 | 310 | if (ret) |
cf3cc8c2 | 311 | return ret; |
c9353ae1 JI |
312 | |
313 | spin_lock_init(&dw_wdt.lock); | |
314 | ||
315 | ret = misc_register(&dw_wdt_miscdev); | |
316 | if (ret) | |
317 | goto out_disable_clk; | |
318 | ||
319 | dw_wdt_set_next_heartbeat(); | |
320 | setup_timer(&dw_wdt.timer, dw_wdt_ping, 0); | |
321 | mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT); | |
322 | ||
323 | return 0; | |
324 | ||
325 | out_disable_clk: | |
280103e6 | 326 | clk_disable_unprepare(dw_wdt.clk); |
c9353ae1 JI |
327 | |
328 | return ret; | |
329 | } | |
330 | ||
4b12b896 | 331 | static int dw_wdt_drv_remove(struct platform_device *pdev) |
c9353ae1 JI |
332 | { |
333 | misc_deregister(&dw_wdt_miscdev); | |
334 | ||
280103e6 | 335 | clk_disable_unprepare(dw_wdt.clk); |
c9353ae1 JI |
336 | |
337 | return 0; | |
338 | } | |
339 | ||
58e56373 DN |
340 | #ifdef CONFIG_OF |
341 | static const struct of_device_id dw_wdt_of_match[] = { | |
342 | { .compatible = "snps,dw-wdt", }, | |
343 | { /* sentinel */ } | |
344 | }; | |
345 | MODULE_DEVICE_TABLE(of, dw_wdt_of_match); | |
346 | #endif | |
347 | ||
c9353ae1 JI |
348 | static struct platform_driver dw_wdt_driver = { |
349 | .probe = dw_wdt_drv_probe, | |
82268714 | 350 | .remove = dw_wdt_drv_remove, |
c9353ae1 JI |
351 | .driver = { |
352 | .name = "dw_wdt", | |
353 | .owner = THIS_MODULE, | |
58e56373 | 354 | .of_match_table = of_match_ptr(dw_wdt_of_match), |
c9353ae1 | 355 | .pm = &dw_wdt_pm_ops, |
c9353ae1 JI |
356 | }, |
357 | }; | |
358 | ||
b8ec6118 | 359 | module_platform_driver(dw_wdt_driver); |
c9353ae1 JI |
360 | |
361 | MODULE_AUTHOR("Jamie Iles"); | |
362 | MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver"); | |
363 | MODULE_LICENSE("GPL"); |