Commit | Line | Data |
---|---|---|
fabbfb9e | 1 | /* |
0d7b1014 | 2 | * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface |
fabbfb9e KG |
3 | * |
4 | * Authors: Dave Updegraff <dave@cray.org> | |
5f3b2756 WVS |
5 | * Kumar Gala <galak@kernel.crashing.org> |
6 | * Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org> | |
7 | * ..and from sc520_wdt | |
500c919e AV |
8 | * Copyright (c) 2008 MontaVista Software, Inc. |
9 | * Anton Vorontsov <avorontsov@ru.mvista.com> | |
fabbfb9e KG |
10 | * |
11 | * Note: it appears that you can only actually ENABLE or DISABLE the thing | |
12 | * once after POR. Once enabled, you cannot disable, and vice versa. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify it | |
15 | * under the terms of the GNU General Public License as published by the | |
16 | * Free Software Foundation; either version 2 of the License, or (at your | |
17 | * option) any later version. | |
18 | */ | |
19 | ||
27c766aa JP |
20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
21 | ||
fabbfb9e KG |
22 | #include <linux/fs.h> |
23 | #include <linux/init.h> | |
24 | #include <linux/kernel.h> | |
500c919e | 25 | #include <linux/timer.h> |
fabbfb9e | 26 | #include <linux/miscdevice.h> |
5af50730 | 27 | #include <linux/of_address.h> |
ef8ab12e | 28 | #include <linux/of_platform.h> |
fabbfb9e KG |
29 | #include <linux/module.h> |
30 | #include <linux/watchdog.h> | |
f26ef3dc AC |
31 | #include <linux/io.h> |
32 | #include <linux/uaccess.h> | |
ef8ab12e | 33 | #include <sysdev/fsl_soc.h> |
fabbfb9e | 34 | |
59ca1b0d | 35 | struct mpc8xxx_wdt { |
fabbfb9e KG |
36 | __be32 res0; |
37 | __be32 swcrr; /* System watchdog control register */ | |
38 | #define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */ | |
39 | #define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */ | |
40 | #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/ | |
41 | #define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */ | |
42 | __be32 swcnr; /* System watchdog count register */ | |
43 | u8 res1[2]; | |
44 | __be16 swsrr; /* System watchdog service register */ | |
45 | u8 res2[0xF0]; | |
46 | }; | |
47 | ||
59ca1b0d | 48 | struct mpc8xxx_wdt_type { |
500c919e AV |
49 | int prescaler; |
50 | bool hw_enabled; | |
51 | }; | |
52 | ||
59ca1b0d | 53 | static struct mpc8xxx_wdt __iomem *wd_base; |
593fc178 | 54 | static int mpc8xxx_wdt_init_late(void); |
fabbfb9e KG |
55 | |
56 | static u16 timeout = 0xffff; | |
57 | module_param(timeout, ushort, 0); | |
f26ef3dc | 58 | MODULE_PARM_DESC(timeout, |
76550d32 | 59 | "Watchdog timeout in ticks. (0<timeout<65536, default=65535)"); |
fabbfb9e | 60 | |
90ab5ee9 | 61 | static bool reset = 1; |
fabbfb9e | 62 | module_param(reset, bool, 0); |
f26ef3dc AC |
63 | MODULE_PARM_DESC(reset, |
64 | "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset"); | |
fabbfb9e | 65 | |
86a1e189 WVS |
66 | static bool nowayout = WATCHDOG_NOWAYOUT; |
67 | module_param(nowayout, bool, 0); | |
500c919e AV |
68 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " |
69 | "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
70 | ||
fabbfb9e KG |
71 | /* |
72 | * We always prescale, but if someone really doesn't want to they can set this | |
73 | * to 0 | |
74 | */ | |
75 | static int prescale = 1; | |
fabbfb9e | 76 | |
c7dfd0cc | 77 | static DEFINE_SPINLOCK(wdt_spinlock); |
fabbfb9e | 78 | |
59ca1b0d | 79 | static void mpc8xxx_wdt_keepalive(void) |
fabbfb9e KG |
80 | { |
81 | /* Ping the WDT */ | |
82 | spin_lock(&wdt_spinlock); | |
83 | out_be16(&wd_base->swsrr, 0x556c); | |
84 | out_be16(&wd_base->swsrr, 0xaa39); | |
85 | spin_unlock(&wdt_spinlock); | |
86 | } | |
87 | ||
d5cfaf0a | 88 | static struct watchdog_device mpc8xxx_wdt_dev; |
59ca1b0d | 89 | static void mpc8xxx_wdt_timer_ping(unsigned long arg); |
d5cfaf0a CL |
90 | static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, |
91 | (unsigned long)&mpc8xxx_wdt_dev); | |
500c919e | 92 | |
59ca1b0d | 93 | static void mpc8xxx_wdt_timer_ping(unsigned long arg) |
500c919e | 94 | { |
d5cfaf0a CL |
95 | struct watchdog_device *w = (struct watchdog_device *)arg; |
96 | ||
59ca1b0d | 97 | mpc8xxx_wdt_keepalive(); |
500c919e | 98 | /* We're pinging it twice faster than needed, just to be sure. */ |
d5cfaf0a | 99 | mod_timer(&wdt_timer, jiffies + HZ * w->timeout / 2); |
500c919e AV |
100 | } |
101 | ||
d5cfaf0a | 102 | static int mpc8xxx_wdt_start(struct watchdog_device *w) |
fabbfb9e KG |
103 | { |
104 | u32 tmp = SWCRR_SWEN; | |
fabbfb9e KG |
105 | |
106 | /* Good, fire up the show */ | |
107 | if (prescale) | |
108 | tmp |= SWCRR_SWPR; | |
109 | if (reset) | |
110 | tmp |= SWCRR_SWRI; | |
111 | ||
112 | tmp |= timeout << 16; | |
113 | ||
114 | out_be32(&wd_base->swcrr, tmp); | |
115 | ||
500c919e AV |
116 | del_timer_sync(&wdt_timer); |
117 | ||
d5cfaf0a | 118 | return 0; |
fabbfb9e KG |
119 | } |
120 | ||
d5cfaf0a | 121 | static int mpc8xxx_wdt_ping(struct watchdog_device *w) |
fabbfb9e | 122 | { |
d5cfaf0a | 123 | mpc8xxx_wdt_keepalive(); |
fabbfb9e KG |
124 | return 0; |
125 | } | |
126 | ||
d5cfaf0a | 127 | static int mpc8xxx_wdt_stop(struct watchdog_device *w) |
fabbfb9e | 128 | { |
d5cfaf0a CL |
129 | mod_timer(&wdt_timer, jiffies); |
130 | return 0; | |
fabbfb9e KG |
131 | } |
132 | ||
d5cfaf0a CL |
133 | static struct watchdog_info mpc8xxx_wdt_info = { |
134 | .options = WDIOF_KEEPALIVEPING, | |
135 | .firmware_version = 1, | |
136 | .identity = "MPC8xxx", | |
fabbfb9e KG |
137 | }; |
138 | ||
d5cfaf0a CL |
139 | static struct watchdog_ops mpc8xxx_wdt_ops = { |
140 | .owner = THIS_MODULE, | |
141 | .start = mpc8xxx_wdt_start, | |
142 | .ping = mpc8xxx_wdt_ping, | |
143 | .stop = mpc8xxx_wdt_stop, | |
144 | }; | |
145 | ||
146 | static struct watchdog_device mpc8xxx_wdt_dev = { | |
147 | .info = &mpc8xxx_wdt_info, | |
148 | .ops = &mpc8xxx_wdt_ops, | |
fabbfb9e KG |
149 | }; |
150 | ||
b1608d69 | 151 | static const struct of_device_id mpc8xxx_wdt_match[]; |
2d991a16 | 152 | static int mpc8xxx_wdt_probe(struct platform_device *ofdev) |
fabbfb9e | 153 | { |
fabbfb9e | 154 | int ret; |
b1608d69 | 155 | const struct of_device_id *match; |
de2b606c | 156 | struct device_node *np = ofdev->dev.of_node; |
639397e4 | 157 | const struct mpc8xxx_wdt_type *wdt_type; |
ef8ab12e | 158 | u32 freq = fsl_get_sys_freq(); |
500c919e | 159 | bool enabled; |
d5cfaf0a | 160 | unsigned int timeout_sec; |
fabbfb9e | 161 | |
b1608d69 GL |
162 | match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev); |
163 | if (!match) | |
1c48a5c9 | 164 | return -EINVAL; |
b1608d69 | 165 | wdt_type = match->data; |
1c48a5c9 | 166 | |
ef8ab12e AV |
167 | if (!freq || freq == -1) |
168 | return -EINVAL; | |
fabbfb9e | 169 | |
500c919e | 170 | wd_base = of_iomap(np, 0); |
ef8ab12e AV |
171 | if (!wd_base) |
172 | return -ENOMEM; | |
fabbfb9e | 173 | |
500c919e AV |
174 | enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN; |
175 | if (!enabled && wdt_type->hw_enabled) { | |
27c766aa | 176 | pr_info("could not be enabled in software\n"); |
500c919e AV |
177 | ret = -ENOSYS; |
178 | goto err_unmap; | |
179 | } | |
180 | ||
fabbfb9e KG |
181 | /* Calculate the timeout in seconds */ |
182 | if (prescale) | |
500c919e | 183 | timeout_sec = (timeout * wdt_type->prescaler) / freq; |
fabbfb9e | 184 | else |
ef8ab12e | 185 | timeout_sec = timeout / freq; |
fabbfb9e | 186 | |
d5cfaf0a | 187 | mpc8xxx_wdt_dev.timeout = timeout_sec; |
593fc178 AV |
188 | #ifdef MODULE |
189 | ret = mpc8xxx_wdt_init_late(); | |
190 | if (ret) | |
191 | goto err_unmap; | |
192 | #endif | |
193 | ||
27c766aa JP |
194 | pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n", |
195 | reset ? "reset" : "interrupt", timeout, timeout_sec); | |
500c919e AV |
196 | |
197 | /* | |
198 | * If the watchdog was previously enabled or we're running on | |
59ca1b0d | 199 | * MPC8xxx, we should ping the wdt from the kernel until the |
500c919e AV |
200 | * userspace handles it. |
201 | */ | |
202 | if (enabled) | |
d5cfaf0a | 203 | mod_timer(&wdt_timer, jiffies); |
fabbfb9e | 204 | return 0; |
fabbfb9e KG |
205 | err_unmap: |
206 | iounmap(wd_base); | |
0d7b1014 | 207 | wd_base = NULL; |
fabbfb9e KG |
208 | return ret; |
209 | } | |
210 | ||
4b12b896 | 211 | static int mpc8xxx_wdt_remove(struct platform_device *ofdev) |
fabbfb9e | 212 | { |
d5cfaf0a CL |
213 | pr_crit("Watchdog removed, expect the %s soon!\n", |
214 | reset ? "reset" : "machine check exception"); | |
500c919e | 215 | del_timer_sync(&wdt_timer); |
d5cfaf0a | 216 | watchdog_unregister_device(&mpc8xxx_wdt_dev); |
fabbfb9e KG |
217 | iounmap(wd_base); |
218 | ||
219 | return 0; | |
220 | } | |
221 | ||
59ca1b0d | 222 | static const struct of_device_id mpc8xxx_wdt_match[] = { |
ef8ab12e AV |
223 | { |
224 | .compatible = "mpc83xx_wdt", | |
59ca1b0d | 225 | .data = &(struct mpc8xxx_wdt_type) { |
500c919e AV |
226 | .prescaler = 0x10000, |
227 | }, | |
228 | }, | |
229 | { | |
230 | .compatible = "fsl,mpc8610-wdt", | |
59ca1b0d | 231 | .data = &(struct mpc8xxx_wdt_type) { |
500c919e AV |
232 | .prescaler = 0x10000, |
233 | .hw_enabled = true, | |
234 | }, | |
ef8ab12e | 235 | }, |
0d7b1014 AV |
236 | { |
237 | .compatible = "fsl,mpc823-wdt", | |
238 | .data = &(struct mpc8xxx_wdt_type) { | |
239 | .prescaler = 0x800, | |
4af897fa | 240 | .hw_enabled = true, |
0d7b1014 AV |
241 | }, |
242 | }, | |
ef8ab12e AV |
243 | {}, |
244 | }; | |
59ca1b0d | 245 | MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match); |
ef8ab12e | 246 | |
1c48a5c9 | 247 | static struct platform_driver mpc8xxx_wdt_driver = { |
59ca1b0d | 248 | .probe = mpc8xxx_wdt_probe, |
82268714 | 249 | .remove = mpc8xxx_wdt_remove, |
4018294b GL |
250 | .driver = { |
251 | .name = "mpc8xxx_wdt", | |
4018294b | 252 | .of_match_table = mpc8xxx_wdt_match, |
fabbfb9e KG |
253 | }, |
254 | }; | |
255 | ||
0d7b1014 AV |
256 | /* |
257 | * We do wdt initialization in two steps: arch_initcall probes the wdt | |
258 | * very early to start pinging the watchdog (misc devices are not yet | |
259 | * available), and later module_init() just registers the misc device. | |
260 | */ | |
593fc178 | 261 | static int mpc8xxx_wdt_init_late(void) |
0d7b1014 AV |
262 | { |
263 | int ret; | |
264 | ||
265 | if (!wd_base) | |
266 | return -ENODEV; | |
267 | ||
d5cfaf0a CL |
268 | watchdog_set_nowayout(&mpc8xxx_wdt_dev, nowayout); |
269 | ||
270 | ret = watchdog_register_device(&mpc8xxx_wdt_dev); | |
0d7b1014 | 271 | if (ret) { |
d5cfaf0a | 272 | pr_err("cannot register watchdog device (err=%d)\n", ret); |
0d7b1014 AV |
273 | return ret; |
274 | } | |
275 | return 0; | |
276 | } | |
593fc178 | 277 | #ifndef MODULE |
0d7b1014 | 278 | module_init(mpc8xxx_wdt_init_late); |
593fc178 | 279 | #endif |
0d7b1014 | 280 | |
59ca1b0d | 281 | static int __init mpc8xxx_wdt_init(void) |
fabbfb9e | 282 | { |
1c48a5c9 | 283 | return platform_driver_register(&mpc8xxx_wdt_driver); |
fabbfb9e | 284 | } |
0d7b1014 | 285 | arch_initcall(mpc8xxx_wdt_init); |
fabbfb9e | 286 | |
59ca1b0d | 287 | static void __exit mpc8xxx_wdt_exit(void) |
fabbfb9e | 288 | { |
1c48a5c9 | 289 | platform_driver_unregister(&mpc8xxx_wdt_driver); |
fabbfb9e | 290 | } |
59ca1b0d | 291 | module_exit(mpc8xxx_wdt_exit); |
fabbfb9e KG |
292 | |
293 | MODULE_AUTHOR("Dave Updegraff, Kumar Gala"); | |
0d7b1014 AV |
294 | MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx " |
295 | "uProcessors"); | |
fabbfb9e | 296 | MODULE_LICENSE("GPL"); |