watchdog: omap_wdt: delete redundant platform_set_drvdata() calls
[deliverable/linux.git] / drivers / watchdog / omap_wdt.c
CommitLineData
7768a13c 1/*
2817142f 2 * omap_wdt.c
7768a13c 3 *
2817142f 4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
7768a13c
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5 *
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
8 *
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * History:
15 *
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
29fa0586 19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
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20 *
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
24 *
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
27 */
28
27c766aa
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29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
7768a13c 31#include <linux/module.h>
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32#include <linux/types.h>
33#include <linux/kernel.h>
7768a13c 34#include <linux/mm.h>
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35#include <linux/watchdog.h>
36#include <linux/reboot.h>
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37#include <linux/init.h>
38#include <linux/err.h>
39#include <linux/platform_device.h>
40#include <linux/moduleparam.h>
089ab079 41#include <linux/io.h>
5a0e3ad6 42#include <linux/slab.h>
7ec5ad0f 43#include <linux/pm_runtime.h>
129f5577 44#include <linux/platform_data/omap-wd-timer.h>
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45
46#include "omap_wdt.h"
47
48static unsigned timer_margin;
49module_param(timer_margin, uint, 0);
50MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
51
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52struct omap_wdt_dev {
53 void __iomem *base; /* physical */
54 struct device *dev;
67c0f554 55 bool omap_wdt_users;
2817142f 56 struct resource *mem;
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57 int wdt_trgr_pattern;
58 struct mutex lock; /* to avoid races with PM */
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59};
60
67c0f554 61static void omap_wdt_reload(struct omap_wdt_dev *wdev)
7768a13c 62{
2817142f 63 void __iomem *base = wdev->base;
b3112180 64
7768a13c 65 /* wait for posted write to complete */
9f69e3b0 66 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
7768a13c 67 cpu_relax();
b3112180 68
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69 wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
70 __raw_writel(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
b3112180 71
7768a13c 72 /* wait for posted write to complete */
9f69e3b0 73 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
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74 cpu_relax();
75 /* reloaded WCRR from WLDR */
76}
77
2817142f 78static void omap_wdt_enable(struct omap_wdt_dev *wdev)
7768a13c 79{
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80 void __iomem *base = wdev->base;
81
7768a13c 82 /* Sequence to enable the watchdog */
9f69e3b0
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83 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
84 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
7768a13c 85 cpu_relax();
b3112180 86
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87 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
88 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
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89 cpu_relax();
90}
91
2817142f 92static void omap_wdt_disable(struct omap_wdt_dev *wdev)
7768a13c 93{
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94 void __iomem *base = wdev->base;
95
7768a13c 96 /* sequence required to disable watchdog */
9f69e3b0
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97 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
98 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
7768a13c 99 cpu_relax();
b3112180 100
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101 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
102 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
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103 cpu_relax();
104}
105
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106static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
107 unsigned int timeout)
7768a13c 108{
67c0f554 109 u32 pre_margin = GET_WLDR_VAL(timeout);
b3112180 110 void __iomem *base = wdev->base;
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111
112 /* just count up at 32 KHz */
9f69e3b0 113 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
7768a13c 114 cpu_relax();
b3112180 115
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116 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
117 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
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118 cpu_relax();
119}
120
67c0f554 121static int omap_wdt_start(struct watchdog_device *wdog)
7768a13c 122{
67c0f554 123 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
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124 void __iomem *base = wdev->base;
125
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126 mutex_lock(&wdev->lock);
127
128 wdev->omap_wdt_users = true;
7768a13c 129
7ec5ad0f 130 pm_runtime_get_sync(wdev->dev);
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131
132 /* initialize prescaler */
9f69e3b0 133 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
7768a13c 134 cpu_relax();
b3112180 135
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136 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
137 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
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138 cpu_relax();
139
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140 omap_wdt_set_timer(wdev, wdog->timeout);
141 omap_wdt_reload(wdev); /* trigger loading of new timeout value */
2817142f 142 omap_wdt_enable(wdev);
b3112180 143
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144 mutex_unlock(&wdev->lock);
145
146 return 0;
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147}
148
67c0f554 149static int omap_wdt_stop(struct watchdog_device *wdog)
7768a13c 150{
67c0f554 151 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
b3112180 152
67c0f554 153 mutex_lock(&wdev->lock);
2817142f 154 omap_wdt_disable(wdev);
7ec5ad0f 155 pm_runtime_put_sync(wdev->dev);
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156 wdev->omap_wdt_users = false;
157 mutex_unlock(&wdev->lock);
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158 return 0;
159}
160
67c0f554 161static int omap_wdt_ping(struct watchdog_device *wdog)
7768a13c 162{
67c0f554 163 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
b3112180 164
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165 mutex_lock(&wdev->lock);
166 omap_wdt_reload(wdev);
167 mutex_unlock(&wdev->lock);
168
169 return 0;
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170}
171
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172static int omap_wdt_set_timeout(struct watchdog_device *wdog,
173 unsigned int timeout)
7768a13c 174{
67c0f554 175 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
7768a13c 176
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177 mutex_lock(&wdev->lock);
178 omap_wdt_disable(wdev);
179 omap_wdt_set_timer(wdev, timeout);
180 omap_wdt_enable(wdev);
181 omap_wdt_reload(wdev);
182 wdog->timeout = timeout;
183 mutex_unlock(&wdev->lock);
184
185 return 0;
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186}
187
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188static const struct watchdog_info omap_wdt_info = {
189 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
190 .identity = "OMAP Watchdog",
191};
192
193static const struct watchdog_ops omap_wdt_ops = {
194 .owner = THIS_MODULE,
195 .start = omap_wdt_start,
196 .stop = omap_wdt_stop,
197 .ping = omap_wdt_ping,
198 .set_timeout = omap_wdt_set_timeout,
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199};
200
2d991a16 201static int omap_wdt_probe(struct platform_device *pdev)
7768a13c 202{
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203 struct omap_wd_timer_platform_data *pdata = pdev->dev.platform_data;
204 bool nowayout = WATCHDOG_NOWAYOUT;
205 struct watchdog_device *omap_wdt;
7768a13c 206 struct resource *res, *mem;
2817142f 207 struct omap_wdt_dev *wdev;
67c0f554 208 u32 rs;
b3112180 209 int ret;
7768a13c 210
4f4753d9 211 omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
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212 if (!omap_wdt)
213 return -ENOMEM;
214
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215 /* reserve static register mappings */
216 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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217 if (!res)
218 return -ENOENT;
7768a13c 219
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220 mem = devm_request_mem_region(&pdev->dev, res->start,
221 resource_size(res), pdev->name);
222 if (!mem)
223 return -EBUSY;
7768a13c 224
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225 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
226 if (!wdev)
227 return -ENOMEM;
b3112180 228
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229 wdev->omap_wdt_users = false;
230 wdev->mem = mem;
231 wdev->dev = &pdev->dev;
232 wdev->wdt_trgr_pattern = 0x1234;
233 mutex_init(&wdev->lock);
2817142f 234
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235 wdev->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
236 if (!wdev->base)
237 return -ENOMEM;
9f69e3b0 238
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239 omap_wdt->info = &omap_wdt_info;
240 omap_wdt->ops = &omap_wdt_ops;
241 omap_wdt->min_timeout = TIMER_MARGIN_MIN;
242 omap_wdt->max_timeout = TIMER_MARGIN_MAX;
243
244 if (timer_margin >= TIMER_MARGIN_MIN &&
245 timer_margin <= TIMER_MARGIN_MAX)
246 omap_wdt->timeout = timer_margin;
247 else
248 omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
249
250 watchdog_set_drvdata(omap_wdt, wdev);
251 watchdog_set_nowayout(omap_wdt, nowayout);
252
253 platform_set_drvdata(pdev, omap_wdt);
7768a13c 254
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255 pm_runtime_enable(wdev->dev);
256 pm_runtime_get_sync(wdev->dev);
789cd470 257
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258 if (pdata && pdata->read_reset_sources)
259 rs = pdata->read_reset_sources();
260 else
261 rs = 0;
262 omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
263 WDIOF_CARDRESET : 0;
7768a13c 264
67c0f554 265 omap_wdt_disable(wdev);
2817142f 266
67c0f554 267 ret = watchdog_register_device(omap_wdt);
7768a13c 268 if (ret)
67c0f554 269 goto err_register;
7768a13c 270
2817142f 271 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
9f69e3b0 272 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
67c0f554 273 omap_wdt->timeout);
7768a13c 274
7ec5ad0f 275 pm_runtime_put_sync(wdev->dev);
789cd470 276
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277 return 0;
278
67c0f554 279err_register:
12c583d8 280 pm_runtime_disable(wdev->dev);
b3112180 281
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282 return ret;
283}
284
285static void omap_wdt_shutdown(struct platform_device *pdev)
286{
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287 struct watchdog_device *wdog = platform_get_drvdata(pdev);
288 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
2817142f 289
67c0f554 290 mutex_lock(&wdev->lock);
0503add9 291 if (wdev->omap_wdt_users) {
2817142f 292 omap_wdt_disable(wdev);
0503add9
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293 pm_runtime_put_sync(wdev->dev);
294 }
67c0f554 295 mutex_unlock(&wdev->lock);
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296}
297
4b12b896 298static int omap_wdt_remove(struct platform_device *pdev)
7768a13c 299{
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300 struct watchdog_device *wdog = platform_get_drvdata(pdev);
301 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
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302 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
303
12c583d8 304 pm_runtime_disable(wdev->dev);
67c0f554 305 watchdog_unregister_device(wdog);
b3112180 306
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307 return 0;
308}
309
310#ifdef CONFIG_PM
311
312/* REVISIT ... not clear this is the best way to handle system suspend; and
313 * it's very inappropriate for selective device suspend (e.g. suspending this
314 * through sysfs rather than by stopping the watchdog daemon). Also, this
315 * may not play well enough with NOWAYOUT...
316 */
317
318static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
319{
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320 struct watchdog_device *wdog = platform_get_drvdata(pdev);
321 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
b3112180 322
67c0f554 323 mutex_lock(&wdev->lock);
0503add9 324 if (wdev->omap_wdt_users) {
2817142f 325 omap_wdt_disable(wdev);
0503add9
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326 pm_runtime_put_sync(wdev->dev);
327 }
67c0f554 328 mutex_unlock(&wdev->lock);
b3112180 329
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330 return 0;
331}
332
333static int omap_wdt_resume(struct platform_device *pdev)
334{
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335 struct watchdog_device *wdog = platform_get_drvdata(pdev);
336 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
b3112180 337
67c0f554 338 mutex_lock(&wdev->lock);
2817142f 339 if (wdev->omap_wdt_users) {
0503add9 340 pm_runtime_get_sync(wdev->dev);
2817142f 341 omap_wdt_enable(wdev);
67c0f554 342 omap_wdt_reload(wdev);
7768a13c 343 }
67c0f554 344 mutex_unlock(&wdev->lock);
b3112180 345
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346 return 0;
347}
348
349#else
350#define omap_wdt_suspend NULL
351#define omap_wdt_resume NULL
352#endif
353
e6ca04ea
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354static const struct of_device_id omap_wdt_of_match[] = {
355 { .compatible = "ti,omap3-wdt", },
356 {},
357};
358MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
359
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360static struct platform_driver omap_wdt_driver = {
361 .probe = omap_wdt_probe,
82268714 362 .remove = omap_wdt_remove,
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363 .shutdown = omap_wdt_shutdown,
364 .suspend = omap_wdt_suspend,
365 .resume = omap_wdt_resume,
366 .driver = {
367 .owner = THIS_MODULE,
368 .name = "omap_wdt",
e6ca04ea 369 .of_match_table = omap_wdt_of_match,
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370 },
371};
372
b8ec6118 373module_platform_driver(omap_wdt_driver);
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374
375MODULE_AUTHOR("George G. Davis");
376MODULE_LICENSE("GPL");
f37d193c 377MODULE_ALIAS("platform:omap_wdt");
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