Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[deliverable/linux.git] / drivers / xen / events.c
CommitLineData
e46cdb66
JF
1/*
2 * Xen event channels
3 *
4 * Xen models interrupts with abstract event channels. Because each
5 * domain gets 1024 event channels, but NR_IRQ is not that large, we
6 * must dynamically map irqs<->event channels. The event channels
7 * interface with the rest of the kernel by defining a xen interrupt
8 * chip. When an event is recieved, it is mapped to an irq and sent
9 * through the normal interrupt processing path.
10 *
11 * There are four kinds of events which can be mapped to an event
12 * channel:
13 *
14 * 1. Inter-domain notifications. This includes all the virtual
15 * device events, since they're driven by front-ends in another domain
16 * (typically dom0).
17 * 2. VIRQs, typically used for timers. These are per-cpu events.
18 * 3. IPIs.
19 * 4. Hardware interrupts. Not supported at present.
20 *
21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
22 */
23
24#include <linux/linkage.h>
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <linux/module.h>
28#include <linux/string.h>
28e08861 29#include <linux/bootmem.h>
5a0e3ad6 30#include <linux/slab.h>
e46cdb66 31
38e20b07 32#include <asm/desc.h>
e46cdb66
JF
33#include <asm/ptrace.h>
34#include <asm/irq.h>
792dc4f6 35#include <asm/idle.h>
e46cdb66
JF
36#include <asm/sync_bitops.h>
37#include <asm/xen/hypercall.h>
8d1b8753 38#include <asm/xen/hypervisor.h>
e46cdb66 39
38e20b07
SY
40#include <xen/xen.h>
41#include <xen/hvm.h>
e04d0d07 42#include <xen/xen-ops.h>
e46cdb66
JF
43#include <xen/events.h>
44#include <xen/interface/xen.h>
45#include <xen/interface/event_channel.h>
38e20b07
SY
46#include <xen/interface/hvm/hvm_op.h>
47#include <xen/interface/hvm/params.h>
e46cdb66 48
e46cdb66
JF
49/*
50 * This lock protects updates to the following mapping and reference-count
51 * arrays. The lock does not need to be acquired to read the mapping tables.
52 */
53static DEFINE_SPINLOCK(irq_mapping_update_lock);
54
55/* IRQ <-> VIRQ mapping. */
204fba4a 56static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
e46cdb66 57
f87e4cac 58/* IRQ <-> IPI mapping */
204fba4a 59static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
f87e4cac 60
ced40d0f
JF
61/* Interrupt types. */
62enum xen_irq_type {
d77bbd4d 63 IRQT_UNBOUND = 0,
f87e4cac
JF
64 IRQT_PIRQ,
65 IRQT_VIRQ,
66 IRQT_IPI,
67 IRQT_EVTCHN
68};
e46cdb66 69
ced40d0f
JF
70/*
71 * Packed IRQ information:
72 * type - enum xen_irq_type
73 * event channel - irq->event channel mapping
74 * cpu - cpu this event channel is bound to
75 * index - type-specific information:
76 * PIRQ - vector, with MSB being "needs EIO"
77 * VIRQ - virq number
78 * IPI - IPI vector
79 * EVTCHN -
80 */
81struct irq_info
82{
83 enum xen_irq_type type; /* type */
84 unsigned short evtchn; /* event channel */
85 unsigned short cpu; /* cpu bound */
86
87 union {
88 unsigned short virq;
89 enum ipi_vector ipi;
90 struct {
91 unsigned short gsi;
92 unsigned short vector;
93 } pirq;
94 } u;
95};
96
97static struct irq_info irq_info[NR_IRQS];
e46cdb66
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98
99static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
100 [0 ... NR_EVENT_CHANNELS-1] = -1
101};
c7a3589e
MT
102struct cpu_evtchn_s {
103 unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
104};
105static struct cpu_evtchn_s *cpu_evtchn_mask_p;
106static inline unsigned long *cpu_evtchn_mask(int cpu)
107{
108 return cpu_evtchn_mask_p[cpu].bits;
109}
e46cdb66 110
e46cdb66
JF
111/* Xen will never allocate port zero for any purpose. */
112#define VALID_EVTCHN(chn) ((chn) != 0)
113
e46cdb66 114static struct irq_chip xen_dynamic_chip;
aaca4964 115static struct irq_chip xen_percpu_chip;
e46cdb66
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116
117/* Constructor for packed IRQ information. */
ced40d0f
JF
118static struct irq_info mk_unbound_info(void)
119{
120 return (struct irq_info) { .type = IRQT_UNBOUND };
121}
122
123static struct irq_info mk_evtchn_info(unsigned short evtchn)
124{
90af9514
IC
125 return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
126 .cpu = 0 };
ced40d0f
JF
127}
128
129static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
e46cdb66 130{
ced40d0f 131 return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
90af9514 132 .cpu = 0, .u.ipi = ipi };
ced40d0f
JF
133}
134
135static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
136{
137 return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
90af9514 138 .cpu = 0, .u.virq = virq };
ced40d0f
JF
139}
140
141static struct irq_info mk_pirq_info(unsigned short evtchn,
142 unsigned short gsi, unsigned short vector)
143{
144 return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
90af9514 145 .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
e46cdb66
JF
146}
147
148/*
149 * Accessors for packed IRQ information.
150 */
ced40d0f 151static struct irq_info *info_for_irq(unsigned irq)
e46cdb66 152{
ced40d0f 153 return &irq_info[irq];
e46cdb66
JF
154}
155
ced40d0f 156static unsigned int evtchn_from_irq(unsigned irq)
e46cdb66 157{
ced40d0f 158 return info_for_irq(irq)->evtchn;
e46cdb66
JF
159}
160
d4c04536
IC
161unsigned irq_from_evtchn(unsigned int evtchn)
162{
163 return evtchn_to_irq[evtchn];
164}
165EXPORT_SYMBOL_GPL(irq_from_evtchn);
166
ced40d0f 167static enum ipi_vector ipi_from_irq(unsigned irq)
e46cdb66 168{
ced40d0f
JF
169 struct irq_info *info = info_for_irq(irq);
170
171 BUG_ON(info == NULL);
172 BUG_ON(info->type != IRQT_IPI);
173
174 return info->u.ipi;
175}
176
177static unsigned virq_from_irq(unsigned irq)
178{
179 struct irq_info *info = info_for_irq(irq);
180
181 BUG_ON(info == NULL);
182 BUG_ON(info->type != IRQT_VIRQ);
183
184 return info->u.virq;
185}
186
187static unsigned gsi_from_irq(unsigned irq)
188{
189 struct irq_info *info = info_for_irq(irq);
190
191 BUG_ON(info == NULL);
192 BUG_ON(info->type != IRQT_PIRQ);
193
194 return info->u.pirq.gsi;
195}
196
197static unsigned vector_from_irq(unsigned irq)
198{
199 struct irq_info *info = info_for_irq(irq);
200
201 BUG_ON(info == NULL);
202 BUG_ON(info->type != IRQT_PIRQ);
203
204 return info->u.pirq.vector;
205}
206
207static enum xen_irq_type type_from_irq(unsigned irq)
208{
209 return info_for_irq(irq)->type;
210}
211
212static unsigned cpu_from_irq(unsigned irq)
213{
214 return info_for_irq(irq)->cpu;
215}
216
217static unsigned int cpu_from_evtchn(unsigned int evtchn)
218{
219 int irq = evtchn_to_irq[evtchn];
220 unsigned ret = 0;
221
222 if (irq != -1)
223 ret = cpu_from_irq(irq);
224
225 return ret;
e46cdb66
JF
226}
227
228static inline unsigned long active_evtchns(unsigned int cpu,
229 struct shared_info *sh,
230 unsigned int idx)
231{
232 return (sh->evtchn_pending[idx] &
c7a3589e 233 cpu_evtchn_mask(cpu)[idx] &
e46cdb66
JF
234 ~sh->evtchn_mask[idx]);
235}
236
237static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
238{
239 int irq = evtchn_to_irq[chn];
240
241 BUG_ON(irq == -1);
242#ifdef CONFIG_SMP
7f7ace0c 243 cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
e46cdb66
JF
244#endif
245
ced40d0f 246 __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
c7a3589e 247 __set_bit(chn, cpu_evtchn_mask(cpu));
e46cdb66 248
ced40d0f 249 irq_info[irq].cpu = cpu;
e46cdb66
JF
250}
251
252static void init_evtchn_cpu_bindings(void)
253{
254#ifdef CONFIG_SMP
10e58084 255 struct irq_desc *desc;
e46cdb66 256 int i;
10e58084 257
e46cdb66 258 /* By default all event channels notify CPU#0. */
0b8f1efa 259 for_each_irq_desc(i, desc) {
7f7ace0c 260 cpumask_copy(desc->affinity, cpumask_of(0));
0b8f1efa 261 }
e46cdb66
JF
262#endif
263
c7a3589e 264 memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
e46cdb66
JF
265}
266
e46cdb66
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267static inline void clear_evtchn(int port)
268{
269 struct shared_info *s = HYPERVISOR_shared_info;
270 sync_clear_bit(port, &s->evtchn_pending[0]);
271}
272
273static inline void set_evtchn(int port)
274{
275 struct shared_info *s = HYPERVISOR_shared_info;
276 sync_set_bit(port, &s->evtchn_pending[0]);
277}
278
168d2f46
JF
279static inline int test_evtchn(int port)
280{
281 struct shared_info *s = HYPERVISOR_shared_info;
282 return sync_test_bit(port, &s->evtchn_pending[0]);
283}
284
e46cdb66
JF
285
286/**
287 * notify_remote_via_irq - send event to remote end of event channel via irq
288 * @irq: irq of event channel to send event to
289 *
290 * Unlike notify_remote_via_evtchn(), this is safe to use across
291 * save/restore. Notifications on a broken connection are silently
292 * dropped.
293 */
294void notify_remote_via_irq(int irq)
295{
296 int evtchn = evtchn_from_irq(irq);
297
298 if (VALID_EVTCHN(evtchn))
299 notify_remote_via_evtchn(evtchn);
300}
301EXPORT_SYMBOL_GPL(notify_remote_via_irq);
302
303static void mask_evtchn(int port)
304{
305 struct shared_info *s = HYPERVISOR_shared_info;
306 sync_set_bit(port, &s->evtchn_mask[0]);
307}
308
309static void unmask_evtchn(int port)
310{
311 struct shared_info *s = HYPERVISOR_shared_info;
312 unsigned int cpu = get_cpu();
313
314 BUG_ON(!irqs_disabled());
315
316 /* Slow path (hypercall) if this is a non-local port. */
317 if (unlikely(cpu != cpu_from_evtchn(port))) {
318 struct evtchn_unmask unmask = { .port = port };
319 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
320 } else {
321 struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
322
323 sync_clear_bit(port, &s->evtchn_mask[0]);
324
325 /*
326 * The following is basically the equivalent of
327 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
328 * the interrupt edge' if the channel is masked.
329 */
330 if (sync_test_bit(port, &s->evtchn_pending[0]) &&
331 !sync_test_and_set_bit(port / BITS_PER_LONG,
332 &vcpu_info->evtchn_pending_sel))
333 vcpu_info->evtchn_upcall_pending = 1;
334 }
335
336 put_cpu();
337}
338
339static int find_unbound_irq(void)
340{
77dff1c7
TG
341 struct irq_data *data;
342 int irq, res;
e46cdb66 343
99ad198c 344 for (irq = 0; irq < nr_irqs; irq++) {
77dff1c7 345 data = irq_get_irq_data(irq);
99ad198c 346 /* only 0->15 have init'd desc; handle irq > 16 */
77dff1c7 347 if (!data)
99ad198c 348 break;
77dff1c7 349 if (data->chip == &no_irq_chip)
99ad198c 350 break;
77dff1c7 351 if (data->chip != &xen_dynamic_chip)
99ad198c 352 continue;
d77bbd4d 353 if (irq_info[irq].type == IRQT_UNBOUND)
77dff1c7 354 return irq;
99ad198c 355 }
e46cdb66 356
5a15d7e8
YL
357 if (irq == nr_irqs)
358 panic("No available IRQ to bind to: increase nr_irqs!\n");
e46cdb66 359
77dff1c7 360 res = irq_alloc_desc_at(irq, 0);
6f8a0ed4 361
77dff1c7
TG
362 if (WARN_ON(res != irq))
363 return -1;
ced40d0f 364
e46cdb66
JF
365 return irq;
366}
367
b536b4b9 368int bind_evtchn_to_irq(unsigned int evtchn)
e46cdb66
JF
369{
370 int irq;
371
372 spin_lock(&irq_mapping_update_lock);
373
374 irq = evtchn_to_irq[evtchn];
375
376 if (irq == -1) {
377 irq = find_unbound_irq();
378
e46cdb66 379 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
dffe2e1e 380 handle_edge_irq, "event");
e46cdb66
JF
381
382 evtchn_to_irq[evtchn] = irq;
ced40d0f 383 irq_info[irq] = mk_evtchn_info(evtchn);
e46cdb66
JF
384 }
385
e46cdb66
JF
386 spin_unlock(&irq_mapping_update_lock);
387
388 return irq;
389}
b536b4b9 390EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
e46cdb66 391
f87e4cac
JF
392static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
393{
394 struct evtchn_bind_ipi bind_ipi;
395 int evtchn, irq;
396
397 spin_lock(&irq_mapping_update_lock);
398
399 irq = per_cpu(ipi_to_irq, cpu)[ipi];
90af9514 400
f87e4cac
JF
401 if (irq == -1) {
402 irq = find_unbound_irq();
403 if (irq < 0)
404 goto out;
405
aaca4964
JF
406 set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
407 handle_percpu_irq, "ipi");
f87e4cac
JF
408
409 bind_ipi.vcpu = cpu;
410 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
411 &bind_ipi) != 0)
412 BUG();
413 evtchn = bind_ipi.port;
414
415 evtchn_to_irq[evtchn] = irq;
ced40d0f 416 irq_info[irq] = mk_ipi_info(evtchn, ipi);
f87e4cac
JF
417 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
418
419 bind_evtchn_to_cpu(evtchn, cpu);
420 }
421
f87e4cac
JF
422 out:
423 spin_unlock(&irq_mapping_update_lock);
424 return irq;
425}
426
427
e46cdb66
JF
428static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
429{
430 struct evtchn_bind_virq bind_virq;
431 int evtchn, irq;
432
433 spin_lock(&irq_mapping_update_lock);
434
435 irq = per_cpu(virq_to_irq, cpu)[virq];
436
437 if (irq == -1) {
438 bind_virq.virq = virq;
439 bind_virq.vcpu = cpu;
440 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
441 &bind_virq) != 0)
442 BUG();
443 evtchn = bind_virq.port;
444
445 irq = find_unbound_irq();
446
aaca4964
JF
447 set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
448 handle_percpu_irq, "virq");
e46cdb66
JF
449
450 evtchn_to_irq[evtchn] = irq;
ced40d0f 451 irq_info[irq] = mk_virq_info(evtchn, virq);
e46cdb66
JF
452
453 per_cpu(virq_to_irq, cpu)[virq] = irq;
454
455 bind_evtchn_to_cpu(evtchn, cpu);
456 }
457
e46cdb66
JF
458 spin_unlock(&irq_mapping_update_lock);
459
460 return irq;
461}
462
463static void unbind_from_irq(unsigned int irq)
464{
465 struct evtchn_close close;
466 int evtchn = evtchn_from_irq(irq);
467
468 spin_lock(&irq_mapping_update_lock);
469
d77bbd4d 470 if (VALID_EVTCHN(evtchn)) {
e46cdb66
JF
471 close.port = evtchn;
472 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
473 BUG();
474
475 switch (type_from_irq(irq)) {
476 case IRQT_VIRQ:
477 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
ced40d0f 478 [virq_from_irq(irq)] = -1;
e46cdb66 479 break;
d68d82af
AN
480 case IRQT_IPI:
481 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
ced40d0f 482 [ipi_from_irq(irq)] = -1;
d68d82af 483 break;
e46cdb66
JF
484 default:
485 break;
486 }
487
488 /* Closed ports are implicitly re-bound to VCPU0. */
489 bind_evtchn_to_cpu(evtchn, 0);
490
491 evtchn_to_irq[evtchn] = -1;
fed5ea87
IC
492 }
493
494 if (irq_info[irq].type != IRQT_UNBOUND) {
ced40d0f 495 irq_info[irq] = mk_unbound_info();
e46cdb66 496
77dff1c7 497 irq_free_desc(irq);
e46cdb66
JF
498 }
499
500 spin_unlock(&irq_mapping_update_lock);
501}
502
503int bind_evtchn_to_irqhandler(unsigned int evtchn,
7c239975 504 irq_handler_t handler,
e46cdb66
JF
505 unsigned long irqflags,
506 const char *devname, void *dev_id)
507{
508 unsigned int irq;
509 int retval;
510
511 irq = bind_evtchn_to_irq(evtchn);
512 retval = request_irq(irq, handler, irqflags, devname, dev_id);
513 if (retval != 0) {
514 unbind_from_irq(irq);
515 return retval;
516 }
517
518 return irq;
519}
520EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
521
522int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
7c239975 523 irq_handler_t handler,
e46cdb66
JF
524 unsigned long irqflags, const char *devname, void *dev_id)
525{
526 unsigned int irq;
527 int retval;
528
529 irq = bind_virq_to_irq(virq, cpu);
530 retval = request_irq(irq, handler, irqflags, devname, dev_id);
531 if (retval != 0) {
532 unbind_from_irq(irq);
533 return retval;
534 }
535
536 return irq;
537}
538EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
539
f87e4cac
JF
540int bind_ipi_to_irqhandler(enum ipi_vector ipi,
541 unsigned int cpu,
542 irq_handler_t handler,
543 unsigned long irqflags,
544 const char *devname,
545 void *dev_id)
546{
547 int irq, retval;
548
549 irq = bind_ipi_to_irq(ipi, cpu);
550 if (irq < 0)
551 return irq;
552
4877c737 553 irqflags |= IRQF_NO_SUSPEND;
f87e4cac
JF
554 retval = request_irq(irq, handler, irqflags, devname, dev_id);
555 if (retval != 0) {
556 unbind_from_irq(irq);
557 return retval;
558 }
559
560 return irq;
561}
562
e46cdb66
JF
563void unbind_from_irqhandler(unsigned int irq, void *dev_id)
564{
565 free_irq(irq, dev_id);
566 unbind_from_irq(irq);
567}
568EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
569
f87e4cac
JF
570void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
571{
572 int irq = per_cpu(ipi_to_irq, cpu)[vector];
573 BUG_ON(irq < 0);
574 notify_remote_via_irq(irq);
575}
576
ee523ca1
JF
577irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
578{
579 struct shared_info *sh = HYPERVISOR_shared_info;
580 int cpu = smp_processor_id();
581 int i;
582 unsigned long flags;
583 static DEFINE_SPINLOCK(debug_lock);
584
585 spin_lock_irqsave(&debug_lock, flags);
586
587 printk("vcpu %d\n ", cpu);
588
589 for_each_online_cpu(i) {
590 struct vcpu_info *v = per_cpu(xen_vcpu, i);
591 printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
e849c3e9 592 (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
ee523ca1
JF
593 v->evtchn_upcall_pending,
594 v->evtchn_pending_sel);
595 }
596 printk("pending:\n ");
597 for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
598 printk("%08lx%s", sh->evtchn_pending[i],
599 i % 8 == 0 ? "\n " : " ");
600 printk("\nmasks:\n ");
601 for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
602 printk("%08lx%s", sh->evtchn_mask[i],
603 i % 8 == 0 ? "\n " : " ");
604
605 printk("\nunmasked:\n ");
606 for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
607 printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
608 i % 8 == 0 ? "\n " : " ");
609
610 printk("\npending list:\n");
611 for(i = 0; i < NR_EVENT_CHANNELS; i++) {
612 if (sync_test_bit(i, sh->evtchn_pending)) {
613 printk(" %d: event %d -> irq %d\n",
ced40d0f
JF
614 cpu_from_evtchn(i), i,
615 evtchn_to_irq[i]);
ee523ca1
JF
616 }
617 }
618
619 spin_unlock_irqrestore(&debug_lock, flags);
620
621 return IRQ_HANDLED;
622}
623
245b2e70
TH
624static DEFINE_PER_CPU(unsigned, xed_nesting_count);
625
e46cdb66
JF
626/*
627 * Search the CPUs pending events bitmasks. For each one found, map
628 * the event number to an irq, and feed it into do_IRQ() for
629 * handling.
630 *
631 * Xen uses a two-level bitmap to speed searching. The first level is
632 * a bitset of words which contain pending event bits. The second
633 * level is a bitset of pending events themselves.
634 */
38e20b07 635static void __xen_evtchn_do_upcall(void)
e46cdb66
JF
636{
637 int cpu = get_cpu();
638 struct shared_info *s = HYPERVISOR_shared_info;
639 struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
229664be 640 unsigned count;
e46cdb66 641
229664be
JF
642 do {
643 unsigned long pending_words;
e46cdb66 644
229664be 645 vcpu_info->evtchn_upcall_pending = 0;
e46cdb66 646
245b2e70 647 if (__get_cpu_var(xed_nesting_count)++)
229664be 648 goto out;
e46cdb66 649
e849c3e9
IY
650#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
651 /* Clear master flag /before/ clearing selector flag. */
6673cf63 652 wmb();
e849c3e9 653#endif
229664be
JF
654 pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
655 while (pending_words != 0) {
656 unsigned long pending_bits;
657 int word_idx = __ffs(pending_words);
658 pending_words &= ~(1UL << word_idx);
659
660 while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
661 int bit_idx = __ffs(pending_bits);
662 int port = (word_idx * BITS_PER_LONG) + bit_idx;
663 int irq = evtchn_to_irq[port];
ca4dbc66 664 struct irq_desc *desc;
229664be 665
ca4dbc66
EB
666 if (irq != -1) {
667 desc = irq_to_desc(irq);
668 if (desc)
669 generic_handle_irq_desc(irq, desc);
670 }
e46cdb66
JF
671 }
672 }
e46cdb66 673
229664be
JF
674 BUG_ON(!irqs_disabled());
675
245b2e70
TH
676 count = __get_cpu_var(xed_nesting_count);
677 __get_cpu_var(xed_nesting_count) = 0;
183d03cc 678 } while (count != 1 || vcpu_info->evtchn_upcall_pending);
229664be
JF
679
680out:
38e20b07
SY
681
682 put_cpu();
683}
684
685void xen_evtchn_do_upcall(struct pt_regs *regs)
686{
687 struct pt_regs *old_regs = set_irq_regs(regs);
688
689 exit_idle();
690 irq_enter();
691
692 __xen_evtchn_do_upcall();
693
3445a8fd
JF
694 irq_exit();
695 set_irq_regs(old_regs);
38e20b07 696}
3445a8fd 697
38e20b07
SY
698void xen_hvm_evtchn_do_upcall(void)
699{
700 __xen_evtchn_do_upcall();
e46cdb66 701}
183d03cc 702EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
e46cdb66 703
eb1e305f
JF
704/* Rebind a new event channel to an existing irq. */
705void rebind_evtchn_irq(int evtchn, int irq)
706{
d77bbd4d
JF
707 struct irq_info *info = info_for_irq(irq);
708
eb1e305f
JF
709 /* Make sure the irq is masked, since the new event channel
710 will also be masked. */
711 disable_irq(irq);
712
713 spin_lock(&irq_mapping_update_lock);
714
715 /* After resume the irq<->evtchn mappings are all cleared out */
716 BUG_ON(evtchn_to_irq[evtchn] != -1);
717 /* Expect irq to have been bound before,
d77bbd4d
JF
718 so there should be a proper type */
719 BUG_ON(info->type == IRQT_UNBOUND);
eb1e305f
JF
720
721 evtchn_to_irq[evtchn] = irq;
ced40d0f 722 irq_info[irq] = mk_evtchn_info(evtchn);
eb1e305f
JF
723
724 spin_unlock(&irq_mapping_update_lock);
725
726 /* new event channels are always bound to cpu 0 */
0de26520 727 irq_set_affinity(irq, cpumask_of(0));
eb1e305f
JF
728
729 /* Unmask the event channel. */
730 enable_irq(irq);
731}
732
e46cdb66 733/* Rebind an evtchn so that it gets delivered to a specific cpu */
d5dedd45 734static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
e46cdb66
JF
735{
736 struct evtchn_bind_vcpu bind_vcpu;
737 int evtchn = evtchn_from_irq(irq);
738
183d03cc
SS
739 /* events delivered via platform PCI interrupts are always
740 * routed to vcpu 0 */
741 if (!VALID_EVTCHN(evtchn) ||
742 (xen_hvm_domain() && !xen_have_vector_callback))
d5dedd45 743 return -1;
e46cdb66
JF
744
745 /* Send future instances of this interrupt to other vcpu. */
746 bind_vcpu.port = evtchn;
747 bind_vcpu.vcpu = tcpu;
748
749 /*
750 * If this fails, it usually just indicates that we're dealing with a
751 * virq or IPI channel, which don't actually need to be rebound. Ignore
752 * it, but don't do the xenlinux-level rebind in that case.
753 */
754 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
755 bind_evtchn_to_cpu(evtchn, tcpu);
e46cdb66 756
d5dedd45
YL
757 return 0;
758}
e46cdb66 759
d5dedd45 760static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
e46cdb66 761{
0de26520 762 unsigned tcpu = cpumask_first(dest);
d5dedd45
YL
763
764 return rebind_irq_to_cpu(irq, tcpu);
e46cdb66
JF
765}
766
642e0c88
IY
767int resend_irq_on_evtchn(unsigned int irq)
768{
769 int masked, evtchn = evtchn_from_irq(irq);
770 struct shared_info *s = HYPERVISOR_shared_info;
771
772 if (!VALID_EVTCHN(evtchn))
773 return 1;
774
775 masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
776 sync_set_bit(evtchn, s->evtchn_pending);
777 if (!masked)
778 unmask_evtchn(evtchn);
779
780 return 1;
781}
782
e46cdb66
JF
783static void enable_dynirq(unsigned int irq)
784{
785 int evtchn = evtchn_from_irq(irq);
786
787 if (VALID_EVTCHN(evtchn))
788 unmask_evtchn(evtchn);
789}
790
791static void disable_dynirq(unsigned int irq)
792{
793 int evtchn = evtchn_from_irq(irq);
794
795 if (VALID_EVTCHN(evtchn))
796 mask_evtchn(evtchn);
797}
798
799static void ack_dynirq(unsigned int irq)
800{
801 int evtchn = evtchn_from_irq(irq);
802
803 move_native_irq(irq);
804
805 if (VALID_EVTCHN(evtchn))
806 clear_evtchn(evtchn);
807}
808
809static int retrigger_dynirq(unsigned int irq)
810{
811 int evtchn = evtchn_from_irq(irq);
ee8fa1c6 812 struct shared_info *sh = HYPERVISOR_shared_info;
e46cdb66
JF
813 int ret = 0;
814
815 if (VALID_EVTCHN(evtchn)) {
ee8fa1c6
JF
816 int masked;
817
818 masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
819 sync_set_bit(evtchn, sh->evtchn_pending);
820 if (!masked)
821 unmask_evtchn(evtchn);
e46cdb66
JF
822 ret = 1;
823 }
824
825 return ret;
826}
827
0e91398f
JF
828static void restore_cpu_virqs(unsigned int cpu)
829{
830 struct evtchn_bind_virq bind_virq;
831 int virq, irq, evtchn;
832
833 for (virq = 0; virq < NR_VIRQS; virq++) {
834 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
835 continue;
836
ced40d0f 837 BUG_ON(virq_from_irq(irq) != virq);
0e91398f
JF
838
839 /* Get a new binding from Xen. */
840 bind_virq.virq = virq;
841 bind_virq.vcpu = cpu;
842 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
843 &bind_virq) != 0)
844 BUG();
845 evtchn = bind_virq.port;
846
847 /* Record the new mapping. */
848 evtchn_to_irq[evtchn] = irq;
ced40d0f 849 irq_info[irq] = mk_virq_info(evtchn, virq);
0e91398f
JF
850 bind_evtchn_to_cpu(evtchn, cpu);
851
852 /* Ready for use. */
853 unmask_evtchn(evtchn);
854 }
855}
856
857static void restore_cpu_ipis(unsigned int cpu)
858{
859 struct evtchn_bind_ipi bind_ipi;
860 int ipi, irq, evtchn;
861
862 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
863 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
864 continue;
865
ced40d0f 866 BUG_ON(ipi_from_irq(irq) != ipi);
0e91398f
JF
867
868 /* Get a new binding from Xen. */
869 bind_ipi.vcpu = cpu;
870 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
871 &bind_ipi) != 0)
872 BUG();
873 evtchn = bind_ipi.port;
874
875 /* Record the new mapping. */
876 evtchn_to_irq[evtchn] = irq;
ced40d0f 877 irq_info[irq] = mk_ipi_info(evtchn, ipi);
0e91398f
JF
878 bind_evtchn_to_cpu(evtchn, cpu);
879
880 /* Ready for use. */
881 unmask_evtchn(evtchn);
882
883 }
884}
885
2d9e1e2f
JF
886/* Clear an irq's pending state, in preparation for polling on it */
887void xen_clear_irq_pending(int irq)
888{
889 int evtchn = evtchn_from_irq(irq);
890
891 if (VALID_EVTCHN(evtchn))
892 clear_evtchn(evtchn);
893}
894
168d2f46
JF
895void xen_set_irq_pending(int irq)
896{
897 int evtchn = evtchn_from_irq(irq);
898
899 if (VALID_EVTCHN(evtchn))
900 set_evtchn(evtchn);
901}
902
903bool xen_test_irq_pending(int irq)
904{
905 int evtchn = evtchn_from_irq(irq);
906 bool ret = false;
907
908 if (VALID_EVTCHN(evtchn))
909 ret = test_evtchn(evtchn);
910
911 return ret;
912}
913
2d9e1e2f
JF
914/* Poll waiting for an irq to become pending. In the usual case, the
915 irq will be disabled so it won't deliver an interrupt. */
916void xen_poll_irq(int irq)
917{
918 evtchn_port_t evtchn = evtchn_from_irq(irq);
919
920 if (VALID_EVTCHN(evtchn)) {
921 struct sched_poll poll;
922
923 poll.nr_ports = 1;
924 poll.timeout = 0;
ff3c5362 925 set_xen_guest_handle(poll.ports, &evtchn);
2d9e1e2f
JF
926
927 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
928 BUG();
929 }
930}
931
0e91398f
JF
932void xen_irq_resume(void)
933{
934 unsigned int cpu, irq, evtchn;
935
936 init_evtchn_cpu_bindings();
937
938 /* New event-channel space is not 'live' yet. */
939 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
940 mask_evtchn(evtchn);
941
942 /* No IRQ <-> event-channel mappings. */
0b8f1efa 943 for (irq = 0; irq < nr_irqs; irq++)
0e91398f
JF
944 irq_info[irq].evtchn = 0; /* zap event-channel binding */
945
946 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
947 evtchn_to_irq[evtchn] = -1;
948
949 for_each_possible_cpu(cpu) {
950 restore_cpu_virqs(cpu);
951 restore_cpu_ipis(cpu);
952 }
953}
954
e46cdb66
JF
955static struct irq_chip xen_dynamic_chip __read_mostly = {
956 .name = "xen-dyn",
54a353a0
JF
957
958 .disable = disable_dynirq,
e46cdb66
JF
959 .mask = disable_dynirq,
960 .unmask = enable_dynirq,
54a353a0 961
e46cdb66
JF
962 .ack = ack_dynirq,
963 .set_affinity = set_affinity_irq,
964 .retrigger = retrigger_dynirq,
965};
966
aaca4964
JF
967static struct irq_chip xen_percpu_chip __read_mostly = {
968 .name = "xen-percpu",
969
970 .disable = disable_dynirq,
971 .mask = disable_dynirq,
972 .unmask = enable_dynirq,
973
974 .ack = ack_dynirq,
975};
976
38e20b07
SY
977int xen_set_callback_via(uint64_t via)
978{
979 struct xen_hvm_param a;
980 a.domid = DOMID_SELF;
981 a.index = HVM_PARAM_CALLBACK_IRQ;
982 a.value = via;
983 return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
984}
985EXPORT_SYMBOL_GPL(xen_set_callback_via);
986
ca65f9fc 987#ifdef CONFIG_XEN_PVHVM
38e20b07
SY
988/* Vector callbacks are better than PCI interrupts to receive event
989 * channel notifications because we can receive vector callbacks on any
990 * vcpu and we don't need PCI support or APIC interactions. */
991void xen_callback_vector(void)
992{
993 int rc;
994 uint64_t callback_via;
995 if (xen_have_vector_callback) {
996 callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
997 rc = xen_set_callback_via(callback_via);
998 if (rc) {
999 printk(KERN_ERR "Request for Xen HVM callback vector"
1000 " failed.\n");
1001 xen_have_vector_callback = 0;
1002 return;
1003 }
1004 printk(KERN_INFO "Xen HVM callback vector for event delivery is "
1005 "enabled\n");
1006 /* in the restore case the vector has already been allocated */
1007 if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
1008 alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
1009 }
1010}
ca65f9fc
SS
1011#else
1012void xen_callback_vector(void) {}
1013#endif
38e20b07 1014
e46cdb66
JF
1015void __init xen_init_IRQ(void)
1016{
1017 int i;
c7a3589e 1018
a70c352a
PE
1019 cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
1020 GFP_KERNEL);
28e08861 1021 BUG_ON(cpu_evtchn_mask_p == NULL);
e46cdb66
JF
1022
1023 init_evtchn_cpu_bindings();
1024
1025 /* No event channels are 'live' right now. */
1026 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1027 mask_evtchn(i);
1028
38e20b07
SY
1029 if (xen_hvm_domain()) {
1030 xen_callback_vector();
1031 native_init_IRQ();
1032 } else {
1033 irq_ctx_init(smp_processor_id());
1034 }
e46cdb66 1035}
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