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PR c++/7539
[deliverable/binutils-gdb.git] / gas / ChangeLog
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b83a9376
CM		 12013-11-11 Catherine Moore <clm@codesourcery.com>
2
3 * config/mips/tc-mips.c (convert_reg_type): Use
4 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
5 (reg_needs_delay): Likewise.
6 (insns_between): Likewise.
7
e2b5892e
JBG		 82013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
9
10 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
11
49eec193
YZ		 122013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
13
14 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
15 call aarch64_sys_reg_deprecated_p and warn about the deprecated
16 system registers.
17
68a64283
YZ		 182013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
19
20 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
21
8db49cc2
WN		 222013-11-05 Will Newton <will.newton@linaro.org>
23
24 PR gas/16103
25 * config/tc-aarch64.c (parse_operands): Avoid trying to
26 parse a vector register as an immediate.
27
e4630f71
JB		 282013-11-04 Jan Beulich <jbeulich@suse.com>
29
30 * config/tc-i386.c (check_long_reg): Correct comment indentation.
31 (check_qword_reg): Correct comment and its indentation.
32 (check_word_reg): Extend comment and correct its indentation. Also
33 check for 64-bit register.
34
6911b7dc
AM		 352013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
36
37 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
38 (ppc_elf_localentry): New function.
39 (ppc_force_relocation): Force relocs on all branches to localenty
40 symbols.
41 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
42
ee67d69a
AM		 432013-10-30 Alan Modra <amodra@gmail.com>
44
45 * config/tc-ppc.c: Include elf/ppc64.h.
46 (ppc_abiversion): New variable.
47 (md_pseudo_table): Add .abiversion.
48 (ppc_elf_abiversion, ppc_elf_end): New functions.
49 * config/tc-ppc.h (md_end): Define.
50
f9c6b907
AM		 512013-10-30 Alan Modra <amodra@gmail.com>
52
53 * config/tc-ppc.c (SEX16): Don't mask.
54 (REPORT_OVERFLOW_HI): Define as zero.
55 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
56 @tprel@high, and @tprel@higha modifiers.
57 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
58 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
59 Handle new relocs.
60 (md_apply_fix): Similarly.
61
9d5de888
CF		 622013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
63
64 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
65 (fpr_write_mask): Test MSA registers.
66 (can_swap_branch_p): Check fpr write followed by fpr read.
67
3fc1d038
NC		 682013-10-18 Nick Clifton <nickc@redhat.com>
69
70 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
71
56d438b1
CF		 722013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
73 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
74
75 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
76 (md_longopts): Add mmsa and mno-msa.
77 (mips_ases): Add msa.
78 (RTYPE_MASK): Update.
79 (RTYPE_MSA): New define.
80 (OT_REG_ELEMENT): Replace with...
81 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
82 (mips_operand_token): Replace reg_element with index.
83 (mips_parse_argument_token): Treat vector indices as separate tokens.
84 Handle register indices.
85 (md_begin): Add MSA register names.
86 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
87 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
88 (match_mdmx_imm_reg_operand): Update accordingly.
89 (match_imm_index_operand): New function.
90 (match_reg_index_operand): New function.
91 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
92 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
93 (md_show_usage): Print -mmsa and -mno-msa.
94 * doc/as.texinfo: Document -mmsa and -mno-msa.
95 * doc/c-mips.texi: Document -mmsa and -mno-msa.
96 Document .set msa and .set nomsa.
97
b2e951ec
NC		 982013-10-14 Nick Clifton <nickc@redhat.com>
99
100 * read.c (add_include_dir): Use xrealloc.
101 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
102 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
103
ae335a4e
SL		 1042013-10-13 Sandra Loosemore <sandra@codesourcery.com>
105
106 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
107 also test/refer to "sstatus". Reformat the warning message.
108
0e1c2434
SK		 1092013-10-10 Sean Keys <skeys@ipdatasys.com>
110
111 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
112
47cd3fa7
JB		 1132013-10-10 Jan Beulich <jbeulich@suse.com>
114
115 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
116 swapping for bndmk, bndldx, and bndstx.
117
6085f853
NC		 1182013-10-09 Nick Clifton <nickc@redhat.com>
119
b7b2bb1d
NC		 120 PR gas/16025
121 * config/tc-epiphany.c (md_convert_frag): Add missing break
122 statement.
123
6085f853
NC		 124 PR gas/16026
125 * config/tc-mn10200.c (md_convert_frag): Add missing break
126 statement.
127
cecf1424
JB		 1282013-10-08 Jan Beulich <jbeulich@suse.com>
129
130 * tc-i386.c (check_word_reg): Remove misplaced "else".
131 (check_long_reg): Restore symmetry with check_word_reg.
132
d3bfe16e
JB		 1332013-10-08 Jan Beulich <jbeulich@suse.com>
134
135 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
136 LR/PC check.
137
38d77545
NC		 1382013-10-08 Nick Clifton <nickc@redhat.com>
139
140 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
141 for "<foo>a". Issue error messages for unrecognised or corrrupt
142 size extensions.
143
fe8b4cc3
KT		 1442013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
145
146 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
147 possible.
148
c7b0bd56
SE		 1492013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
150
151 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
152 * doc/c-i386.texi: Add -march=bdver4 option.
153
cc9afea3
AM		 1542013-09-20 Alan Modra <amodra@gmail.com>
155
156 * configure: Regenerate.
157
58ca03a2
TG		 1582013-09-18 Tristan Gingold <gingold@adacore.com>
159
160 * NEWS: Add marker for 2.24.
161
ab905915
NC		 1622013-09-18 Nick Clifton <nickc@redhat.com>
163
164 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
165 (move_data): New variable.
166 (md_parse_option): Parse -md.
167 (msp430_section): New function. Catch references to the .bss or
168 .data sections and generate a special symbol for use by the libcrt
169 library.
170 (md_pseudo_table): Intercept .section directives.
171 (md_longopt): Add -md
172 (md_show_usage): Likewise.
173 (msp430_operands): Generate a warning message if a NOP is inserted
174 into the instruction stream.
175 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
176
f1c38003
SE		 1772013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
178
179 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 180 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 181
1d50d57c
WN		 1822013-09-16 Will Newton <will.newton@linaro.org>
183
184 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
185 disallowing element size 64 with interleave other than 1.
186
173d3447
CF		 1872013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
188
189 * config/tc-mips.c (match_insn): Set error when $31 is used for
190 bltzal* and bgezal*.
191
ac21e7da
TG		 1922013-09-04 Tristan Gingold <gingold@adacore.com>
193
194 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
195 symbols.
196
74db7efb
NC		 1972013-09-04 Roland McGrath <mcgrathr@google.com>
198
199 PR gas/15914
200 * config/tc-arm.c (T16_32_TAB): Add _udf.
201 (do_t_udf): New function.
202 (insns): Add "udf".
203
664a88c6
DD		 2042013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
205
206 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
207 assembler errors at correct position.
208
9aff4b7a
NC		 2092013-08-23 Yuri Chornoivan <yurchor@ukr.net>
210
211 PR binutils/15834
212 * config/tc-ia64.c: Fix typos.
213 * config/tc-sparc.c: Likewise.
214 * config/tc-z80.c: Likewise.
215 * doc/c-i386.texi: Likewise.
216 * doc/c-m32r.texi: Likewise.
217
4f2374c7
WN		 2182013-08-23 Will Newton <will.newton@linaro.org>
219
9aff4b7a 220 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 221 for pre-indexed addressing modes.
222
b4e6cb80
AM		 2232013-08-21 Alan Modra <amodra@gmail.com>
224
225 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
226 range check label number for use with fb_low_counter array.
227
1661c76c
RS		 2282013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
229
230 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
231 (mips_parse_argument_token, validate_micromips_insn, md_begin)
232 (check_regno, match_float_constant, check_completed_insn, append_insn)
233 (match_insn, match_mips16_insn, match_insns, macro_start)
234 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
235 (mips16_ip, mips_set_option_string, md_parse_option)
236 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
237 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
238 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
239 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
240 Start error messages with a lower-case letter. Do not end error
241 messages with a period. Wrap long messages to 80 character-lines.
242 Use "cannot" instead of "can't" and "can not".
243
b0e6f033
RS		 2442013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (imm_expr): Expand comment.
247 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
248 when populated.
249
e423441d
RS		 2502013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
251
252 * config/tc-mips.c (imm2_expr): Delete.
253 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
254
5e0dc5ba
RS		 2552013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
256
257 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
258 (macro): Remove M_DEXT and M_DINS handling.
259
60f20e8b
RS		 2602013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
261
262 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
263 lax_max with lax_match.
264 (match_int_operand): Update accordingly. Don't report an error
265 for !lax_match-only cases.
266 (match_insn): Replace more_alts with lax_match and use it to
267 initialize the mips_arg_info field. Add a complete_p parameter.
268 Handle implicit VU0 suffixes here.
269 (match_invalid_for_isa, match_insns, match_mips16_insns): New
270 functions.
271 (mips_ip, mips16_ip): Use them.
272
d436c1c2
RS		 2732013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (match_expression): Report uses of registers here.
276 Add a "must be an immediate expression" error. Handle elided offsets
277 here rather than...
278 (match_int_operand): ...here.
279
1a00e612
RS		 2802013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
281
282 * config/tc-mips.c (mips_arg_info): Remove soft_match.
283 (match_out_of_range, match_not_constant): New functions.
284 (match_const_int): Remove fallback parameter and check for soft_match.
285 Use match_not_constant.
286 (match_mapped_int_operand, match_addiusp_operand)
287 (match_perf_reg_operand, match_save_restore_list_operand)
288 (match_mdmx_imm_reg_operand): Update accordingly. Use
289 match_out_of_range and set_insn_error* instead of as_bad.
290 (match_int_operand): Likewise. Use match_not_constant in the
291 !allows_nonconst case.
292 (match_float_constant): Report invalid float constants.
293 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
294 match_float_constant to check for invalid constants. Fail the
295 match if match_const_int or match_float_constant return false.
296 (mips_ip): Update accordingly.
297 (mips16_ip): Likewise. Undo null termination of instruction name
298 once lookup is complete.
299
e3de51ce
RS		 3002013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
301
302 * config/tc-mips.c (mips_insn_error_format): New enum.
303 (mips_insn_error): New struct.
304 (insn_error): Change to a mips_insn_error.
305 (clear_insn_error, set_insn_error_format, set_insn_error)
306 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
307 functions.
308 (mips_parse_argument_token, md_assemble, match_insn)
309 (match_mips16_insn): Use them instead of manipulating insn_error
310 directly.
311 (mips_ip, mips16_ip): Likewise. Simplify control flow.
312
97d87491
RS		 3132013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (normalize_constant_expr): Move further up file.
316 (normalize_address_expr): Likewise.
317 (match_insn, match_mips16_insn): New functions, split out from...
318 (mips_ip, mips16_ip): ...here.
319
0f35dbc4
RS		 3202013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
321
322 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
323 OP_OPTIONAL_REG.
324 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
325 for optional operands.
326
27285eed
AM		 3272013-08-16 Alan Modra <amodra@gmail.com>
328
329 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
330 modifiers generally.
331
cbe02d4f
AM		 3322013-08-16 Alan Modra <amodra@gmail.com>
333
334 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
335
3c02c47f
DE		 3362013-08-14 David Edelsohn <dje.gcc@gmail.com>
337
338 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
339 argument as alignment.
340
4046d87a
NC		 3412013-08-09 Nick Clifton <nickc@redhat.com>
342
343 * config/tc-rl78.c (elf_flags): New variable.
344 (enum options): Add OPTION_G10.
345 (md_longopts): Add mg10.
346 (md_parse_option): Parse -mg10.
347 (rl78_elf_final_processing): New function.
348 * config/tc-rl78.c (tc_final_processing): Define.
349 * doc/c-rl78.texi: Document -mg10 option.
350
ee5734f0
RS		 3512013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
352
353 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
354 suffixes to be elided too.
355 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
356 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
357 to be omitted too.
358
13896403
RS		 3592013-08-05 John Tytgat <john@bass-software.com>
360
361 * po/POTFILES.in: Regenerate.
362
d6787ef9
EB		 3632013-08-05 Eric Botcazou <ebotcazou@adacore.com>
364 Konrad Eisele <konrad@gaisler.com>
365
366 * config/tc-sparc.c (sparc_arch_types): Add leon.
367 (sparc_arch): Move sparc4 around and add leon.
368 (sparc_target_format): Document -Aleon.
369 * doc/c-sparc.texi: Likewise.
370
da8bca91
RS		 3712013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
372
373 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
374
14daeee3
RS		 3752013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
376 Richard Sandiford <rdsandiford@googlemail.com>
377
378 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
379 (RWARN): Bump to 0x8000000.
380 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
381 (RTYPE_R5900_ACC): New register types.
382 (RTYPE_MASK): Include them.
383 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
384 macros.
385 (reg_names): Include them.
386 (mips_parse_register_1): New function, split out from...
387 (mips_parse_register): ...here. Add a channels_ptr parameter.
388 Look for VU0 channel suffixes when nonnull.
389 (reg_lookup): Update the call to mips_parse_register.
390 (mips_parse_vu0_channels): New function.
391 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
392 (mips_operand_token): Add a "channels" field to the union.
393 Extend the comment above "ch" to OT_DOUBLE_CHAR.
394 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
395 (mips_parse_argument_token): Handle channel suffixes here too.
396 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
397 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
398 Handle '#' formats.
399 (md_begin): Register $vfN and $vfI registers.
400 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
401 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
402 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
403 (match_vu0_suffix_operand): New function.
404 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
405 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
406 (mips_lookup_insn): New function.
407 (mips_ip): Use it. Allow "+K" operands to be elided at the end
408 of an instruction. Handle '#' sequences.
409
c0ebe874
RS		 4102013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
411
412 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
413 values and use it instead of sreg, treg, xreg, etc.
414
3ccad066
RS		 4152013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
416
417 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
418 and mips_int_operand_max.
419 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
420 Delete.
421 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
422 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
423 instead of mips16_immed_operand.
424
0acfaea6
RS		 4252013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
426
427 * config/tc-mips.c (mips16_macro): Don't use move_register.
428 (mips16_ip): Allow macros to use 'p'.
429
fc76e730
RS		 4302013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
431
432 * config/tc-mips.c (MAX_OPERANDS): New macro.
433 (mips_operand_array): New structure.
434 (mips_operands, mips16_operands, micromips_operands): New arrays.
435 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
436 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
437 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
438 (micromips_to_32_reg_q_map): Delete.
439 (insn_operands, insn_opno, insn_extract_operand): New functions.
440 (validate_mips_insn): Take a mips_operand_array as argument and
441 use it to build up a list of operands. Extend to handle INSN_MACRO
442 and MIPS16.
443 (validate_mips16_insn): New function.
444 (validate_micromips_insn): Take a mips_operand_array as argument.
445 Handle INSN_MACRO.
446 (md_begin): Initialize mips_operands, mips16_operands and
447 micromips_operands. Call validate_mips_insn and
448 validate_micromips_insn for macro instructions too.
449 Call validate_mips16_insn for MIPS16 instructions.
450 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
451 New functions.
452 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
453 them. Handle INSN_UDI.
454 (get_append_method): Use gpr_read_mask.
455
26545944
RS		 4562013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
457
458 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
459 flags for MIPS16 and non-MIPS16 instructions.
460 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
461 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
462 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
463 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
464 and non-MIPS16 instructions. Fix formatting.
465
85fcb30f
RS		 4662013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
467
468 * config/tc-mips.c (reg_needs_delay): Move later in file.
469 Use gpr_write_mask.
470 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
471
43234a1e
L		 4722013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
473 Alexander Ivchenko <alexander.ivchenko@intel.com>
474 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
475 Sergey Lega <sergey.s.lega@intel.com>
476 Anna Tikhonova <anna.tikhonova@intel.com>
477 Ilya Tocar <ilya.tocar@intel.com>
478 Andrey Turetskiy <andrey.turetskiy@intel.com>
479 Ilya Verbin <ilya.verbin@intel.com>
480 Kirill Yukhin <kirill.yukhin@intel.com>
481 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
482
483 * config/tc-i386-intel.c (O_zmmword_ptr): New.
484 (i386_types): Add zmmword.
485 (i386_intel_simplify_register): Allow regzmm.
486 (i386_intel_simplify): Handle zmmwords.
487 (i386_intel_operand): Handle RC/SAE, vector operations and
488 zmmwords.
489 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
490 (struct RC_Operation): New.
491 (struct Mask_Operation): New.
492 (struct Broadcast_Operation): New.
493 (vex_prefix): Size of bytes increased to 4 to support EVEX
494 encoding.
495 (enum i386_error): Add new error codes: unsupported_broadcast,
496 broadcast_not_on_src_operand, broadcast_needed,
497 unsupported_masking, mask_not_on_destination, no_default_mask,
498 unsupported_rc_sae, rc_sae_operand_not_last_imm,
499 invalid_register_operand, try_vector_disp8.
500 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
501 rounding, broadcast, memshift.
502 (struct RC_name): New.
503 (RC_NamesTable): New.
504 (evexlig): New.
505 (evexwig): New.
506 (extra_symbol_chars): Add '{'.
507 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
508 (i386_operand_type): Add regzmm, regmask and vec_disp8.
509 (match_mem_size): Handle zmmwords.
510 (operand_type_match): Handle zmm-registers.
511 (mode_from_disp_size): Handle vec_disp8.
512 (fits_in_vec_disp8): New.
513 (md_begin): Handle {} properly.
514 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
515 (build_vex_prefix): Handle vrex.
516 (build_evex_prefix): New.
517 (process_immext): Adjust to properly handle EVEX.
518 (md_assemble): Add EVEX encoding support.
519 (swap_2_operands): Correctly handle operands with masking,
520 broadcasting or RC/SAE.
521 (check_VecOperands): Support EVEX features.
522 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
523 (match_template): Support regzmm and handle new error codes.
524 (process_suffix): Handle zmmwords and zmm-registers.
525 (check_byte_reg): Extend to zmm-registers.
526 (process_operands): Extend to zmm-registers.
527 (build_modrm_byte): Handle EVEX.
528 (output_insn): Adjust to properly handle EVEX case.
529 (disp_size): Handle vec_disp8.
530 (output_disp): Support compressed disp8*N evex feature.
531 (output_imm): Handle RC/SAE immediates properly.
532 (check_VecOperations): New.
533 (i386_immediate): Handle EVEX features.
534 (i386_index_check): Handle zmmwords and zmm-registers.
535 (RC_SAE_immediate): New.
536 (i386_att_operand): Handle EVEX features.
537 (parse_real_register): Add a check for ZMM/Mask registers.
538 (OPTION_MEVEXLIG): New.
539 (OPTION_MEVEXWIG): New.
540 (md_longopts): Add mevexlig and mevexwig.
541 (md_parse_option): Handle mevexlig and mevexwig options.
542 (md_show_usage): Add description for mevexlig and mevexwig.
543 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
544 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
545
a0046408
L		 5462013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
547
548 * config/tc-i386.c (cpu_arch): Add .sha.
549 * doc/c-i386.texi: Document sha/.sha.
550
7e8b059b
L		 5512013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
552 Kirill Yukhin <kirill.yukhin@intel.com>
553 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
554
555 * config/tc-i386.c (BND_PREFIX): New.
556 (struct _i386_insn): Add new field bnd_prefix.
557 (add_bnd_prefix): New.
558 (cpu_arch): Add MPX.
559 (i386_operand_type): Add regbnd.
560 (md_assemble): Handle BND prefixes.
561 (parse_insn): Likewise.
562 (output_branch): Likewise.
563 (output_jump): Likewise.
564 (build_modrm_byte): Handle regbnd.
565 (OPTION_MADD_BND_PREFIX): New.
566 (md_longopts): Add entry for 'madd-bnd-prefix'.
567 (md_parse_option): Handle madd-bnd-prefix option.
568 (md_show_usage): Add description for madd-bnd-prefix
569 option.
570 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
571
7fa9fcb6
TG		 5722013-07-24 Tristan Gingold <gingold@adacore.com>
573
574 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
575 xcoff targets.
576
614eb277
AK		 5772013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
578
579 * config/tc-s390.c (s390_machine): Don't force the .machine
580 argument to lower case.
581
e673710a
KT		 5822013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
583
584 * config/tc-arm.c (s_arm_arch_extension): Improve error message
585 for invalid extension.
586
69091a2c
YZ		 5872013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
588
589 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
590 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
591 (aarch64_abi): New variable.
592 (ilp32_p): Change to be a macro.
593 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
594 (struct aarch64_option_abi_value_table): New struct.
595 (aarch64_abis): New table.
596 (aarch64_parse_abi): New function.
597 (aarch64_long_opts): Add entry for -mabi=.
598 * doc/as.texinfo (Target AArch64 options): Document -mabi.
599 * doc/c-aarch64.texi: Likewise.
600
faf786e6
NC		 6012013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
602
603 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
604 unsigned comparison.
605
f0c00282
NC		 6062013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
607
cbe02d4f 608 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 609 RX610.
cbe02d4f 610 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 611 check floating point operation support for target RX100 and
612 RX200.
cbe02d4f
AM		 613 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
614 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
615 RX200, RX600, and RX610
f0c00282 616
8c997c27
NC		 6172013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
618
619 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
620
8be59acb
NC		 6212013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
622
623 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
624 * doc/c-avr.texi: Likewise.
625
4a06e5a2
RS		 6262013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
627
628 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
629 error with older GCCs.
630 (mips16_macro_build): Dereference args.
631
a92713e6
RS		 6322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
633
634 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
635 New functions, split out from...
636 (reg_lookup): ...here. Remove itbl support.
637 (reglist_lookup): Delete.
638 (mips_operand_token_type): New enum.
639 (mips_operand_token): New structure.
640 (mips_operand_tokens): New variable.
641 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
642 (mips_parse_arguments): New functions.
643 (md_begin): Initialize mips_operand_tokens.
644 (mips_arg_info): Add a token field. Remove optional_reg field.
645 (match_char, match_expression): New functions.
646 (match_const_int): Use match_expression. Remove "s" argument
647 and return a boolean result. Remove O_register handling.
648 (match_regno, match_reg, match_reg_range): New functions.
649 (match_int_operand, match_mapped_int_operand, match_msb_operand)
650 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
651 (match_addiusp_operand, match_clo_clz_dest_operand)
652 (match_lwm_swm_list_operand, match_entry_exit_operand)
653 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
654 (match_tied_reg_operand): Remove "s" argument and return a boolean
655 result. Match tokens rather than text. Update calls to
656 match_const_int. Rely on match_regno to call check_regno.
657 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
658 "arg" argument. Return a boolean result.
659 (parse_float_constant): Replace with...
660 (match_float_constant): ...this new function.
661 (match_operand): Remove "s" argument and return a boolean result.
662 Update calls to subfunctions.
663 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
664 rather than string-parsing routines. Update handling of optional
665 registers for token scheme.
666
89565f1b
RS		 6672013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
668
669 * config/tc-mips.c (parse_float_constant): Split out from...
670 (mips_ip): ...here.
671
3c14a432
RS		 6722013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
673
674 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
675 Delete.
676
364215c8
RS		 6772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
678
679 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
680 (match_entry_exit_operand): New function.
681 (match_save_restore_list_operand): Likewise.
682 (match_operand): Use them.
683 (check_absolute_expr): Delete.
684 (mips16_ip): Rewrite main parsing loop to use mips_operands.
685
9e12b7a2
RS		 6862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
687
688 * config/tc-mips.c: Enable functions commented out in previous patch.
689 (SKIP_SPACE_TABS): Move further up file.
690 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
691 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
692 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
693 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
694 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
695 (micromips_imm_b_map, micromips_imm_c_map): Delete.
696 (mips_lookup_reg_pair): Delete.
697 (macro): Use report_bad_range and report_bad_field.
698 (mips_immed, expr_const_in_range): Delete.
699 (mips_ip): Rewrite main parsing loop to use new functions.
700
a1d78564
RS		 7012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
702
703 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
704 Change return type to bfd_boolean.
705 (report_bad_range, report_bad_field): New functions.
706 (mips_arg_info): New structure.
707 (match_const_int, convert_reg_type, check_regno, match_int_operand)
708 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
709 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
710 (match_addiusp_operand, match_clo_clz_dest_operand)
711 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
712 (match_pc_operand, match_tied_reg_operand, match_operand)
713 (check_completed_insn): New functions, commented out for now.
714
e077a1c8
RS		 7152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
716
717 * config/tc-mips.c (insn_insert_operand): New function.
718 (macro_build, mips16_macro_build): Put null character check
719 in the for loop and convert continues to breaks. Use operand
720 structures to handle constant operands.
721
ab902481
RS		 7222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
723
724 * config/tc-mips.c (validate_mips_insn): Move further up file.
725 Add insn_bits and decode_operand arguments. Use the mips_operand
726 fields to work out which bits an operand occupies. Detect double
727 definitions.
728 (validate_micromips_insn): Move further up file. Call into
729 validate_mips_insn.
730
2f8b73cc
RS		 7312013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
732
733 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
734
c8276761
RS		 7352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
736
737 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
738 and "~".
739 (macro): Update accordingly.
740
77bd4346
RS		 7412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
742
743 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
744 (imm_reloc): Delete.
745 (md_assemble): Remove imm_reloc handling.
746 (mips_ip): Update commentary. Use offset_expr and offset_reloc
747 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
748 Use a temporary array rather than imm_reloc when parsing
749 constant expressions. Remove imm_reloc initialization.
750 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
751 for the relaxable field. Use a relax_char variable to track the
752 type of this field. Remove imm_reloc initialization.
753
cc537e56
RS		 7542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
755
756 * config/tc-mips.c (mips16_ip): Handle "I".
757
ba92f887
MR		 7582013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
759
760 * config/tc-mips.c (mips_flag_nan2008): New variable.
761 (options): Add OPTION_NAN enum value.
762 (md_longopts): Handle it.
763 (md_parse_option): Likewise.
764 (s_nan): New function.
765 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
766 (md_show_usage): Add -mnan.
767
768 * doc/as.texinfo (Overview): Add -mnan.
769 * doc/c-mips.texi (MIPS Opts): Document -mnan.
770 (MIPS NaN Encodings): New node. Document .nan directive.
771 (MIPS-Dependent): List the new node.
772
c1094734
TG		 7732013-07-09 Tristan Gingold <gingold@adacore.com>
774
775 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
776
0cbbe1b8
RS		 7772013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
778
779 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
780 for 'A' and assume that the constant has been elided if the result
781 is an O_register.
782
f2ae14a1
RS		 7832013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
784
785 * config/tc-mips.c (gprel16_reloc_p): New function.
786 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
787 BFD_RELOC_UNUSED.
788 (offset_high_part, small_offset_p): New functions.
789 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
790 register load and store macros, handle the 16-bit offset case first.
791 If a 16-bit offset is not suitable for the instruction we're
792 generating, load it into the temporary register using
793 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
794 M_L_DAB code once the address has been constructed. For double load
795 and store macros, again handle the 16-bit offset case first.
796 If the second register cannot be accessed from the same high
797 part as the first, load it into AT using ADDRESS_ADDI_INSN.
798 Fix the handling of LD in cases where the first register is the
799 same as the base. Also handle the case where the offset is
800 not 16 bits and the second register cannot be accessed from the
801 same high part as the first. For unaligned loads and stores,
802 fuse the offbits == 12 and old "ab" handling. Apply this handling
803 whenever the second offset needs a different high part from the first.
804 Construct the offset using ADDRESS_ADDI_INSN where possible,
805 for offbits == 16 as well as offbits == 12. Use offset_reloc
806 when constructing the individual loads and stores.
807 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
808 and offset_reloc before matching against a particular opcode.
809 Handle elided 'A' constants. Allow 'A' constants to use
810 relocation operators.
811
5c324c16
RS		 8122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
813
814 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
815 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
816 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
817
23e69e47
RS		 8182013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
819
820 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
821 Require the msb to be <= 31 for "+s". Check that the size is <= 31
822 for both "+s" and "+S".
823
27c5c572
RS		 8242013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
825
826 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
827 (mips_ip, mips16_ip): Handle "+i".
828
e76ff5ab
RS		 8292013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
830
831 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
832 (micromips_to_32_reg_h_map): Rename to...
833 (micromips_to_32_reg_h_map1): ...this.
834 (micromips_to_32_reg_i_map): Rename to...
835 (micromips_to_32_reg_h_map2): ...this.
836 (mips_lookup_reg_pair): New function.
837 (gpr_write_mask, macro): Adjust after above renaming.
838 (validate_micromips_insn): Remove "mi" handling.
839 (mips_ip): Likewise. Parse both registers in a pair for "mh".
840
fa7616a4
RS		 8412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
842
843 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
844 (mips_ip): Remove "+D" and "+T" handling.
845
fb798c50
AK		 8462013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
847
848 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
849 relocs.
850
2c0a3565
MS		 8512013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
852
4aa2c5e2
MS		 853 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
854
8552013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
856
2c0a3565
MS		 857 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
858 (aarch64_force_relocation): Likewise.
859
f40da81b
AM		 8602013-07-02 Alan Modra <amodra@gmail.com>
861
862 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
863
81566a9b
MR		 8642013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
865
866 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
867 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
868 Replace @sc{mips16} with literal `MIPS16'.
869 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
870
a6bb11b2
YZ		 8712013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
872
873 * config/tc-aarch64.c (reloc_table): Replace
874 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
875 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
876 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
877 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
878 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
879 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
880 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
881 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
882 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
883 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
884 (aarch64_force_relocation): Likewise.
885
cec5225b
YZ		 8862013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
887
888 * config/tc-aarch64.c (ilp32_p): New static variable.
889 (elf64_aarch64_target_format): Return the target according to the
890 value of 'ilp32_p'.
891 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
892 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
893 (aarch64_dwarf2_addr_size): New function.
894 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
895 (DWARF2_ADDR_SIZE): New define.
896
e335d9cb
RS		 8972013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
898
899 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
900
18870af7
RS		 9012013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
902
903 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
904
833794fc
MR		 9052013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
906
907 * config/tc-mips.c (mips_set_options): Add insn32 member.
908 (mips_opts): Initialize it.
909 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
910 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
911 (md_longopts): Add "minsn32" and "mno-insn32" options.
912 (is_size_valid): Handle insn32 mode.
913 (md_assemble): Pass instruction string down to macro.
914 (brk_fmt): Add second dimension and insn32 mode initializers.
915 (mfhl_fmt): Likewise.
916 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
917 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
918 (macro_build_jalr, move_register): Handle insn32 mode.
919 (macro_build_branch_rs): Likewise.
920 (macro): Handle insn32 mode.
921 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
922 (mips_ip): Handle insn32 mode.
923 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
924 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
925 (mips_handle_align): Handle insn32 mode.
926 (md_show_usage): Add -minsn32 and -mno-insn32.
927
928 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
929 -mno-insn32 options.
930 (-minsn32, -mno-insn32): New options.
931 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
932 options.
933 (MIPS assembly options): New node. Document .set insn32 and
934 .set noinsn32.
935 (MIPS-Dependent): List the new node.
936
d1706f38
NC		 9372013-06-25 Nick Clifton <nickc@redhat.com>
938
939 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
940 the PC in indirect addressing on 430xv2 parts.
941 (msp430_operands): Add version test to hardware bug encoding
942 restrictions.
943
477330fc
RM		 9442013-06-24 Roland McGrath <mcgrathr@google.com>
945
d996d970
RM		 946 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
947 so it skips whitespace before it.
948 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
949
477330fc
RM		 950 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
951 (arm_reg_parse_multi): Skip whitespace first.
952 (parse_reg_list): Likewise.
953 (parse_vfp_reg_list): Likewise.
954 (s_arm_unwind_save_mmxwcg): Likewise.
955
24382199
NC		 9562013-06-24 Nick Clifton <nickc@redhat.com>
957
958 PR gas/15623
959 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
960
c3678916
RS		 9612013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
962
963 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
964
42429eac
RS		 9652013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
966
967 * config/tc-mips.c: Assert that offsetT and valueT are at least
968 8 bytes in size.
969 (GPR_SMIN, GPR_SMAX): New macros.
970 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
971
f3ded42a
RS		 9722013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
973
974 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
975 conditions. Remove any code deselected by them.
976 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
977
e8044f35
RS		 9782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
979
980 * NEWS: Note removal of ECOFF support.
981 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
982 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
983 (MULTI_CFILES): Remove config/e-mipsecoff.c.
984 * Makefile.in: Regenerate.
985 * configure.in: Remove MIPS ECOFF references.
986 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
987 Delete cases.
988 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
989 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
990 (mips-*-*): ...this single case.
991 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
992 MIPS emulations to be e-mipself*.
993 * configure: Regenerate.
994 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
995 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
996 (mips-*-sysv*): Remove coff and ecoff cases.
997 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
998 * ecoff.c: Remove reference to MIPS ECOFF.
999 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1000 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1001 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1002 (mips_hi_fixup): Tweak comment.
1003 (append_insn): Require a howto.
1004 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1005
98508b2a
RS		 10062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1007
1008 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1009 Use "CPU" instead of "cpu".
1010 * doc/c-mips.texi: Likewise.
1011 (MIPS Opts): Rename to MIPS Options.
1012 (MIPS option stack): Rename to MIPS Option Stack.
1013 (MIPS ASE instruction generation overrides): Rename to
1014 MIPS ASE Instruction Generation Overrides (for now).
1015 (MIPS floating-point): Rename to MIPS Floating-Point.
1016
fc16f8cc
RS		 10172013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1018
1019 * doc/c-mips.texi (MIPS Macros): New section.
1020 (MIPS Object): Replace with...
1021 (MIPS Small Data): ...this new section.
1022
5a7560b5
RS		 10232013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1024
1025 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1026 Capitalize name. Use @kindex instead of @cindex for .set entries.
1027
a1b86ab7
RS		 10282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1029
1030 * doc/c-mips.texi (MIPS Stabs): Remove section.
1031
c6278170
RS		 10322013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1033
1034 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1035 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1036 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1037 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1038 (mips_ase): New structure.
1039 (mips_ases): New table.
1040 (FP64_ASES): New macro.
1041 (mips_ase_groups): New array.
1042 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1043 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1044 functions.
1045 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1046 (md_parse_option): Use mips_ases and mips_set_ase instead of
1047 separate case statements for each ASE option.
1048 (mips_after_parse_args): Use FP64_ASES. Use
1049 mips_check_isa_supports_ases to check the ASEs against
1050 other options.
1051 (s_mipsset): Use mips_ases and mips_set_ase instead of
1052 separate if statements for each ASE option. Use
1053 mips_check_isa_supports_ases, even when a non-ASE option
1054 is specified.
1055
63a4bc21
KT		 10562013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1057
1058 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1059
c31f3936
RS		 10602013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1061
1062 * config/tc-mips.c (md_shortopts, options, md_longopts)
1063 (md_longopts_size): Move earlier in file.
1064
846ef2d0
RS		 10652013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1066
1067 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1068 with a single "ase" bitmask.
1069 (mips_opts): Update accordingly.
1070 (file_ase, file_ase_explicit): New variables.
1071 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1072 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1073 (ISA_HAS_ROR): Adjust for mips_set_options change.
1074 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1075 (mips_ip): Adjust for mips_set_options change.
1076 (md_parse_option): Likewise. Update file_ase_explicit.
1077 (mips_after_parse_args): Adjust for mips_set_options change.
1078 Use bitmask operations to select the default ASEs. Set file_ase
1079 rather than individual per-ASE variables.
1080 (s_mipsset): Adjust for mips_set_options change.
1081 (mips_elf_final_processing): Test file_ase rather than
1082 file_ase_mdmx. Remove commented-out code.
1083
d16afab6
RS		 10842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1085
1086 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1087 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1088 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1089 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1090 (mips_after_parse_args): Use the new "ase" field to choose
1091 the default ASEs.
1092 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1093 "ase" field.
1094
e83a675f
RE		 10952013-06-18 Richard Earnshaw <rearnsha@arm.com>
1096
1097 * config/tc-arm.c (symbol_preemptible): New function.
1098 (relax_branch): Use it.
1099
7f3c4072
CM		 11002013-06-17 Catherine Moore <clm@codesourcery.com>
1101 Maciej W. Rozycki <macro@codesourcery.com>
1102 Chao-Ying Fu <fu@mips.com>
1103
1104 * config/tc-mips.c (mips_set_options): Add ase_eva.
1105 (mips_set_options mips_opts): Add ase_eva.
1106 (file_ase_eva): Declare.
1107 (ISA_SUPPORTS_EVA_ASE): Define.
1108 (IS_SEXT_9BIT_NUM): Define.
1109 (MIPS_CPU_ASE_EVA): Define.
1110 (is_opcode_valid): Add support for ase_eva.
1111 (macro_build): Likewise.
1112 (macro): Likewise.
1113 (validate_mips_insn): Likewise.
1114 (validate_micromips_insn): Likewise.
1115 (mips_ip): Likewise.
1116 (options): Add OPTION_EVA and OPTION_NO_EVA.
1117 (md_longopts): Add -meva and -mno-eva.
1118 (md_parse_option): Process new options.
1119 (mips_after_parse_args): Check for valid EVA combinations.
1120 (s_mipsset): Likewise.
1121
e410add4
RS		 11222013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1123
1124 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1125 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1126 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1127 (dwarf2_gen_line_info_1): Update call accordingly.
1128 (dwarf2_move_insn): New function.
1129 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1130
6a50d470
RS		 11312013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1132
1133 Revert:
1134
1135 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1136
1137 PR gas/13024
1138 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1139 (dwarf2_gen_line_info_1): Delete.
1140 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1141 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1142 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1143 (dwarf2_directive_loc): Push previous .locs instead of generating
1144 them immediately.
1145
f122319e
CF		 11462013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1147
1148 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1149 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1150
909c7f9c
NC		 11512013-06-13 Nick Clifton <nickc@redhat.com>
1152
1153 PR gas/15602
1154 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1155 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1156 function. Generates an error if the adjusted offset is out of a
1157 16-bit range.
1158
5d5755a7
SL		 11592013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1160
1161 * config/tc-nios2.c (md_apply_fix): Mask constant
1162 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1163
3bf0dbfb
MR		 11642013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1165
1166 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1167 MIPS-3D instructions either.
1168 (md_convert_frag): Update the COPx branch mask accordingly.
1169
1170 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1171 option.
1172 * doc/as.texinfo (Overview): Add --relax-branch and
1173 --no-relax-branch.
1174 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1175 --no-relax-branch.
1176
9daf7bab
SL		 11772013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1178
1179 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1180 omitted.
1181
d301a56b
RS		 11822013-06-08 Catherine Moore <clm@codesourcery.com>
1183
1184 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1185 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1186 (append_insn): Change INSN_xxxx to ASE_xxxx.
1187
7bab7634
DC		 11882013-06-01 George Thomas <george.thomas@atmel.com>
1189
cbe02d4f 1190 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1191 AVR_ISA_XMEGAU
1192
f60cf82f
L		 11932013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1194
1195 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1196 for ELF.
1197
a3f278e2
CM		 11982013-05-31 Paul Brook <paul@codesourcery.com>
1199
a3f278e2
CM		 1200 * config/tc-mips.c (s_ehword): New.
1201
067ec077
CM		 12022013-05-30 Paul Brook <paul@codesourcery.com>
1203
1204 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1205
d6101ac2
MR		 12062013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1207
1208 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1209 convert relocs who have no relocatable field either. Rephrase
1210 the conditional so that the PC-relative check is only applied
1211 for REL targets.
1212
f19ccbda
MR		 12132013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1214
1215 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1216 calculation.
1217
418009c2
YZ		 12182013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1219
1220 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1221 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1222 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1223 (md_apply_fix): Likewise.
1224 (aarch64_force_relocation): Likewise.
1225
0a8897c7
KT		 12262013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1227
1228 * config/tc-arm.c (it_fsm_post_encode): Improve
1229 warning messages about deprecated IT block formats.
1230
89d2a2a3
MS		 12312013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1232
1233 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1234 inside fx_done condition.
1235
c77c0862
RS		 12362013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1237
1238 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1239
c0637f3a
PB		 12402013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1241
1242 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1243 and clean up warning when using PRINT_OPCODE_TABLE.
1244
5656a981
AM		 12452013-05-20 Alan Modra <amodra@gmail.com>
1246
1247 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1248 and data fixups performing shift/high adjust/sign extension on
1249 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1250 when writing data fixups rather than recalculating size.
1251
997b26e8
JBG		 12522013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1253
1254 * doc/c-msp430.texi: Fix typo.
1255
9f6e76f4
TG		 12562013-05-16 Tristan Gingold <gingold@adacore.com>
1257
1258 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1259 are also TOC symbols.
1260
638d3803
NC		 12612013-05-16 Nick Clifton <nickc@redhat.com>
1262
1263 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1264 Add -mcpu command to specify core type.
997b26e8 1265 * doc/c-msp430.texi: Update documentation.
638d3803 1266
b015e599
AP		 12672013-05-09 Andrew Pinski <apinski@cavium.com>
1268
1269 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1270 (mips_opts): Update for the new field.
1271 (file_ase_virt): New variable.
1272 (ISA_SUPPORTS_VIRT_ASE): New macro.
1273 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1274 (MIPS_CPU_ASE_VIRT): New define.
1275 (is_opcode_valid): Handle ase_virt.
1276 (macro_build): Handle "+J".
1277 (validate_mips_insn): Likewise.
1278 (mips_ip): Likewise.
1279 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1280 (md_longopts): Add mvirt and mnovirt
1281 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1282 (mips_after_parse_args): Handle ase_virt field.
1283 (s_mipsset): Handle "virt" and "novirt".
1284 (mips_elf_final_processing): Add a comment about virt ASE might need
1285 a new flag.
1286 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1287 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1288 Document ".set virt" and ".set novirt".
1289
da8094d7
AM		 12902013-05-09 Alan Modra <amodra@gmail.com>
1291
1292 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1293 control of operand flag bits.
1294
c5f8c205
AM		 12952013-05-07 Alan Modra <amodra@gmail.com>
1296
1297 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1298 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1299 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1300 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1301 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1302 Shift and sign-extend fieldval for use by some VLE reloc
1303 operand->insert functions.
1304
b47468a6
CM		 13052013-05-06 Paul Brook <paul@codesourcery.com>
1306 Catherine Moore <clm@codesourcery.com>
1307
c5f8c205
AM		 1308 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1309 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1310 (md_apply_fix): Likewise.
1311 (tc_gen_reloc): Likewise.
1312
2de39019
CM		 13132013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1314
1315 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1316 (mips_fix_adjustable): Adjust pc-relative check to use
1317 limited_pc_reloc_p.
1318
754e2bb9
RS		 13192013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1320
1321 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1322 (s_mips_stab): Do not restrict to stabn only.
1323
13761a11
NC		 13242013-05-02 Nick Clifton <nickc@redhat.com>
1325
1326 * config/tc-msp430.c: Add support for the MSP430X architecture.
1327 Add code to insert a NOP instruction after any instruction that
1328 might change the interrupt state.
1329 Add support for the LARGE memory model.
1330 Add code to initialise the .MSP430.attributes section.
1331 * config/tc-msp430.h: Add support for the MSP430X architecture.
1332 * doc/c-msp430.texi: Document the new -mL and -mN command line
1333 options.
1334 * NEWS: Mention support for the MSP430X architecture.
1335
df26367c
MR		 13362013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1337
1338 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1339 alpha*-*-linux*ecoff*.
1340
f02d8318
CF		 13412013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1342
1343 * config/tc-mips.c (mips_ip): Add sizelo.
1344 For "+C", "+G", and "+H", set sizelo and compare against it.
1345
b40bf0a2
NC		 13462013-04-29 Nick Clifton <nickc@redhat.com>
1347
1348 * as.c (Options): Add -gdwarf-sections.
1349 (parse_args): Likewise.
1350 * as.h (flag_dwarf_sections): Declare.
1351 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1352 (process_entries): When -gdwarf-sections is enabled generate
1353 fragmentary .debug_line sections.
1354 (out_debug_line): Set the section for the .debug_line section end
1355 symbol.
1356 * doc/as.texinfo: Document -gdwarf-sections.
1357 * NEWS: Mention -gdwarf-sections.
1358
8eeccb77 13592013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1360
1361 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1362 according to the target parameter. Don't call s_segm since s_segm
1363 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1364 initialized yet.
1365 (md_begin): Call s_segm according to target parameter from command
1366 line.
1367
49926cd0
AM		 13682013-04-25 Alan Modra <amodra@gmail.com>
1369
1370 * configure.in: Allow little-endian linux.
1371 * configure: Regenerate.
1372
e3031850
SL		 13732013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1374
1375 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1376 "fstatus" control register to "eccinj".
1377
cb948fc0
KT		 13782013-04-19 Kai Tietz <ktietz@redhat.com>
1379
1380 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1381
4455e9ad
JB		 13822013-04-15 Julian Brown <julian@codesourcery.com>
1383
1384 * expr.c (add_to_result, subtract_from_result): Make global.
1385 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1386 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1387 subtract_from_result to handle extra bit of precision for .sleb128
1388 directive operands.
1389
956a6ba3
JB		 13902013-04-10 Julian Brown <julian@codesourcery.com>
1391
1392 * read.c (convert_to_bignum): Add sign parameter. Use it
1393 instead of X_unsigned to determine sign of resulting bignum.
1394 (emit_expr): Pass extra argument to convert_to_bignum.
1395 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1396 X_extrabit to convert_to_bignum.
1397 (parse_bitfield_cons): Set X_extrabit.
1398 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1399 Initialise X_extrabit field as appropriate.
1400 (add_to_result): New.
1401 (subtract_from_result): New.
1402 (expr): Use above.
1403 * expr.h (expressionS): Add X_extrabit field.
1404
eb9f3f00
JB		 14052013-04-10 Jan Beulich <jbeulich@suse.com>
1406
1407 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1408 register being PC when is_t or writeback, and use distinct
1409 diagnostic for the latter case.
1410
ccb84d65
JB		 14112013-04-10 Jan Beulich <jbeulich@suse.com>
1412
1413 * gas/config/tc-arm.c (parse_operands): Re-write
1414 po_barrier_or_imm().
1415 (do_barrier): Remove bogus constraint().
1416 (do_t_barrier): Remove.
1417
4d13caa0
NC		 14182013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1419
1420 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1421 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1422 ATmega2564RFR2
1423 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1424
16d02dc9
JB		 14252013-04-09 Jan Beulich <jbeulich@suse.com>
1426
1427 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1428 Use local variable Rt in more places.
1429 (do_vmsr): Accept all control registers.
1430
05ac0ffb
JB		 14312013-04-09 Jan Beulich <jbeulich@suse.com>
1432
1433 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1434 if there was none specified for moves between scalar and core
1435 register.
1436
2d51fb74
JB		 14372013-04-09 Jan Beulich <jbeulich@suse.com>
1438
1439 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1440 NEON_ALL_LANES case.
1441
94dcf8bf
JB		 14422013-04-08 Jan Beulich <jbeulich@suse.com>
1443
1444 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1445 PC-relative VSTR.
1446
1472d06f
JB		 14472013-04-08 Jan Beulich <jbeulich@suse.com>
1448
1449 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1450 entry to sp_fiq.
1451
0c76cae8
AM		 14522013-04-03 Alan Modra <amodra@gmail.com>
1453
1454 * doc/as.texinfo: Add support to generate man options for h8300.
1455 * doc/c-h8300.texi: Likewise.
1456
92eb40d9
RR		 14572013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1458
1459 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1460 Cortex-A57.
1461
51dcdd4d
NC		 14622013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1463
1464 PR binutils/15068
1465 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1466
c5d685bf
NC		 14672013-03-26 Nick Clifton <nickc@redhat.com>
1468
9b978282
NC		 1469 PR gas/15295
1470 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1471 start of the file each time.
1472
c5d685bf
NC		 1473 PR gas/15178
1474 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1475 FreeBSD targets.
1476
9699c833
TG		 14772013-03-26 Douglas B Rupp <rupp@gnat.com>
1478
1479 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1480 after fixup.
1481
4755303e
WN		 14822013-03-21 Will Newton <will.newton@linaro.org>
1483
1484 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1485 pc-relative str instructions in Thumb mode.
1486
81f5558e
NC		 14872013-03-21 Michael Schewe <michael.schewe@gmx.net>
1488
1489 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1490 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1491 R_H8_DISP32A16.
1492 * config/tc-h8300.h: Remove duplicated defines.
1493
71863e73
NC		 14942013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1495
1496 PR gas/15282
1497 * tc-avr.c (mcu_has_3_byte_pc): New function.
1498 (tc_cfi_frame_initial_instructions): Call it to find return
1499 address size.
1500
795b8e6b
NC		 15012013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1502
1503 PR gas/15095
1504 * config/tc-tic6x.c (tic6x_try_encode): Handle
1505 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1506 encode register pair numbers when required.
1507
ba86b375
WN		 15082013-03-15 Will Newton <will.newton@linaro.org>
1509
1510 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1511 in vstr in Thumb mode for pre-ARMv7 cores.
1512
9e6f3811
AS		 15132013-03-14 Andreas Schwab <schwab@suse.de>
1514
1515 * doc/c-arc.texi (ARC Directives): Revert last change and use
1516 @itemize instead of @table.
1517 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1518
b10bf8c5
NC		 15192013-03-14 Nick Clifton <nickc@redhat.com>
1520
1521 PR gas/15273
1522 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1523 NULL message, instead just check ARM_CPU_IS_ANY directly.
1524
ba724cfc
NC		 15252013-03-14 Nick Clifton <nickc@redhat.com>
1526
1527 PR gas/15212
9e6f3811 1528 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1529 for table format.
1530 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1531 to the @item directives.
1532 (ARM-Neon-Alignment): Move to correct place in the document.
1533 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1534 formatting.
1535 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1536 @smallexample.
1537
531a94fd
SL		 15382013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1539
1540 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1541 case. Add default BAD_CASE to switch.
1542
dad60f8e
SL		 15432013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1544
1545 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1546 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1547
dd5181d5
KT		 15482013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1549
1550 * config/tc-arm.c (crc_ext_armv8): New feature set.
1551 (UNPRED_REG): New macro.
1552 (do_crc32_1): New function.
1553 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1554 do_crc32ch, do_crc32cw): Likewise.
1555 (TUEc): New macro.
1556 (insns): Add entries for crc32 mnemonics.
1557 (arm_extensions): Add entry for crc.
1558
8e723a10
CLT		 15592013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1560
1561 * write.h (struct fix): Add fx_dot_frag field.
1562 (dot_frag): Declare.
1563 * write.c (dot_frag): New variable.
1564 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1565 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1566 * expr.c (expr): Save value of frag_now in dot_frag when setting
1567 dot_value.
1568 * read.c (emit_expr): Likewise. Delete comments.
1569
be05d201
L		 15702013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1571
1572 * config/tc-i386.c (flag_code_names): Removed.
1573 (i386_index_check): Rewrote.
1574
62b0d0d5
YZ		 15752013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1576
1577 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1578 add comment.
1579 (aarch64_double_precision_fmovable): New function.
1580 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1581 function; handle hexadecimal representation of IEEE754 encoding.
1582 (parse_operands): Update the call to parse_aarch64_imm_float.
1583
165de32a
L		 15842013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1585
1586 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1587 (check_hle): Updated.
1588 (md_assemble): Likewise.
1589 (parse_insn): Likewise.
1590
d5de92cf
L		 15912013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1592
1593 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1594 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1595 (parse_insn): Remove expecting_string_instruction. Set
1596 i.rep_prefix.
1597
e60bb1dd
YZ		 15982013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1599
1600 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1601
aeebdd9b
YZ		 16022013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1603
1604 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1605 for system registers.
1606
4107ae22
DD		 16072013-02-27 DJ Delorie <dj@redhat.com>
1608
1609 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1610 (rl78_op): Handle %code().
1611 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1612 (tc_gen_reloc): Likwise; convert to a computed reloc.
1613 (md_apply_fix): Likewise.
1614
151fa98f
NC		 16152013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1616
1617 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1618
70a8bc5b 16192013-02-25 Terry Guo <terry.guo@arm.com>
1620
1621 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1622 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1623 list of accepted CPUs.
1624
5c111e37
L		 16252013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1626
1627 PR gas/15159
1628 * config/tc-i386.c (cpu_arch): Add ".smap".
1629
1630 * doc/c-i386.texi: Document smap.
1631
8a75745d
MR		 16322013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1633
1634 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1635 mips_assembling_insn appropriately.
1636 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1637
79850f26
MR		 16382013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1639
cf29fc61 1640 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1641 extraneous braces.
1642
4c261dff
NC		 16432013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1644
5c111e37 1645 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1646
ea33f281
NC		 16472013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1648
1649 * configure.tgt: Add nios2-*-rtems*.
1650
a1ccaec9
YZ		 16512013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1652
1653 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1654 NULL.
1655
0aa27725
RS		 16562013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1657
1658 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1659 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1660
da4339ed
NC		 16612013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1662
1663 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1664 core.
1665
36591ba1 16662013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1667 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1668
1669 Based on patches from Altera Corporation.
1670
1671 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1672 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1673 * Makefile.in: Regenerated.
1674 * configure.tgt: Add case for nios2*-linux*.
1675 * config/obj-elf.c: Conditionally include elf/nios2.h.
1676 * config/tc-nios2.c: New file.
1677 * config/tc-nios2.h: New file.
1678 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1679 * doc/Makefile.in: Regenerated.
1680 * doc/all.texi: Set NIOSII.
1681 * doc/as.texinfo (Overview): Add Nios II options.
1682 (Machine Dependencies): Include c-nios2.texi.
1683 * doc/c-nios2.texi: New file.
1684 * NEWS: Note Altera Nios II support.
1685
94d4433a
AM		 16862013-02-06 Alan Modra <amodra@gmail.com>
1687
1688 PR gas/14255
1689 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1690 Don't skip fixups with fx_subsy non-NULL.
1691 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1692 with fx_subsy non-NULL.
1693
ace9af6f
L		 16942013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1695
1696 * doc/c-metag.texi: Add "@c man" markers.
1697
89d67ed9
AM		 16982013-02-04 Alan Modra <amodra@gmail.com>
1699
1700 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1701 related code.
1702 (TC_ADJUST_RELOC_COUNT): Delete.
1703 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1704
89072bd6
AM		 17052013-02-04 Alan Modra <amodra@gmail.com>
1706
1707 * po/POTFILES.in: Regenerate.
1708
f9b2d544
NC		 17092013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1710
1711 * config/tc-metag.c: Make SWAP instruction less permissive with
1712 its operands.
1713
392ca752
DD		 17142013-01-29 DJ Delorie <dj@redhat.com>
1715
1716 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1717 relocs in .word/.etc statements.
1718
427d0db6
RM		 17192013-01-29 Roland McGrath <mcgrathr@google.com>
1720
1721 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1722 immediate value for 8-bit offset" error so it shows line info.
1723
4faf939a
JM		 17242013-01-24 Joseph Myers <joseph@codesourcery.com>
1725
1726 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1727 for 64-bit output.
1728
78c8d46c
NC		 17292013-01-24 Nick Clifton <nickc@redhat.com>
1730
1731 * config/tc-v850.c: Add support for e3v5 architecture.
1732 * doc/c-v850.texi: Mention new support.
1733
fb5b7503
NC		 17342013-01-23 Nick Clifton <nickc@redhat.com>
1735
1736 PR gas/15039
1737 * config/tc-avr.c: Include dwarf2dbg.h.
1738
8ce3d284
L		 17392013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1740
1741 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1742 (tc_i386_fix_adjustable): Likewise.
1743 (lex_got): Likewise.
1744 (tc_gen_reloc): Likewise.
1745
f5555712
YZ		 17462013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1747
1748 * config/tc-aarch64.c (output_operand_error_record): Change to output
1749 the out-of-range error message as value-expected message if there is
1750 only one single value in the expected range.
1751 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1752 LSL #0 as a programmer-friendly feature.
1753
8fd4256d
L		 17542013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1755
1756 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1757 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1758 BFD_RELOC_64_SIZE relocations.
1759 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1760 for it.
1761 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1762 relocations against local symbols.
1763
a5840dce
AM		 17642013-01-16 Alan Modra <amodra@gmail.com>
1765
1766 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1767 finding some sort of toc syntax error, and break to avoid
1768 compiler uninit warning.
1769
af89796a
L		 17702013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1771
1772 PR gas/15019
1773 * config/tc-i386.c (lex_got): Increment length by 1 if the
1774 relocation token is removed.
1775
dd42f060
NC		 17762013-01-15 Nick Clifton <nickc@redhat.com>
1777
1778 * config/tc-v850.c (md_assemble): Allow signed values for
1779 V850E_IMMEDIATE.
1780
464e3686
SK		 17812013-01-11 Sean Keys <skeys@ipdatasys.com>
1782
1783 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1784 git to cvs.
464e3686 1785
5817ffd1
PB		 17862013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1787
1788 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1789 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1790 * config/tc-ppc.c (md_show_usage): Likewise.
1791 (ppc_handle_align): Handle power8's group ending nop.
1792
f4b1f6a9
SK		 17932013-01-10 Sean Keys <skeys@ipdatasys.com>
1794
1795 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1796 that the assember exits after the opcodes have been printed.
f4b1f6a9 1797
34bca508
L		 17982013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1799
1800 * app.c: Remove trailing white spaces.
1801 * as.c: Likewise.
1802 * as.h: Likewise.
1803 * cond.c: Likewise.
1804 * dw2gencfi.c: Likewise.
1805 * dwarf2dbg.h: Likewise.
1806 * ecoff.c: Likewise.
1807 * input-file.c: Likewise.
1808 * itbl-lex.h: Likewise.
1809 * output-file.c: Likewise.
1810 * read.c: Likewise.
1811 * sb.c: Likewise.
1812 * subsegs.c: Likewise.
1813 * symbols.c: Likewise.
1814 * write.c: Likewise.
1815 * config/tc-i386.c: Likewise.
1816 * doc/Makefile.am: Likewise.
1817 * doc/Makefile.in: Likewise.
1818 * doc/c-aarch64.texi: Likewise.
1819 * doc/c-alpha.texi: Likewise.
1820 * doc/c-arc.texi: Likewise.
1821 * doc/c-arm.texi: Likewise.
1822 * doc/c-avr.texi: Likewise.
1823 * doc/c-bfin.texi: Likewise.
1824 * doc/c-cr16.texi: Likewise.
1825 * doc/c-d10v.texi: Likewise.
1826 * doc/c-d30v.texi: Likewise.
1827 * doc/c-h8300.texi: Likewise.
1828 * doc/c-hppa.texi: Likewise.
1829 * doc/c-i370.texi: Likewise.
1830 * doc/c-i386.texi: Likewise.
1831 * doc/c-i860.texi: Likewise.
1832 * doc/c-m32c.texi: Likewise.
1833 * doc/c-m32r.texi: Likewise.
1834 * doc/c-m68hc11.texi: Likewise.
1835 * doc/c-m68k.texi: Likewise.
1836 * doc/c-microblaze.texi: Likewise.
1837 * doc/c-mips.texi: Likewise.
1838 * doc/c-msp430.texi: Likewise.
1839 * doc/c-mt.texi: Likewise.
1840 * doc/c-s390.texi: Likewise.
1841 * doc/c-score.texi: Likewise.
1842 * doc/c-sh.texi: Likewise.
1843 * doc/c-sh64.texi: Likewise.
1844 * doc/c-tic54x.texi: Likewise.
1845 * doc/c-tic6x.texi: Likewise.
1846 * doc/c-v850.texi: Likewise.
1847 * doc/c-xc16x.texi: Likewise.
1848 * doc/c-xgate.texi: Likewise.
1849 * doc/c-xtensa.texi: Likewise.
1850 * doc/c-z80.texi: Likewise.
1851 * doc/internals.texi: Likewise.
1852
4c665b71
RM		 18532013-01-10 Roland McGrath <mcgrathr@google.com>
1854
1855 * hash.c (hash_new_sized): Make it global.
1856 * hash.h: Declare it.
1857 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1858 pass a small size.
1859
a3c62988
NC		 18602013-01-10 Will Newton <will.newton@imgtec.com>
1861
1862 * Makefile.am: Add Meta.
1863 * Makefile.in: Regenerate.
1864 * config/tc-metag.c: New file.
1865 * config/tc-metag.h: New file.
1866 * configure.tgt: Add Meta.
1867 * doc/Makefile.am: Add Meta.
1868 * doc/Makefile.in: Regenerate.
1869 * doc/all.texi: Add Meta.
1870 * doc/as.texiinfo: Document Meta options.
1871 * doc/c-metag.texi: New file.
1872
b37df7c4
SE		 18732013-01-09 Steve Ellcey <sellcey@mips.com>
1874
1875 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1876 calls.
1877 * config/tc-mips.c (internalError): Remove, replace with abort.
1878
a3251895
YZ		 18792013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1880
1881 * config/tc-aarch64.c (parse_operands): Change to compare the result
1882 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1883
8ab8155f
NC		 18842013-01-07 Nick Clifton <nickc@redhat.com>
1885
1886 PR gas/14887
1887 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1888 anticipated character.
1889 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1890 here as it is no longer needed.
1891
a4ac1c42
AS		 18922013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1893
1894 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1895 * doc/c-score.texi (SCORE-Opts): Likewise.
1896 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1897
e407c74b
NC		 18982013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1899
1900 * config/tc-mips.c: Add support for MIPS r5900.
1901 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1902 lq and sq.
1903 (can_swap_branch_p, get_append_method): Detect some conditional
1904 short loops to fix a bug on the r5900 by NOP in the branch delay
1905 slot.
1906 (M_MUL): Support 3 operands in multu on r5900.
1907 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1908 (s_mipsset): Force 32 bit floating point on r5900.
1909 (mips_ip): Check parameter range of instructions mfps and mtps on
1910 r5900.
1911 * configure.in: Detect CPU type when target string contains r5900
1912 (e.g. mips64r5900el-linux-gnu).
1913
62658407
L		 19142013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1915
1916 * as.c (parse_args): Update copyright year to 2013.
1917
95830fd1
YZ		 19182013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1919
1920 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1921 and "cortex57".
1922
517bb291 19232013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1924
517bb291
NC		 1925 PR gas/14987
1926 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1927 closing bracket.
d709e4e6 1928
517bb291 1929For older changes see ChangeLog-2012
08d56133 1930\f
517bb291 1931Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1932
1933Copying and distribution of this file, with or without modification,
1934are permitted in any medium without royalty provided the copyright
1935notice and this notice are preserved.
1936
08d56133
NC		 1937Local Variables:
1938mode: change-log
1939left-margin: 8
1940fill-column: 74
1941version-control: never
1942End:
GDB Binutils - Deliverables
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