Added a testsuite. More support for COPY relocations.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
e1da3f5b
PB
12006-11-29 Paul Brook <paul@codesourcery.com>
2
3 * config/tc-arm.c (arm_is_eabi): New function.
4 * config/tc-arm.h (arm_is_eabi): New prototype.
5 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
6 * doc/c-arm.texi (.thumb_func): Update documentation.
7
00249aaa
PB
82006-11-29 Paul Brook <paul@codesourcery.com>
9
10 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
11 encoding.
12
a7284bf1
BW
132006-11-27 Sterling Augustine <sterling@tensilica.com>
14
15 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
16 as the first slot_subtype, not the frag subtype.
17
2caa7ca0
BW
182006-11-27 Bob Wilson <bob.wilson@acm.org>
19
20 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
21 (directive_state): Disable scheduling by default.
22 (xtensa_add_config_info): New.
23 (xtensa_end): Call xtensa_add_config_info.
24
062cf837
EB
252006-11-27 Eric Botcazou <ebotcazou@adacore.com>
26
27 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
28 their unaligned counterparts in debugging sections.
29
cefdba39
AM
302006-11-24 Alan Modra <amodra@bigpond.net.au>
31
32 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
33
e821645d
DJ
342006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
35
36 * config/tc-arm.h (md_cons_align): Define.
37 (mapping_state): New prototype.
38 * config/tc-arm.c (mapping_state): Make global.
39
5ab504f9
AM
402006-11-22 Alan Modra <amodra@bigpond.net.au>
41
42 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
43
98a16ee1
ML
442006-11-16 Mei ligang <ligang@sunnorth.com.cn>
45
5ab504f9
AM
46 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
47 branch instruction, handle it specially.
98a16ee1
ML
48 (score_insns): Modify 32 bit branch instruction.
49
0023dd27
AM
502006-11-16 Alan Modra <amodra@bigpond.net.au>
51
52 * symbols.c (resolve_symbol_value): Formatting.
53
bdf128d6
JB
542006-11-15 Jan Beulich <jbeulich@novell.com>
55
56 PR/3469
57 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
58 chain by linking it to itself.
59 (resolve_symbol_value): Also check symbol_shadow_p().
60 (symbol_shadow_p): New.
61 * symbols.h (symbol_shadow_p): Declare.
62
25fe350b
MS
632006-11-12 Mark Shinwell <shinwell@codesourcery.com>
64
65 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
66 (insns): Adjust accordingly.
67 (md_apply_fix): Alter comments to use CBZ instead of CZB.
68
0ffdc86c
NC
692006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
70
71 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
72 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
73
6afdfa61
NC
742006-11-10 Nick Clifton <nickc@redhat.com>
75
76 PR gas/3456:
77 * config/obj-elf.c (obj_elf_version): Do not include the name
78 field's padding in the namesz value.
79
d84bcf09
TS
802006-11-09 Thiemo Seufer <ths@mips.com>
81
82 * config/tc-mips.c: Fix outdated comment.
83
b7d9ef37
L
842006-11-08 H.J. Lu <hongjiu.lu@intel.com>
85
86 * config/tc-i386.h (CpuPNI): Removed.
87 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
88 * config/tc-i386.c (md_assemble): Likewise.
89
05e7221f
AM
902006-11-08 Alan Modra <amodra@bigpond.net.au>
91
92 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
93
df1f3cda
DD
942006-11-06 David Daney <ddaney@avtrex.com>
95
96 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
97
82100185
TS
982006-11-06 Thiemo Seufer <ths@mips.com>
99
100 * doc/c-mips.texi (-march): Document sb1a.
101
a360e743
TS
1022006-11-06 Thiemo Seufer <ths@mips.com>
103
104 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
105 34k always has DSP ASE.
106
64817874
TS
1072006-11-03 Thiemo Seufer <ths@mips.com>
108
109 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
110 MIPS16 instructions referencing other sections, unless they are
111 external branches.
112
7764b395
TS
1132006-11-03 Thiemo Seufer <ths@mips.com>
114
115 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
116 release 1 CPU.
117
ae424f82
JJ
1182006-11-03 Jakub Jelinek <jakub@redhat.com>
119
9b8ae42e
JJ
120 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
121 personality and lsda.
122 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
123 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
124 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
125 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
126 (output_cie): Output personality including its encoding and LSDA encoding.
127 (output_fde): Output LSDA.
128 (select_cie_for_fde): Don't share CIE if personality, its encoding or
129 LSDA encoding are different. Copy the 3 fields from fde_entry to
130 cie_entry.
131 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
132
ae424f82
JJ
133 * subsegs.h (struct frchain): Add frch_cfi_data field.
134 * dw2gencfi.c: Include subsegs.h.
135 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
136 (struct frch_cfi_data): New type.
137 (unused_cfi_data): New variable.
138 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
139 and cfa_save_stack static vars into a structure pointed from
140 each frchain.
141 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
142 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
143 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
144 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
145 Likewise.
146
d1e50f8a
DJ
1472006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
148
149 * config/tc-h8300.c (build_bytes): Fix const warning.
150
06d2da93
NC
1512006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
152
153 * tc-score.c (do16_rdrs): Handle not! instruction especially.
154
3ba67470
PB
1552006-10-31 Paul Brook <paul@codesourcery.com>
156
157 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
158 for EABIv4.
159
7a1d4c38
PB
1602006-10-31 Paul Brook <paul@codesourcery.com>
161
162 gas/
163 * config/tc-arm.c (object_arch): New variable.
164 (s_arm_object_arch): New function.
165 (md_pseudo_table): Add object_arch.
166 (aeabi_set_public_attributes): Obey object_arch.
167 * doc/c-arm.texi: Document .object_arch.
168
b138abaa
NC
1692006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
170
171 * tc-score.c (data_op2): Check invalid operands.
172 (my_get_expression): Const operand of some instructions can not be
173 symbol in assembly.
174 (get_insn_class_from_type): Handle instruction type Insn_internal.
175 (do_macro_ldst_label): Modify inst.type.
176 (Insn_PIC): Delete.
177 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 178
c79b7c30
RC
1792006-10-29 Randolph Chung <tausq@debian.org>
180
181 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
182 (hppa_regname_to_dw2regnum): New funcions.
183 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
184 (tc_cfi_frame_initial_instructions)
185 (tc_regname_to_dw2regnum): Define.
186 (hppa_cfi_frame_initial_instructions)
187 (hppa_regname_to_dw2regnum): Declare.
188 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
189 (DWARF2_CIE_DATA_ALIGNMENT): Define.
190
e2785c44
NC
1912006-10-29 Nick Clifton <nickc@redhat.com>
192
193 * config/tc-spu.c (md_assemble): Cast printf string size parameter
194 to int in order to avoid a compiler warning.
195
86157c20
AS
1962006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
197
198 * config/tc-sh.c (md_assemble): Define size of branches.
199
ba5f0fda
BE
2002006-10-26 Ben Elliston <bje@au.ibm.com>
201
202 * dw2gencfi.c (cfi_add_CFA_offset):
203 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
204
033cd5fd
BE
205 * write.c (chain_frchains_together_1): Assert that this function
206 never returns a pointer to the auto variable `dummy'.
207
e9f53129
AM
2082006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
209 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
210 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
211 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
212 Alan Modra <amodra@bigpond.net.au>
213
214 * config/tc-spu.c: New file.
215 * config/tc-spu.h: New file.
216 * configure.tgt: Add SPU support.
217 * Makefile.am: Likewise. Run "make dep-am".
218 * Makefile.in: Regenerate.
219 * po/POTFILES.in: Regenerate.
220
7b383517
BE
2212006-10-25 Ben Elliston <bje@au.ibm.com>
222
223 * expr.c (expr): Replace O_add case in switch (op_left) explaining
224 why it can never occur.
5ab504f9 225
ede602d7
AM
2262006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
227
228 * doc/c-ppc.texi (-mcell): Document.
229 * config/tc-ppc.c (parse_cpu): Parse -mcell.
230 (md_show_usage): Document -mcell.
231
7918206c
MM
2322006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
233
234 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
235
878bcc43
AM
2362006-10-23 Alan Modra <amodra@bigpond.net.au>
237
238 * config/tc-m68hc11.c (md_assemble): Quiet warning.
239
8620418b
MF
2402006-10-19 Mike Frysinger <vapier@gentoo.org>
241
242 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
243 (x86_64_section_letter): Likewise.
244
b3549761
NC
2452006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
246
247 * config/tc-score.c (build_relax_frag): Compute correct
248 tc_frag_data.fixp.
249
71a75f6f
MF
2502006-10-18 Roy Marples <uberlord@gentoo.org>
251
252 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
253 elf32-sparc as a viable target for the -32 switch and any target
254 starting with elf64-sparc as a viable target for the -64 switch.
255 (sparc_target_format): For 64-bit ELF flavoured output use
256 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
257 ELF_TARGET_FORMAT.
71a75f6f
MF
258 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
259
e1b5fdd4
L
2602006-10-17 H.J. Lu <hongjiu.lu@intel.com>
261
262 * configure: Regenerated.
263
f8ef9cd7
BS
2642006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
265
266 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
267 in addition to testing for '\n'.
268 (TC_EOL_IN_INSN): Provide a default definition if necessary.
269
eb1fe072
NC
2702006-10-13 Sterling Augstine <sterling@tensilica.com>
271
272 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
273 a disjoint DW_AT range.
274
ec6e49f4
NC
2752006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
276
277 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
278
036dc3f7
PB
2792006-10-08 Paul Brook <paul@codesourcery.com>
280
281 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
282 (parse_operands): Use parse_big_immediate for OP_NILO.
283 (neon_cmode_for_logic_imm): Try smaller element sizes.
284 (neon_cmode_for_move_imm): Ditto.
285 (do_neon_logic): Handle .i64 pseudo-op.
286
3bb0c887
AM
2872006-09-29 Alan Modra <amodra@bigpond.net.au>
288
289 * po/POTFILES.in: Regenerate.
290
ef05d495
L
2912006-09-28 H.J. Lu <hongjiu.lu@intel.com>
292
293 * config/tc-i386.h (CpuMNI): Renamed to ...
294 (CpuSSSE3): This.
295 (CpuUnknownFlags): Updated.
296 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
297 and PROCESSOR_MEROM with PROCESSOR_CORE2.
298 * config/tc-i386.c: Updated.
299 * doc/c-i386.texi: Likewise.
a70ae331 300
ef05d495
L
301 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
302
d8ad03e9
NC
3032006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
304
305 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
306
df3ca5a3
NC
3072006-09-27 Nick Clifton <nickc@redhat.com>
308
309 * output-file.c (output_file_close): Prevent an infinite loop
310 reporting that stdoutput could not be closed.
311
2d447fca
JM
3122006-09-26 Mark Shinwell <shinwell@codesourcery.com>
313 Joseph Myers <joseph@codesourcery.com>
314 Ian Lance Taylor <ian@wasabisystems.com>
315 Ben Elliston <bje@wasabisystems.com>
316
317 * config/tc-arm.c (arm_cext_iwmmxt2): New.
318 (enum operand_parse_code): New code OP_RIWR_I32z.
319 (parse_operands): Handle OP_RIWR_I32z.
320 (do_iwmmxt_wmerge): New function.
321 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
322 a register.
323 (do_iwmmxt_wrwrwr_or_imm5): New function.
324 (insns): Mark instructions as RIWR_I32z as appropriate.
325 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
326 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
327 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
328 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
329 (md_begin): Handle IWMMXT2.
330 (arm_cpus): Add iwmmxt2.
331 (arm_extensions): Likewise.
332 (arm_archs): Likewise.
333
ba83aca1
BW
3342006-09-25 Bob Wilson <bob.wilson@acm.org>
335
336 * doc/as.texinfo (Overview): Revise description of --keep-locals.
337 Add xref to "Symbol Names".
338 (L): Refer to "local symbols" instead of "local labels". Move
339 definition to "Symbol Names" section; add xref to that section.
340 (Symbol Names): Use "Local Symbol Names" section to define local
341 symbols. Add "Local Labels" heading for description of temporary
342 forward/backward labels, and refer to those as "local labels".
343
539e75ad
L
3442006-09-23 H.J. Lu <hongjiu.lu@intel.com>
345
346 PR binutils/3235
347 * config/tc-i386.c (match_template): Check address size prefix
348 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
349 operand.
350
5e02f92e
AM
3512006-09-22 Alan Modra <amodra@bigpond.net.au>
352
353 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
354
885afe7b
AM
3552006-09-22 Alan Modra <amodra@bigpond.net.au>
356
357 * as.h (as_perror): Delete declaration.
358 * gdbinit.in (as_perror): Delete breakpoint.
359 * messages.c (as_perror): Delete function.
360 * doc/internals.texi: Remove as_perror description.
361 * listing.c (listing_print: Don't use as_perror.
362 * output-file.c (output_file_create, output_file_close): Likewise.
363 * symbols.c (symbol_create, symbol_clone): Likewise.
364 * write.c (write_contents): Likewise.
365 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
366 * config/tc-tic54x.c (tic54x_mlib): Likewise.
367
3aeeedbb
AM
3682006-09-22 Alan Modra <amodra@bigpond.net.au>
369
370 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
371 (ppc_handle_align): New function.
372 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
373 (SUB_SEGMENT_ALIGN): Define as zero.
374
96e9638b
BW
3752006-09-20 Bob Wilson <bob.wilson@acm.org>
376
377 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
378 (Overview): Skip cross reference in man page.
379
99ad8390
NC
3802006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
381
382 * configure.in: Add new target x86_64-pc-mingw64.
383 * configure: Regenerate.
384 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
385 * config/obj-coff.h: Add handling for TE_PEP target specific code
386 and definitions.
99ad8390
NC
387 * config/tc-i386.c: Add new targets.
388 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
389 (x86_64_target_format): Add new method for setup proper default
390 target cpu mode.
99ad8390
NC
391 * config/te-pep.h: Add new target definition header.
392 (TE_PEP): New macro: Identifies new target architecture.
393 (COFF_WITH_pex64): Set proper includes in bfd.
394 * NEWS: Mention new target.
395
73332571
BS
3962006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
397
398 * config/bfin-parse.y (binary): Change sub of const to add of negated
399 const.
400
1c0d3aa6
NC
4012006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
402
403 * config/tc-score.c: New file.
404 * config/tc-score.h: Newf file.
405 * configure.tgt: Add Score target.
406 * Makefile.am: Add Score files.
407 * Makefile.in: Regenerate.
408 * NEWS: Mention new target support.
409
4fa3602b
PB
4102006-09-16 Paul Brook <paul@codesourcery.com>
411
412 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
413 * doc/c-arm.texi (movsp): Document offset argument.
414
16dd5e42
PB
4152006-09-16 Paul Brook <paul@codesourcery.com>
416
417 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
418 unsigned int to avoid 64-bit host problems.
419
c4ae04ce
BS
4202006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
421
422 * config/bfin-parse.y (binary): Do some more constant folding for
423 additions.
424
e5d4a5a6
JB
4252006-09-13 Jan Beulich <jbeulich@novell.com>
426
427 * input-file.c (input_file_give_next_buffer): Demote as_bad to
428 as_warn.
429
1a1219cb
AM
4302006-09-13 Alan Modra <amodra@bigpond.net.au>
431
432 PR gas/3165
433 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
434 in parens.
435
f79d9c1d
AM
4362006-09-13 Alan Modra <amodra@bigpond.net.au>
437
438 * input-file.c (input_file_open): Replace as_perror with as_bad
439 so that gas exits with error on file errors. Correct error
440 message.
441 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 442 * input-file.h: Update comment.
f79d9c1d 443
f512f76f
NC
4442006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
445
446 PR gas/3172
447 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
448 registers as a sub-class of wC registers.
449
8d79fd44
AM
4502006-09-11 Alan Modra <amodra@bigpond.net.au>
451
452 PR gas/3165
453 * config/tc-mips.h (enum dwarf2_format): Forward declare.
454 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
455 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
456 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
457
6258339f
NC
4582006-09-08 Nick Clifton <nickc@redhat.com>
459
460 PR gas/3129
461 * doc/as.texinfo (Macro): Improve documentation about separating
462 macro arguments from following text.
463
f91e006c
PB
4642006-09-08 Paul Brook <paul@codesourcery.com>
465
466 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
467
466bbf93
PB
4682006-09-07 Paul Brook <paul@codesourcery.com>
469
470 * config/tc-arm.c (parse_operands): Mark operand as present.
471
428e3f1f
PB
4722006-09-04 Paul Brook <paul@codesourcery.com>
473
474 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
475 (do_neon_dyadic_if_i_d): Avoid setting U bit.
476 (do_neon_mac_maybe_scalar): Ditto.
477 (do_neon_dyadic_narrow): Force operand type to NT_integer.
478 (insns): Remove out of date comments.
479
fb25138b
NC
4802006-08-29 Nick Clifton <nickc@redhat.com>
481
482 * read.c (s_align): Initialize the 'stopc' variable to prevent
483 compiler complaints about it being used without being
484 initialized.
485 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
486 s_float_space, s_struct, cons_worker, equals): Likewise.
487
5091343a
AM
4882006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
489
490 * ecoff.c (ecoff_directive_val): Fix message typo.
491 * config/tc-ns32k.c (convert_iif): Likewise.
492 * config/tc-sh64.c (shmedia_check_limits): Likewise.
493
1f2a7e38
BW
4942006-08-25 Sterling Augustine <sterling@tensilica.com>
495 Bob Wilson <bob.wilson@acm.org>
496
497 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
498 the state of the absolute_literals directive. Remove align frag at
499 the start of the literal pool position.
500
34135039
BW
5012006-08-25 Bob Wilson <bob.wilson@acm.org>
502
503 * doc/c-xtensa.texi: Add @group commands in examples.
504
74869ac7
BW
5052006-08-24 Bob Wilson <bob.wilson@acm.org>
506
507 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
508 (INIT_LITERAL_SECTION_NAME): Delete.
509 (lit_state struct): Remove segment names, init_lit_seg, and
510 fini_lit_seg. Add lit_prefix and current_text_seg.
511 (init_literal_head_h, init_literal_head): Delete.
512 (fini_literal_head_h, fini_literal_head): Delete.
513 (xtensa_begin_directive): Move argument parsing to
514 xtensa_literal_prefix function.
515 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
516 (xtensa_literal_prefix): Parse the directive argument here and
517 record it in the lit_prefix field. Remove code to derive literal
518 section names.
519 (linkonce_len): New.
520 (get_is_linkonce_section): Use linkonce_len. Check for any
521 ".gnu.linkonce.*" section, not just text sections.
522 (md_begin): Remove initialization of deleted lit_state fields.
523 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
524 to init_literal_head and fini_literal_head.
525 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
526 when traversing literal_head list.
527 (match_section_group): New.
528 (cache_literal_section): Rewrite to determine the literal section
529 name on the fly, create the section and return it.
530 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
531 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
532 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
533 Use xtensa_get_property_section from bfd.
534 (retrieve_xtensa_section): Delete.
535 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
536 description to refer to plural literal sections and add xref to
537 the Literal Directive section.
538 (Literal Directive): Describe new rules for deriving literal section
539 names. Add footnote for special case of .init/.fini with
540 --text-section-literals.
541 (Literal Prefix Directive): Replace old naming rules with xref to the
542 Literal Directive section.
543
87a1fd79
JM
5442006-08-21 Joseph Myers <joseph@codesourcery.com>
545
546 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
547 merging with previous long opcode.
548
7148cc28
NC
5492006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
550
551 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
552 * Makefile.in: Regenerate.
553 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
554 renamed. Adjust.
555
3e9e4fcf
JB
5562006-08-16 Julian Brown <julian@codesourcery.com>
557
558 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
559 to use ARM instructions on non-ARM-supporting cores.
560 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
561 mode automatically based on cpu variant.
562 (md_begin): Call above function.
563
267d2029
JB
5642006-08-16 Julian Brown <julian@codesourcery.com>
565
566 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
567 recognized in non-unified syntax mode.
568
4be041b2
TS
5692006-08-15 Thiemo Seufer <ths@mips.com>
570 Nigel Stephens <nigel@mips.com>
571 David Ung <davidu@mips.com>
572
573 * configure.tgt: Handle mips*-sde-elf*.
574
3a93f742
TS
5752006-08-12 Thiemo Seufer <ths@networkno.de>
576
577 * config/tc-mips.c (mips16_ip): Fix argument register handling
578 for restore instruction.
579
1737851b
BW
5802006-08-08 Bob Wilson <bob.wilson@acm.org>
581
582 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
583 (out_sleb128): New.
584 (out_fixed_inc_line_addr): New.
585 (process_entries): Use out_fixed_inc_line_addr when
586 DWARF2_USE_FIXED_ADVANCE_PC is set.
587 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
588
e14e52f8
DD
5892006-08-08 DJ Delorie <dj@redhat.com>
590
591 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
592 vs full symbols so that we never have more than one pointer value
593 for any given symbol in our symbol table.
594
802f5d9e
NC
5952006-08-08 Sterling Augustine <sterling@tensilica.com>
596
597 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
598 and emit DW_AT_ranges when code in compilation unit is not
599 contiguous.
600 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
601 is not contiguous.
602 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
603 (out_debug_ranges): New function to emit .debug_ranges section
604 when code is not contiguous.
605
720abc60
NC
6062006-08-08 Nick Clifton <nickc@redhat.com>
607
608 * config/tc-arm.c (WARN_DEPRECATED): Enable.
609
f0927246
NC
6102006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
611
612 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
613 only block.
614 (pe_directive_secrel) [TE_PE]: New function.
615 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
616 loc, loc_mark_labels.
617 [TE_PE]: Handle secrel32.
618 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
619 call.
620 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
621 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
622 (md_section_align): Only round section sizes here for AOUT
623 targets.
624 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
625 (tc_pe_dwarf2_emit_offset): New function.
626 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
627 (cons_fix_new_arm): Handle O_secrel.
628 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
629 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
630 of OBJ_ELF only block.
631 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
632 tc_pe_dwarf2_emit_offset.
633
55e6e397
RS
6342006-08-04 Richard Sandiford <richard@codesourcery.com>
635
636 * config/tc-sh.c (apply_full_field_fix): New function.
637 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
638 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
639 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
640 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
641
9cd19b17
NC
6422006-08-03 Nick Clifton <nickc@redhat.com>
643
644 PR gas/2991
645 * config.in: Regenerate.
646
97f87066
JM
6472006-08-03 Joseph Myers <joseph@codesourcery.com>
648
649 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 650 for OP_RIWR_RIWC.
97f87066 651
41adaa5c
JM
6522006-08-03 Joseph Myers <joseph@codesourcery.com>
653
654 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
655 (parse_operands): Handle it.
656 (insns): Use it for tmcr and tmrc.
657
9d7cbccd
NC
6582006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
659
660 PR binutils/2983
661 * config/tc-i386.c (md_parse_option): Treat any target starting
662 with elf64_x86_64 as a viable target for the -64 switch.
663 (i386_target_format): For 64-bit ELF flavoured output use
664 ELF_TARGET_FORMAT64.
665 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
666
c973bc5c
NC
6672006-08-02 Nick Clifton <nickc@redhat.com>
668
669 PR gas/2991
670 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
671 bfd/aclocal.m4.
672 * configure.in: Run BFD_BINARY_FOPEN.
673 * configure: Regenerate.
674 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
675 file to include.
676
cfde7f70
L
6772006-08-01 H.J. Lu <hongjiu.lu@intel.com>
678
679 * config/tc-i386.c (md_assemble): Don't update
680 cpu_arch_isa_flags.
681
b4c71f56
TS
6822006-08-01 Thiemo Seufer <ths@mips.com>
683
684 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
685
54f4ddb3
TS
6862006-08-01 Thiemo Seufer <ths@mips.com>
687
688 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
689 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
690 BFD_RELOC_32 and BFD_RELOC_16.
691 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
692 md_convert_frag, md_obj_end): Fix comment formatting.
693
d103cf61
TS
6942006-07-31 Thiemo Seufer <ths@mips.com>
695
696 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
697 handling for BFD_RELOC_MIPS16_JMP.
698
601e61cd
NC
6992006-07-24 Andreas Schwab <schwab@suse.de>
700
701 PR/2756
702 * read.c (read_a_source_file): Ignore unknown text after line
703 comment character. Fix misleading comment.
704
b45619c0
NC
7052006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
706
707 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
708 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
709 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
710 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
711 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
712 doc/c-z80.texi, doc/internals.texi: Fix some typos.
713
784906c5
NC
7142006-07-21 Nick Clifton <nickc@redhat.com>
715
716 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
717 linker testsuite.
718
d5f010e9
TS
7192006-07-20 Thiemo Seufer <ths@mips.com>
720 Nigel Stephens <nigel@mips.com>
721
722 * config/tc-mips.c (md_parse_option): Don't infer optimisation
723 options from debug options.
724
35d3d567
TS
7252006-07-20 Thiemo Seufer <ths@mips.com>
726
727 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
728 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
729
401a54cf
PB
7302006-07-19 Paul Brook <paul@codesourcery.com>
731
732 * config/tc-arm.c (insns): Fix rbit Arm opcode.
733
16805f35
PB
7342006-07-18 Paul Brook <paul@codesourcery.com>
735
736 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
737 (md_convert_frag): Use correct reloc for add_pc. Use
738 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
739 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
740 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
741
d9e05e4e
AM
7422006-07-17 Mat Hostetter <mat@lcs.mit.edu>
743
744 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
745 when file and line unknown.
746
f43abd2b
TS
7472006-07-17 Thiemo Seufer <ths@mips.com>
748
749 * read.c (s_struct): Use IS_ELF.
750 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
751 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
752 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
753 s_mips_mask): Likewise.
754
a2902af6
TS
7552006-07-16 Thiemo Seufer <ths@mips.com>
756 David Ung <davidu@mips.com>
757
758 * read.c (s_struct): Handle ELF section changing.
759 * config/tc-mips.c (s_align): Leave enabling auto-align to the
760 generic code.
761 (s_change_sec): Try section changing only if we output ELF.
762
d32cad65
L
7632006-07-15 H.J. Lu <hongjiu.lu@intel.com>
764
765 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
766 CpuAmdFam10.
767 (smallest_imm_type): Remove Cpu086.
768 (i386_target_format): Likewise.
769
770 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
771 Update CpuXXX.
772
050dfa73
MM
7732006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
774 Michael Meissner <michael.meissner@amd.com>
775
776 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
777 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
778 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
779 architecture.
780 (i386_align_code): Ditto.
781 (md_assemble_code): Add support for insertq/extrq instructions,
782 swapping as needed for intel syntax.
783 (swap_imm_operands): New function to swap immediate operands.
784 (swap_operands): Deal with 4 operand instructions.
785 (build_modrm_byte): Add support for insertq instruction.
786
6b2de085
L
7872006-07-13 H.J. Lu <hongjiu.lu@intel.com>
788
789 * config/tc-i386.h (Size64): Fix a typo in comment.
790
01eaea5a
NC
7912006-07-12 Nick Clifton <nickc@redhat.com>
792
793 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 794 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
795 already been checked here.
796
1e85aad8
JW
7972006-07-07 James E Wilson <wilson@specifix.com>
798
799 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
800
1370e33d
NC
8012006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
802 Nick Clifton <nickc@redhat.com>
803
804 PR binutils/2877
805 * doc/as.texi: Fix spelling typo: branchs => branches.
806 * doc/c-m68hc11.texi: Likewise.
807 * config/tc-m68hc11.c: Likewise.
808 Support old spelling of command line switch for backwards
809 compatibility.
810
5f0fe04b
TS
8112006-07-04 Thiemo Seufer <ths@mips.com>
812 David Ung <davidu@mips.com>
813
814 * config/tc-mips.c (s_is_linkonce): New function.
815 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
816 weak, external, and linkonce symbols.
817 (pic_need_relax): Use s_is_linkonce.
818
85234291
L
8192006-06-24 H.J. Lu <hongjiu.lu@intel.com>
820
821 * doc/as.texinfo (Org): Remove space.
822 (P2align): Add "@var{abs-expr},".
823
ccc9c027
L
8242006-06-23 H.J. Lu <hongjiu.lu@intel.com>
825
826 * config/tc-i386.c (cpu_arch_tune_set): New.
827 (cpu_arch_isa): Likewise.
828 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
829 nops with short or long nop sequences based on -march=/.arch
830 and -mtune=.
831 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
832 set cpu_arch_tune and cpu_arch_tune_flags.
833 (md_parse_option): For -march=, set cpu_arch_isa and set
834 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
835 0. Set cpu_arch_tune_set to 1 for -mtune=.
836 (i386_target_format): Don't set cpu_arch_tune.
837
d4dc2f22
TS
8382006-06-23 Nigel Stephens <nigel@mips.com>
839
840 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
841 generated .sbss.* and .gnu.linkonce.sb.*.
842
a8dbcb85
TS
8432006-06-23 Thiemo Seufer <ths@mips.com>
844 David Ung <davidu@mips.com>
845
846 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
847 label_list.
848 * config/tc-mips.c (label_list): Define per-segment label_list.
849 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
850 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
851 mips_from_file_after_relocs, mips_define_label): Use per-segment
852 label_list.
853
3994f87e
TS
8542006-06-22 Thiemo Seufer <ths@mips.com>
855
856 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
857 (append_insn): Use it.
858 (md_apply_fix): Whitespace formatting.
859 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
860 mips16_extended_frag): Remove register specifier.
861 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
862 constants.
863
fa073d69
MS
8642006-06-21 Mark Shinwell <shinwell@codesourcery.com>
865
866 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
867 a directive saving VFP registers for ARMv6 or later.
868 (s_arm_unwind_save): Add parameter arch_v6 and call
869 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
870 appropriate.
871 (md_pseudo_table): Add entry for new "vsave" directive.
872 * doc/c-arm.texi: Correct error in example for "save"
873 directive (fstmdf -> fstmdx). Also document "vsave" directive.
874
8e77b565 8752006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
876 Anatoly Sokolov <aesok@post.ru>
877
a70ae331
AM
878 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
879 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
880 atmega164p/atmega324p.
881 * doc/c-avr.texi: Document new mcu and arch options.
882
8b1ad454
NC
8832006-06-17 Nick Clifton <nickc@redhat.com>
884
885 * config/tc-arm.c (enum parse_operand_result): Move outside of
886 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
887
9103f4f4
L
8882006-06-16 H.J. Lu <hongjiu.lu@intel.com>
889
890 * config/tc-i386.h (processor_type): New.
891 (arch_entry): Add type.
892
893 * config/tc-i386.c (cpu_arch_tune): New.
894 (cpu_arch_tune_flags): Likewise.
895 (cpu_arch_isa_flags): Likewise.
896 (cpu_arch): Updated.
897 (set_cpu_arch): Also update cpu_arch_isa_flags.
898 (md_assemble): Update cpu_arch_isa_flags.
899 (OPTION_MARCH): New.
900 (OPTION_MTUNE): Likewise.
901 (md_longopts): Add -march= and -mtune=.
902 (md_parse_option): Support -march= and -mtune=.
903 (md_show_usage): Add -march=CPU/-mtune=CPU.
904 (i386_target_format): Also update cpu_arch_isa_flags,
905 cpu_arch_tune and cpu_arch_tune_flags.
906
907 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
908
909 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
910
4962c51a
MS
9112006-06-15 Mark Shinwell <shinwell@codesourcery.com>
912
913 * config/tc-arm.c (enum parse_operand_result): New.
914 (struct group_reloc_table_entry): New.
915 (enum group_reloc_type): New.
916 (group_reloc_table): New array.
917 (find_group_reloc_table_entry): New function.
918 (parse_shifter_operand_group_reloc): New function.
919 (parse_address_main): New function, incorporating code
920 from the old parse_address function. To be used via...
921 (parse_address): wrapper for parse_address_main; and
922 (parse_address_group_reloc): new function, likewise.
923 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
924 OP_ADDRGLDRS, OP_ADDRGLDC.
925 (parse_operands): Support for these new operand codes.
926 New macro po_misc_or_fail_no_backtrack.
927 (encode_arm_cp_address): Preserve group relocations.
928 (insns): Modify to use the above operand codes where group
929 relocations are permitted.
930 (md_apply_fix): Handle the group relocations
931 ALU_PC_G0_NC through LDC_SB_G2.
932 (tc_gen_reloc): Likewise.
933 (arm_force_relocation): Leave group relocations for the linker.
934 (arm_fix_adjustable): Likewise.
935
cd2f129f
JB
9362006-06-15 Julian Brown <julian@codesourcery.com>
937
938 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
939 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
940 relocs properly.
941
46e883c5
L
9422006-06-12 H.J. Lu <hongjiu.lu@intel.com>
943
944 * config/tc-i386.c (process_suffix): Don't add rex64 for
945 "xchg %rax,%rax".
946
1787fe5b
TS
9472006-06-09 Thiemo Seufer <ths@mips.com>
948
949 * config/tc-mips.c (mips_ip): Maintain argument count.
950
96f989c2
AM
9512006-06-09 Alan Modra <amodra@bigpond.net.au>
952
953 * config/tc-iq2000.c: Include sb.h.
954
7c752c2a
TS
9552006-06-08 Nigel Stephens <nigel@mips.com>
956
957 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
958 aliases for better compatibility with SGI tools.
959
03bf704f
AM
9602006-06-08 Alan Modra <amodra@bigpond.net.au>
961
962 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
963 * Makefile.am (GASLIBS): Expand @BFDLIB@.
964 (BFDVER_H): Delete.
965 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
966 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
967 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
968 Run "make dep-am".
969 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
970 * Makefile.in: Regenerate.
971 * doc/Makefile.in: Regenerate.
972 * configure: Regenerate.
973
6648b7cf
JM
9742006-06-07 Joseph S. Myers <joseph@codesourcery.com>
975
976 * po/Make-in (pdf, ps): New dummy targets.
977
037e8744
JB
9782006-06-07 Julian Brown <julian@codesourcery.com>
979
980 * config/tc-arm.c (stdarg.h): include.
981 (arm_it): Add uncond_value field. Add isvec and issingle to operand
982 array.
983 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
984 REG_TYPE_NSDQ (single, double or quad vector reg).
985 (reg_expected_msgs): Update.
986 (BAD_FPU): Add macro for unsupported FPU instruction error.
987 (parse_neon_type): Support 'd' as an alias for .f64.
988 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
989 sets of registers.
990 (parse_vfp_reg_list): Don't update first arg on error.
991 (parse_neon_mov): Support extra syntax for VFP moves.
992 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
993 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
994 (parse_operands): Support isvec, issingle operands fields, new parse
995 codes above.
996 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
997 msr variants.
998 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
999 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1000 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1001 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1002 shapes.
1003 (neon_shape): Redefine in terms of above.
1004 (neon_shape_class): New enumeration, table of shape classes.
1005 (neon_shape_el): New enumeration. One element of a shape.
1006 (neon_shape_el_size): Register widths of above, where appropriate.
1007 (neon_shape_info): New struct. Info for shape table.
1008 (neon_shape_tab): New array.
1009 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1010 (neon_check_shape): Rewrite as...
1011 (neon_select_shape): New function to classify instruction shapes,
1012 driven by new table neon_shape_tab array.
1013 (neon_quad): New function. Return 1 if shape should set Q flag in
1014 instructions (or equivalent), 0 otherwise.
1015 (type_chk_of_el_type): Support F64.
1016 (el_type_of_type_chk): Likewise.
1017 (neon_check_type): Add support for VFP type checking (VFP data
1018 elements fill their containing registers).
1019 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1020 in thumb mode for VFP instructions.
1021 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1022 and encode the current instruction as if it were that opcode.
1023 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1024 arguments, call function in PFN.
1025 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1026 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1027 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1028 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1029 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1030 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1031 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1032 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1033 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1034 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1035 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1036 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1037 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1038 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1039 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1040 neon_quad.
1041 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1042 between VFP and Neon turns out to belong to Neon. Perform
1043 architecture check and fill in condition field if appropriate.
1044 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1045 (do_neon_cvt): Add support for VFP variants of instructions.
1046 (neon_cvt_flavour): Extend to cover VFP conversions.
1047 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1048 vmov variants.
1049 (do_neon_ldr_str): Handle single-precision VFP load/store.
1050 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1051 NS_NULL not NS_IGNORE.
1052 (opcode_tag): Add OT_csuffixF for operands which either take a
1053 conditional suffix, or have 0xF in the condition field.
1054 (md_assemble): Add support for OT_csuffixF.
1055 (NCE): Replace macro with...
1056 (NCE_tag, NCE, NCEF): New macros.
1057 (nCE): Replace macro with...
1058 (nCE_tag, nCE, nCEF): New macros.
1059 (insns): Add support for VFP insns or VFP versions of insns msr,
1060 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1061 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1062 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1063 VFP/Neon insns together.
1064
ebd1c875
AM
10652006-06-07 Alan Modra <amodra@bigpond.net.au>
1066 Ladislav Michl <ladis@linux-mips.org>
1067
1068 * app.c: Don't include headers already included by as.h.
1069 * as.c: Likewise.
1070 * atof-generic.c: Likewise.
1071 * cgen.c: Likewise.
1072 * dwarf2dbg.c: Likewise.
1073 * expr.c: Likewise.
1074 * input-file.c: Likewise.
1075 * input-scrub.c: Likewise.
1076 * macro.c: Likewise.
1077 * output-file.c: Likewise.
1078 * read.c: Likewise.
1079 * sb.c: Likewise.
1080 * config/bfin-lex.l: Likewise.
1081 * config/obj-coff.h: Likewise.
1082 * config/obj-elf.h: Likewise.
1083 * config/obj-som.h: Likewise.
1084 * config/tc-arc.c: Likewise.
1085 * config/tc-arm.c: Likewise.
1086 * config/tc-avr.c: Likewise.
1087 * config/tc-bfin.c: Likewise.
1088 * config/tc-cris.c: Likewise.
1089 * config/tc-d10v.c: Likewise.
1090 * config/tc-d30v.c: Likewise.
1091 * config/tc-dlx.h: Likewise.
1092 * config/tc-fr30.c: Likewise.
1093 * config/tc-frv.c: Likewise.
1094 * config/tc-h8300.c: Likewise.
1095 * config/tc-hppa.c: Likewise.
1096 * config/tc-i370.c: Likewise.
1097 * config/tc-i860.c: Likewise.
1098 * config/tc-i960.c: Likewise.
1099 * config/tc-ip2k.c: Likewise.
1100 * config/tc-iq2000.c: Likewise.
1101 * config/tc-m32c.c: Likewise.
1102 * config/tc-m32r.c: Likewise.
1103 * config/tc-maxq.c: Likewise.
1104 * config/tc-mcore.c: Likewise.
1105 * config/tc-mips.c: Likewise.
1106 * config/tc-mmix.c: Likewise.
1107 * config/tc-mn10200.c: Likewise.
1108 * config/tc-mn10300.c: Likewise.
1109 * config/tc-msp430.c: Likewise.
1110 * config/tc-mt.c: Likewise.
1111 * config/tc-ns32k.c: Likewise.
1112 * config/tc-openrisc.c: Likewise.
1113 * config/tc-ppc.c: Likewise.
1114 * config/tc-s390.c: Likewise.
1115 * config/tc-sh.c: Likewise.
1116 * config/tc-sh64.c: Likewise.
1117 * config/tc-sparc.c: Likewise.
1118 * config/tc-tic30.c: Likewise.
1119 * config/tc-tic4x.c: Likewise.
1120 * config/tc-tic54x.c: Likewise.
1121 * config/tc-v850.c: Likewise.
1122 * config/tc-vax.c: Likewise.
1123 * config/tc-xc16x.c: Likewise.
1124 * config/tc-xstormy16.c: Likewise.
1125 * config/tc-xtensa.c: Likewise.
1126 * config/tc-z80.c: Likewise.
1127 * config/tc-z8k.c: Likewise.
1128 * macro.h: Don't include sb.h or ansidecl.h.
1129 * sb.h: Don't include stdio.h or ansidecl.h.
1130 * cond.c: Include sb.h.
1131 * itbl-lex.l: Include as.h instead of other system headers.
1132 * itbl-parse.y: Likewise.
1133 * itbl-ops.c: Similarly.
1134 * itbl-ops.h: Don't include as.h or ansidecl.h.
1135 * config/bfin-defs.h: Don't include bfd.h or as.h.
1136 * config/bfin-parse.y: Include as.h instead of other system headers.
1137
9622b051
AM
11382006-06-06 Ben Elliston <bje@au.ibm.com>
1139 Anton Blanchard <anton@samba.org>
1140
1141 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1142 (md_show_usage): Document it.
1143 (ppc_setup_opcodes): Test power6 opcode flag bits.
1144 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1145
65263ce3
TS
11462006-06-06 Thiemo Seufer <ths@mips.com>
1147 Chao-ying Fu <fu@mips.com>
1148
1149 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1150 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1151 (macro_build): Update comment.
1152 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1153 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1154 CPU_HAS_MDMX.
1155 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1156 MIPS_CPU_ASE_MDMX flags for sb1.
1157
a9e24354
TS
11582006-06-05 Thiemo Seufer <ths@mips.com>
1159
1160 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1161 appropriate.
1162 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1163 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1164 and MT instructions a fatal error. Use INSERT_OPERAND where
1165 appropriate. Improve warnings for break and wait code overflows.
1166 Use symbolic constant of OP_MASK_COPZ.
1167 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1168
4cfe2c59
DJ
11692006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1170
1171 * po/Make-in (top_builddir): Define.
1172
e10fad12
JM
11732006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1174
1175 * doc/Makefile.am (TEXI2DVI): Define.
1176 * doc/Makefile.in: Regenerate.
1177 * doc/c-arc.texi: Fix typo.
1178
12e64c2c
AM
11792006-06-01 Alan Modra <amodra@bigpond.net.au>
1180
1181 * config/obj-ieee.c: Delete.
1182 * config/obj-ieee.h: Delete.
1183 * Makefile.am (OBJ_FORMATS): Remove ieee.
1184 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1185 (obj-ieee.o): Remove rule.
1186 * Makefile.in: Regenerate.
1187 * configure.in (atof): Remove tahoe.
1188 (OBJ_MAYBE_IEEE): Don't define.
1189 * configure: Regenerate.
1190 * config.in: Regenerate.
1191 * doc/Makefile.in: Regenerate.
1192 * po/POTFILES.in: Regenerate.
1193
20e95c23
DJ
11942006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1195
1196 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1197 and LIBINTL_DEP everywhere.
1198 (INTLLIBS): Remove.
1199 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1200 * acinclude.m4: Include new gettext macros.
1201 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1202 Remove local code for po/Makefile.
1203 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1204
eebf07fb
NC
12052006-05-30 Nick Clifton <nickc@redhat.com>
1206
1207 * po/es.po: Updated Spanish translation.
1208
b6aee19e
DC
12092006-05-06 Denis Chertykov <denisc@overta.ru>
1210
1211 * doc/c-avr.texi: New file.
1212 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1213 * doc/all.texi: Set AVR
1214 * doc/as.texinfo: Include c-avr.texi
1215
f8fdc850 12162006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1217
f8fdc850
JZ
1218 * config/bfin-parse.y (check_macfunc): Loose the condition of
1219 calling check_multiply_halfregs ().
1220
a3205465
JZ
12212006-05-25 Jie Zhang <jie.zhang@analog.com>
1222
1223 * config/bfin-parse.y (asm_1): Better check and deal with
1224 vector and scalar Multiply 16-Bit Operands instructions.
1225
9b52905e
NC
12262006-05-24 Nick Clifton <nickc@redhat.com>
1227
1228 * config/tc-hppa.c: Convert to ISO C90 format.
1229 * config/tc-hppa.h: Likewise.
1230
12312006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1232 Randolph Chung <randolph@tausq.org>
a70ae331 1233
9b52905e
NC
1234 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1235 is_tls_ieoff, is_tls_leoff): Define.
1236 (fix_new_hppa): Handle TLS.
1237 (cons_fix_new_hppa): Likewise.
1238 (pa_ip): Likewise.
1239 (md_apply_fix): Handle TLS relocs.
1240 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1241
a70ae331 12422006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1243
1244 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1245
ad3fea08
TS
12462006-05-23 Thiemo Seufer <ths@mips.com>
1247 David Ung <davidu@mips.com>
1248 Nigel Stephens <nigel@mips.com>
1249
1250 [ gas/ChangeLog ]
1251 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1252 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1253 ISA_HAS_MXHC1): New macros.
1254 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1255 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1256 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1257 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1258 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1259 (mips_after_parse_args): Change default handling of float register
1260 size to account for 32bit code with 64bit FP. Better sanity checking
1261 of ISA/ASE/ABI option combinations.
1262 (s_mipsset): Support switching of GPR and FPR sizes via
1263 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1264 options.
1265 (mips_elf_final_processing): We should record the use of 64bit FP
1266 registers in 32bit code but we don't, because ELF header flags are
1267 a scarce ressource.
1268 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1269 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1270 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1271 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1272 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1273 missing -march options. Document .set arch=CPU. Move .set smartmips
1274 to ASE page. Use @code for .set FOO examples.
1275
8b64503a
JZ
12762006-05-23 Jie Zhang <jie.zhang@analog.com>
1277
1278 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1279 if needed.
1280
403022e0
JZ
12812006-05-23 Jie Zhang <jie.zhang@analog.com>
1282
1283 * config/bfin-defs.h (bfin_equals): Remove declaration.
1284 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1285 * config/tc-bfin.c (bfin_name_is_register): Remove.
1286 (bfin_equals): Remove.
1287 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1288 (bfin_name_is_register): Remove declaration.
1289
7455baf8
TS
12902006-05-19 Thiemo Seufer <ths@mips.com>
1291 Nigel Stephens <nigel@mips.com>
1292
1293 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1294 (mips_oddfpreg_ok): New function.
1295 (mips_ip): Use it.
1296
707bfff6
TS
12972006-05-19 Thiemo Seufer <ths@mips.com>
1298 David Ung <davidu@mips.com>
1299
1300 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1301 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1302 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1303 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1304 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1305 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1306 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1307 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1308 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1309 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1310 reg_names_o32, reg_names_n32n64): Define register classes.
1311 (reg_lookup): New function, use register classes.
1312 (md_begin): Reserve register names in the symbol table. Simplify
1313 OBJ_ELF defines.
1314 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1315 Use reg_lookup.
1316 (mips16_ip): Use reg_lookup.
1317 (tc_get_register): Likewise.
1318 (tc_mips_regname_to_dw2regnum): New function.
1319
1df69f4f
TS
13202006-05-19 Thiemo Seufer <ths@mips.com>
1321
1322 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1323 Un-constify string argument.
1324 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1325 Likewise.
1326 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1327 Likewise.
1328 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1329 Likewise.
1330 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1331 Likewise.
1332 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1333 Likewise.
1334 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1335 Likewise.
1336
377260ba
NS
13372006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1338
1339 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1340 cfloat/m68881 to correct architecture before using it.
1341
cce7653b
NC
13422006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1343
a70ae331 1344 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1345 constant values.
1346
b0796911
PB
13472006-05-15 Paul Brook <paul@codesourcery.com>
1348
1349 * config/tc-arm.c (arm_adjust_symtab): Use
1350 bfd_is_arm_special_symbol_name.
1351
64b607e6
BW
13522006-05-15 Bob Wilson <bob.wilson@acm.org>
1353
1354 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1355 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1356 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1357 Handle errors from calls to xtensa_opcode_is_* functions.
1358
9b3f89ee
TS
13592006-05-14 Thiemo Seufer <ths@mips.com>
1360
1361 * config/tc-mips.c (macro_build): Test for currently active
1362 mips16 option.
1363 (mips16_ip): Reject invalid opcodes.
1364
370b66a1
CD
13652006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1366
1367 * doc/as.texinfo: Rename "Index" to "AS Index",
1368 and "ABORT" to "ABORT (COFF)".
1369
b6895b4f
PB
13702006-05-11 Paul Brook <paul@codesourcery.com>
1371
1372 * config/tc-arm.c (parse_half): New function.
1373 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1374 (parse_operands): Ditto.
1375 (do_mov16): Reject invalid relocations.
1376 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1377 (insns): Replace Iffff with HALF.
1378 (md_apply_fix): Add MOVW and MOVT relocs.
1379 (tc_gen_reloc): Ditto.
1380 * doc/c-arm.texi: Document relocation operators
1381
e28387c3
PB
13822006-05-11 Paul Brook <paul@codesourcery.com>
1383
1384 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1385
89ee2ebe
TS
13862006-05-11 Thiemo Seufer <ths@mips.com>
1387
1388 * config/tc-mips.c (append_insn): Don't check the range of j or
1389 jal addresses.
1390
53baae48
NC
13912006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1392
1393 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1394 relocs against external symbols for WinCE targets.
53baae48
NC
1395 (md_apply_fix): Likewise.
1396
4e2a74a8
TS
13972006-05-09 David Ung <davidu@mips.com>
1398
1399 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1400 j or jal address.
1401
337ff0a5
NC
14022006-05-09 Nick Clifton <nickc@redhat.com>
1403
1404 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1405 against symbols which are not going to be placed into the symbol
1406 table.
1407
8c9f705e
BE
14082006-05-09 Ben Elliston <bje@au.ibm.com>
1409
1410 * expr.c (operand): Remove `if (0 && ..)' statement and
1411 subsequently unused target_op label. Collapse `if (1 || ..)'
1412 statement.
1413 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1414 separately above the switch.
1415
2fd0d2ac
NC
14162006-05-08 Nick Clifton <nickc@redhat.com>
1417
1418 PR gas/2623
1419 * config/tc-msp430.c (line_separator_character): Define as |.
1420
e16bfa71
TS
14212006-05-08 Thiemo Seufer <ths@mips.com>
1422 Nigel Stephens <nigel@mips.com>
1423 David Ung <davidu@mips.com>
1424
1425 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1426 (mips_opts): Likewise.
1427 (file_ase_smartmips): New variable.
1428 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1429 (macro_build): Handle SmartMIPS instructions.
1430 (mips_ip): Likewise.
1431 (md_longopts): Add argument handling for smartmips.
1432 (md_parse_options, mips_after_parse_args): Likewise.
1433 (s_mipsset): Add .set smartmips support.
1434 (md_show_usage): Document -msmartmips/-mno-smartmips.
1435 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1436 .set smartmips.
1437 * doc/c-mips.texi: Likewise.
1438
32638454
AM
14392006-05-08 Alan Modra <amodra@bigpond.net.au>
1440
1441 * write.c (relax_segment): Add pass count arg. Don't error on
1442 negative org/space on first two passes.
1443 (relax_seg_info): New struct.
1444 (relax_seg, write_object_file): Adjust.
1445 * write.h (relax_segment): Update prototype.
1446
b7fc2769
JB
14472006-05-05 Julian Brown <julian@codesourcery.com>
1448
1449 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1450 checking.
1451 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1452 architecture version checks.
1453 (insns): Allow overlapping instructions to be used in VFP mode.
1454
7f841127
L
14552006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1456
1457 PR gas/2598
1458 * config/obj-elf.c (obj_elf_change_section): Allow user
1459 specified SHF_ALPHA_GPREL.
1460
73160847
NC
14612006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1462
1463 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1464 for PMEM related expressions.
1465
56487c55
NC
14662006-05-05 Nick Clifton <nickc@redhat.com>
1467
1468 PR gas/2582
1469 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1470 insertion of a directory separator character into a string at a
1471 given offset. Uses heuristics to decide when to use a backslash
1472 character rather than a forward-slash character.
1473 (dwarf2_directive_loc): Use the macro.
1474 (out_debug_info): Likewise.
1475
d43b4baf
TS
14762006-05-05 Thiemo Seufer <ths@mips.com>
1477 David Ung <davidu@mips.com>
1478
1479 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1480 instruction.
1481 (macro): Add new case M_CACHE_AB.
1482
088fa78e
KH
14832006-05-04 Kazu Hirata <kazu@codesourcery.com>
1484
1485 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1486 (opcode_lookup): Issue a warning for opcode with
1487 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1488 identical to OT_cinfix3.
1489 (TxC3w, TC3w, tC3w): New.
1490 (insns): Use tC3w and TC3w for comparison instructions with
1491 's' suffix.
1492
c9049d30
AM
14932006-05-04 Alan Modra <amodra@bigpond.net.au>
1494
1495 * subsegs.h (struct frchain): Delete frch_seg.
1496 (frchain_root): Delete.
1497 (seg_info): Define as macro.
1498 * subsegs.c (frchain_root): Delete.
1499 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1500 (subsegs_begin, subseg_change): Adjust for above.
1501 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1502 rather than to one big list.
1503 (subseg_get): Don't special case abs, und sections.
1504 (subseg_new, subseg_force_new): Don't set frchainP here.
1505 (seg_info): Delete.
1506 (subsegs_print_statistics): Adjust frag chain control list traversal.
1507 * debug.c (dmp_frags): Likewise.
1508 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1509 at frchain_root. Make use of known frchain ordering.
1510 (last_frag_for_seg): Likewise.
1511 (get_frag_fix): Likewise. Add seg param.
1512 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1513 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1514 (SUB_SEGMENT_ALIGN): Likewise.
1515 (subsegs_finish): Adjust frchain list traversal.
1516 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1517 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1518 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1519 (xtensa_fix_b_j_loop_end_frags): Likewise.
1520 (xtensa_fix_close_loop_end_frags): Likewise.
1521 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1522 (retrieve_segment_info): Delete frch_seg initialisation.
1523
f592407e
AM
15242006-05-03 Alan Modra <amodra@bigpond.net.au>
1525
1526 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1527 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1528 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1529 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1530
df7849c5
JM
15312006-05-02 Joseph Myers <joseph@codesourcery.com>
1532
1533 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1534 here.
1535 (md_apply_fix3): Multiply offset by 4 here for
1536 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1537
2d545b82
L
15382006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1539 Jan Beulich <jbeulich@novell.com>
1540
1541 * config/tc-i386.c (output_invalid_buf): Change size for
1542 unsigned char.
1543 * config/tc-tic30.c (output_invalid_buf): Likewise.
1544
1545 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1546 unsigned char.
1547 * config/tc-tic30.c (output_invalid): Likewise.
1548
38fc1cb1
DJ
15492006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1550
1551 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1552 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1553 (asconfig.texi): Don't set top_srcdir.
1554 * doc/as.texinfo: Don't use top_srcdir.
1555 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1556
2d545b82
L
15572006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1558
1559 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1560 * config/tc-tic30.c (output_invalid_buf): Likewise.
1561
1562 * config/tc-i386.c (output_invalid): Use snprintf instead of
1563 sprintf.
1564 * config/tc-ia64.c (declare_register_set): Likewise.
1565 (emit_one_bundle): Likewise.
1566 (check_dependencies): Likewise.
1567 * config/tc-tic30.c (output_invalid): Likewise.
1568
a8bc6c78
PB
15692006-05-02 Paul Brook <paul@codesourcery.com>
1570
1571 * config/tc-arm.c (arm_optimize_expr): New function.
1572 * config/tc-arm.h (md_optimize_expr): Define
1573 (arm_optimize_expr): Add prototype.
1574 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1575
58633d9a
BE
15762006-05-02 Ben Elliston <bje@au.ibm.com>
1577
22772e33
BE
1578 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1579 field unsigned.
1580
58633d9a
BE
1581 * sb.h (sb_list_vector): Move to sb.c.
1582 * sb.c (free_list): Use type of sb_list_vector directly.
1583 (sb_build): Fix off-by-one error in assertion about `size'.
1584
89cdfe57
BE
15852006-05-01 Ben Elliston <bje@au.ibm.com>
1586
1587 * listing.c (listing_listing): Remove useless loop.
1588 * macro.c (macro_expand): Remove is_positional local variable.
1589 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1590 and simplify surrounding expressions, where possible.
1591 (assign_symbol): Likewise.
1592 (s_weakref): Likewise.
1593 * symbols.c (colon): Likewise.
1594
c35da140
AM
15952006-05-01 James Lemke <jwlemke@wasabisystems.com>
1596
1597 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1598
9bcd4f99
TS
15992006-04-30 Thiemo Seufer <ths@mips.com>
1600 David Ung <davidu@mips.com>
1601
1602 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1603 (mips_immed): New table that records various handling of udi
1604 instruction patterns.
1605 (mips_ip): Adds udi handling.
1606
001ae1a4
AM
16072006-04-28 Alan Modra <amodra@bigpond.net.au>
1608
1609 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1610 of list rather than beginning.
1611
136da414
JB
16122006-04-26 Julian Brown <julian@codesourcery.com>
1613
1614 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1615 (is_quarter_float): Rename from above. Simplify slightly.
1616 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1617 number.
1618 (parse_neon_mov): Parse floating-point constants.
1619 (neon_qfloat_bits): Fix encoding.
1620 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1621 preference to integer encoding when using the F32 type.
1622
dcbf9037
JB
16232006-04-26 Julian Brown <julian@codesourcery.com>
1624
1625 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1626 zero-initialising structures containing it will lead to invalid types).
1627 (arm_it): Add vectype to each operand.
1628 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1629 defined field.
1630 (neon_typed_alias): New structure. Extra information for typed
1631 register aliases.
1632 (reg_entry): Add neon type info field.
1633 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1634 Break out alternative syntax for coprocessor registers, etc. into...
1635 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1636 out from arm_reg_parse.
1637 (parse_neon_type): Move. Return SUCCESS/FAIL.
1638 (first_error): New function. Call to ensure first error which occurs is
1639 reported.
1640 (parse_neon_operand_type): Parse exactly one type.
1641 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1642 (parse_typed_reg_or_scalar): New function. Handle core of both
1643 arm_typed_reg_parse and parse_scalar.
1644 (arm_typed_reg_parse): Parse a register with an optional type.
1645 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1646 result.
1647 (parse_scalar): Parse a Neon scalar with optional type.
1648 (parse_reg_list): Use first_error.
1649 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1650 (neon_alias_types_same): New function. Return true if two (alias) types
1651 are the same.
1652 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1653 of elements.
1654 (insert_reg_alias): Return new reg_entry not void.
1655 (insert_neon_reg_alias): New function. Insert type/index information as
1656 well as register for alias.
1657 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1658 make typed register aliases accordingly.
1659 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1660 of line.
1661 (s_unreq): Delete type information if present.
1662 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1663 (s_arm_unwind_save_mmxwcg): Likewise.
1664 (s_arm_unwind_movsp): Likewise.
1665 (s_arm_unwind_setfp): Likewise.
1666 (parse_shift): Likewise.
1667 (parse_shifter_operand): Likewise.
1668 (parse_address): Likewise.
1669 (parse_tb): Likewise.
1670 (tc_arm_regname_to_dw2regnum): Likewise.
1671 (md_pseudo_table): Add dn, qn.
1672 (parse_neon_mov): Handle typed operands.
1673 (parse_operands): Likewise.
1674 (neon_type_mask): Add N_SIZ.
1675 (N_ALLMODS): New macro.
1676 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1677 (el_type_of_type_chk): Add some safeguards.
1678 (modify_types_allowed): Fix logic bug.
1679 (neon_check_type): Handle operands with types.
1680 (neon_three_same): Remove redundant optional arg handling.
1681 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1682 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1683 (do_neon_step): Adjust accordingly.
1684 (neon_cmode_for_logic_imm): Use first_error.
1685 (do_neon_bitfield): Call neon_check_type.
1686 (neon_dyadic): Rename to...
1687 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1688 to allow modification of type of the destination.
1689 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1690 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1691 (do_neon_compare): Make destination be an untyped bitfield.
1692 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1693 (neon_mul_mac): Return early in case of errors.
1694 (neon_move_immediate): Use first_error.
1695 (neon_mac_reg_scalar_long): Fix type to include scalar.
1696 (do_neon_dup): Likewise.
1697 (do_neon_mov): Likewise (in several places).
1698 (do_neon_tbl_tbx): Fix type.
1699 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1700 (do_neon_ld_dup): Exit early in case of errors and/or use
1701 first_error.
1702 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1703 Handle .dn/.qn directives.
1704 (REGDEF): Add zero for reg_entry neon field.
1705
5287ad62
JB
17062006-04-26 Julian Brown <julian@codesourcery.com>
1707
1708 * config/tc-arm.c (limits.h): Include.
1709 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1710 (fpu_vfp_v3_or_neon_ext): Declare constants.
1711 (neon_el_type): New enumeration of types for Neon vector elements.
1712 (neon_type_el): New struct. Define type and size of a vector element.
1713 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1714 instruction.
1715 (neon_type): Define struct. The type of an instruction.
1716 (arm_it): Add 'vectype' for the current instruction.
1717 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1718 (vfp_sp_reg_pos): Rename to...
1719 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1720 tags.
1721 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1722 (Neon D or Q register).
1723 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1724 register.
1725 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1726 (my_get_expression): Allow above constant as argument to accept
1727 64-bit constants with optional prefix.
1728 (arm_reg_parse): Add extra argument to return the specific type of
1729 register in when either a D or Q register (REG_TYPE_NDQ) is
1730 requested. Can be NULL.
1731 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1732 (parse_reg_list): Update for new arm_reg_parse args.
1733 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1734 (parse_neon_el_struct_list): New function. Parse element/structure
1735 register lists for VLD<n>/VST<n> instructions.
1736 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1737 (s_arm_unwind_save_mmxwr): Likewise.
1738 (s_arm_unwind_save_mmxwcg): Likewise.
1739 (s_arm_unwind_movsp): Likewise.
1740 (s_arm_unwind_setfp): Likewise.
1741 (parse_big_immediate): New function. Parse an immediate, which may be
1742 64 bits wide. Put results in inst.operands[i].
1743 (parse_shift): Update for new arm_reg_parse args.
1744 (parse_address): Likewise. Add parsing of alignment specifiers.
1745 (parse_neon_mov): Parse the operands of a VMOV instruction.
1746 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1747 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1748 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1749 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1750 (parse_operands): Handle new codes above.
1751 (encode_arm_vfp_sp_reg): Rename to...
1752 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1753 selected VFP version only supports D0-D15.
1754 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1755 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1756 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1757 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1758 encode_arm_vfp_reg name, and allow 32 D regs.
1759 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1760 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1761 regs.
1762 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1763 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1764 constant-load and conversion insns introduced with VFPv3.
1765 (neon_tab_entry): New struct.
1766 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1767 those which are the targets of pseudo-instructions.
1768 (neon_opc): Enumerate opcodes, use as indices into...
1769 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1770 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1771 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1772 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1773 neon_enc_tab.
1774 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1775 Neon instructions.
1776 (neon_type_mask): New. Compact type representation for type checking.
1777 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1778 permitted type combinations.
1779 (N_IGNORE_TYPE): New macro.
1780 (neon_check_shape): New function. Check an instruction shape for
1781 multiple alternatives. Return the specific shape for the current
1782 instruction.
1783 (neon_modify_type_size): New function. Modify a vector type and size,
1784 depending on the bit mask in argument 1.
1785 (neon_type_promote): New function. Convert a given "key" type (of an
1786 operand) into the correct type for a different operand, based on a bit
1787 mask.
1788 (type_chk_of_el_type): New function. Convert a type and size into the
1789 compact representation used for type checking.
1790 (el_type_of_type_ckh): New function. Reverse of above (only when a
1791 single bit is set in the bit mask).
1792 (modify_types_allowed): New function. Alter a mask of allowed types
1793 based on a bit mask of modifications.
1794 (neon_check_type): New function. Check the type of the current
1795 instruction against the variable argument list. The "key" type of the
1796 instruction is returned.
1797 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1798 a Neon data-processing instruction depending on whether we're in ARM
1799 mode or Thumb-2 mode.
1800 (neon_logbits): New function.
1801 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1802 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1803 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1804 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1805 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1806 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1807 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1808 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1809 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1810 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1811 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1812 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1813 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1814 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1815 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1816 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1817 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1818 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1819 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1820 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1821 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1822 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1823 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1824 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1825 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1826 helpers.
1827 (parse_neon_type): New function. Parse Neon type specifier.
1828 (opcode_lookup): Allow parsing of Neon type specifiers.
1829 (REGNUM2, REGSETH, REGSET2): New macros.
1830 (reg_names): Add new VFPv3 and Neon registers.
1831 (NUF, nUF, NCE, nCE): New macros for opcode table.
1832 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1833 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1834 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1835 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1836 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1837 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1838 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1839 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1840 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1841 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1842 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1843 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1844 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1845 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1846 fto[us][lh][sd].
1847 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1848 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1849 (arm_option_cpu_value): Add vfp3 and neon.
1850 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1851 VFPv1 attribute.
1852
1946c96e
BW
18532006-04-25 Bob Wilson <bob.wilson@acm.org>
1854
1855 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1856 syntax instead of hardcoded opcodes with ".w18" suffixes.
1857 (wide_branch_opcode): New.
1858 (build_transition): Use it to check for wide branch opcodes with
1859 either ".w18" or ".w15" suffixes.
1860
5033a645
BW
18612006-04-25 Bob Wilson <bob.wilson@acm.org>
1862
1863 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1864 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1865 frag's is_literal flag.
1866
395fa56f
BW
18672006-04-25 Bob Wilson <bob.wilson@acm.org>
1868
1869 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1870
708587a4
KH
18712006-04-23 Kazu Hirata <kazu@codesourcery.com>
1872
1873 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1874 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1875 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1876 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1877 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1878
8463be01
PB
18792005-04-20 Paul Brook <paul@codesourcery.com>
1880
1881 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1882 all targets.
1883 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1884
f26a5955
AM
18852006-04-19 Alan Modra <amodra@bigpond.net.au>
1886
1887 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1888 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1889 Make some cpus unsupported on ELF. Run "make dep-am".
1890 * Makefile.in: Regenerate.
1891
241a6c40
AM
18922006-04-19 Alan Modra <amodra@bigpond.net.au>
1893
1894 * configure.in (--enable-targets): Indent help message.
1895 * configure: Regenerate.
1896
bb8f5920
L
18972006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1898
1899 PR gas/2533
1900 * config/tc-i386.c (i386_immediate): Check illegal immediate
1901 register operand.
1902
23d9d9de
AM
19032006-04-18 Alan Modra <amodra@bigpond.net.au>
1904
64e74474
AM
1905 * config/tc-i386.c: Formatting.
1906 (output_disp, output_imm): ISO C90 params.
1907
6cbe03fb
AM
1908 * frags.c (frag_offset_fixed_p): Constify args.
1909 * frags.h (frag_offset_fixed_p): Ditto.
1910
23d9d9de
AM
1911 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1912 (COFF_MAGIC): Delete.
a37d486e
AM
1913
1914 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1915
e7403566
DJ
19162006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1917
1918 * po/POTFILES.in: Regenerated.
1919
58ab4f3d
MM
19202006-04-16 Mark Mitchell <mark@codesourcery.com>
1921
1922 * doc/as.texinfo: Mention that some .type syntaxes are not
1923 supported on all architectures.
1924
482fd9f9
BW
19252006-04-14 Sterling Augustine <sterling@tensilica.com>
1926
1927 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1928 instructions when such transformations have been disabled.
1929
05d58145
BW
19302006-04-10 Sterling Augustine <sterling@tensilica.com>
1931
1932 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1933 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1934 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1935 decoding the loop instructions. Remove current_offset variable.
1936 (xtensa_fix_short_loop_frags): Likewise.
1937 (min_bytes_to_other_loop_end): Remove current_offset argument.
1938
9e75b3fa
AM
19392006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1940
a37d486e 1941 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1942 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1943
d727e8c2
NC
19442006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1945
1946 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1947 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1948 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1949 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1950 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1951 at90can64, at90usb646, at90usb647, at90usb1286 and
1952 at90usb1287.
1953 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1954
d252fdde
PB
19552006-04-07 Paul Brook <paul@codesourcery.com>
1956
1957 * config/tc-arm.c (parse_operands): Set default error message.
1958
ab1eb5fe
PB
19592006-04-07 Paul Brook <paul@codesourcery.com>
1960
1961 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1962
7ae2971b
PB
19632006-04-07 Paul Brook <paul@codesourcery.com>
1964
1965 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1966
53365c0d
PB
19672006-04-07 Paul Brook <paul@codesourcery.com>
1968
1969 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1970 (move_or_literal_pool): Handle Thumb-2 instructions.
1971 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1972
45aa61fe
AM
19732006-04-07 Alan Modra <amodra@bigpond.net.au>
1974
1975 PR 2512.
1976 * config/tc-i386.c (match_template): Move 64-bit operand tests
1977 inside loop.
1978
108a6f8e
CD
19792006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1980
1981 * po/Make-in: Add install-html target.
1982 * Makefile.am: Add install-html and install-html-recursive targets.
1983 * Makefile.in: Regenerate.
1984 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1985 * configure: Regenerate.
1986 * doc/Makefile.am: Add install-html and install-html-am targets.
1987 * doc/Makefile.in: Regenerate.
1988
ec651a3b
AM
19892006-04-06 Alan Modra <amodra@bigpond.net.au>
1990
1991 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1992 second scan.
1993
910600e9
RS
19942006-04-05 Richard Sandiford <richard@codesourcery.com>
1995 Daniel Jacobowitz <dan@codesourcery.com>
1996
1997 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1998 (GOTT_BASE, GOTT_INDEX): New.
1999 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2000 GOTT_INDEX when generating VxWorks PIC.
2001 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2002 use the generic *-*-vxworks* stanza instead.
2003
99630778
AM
20042006-04-04 Alan Modra <amodra@bigpond.net.au>
2005
2006 PR 997
2007 * frags.c (frag_offset_fixed_p): New function.
2008 * frags.h (frag_offset_fixed_p): Declare.
2009 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2010 (resolve_expression): Likewise.
2011
a02728c8
BW
20122006-04-03 Sterling Augustine <sterling@tensilica.com>
2013
2014 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2015 of the same length but different numbers of slots.
2016
9dfde49d
AS
20172006-03-30 Andreas Schwab <schwab@suse.de>
2018
2019 * configure.in: Fix help string for --enable-targets option.
2020 * configure: Regenerate.
2021
2da12c60
NS
20222006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2023
6d89cc8f
NS
2024 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2025 (m68k_ip): ... here. Use for all chips. Protect against buffer
2026 overrun and avoid excessive copying.
2027
2da12c60
NS
2028 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2029 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2030 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2031 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2032 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2033 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2034 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2035 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2036 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2037 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2038 (struct m68k_cpu): Change chip field to control_regs.
2039 (current_chip): Remove.
2040 (control_regs): New.
2041 (m68k_archs, m68k_extensions): Adjust.
2042 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2043 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2044 (find_cf_chip): Reimplement for new organization of cpu table.
2045 (select_control_regs): Remove.
2046 (mri_chip): Adjust.
2047 (struct save_opts): Save control regs, not chip.
2048 (s_save, s_restore): Adjust.
2049 (m68k_lookup_cpu): Give deprecated warning when necessary.
2050 (m68k_init_arch): Adjust.
2051 (md_show_usage): Adjust for new cpu table organization.
2052
1ac4baed
BS
20532006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2054
2055 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2056 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2057 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2058 "elf/bfin.h".
2059 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2060 (any_gotrel): New rule.
2061 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2062 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2063 "elf/bfin.h".
2064 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2065 (bfin_pic_ptr): New function.
2066 (md_pseudo_table): Add it for ".picptr".
2067 (OPTION_FDPIC): New macro.
2068 (md_longopts): Add -mfdpic.
2069 (md_parse_option): Handle it.
2070 (md_begin): Set BFD flags.
2071 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2072 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2073 us for GOT relocs.
2074 * Makefile.am (bfin-parse.o): Update dependencies.
2075 (DEPTC_bfin_elf): Likewise.
2076 * Makefile.in: Regenerate.
2077
a9d34880
RS
20782006-03-25 Richard Sandiford <richard@codesourcery.com>
2079
2080 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2081 mcfemac instead of mcfmac.
2082
9ca26584
AJ
20832006-03-23 Michael Matz <matz@suse.de>
2084
2085 * config/tc-i386.c (type_names): Correct placement of 'static'.
2086 (reloc): Map some more relocs to their 64 bit counterpart when
2087 size is 8.
2088 (output_insn): Work around breakage if DEBUG386 is defined.
2089 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2090 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2091 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2092 different from i386.
2093 (output_imm): Ditto.
2094 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2095 Imm64.
2096 (md_convert_frag): Jumps can now be larger than 2GB away, error
2097 out in that case.
2098 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2099 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2100
0a44bf69
RS
21012006-03-22 Richard Sandiford <richard@codesourcery.com>
2102 Daniel Jacobowitz <dan@codesourcery.com>
2103 Phil Edwards <phil@codesourcery.com>
2104 Zack Weinberg <zack@codesourcery.com>
2105 Mark Mitchell <mark@codesourcery.com>
2106 Nathan Sidwell <nathan@codesourcery.com>
2107
2108 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2109 (md_begin): Complain about -G being used for PIC. Don't change
2110 the text, data and bss alignments on VxWorks.
2111 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2112 generating VxWorks PIC.
2113 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2114 (macro): Likewise, but do not treat la $25 specially for
2115 VxWorks PIC, and do not handle jal.
2116 (OPTION_MVXWORKS_PIC): New macro.
2117 (md_longopts): Add -mvxworks-pic.
2118 (md_parse_option): Don't complain about using PIC and -G together here.
2119 Handle OPTION_MVXWORKS_PIC.
2120 (md_estimate_size_before_relax): Always use the first relaxation
2121 sequence on VxWorks.
2122 * config/tc-mips.h (VXWORKS_PIC): New.
2123
080eb7fe
PB
21242006-03-21 Paul Brook <paul@codesourcery.com>
2125
2126 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2127
03aaa593
BW
21282006-03-21 Sterling Augustine <sterling@tensilica.com>
2129
2130 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2131 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2132 (get_loop_align_size): New.
2133 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2134 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2135 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2136 (get_noop_aligned_address): Use get_loop_align_size.
2137 (get_aligned_diff): Likewise.
2138
3e94bf1a
PB
21392006-03-21 Paul Brook <paul@codesourcery.com>
2140
2141 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2142
dfa9f0d5
PB
21432006-03-20 Paul Brook <paul@codesourcery.com>
2144
2145 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2146 (do_t_branch): Encode branches inside IT blocks as unconditional.
2147 (do_t_cps): New function.
2148 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2149 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2150 (opcode_lookup): Allow conditional suffixes on all instructions in
2151 Thumb mode.
2152 (md_assemble): Advance condexec state before checking for errors.
2153 (insns): Use do_t_cps.
2154
6e1cb1a6
PB
21552006-03-20 Paul Brook <paul@codesourcery.com>
2156
2157 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2158 outputting the insn.
2159
0a966e2d
JBG
21602006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2161
2162 * config/tc-vax.c: Update copyright year.
2163 * config/tc-vax.h: Likewise.
2164
a49fcc17
JBG
21652006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2166
2167 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2168 make it static.
2169 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2170
f5208ef2
PB
21712006-03-17 Paul Brook <paul@codesourcery.com>
2172
2173 * config/tc-arm.c (insns): Add ldm and stm.
2174
cb4c78d6
BE
21752006-03-17 Ben Elliston <bje@au.ibm.com>
2176
2177 PR gas/2446
2178 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2179
c16d2bf0
PB
21802006-03-16 Paul Brook <paul@codesourcery.com>
2181
2182 * config/tc-arm.c (insns): Add "svc".
2183
80ca4e2c
BW
21842006-03-13 Bob Wilson <bob.wilson@acm.org>
2185
2186 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2187 flag and avoid double underscore prefixes.
2188
3a4a14e9
PB
21892006-03-10 Paul Brook <paul@codesourcery.com>
2190
2191 * config/tc-arm.c (md_begin): Handle EABIv5.
2192 (arm_eabis): Add EF_ARM_EABI_VER5.
2193 * doc/c-arm.texi: Document -meabi=5.
2194
518051dc
BE
21952006-03-10 Ben Elliston <bje@au.ibm.com>
2196
2197 * app.c (do_scrub_chars): Simplify string handling.
2198
00a97672
RS
21992006-03-07 Richard Sandiford <richard@codesourcery.com>
2200 Daniel Jacobowitz <dan@codesourcery.com>
2201 Zack Weinberg <zack@codesourcery.com>
2202 Nathan Sidwell <nathan@codesourcery.com>
2203 Paul Brook <paul@codesourcery.com>
2204 Ricardo Anguiano <anguiano@codesourcery.com>
2205 Phil Edwards <phil@codesourcery.com>
2206
2207 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2208 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2209 R_ARM_ABS12 reloc.
2210 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2211 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2212 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2213
b29757dc
BW
22142006-03-06 Bob Wilson <bob.wilson@acm.org>
2215
2216 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2217 even when using the text-section-literals option.
2218
0b2e31dc
NS
22192006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2220
2221 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2222 and cf.
2223 (m68k_ip): <case 'J'> Check we have some control regs.
2224 (md_parse_option): Allow raw arch switch.
2225 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2226 whether 68881 or cfloat was meant by -mfloat.
2227 (md_show_usage): Adjust extension display.
2228 (m68k_elf_final_processing): Adjust.
2229
df406460
NC
22302006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2231
2232 * config/tc-avr.c (avr_mod_hash_value): New function.
2233 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2234 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2235 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2236 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2237 of (int).
2238 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2239 fixups, abort otherwise.
df406460
NC
2240 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2241 tc_fix_adjustable): Define.
a70ae331 2242
53022e4a
JW
22432006-03-02 James E Wilson <wilson@specifix.com>
2244
2245 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2246 change the template, then clear md.slot[curr].end_of_insn_group.
2247
9f6f925e
JB
22482006-02-28 Jan Beulich <jbeulich@novell.com>
2249
2250 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2251
0e31b3e1
JB
22522006-02-28 Jan Beulich <jbeulich@novell.com>
2253
2254 PR/1070
2255 * macro.c (getstring): Don't treat parentheses special anymore.
2256 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2257 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2258 characters.
2259
10cd14b4
AM
22602006-02-28 Mat <mat@csail.mit.edu>
2261
2262 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2263
63752a75
JJ
22642006-02-27 Jakub Jelinek <jakub@redhat.com>
2265
2266 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2267 field.
2268 (CFI_signal_frame): Define.
2269 (cfi_pseudo_table): Add .cfi_signal_frame.
2270 (dot_cfi): Handle CFI_signal_frame.
2271 (output_cie): Handle cie->signal_frame.
2272 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2273 different. Copy signal_frame from FDE to newly created CIE.
2274 * doc/as.texinfo: Document .cfi_signal_frame.
2275
f7d9e5c3
CD
22762006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2277
2278 * doc/Makefile.am: Add html target.
2279 * doc/Makefile.in: Regenerate.
2280 * po/Make-in: Add html target.
2281
331d2d0d
L
22822006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2283
8502d882 2284 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2285 Instructions.
2286
8502d882 2287 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2288 (CpuUnknownFlags): Add CpuMNI.
2289
10156f83
DM
22902006-02-24 David S. Miller <davem@sunset.davemloft.net>
2291
2292 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2293 (hpriv_reg_table): New table for hyperprivileged registers.
2294 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2295 register encoding.
2296
6772dd07
DD
22972006-02-24 DJ Delorie <dj@redhat.com>
2298
2299 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2300 (tc_gen_reloc): Don't define.
2301 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2302 (OPTION_LINKRELAX): New.
2303 (md_longopts): Add it.
2304 (m32c_relax): New.
2305 (md_parse_options): Set it.
2306 (md_assemble): Emit relaxation relocs as needed.
2307 (md_convert_frag): Emit relaxation relocs as needed.
2308 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2309 (m32c_apply_fix): New.
2310 (tc_gen_reloc): New.
2311 (m32c_force_relocation): Force out jump relocs when relaxing.
2312 (m32c_fix_adjustable): Return false if relaxing.
2313
62b3e311
PB
23142006-02-24 Paul Brook <paul@codesourcery.com>
2315
2316 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2317 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2318 (struct asm_barrier_opt): Define.
2319 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2320 (parse_psr): Accept V7M psr names.
2321 (parse_barrier): New function.
2322 (enum operand_parse_code): Add OP_oBARRIER.
2323 (parse_operands): Implement OP_oBARRIER.
2324 (do_barrier): New function.
2325 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2326 (do_t_cpsi): Add V7M restrictions.
2327 (do_t_mrs, do_t_msr): Validate V7M variants.
2328 (md_assemble): Check for NULL variants.
2329 (v7m_psrs, barrier_opt_names): New tables.
2330 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2331 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2332 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2333 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2334 (struct cpu_arch_ver_table): Define.
2335 (cpu_arch_ver): New.
2336 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2337 Tag_CPU_arch_profile.
2338 * doc/c-arm.texi: Document new cpu and arch options.
2339
59cf82fe
L
23402006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2341
2342 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2343
19a7219f
L
23442006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2345
2346 * config/tc-ia64.c: Update copyright years.
2347
7f3dfb9c
L
23482006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2349
2350 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2351 SDM 2.2.
2352
f40d1643
PB
23532005-02-22 Paul Brook <paul@codesourcery.com>
2354
2355 * config/tc-arm.c (do_pld): Remove incorrect write to
2356 inst.instruction.
2357 (encode_thumb32_addr_mode): Use correct operand.
2358
216d22bc
PB
23592006-02-21 Paul Brook <paul@codesourcery.com>
2360
2361 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2362
d70c5fc7
NC
23632006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2364 Anil Paranjape <anilp1@kpitcummins.com>
2365 Shilin Shakti <shilins@kpitcummins.com>
2366
2367 * Makefile.am: Add xc16x related entry.
2368 * Makefile.in: Regenerate.
2369 * configure.in: Added xc16x related entry.
2370 * configure: Regenerate.
2371 * config/tc-xc16x.h: New file
2372 * config/tc-xc16x.c: New file
2373 * doc/c-xc16x.texi: New file for xc16x
2374 * doc/all.texi: Entry for xc16x
a70ae331 2375 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2376 * NEWS: Announce the support for the new target.
2377
aaa2ab3d
NH
23782006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2379
2380 * configure.tgt: set emulation for mips-*-netbsd*
2381
82de001f
JJ
23822006-02-14 Jakub Jelinek <jakub@redhat.com>
2383
2384 * config.in: Rebuilt.
2385
431ad2d0
BW
23862006-02-13 Bob Wilson <bob.wilson@acm.org>
2387
2388 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2389 from 1, not 0, in error messages.
2390 (md_assemble): Simplify special-case check for ENTRY instructions.
2391 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2392 operand in error message.
2393
94089a50
JM
23942006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2395
2396 * configure.tgt (arm-*-linux-gnueabi*): Change to
2397 arm-*-linux-*eabi*.
2398
52de4c06
NC
23992006-02-10 Nick Clifton <nickc@redhat.com>
2400
70e45ad9
NC
2401 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2402 32-bit value is propagated into the upper bits of a 64-bit long.
2403
52de4c06
NC
2404 * config/tc-arc.c (init_opcode_tables): Fix cast.
2405 (arc_extoper, md_operand): Likewise.
2406
21af2bbd
BW
24072006-02-09 David Heine <dlheine@tensilica.com>
2408
2409 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2410 each relaxation step.
2411
75a706fc 24122006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2413
75a706fc
L
2414 * configure.in (CHECK_DECLS): Add vsnprintf.
2415 * configure: Regenerate.
2416 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2417 include/declare here, but...
2418 * as.h: Move code detecting VARARGS idiom to the top.
2419 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2420 (vsnprintf): Declare if not already declared.
2421
0d474464
L
24222006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2423
2424 * as.c (close_output_file): New.
2425 (main): Register close_output_file with xatexit before
2426 dump_statistics. Don't call output_file_close.
2427
266abb8f
NS
24282006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2429
2430 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2431 mcf5329_control_regs): New.
2432 (not_current_architecture, selected_arch, selected_cpu): New.
2433 (m68k_archs, m68k_extensions): New.
2434 (archs): Renamed to ...
2435 (m68k_cpus): ... here. Adjust.
2436 (n_arches): Remove.
2437 (md_pseudo_table): Add arch and cpu directives.
2438 (find_cf_chip, m68k_ip): Adjust table scanning.
2439 (no_68851, no_68881): Remove.
2440 (md_assemble): Lazily initialize.
2441 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2442 (md_init_after_args): Move functionality to m68k_init_arch.
2443 (mri_chip): Adjust table scanning.
2444 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2445 options with saner parsing.
2446 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2447 m68k_init_arch): New.
2448 (s_m68k_cpu, s_m68k_arch): New.
2449 (md_show_usage): Adjust.
2450 (m68k_elf_final_processing): Set CF EF flags.
2451 * config/tc-m68k.h (m68k_init_after_args): Remove.
2452 (tc_init_after_args): Remove.
2453 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2454 (M68k-Directives): Document .arch and .cpu directives.
2455
134dcee5
AM
24562006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2457
a70ae331
AM
2458 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2459 synonyms for equ and defl.
134dcee5
AM
2460 (z80_cons_fix_new): New function.
2461 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2462 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2463 now handled as pseudo-op rather than an instruction.
2464 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2465 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2466 Add entries for def24,def32,d24,d32.
2467 (md_assemble): Improved error handling.
2468 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2469 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2470 (z80_cons_fix_new): Declare.
a70ae331 2471 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2472 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2473
a9931606
PB
24742006-02-02 Paul Brook <paul@codesourcery.com>
2475
2476 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2477
ef8d22e6
PB
24782005-02-02 Paul Brook <paul@codesourcery.com>
2479
2480 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2481 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2482 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2483 T2_OPCODE_RSB): Define.
2484 (thumb32_negate_data_op): New function.
2485 (md_apply_fix): Use it.
2486
e7da6241
BW
24872006-01-31 Bob Wilson <bob.wilson@acm.org>
2488
2489 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2490 fields.
2491 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2492 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2493 subtracted symbols.
2494 (relaxation_requirements): Add pfinish_frag argument and use it to
2495 replace setting tinsn->record_fix fields.
2496 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2497 and vinsn_to_insnbuf. Remove references to record_fix and
2498 slot_sub_symbols fields.
2499 (xtensa_mark_narrow_branches): Delete unused code.
2500 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2501 a symbol.
2502 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2503 record_fix fields.
2504 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2505 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2506 of the record_fix field. Simplify error messages for unexpected
2507 symbolic operands.
2508 (set_expr_symbol_offset_diff): Delete.
2509
79134647
PB
25102006-01-31 Paul Brook <paul@codesourcery.com>
2511
2512 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2513
e74cfd16
PB
25142006-01-31 Paul Brook <paul@codesourcery.com>
2515 Richard Earnshaw <rearnsha@arm.com>
2516
2517 * config/tc-arm.c: Use arm_feature_set.
2518 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2519 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2520 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2521 New variables.
2522 (insns): Use them.
2523 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2524 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2525 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2526 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2527 feature flags.
2528 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2529 (arm_opts): Move old cpu/arch options from here...
2530 (arm_legacy_opts): ... to here.
2531 (md_parse_option): Search arm_legacy_opts.
2532 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2533 (arm_float_abis, arm_eabis): Make const.
2534
d47d412e
BW
25352006-01-25 Bob Wilson <bob.wilson@acm.org>
2536
2537 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2538
b14273fe
JZ
25392006-01-21 Jie Zhang <jie.zhang@analog.com>
2540
2541 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2542 in load immediate intruction.
2543
39cd1c76
JZ
25442006-01-21 Jie Zhang <jie.zhang@analog.com>
2545
2546 * config/bfin-parse.y (value_match): Use correct conversion
2547 specifications in template string for __FILE__ and __LINE__.
2548 (binary): Ditto.
2549 (unary): Ditto.
2550
67a4f2b7
AO
25512006-01-18 Alexandre Oliva <aoliva@redhat.com>
2552
2553 Introduce TLS descriptors for i386 and x86_64.
2554 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2555 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2556 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2557 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2558 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2559 displacement bits.
2560 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2561 (lex_got): Handle @tlsdesc and @tlscall.
2562 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2563
8ad7c533
NC
25642006-01-11 Nick Clifton <nickc@redhat.com>
2565
2566 Fixes for building on 64-bit hosts:
2567 * config/tc-avr.c (mod_index): New union to allow conversion
2568 between pointers and integers.
2569 (md_begin, avr_ldi_expression): Use it.
2570 * config/tc-i370.c (md_assemble): Add cast for argument to print
2571 statement.
2572 * config/tc-tic54x.c (subsym_substitute): Likewise.
2573 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2574 opindex field of fr_cgen structure into a pointer so that it can
2575 be stored in a frag.
2576 * config/tc-mn10300.c (md_assemble): Likewise.
2577 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2578 types.
2579 * config/tc-v850.c: Replace uses of (int) casts with correct
2580 types.
2581
4dcb3903
L
25822006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2583
2584 PR gas/2117
2585 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2586
e0f6ea40
HPN
25872006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2588
2589 PR gas/2101
2590 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2591 a local-label reference.
2592
e88d958a 2593For older changes see ChangeLog-2005
08d56133
NC
2594\f
2595Local Variables:
2596mode: change-log
2597left-margin: 8
2598fill-column: 74
2599version-control: never
2600End:
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