projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[gdb] Don't set initial language if set manually
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
da3ec71f
AM		 12020-02-26 Alan Modra <amodra@gmail.com>
2
3 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
4 N_() on empty string.
5
42135cad
AM		 62020-02-26 Alan Modra <amodra@gmail.com>
7
8 * read.c (read_a_source_file): Call strncpy with length one
9 less than size of original_case_string.
10
dc1e8a47
AM		 112020-02-26 Alan Modra <amodra@gmail.com>
12
13 * config/obj-elf.c: Indent labels correctly.
14 * config/obj-macho.c: Likewise.
15 * config/tc-aarch64.c: Likewise.
16 * config/tc-alpha.c: Likewise.
17 * config/tc-arm.c: Likewise.
18 * config/tc-cr16.c: Likewise.
19 * config/tc-crx.c: Likewise.
20 * config/tc-frv.c: Likewise.
21 * config/tc-i386-intel.c: Likewise.
22 * config/tc-i386.c: Likewise.
23 * config/tc-ia64.c: Likewise.
24 * config/tc-mn10200.c: Likewise.
25 * config/tc-mn10300.c: Likewise.
26 * config/tc-nds32.c: Likewise.
27 * config/tc-riscv.c: Likewise.
28 * config/tc-s12z.c: Likewise.
29 * config/tc-xtensa.c: Likewise.
30 * config/tc-z80.c: Likewise.
31 * read.c: Likewise.
32 * symbols.c: Likewise.
33 * write.c: Likewise.
34
bd0cf5a6
NC		 352020-02-20 Nelson Chu <nelson.chu@sifive.com>
36
54b2aec1
NC		 37 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
38 we are assembling instruction with CSR. Call riscv_csr_read_only_check
39 after parsing all arguments.
40 (enum csr_insn_type): New enum is used to classify the CSR instruction.
41 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
42 are used to check if we write a read-only CSR by the CSR instruction.
43 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
44 all CSR for the read-only CSR checking.
45 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
46 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
47 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
48 all CSR instructions for the read-only CSR checking.
49 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
50 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
51
2ca89224
NC		 52 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
53 (riscv_opts): Initialize it.
54 (reg_lookup_internal): Check the `riscv_opts.csr_check`
55 before doing the CSR checking.
56 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
57 (md_longopts): Add mcsr-check and mno-csr-check.
58 (md_parse_option): Handle new enum option values.
59 (s_riscv_option): Handle new long options.
60 * doc/c-riscv.texi: Add description for the new .option and assembler
61 options.
62 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
63 the CSR checking.
64 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
65
bd0cf5a6
NC		 66 * config/tc-riscv.c (csr_extra_hash): New.
67 (enum riscv_csr_class): New enum. Used to decide
68 whether or not this CSR is legal in the current ISA string.
69 (struct riscv_csr_extra): New structure to hold all extra information
70 of CSR.
71 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
72 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
73 Call hash_reg_name to insert CSR address into reg_names_hash.
74 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
75 Decide whether the CSR is valid according to the csr_extra_hash.
76 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
77 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
78 not a boolean. This is same as riscv_init_csr_hash, so keep the
79 consistent usage.
80 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
81 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
82 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
83 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
84 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
85 f-ext CSR are not allowed.
86 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
87 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
88 source file is `priv-reg.s`, and the ISA is rv64if, so the
89 rv32-only CSR are not allowed.
90 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
91
10a95fcc
AM		 922020-02-21 Alan Modra <amodra@gmail.com>
93
94 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
95 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
96
dda2980f
AM		 972020-02-21 Alan Modra <amodra@gmail.com>
98
99 PR 25569
100 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
101 on section size adjustment, instead perform another write if
102 exec header size is larger than section size.
103
bd3380bc
NC		 1042020-02-19 Nelson Chu <nelson.chu@sifive.com>
105
106 * doc/c-riscv.texi: Add the doc entries for -march-attr/
107 -mno-arch-attr command line options.
108
fa164239
JW		 1092020-02-19 Nelson Chu <nelson.chu@sifive.com>
110
111 * testsuite/gas/riscv/c-add-addi.d: New testcase.
112 * testsuite/gas/riscv/c-add-addi.s: Likewise.
113
fcaaac0a
SB		 1142020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
115
116 PR 25576
117 * config/tc-z80.c (md_parse_option): Do not use an underscore
118 prefix for local labels in SDCC compatability mode.
119 (z80_start_line_hook): Remove SDCC dollar label support.
120 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
121 * testsuite/gas/z80/sdcc.s: Likewise.
122
1232020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
124
125 PR 25517
126 * config/tc-z80.c: Add -march option.
127 * doc/as.texi: Update Z80 documentation.
128 * doc/c-z80.texi: Likewise.
129 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
130 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
131 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
132 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
133 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
134 * testsuite/gas/z80/gbz80_all.d: Likewise.
135 * testsuite/gas/z80/r800_extra.d: Likewise.
136 * testsuite/gas/z80/r800_ii8.d: Likewise.
137 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
138 * testsuite/gas/z80/sdcc.d: Likewise.
139 * testsuite/gas/z80/z180.d: Likewise.
140 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
141 * testsuite/gas/z80/z80_doc.d: Likewise.
142 * testsuite/gas/z80/z80_ii8.d: Likewise.
143 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
144 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
145 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
146 * testsuite/gas/z80/z80_sli.d: Likewise.
147 * testsuite/gas/z80/z80n_all.d: Likewise.
148 * testsuite/gas/z80/z80n_reloc.d: Likewise.
149
a7e12755
L		 1502020-02-19 H.J. Lu <hongjiu.lu@intel.com>
151
152 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
153 with GNU_PROPERTY_X86_FEATURE_2_MMX.
154 * testsuite/gas/i386/i386.exp: Run property-3 and
155 x86-64-property-3.
156 * testsuite/gas/i386/property-3.d: New file.
157 * testsuite/gas/i386/property-3.s: Likewise.
158 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
159
272a84b1
L		 1602020-02-17 H.J. Lu <hongjiu.lu@intel.com>
161
162 * config/tc-i386.c (cpu_arch): Add .popcnt.
163 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
164 Add a tab before @samp{.sse4a}.
165
c8f8eebc
JB		 1662020-02-17 Jan Beulich <jbeulich@suse.com>
167
168 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
169 for AddrPrefixOpReg templates. Combine the two pieces of
170 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
171 mode.
172
eedb0f2c
JB		 1732020-02-17 Jan Beulich <jbeulich@suse.com>
174
175 PR gas/14439
176 * config/tc-i386.c (md_assemble): Also suppress operand
177 swapping for MONITOR{,X} and MWAIT{,X}.
178 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
179 Add Intel syntax monitor/mwait tests.
180 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
181 Adjust expectations.
182 *testsuite/gas/i386/sse3-intel.d,
183 testsuite/gas/i386/x86-64-sse3-intel.d: New.
184 * testsuite/gas/i386/i386.exp: Run new tests.
185
b9915cbc
JB		 1862020-02-17 Jan Beulich <jbeulich@suse.com>
187
188 PR gas/6518
189 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
190 [XYZ]MMWord memory operand ambiguity recognition logic (largely
191 re-indentation).
192 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
193 cases.
194 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
195 * testsuite/gas/i386/avx512dq-inval.l,
196 testsuite/gas/i386/inval-avx.l,
197 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
198 * testsuite/gas/i386/avx512vl-ambig.s,
199 testsuite/gas/i386/avx512vl-ambig.l: New.
200 * testsuite/gas/i386/i386.exp: Run new test.
201
af5c13b0
L		 2022020-02-16 H.J. Lu <hongjiu.lu@intel.com>
203
204 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
205 nosse4.
206 * doc/c-i386.texi: Document sse4a and nosse4a.
207
07d98387
L		 2082020-02-14 H.J. Lu <hongjiu.lu@intel.com>
209
210 * doc/c-i386.texi: Remove the old movsx and movzx documentation
211 for AT&T syntax.
212
65fca059
JB		 2132020-02-14 Jan Beulich <jbeulich@suse.com>
214
215 PR gas/25438
216 * config/tc-i386.c (md_assemble): Move movsx/movzx special
217 casing ...
218 (process_suffix): ... here. Consider just the first operand
219 initially.
220 (check_long_reg): Drop opcode 0x63 special case again.
221 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
222 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
223 Move ambiguous operand size tests ...
224 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
225 testsuite/gas/i386/noreg64.s: ... here.
226 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
227 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
228 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
229 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
230 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
231 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
232 testsuite/gas/i386/x86-64-movsxd.d,
233 testsuite/gas/i386/x86-64-movsxd-intel.d,
234 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
235 Adjust expectations.
236 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
237 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
238 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
239 * testsuite/gas/i386/i386.exp: Run new tests.
240
b6773884
JB		 2412020-02-14 Jan Beulich <jbeulich@suse.com>
242
243 * config/tc-i386.c (process_operands): Also skip segment
244 override prefix emission if it matches an already present one.
245 * testsuite/gas/i386/prefix32.s: Add double segment override
246 cases.
247 * testsuite/gas/i386/prefix32.l: Adjust expectations.
248
92334ad2
JB		 2492020-02-14 Jan Beulich <jbeulich@suse.com>
250
251 * config/tc-i386.c (process_operands): Drop ineffectual segment
252 overrides when optimizing.
253 * testsuite/gas/i386/lea-optimize.d: New.
254 * testsuite/gas/i386/i386.exp: Run new test.
255
2562020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 257
258 * config/tc-i386.c (process_operands): Also check insn prefix
259 for ineffectual segment override warning. Don't cover possible
260 VEX/EVEX encoded insns there.
261 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
262 testsuite/gas/i386/lea.e: New.
263 * testsuite/gas/i386/i386.exp: Run new test.
264
0e6724de
L		 2652020-02-14 H.J. Lu <hongjiu.lu@intel.com>
266
267 PR gas/25438
268 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
269 syntax.
270
292676c1
L		 2712020-02-13 Fangrui Song <maskray@google.com>
272 H.J. Lu <hongjiu.lu@intel.com>
273
274 PR gas/25551
275 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
276 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
277 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
278 * testsuite/gas/i386/relax-5.d: New file.
279 * testsuite/gas/i386/relax-5.s: Likewise.
280 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
281 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
282
7deea9aa
JB		 2832020-02-13 Jan Beulich <jbeulich@suse.com>
284
285 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
286 "nosse4" entry.
287
6c0946d0
JB		 2882020-02-12 Jan Beulich <jbeulich@suse.com>
289
290 * config/tc-i386.c (avx512): New (at file scope), moved from
291 (check_VecOperands): ... here.
292 (process_suffix): Add [XYZ]MMword operand size handling.
293 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
294 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
295 tests.
296 * testsuite/gas/i386/avx512dq-inval.l,
297 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
298
5990e377
JB		 2992020-02-12 Jan Beulich <jbeulich@suse.com>
300
301 PR gas/24546
302 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
303 code only.
304 * config/tc-i386-intel.c (i386_intel_operand): Also handle
305 CALL/JMP in O_tbyte_ptr case.
306 * doc/c-i386.texi: Mention far call and full pointer load ISA
307 differences.
308 * testsuite/gas/i386/x86-64-branch-3.s,
309 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
310 * testsuite/gas/i386/x86-64-branch-3.d,
311 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
312 * testsuite/gas/i386/x86-64-branch-5.l,
313 testsuite/gas/i386/x86-64-branch-5.s: New.
314 * testsuite/gas/i386/i386.exp: Run new test.
315
9706160a
JB		 3162020-02-12 Jan Beulich <jbeulich@suse.com>
317
318 PR gas/25438
319 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
320 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
321 64-bit-only warning.
322 (check_word_reg): Consistently error on mismatching register
323 size and suffix.
324 * testsuite/gas/i386/general.s: Replace dword GPR with word one
325 for movw. Replace suffix / GPR for orb.
326 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
327 byte GPRs as well as ones for inb/outb with a word accumulator.
328 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
329 testsuite/gas/i386/inval.l: Adjust expectations.
330
5de4d9ef
JB		 3312020-02-12 Jan Beulich <jbeulich@suse.com>
332
333 * config/tc-i386.c (operand_type_register_match): Also fall
334 through initial two if()-s when the template allows for a GPR
335 operand. Adjust comment.
336
50128d0c
JB		 3372020-02-11 Jan Beulich <jbeulich@suse.com>
338
339 (struct _i386_insn): New field "short_form".
340 (optimize_encoding): Drop setting of shortform field.
341 (process_suffix): Set i.short_form. Replace shortform use.
342 (process_operands): Replace shortform use.
343
1ed818b4
MM		 3442020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
345
346 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
347 loop initial declaration.
348
5aae9ae9
MM		 3492020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
350
351 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
352 instructions that can have 5 arguments.
353 (enum operand_parse_code): Add new operands.
354 (parse_operands): Account for new operands.
355 (S5): New macro.
356 (enum neon_shape_el): Introduce P suffixes for coprocessor.
357 (neon_select_shape): Account for P suffix.
358 (LOW1): Move macro to global position.
359 (HI4): Move macro to global position.
360 (vcx_assign_vec_d): New.
361 (vcx_assign_vec_m): New.
362 (vcx_assign_vec_n): New.
363 (enum vcx_reg_type): New.
364 (vcx_get_reg_type): New.
365 (vcx_size_pos): New.
366 (vcx_vec_pos): New.
367 (vcx_handle_shape): New.
368 (vcx_ensure_register_in_range): New.
369 (vcx_handle_register_arguments): New.
370 (vcx_handle_insn_block): New.
371 (vcx_handle_common_checks): New.
372 (do_vcx1): New.
373 (do_vcx2): New.
374 (do_vcx3): New.
375 * testsuite/gas/arm/cde-missing-fp.d: New test.
376 * testsuite/gas/arm/cde-missing-fp.l: New test.
377 * testsuite/gas/arm/cde-missing-mve.d: New test.
378 * testsuite/gas/arm/cde-missing-mve.l: New test.
379 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
380 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
381 * testsuite/gas/arm/cde-mve.s: New test.
382 * testsuite/gas/arm/cde-warnings.l:
383 * testsuite/gas/arm/cde-warnings.s:
384 * testsuite/gas/arm/cde.d:
385 * testsuite/gas/arm/cde.s:
386
4934a27c
MM		 3872020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
388 Matthew Malcomson <matthew.malcomson@arm.com>
389
390 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
391 CDE coprocessor that can be enabled.
392 (enum pred_instruction_type): New pred type.
393 (BAD_NO_VPT): New error message.
394 (BAD_CDE): New error message.
395 (BAD_CDE_COPROC): New error message.
396 (enum operand_parse_code): Add new immediate operands.
397 (parse_operands): Account for new immediate operands.
398 (check_cde_operand): New.
399 (cde_coproc_enabled): New.
400 (cde_coproc_pos): New.
401 (cde_handle_coproc): New.
402 (cxn_handle_predication): New.
403 (do_custom_instruction_1): New.
404 (do_custom_instruction_2): New.
405 (do_custom_instruction_3): New.
406 (do_cx1): New.
407 (do_cx1a): New.
408 (do_cx1d): New.
409 (do_cx1da): New.
410 (do_cx2): New.
411 (do_cx2a): New.
412 (do_cx2d): New.
413 (do_cx2da): New.
414 (do_cx3): New.
415 (do_cx3a): New.
416 (do_cx3d): New.
417 (do_cx3da): New.
418 (handle_pred_state): Define new IT block behaviour.
419 (insns): Add newn CX*{,d}{,a} instructions.
420 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
421 Define new cdecp extension strings.
422 * doc/c-arm.texi: Document new cdecp extension arguments.
423 * testsuite/gas/arm/cde-scalar.d: New test.
424 * testsuite/gas/arm/cde-scalar.s: New test.
425 * testsuite/gas/arm/cde-warnings.d: New test.
426 * testsuite/gas/arm/cde-warnings.l: New test.
427 * testsuite/gas/arm/cde-warnings.s: New test.
428 * testsuite/gas/arm/cde.d: New test.
429 * testsuite/gas/arm/cde.s: New test.
430
4b5aaf5f
L		 4312020-02-10 H.J. Lu <hongjiu.lu@intel.com>
432
433 PR gas/25516
434 * config/tc-i386.c (intel64): Renamed to ...
435 (isa64): This.
436 (match_template): Accept Intel64 only instruction by default.
437 (i386_displacement): Updated.
438 (md_parse_option): Updated.
439 * c-i386.texi: Update -mamd64/-mintel64 documentation.
440 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
441 -mamd64 to x86-64-sysenter-amd.
442 * testsuite/gas/i386/x86-64-sysenter.d: New file.
443
33176d91
AM		 4442020-02-10 Alan Modra <amodra@gmail.com>
445
446 * config/obj-elf.c (obj_elf_change_section): Error for section
447 type, attr or entsize changes in assembly.
448 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
449 * testsuite/gas/elf/section5.l: Update.
450
82194874
AM		 4512020-02-10 Alan Modra <amodra@gmail.com>
452
453 * output-file.c (output_file_close): Do a normal close when
454 flag_always_generate_output.
455 * write.c (write_object_file): Don't stop output when
456 flag_always_generate_output.
457
9fc0b501
SB		 4582020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
459
460 PR 25469
461 * config/tc-z80.c: Add -gbz80 command line option to generate code
462 for the GameBoy Z80. Add support for generating DWARF.
463 * config/tc-z80.h: Add support for DWARF debug information
464 generation.
465 * doc/c-z80.texi: Document new command line option.
466 * testsuite/gas/z80/gbz80_all.d: New file.
467 * testsuite/gas/z80/gbz80_all.s: New file.
468 * testsuite/gas/z80/z80.exp: Run the new tests.
469 * testsuite/gas/z80/z80n_all.d: New file.
470 * testsuite/gas/z80/z80n_all.s: New file.
471 * testsuite/gas/z80/z80n_reloc.d: New file.
472
b7d07216
L		 4732020-02-06 H.J. Lu <hongjiu.lu@intel.com>
474
475 PR gas/25381
476 * config/obj-elf.c (get_section): Also check
477 linked_to_symbol_name.
478 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
479 (obj_elf_parse_section_letters): Handle the 'o' flag.
480 (build_group_lists): Renamed to ...
481 (build_additional_section_info): This. Set elf_linked_to_section
482 from map_head.linked_to_symbol_name.
483 (elf_adjust_symtab): Updated.
484 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
485 * doc/as.texi: Document the 'o' flag.
486 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
487 * testsuite/gas/elf/section18.d: New file.
488 * testsuite/gas/elf/section18.s: Likewise.
489 * testsuite/gas/elf/section19.d: Likewise.
490 * testsuite/gas/elf/section19.s: Likewise.
491 * testsuite/gas/elf/section20.d: Likewise.
492 * testsuite/gas/elf/section20.s: Likewise.
493 * testsuite/gas/elf/section21.d: Likewise.
494 * testsuite/gas/elf/section21.l: Likewise.
495 * testsuite/gas/elf/section21.s: Likewise.
496
5eb617a7
L		 4972020-02-06 H.J. Lu <hongjiu.lu@intel.com>
498
499 * NEWS: Mention x86 assembler options to align branches for
500 binutils 2.34.
501
986ac314
L		 5022020-02-06 H.J. Lu <hongjiu.lu@intel.com>
503
504 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
505 only for ELF targets.
506 * testsuite/gas/i386/unique.d: Don't xfail.
507 * testsuite/gas/i386/x86-64-unique.d: Likewise.
508
19234a6d
AM		 5092020-02-06 Alan Modra <amodra@gmail.com>
510
511 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
512 * testsuite/gas/i386/x86-64-unique.d: Likewise.
513
02e0be69
AM		 5142020-02-06 Alan Modra <amodra@gmail.com>
515
516 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
517 xfail, and rename test.
518 * testsuite/gas/elf/section12b.d: Likewise.
519 * testsuite/gas/elf/section16a.d: Likewise.
520 * testsuite/gas/elf/section16b.d: Likewise.
521
a8c4d40b
L		 5222020-02-02 H.J. Lu <hongjiu.lu@intel.com>
523
524 PR gas/25380
525 * config/obj-elf.c (section_match): Removed.
526 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
527 section_id.
528 (obj_elf_change_section): Replace info and group_name arguments
529 with match_p. Also update the section ID and flags from match_p.
530 (obj_elf_section): Handle "unique,N". Update call to
531 obj_elf_change_section.
532 * config/obj-elf.h (elf_section_match): New.
533 (obj_elf_change_section): Updated.
534 * config/tc-arm.c (start_unwind_section): Update call to
535 obj_elf_change_section.
536 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
537 * config/tc-microblaze.c (microblaze_s_data): Likewise.
538 (microblaze_s_sdata): Likewise.
539 (microblaze_s_rdata): Likewise.
540 (microblaze_s_bss): Likewise.
541 * config/tc-mips.c (s_change_section): Likewise.
542 * config/tc-msp430.c (msp430_profiler): Likewise.
543 * config/tc-rx.c (parse_rx_section): Likewise.
544 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
545 * doc/as.texi: Document "unique,N" in .section directive.
546 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
547 * testsuite/gas/elf/section15.d: New file.
548 * testsuite/gas/elf/section15.s: Likewise.
549 * testsuite/gas/elf/section16.s: Likewise.
550 * testsuite/gas/elf/section16a.d: Likewise.
551 * testsuite/gas/elf/section16b.d: Likewise.
552 * testsuite/gas/elf/section17.d: Likewise.
553 * testsuite/gas/elf/section17.l: Likewise.
554 * testsuite/gas/elf/section17.s: Likewise.
555 * testsuite/gas/i386/unique.d: Likewise.
556 * testsuite/gas/i386/unique.s: Likewise.
557 * testsuite/gas/i386/x86-64-unique.d: Likewise.
558 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
559
575d37ae
L		 5602020-02-02 H.J. Lu <hongjiu.lu@intel.com>
561
562 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
563
2384096c
G		 5642020-02-01 Anthony Green <green@moxielogic.com>
565
566 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
567
95441c43
SL		 5682020-01-31 Sandra Loosemore <sandra@codesourcery.com>
569
570 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
571 %tls_ldo.
572
d465d695
AV		 5732020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
574
575 PR gas/25472
576 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
577 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
578 +mve.
579 * testsuite/gas/arm/mve_dsp.d: New test.
580
d26cc8a9
NC		 5812020-01-31 Nick Clifton <nickc@redhat.com>
582
583 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
584 rather than BFD_RELOC_NONE.
585
90e9955a
SP		 5862020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
587
588 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
589 to support VLDMIA instruction for MVE.
590 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
591 instruction for MVE.
592 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
593 instruction for MVE.
594 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
595 instruction for MVE.
596 * testsuite/gas/arm/mve-ldst.d: New test.
597 * testsuite/gas/arm/mve-ldst.s: Likewise.
598
53943f32
NC		 5992020-01-31 Nick Clifton <nickc@redhat.com>
600
601 * po/fr.po: Updated French translation.
602 * po/ru.po: Updated Russian translation.
603
c3036ed0
RS		 6042020-01-31 Richard Sandiford <richard.sandiford@arm.com>
605
606 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
607 .s for the movprfx.
608 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
609 * testsuite/gas/aarch64/sve-movprfx_28.d,
610 * testsuite/gas/aarch64/sve-movprfx_28.l,
611 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
612
2ae4c703
JB		 6132020-01-30 Jan Beulich <jbeulich@suse.com>
614
615 * config/tc-i386.c (output_disp): Tighten base_opcode check.
616 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
617 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
618 Adjust expectations.
619
bd434cc4
JM		 6202020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
621
622 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
623 * testsuite/gas/bpf/alu-be.d: Likewise.
624 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
625 * testsuite/gas/bpf/alu32-be.d: Likewise.
626
aeab2b26
JB		 6272020-01-30 Jan Beulich <jbeulich@suse.com>
628
629 * testsuite/gas/i386/x86-64-branch-2.s,
630 testsuite/gas/i386/x86-64-branch-4.s,
631 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
632 * testsuite/gas/i386/ilp32/x86-64-branch.d,
633 testsuite/gas/i386/x86-64-branch-2.d,
634 testsuite/gas/i386/x86-64-branch-4.l,
635 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
636
873494c8
JB		 6372020-01-30 Jan Beulich <jbeulich@suse.com>
638
639 * config/tc-i386.c (process_suffix): .
640 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
641 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
642 Add LRETQ case.
643 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
644 suffix.
645 testsuite/gas/i386/x86_64.s: Add RETF cases.
646 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
647 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
648 testsuite/gas/i386/x86-64-opcode.d,
649 testsuite/gas/i386/x86-64-suffix-intel.d,
650 testsuite/gas/i386/x86-64-suffix.d,
651 testsuite/gas/i386/x86_64-intel.d
652 testsuite/gas/i386/x86_64.d: Adjust expectations.
653 * testsuite/gas/i386/x86-64-suffix.e,
654 testsuite/gas/i386/x86_64.e: New.
655
62b3f548
JB		 6562020-01-30 Jan Beulich <jbeulich@suse.com>
657
658 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
659 special case.
660
bc31405e
L		 6612020-01-27 H.J. Lu <hongjiu.lu@intel.com>
662
663 PR binutils/25445
664 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
665 movsxd.
666 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
667 differences. Document movslq and movsxd.
668 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
669 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
670 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
671 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
672 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
673 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
674 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
675 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
676 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
677 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
678 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
679
e3696f67
AM		 6802020-01-27 Alan Modra <amodra@gmail.com>
681
682 * testsuite/gas/all/gas.exp: Replace case statements with switch
683 statements.
684 * testsuite/gas/elf/elf.exp: Likewise.
685 * testsuite/gas/macros/macros.exp: Likewise.
686 * testsuite/lib/gas-defs.exp: Likewise.
687
7568c93b
TC		 6882020-01-27 Tamar Christina <tamar.christina@arm.com>
689
690 PR 25403
691 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
692 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
693
403d1bd9
JW		 6942020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
695
696 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
697 s exts must be known, so rename *ok* to *fail*.
698 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
699 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
700 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
701 above change.
702 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
703 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
704
be4c5e58
L		 7052020-01-22 H.J. Lu <hongjiu.lu@intel.com>
706
707 PR gas/25438
708 * config/tc-i386.c (check_long_reg): Always disallow double word
709 suffix in mnemonic with word general register.
710 * testsuite/gas/i386/general.s: Replace word general register
711 with double word general register for movl.
712 * testsuite/gas/i386/inval.s: Add tests for movl with word general
713 register.
714 * testsuite/gas/i386/general.l: Updated.
715 * testsuite/gas/i386/inval.l: Likewise.
716
9e7028aa
AM		 7172020-01-22 Alan Modra <amodra@gmail.com>
718
719 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
720 __tls_get_addr_desc and __tls_get_addr_opt.
721
e3ed17f3
JB		 7222020-01-21 Jan Beulich <jbeulich@suse.com>
723
724 * testsuite/gas/i386/inval-crc32.s,
725 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
726 * testsuite/gas/i386/inval-crc32.l,
727 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
728
1a035124
JB		 7292020-01-21 Jan Beulich <jbeulich@suse.com>
730
731 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
732 generic code path. Deal with No_lSuf being set in a template.
733 * testsuite/gas/i386/inval-crc32.l,
734 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
735 instead of error(s) when operand size is ambiguous.
736 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
737 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
738 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
739 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
740 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
741 Adjust expectations.
742
c006a730
JB		 7432020-01-21 Jan Beulich <jbeulich@suse.com>
744
745 * config/tc-i386.c (process_suffix): Drop SYSRET special case
746 and an intel_syntax check. Re-write lack-of-suffix processing
747 logic.
748 * doc/c-i386.texi: Document operand size defaults for suffix-
749 less AT&T syntax insns.
750 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
751 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
752 testsuite/gas/i386/x86-64-avx-scalar.s,
753 testsuite/gas/i386/x86-64-avx.s,
754 testsuite/gas/i386/x86-64-bundle.s,
755 testsuite/gas/i386/x86-64-intel64.s,
756 testsuite/gas/i386/x86-64-lock-1.s,
757 testsuite/gas/i386/x86-64-opcode.s,
758 testsuite/gas/i386/x86-64-sse2avx.s,
759 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
760 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
761 testsuite/gas/i386/x86-64-nops.s,
762 testsuite/gas/i386/x86-64-ptwrite.s,
763 testsuite/gas/i386/x86-64-simd.s,
764 testsuite/gas/i386/x86-64-sse-noavx.s,
765 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
766 insns.
767 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
768 testsuite/gas/i386/noreg64.s: Add further tests.
769 * testsuite/gas/i386/ilp32/x86-64-nops.d,
770 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
771 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
772 testsuite/gas/i386/sse-noavx.d,
773 testsuite/gas/i386/x86-64-intel64.d,
774 testsuite/gas/i386/x86-64-nops.d,
775 testsuite/gas/i386/x86-64-opcode.d,
776 testsuite/gas/i386/x86-64-ptwrite-intel.d,
777 testsuite/gas/i386/x86-64-ptwrite.d,
778 testsuite/gas/i386/x86-64-simd-intel.d,
779 testsuite/gas/i386/x86-64-simd-suffix.d,
780 testsuite/gas/i386/x86-64-simd.d,
781 testsuite/gas/i386/x86-64-sse-noavx.d
782 testsuite/gas/i386/x86-64-suffix.d,
783 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
784 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
785 testsuite/gas/i386/noreg64.l: New.
786 * testsuite/gas/i386/i386.exp: Run new tests.
787
c906a69a
JB		 7882020-01-21 Jan Beulich <jbeulich@suse.com>
789
790 * testsuite/gas/i386/avx512_bf16_vl.s,
791 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
792 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
793 broadcast forms of VCVTNEPS2BF16.
794 * testsuite/gas/i386/avx512_bf16_vl.d,
795 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
796
26916852
NC		 7972020-01-20 Nick Clifton <nickc@redhat.com>
798
799 * po/uk.po: Updated Ukranian translation.
800
14470f07
L		 8012020-01-20 H.J. Lu <hongjiu.lu@intel.com>
802
803 PR ld/25416
804 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
805 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
806 x32 object.
807 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
808 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
809 R_X86_64_GOTPC32_TLSDESC relocation.
810
1b1bb2c6
NC		 8112020-01-18 Nick Clifton <nickc@redhat.com>
812
813 * configure: Regenerate.
814 * po/gas.pot: Regenerate.
815
ae774686
NC		 8162020-01-18 Nick Clifton <nickc@redhat.com>
817
818 Binutils 2.34 branch created.
819
42e04b36
L		 8202020-01-17 H.J. Lu <hongjiu.lu@intel.com>
821
822 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
823 with vex_encoding_vex.
824 (parse_insn): Likewise.
825 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
826 and {vex3} documentation.
827 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
828 {vex}.
829 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
830
2da2eaf4
AV		 8312020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
832
833 PR 25376
834 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
835 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
836 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
837 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
838 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
839 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
840
45a4bb20
JB		 8412020-01-16 Jan Beulich <jbeulich@suse.com>
842
843 * config/tc-i386.c (match_template): Drop found_cpu_match local
844 variable.
845
4814632e
JB		 8462020-01-16 Jan Beulich <jbeulich@suse.com>
847
848 * testsuite/gas/i386/avx512dq-inval.l,
849 testsuite/gas/i386/avx512dq-inval.s: New.
850 * testsuite/gas/i386/i386.exp: Run new test.
851
131cb553
JL		 8522020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
853
854 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
855 relocations when the target is 430X, except when extracting part of an
856 expression.
857 (msp430_srcoperand): Adjust comment.
858 Initialize the expp member of the msp430_operand_s struct as
859 appropriate.
860 (msp430_dstoperand): Likewise.
861 * testsuite/gas/msp430/msp430.exp: Run new test.
862 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
863 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
864
c24d0e8d
AM		 8652020-01-15 Alan Modra <amodra@gmail.com>
866
867 * configure.tgt: Add sparc-*-freebsd case.
868
e44925ae
LC		 8692020-01-14 Lili Cui <lili.cui@intel.com>
870
871 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
872 * testsuite/gas/i386/align-branch-1b.d: Likewise.
873 * testsuite/gas/i386/align-branch-1c.d: Likewise.
874 * testsuite/gas/i386/align-branch-1d.d: Likewise.
875 * testsuite/gas/i386/align-branch-1e.d: Likewise.
876 * testsuite/gas/i386/align-branch-1f.d: Likewise.
877 * testsuite/gas/i386/align-branch-1g.d: Likewise.
878 * testsuite/gas/i386/align-branch-1h.d: Likewise.
879 * testsuite/gas/i386/align-branch-1i.d: Likewise.
880 * testsuite/gas/i386/align-branch-5.d: Likewise.
881 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
882 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
883 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
884 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
885 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
886 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
887 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
888 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
889 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
890 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
891 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
892 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
893
7a6bf3be
SB		 8942020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
895
896 PR 25377
897 * config/tc-z80.c: Add support for half precision, single
898 precision and double precision floating point values.
899 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
900 * doc/as.texi: Add new z80 command line options.
901 * doc/c-z80.texi: Document new z80 command line options.
902 * testsuite/gas/z80/ez80_pref_dis.s: New test.
903 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
904 * testsuite/gas/z80/z80.exp: Run the new test.
905 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
906 * testsuite/gas/z80/fp_zeda32.d: Likewise.
907 * testsuite/gas/z80/strings.d: Update expected output.
908
82e9597c
MM		 9092020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
910
911 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
912 dependency.
913
5e4f7e05
CZ		 9142020-01-13 Claudiu Zissulescu <claziss@gmail.com>
915
916 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
917 the CPU.
918 * config/tc-arc.h: Add header if/defs.
919 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
920
febda64f
AM		 9212020-01-13 Alan Modra <amodra@gmail.com>
922
923 * testsuite/gas/wasm32/allinsn.d: Update expected output.
924
5496abe1
AM		 9252020-01-13 Alan Modra <amodra@gmail.com>
926
927 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
928 insertion.
929
ec4181f2
AM		 9302020-01-10 Alan Modra <amodra@gmail.com>
931
932 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
933 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
934
40c75bc8
SB		 9352020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
936
937 PR 25224
938 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
939 opcode byte values.
940 (emit_ld_r_r): Likewise.
941 (emit_ld_rr_m): Likewise.
942 (emit_ld_rr_nn): Likewise.
943
72aea328
JB		 9442020-01-09 Jan Beulich <jbeulich@suse.com>
945
946 * config/tc-i386.c (optimize_encoding): Add
947 is_any_vex_encoding() invocations. Drop respective
948 i.tm.extension_opcode == None checks.
949
3f93af61
JB		 9502020-01-09 Jan Beulich <jbeulich@suse.com>
951
952 * config/tc-i386.c (md_assemble): Check RegRex is clear during
953 REX transformations. Correct comment indentation.
954
7697afb6
JB		 9552020-01-09 Jan Beulich <jbeulich@suse.com>
956
957 * config/tc-i386.c (optimize_encoding): Generalize register
958 transformation for TEST optimization.
959
d835a58b
JB		 9602020-01-09 Jan Beulich <jbeulich@suse.com>
961
962 * testsuite/gas/i386/x86-64-sysenter-amd.s,
963 testsuite/gas/i386/x86-64-sysenter-amd.d,
964 testsuite/gas/i386/x86-64-sysenter-amd.l,
965 testsuite/gas/i386/x86-64-sysenter-intel.d,
966 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
967 * testsuite/gas/i386/i386.exp: Run new tests.
968
915808f6
NC		 9692020-01-08 Nick Clifton <nickc@redhat.com>
970
971 PR 25284
972 * doc/as.texi (Align): Document the fact that all arguments can be
973 omitted.
974 (Balign): Likewise.
975 (P2align): Likewise.
976
f1f28025
NC		 9772020-01-08 Nick Clifton <nickc@redhat.com>
978
979 PR 14891
980 * config/obj-elf.c (obj_elf_section): Fail if the section name is
981 already defined as a different symbol type.
982 * testsuite/gas/elf/pr14891.s: New test source file.
983 * testsuite/gas/elf/pr14891.d: New test driver.
984 * testsuite/gas/elf/pr14891.s: New test expected error output.
985 * testsuite/gas/elf/elf.exp: Run the new test.
986
030a2e78
AM		 9872020-01-08 Alan Modra <amodra@gmail.com>
988
989 * config/tc-z8k.c (md_begin): Make idx unsigned.
990 (get_specific): Likewise for this_index.
991
2a1ebfb2
CZ		 9922020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
993
994 * onfig/tc-arc.c (parse_reloc_symbol): New function.
995 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
996 (md_operand): Set X_md to absent.
997 (arc_parse_name): Check for X_md.
998
16d87673
SB		 9992020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1000
1001 PR 25311
1002 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1003 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1004 NO_STRING_ESCAPES.
1005 * read.c (next_char_of_string): Likewise.
1006 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1007 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1008
a2322019
NC		 10092020-01-03 Nick Clifton <nickc@redhat.com>
1010
1011 * po/sv.po: Updated Swedish translation.
1012
5437a02a
JB		 10132020-01-03 Jan Beulich <jbeulich@suse.com>
1014
1015 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1016 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1017
567dfba2
JB		 10182020-01-03 Jan Beulich <jbeulich@suse.com>
1019
1020 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1021 by-element usdot. Add 64-bit form tests for by-element sudot.
1022 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1023
8c45011a
JB		 10242020-01-03 Jan Beulich <jbeulich@suse.com>
1025
1026 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1027 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1028
f4950f76
JB		 10292020-01-03 Jan Beulich <jbeulich@suse.com>
1030
1031 * testsuite/gas/aarch64/f64mm.d,
1032 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1033
6655dba2
SB		 10342020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1035
1036 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1037 support for assembler code generated by SDCC. Add new relocation
1038 types. Add z80-elf target support.
1039 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1040 labels. Local labels starts from ".L".
1041 * NEWS: Mention the new support.
1042 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1043 * testsuite/gas/all/fwdexp.s: Likewise.
1044 * testsuite/gas/all/cond.l: Likewise.
1045 * testsuite/gas/all/cond.s: Likewise.
1046 * testsuite/gas/all/fwdexp.d: Likewise.
1047 * testsuite/gas/all/fwdexp.s: Likewise.
1048 * testsuite/gas/elf/section2.e-mips: Likewise.
1049 * testsuite/gas/elf/section2.l: Likewise.
1050 * testsuite/gas/elf/section2.s: Likewise.
1051 * testsuite/gas/macros/app1.d: Likewise.
1052 * testsuite/gas/macros/app1.s: Likewise.
1053 * testsuite/gas/macros/app2.d: Likewise.
1054 * testsuite/gas/macros/app2.s: Likewise.
1055 * testsuite/gas/macros/app3.d: Likewise.
1056 * testsuite/gas/macros/app3.s: Likewise.
1057 * testsuite/gas/macros/app4.d: Likewise.
1058 * testsuite/gas/macros/app4.s: Likewise.
1059 * testsuite/gas/macros/app4b.s: Likewise.
1060 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1061 * testsuite/gas/z80/z80.exp: Add new tests
1062 * testsuite/gas/z80/dollar.d: New file.
1063 * testsuite/gas/z80/dollar.s: New file.
1064 * testsuite/gas/z80/ez80_adl_all.d: New file.
1065 * testsuite/gas/z80/ez80_adl_all.s: New file.
1066 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1067 * testsuite/gas/z80/ez80_isuf.s: New file.
1068 * testsuite/gas/z80/ez80_z80_all.d: New file.
1069 * testsuite/gas/z80/ez80_z80_all.s: New file.
1070 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1071 * testsuite/gas/z80/r800_extra.d: New file.
1072 * testsuite/gas/z80/r800_extra.s: New file.
1073 * testsuite/gas/z80/r800_ii8.d: New file.
1074 * testsuite/gas/z80/r800_z80_doc.d: New file.
1075 * testsuite/gas/z80/z180.d: New file.
1076 * testsuite/gas/z80/z180.s: New file.
1077 * testsuite/gas/z80/z180_z80_doc.d: New file.
1078 * testsuite/gas/z80/z80_doc.d: New file.
1079 * testsuite/gas/z80/z80_doc.s: New file.
1080 * testsuite/gas/z80/z80_ii8.d: New file.
1081 * testsuite/gas/z80/z80_ii8.s: New file.
1082 * testsuite/gas/z80/z80_in_f_c.d: New file.
1083 * testsuite/gas/z80/z80_in_f_c.s: New file.
1084 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1085 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1086 * testsuite/gas/z80/z80_out_c_0.d: New file.
1087 * testsuite/gas/z80/z80_out_c_0.s: New file.
1088 * testsuite/gas/z80/z80_reloc.d: New file.
1089 * testsuite/gas/z80/z80_reloc.s: New file.
1090 * testsuite/gas/z80/z80_sli.d: New file.
1091 * testsuite/gas/z80/z80_sli.s: New file.
1092
a65b5de6
SN		 10932020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1094
1095 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1096 REGLIST_RN.
1097
b14ce8bf
AM		 10982020-01-01 Alan Modra <amodra@gmail.com>
1099
1100 Update year range in copyright notice of all files.
1101
0b114740 1102For older changes see ChangeLog-2019
3499769a 1103\f
0b114740 1104Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1105
1106Copying and distribution of this file, with or without modification,
1107are permitted in any medium without royalty provided the copyright
1108notice and this notice are preserved.
1109
1110Local Variables:
1111mode: change-log
1112left-margin: 8
1113fill-column: 74
1114version-control: never
1115End:
GDB Binutils - Deliverables
This page took 0.311777 seconds and 4 git commands to generate.