2006-11-29 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
00249aaa
PB
12006-11-29 Paul Brook <paul@codesourcery.com>
2
3 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
4 encoding.
5
a7284bf1
BW
62006-11-27 Sterling Augustine <sterling@tensilica.com>
7
8 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
9 as the first slot_subtype, not the frag subtype.
10
2caa7ca0
BW
112006-11-27 Bob Wilson <bob.wilson@acm.org>
12
13 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
14 (directive_state): Disable scheduling by default.
15 (xtensa_add_config_info): New.
16 (xtensa_end): Call xtensa_add_config_info.
17
062cf837
EB
182006-11-27 Eric Botcazou <ebotcazou@adacore.com>
19
20 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
21 their unaligned counterparts in debugging sections.
22
cefdba39
AM
232006-11-24 Alan Modra <amodra@bigpond.net.au>
24
25 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
26
e821645d
DJ
272006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
28
29 * config/tc-arm.h (md_cons_align): Define.
30 (mapping_state): New prototype.
31 * config/tc-arm.c (mapping_state): Make global.
32
5ab504f9
AM
332006-11-22 Alan Modra <amodra@bigpond.net.au>
34
35 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
36
98a16ee1
ML
372006-11-16 Mei ligang <ligang@sunnorth.com.cn>
38
5ab504f9
AM
39 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
40 branch instruction, handle it specially.
98a16ee1
ML
41 (score_insns): Modify 32 bit branch instruction.
42
0023dd27
AM
432006-11-16 Alan Modra <amodra@bigpond.net.au>
44
45 * symbols.c (resolve_symbol_value): Formatting.
46
bdf128d6
JB
472006-11-15 Jan Beulich <jbeulich@novell.com>
48
49 PR/3469
50 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
51 chain by linking it to itself.
52 (resolve_symbol_value): Also check symbol_shadow_p().
53 (symbol_shadow_p): New.
54 * symbols.h (symbol_shadow_p): Declare.
55
25fe350b
MS
562006-11-12 Mark Shinwell <shinwell@codesourcery.com>
57
58 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
59 (insns): Adjust accordingly.
60 (md_apply_fix): Alter comments to use CBZ instead of CZB.
61
0ffdc86c
NC
622006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
63
64 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
65 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
66
6afdfa61
NC
672006-11-10 Nick Clifton <nickc@redhat.com>
68
69 PR gas/3456:
70 * config/obj-elf.c (obj_elf_version): Do not include the name
71 field's padding in the namesz value.
72
d84bcf09
TS
732006-11-09 Thiemo Seufer <ths@mips.com>
74
75 * config/tc-mips.c: Fix outdated comment.
76
b7d9ef37
L
772006-11-08 H.J. Lu <hongjiu.lu@intel.com>
78
79 * config/tc-i386.h (CpuPNI): Removed.
80 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
81 * config/tc-i386.c (md_assemble): Likewise.
82
05e7221f
AM
832006-11-08 Alan Modra <amodra@bigpond.net.au>
84
85 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
86
df1f3cda
DD
872006-11-06 David Daney <ddaney@avtrex.com>
88
89 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
90
82100185
TS
912006-11-06 Thiemo Seufer <ths@mips.com>
92
93 * doc/c-mips.texi (-march): Document sb1a.
94
a360e743
TS
952006-11-06 Thiemo Seufer <ths@mips.com>
96
97 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
98 34k always has DSP ASE.
99
64817874
TS
1002006-11-03 Thiemo Seufer <ths@mips.com>
101
102 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
103 MIPS16 instructions referencing other sections, unless they are
104 external branches.
105
7764b395
TS
1062006-11-03 Thiemo Seufer <ths@mips.com>
107
108 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
109 release 1 CPU.
110
ae424f82
JJ
1112006-11-03 Jakub Jelinek <jakub@redhat.com>
112
9b8ae42e
JJ
113 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
114 personality and lsda.
115 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
116 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
117 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
118 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
119 (output_cie): Output personality including its encoding and LSDA encoding.
120 (output_fde): Output LSDA.
121 (select_cie_for_fde): Don't share CIE if personality, its encoding or
122 LSDA encoding are different. Copy the 3 fields from fde_entry to
123 cie_entry.
124 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
125
ae424f82
JJ
126 * subsegs.h (struct frchain): Add frch_cfi_data field.
127 * dw2gencfi.c: Include subsegs.h.
128 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
129 (struct frch_cfi_data): New type.
130 (unused_cfi_data): New variable.
131 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
132 and cfa_save_stack static vars into a structure pointed from
133 each frchain.
134 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
135 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
136 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
137 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
138 Likewise.
139
d1e50f8a
DJ
1402006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
141
142 * config/tc-h8300.c (build_bytes): Fix const warning.
143
06d2da93
NC
1442006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
145
146 * tc-score.c (do16_rdrs): Handle not! instruction especially.
147
3ba67470
PB
1482006-10-31 Paul Brook <paul@codesourcery.com>
149
150 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
151 for EABIv4.
152
7a1d4c38
PB
1532006-10-31 Paul Brook <paul@codesourcery.com>
154
155 gas/
156 * config/tc-arm.c (object_arch): New variable.
157 (s_arm_object_arch): New function.
158 (md_pseudo_table): Add object_arch.
159 (aeabi_set_public_attributes): Obey object_arch.
160 * doc/c-arm.texi: Document .object_arch.
161
b138abaa
NC
1622006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
163
164 * tc-score.c (data_op2): Check invalid operands.
165 (my_get_expression): Const operand of some instructions can not be
166 symbol in assembly.
167 (get_insn_class_from_type): Handle instruction type Insn_internal.
168 (do_macro_ldst_label): Modify inst.type.
169 (Insn_PIC): Delete.
170 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 171
c79b7c30
RC
1722006-10-29 Randolph Chung <tausq@debian.org>
173
174 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
175 (hppa_regname_to_dw2regnum): New funcions.
176 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
177 (tc_cfi_frame_initial_instructions)
178 (tc_regname_to_dw2regnum): Define.
179 (hppa_cfi_frame_initial_instructions)
180 (hppa_regname_to_dw2regnum): Declare.
181 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
182 (DWARF2_CIE_DATA_ALIGNMENT): Define.
183
e2785c44
NC
1842006-10-29 Nick Clifton <nickc@redhat.com>
185
186 * config/tc-spu.c (md_assemble): Cast printf string size parameter
187 to int in order to avoid a compiler warning.
188
86157c20
AS
1892006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
190
191 * config/tc-sh.c (md_assemble): Define size of branches.
192
ba5f0fda
BE
1932006-10-26 Ben Elliston <bje@au.ibm.com>
194
195 * dw2gencfi.c (cfi_add_CFA_offset):
196 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
197
033cd5fd
BE
198 * write.c (chain_frchains_together_1): Assert that this function
199 never returns a pointer to the auto variable `dummy'.
200
e9f53129
AM
2012006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
202 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
203 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
204 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
205 Alan Modra <amodra@bigpond.net.au>
206
207 * config/tc-spu.c: New file.
208 * config/tc-spu.h: New file.
209 * configure.tgt: Add SPU support.
210 * Makefile.am: Likewise. Run "make dep-am".
211 * Makefile.in: Regenerate.
212 * po/POTFILES.in: Regenerate.
213
7b383517
BE
2142006-10-25 Ben Elliston <bje@au.ibm.com>
215
216 * expr.c (expr): Replace O_add case in switch (op_left) explaining
217 why it can never occur.
5ab504f9 218
ede602d7
AM
2192006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
220
221 * doc/c-ppc.texi (-mcell): Document.
222 * config/tc-ppc.c (parse_cpu): Parse -mcell.
223 (md_show_usage): Document -mcell.
224
7918206c
MM
2252006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
226
227 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
228
878bcc43
AM
2292006-10-23 Alan Modra <amodra@bigpond.net.au>
230
231 * config/tc-m68hc11.c (md_assemble): Quiet warning.
232
8620418b
MF
2332006-10-19 Mike Frysinger <vapier@gentoo.org>
234
235 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
236 (x86_64_section_letter): Likewise.
237
b3549761
NC
2382006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
239
240 * config/tc-score.c (build_relax_frag): Compute correct
241 tc_frag_data.fixp.
242
71a75f6f
MF
2432006-10-18 Roy Marples <uberlord@gentoo.org>
244
245 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
246 elf32-sparc as a viable target for the -32 switch and any target
247 starting with elf64-sparc as a viable target for the -64 switch.
248 (sparc_target_format): For 64-bit ELF flavoured output use
249 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
250 ELF_TARGET_FORMAT.
71a75f6f
MF
251 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
252
e1b5fdd4
L
2532006-10-17 H.J. Lu <hongjiu.lu@intel.com>
254
255 * configure: Regenerated.
256
f8ef9cd7
BS
2572006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
258
259 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
260 in addition to testing for '\n'.
261 (TC_EOL_IN_INSN): Provide a default definition if necessary.
262
eb1fe072
NC
2632006-10-13 Sterling Augstine <sterling@tensilica.com>
264
265 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
266 a disjoint DW_AT range.
267
ec6e49f4
NC
2682006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
269
270 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
271
036dc3f7
PB
2722006-10-08 Paul Brook <paul@codesourcery.com>
273
274 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
275 (parse_operands): Use parse_big_immediate for OP_NILO.
276 (neon_cmode_for_logic_imm): Try smaller element sizes.
277 (neon_cmode_for_move_imm): Ditto.
278 (do_neon_logic): Handle .i64 pseudo-op.
279
3bb0c887
AM
2802006-09-29 Alan Modra <amodra@bigpond.net.au>
281
282 * po/POTFILES.in: Regenerate.
283
ef05d495
L
2842006-09-28 H.J. Lu <hongjiu.lu@intel.com>
285
286 * config/tc-i386.h (CpuMNI): Renamed to ...
287 (CpuSSSE3): This.
288 (CpuUnknownFlags): Updated.
289 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
290 and PROCESSOR_MEROM with PROCESSOR_CORE2.
291 * config/tc-i386.c: Updated.
292 * doc/c-i386.texi: Likewise.
a70ae331 293
ef05d495
L
294 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
295
d8ad03e9
NC
2962006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
297
298 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
299
df3ca5a3
NC
3002006-09-27 Nick Clifton <nickc@redhat.com>
301
302 * output-file.c (output_file_close): Prevent an infinite loop
303 reporting that stdoutput could not be closed.
304
2d447fca
JM
3052006-09-26 Mark Shinwell <shinwell@codesourcery.com>
306 Joseph Myers <joseph@codesourcery.com>
307 Ian Lance Taylor <ian@wasabisystems.com>
308 Ben Elliston <bje@wasabisystems.com>
309
310 * config/tc-arm.c (arm_cext_iwmmxt2): New.
311 (enum operand_parse_code): New code OP_RIWR_I32z.
312 (parse_operands): Handle OP_RIWR_I32z.
313 (do_iwmmxt_wmerge): New function.
314 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
315 a register.
316 (do_iwmmxt_wrwrwr_or_imm5): New function.
317 (insns): Mark instructions as RIWR_I32z as appropriate.
318 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
319 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
320 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
321 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
322 (md_begin): Handle IWMMXT2.
323 (arm_cpus): Add iwmmxt2.
324 (arm_extensions): Likewise.
325 (arm_archs): Likewise.
326
ba83aca1
BW
3272006-09-25 Bob Wilson <bob.wilson@acm.org>
328
329 * doc/as.texinfo (Overview): Revise description of --keep-locals.
330 Add xref to "Symbol Names".
331 (L): Refer to "local symbols" instead of "local labels". Move
332 definition to "Symbol Names" section; add xref to that section.
333 (Symbol Names): Use "Local Symbol Names" section to define local
334 symbols. Add "Local Labels" heading for description of temporary
335 forward/backward labels, and refer to those as "local labels".
336
539e75ad
L
3372006-09-23 H.J. Lu <hongjiu.lu@intel.com>
338
339 PR binutils/3235
340 * config/tc-i386.c (match_template): Check address size prefix
341 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
342 operand.
343
5e02f92e
AM
3442006-09-22 Alan Modra <amodra@bigpond.net.au>
345
346 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
347
885afe7b
AM
3482006-09-22 Alan Modra <amodra@bigpond.net.au>
349
350 * as.h (as_perror): Delete declaration.
351 * gdbinit.in (as_perror): Delete breakpoint.
352 * messages.c (as_perror): Delete function.
353 * doc/internals.texi: Remove as_perror description.
354 * listing.c (listing_print: Don't use as_perror.
355 * output-file.c (output_file_create, output_file_close): Likewise.
356 * symbols.c (symbol_create, symbol_clone): Likewise.
357 * write.c (write_contents): Likewise.
358 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
359 * config/tc-tic54x.c (tic54x_mlib): Likewise.
360
3aeeedbb
AM
3612006-09-22 Alan Modra <amodra@bigpond.net.au>
362
363 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
364 (ppc_handle_align): New function.
365 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
366 (SUB_SEGMENT_ALIGN): Define as zero.
367
96e9638b
BW
3682006-09-20 Bob Wilson <bob.wilson@acm.org>
369
370 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
371 (Overview): Skip cross reference in man page.
372
99ad8390
NC
3732006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
374
375 * configure.in: Add new target x86_64-pc-mingw64.
376 * configure: Regenerate.
377 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
378 * config/obj-coff.h: Add handling for TE_PEP target specific code
379 and definitions.
99ad8390
NC
380 * config/tc-i386.c: Add new targets.
381 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
382 (x86_64_target_format): Add new method for setup proper default
383 target cpu mode.
99ad8390
NC
384 * config/te-pep.h: Add new target definition header.
385 (TE_PEP): New macro: Identifies new target architecture.
386 (COFF_WITH_pex64): Set proper includes in bfd.
387 * NEWS: Mention new target.
388
73332571
BS
3892006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
390
391 * config/bfin-parse.y (binary): Change sub of const to add of negated
392 const.
393
1c0d3aa6
NC
3942006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
395
396 * config/tc-score.c: New file.
397 * config/tc-score.h: Newf file.
398 * configure.tgt: Add Score target.
399 * Makefile.am: Add Score files.
400 * Makefile.in: Regenerate.
401 * NEWS: Mention new target support.
402
4fa3602b
PB
4032006-09-16 Paul Brook <paul@codesourcery.com>
404
405 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
406 * doc/c-arm.texi (movsp): Document offset argument.
407
16dd5e42
PB
4082006-09-16 Paul Brook <paul@codesourcery.com>
409
410 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
411 unsigned int to avoid 64-bit host problems.
412
c4ae04ce
BS
4132006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
414
415 * config/bfin-parse.y (binary): Do some more constant folding for
416 additions.
417
e5d4a5a6
JB
4182006-09-13 Jan Beulich <jbeulich@novell.com>
419
420 * input-file.c (input_file_give_next_buffer): Demote as_bad to
421 as_warn.
422
1a1219cb
AM
4232006-09-13 Alan Modra <amodra@bigpond.net.au>
424
425 PR gas/3165
426 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
427 in parens.
428
f79d9c1d
AM
4292006-09-13 Alan Modra <amodra@bigpond.net.au>
430
431 * input-file.c (input_file_open): Replace as_perror with as_bad
432 so that gas exits with error on file errors. Correct error
433 message.
434 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 435 * input-file.h: Update comment.
f79d9c1d 436
f512f76f
NC
4372006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
438
439 PR gas/3172
440 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
441 registers as a sub-class of wC registers.
442
8d79fd44
AM
4432006-09-11 Alan Modra <amodra@bigpond.net.au>
444
445 PR gas/3165
446 * config/tc-mips.h (enum dwarf2_format): Forward declare.
447 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
448 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
449 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
450
6258339f
NC
4512006-09-08 Nick Clifton <nickc@redhat.com>
452
453 PR gas/3129
454 * doc/as.texinfo (Macro): Improve documentation about separating
455 macro arguments from following text.
456
f91e006c
PB
4572006-09-08 Paul Brook <paul@codesourcery.com>
458
459 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
460
466bbf93
PB
4612006-09-07 Paul Brook <paul@codesourcery.com>
462
463 * config/tc-arm.c (parse_operands): Mark operand as present.
464
428e3f1f
PB
4652006-09-04 Paul Brook <paul@codesourcery.com>
466
467 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
468 (do_neon_dyadic_if_i_d): Avoid setting U bit.
469 (do_neon_mac_maybe_scalar): Ditto.
470 (do_neon_dyadic_narrow): Force operand type to NT_integer.
471 (insns): Remove out of date comments.
472
fb25138b
NC
4732006-08-29 Nick Clifton <nickc@redhat.com>
474
475 * read.c (s_align): Initialize the 'stopc' variable to prevent
476 compiler complaints about it being used without being
477 initialized.
478 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
479 s_float_space, s_struct, cons_worker, equals): Likewise.
480
5091343a
AM
4812006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
482
483 * ecoff.c (ecoff_directive_val): Fix message typo.
484 * config/tc-ns32k.c (convert_iif): Likewise.
485 * config/tc-sh64.c (shmedia_check_limits): Likewise.
486
1f2a7e38
BW
4872006-08-25 Sterling Augustine <sterling@tensilica.com>
488 Bob Wilson <bob.wilson@acm.org>
489
490 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
491 the state of the absolute_literals directive. Remove align frag at
492 the start of the literal pool position.
493
34135039
BW
4942006-08-25 Bob Wilson <bob.wilson@acm.org>
495
496 * doc/c-xtensa.texi: Add @group commands in examples.
497
74869ac7
BW
4982006-08-24 Bob Wilson <bob.wilson@acm.org>
499
500 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
501 (INIT_LITERAL_SECTION_NAME): Delete.
502 (lit_state struct): Remove segment names, init_lit_seg, and
503 fini_lit_seg. Add lit_prefix and current_text_seg.
504 (init_literal_head_h, init_literal_head): Delete.
505 (fini_literal_head_h, fini_literal_head): Delete.
506 (xtensa_begin_directive): Move argument parsing to
507 xtensa_literal_prefix function.
508 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
509 (xtensa_literal_prefix): Parse the directive argument here and
510 record it in the lit_prefix field. Remove code to derive literal
511 section names.
512 (linkonce_len): New.
513 (get_is_linkonce_section): Use linkonce_len. Check for any
514 ".gnu.linkonce.*" section, not just text sections.
515 (md_begin): Remove initialization of deleted lit_state fields.
516 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
517 to init_literal_head and fini_literal_head.
518 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
519 when traversing literal_head list.
520 (match_section_group): New.
521 (cache_literal_section): Rewrite to determine the literal section
522 name on the fly, create the section and return it.
523 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
524 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
525 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
526 Use xtensa_get_property_section from bfd.
527 (retrieve_xtensa_section): Delete.
528 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
529 description to refer to plural literal sections and add xref to
530 the Literal Directive section.
531 (Literal Directive): Describe new rules for deriving literal section
532 names. Add footnote for special case of .init/.fini with
533 --text-section-literals.
534 (Literal Prefix Directive): Replace old naming rules with xref to the
535 Literal Directive section.
536
87a1fd79
JM
5372006-08-21 Joseph Myers <joseph@codesourcery.com>
538
539 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
540 merging with previous long opcode.
541
7148cc28
NC
5422006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
543
544 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
545 * Makefile.in: Regenerate.
546 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
547 renamed. Adjust.
548
3e9e4fcf
JB
5492006-08-16 Julian Brown <julian@codesourcery.com>
550
551 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
552 to use ARM instructions on non-ARM-supporting cores.
553 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
554 mode automatically based on cpu variant.
555 (md_begin): Call above function.
556
267d2029
JB
5572006-08-16 Julian Brown <julian@codesourcery.com>
558
559 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
560 recognized in non-unified syntax mode.
561
4be041b2
TS
5622006-08-15 Thiemo Seufer <ths@mips.com>
563 Nigel Stephens <nigel@mips.com>
564 David Ung <davidu@mips.com>
565
566 * configure.tgt: Handle mips*-sde-elf*.
567
3a93f742
TS
5682006-08-12 Thiemo Seufer <ths@networkno.de>
569
570 * config/tc-mips.c (mips16_ip): Fix argument register handling
571 for restore instruction.
572
1737851b
BW
5732006-08-08 Bob Wilson <bob.wilson@acm.org>
574
575 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
576 (out_sleb128): New.
577 (out_fixed_inc_line_addr): New.
578 (process_entries): Use out_fixed_inc_line_addr when
579 DWARF2_USE_FIXED_ADVANCE_PC is set.
580 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
581
e14e52f8
DD
5822006-08-08 DJ Delorie <dj@redhat.com>
583
584 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
585 vs full symbols so that we never have more than one pointer value
586 for any given symbol in our symbol table.
587
802f5d9e
NC
5882006-08-08 Sterling Augustine <sterling@tensilica.com>
589
590 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
591 and emit DW_AT_ranges when code in compilation unit is not
592 contiguous.
593 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
594 is not contiguous.
595 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
596 (out_debug_ranges): New function to emit .debug_ranges section
597 when code is not contiguous.
598
720abc60
NC
5992006-08-08 Nick Clifton <nickc@redhat.com>
600
601 * config/tc-arm.c (WARN_DEPRECATED): Enable.
602
f0927246
NC
6032006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
604
605 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
606 only block.
607 (pe_directive_secrel) [TE_PE]: New function.
608 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
609 loc, loc_mark_labels.
610 [TE_PE]: Handle secrel32.
611 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
612 call.
613 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
614 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
615 (md_section_align): Only round section sizes here for AOUT
616 targets.
617 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
618 (tc_pe_dwarf2_emit_offset): New function.
619 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
620 (cons_fix_new_arm): Handle O_secrel.
621 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
622 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
623 of OBJ_ELF only block.
624 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
625 tc_pe_dwarf2_emit_offset.
626
55e6e397
RS
6272006-08-04 Richard Sandiford <richard@codesourcery.com>
628
629 * config/tc-sh.c (apply_full_field_fix): New function.
630 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
631 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
632 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
633 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
634
9cd19b17
NC
6352006-08-03 Nick Clifton <nickc@redhat.com>
636
637 PR gas/2991
638 * config.in: Regenerate.
639
97f87066
JM
6402006-08-03 Joseph Myers <joseph@codesourcery.com>
641
642 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 643 for OP_RIWR_RIWC.
97f87066 644
41adaa5c
JM
6452006-08-03 Joseph Myers <joseph@codesourcery.com>
646
647 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
648 (parse_operands): Handle it.
649 (insns): Use it for tmcr and tmrc.
650
9d7cbccd
NC
6512006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
652
653 PR binutils/2983
654 * config/tc-i386.c (md_parse_option): Treat any target starting
655 with elf64_x86_64 as a viable target for the -64 switch.
656 (i386_target_format): For 64-bit ELF flavoured output use
657 ELF_TARGET_FORMAT64.
658 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
659
c973bc5c
NC
6602006-08-02 Nick Clifton <nickc@redhat.com>
661
662 PR gas/2991
663 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
664 bfd/aclocal.m4.
665 * configure.in: Run BFD_BINARY_FOPEN.
666 * configure: Regenerate.
667 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
668 file to include.
669
cfde7f70
L
6702006-08-01 H.J. Lu <hongjiu.lu@intel.com>
671
672 * config/tc-i386.c (md_assemble): Don't update
673 cpu_arch_isa_flags.
674
b4c71f56
TS
6752006-08-01 Thiemo Seufer <ths@mips.com>
676
677 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
678
54f4ddb3
TS
6792006-08-01 Thiemo Seufer <ths@mips.com>
680
681 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
682 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
683 BFD_RELOC_32 and BFD_RELOC_16.
684 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
685 md_convert_frag, md_obj_end): Fix comment formatting.
686
d103cf61
TS
6872006-07-31 Thiemo Seufer <ths@mips.com>
688
689 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
690 handling for BFD_RELOC_MIPS16_JMP.
691
601e61cd
NC
6922006-07-24 Andreas Schwab <schwab@suse.de>
693
694 PR/2756
695 * read.c (read_a_source_file): Ignore unknown text after line
696 comment character. Fix misleading comment.
697
b45619c0
NC
6982006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
699
700 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
701 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
702 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
703 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
704 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
705 doc/c-z80.texi, doc/internals.texi: Fix some typos.
706
784906c5
NC
7072006-07-21 Nick Clifton <nickc@redhat.com>
708
709 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
710 linker testsuite.
711
d5f010e9
TS
7122006-07-20 Thiemo Seufer <ths@mips.com>
713 Nigel Stephens <nigel@mips.com>
714
715 * config/tc-mips.c (md_parse_option): Don't infer optimisation
716 options from debug options.
717
35d3d567
TS
7182006-07-20 Thiemo Seufer <ths@mips.com>
719
720 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
721 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
722
401a54cf
PB
7232006-07-19 Paul Brook <paul@codesourcery.com>
724
725 * config/tc-arm.c (insns): Fix rbit Arm opcode.
726
16805f35
PB
7272006-07-18 Paul Brook <paul@codesourcery.com>
728
729 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
730 (md_convert_frag): Use correct reloc for add_pc. Use
731 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
732 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
733 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
734
d9e05e4e
AM
7352006-07-17 Mat Hostetter <mat@lcs.mit.edu>
736
737 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
738 when file and line unknown.
739
f43abd2b
TS
7402006-07-17 Thiemo Seufer <ths@mips.com>
741
742 * read.c (s_struct): Use IS_ELF.
743 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
744 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
745 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
746 s_mips_mask): Likewise.
747
a2902af6
TS
7482006-07-16 Thiemo Seufer <ths@mips.com>
749 David Ung <davidu@mips.com>
750
751 * read.c (s_struct): Handle ELF section changing.
752 * config/tc-mips.c (s_align): Leave enabling auto-align to the
753 generic code.
754 (s_change_sec): Try section changing only if we output ELF.
755
d32cad65
L
7562006-07-15 H.J. Lu <hongjiu.lu@intel.com>
757
758 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
759 CpuAmdFam10.
760 (smallest_imm_type): Remove Cpu086.
761 (i386_target_format): Likewise.
762
763 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
764 Update CpuXXX.
765
050dfa73
MM
7662006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
767 Michael Meissner <michael.meissner@amd.com>
768
769 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
770 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
771 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
772 architecture.
773 (i386_align_code): Ditto.
774 (md_assemble_code): Add support for insertq/extrq instructions,
775 swapping as needed for intel syntax.
776 (swap_imm_operands): New function to swap immediate operands.
777 (swap_operands): Deal with 4 operand instructions.
778 (build_modrm_byte): Add support for insertq instruction.
779
6b2de085
L
7802006-07-13 H.J. Lu <hongjiu.lu@intel.com>
781
782 * config/tc-i386.h (Size64): Fix a typo in comment.
783
01eaea5a
NC
7842006-07-12 Nick Clifton <nickc@redhat.com>
785
786 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 787 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
788 already been checked here.
789
1e85aad8
JW
7902006-07-07 James E Wilson <wilson@specifix.com>
791
792 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
793
1370e33d
NC
7942006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
795 Nick Clifton <nickc@redhat.com>
796
797 PR binutils/2877
798 * doc/as.texi: Fix spelling typo: branchs => branches.
799 * doc/c-m68hc11.texi: Likewise.
800 * config/tc-m68hc11.c: Likewise.
801 Support old spelling of command line switch for backwards
802 compatibility.
803
5f0fe04b
TS
8042006-07-04 Thiemo Seufer <ths@mips.com>
805 David Ung <davidu@mips.com>
806
807 * config/tc-mips.c (s_is_linkonce): New function.
808 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
809 weak, external, and linkonce symbols.
810 (pic_need_relax): Use s_is_linkonce.
811
85234291
L
8122006-06-24 H.J. Lu <hongjiu.lu@intel.com>
813
814 * doc/as.texinfo (Org): Remove space.
815 (P2align): Add "@var{abs-expr},".
816
ccc9c027
L
8172006-06-23 H.J. Lu <hongjiu.lu@intel.com>
818
819 * config/tc-i386.c (cpu_arch_tune_set): New.
820 (cpu_arch_isa): Likewise.
821 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
822 nops with short or long nop sequences based on -march=/.arch
823 and -mtune=.
824 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
825 set cpu_arch_tune and cpu_arch_tune_flags.
826 (md_parse_option): For -march=, set cpu_arch_isa and set
827 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
828 0. Set cpu_arch_tune_set to 1 for -mtune=.
829 (i386_target_format): Don't set cpu_arch_tune.
830
d4dc2f22
TS
8312006-06-23 Nigel Stephens <nigel@mips.com>
832
833 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
834 generated .sbss.* and .gnu.linkonce.sb.*.
835
a8dbcb85
TS
8362006-06-23 Thiemo Seufer <ths@mips.com>
837 David Ung <davidu@mips.com>
838
839 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
840 label_list.
841 * config/tc-mips.c (label_list): Define per-segment label_list.
842 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
843 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
844 mips_from_file_after_relocs, mips_define_label): Use per-segment
845 label_list.
846
3994f87e
TS
8472006-06-22 Thiemo Seufer <ths@mips.com>
848
849 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
850 (append_insn): Use it.
851 (md_apply_fix): Whitespace formatting.
852 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
853 mips16_extended_frag): Remove register specifier.
854 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
855 constants.
856
fa073d69
MS
8572006-06-21 Mark Shinwell <shinwell@codesourcery.com>
858
859 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
860 a directive saving VFP registers for ARMv6 or later.
861 (s_arm_unwind_save): Add parameter arch_v6 and call
862 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
863 appropriate.
864 (md_pseudo_table): Add entry for new "vsave" directive.
865 * doc/c-arm.texi: Correct error in example for "save"
866 directive (fstmdf -> fstmdx). Also document "vsave" directive.
867
8e77b565 8682006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
869 Anatoly Sokolov <aesok@post.ru>
870
a70ae331
AM
871 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
872 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
873 atmega164p/atmega324p.
874 * doc/c-avr.texi: Document new mcu and arch options.
875
8b1ad454
NC
8762006-06-17 Nick Clifton <nickc@redhat.com>
877
878 * config/tc-arm.c (enum parse_operand_result): Move outside of
879 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
880
9103f4f4
L
8812006-06-16 H.J. Lu <hongjiu.lu@intel.com>
882
883 * config/tc-i386.h (processor_type): New.
884 (arch_entry): Add type.
885
886 * config/tc-i386.c (cpu_arch_tune): New.
887 (cpu_arch_tune_flags): Likewise.
888 (cpu_arch_isa_flags): Likewise.
889 (cpu_arch): Updated.
890 (set_cpu_arch): Also update cpu_arch_isa_flags.
891 (md_assemble): Update cpu_arch_isa_flags.
892 (OPTION_MARCH): New.
893 (OPTION_MTUNE): Likewise.
894 (md_longopts): Add -march= and -mtune=.
895 (md_parse_option): Support -march= and -mtune=.
896 (md_show_usage): Add -march=CPU/-mtune=CPU.
897 (i386_target_format): Also update cpu_arch_isa_flags,
898 cpu_arch_tune and cpu_arch_tune_flags.
899
900 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
901
902 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
903
4962c51a
MS
9042006-06-15 Mark Shinwell <shinwell@codesourcery.com>
905
906 * config/tc-arm.c (enum parse_operand_result): New.
907 (struct group_reloc_table_entry): New.
908 (enum group_reloc_type): New.
909 (group_reloc_table): New array.
910 (find_group_reloc_table_entry): New function.
911 (parse_shifter_operand_group_reloc): New function.
912 (parse_address_main): New function, incorporating code
913 from the old parse_address function. To be used via...
914 (parse_address): wrapper for parse_address_main; and
915 (parse_address_group_reloc): new function, likewise.
916 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
917 OP_ADDRGLDRS, OP_ADDRGLDC.
918 (parse_operands): Support for these new operand codes.
919 New macro po_misc_or_fail_no_backtrack.
920 (encode_arm_cp_address): Preserve group relocations.
921 (insns): Modify to use the above operand codes where group
922 relocations are permitted.
923 (md_apply_fix): Handle the group relocations
924 ALU_PC_G0_NC through LDC_SB_G2.
925 (tc_gen_reloc): Likewise.
926 (arm_force_relocation): Leave group relocations for the linker.
927 (arm_fix_adjustable): Likewise.
928
cd2f129f
JB
9292006-06-15 Julian Brown <julian@codesourcery.com>
930
931 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
932 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
933 relocs properly.
934
46e883c5
L
9352006-06-12 H.J. Lu <hongjiu.lu@intel.com>
936
937 * config/tc-i386.c (process_suffix): Don't add rex64 for
938 "xchg %rax,%rax".
939
1787fe5b
TS
9402006-06-09 Thiemo Seufer <ths@mips.com>
941
942 * config/tc-mips.c (mips_ip): Maintain argument count.
943
96f989c2
AM
9442006-06-09 Alan Modra <amodra@bigpond.net.au>
945
946 * config/tc-iq2000.c: Include sb.h.
947
7c752c2a
TS
9482006-06-08 Nigel Stephens <nigel@mips.com>
949
950 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
951 aliases for better compatibility with SGI tools.
952
03bf704f
AM
9532006-06-08 Alan Modra <amodra@bigpond.net.au>
954
955 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
956 * Makefile.am (GASLIBS): Expand @BFDLIB@.
957 (BFDVER_H): Delete.
958 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
959 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
960 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
961 Run "make dep-am".
962 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
963 * Makefile.in: Regenerate.
964 * doc/Makefile.in: Regenerate.
965 * configure: Regenerate.
966
6648b7cf
JM
9672006-06-07 Joseph S. Myers <joseph@codesourcery.com>
968
969 * po/Make-in (pdf, ps): New dummy targets.
970
037e8744
JB
9712006-06-07 Julian Brown <julian@codesourcery.com>
972
973 * config/tc-arm.c (stdarg.h): include.
974 (arm_it): Add uncond_value field. Add isvec and issingle to operand
975 array.
976 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
977 REG_TYPE_NSDQ (single, double or quad vector reg).
978 (reg_expected_msgs): Update.
979 (BAD_FPU): Add macro for unsupported FPU instruction error.
980 (parse_neon_type): Support 'd' as an alias for .f64.
981 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
982 sets of registers.
983 (parse_vfp_reg_list): Don't update first arg on error.
984 (parse_neon_mov): Support extra syntax for VFP moves.
985 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
986 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
987 (parse_operands): Support isvec, issingle operands fields, new parse
988 codes above.
989 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
990 msr variants.
991 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
992 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
993 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
994 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
995 shapes.
996 (neon_shape): Redefine in terms of above.
997 (neon_shape_class): New enumeration, table of shape classes.
998 (neon_shape_el): New enumeration. One element of a shape.
999 (neon_shape_el_size): Register widths of above, where appropriate.
1000 (neon_shape_info): New struct. Info for shape table.
1001 (neon_shape_tab): New array.
1002 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1003 (neon_check_shape): Rewrite as...
1004 (neon_select_shape): New function to classify instruction shapes,
1005 driven by new table neon_shape_tab array.
1006 (neon_quad): New function. Return 1 if shape should set Q flag in
1007 instructions (or equivalent), 0 otherwise.
1008 (type_chk_of_el_type): Support F64.
1009 (el_type_of_type_chk): Likewise.
1010 (neon_check_type): Add support for VFP type checking (VFP data
1011 elements fill their containing registers).
1012 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1013 in thumb mode for VFP instructions.
1014 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1015 and encode the current instruction as if it were that opcode.
1016 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1017 arguments, call function in PFN.
1018 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1019 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1020 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1021 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1022 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1023 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1024 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1025 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1026 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1027 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1028 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1029 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1030 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1031 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1032 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1033 neon_quad.
1034 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1035 between VFP and Neon turns out to belong to Neon. Perform
1036 architecture check and fill in condition field if appropriate.
1037 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1038 (do_neon_cvt): Add support for VFP variants of instructions.
1039 (neon_cvt_flavour): Extend to cover VFP conversions.
1040 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1041 vmov variants.
1042 (do_neon_ldr_str): Handle single-precision VFP load/store.
1043 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1044 NS_NULL not NS_IGNORE.
1045 (opcode_tag): Add OT_csuffixF for operands which either take a
1046 conditional suffix, or have 0xF in the condition field.
1047 (md_assemble): Add support for OT_csuffixF.
1048 (NCE): Replace macro with...
1049 (NCE_tag, NCE, NCEF): New macros.
1050 (nCE): Replace macro with...
1051 (nCE_tag, nCE, nCEF): New macros.
1052 (insns): Add support for VFP insns or VFP versions of insns msr,
1053 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1054 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1055 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1056 VFP/Neon insns together.
1057
ebd1c875
AM
10582006-06-07 Alan Modra <amodra@bigpond.net.au>
1059 Ladislav Michl <ladis@linux-mips.org>
1060
1061 * app.c: Don't include headers already included by as.h.
1062 * as.c: Likewise.
1063 * atof-generic.c: Likewise.
1064 * cgen.c: Likewise.
1065 * dwarf2dbg.c: Likewise.
1066 * expr.c: Likewise.
1067 * input-file.c: Likewise.
1068 * input-scrub.c: Likewise.
1069 * macro.c: Likewise.
1070 * output-file.c: Likewise.
1071 * read.c: Likewise.
1072 * sb.c: Likewise.
1073 * config/bfin-lex.l: Likewise.
1074 * config/obj-coff.h: Likewise.
1075 * config/obj-elf.h: Likewise.
1076 * config/obj-som.h: Likewise.
1077 * config/tc-arc.c: Likewise.
1078 * config/tc-arm.c: Likewise.
1079 * config/tc-avr.c: Likewise.
1080 * config/tc-bfin.c: Likewise.
1081 * config/tc-cris.c: Likewise.
1082 * config/tc-d10v.c: Likewise.
1083 * config/tc-d30v.c: Likewise.
1084 * config/tc-dlx.h: Likewise.
1085 * config/tc-fr30.c: Likewise.
1086 * config/tc-frv.c: Likewise.
1087 * config/tc-h8300.c: Likewise.
1088 * config/tc-hppa.c: Likewise.
1089 * config/tc-i370.c: Likewise.
1090 * config/tc-i860.c: Likewise.
1091 * config/tc-i960.c: Likewise.
1092 * config/tc-ip2k.c: Likewise.
1093 * config/tc-iq2000.c: Likewise.
1094 * config/tc-m32c.c: Likewise.
1095 * config/tc-m32r.c: Likewise.
1096 * config/tc-maxq.c: Likewise.
1097 * config/tc-mcore.c: Likewise.
1098 * config/tc-mips.c: Likewise.
1099 * config/tc-mmix.c: Likewise.
1100 * config/tc-mn10200.c: Likewise.
1101 * config/tc-mn10300.c: Likewise.
1102 * config/tc-msp430.c: Likewise.
1103 * config/tc-mt.c: Likewise.
1104 * config/tc-ns32k.c: Likewise.
1105 * config/tc-openrisc.c: Likewise.
1106 * config/tc-ppc.c: Likewise.
1107 * config/tc-s390.c: Likewise.
1108 * config/tc-sh.c: Likewise.
1109 * config/tc-sh64.c: Likewise.
1110 * config/tc-sparc.c: Likewise.
1111 * config/tc-tic30.c: Likewise.
1112 * config/tc-tic4x.c: Likewise.
1113 * config/tc-tic54x.c: Likewise.
1114 * config/tc-v850.c: Likewise.
1115 * config/tc-vax.c: Likewise.
1116 * config/tc-xc16x.c: Likewise.
1117 * config/tc-xstormy16.c: Likewise.
1118 * config/tc-xtensa.c: Likewise.
1119 * config/tc-z80.c: Likewise.
1120 * config/tc-z8k.c: Likewise.
1121 * macro.h: Don't include sb.h or ansidecl.h.
1122 * sb.h: Don't include stdio.h or ansidecl.h.
1123 * cond.c: Include sb.h.
1124 * itbl-lex.l: Include as.h instead of other system headers.
1125 * itbl-parse.y: Likewise.
1126 * itbl-ops.c: Similarly.
1127 * itbl-ops.h: Don't include as.h or ansidecl.h.
1128 * config/bfin-defs.h: Don't include bfd.h or as.h.
1129 * config/bfin-parse.y: Include as.h instead of other system headers.
1130
9622b051
AM
11312006-06-06 Ben Elliston <bje@au.ibm.com>
1132 Anton Blanchard <anton@samba.org>
1133
1134 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1135 (md_show_usage): Document it.
1136 (ppc_setup_opcodes): Test power6 opcode flag bits.
1137 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1138
65263ce3
TS
11392006-06-06 Thiemo Seufer <ths@mips.com>
1140 Chao-ying Fu <fu@mips.com>
1141
1142 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1143 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1144 (macro_build): Update comment.
1145 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1146 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1147 CPU_HAS_MDMX.
1148 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1149 MIPS_CPU_ASE_MDMX flags for sb1.
1150
a9e24354
TS
11512006-06-05 Thiemo Seufer <ths@mips.com>
1152
1153 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1154 appropriate.
1155 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1156 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1157 and MT instructions a fatal error. Use INSERT_OPERAND where
1158 appropriate. Improve warnings for break and wait code overflows.
1159 Use symbolic constant of OP_MASK_COPZ.
1160 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1161
4cfe2c59
DJ
11622006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1163
1164 * po/Make-in (top_builddir): Define.
1165
e10fad12
JM
11662006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1167
1168 * doc/Makefile.am (TEXI2DVI): Define.
1169 * doc/Makefile.in: Regenerate.
1170 * doc/c-arc.texi: Fix typo.
1171
12e64c2c
AM
11722006-06-01 Alan Modra <amodra@bigpond.net.au>
1173
1174 * config/obj-ieee.c: Delete.
1175 * config/obj-ieee.h: Delete.
1176 * Makefile.am (OBJ_FORMATS): Remove ieee.
1177 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1178 (obj-ieee.o): Remove rule.
1179 * Makefile.in: Regenerate.
1180 * configure.in (atof): Remove tahoe.
1181 (OBJ_MAYBE_IEEE): Don't define.
1182 * configure: Regenerate.
1183 * config.in: Regenerate.
1184 * doc/Makefile.in: Regenerate.
1185 * po/POTFILES.in: Regenerate.
1186
20e95c23
DJ
11872006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1188
1189 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1190 and LIBINTL_DEP everywhere.
1191 (INTLLIBS): Remove.
1192 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1193 * acinclude.m4: Include new gettext macros.
1194 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1195 Remove local code for po/Makefile.
1196 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1197
eebf07fb
NC
11982006-05-30 Nick Clifton <nickc@redhat.com>
1199
1200 * po/es.po: Updated Spanish translation.
1201
b6aee19e
DC
12022006-05-06 Denis Chertykov <denisc@overta.ru>
1203
1204 * doc/c-avr.texi: New file.
1205 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1206 * doc/all.texi: Set AVR
1207 * doc/as.texinfo: Include c-avr.texi
1208
f8fdc850 12092006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1210
f8fdc850
JZ
1211 * config/bfin-parse.y (check_macfunc): Loose the condition of
1212 calling check_multiply_halfregs ().
1213
a3205465
JZ
12142006-05-25 Jie Zhang <jie.zhang@analog.com>
1215
1216 * config/bfin-parse.y (asm_1): Better check and deal with
1217 vector and scalar Multiply 16-Bit Operands instructions.
1218
9b52905e
NC
12192006-05-24 Nick Clifton <nickc@redhat.com>
1220
1221 * config/tc-hppa.c: Convert to ISO C90 format.
1222 * config/tc-hppa.h: Likewise.
1223
12242006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1225 Randolph Chung <randolph@tausq.org>
a70ae331 1226
9b52905e
NC
1227 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1228 is_tls_ieoff, is_tls_leoff): Define.
1229 (fix_new_hppa): Handle TLS.
1230 (cons_fix_new_hppa): Likewise.
1231 (pa_ip): Likewise.
1232 (md_apply_fix): Handle TLS relocs.
1233 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1234
a70ae331 12352006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1236
1237 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1238
ad3fea08
TS
12392006-05-23 Thiemo Seufer <ths@mips.com>
1240 David Ung <davidu@mips.com>
1241 Nigel Stephens <nigel@mips.com>
1242
1243 [ gas/ChangeLog ]
1244 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1245 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1246 ISA_HAS_MXHC1): New macros.
1247 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1248 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1249 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1250 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1251 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1252 (mips_after_parse_args): Change default handling of float register
1253 size to account for 32bit code with 64bit FP. Better sanity checking
1254 of ISA/ASE/ABI option combinations.
1255 (s_mipsset): Support switching of GPR and FPR sizes via
1256 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1257 options.
1258 (mips_elf_final_processing): We should record the use of 64bit FP
1259 registers in 32bit code but we don't, because ELF header flags are
1260 a scarce ressource.
1261 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1262 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1263 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1264 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1265 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1266 missing -march options. Document .set arch=CPU. Move .set smartmips
1267 to ASE page. Use @code for .set FOO examples.
1268
8b64503a
JZ
12692006-05-23 Jie Zhang <jie.zhang@analog.com>
1270
1271 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1272 if needed.
1273
403022e0
JZ
12742006-05-23 Jie Zhang <jie.zhang@analog.com>
1275
1276 * config/bfin-defs.h (bfin_equals): Remove declaration.
1277 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1278 * config/tc-bfin.c (bfin_name_is_register): Remove.
1279 (bfin_equals): Remove.
1280 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1281 (bfin_name_is_register): Remove declaration.
1282
7455baf8
TS
12832006-05-19 Thiemo Seufer <ths@mips.com>
1284 Nigel Stephens <nigel@mips.com>
1285
1286 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1287 (mips_oddfpreg_ok): New function.
1288 (mips_ip): Use it.
1289
707bfff6
TS
12902006-05-19 Thiemo Seufer <ths@mips.com>
1291 David Ung <davidu@mips.com>
1292
1293 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1294 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1295 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1296 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1297 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1298 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1299 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1300 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1301 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1302 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1303 reg_names_o32, reg_names_n32n64): Define register classes.
1304 (reg_lookup): New function, use register classes.
1305 (md_begin): Reserve register names in the symbol table. Simplify
1306 OBJ_ELF defines.
1307 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1308 Use reg_lookup.
1309 (mips16_ip): Use reg_lookup.
1310 (tc_get_register): Likewise.
1311 (tc_mips_regname_to_dw2regnum): New function.
1312
1df69f4f
TS
13132006-05-19 Thiemo Seufer <ths@mips.com>
1314
1315 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1316 Un-constify string argument.
1317 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1318 Likewise.
1319 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1320 Likewise.
1321 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1322 Likewise.
1323 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1324 Likewise.
1325 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1326 Likewise.
1327 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1328 Likewise.
1329
377260ba
NS
13302006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1331
1332 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1333 cfloat/m68881 to correct architecture before using it.
1334
cce7653b
NC
13352006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1336
a70ae331 1337 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1338 constant values.
1339
b0796911
PB
13402006-05-15 Paul Brook <paul@codesourcery.com>
1341
1342 * config/tc-arm.c (arm_adjust_symtab): Use
1343 bfd_is_arm_special_symbol_name.
1344
64b607e6
BW
13452006-05-15 Bob Wilson <bob.wilson@acm.org>
1346
1347 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1348 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1349 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1350 Handle errors from calls to xtensa_opcode_is_* functions.
1351
9b3f89ee
TS
13522006-05-14 Thiemo Seufer <ths@mips.com>
1353
1354 * config/tc-mips.c (macro_build): Test for currently active
1355 mips16 option.
1356 (mips16_ip): Reject invalid opcodes.
1357
370b66a1
CD
13582006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1359
1360 * doc/as.texinfo: Rename "Index" to "AS Index",
1361 and "ABORT" to "ABORT (COFF)".
1362
b6895b4f
PB
13632006-05-11 Paul Brook <paul@codesourcery.com>
1364
1365 * config/tc-arm.c (parse_half): New function.
1366 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1367 (parse_operands): Ditto.
1368 (do_mov16): Reject invalid relocations.
1369 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1370 (insns): Replace Iffff with HALF.
1371 (md_apply_fix): Add MOVW and MOVT relocs.
1372 (tc_gen_reloc): Ditto.
1373 * doc/c-arm.texi: Document relocation operators
1374
e28387c3
PB
13752006-05-11 Paul Brook <paul@codesourcery.com>
1376
1377 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1378
89ee2ebe
TS
13792006-05-11 Thiemo Seufer <ths@mips.com>
1380
1381 * config/tc-mips.c (append_insn): Don't check the range of j or
1382 jal addresses.
1383
53baae48
NC
13842006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1385
1386 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1387 relocs against external symbols for WinCE targets.
53baae48
NC
1388 (md_apply_fix): Likewise.
1389
4e2a74a8
TS
13902006-05-09 David Ung <davidu@mips.com>
1391
1392 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1393 j or jal address.
1394
337ff0a5
NC
13952006-05-09 Nick Clifton <nickc@redhat.com>
1396
1397 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1398 against symbols which are not going to be placed into the symbol
1399 table.
1400
8c9f705e
BE
14012006-05-09 Ben Elliston <bje@au.ibm.com>
1402
1403 * expr.c (operand): Remove `if (0 && ..)' statement and
1404 subsequently unused target_op label. Collapse `if (1 || ..)'
1405 statement.
1406 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1407 separately above the switch.
1408
2fd0d2ac
NC
14092006-05-08 Nick Clifton <nickc@redhat.com>
1410
1411 PR gas/2623
1412 * config/tc-msp430.c (line_separator_character): Define as |.
1413
e16bfa71
TS
14142006-05-08 Thiemo Seufer <ths@mips.com>
1415 Nigel Stephens <nigel@mips.com>
1416 David Ung <davidu@mips.com>
1417
1418 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1419 (mips_opts): Likewise.
1420 (file_ase_smartmips): New variable.
1421 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1422 (macro_build): Handle SmartMIPS instructions.
1423 (mips_ip): Likewise.
1424 (md_longopts): Add argument handling for smartmips.
1425 (md_parse_options, mips_after_parse_args): Likewise.
1426 (s_mipsset): Add .set smartmips support.
1427 (md_show_usage): Document -msmartmips/-mno-smartmips.
1428 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1429 .set smartmips.
1430 * doc/c-mips.texi: Likewise.
1431
32638454
AM
14322006-05-08 Alan Modra <amodra@bigpond.net.au>
1433
1434 * write.c (relax_segment): Add pass count arg. Don't error on
1435 negative org/space on first two passes.
1436 (relax_seg_info): New struct.
1437 (relax_seg, write_object_file): Adjust.
1438 * write.h (relax_segment): Update prototype.
1439
b7fc2769
JB
14402006-05-05 Julian Brown <julian@codesourcery.com>
1441
1442 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1443 checking.
1444 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1445 architecture version checks.
1446 (insns): Allow overlapping instructions to be used in VFP mode.
1447
7f841127
L
14482006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1449
1450 PR gas/2598
1451 * config/obj-elf.c (obj_elf_change_section): Allow user
1452 specified SHF_ALPHA_GPREL.
1453
73160847
NC
14542006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1455
1456 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1457 for PMEM related expressions.
1458
56487c55
NC
14592006-05-05 Nick Clifton <nickc@redhat.com>
1460
1461 PR gas/2582
1462 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1463 insertion of a directory separator character into a string at a
1464 given offset. Uses heuristics to decide when to use a backslash
1465 character rather than a forward-slash character.
1466 (dwarf2_directive_loc): Use the macro.
1467 (out_debug_info): Likewise.
1468
d43b4baf
TS
14692006-05-05 Thiemo Seufer <ths@mips.com>
1470 David Ung <davidu@mips.com>
1471
1472 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1473 instruction.
1474 (macro): Add new case M_CACHE_AB.
1475
088fa78e
KH
14762006-05-04 Kazu Hirata <kazu@codesourcery.com>
1477
1478 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1479 (opcode_lookup): Issue a warning for opcode with
1480 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1481 identical to OT_cinfix3.
1482 (TxC3w, TC3w, tC3w): New.
1483 (insns): Use tC3w and TC3w for comparison instructions with
1484 's' suffix.
1485
c9049d30
AM
14862006-05-04 Alan Modra <amodra@bigpond.net.au>
1487
1488 * subsegs.h (struct frchain): Delete frch_seg.
1489 (frchain_root): Delete.
1490 (seg_info): Define as macro.
1491 * subsegs.c (frchain_root): Delete.
1492 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1493 (subsegs_begin, subseg_change): Adjust for above.
1494 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1495 rather than to one big list.
1496 (subseg_get): Don't special case abs, und sections.
1497 (subseg_new, subseg_force_new): Don't set frchainP here.
1498 (seg_info): Delete.
1499 (subsegs_print_statistics): Adjust frag chain control list traversal.
1500 * debug.c (dmp_frags): Likewise.
1501 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1502 at frchain_root. Make use of known frchain ordering.
1503 (last_frag_for_seg): Likewise.
1504 (get_frag_fix): Likewise. Add seg param.
1505 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1506 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1507 (SUB_SEGMENT_ALIGN): Likewise.
1508 (subsegs_finish): Adjust frchain list traversal.
1509 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1510 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1511 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1512 (xtensa_fix_b_j_loop_end_frags): Likewise.
1513 (xtensa_fix_close_loop_end_frags): Likewise.
1514 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1515 (retrieve_segment_info): Delete frch_seg initialisation.
1516
f592407e
AM
15172006-05-03 Alan Modra <amodra@bigpond.net.au>
1518
1519 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1520 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1521 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1522 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1523
df7849c5
JM
15242006-05-02 Joseph Myers <joseph@codesourcery.com>
1525
1526 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1527 here.
1528 (md_apply_fix3): Multiply offset by 4 here for
1529 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1530
2d545b82
L
15312006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1532 Jan Beulich <jbeulich@novell.com>
1533
1534 * config/tc-i386.c (output_invalid_buf): Change size for
1535 unsigned char.
1536 * config/tc-tic30.c (output_invalid_buf): Likewise.
1537
1538 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1539 unsigned char.
1540 * config/tc-tic30.c (output_invalid): Likewise.
1541
38fc1cb1
DJ
15422006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1543
1544 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1545 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1546 (asconfig.texi): Don't set top_srcdir.
1547 * doc/as.texinfo: Don't use top_srcdir.
1548 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1549
2d545b82
L
15502006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1551
1552 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1553 * config/tc-tic30.c (output_invalid_buf): Likewise.
1554
1555 * config/tc-i386.c (output_invalid): Use snprintf instead of
1556 sprintf.
1557 * config/tc-ia64.c (declare_register_set): Likewise.
1558 (emit_one_bundle): Likewise.
1559 (check_dependencies): Likewise.
1560 * config/tc-tic30.c (output_invalid): Likewise.
1561
a8bc6c78
PB
15622006-05-02 Paul Brook <paul@codesourcery.com>
1563
1564 * config/tc-arm.c (arm_optimize_expr): New function.
1565 * config/tc-arm.h (md_optimize_expr): Define
1566 (arm_optimize_expr): Add prototype.
1567 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1568
58633d9a
BE
15692006-05-02 Ben Elliston <bje@au.ibm.com>
1570
22772e33
BE
1571 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1572 field unsigned.
1573
58633d9a
BE
1574 * sb.h (sb_list_vector): Move to sb.c.
1575 * sb.c (free_list): Use type of sb_list_vector directly.
1576 (sb_build): Fix off-by-one error in assertion about `size'.
1577
89cdfe57
BE
15782006-05-01 Ben Elliston <bje@au.ibm.com>
1579
1580 * listing.c (listing_listing): Remove useless loop.
1581 * macro.c (macro_expand): Remove is_positional local variable.
1582 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1583 and simplify surrounding expressions, where possible.
1584 (assign_symbol): Likewise.
1585 (s_weakref): Likewise.
1586 * symbols.c (colon): Likewise.
1587
c35da140
AM
15882006-05-01 James Lemke <jwlemke@wasabisystems.com>
1589
1590 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1591
9bcd4f99
TS
15922006-04-30 Thiemo Seufer <ths@mips.com>
1593 David Ung <davidu@mips.com>
1594
1595 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1596 (mips_immed): New table that records various handling of udi
1597 instruction patterns.
1598 (mips_ip): Adds udi handling.
1599
001ae1a4
AM
16002006-04-28 Alan Modra <amodra@bigpond.net.au>
1601
1602 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1603 of list rather than beginning.
1604
136da414
JB
16052006-04-26 Julian Brown <julian@codesourcery.com>
1606
1607 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1608 (is_quarter_float): Rename from above. Simplify slightly.
1609 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1610 number.
1611 (parse_neon_mov): Parse floating-point constants.
1612 (neon_qfloat_bits): Fix encoding.
1613 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1614 preference to integer encoding when using the F32 type.
1615
dcbf9037
JB
16162006-04-26 Julian Brown <julian@codesourcery.com>
1617
1618 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1619 zero-initialising structures containing it will lead to invalid types).
1620 (arm_it): Add vectype to each operand.
1621 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1622 defined field.
1623 (neon_typed_alias): New structure. Extra information for typed
1624 register aliases.
1625 (reg_entry): Add neon type info field.
1626 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1627 Break out alternative syntax for coprocessor registers, etc. into...
1628 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1629 out from arm_reg_parse.
1630 (parse_neon_type): Move. Return SUCCESS/FAIL.
1631 (first_error): New function. Call to ensure first error which occurs is
1632 reported.
1633 (parse_neon_operand_type): Parse exactly one type.
1634 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1635 (parse_typed_reg_or_scalar): New function. Handle core of both
1636 arm_typed_reg_parse and parse_scalar.
1637 (arm_typed_reg_parse): Parse a register with an optional type.
1638 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1639 result.
1640 (parse_scalar): Parse a Neon scalar with optional type.
1641 (parse_reg_list): Use first_error.
1642 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1643 (neon_alias_types_same): New function. Return true if two (alias) types
1644 are the same.
1645 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1646 of elements.
1647 (insert_reg_alias): Return new reg_entry not void.
1648 (insert_neon_reg_alias): New function. Insert type/index information as
1649 well as register for alias.
1650 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1651 make typed register aliases accordingly.
1652 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1653 of line.
1654 (s_unreq): Delete type information if present.
1655 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1656 (s_arm_unwind_save_mmxwcg): Likewise.
1657 (s_arm_unwind_movsp): Likewise.
1658 (s_arm_unwind_setfp): Likewise.
1659 (parse_shift): Likewise.
1660 (parse_shifter_operand): Likewise.
1661 (parse_address): Likewise.
1662 (parse_tb): Likewise.
1663 (tc_arm_regname_to_dw2regnum): Likewise.
1664 (md_pseudo_table): Add dn, qn.
1665 (parse_neon_mov): Handle typed operands.
1666 (parse_operands): Likewise.
1667 (neon_type_mask): Add N_SIZ.
1668 (N_ALLMODS): New macro.
1669 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1670 (el_type_of_type_chk): Add some safeguards.
1671 (modify_types_allowed): Fix logic bug.
1672 (neon_check_type): Handle operands with types.
1673 (neon_three_same): Remove redundant optional arg handling.
1674 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1675 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1676 (do_neon_step): Adjust accordingly.
1677 (neon_cmode_for_logic_imm): Use first_error.
1678 (do_neon_bitfield): Call neon_check_type.
1679 (neon_dyadic): Rename to...
1680 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1681 to allow modification of type of the destination.
1682 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1683 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1684 (do_neon_compare): Make destination be an untyped bitfield.
1685 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1686 (neon_mul_mac): Return early in case of errors.
1687 (neon_move_immediate): Use first_error.
1688 (neon_mac_reg_scalar_long): Fix type to include scalar.
1689 (do_neon_dup): Likewise.
1690 (do_neon_mov): Likewise (in several places).
1691 (do_neon_tbl_tbx): Fix type.
1692 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1693 (do_neon_ld_dup): Exit early in case of errors and/or use
1694 first_error.
1695 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1696 Handle .dn/.qn directives.
1697 (REGDEF): Add zero for reg_entry neon field.
1698
5287ad62
JB
16992006-04-26 Julian Brown <julian@codesourcery.com>
1700
1701 * config/tc-arm.c (limits.h): Include.
1702 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1703 (fpu_vfp_v3_or_neon_ext): Declare constants.
1704 (neon_el_type): New enumeration of types for Neon vector elements.
1705 (neon_type_el): New struct. Define type and size of a vector element.
1706 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1707 instruction.
1708 (neon_type): Define struct. The type of an instruction.
1709 (arm_it): Add 'vectype' for the current instruction.
1710 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1711 (vfp_sp_reg_pos): Rename to...
1712 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1713 tags.
1714 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1715 (Neon D or Q register).
1716 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1717 register.
1718 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1719 (my_get_expression): Allow above constant as argument to accept
1720 64-bit constants with optional prefix.
1721 (arm_reg_parse): Add extra argument to return the specific type of
1722 register in when either a D or Q register (REG_TYPE_NDQ) is
1723 requested. Can be NULL.
1724 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1725 (parse_reg_list): Update for new arm_reg_parse args.
1726 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1727 (parse_neon_el_struct_list): New function. Parse element/structure
1728 register lists for VLD<n>/VST<n> instructions.
1729 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1730 (s_arm_unwind_save_mmxwr): Likewise.
1731 (s_arm_unwind_save_mmxwcg): Likewise.
1732 (s_arm_unwind_movsp): Likewise.
1733 (s_arm_unwind_setfp): Likewise.
1734 (parse_big_immediate): New function. Parse an immediate, which may be
1735 64 bits wide. Put results in inst.operands[i].
1736 (parse_shift): Update for new arm_reg_parse args.
1737 (parse_address): Likewise. Add parsing of alignment specifiers.
1738 (parse_neon_mov): Parse the operands of a VMOV instruction.
1739 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1740 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1741 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1742 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1743 (parse_operands): Handle new codes above.
1744 (encode_arm_vfp_sp_reg): Rename to...
1745 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1746 selected VFP version only supports D0-D15.
1747 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1748 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1749 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1750 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1751 encode_arm_vfp_reg name, and allow 32 D regs.
1752 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1753 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1754 regs.
1755 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1756 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1757 constant-load and conversion insns introduced with VFPv3.
1758 (neon_tab_entry): New struct.
1759 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1760 those which are the targets of pseudo-instructions.
1761 (neon_opc): Enumerate opcodes, use as indices into...
1762 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1763 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1764 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1765 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1766 neon_enc_tab.
1767 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1768 Neon instructions.
1769 (neon_type_mask): New. Compact type representation for type checking.
1770 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1771 permitted type combinations.
1772 (N_IGNORE_TYPE): New macro.
1773 (neon_check_shape): New function. Check an instruction shape for
1774 multiple alternatives. Return the specific shape for the current
1775 instruction.
1776 (neon_modify_type_size): New function. Modify a vector type and size,
1777 depending on the bit mask in argument 1.
1778 (neon_type_promote): New function. Convert a given "key" type (of an
1779 operand) into the correct type for a different operand, based on a bit
1780 mask.
1781 (type_chk_of_el_type): New function. Convert a type and size into the
1782 compact representation used for type checking.
1783 (el_type_of_type_ckh): New function. Reverse of above (only when a
1784 single bit is set in the bit mask).
1785 (modify_types_allowed): New function. Alter a mask of allowed types
1786 based on a bit mask of modifications.
1787 (neon_check_type): New function. Check the type of the current
1788 instruction against the variable argument list. The "key" type of the
1789 instruction is returned.
1790 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1791 a Neon data-processing instruction depending on whether we're in ARM
1792 mode or Thumb-2 mode.
1793 (neon_logbits): New function.
1794 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1795 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1796 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1797 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1798 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1799 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1800 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1801 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1802 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1803 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1804 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1805 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1806 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1807 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1808 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1809 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1810 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1811 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1812 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1813 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1814 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1815 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1816 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1817 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1818 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1819 helpers.
1820 (parse_neon_type): New function. Parse Neon type specifier.
1821 (opcode_lookup): Allow parsing of Neon type specifiers.
1822 (REGNUM2, REGSETH, REGSET2): New macros.
1823 (reg_names): Add new VFPv3 and Neon registers.
1824 (NUF, nUF, NCE, nCE): New macros for opcode table.
1825 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1826 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1827 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1828 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1829 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1830 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1831 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1832 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1833 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1834 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1835 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1836 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1837 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1838 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1839 fto[us][lh][sd].
1840 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1841 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1842 (arm_option_cpu_value): Add vfp3 and neon.
1843 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1844 VFPv1 attribute.
1845
1946c96e
BW
18462006-04-25 Bob Wilson <bob.wilson@acm.org>
1847
1848 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1849 syntax instead of hardcoded opcodes with ".w18" suffixes.
1850 (wide_branch_opcode): New.
1851 (build_transition): Use it to check for wide branch opcodes with
1852 either ".w18" or ".w15" suffixes.
1853
5033a645
BW
18542006-04-25 Bob Wilson <bob.wilson@acm.org>
1855
1856 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1857 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1858 frag's is_literal flag.
1859
395fa56f
BW
18602006-04-25 Bob Wilson <bob.wilson@acm.org>
1861
1862 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1863
708587a4
KH
18642006-04-23 Kazu Hirata <kazu@codesourcery.com>
1865
1866 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1867 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1868 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1869 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1870 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1871
8463be01
PB
18722005-04-20 Paul Brook <paul@codesourcery.com>
1873
1874 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1875 all targets.
1876 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1877
f26a5955
AM
18782006-04-19 Alan Modra <amodra@bigpond.net.au>
1879
1880 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1881 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1882 Make some cpus unsupported on ELF. Run "make dep-am".
1883 * Makefile.in: Regenerate.
1884
241a6c40
AM
18852006-04-19 Alan Modra <amodra@bigpond.net.au>
1886
1887 * configure.in (--enable-targets): Indent help message.
1888 * configure: Regenerate.
1889
bb8f5920
L
18902006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1891
1892 PR gas/2533
1893 * config/tc-i386.c (i386_immediate): Check illegal immediate
1894 register operand.
1895
23d9d9de
AM
18962006-04-18 Alan Modra <amodra@bigpond.net.au>
1897
64e74474
AM
1898 * config/tc-i386.c: Formatting.
1899 (output_disp, output_imm): ISO C90 params.
1900
6cbe03fb
AM
1901 * frags.c (frag_offset_fixed_p): Constify args.
1902 * frags.h (frag_offset_fixed_p): Ditto.
1903
23d9d9de
AM
1904 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1905 (COFF_MAGIC): Delete.
a37d486e
AM
1906
1907 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1908
e7403566
DJ
19092006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1910
1911 * po/POTFILES.in: Regenerated.
1912
58ab4f3d
MM
19132006-04-16 Mark Mitchell <mark@codesourcery.com>
1914
1915 * doc/as.texinfo: Mention that some .type syntaxes are not
1916 supported on all architectures.
1917
482fd9f9
BW
19182006-04-14 Sterling Augustine <sterling@tensilica.com>
1919
1920 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1921 instructions when such transformations have been disabled.
1922
05d58145
BW
19232006-04-10 Sterling Augustine <sterling@tensilica.com>
1924
1925 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1926 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1927 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1928 decoding the loop instructions. Remove current_offset variable.
1929 (xtensa_fix_short_loop_frags): Likewise.
1930 (min_bytes_to_other_loop_end): Remove current_offset argument.
1931
9e75b3fa
AM
19322006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1933
a37d486e 1934 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1935 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1936
d727e8c2
NC
19372006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1938
1939 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1940 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1941 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1942 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1943 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1944 at90can64, at90usb646, at90usb647, at90usb1286 and
1945 at90usb1287.
1946 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1947
d252fdde
PB
19482006-04-07 Paul Brook <paul@codesourcery.com>
1949
1950 * config/tc-arm.c (parse_operands): Set default error message.
1951
ab1eb5fe
PB
19522006-04-07 Paul Brook <paul@codesourcery.com>
1953
1954 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1955
7ae2971b
PB
19562006-04-07 Paul Brook <paul@codesourcery.com>
1957
1958 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1959
53365c0d
PB
19602006-04-07 Paul Brook <paul@codesourcery.com>
1961
1962 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1963 (move_or_literal_pool): Handle Thumb-2 instructions.
1964 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1965
45aa61fe
AM
19662006-04-07 Alan Modra <amodra@bigpond.net.au>
1967
1968 PR 2512.
1969 * config/tc-i386.c (match_template): Move 64-bit operand tests
1970 inside loop.
1971
108a6f8e
CD
19722006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1973
1974 * po/Make-in: Add install-html target.
1975 * Makefile.am: Add install-html and install-html-recursive targets.
1976 * Makefile.in: Regenerate.
1977 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1978 * configure: Regenerate.
1979 * doc/Makefile.am: Add install-html and install-html-am targets.
1980 * doc/Makefile.in: Regenerate.
1981
ec651a3b
AM
19822006-04-06 Alan Modra <amodra@bigpond.net.au>
1983
1984 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1985 second scan.
1986
910600e9
RS
19872006-04-05 Richard Sandiford <richard@codesourcery.com>
1988 Daniel Jacobowitz <dan@codesourcery.com>
1989
1990 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1991 (GOTT_BASE, GOTT_INDEX): New.
1992 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1993 GOTT_INDEX when generating VxWorks PIC.
1994 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1995 use the generic *-*-vxworks* stanza instead.
1996
99630778
AM
19972006-04-04 Alan Modra <amodra@bigpond.net.au>
1998
1999 PR 997
2000 * frags.c (frag_offset_fixed_p): New function.
2001 * frags.h (frag_offset_fixed_p): Declare.
2002 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2003 (resolve_expression): Likewise.
2004
a02728c8
BW
20052006-04-03 Sterling Augustine <sterling@tensilica.com>
2006
2007 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2008 of the same length but different numbers of slots.
2009
9dfde49d
AS
20102006-03-30 Andreas Schwab <schwab@suse.de>
2011
2012 * configure.in: Fix help string for --enable-targets option.
2013 * configure: Regenerate.
2014
2da12c60
NS
20152006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2016
6d89cc8f
NS
2017 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2018 (m68k_ip): ... here. Use for all chips. Protect against buffer
2019 overrun and avoid excessive copying.
2020
2da12c60
NS
2021 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2022 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2023 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2024 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2025 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2026 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2027 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2028 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2029 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2030 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2031 (struct m68k_cpu): Change chip field to control_regs.
2032 (current_chip): Remove.
2033 (control_regs): New.
2034 (m68k_archs, m68k_extensions): Adjust.
2035 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2036 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2037 (find_cf_chip): Reimplement for new organization of cpu table.
2038 (select_control_regs): Remove.
2039 (mri_chip): Adjust.
2040 (struct save_opts): Save control regs, not chip.
2041 (s_save, s_restore): Adjust.
2042 (m68k_lookup_cpu): Give deprecated warning when necessary.
2043 (m68k_init_arch): Adjust.
2044 (md_show_usage): Adjust for new cpu table organization.
2045
1ac4baed
BS
20462006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2047
2048 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2049 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2050 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2051 "elf/bfin.h".
2052 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2053 (any_gotrel): New rule.
2054 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2055 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2056 "elf/bfin.h".
2057 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2058 (bfin_pic_ptr): New function.
2059 (md_pseudo_table): Add it for ".picptr".
2060 (OPTION_FDPIC): New macro.
2061 (md_longopts): Add -mfdpic.
2062 (md_parse_option): Handle it.
2063 (md_begin): Set BFD flags.
2064 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2065 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2066 us for GOT relocs.
2067 * Makefile.am (bfin-parse.o): Update dependencies.
2068 (DEPTC_bfin_elf): Likewise.
2069 * Makefile.in: Regenerate.
2070
a9d34880
RS
20712006-03-25 Richard Sandiford <richard@codesourcery.com>
2072
2073 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2074 mcfemac instead of mcfmac.
2075
9ca26584
AJ
20762006-03-23 Michael Matz <matz@suse.de>
2077
2078 * config/tc-i386.c (type_names): Correct placement of 'static'.
2079 (reloc): Map some more relocs to their 64 bit counterpart when
2080 size is 8.
2081 (output_insn): Work around breakage if DEBUG386 is defined.
2082 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2083 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2084 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2085 different from i386.
2086 (output_imm): Ditto.
2087 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2088 Imm64.
2089 (md_convert_frag): Jumps can now be larger than 2GB away, error
2090 out in that case.
2091 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2092 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2093
0a44bf69
RS
20942006-03-22 Richard Sandiford <richard@codesourcery.com>
2095 Daniel Jacobowitz <dan@codesourcery.com>
2096 Phil Edwards <phil@codesourcery.com>
2097 Zack Weinberg <zack@codesourcery.com>
2098 Mark Mitchell <mark@codesourcery.com>
2099 Nathan Sidwell <nathan@codesourcery.com>
2100
2101 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2102 (md_begin): Complain about -G being used for PIC. Don't change
2103 the text, data and bss alignments on VxWorks.
2104 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2105 generating VxWorks PIC.
2106 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2107 (macro): Likewise, but do not treat la $25 specially for
2108 VxWorks PIC, and do not handle jal.
2109 (OPTION_MVXWORKS_PIC): New macro.
2110 (md_longopts): Add -mvxworks-pic.
2111 (md_parse_option): Don't complain about using PIC and -G together here.
2112 Handle OPTION_MVXWORKS_PIC.
2113 (md_estimate_size_before_relax): Always use the first relaxation
2114 sequence on VxWorks.
2115 * config/tc-mips.h (VXWORKS_PIC): New.
2116
080eb7fe
PB
21172006-03-21 Paul Brook <paul@codesourcery.com>
2118
2119 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2120
03aaa593
BW
21212006-03-21 Sterling Augustine <sterling@tensilica.com>
2122
2123 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2124 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2125 (get_loop_align_size): New.
2126 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2127 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2128 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2129 (get_noop_aligned_address): Use get_loop_align_size.
2130 (get_aligned_diff): Likewise.
2131
3e94bf1a
PB
21322006-03-21 Paul Brook <paul@codesourcery.com>
2133
2134 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2135
dfa9f0d5
PB
21362006-03-20 Paul Brook <paul@codesourcery.com>
2137
2138 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2139 (do_t_branch): Encode branches inside IT blocks as unconditional.
2140 (do_t_cps): New function.
2141 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2142 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2143 (opcode_lookup): Allow conditional suffixes on all instructions in
2144 Thumb mode.
2145 (md_assemble): Advance condexec state before checking for errors.
2146 (insns): Use do_t_cps.
2147
6e1cb1a6
PB
21482006-03-20 Paul Brook <paul@codesourcery.com>
2149
2150 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2151 outputting the insn.
2152
0a966e2d
JBG
21532006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2154
2155 * config/tc-vax.c: Update copyright year.
2156 * config/tc-vax.h: Likewise.
2157
a49fcc17
JBG
21582006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2159
2160 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2161 make it static.
2162 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2163
f5208ef2
PB
21642006-03-17 Paul Brook <paul@codesourcery.com>
2165
2166 * config/tc-arm.c (insns): Add ldm and stm.
2167
cb4c78d6
BE
21682006-03-17 Ben Elliston <bje@au.ibm.com>
2169
2170 PR gas/2446
2171 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2172
c16d2bf0
PB
21732006-03-16 Paul Brook <paul@codesourcery.com>
2174
2175 * config/tc-arm.c (insns): Add "svc".
2176
80ca4e2c
BW
21772006-03-13 Bob Wilson <bob.wilson@acm.org>
2178
2179 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2180 flag and avoid double underscore prefixes.
2181
3a4a14e9
PB
21822006-03-10 Paul Brook <paul@codesourcery.com>
2183
2184 * config/tc-arm.c (md_begin): Handle EABIv5.
2185 (arm_eabis): Add EF_ARM_EABI_VER5.
2186 * doc/c-arm.texi: Document -meabi=5.
2187
518051dc
BE
21882006-03-10 Ben Elliston <bje@au.ibm.com>
2189
2190 * app.c (do_scrub_chars): Simplify string handling.
2191
00a97672
RS
21922006-03-07 Richard Sandiford <richard@codesourcery.com>
2193 Daniel Jacobowitz <dan@codesourcery.com>
2194 Zack Weinberg <zack@codesourcery.com>
2195 Nathan Sidwell <nathan@codesourcery.com>
2196 Paul Brook <paul@codesourcery.com>
2197 Ricardo Anguiano <anguiano@codesourcery.com>
2198 Phil Edwards <phil@codesourcery.com>
2199
2200 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2201 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2202 R_ARM_ABS12 reloc.
2203 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2204 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2205 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2206
b29757dc
BW
22072006-03-06 Bob Wilson <bob.wilson@acm.org>
2208
2209 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2210 even when using the text-section-literals option.
2211
0b2e31dc
NS
22122006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2213
2214 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2215 and cf.
2216 (m68k_ip): <case 'J'> Check we have some control regs.
2217 (md_parse_option): Allow raw arch switch.
2218 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2219 whether 68881 or cfloat was meant by -mfloat.
2220 (md_show_usage): Adjust extension display.
2221 (m68k_elf_final_processing): Adjust.
2222
df406460
NC
22232006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2224
2225 * config/tc-avr.c (avr_mod_hash_value): New function.
2226 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2227 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2228 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2229 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2230 of (int).
2231 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2232 fixups, abort otherwise.
df406460
NC
2233 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2234 tc_fix_adjustable): Define.
a70ae331 2235
53022e4a
JW
22362006-03-02 James E Wilson <wilson@specifix.com>
2237
2238 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2239 change the template, then clear md.slot[curr].end_of_insn_group.
2240
9f6f925e
JB
22412006-02-28 Jan Beulich <jbeulich@novell.com>
2242
2243 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2244
0e31b3e1
JB
22452006-02-28 Jan Beulich <jbeulich@novell.com>
2246
2247 PR/1070
2248 * macro.c (getstring): Don't treat parentheses special anymore.
2249 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2250 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2251 characters.
2252
10cd14b4
AM
22532006-02-28 Mat <mat@csail.mit.edu>
2254
2255 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2256
63752a75
JJ
22572006-02-27 Jakub Jelinek <jakub@redhat.com>
2258
2259 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2260 field.
2261 (CFI_signal_frame): Define.
2262 (cfi_pseudo_table): Add .cfi_signal_frame.
2263 (dot_cfi): Handle CFI_signal_frame.
2264 (output_cie): Handle cie->signal_frame.
2265 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2266 different. Copy signal_frame from FDE to newly created CIE.
2267 * doc/as.texinfo: Document .cfi_signal_frame.
2268
f7d9e5c3
CD
22692006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2270
2271 * doc/Makefile.am: Add html target.
2272 * doc/Makefile.in: Regenerate.
2273 * po/Make-in: Add html target.
2274
331d2d0d
L
22752006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2276
8502d882 2277 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2278 Instructions.
2279
8502d882 2280 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2281 (CpuUnknownFlags): Add CpuMNI.
2282
10156f83
DM
22832006-02-24 David S. Miller <davem@sunset.davemloft.net>
2284
2285 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2286 (hpriv_reg_table): New table for hyperprivileged registers.
2287 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2288 register encoding.
2289
6772dd07
DD
22902006-02-24 DJ Delorie <dj@redhat.com>
2291
2292 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2293 (tc_gen_reloc): Don't define.
2294 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2295 (OPTION_LINKRELAX): New.
2296 (md_longopts): Add it.
2297 (m32c_relax): New.
2298 (md_parse_options): Set it.
2299 (md_assemble): Emit relaxation relocs as needed.
2300 (md_convert_frag): Emit relaxation relocs as needed.
2301 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2302 (m32c_apply_fix): New.
2303 (tc_gen_reloc): New.
2304 (m32c_force_relocation): Force out jump relocs when relaxing.
2305 (m32c_fix_adjustable): Return false if relaxing.
2306
62b3e311
PB
23072006-02-24 Paul Brook <paul@codesourcery.com>
2308
2309 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2310 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2311 (struct asm_barrier_opt): Define.
2312 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2313 (parse_psr): Accept V7M psr names.
2314 (parse_barrier): New function.
2315 (enum operand_parse_code): Add OP_oBARRIER.
2316 (parse_operands): Implement OP_oBARRIER.
2317 (do_barrier): New function.
2318 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2319 (do_t_cpsi): Add V7M restrictions.
2320 (do_t_mrs, do_t_msr): Validate V7M variants.
2321 (md_assemble): Check for NULL variants.
2322 (v7m_psrs, barrier_opt_names): New tables.
2323 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2324 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2325 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2326 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2327 (struct cpu_arch_ver_table): Define.
2328 (cpu_arch_ver): New.
2329 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2330 Tag_CPU_arch_profile.
2331 * doc/c-arm.texi: Document new cpu and arch options.
2332
59cf82fe
L
23332006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2334
2335 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2336
19a7219f
L
23372006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2338
2339 * config/tc-ia64.c: Update copyright years.
2340
7f3dfb9c
L
23412006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2342
2343 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2344 SDM 2.2.
2345
f40d1643
PB
23462005-02-22 Paul Brook <paul@codesourcery.com>
2347
2348 * config/tc-arm.c (do_pld): Remove incorrect write to
2349 inst.instruction.
2350 (encode_thumb32_addr_mode): Use correct operand.
2351
216d22bc
PB
23522006-02-21 Paul Brook <paul@codesourcery.com>
2353
2354 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2355
d70c5fc7
NC
23562006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2357 Anil Paranjape <anilp1@kpitcummins.com>
2358 Shilin Shakti <shilins@kpitcummins.com>
2359
2360 * Makefile.am: Add xc16x related entry.
2361 * Makefile.in: Regenerate.
2362 * configure.in: Added xc16x related entry.
2363 * configure: Regenerate.
2364 * config/tc-xc16x.h: New file
2365 * config/tc-xc16x.c: New file
2366 * doc/c-xc16x.texi: New file for xc16x
2367 * doc/all.texi: Entry for xc16x
a70ae331 2368 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2369 * NEWS: Announce the support for the new target.
2370
aaa2ab3d
NH
23712006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2372
2373 * configure.tgt: set emulation for mips-*-netbsd*
2374
82de001f
JJ
23752006-02-14 Jakub Jelinek <jakub@redhat.com>
2376
2377 * config.in: Rebuilt.
2378
431ad2d0
BW
23792006-02-13 Bob Wilson <bob.wilson@acm.org>
2380
2381 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2382 from 1, not 0, in error messages.
2383 (md_assemble): Simplify special-case check for ENTRY instructions.
2384 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2385 operand in error message.
2386
94089a50
JM
23872006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2388
2389 * configure.tgt (arm-*-linux-gnueabi*): Change to
2390 arm-*-linux-*eabi*.
2391
52de4c06
NC
23922006-02-10 Nick Clifton <nickc@redhat.com>
2393
70e45ad9
NC
2394 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2395 32-bit value is propagated into the upper bits of a 64-bit long.
2396
52de4c06
NC
2397 * config/tc-arc.c (init_opcode_tables): Fix cast.
2398 (arc_extoper, md_operand): Likewise.
2399
21af2bbd
BW
24002006-02-09 David Heine <dlheine@tensilica.com>
2401
2402 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2403 each relaxation step.
2404
75a706fc 24052006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2406
75a706fc
L
2407 * configure.in (CHECK_DECLS): Add vsnprintf.
2408 * configure: Regenerate.
2409 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2410 include/declare here, but...
2411 * as.h: Move code detecting VARARGS idiom to the top.
2412 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2413 (vsnprintf): Declare if not already declared.
2414
0d474464
L
24152006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2416
2417 * as.c (close_output_file): New.
2418 (main): Register close_output_file with xatexit before
2419 dump_statistics. Don't call output_file_close.
2420
266abb8f
NS
24212006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2422
2423 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2424 mcf5329_control_regs): New.
2425 (not_current_architecture, selected_arch, selected_cpu): New.
2426 (m68k_archs, m68k_extensions): New.
2427 (archs): Renamed to ...
2428 (m68k_cpus): ... here. Adjust.
2429 (n_arches): Remove.
2430 (md_pseudo_table): Add arch and cpu directives.
2431 (find_cf_chip, m68k_ip): Adjust table scanning.
2432 (no_68851, no_68881): Remove.
2433 (md_assemble): Lazily initialize.
2434 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2435 (md_init_after_args): Move functionality to m68k_init_arch.
2436 (mri_chip): Adjust table scanning.
2437 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2438 options with saner parsing.
2439 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2440 m68k_init_arch): New.
2441 (s_m68k_cpu, s_m68k_arch): New.
2442 (md_show_usage): Adjust.
2443 (m68k_elf_final_processing): Set CF EF flags.
2444 * config/tc-m68k.h (m68k_init_after_args): Remove.
2445 (tc_init_after_args): Remove.
2446 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2447 (M68k-Directives): Document .arch and .cpu directives.
2448
134dcee5
AM
24492006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2450
a70ae331
AM
2451 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2452 synonyms for equ and defl.
134dcee5
AM
2453 (z80_cons_fix_new): New function.
2454 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2455 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2456 now handled as pseudo-op rather than an instruction.
2457 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2458 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2459 Add entries for def24,def32,d24,d32.
2460 (md_assemble): Improved error handling.
2461 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2462 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2463 (z80_cons_fix_new): Declare.
a70ae331 2464 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2465 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2466
a9931606
PB
24672006-02-02 Paul Brook <paul@codesourcery.com>
2468
2469 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2470
ef8d22e6
PB
24712005-02-02 Paul Brook <paul@codesourcery.com>
2472
2473 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2474 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2475 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2476 T2_OPCODE_RSB): Define.
2477 (thumb32_negate_data_op): New function.
2478 (md_apply_fix): Use it.
2479
e7da6241
BW
24802006-01-31 Bob Wilson <bob.wilson@acm.org>
2481
2482 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2483 fields.
2484 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2485 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2486 subtracted symbols.
2487 (relaxation_requirements): Add pfinish_frag argument and use it to
2488 replace setting tinsn->record_fix fields.
2489 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2490 and vinsn_to_insnbuf. Remove references to record_fix and
2491 slot_sub_symbols fields.
2492 (xtensa_mark_narrow_branches): Delete unused code.
2493 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2494 a symbol.
2495 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2496 record_fix fields.
2497 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2498 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2499 of the record_fix field. Simplify error messages for unexpected
2500 symbolic operands.
2501 (set_expr_symbol_offset_diff): Delete.
2502
79134647
PB
25032006-01-31 Paul Brook <paul@codesourcery.com>
2504
2505 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2506
e74cfd16
PB
25072006-01-31 Paul Brook <paul@codesourcery.com>
2508 Richard Earnshaw <rearnsha@arm.com>
2509
2510 * config/tc-arm.c: Use arm_feature_set.
2511 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2512 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2513 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2514 New variables.
2515 (insns): Use them.
2516 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2517 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2518 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2519 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2520 feature flags.
2521 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2522 (arm_opts): Move old cpu/arch options from here...
2523 (arm_legacy_opts): ... to here.
2524 (md_parse_option): Search arm_legacy_opts.
2525 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2526 (arm_float_abis, arm_eabis): Make const.
2527
d47d412e
BW
25282006-01-25 Bob Wilson <bob.wilson@acm.org>
2529
2530 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2531
b14273fe
JZ
25322006-01-21 Jie Zhang <jie.zhang@analog.com>
2533
2534 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2535 in load immediate intruction.
2536
39cd1c76
JZ
25372006-01-21 Jie Zhang <jie.zhang@analog.com>
2538
2539 * config/bfin-parse.y (value_match): Use correct conversion
2540 specifications in template string for __FILE__ and __LINE__.
2541 (binary): Ditto.
2542 (unary): Ditto.
2543
67a4f2b7
AO
25442006-01-18 Alexandre Oliva <aoliva@redhat.com>
2545
2546 Introduce TLS descriptors for i386 and x86_64.
2547 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2548 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2549 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2550 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2551 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2552 displacement bits.
2553 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2554 (lex_got): Handle @tlsdesc and @tlscall.
2555 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2556
8ad7c533
NC
25572006-01-11 Nick Clifton <nickc@redhat.com>
2558
2559 Fixes for building on 64-bit hosts:
2560 * config/tc-avr.c (mod_index): New union to allow conversion
2561 between pointers and integers.
2562 (md_begin, avr_ldi_expression): Use it.
2563 * config/tc-i370.c (md_assemble): Add cast for argument to print
2564 statement.
2565 * config/tc-tic54x.c (subsym_substitute): Likewise.
2566 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2567 opindex field of fr_cgen structure into a pointer so that it can
2568 be stored in a frag.
2569 * config/tc-mn10300.c (md_assemble): Likewise.
2570 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2571 types.
2572 * config/tc-v850.c: Replace uses of (int) casts with correct
2573 types.
2574
4dcb3903
L
25752006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2576
2577 PR gas/2117
2578 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2579
e0f6ea40
HPN
25802006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2581
2582 PR gas/2101
2583 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2584 a local-label reference.
2585
e88d958a 2586For older changes see ChangeLog-2005
08d56133
NC
2587\f
2588Local Variables:
2589mode: change-log
2590left-margin: 8
2591fill-column: 74
2592version-control: never
2593End:
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