x86: Correct -mlfence-before-indirect-branch= documentation
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
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12020-04-08 H.J. Lu <hongjiu.lu@intel.com>
2
3 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
4 documentation.
5
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62020-04-08 Gunther Nikl <gnikl@justmail.de>
7
8 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
9 (md_pcrel_from): Remove prototytpe.
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10 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
11 define.
12 (md_pcrel_from_section): Remove duplicate prototype.
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13 * tc.h (md_pcrel_from_section): Add prototype.
14 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
15 * config/tc-arc.h (md_pcrel_from_section): Likewise.
16 * config/tc-arm.h (md_pcrel_from_section): Likewise.
17 * config/tc-avr.h (md_pcrel_from_section): Likewise.
18 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
19 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
20 * config/tc-csky.h (md_pcrel_from_section): Likewise.
21 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
22 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
23 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
24 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
25 * config/tc-frv.h (md_pcrel_from_section): Likewise.
26 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
27 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
28 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
29 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
30 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
31 * config/tc-mep.h (md_pcrel_from_section): Likewise.
32 * config/tc-metag.h (md_pcrel_from_section): Likewise.
33 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
34 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
35 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
36 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
37 * config/tc-mt.h (md_pcrel_from_section): Likewise.
38 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
39 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
40 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
41 * config/tc-rx.h (md_pcrel_from_section): Likewise.
42 * config/tc-s390.h (md_pcrel_from_section): Likewise.
43 * config/tc-sh.h (md_pcrel_from_section): Likewise.
44 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
45 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
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46 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
47 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
48 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
49 md_apply_fix3): Delete prototypes.
6a3ab923 50
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512020-04-07 H.J. Lu <hongjiu.lu@intel.com>
52
53 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
54 instructions.
55
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562020-04-07 H.J. Lu <hongjiu.lu@intel.com>
57
58 * doc/c-z80.texi: Fix @xref warnings.
59
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602020-04-07 Lili Cui <lili.cui@intel.com>
61
62 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
63 (cpu_noarch): Likewise.
64 * doc/c-i386.texi: Document TSXLDTRK.
65 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
66 * testsuite/gas/i386/tsxldtrk.d: Likewise.
67 * testsuite/gas/i386/tsxldtrk.s: Likewise.
68 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
69
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702020-04-02 Lili Cui <lili.cui@intel.com>
71
72 * config/tc-i386.c (cpu_arch): Add .serialize.
73 (cpu_noarch): Likewise.
74 * doc/c-i386.texi: Document serialize.
75 * testsuite/gas/i386/i386.exp: Run serialize tests
76 * testsuite/gas/i386/serialize.d: Likewise.
77 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
78 * testsuite/gas/i386/serialize.s: Likewise.
79
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802020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
81
82 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
83 * testsuite/gas/elf/section12b.d: Likewise.
84 * testsuite/gas/elf/section16a.d: Likewise.
85 * testsuite/gas/elf/section16b.d: Likewise.
86
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872020-04-02 Gunther Nikl <gnikl@justmail.de>
88
89 * config/tc-m68k.c (m68k_ip): Fix range check for index register
90 with a suppressed address register.
91
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922020-04-01 H.J. Lu <hongjiu.lu@intel.com>
93
94 PR gas/25756
95 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
96 * testsuite/gas/i386/localpic.s: Add a test for relocation
97 against local absolute symbol.
98 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
99 * testsuite/gas/i386/localpic.d: Updated.
100 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
101 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
102
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1032020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
104
105 PR gas/25732
106 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
107 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
108 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
109 testsuite/gas/i386/x86-64-jump.d.
110 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
111 Incorporate changes to
112 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
113 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
114 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
115 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
116 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
117
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1182020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
119
120 PR 25611
121 PR 25614
122 * dwarf2dbg.c: Do not include "bignum.h".
123
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1242020-03-30 Nelson Chu <nelson.chu@sifive.com>
125
126 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
127 * testsuite/gas/riscv/alias-csr.s: Likewise.
128 * testsuite/gas/riscv/no-aliases-csr.d: Move this
129 to priv-reg-pseudo-noalias.
130 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
131 * testsuite/gas/riscv/bad-csr.l: Likewise.
132 * testsuite/gas/riscv/bad-csr.s: Likewise.
133 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
134 * testsuite/gas/riscv/satp.s: Likewise.
135 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
136 csr instruction, including alias-csr testcase.
137 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
138 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
139 pseudo instruction with objdump -Mno-aliases.
140 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
141 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
142 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
143 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
144 * testsuite/gas/riscv/priv-reg.s: Likewise.
145 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
146 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
147 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
148
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1492020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
150
151 * config/obj-coff.c (obj_coff_section): Set the bss flag on
152 sections with the "b" attribute.
153
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1542020-03-22 Alan Modra <amodra@gmail.com>
155
156 * testsuite/gas/s12z/truncated.d: Update expected output.
157
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1582020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
159
160 PR 25690
161 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
162 * doc/c-z80.texi: Update documentation.
163
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1642020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
165
166 PR 25641
167 PR 25668
168 PR 25633
169 Fix disassembling ED+A4/AC/B4/BC opcodes.
170 Fix assembling lines containing colonless label and instruction
171 with first operand inside parentheses.
172 Fix registration of unsupported by target CPU registers.
173 * config/tc-z80.c: See above.
174 * config/tc-z80.h: See above.
175 * testsuite/gas/z80/colonless.d: Update test.
176 * testsuite/gas/z80/colonless.s: Likewise.
177 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
178 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
179 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
180 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
181 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
182 * testsuite/gas/z80/unsup_regs.s: Likewise.
183 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
184 * testsuite/gas/z80/z80.exp: Likewise.
185 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
186 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
187 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
188
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1892020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
190
191 PR 25660
192 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
193 (parse_operands): Handle new operand codes.
194 (do_neon_dyadic_long): Make shape check accept the scalar variants.
195 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
196 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
197 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
198 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
199 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
200 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
201 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
202
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2032020-03-11 H.J. Lu <hongjiu.lu@intel.com>
204
205 * NEWS: Mention x86 assembler options for CVE-2020-0551.
206
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2072020-03-11 H.J. Lu <hongjiu.lu@intel.com>
208
209 * testsuite/gas/i386/i386.exp: Run new tests.
210 * testsuite/gas/i386/lfence-byte.d: New file.
211 * testsuite/gas/i386/lfence-byte.e: Likewise.
212 * testsuite/gas/i386/lfence-byte.s: Likewise.
213 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
214 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
215 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
216 * testsuite/gas/i386/lfence-indbr.e: Likewise.
217 * testsuite/gas/i386/lfence-indbr.s: Likewise.
218 * testsuite/gas/i386/lfence-load.d: Likewise.
219 * testsuite/gas/i386/lfence-load.s: Likewise.
220 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
221 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
222 * testsuite/gas/i386/lfence-ret.s: Likewise.
223 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
224 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
225 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
226 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
227 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
228 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
229 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
230 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
231 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
232 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
233 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
234 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
235
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2362020-03-11 H.J. Lu <hongjiu.lu@intel.com>
237
238 * config/tc-i386.c (lfence_after_load): New.
239 (lfence_before_indirect_branch_kind): New.
240 (lfence_before_indirect_branch): New.
241 (lfence_before_ret_kind): New.
242 (lfence_before_ret): New.
243 (last_insn): New.
244 (load_insn_p): New.
245 (insert_lfence_after): New.
246 (insert_lfence_before): New.
247 (md_assemble): Call insert_lfence_before and insert_lfence_after.
248 Set last_insn.
249 (OPTION_MLFENCE_AFTER_LOAD): New.
250 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
251 (OPTION_MLFENCE_BEFORE_RET): New.
252 (md_longopts): Add -mlfence-after-load=,
253 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
254 (md_parse_option): Handle -mlfence-after-load=,
255 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
256 (md_show_usage): Display -mlfence-after-load=,
257 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
258 (i386_cons_align): New.
259 * config/tc-i386.h (i386_cons_align): New.
260 (md_cons_align): New.
261 * doc/c-i386.texi: Document -mlfence-after-load=,
262 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
263
5496f3c6
NC
2642020-03-11 Nick Clifton <nickc@redhat.com>
265
266 PR 25611
267 PR 25614
268 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
269 (DWARF2_FILE_SIZE_NAME): Default to -1.
270 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
271 whichever is higher.
272 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
273 (NUM_MD5_BYTES): Define.
274 (struct file entry): Add md5 field.
275 (get_filenum): Delete and replace with...
276 (get_basename): New function.
277 (get_directory_table_entry): New function.
278 (allocate_filenum): New function.
279 (allocate_filename_to_slot): New function.
280 (dwarf2_where): Use new functions.
281 (dwarf2_directive_filename): Add support for extended .file
282 pseudo-op.
283 (dwarf2_directive_loc): Allow the use of file number zero with
284 DWARF 5 or higher.
285 (out_file_list): Rename to...
286 (out_dir_and_file_list): Add DWARF 5 support.
287 (out_debug_line): Emit extra values into the section header for
288 DWARF 5.
289 (out_debug_str): Allow for file 0 to be used with DWARF 5.
290 * doc/as.texi (.file): Update the description of this pseudo-op.
291 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
292 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
293 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
294 * NEWS: Mention the new feature.
295
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AM
2962020-03-10 Alan Modra <amodra@gmail.com>
297
298 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
299 to avoid signed overflow.
300 * config/tc-mcore.c (md_assemble): Likewise.
301 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
302 * config/tc-nds32.c (SET_ADDEND): Likewise.
303 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
304
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JB
3052020-03-09 Jan Beulich <jbeulich@suse.com>
306
307 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
308 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
309 testsuite/gas/i386/avx-intel.d: Adjust expectations.
310
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3112020-03-07 Alan Modra <amodra@gmail.com>
312
313 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
314 first column.
315
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NC
3162020-03-06 Nick Clifton <nickc@redhat.com>
317
318 PR 25614
319 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
320 0 if the dwarf_level is 5 or more. Complain if a filename follows
321 a file 0.
322 * testsuite/gas/elf/dwarf-5-file0.s: New test.
323 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
324 * testsuite/gas/elf/elf.exp: Run the new test.
325
326 PR 25612
327 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
328 * doc/as.texi: Fix another typo.
329
31bf1864
NC
3302020-03-06 Nick Clifton <nickc@redhat.com>
331
332 PR 25612
333 * as.c (dwarf_level): Define.
334 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
335 (parse_args): Add support for the new options.
336 as.h (dwarf_level): Prototype.
337 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
338 value.
339 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
340 (DWARF2_LINE_VERSION): Remove definition.
341 * doc/as.texi: Document the new options.
342
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NC
3432020-03-06 Nick Clifton <nickc@redhat.com>
344
345 PR 25572
346 * as.c (main): Allow matching input and outputs when they are
347 not regular files.
348
bc49bfd8
JB
3492020-03-06 Jan Beulich <jbeulich@suse.com>
350
351 * config/tc-i386.c (match_mem_size): Generalize broadcast special
352 casing.
353 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
354 one of byte/word/dword/qword is set alongside a SIMD register in
355 a template's operand.
356
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JB
3572020-03-06 Jan Beulich <jbeulich@suse.com>
358
359 * config/tc-i386.c (match_template): Extend code in logic
360 rejecting certain suffixes in certain modes to also cover mask
361 register use and VecSIB. Drop special casing of broadcast. Skip
362 immediates in the check.
363
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JB
3642020-03-06 Jan Beulich <jbeulich@suse.com>
365
366 * config/tc-i386.c (match_template): Fold duplicate code in
367 logic rejecting certain suffixes in certain modes. Drop
368 pointless "else".
369
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JB
3702020-03-06 Jan Beulich <jbeulich@suse.com>
371
372 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
373 alongside !norex64 ones.
374 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
375 with both 32- and 64-bit GPR operands.
376 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
377 32- and 64-bit GPR operands.
378 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
379 testsuite/gas/i386/x86-64-avx512bw.d,
380 testsuite/gas/i386/x86-64-avx512f-intel.d,
381 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
382
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JB
3832020-03-06 Jan Beulich <jbeulich@suse.com>
384
385 * config/tc-i386.c (md_assemble): Drop use of rex64.
386 (process_suffix): For REX.W for 64-bit CRC32.
387
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JB
3882020-03-06 Jan Beulich <jbeulich@suse.com>
389
390 * config/tc-i386.c (i386_addressing_mode): For 32-bit
391 addressing for MPX insns without base/index.
392 * testsuite/gas/i386/mpx-16bit.s,
393 * testsuite/gas/i386/mpx-16bit.d: New.
394 * testsuite/gas/i386/i386.exp: Run new test.
395
a0497384
JB
3962020-03-06 Jan Beulich <jbeulich@suse.com>
397
398 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
399 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
400 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
401 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
402 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
403 as well as a BSWAP one.
404 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
405 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
406 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
407 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
408 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
409 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
410 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
411 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
412 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
413 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
414 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
415 testsuite/gas/i386/vmx.d: Adjust expectations.
416
b630c145
JB
4172020-03-06 Jan Beulich <jbeulich@suse.com>
418
419 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
420 from having their operands swapped.
421 * testsuite/gas/i386/waitpkg.s,
422 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
423 3-operand cases as well as testing of 16-bit code generation.
424 * testsuite/gas/i386/waitpkg.d,
425 testsuite/gas/i386/waitpkg-intel.d,
426 testsuite/gas/i386/x86-64-waitpkg.d,
427 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
428
de48783e
NC
4292020-03-04 Nelson Chu <nelson.chu@sifive.com>
430
dee35d02
NC
431 * config/tc-riscv.c (percent_op_utype): Support the modifier
432 %got_pcrel_hi.
433 * doc/c-riscv.texi: Add documentation.
434 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
435 modifier %got_pcrel_hi.
436 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
437 * testsuite/gas/riscv/relax-reloc.d: Likewise.
438 * testsuite/gas/riscv/relax-reloc.s: Likewise.
439
de48783e
NC
440 * doc/c-riscv.texi (relocation modifiers): Add documentation.
441 (RISC-V-Formats): Update the section name from "Instruction Formats"
442 to "RISC-V Instruction Formats".
443
749479c8
AO
4442020-03-04 Alexandre Oliva <oliva@adacore.com>
445
446 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
447 detected in a section which does not have at least 4 byte
448 alignment.
449 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
450 * testsuite/gas/arm/ldr-t.s: Likewise.
451 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
452 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
453 disassembly, ignoring any NOPs that may have been inserted because
454 of section alignment.
455 * testsuite/gas/arm/ldr-t.d: Likewise.
456
a847e322
JB
4572020-03-04 Jan Beulich <jbeulich@suse.com>
458
459 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
460 * doc/c-i386.texi: Mention sev_es.
461 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
462 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
463 expectations.
464 * testsuite/gas/i386/arch-13-znver1.d,
465 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
466
3cd7f3e3
L
4672020-03-03 H.J. Lu <hongjiu.lu@intel.com>
468
469 * config/tc-i386.c (match_template): Replace ignoresize and
470 defaultsize with mnemonicsize.
471 (process_suffix): Likewise.
472
b8ba1385
SB
4732020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
474
475 PR 25627
476 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
477 instruction LD IY,(HL).
478 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
479 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
480 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
481 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
482
10d97a0f
L
4832020-03-03 H.J. Lu <hongjiu.lu@intel.com>
484
485 PR gas/25622
486 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
487 x86-64-default-suffix-avx.
488 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
489 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
490 * testsuite/gas/i386/noreg64.d: Updated.
491 * testsuite/gas/i386/noreg64.l: Likewise.
492 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
493 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
494 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
495
8326546e
SB
4962020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
497
498 PR 25604
499 * config/tc-z80.c (contains_register): Prevent an illegal memory
500 access when checking an expression for a register name.
501
e3e896e6
AM
5022020-03-03 Alan Modra <amodra@gmail.com>
503
504 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
505 support.
506
a4dd6c97
AM
5072020-03-02 Alan Modra <amodra@gmail.com>
508
509 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
510 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
511 and .sbss sections.
512 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
513 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
514 (s3_s_score_lcomm): Likewise.
515 * config/tc-score7.c: Similarly.
516 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
517
dec7b24b
YS
5182020-02-28 YunQiang Su <syq@debian.org>
519
520 PR gas/25539
521 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
522 to handle multi-labels.
523 (has_label_name): New.
524
cceb53b8
MM
5252020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
526
527 * config/tc-arm.c (enum pred_instruction_type): Remove
528 NEUTRAL_IT_NO_VPT_INSN predication type.
529 (cxn_handle_predication): Modify to require condition suffixes.
530 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
531 * testsuite/gas/arm/cde-scalar.s: Update test.
532 * testsuite/gas/arm/cde-warnings.l: Update test.
533 * testsuite/gas/arm/cde-warnings.s: Update test.
534
da3ec71f
AM
5352020-02-26 Alan Modra <amodra@gmail.com>
536
537 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
538 N_() on empty string.
539
42135cad
AM
5402020-02-26 Alan Modra <amodra@gmail.com>
541
542 * read.c (read_a_source_file): Call strncpy with length one
543 less than size of original_case_string.
544
dc1e8a47
AM
5452020-02-26 Alan Modra <amodra@gmail.com>
546
547 * config/obj-elf.c: Indent labels correctly.
548 * config/obj-macho.c: Likewise.
549 * config/tc-aarch64.c: Likewise.
550 * config/tc-alpha.c: Likewise.
551 * config/tc-arm.c: Likewise.
552 * config/tc-cr16.c: Likewise.
553 * config/tc-crx.c: Likewise.
554 * config/tc-frv.c: Likewise.
555 * config/tc-i386-intel.c: Likewise.
556 * config/tc-i386.c: Likewise.
557 * config/tc-ia64.c: Likewise.
558 * config/tc-mn10200.c: Likewise.
559 * config/tc-mn10300.c: Likewise.
560 * config/tc-nds32.c: Likewise.
561 * config/tc-riscv.c: Likewise.
562 * config/tc-s12z.c: Likewise.
563 * config/tc-xtensa.c: Likewise.
564 * config/tc-z80.c: Likewise.
565 * read.c: Likewise.
566 * symbols.c: Likewise.
567 * write.c: Likewise.
568
bd0cf5a6
NC
5692020-02-20 Nelson Chu <nelson.chu@sifive.com>
570
54b2aec1
NC
571 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
572 we are assembling instruction with CSR. Call riscv_csr_read_only_check
573 after parsing all arguments.
574 (enum csr_insn_type): New enum is used to classify the CSR instruction.
575 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
576 are used to check if we write a read-only CSR by the CSR instruction.
577 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
578 all CSR for the read-only CSR checking.
579 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
580 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
581 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
582 all CSR instructions for the read-only CSR checking.
583 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
584 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
585
2ca89224
NC
586 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
587 (riscv_opts): Initialize it.
588 (reg_lookup_internal): Check the `riscv_opts.csr_check`
589 before doing the CSR checking.
590 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
591 (md_longopts): Add mcsr-check and mno-csr-check.
592 (md_parse_option): Handle new enum option values.
593 (s_riscv_option): Handle new long options.
594 * doc/c-riscv.texi: Add description for the new .option and assembler
595 options.
596 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
597 the CSR checking.
598 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
599
bd0cf5a6
NC
600 * config/tc-riscv.c (csr_extra_hash): New.
601 (enum riscv_csr_class): New enum. Used to decide
602 whether or not this CSR is legal in the current ISA string.
603 (struct riscv_csr_extra): New structure to hold all extra information
604 of CSR.
605 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
606 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
607 Call hash_reg_name to insert CSR address into reg_names_hash.
608 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
609 Decide whether the CSR is valid according to the csr_extra_hash.
610 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
611 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
612 not a boolean. This is same as riscv_init_csr_hash, so keep the
613 consistent usage.
614 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
615 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
616 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
617 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
618 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
619 f-ext CSR are not allowed.
620 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
621 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
622 source file is `priv-reg.s`, and the ISA is rv64if, so the
623 rv32-only CSR are not allowed.
624 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
625
10a95fcc
AM
6262020-02-21 Alan Modra <amodra@gmail.com>
627
628 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
629 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
630
dda2980f
AM
6312020-02-21 Alan Modra <amodra@gmail.com>
632
633 PR 25569
634 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
635 on section size adjustment, instead perform another write if
636 exec header size is larger than section size.
637
bd3380bc
NC
6382020-02-19 Nelson Chu <nelson.chu@sifive.com>
639
640 * doc/c-riscv.texi: Add the doc entries for -march-attr/
641 -mno-arch-attr command line options.
642
fa164239
JW
6432020-02-19 Nelson Chu <nelson.chu@sifive.com>
644
645 * testsuite/gas/riscv/c-add-addi.d: New testcase.
646 * testsuite/gas/riscv/c-add-addi.s: Likewise.
647
fcaaac0a
SB
6482020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
649
650 PR 25576
651 * config/tc-z80.c (md_parse_option): Do not use an underscore
652 prefix for local labels in SDCC compatability mode.
653 (z80_start_line_hook): Remove SDCC dollar label support.
654 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
655 * testsuite/gas/z80/sdcc.s: Likewise.
656
6572020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
658
659 PR 25517
660 * config/tc-z80.c: Add -march option.
661 * doc/as.texi: Update Z80 documentation.
662 * doc/c-z80.texi: Likewise.
663 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
664 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
665 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
666 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
667 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
668 * testsuite/gas/z80/gbz80_all.d: Likewise.
669 * testsuite/gas/z80/r800_extra.d: Likewise.
670 * testsuite/gas/z80/r800_ii8.d: Likewise.
671 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
672 * testsuite/gas/z80/sdcc.d: Likewise.
673 * testsuite/gas/z80/z180.d: Likewise.
674 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
675 * testsuite/gas/z80/z80_doc.d: Likewise.
676 * testsuite/gas/z80/z80_ii8.d: Likewise.
677 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
678 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
679 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
680 * testsuite/gas/z80/z80_sli.d: Likewise.
681 * testsuite/gas/z80/z80n_all.d: Likewise.
682 * testsuite/gas/z80/z80n_reloc.d: Likewise.
683
a7e12755
L
6842020-02-19 H.J. Lu <hongjiu.lu@intel.com>
685
686 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
687 with GNU_PROPERTY_X86_FEATURE_2_MMX.
688 * testsuite/gas/i386/i386.exp: Run property-3 and
689 x86-64-property-3.
690 * testsuite/gas/i386/property-3.d: New file.
691 * testsuite/gas/i386/property-3.s: Likewise.
692 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
693
272a84b1
L
6942020-02-17 H.J. Lu <hongjiu.lu@intel.com>
695
696 * config/tc-i386.c (cpu_arch): Add .popcnt.
697 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
698 Add a tab before @samp{.sse4a}.
699
c8f8eebc
JB
7002020-02-17 Jan Beulich <jbeulich@suse.com>
701
702 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
703 for AddrPrefixOpReg templates. Combine the two pieces of
704 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
705 mode.
706
eedb0f2c
JB
7072020-02-17 Jan Beulich <jbeulich@suse.com>
708
709 PR gas/14439
710 * config/tc-i386.c (md_assemble): Also suppress operand
711 swapping for MONITOR{,X} and MWAIT{,X}.
712 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
713 Add Intel syntax monitor/mwait tests.
714 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
715 Adjust expectations.
716 *testsuite/gas/i386/sse3-intel.d,
717 testsuite/gas/i386/x86-64-sse3-intel.d: New.
718 * testsuite/gas/i386/i386.exp: Run new tests.
719
b9915cbc
JB
7202020-02-17 Jan Beulich <jbeulich@suse.com>
721
722 PR gas/6518
723 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
724 [XYZ]MMWord memory operand ambiguity recognition logic (largely
725 re-indentation).
726 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
727 cases.
728 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
729 * testsuite/gas/i386/avx512dq-inval.l,
730 testsuite/gas/i386/inval-avx.l,
731 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
732 * testsuite/gas/i386/avx512vl-ambig.s,
733 testsuite/gas/i386/avx512vl-ambig.l: New.
734 * testsuite/gas/i386/i386.exp: Run new test.
735
af5c13b0
L
7362020-02-16 H.J. Lu <hongjiu.lu@intel.com>
737
738 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
739 nosse4.
740 * doc/c-i386.texi: Document sse4a and nosse4a.
741
07d98387
L
7422020-02-14 H.J. Lu <hongjiu.lu@intel.com>
743
744 * doc/c-i386.texi: Remove the old movsx and movzx documentation
745 for AT&T syntax.
746
65fca059
JB
7472020-02-14 Jan Beulich <jbeulich@suse.com>
748
749 PR gas/25438
750 * config/tc-i386.c (md_assemble): Move movsx/movzx special
751 casing ...
752 (process_suffix): ... here. Consider just the first operand
753 initially.
754 (check_long_reg): Drop opcode 0x63 special case again.
755 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
756 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
757 Move ambiguous operand size tests ...
758 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
759 testsuite/gas/i386/noreg64.s: ... here.
760 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
761 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
762 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
763 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
764 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
765 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
766 testsuite/gas/i386/x86-64-movsxd.d,
767 testsuite/gas/i386/x86-64-movsxd-intel.d,
768 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
769 Adjust expectations.
770 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
771 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
772 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
773 * testsuite/gas/i386/i386.exp: Run new tests.
774
b6773884
JB
7752020-02-14 Jan Beulich <jbeulich@suse.com>
776
777 * config/tc-i386.c (process_operands): Also skip segment
778 override prefix emission if it matches an already present one.
779 * testsuite/gas/i386/prefix32.s: Add double segment override
780 cases.
781 * testsuite/gas/i386/prefix32.l: Adjust expectations.
782
92334ad2
JB
7832020-02-14 Jan Beulich <jbeulich@suse.com>
784
785 * config/tc-i386.c (process_operands): Drop ineffectual segment
786 overrides when optimizing.
787 * testsuite/gas/i386/lea-optimize.d: New.
788 * testsuite/gas/i386/i386.exp: Run new test.
789
7902020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
791
792 * config/tc-i386.c (process_operands): Also check insn prefix
793 for ineffectual segment override warning. Don't cover possible
794 VEX/EVEX encoded insns there.
795 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
796 testsuite/gas/i386/lea.e: New.
797 * testsuite/gas/i386/i386.exp: Run new test.
798
0e6724de
L
7992020-02-14 H.J. Lu <hongjiu.lu@intel.com>
800
801 PR gas/25438
802 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
803 syntax.
804
292676c1
L
8052020-02-13 Fangrui Song <maskray@google.com>
806 H.J. Lu <hongjiu.lu@intel.com>
807
808 PR gas/25551
809 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
810 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
811 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
812 * testsuite/gas/i386/relax-5.d: New file.
813 * testsuite/gas/i386/relax-5.s: Likewise.
814 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
815 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
816
7deea9aa
JB
8172020-02-13 Jan Beulich <jbeulich@suse.com>
818
819 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
820 "nosse4" entry.
821
6c0946d0
JB
8222020-02-12 Jan Beulich <jbeulich@suse.com>
823
824 * config/tc-i386.c (avx512): New (at file scope), moved from
825 (check_VecOperands): ... here.
826 (process_suffix): Add [XYZ]MMword operand size handling.
827 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
828 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
829 tests.
830 * testsuite/gas/i386/avx512dq-inval.l,
831 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
832
5990e377
JB
8332020-02-12 Jan Beulich <jbeulich@suse.com>
834
835 PR gas/24546
836 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
837 code only.
838 * config/tc-i386-intel.c (i386_intel_operand): Also handle
839 CALL/JMP in O_tbyte_ptr case.
840 * doc/c-i386.texi: Mention far call and full pointer load ISA
841 differences.
842 * testsuite/gas/i386/x86-64-branch-3.s,
843 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
844 * testsuite/gas/i386/x86-64-branch-3.d,
845 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
846 * testsuite/gas/i386/x86-64-branch-5.l,
847 testsuite/gas/i386/x86-64-branch-5.s: New.
848 * testsuite/gas/i386/i386.exp: Run new test.
849
9706160a
JB
8502020-02-12 Jan Beulich <jbeulich@suse.com>
851
852 PR gas/25438
853 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
854 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
855 64-bit-only warning.
856 (check_word_reg): Consistently error on mismatching register
857 size and suffix.
858 * testsuite/gas/i386/general.s: Replace dword GPR with word one
859 for movw. Replace suffix / GPR for orb.
860 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
861 byte GPRs as well as ones for inb/outb with a word accumulator.
862 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
863 testsuite/gas/i386/inval.l: Adjust expectations.
864
5de4d9ef
JB
8652020-02-12 Jan Beulich <jbeulich@suse.com>
866
867 * config/tc-i386.c (operand_type_register_match): Also fall
868 through initial two if()-s when the template allows for a GPR
869 operand. Adjust comment.
870
50128d0c
JB
8712020-02-11 Jan Beulich <jbeulich@suse.com>
872
873 (struct _i386_insn): New field "short_form".
874 (optimize_encoding): Drop setting of shortform field.
875 (process_suffix): Set i.short_form. Replace shortform use.
876 (process_operands): Replace shortform use.
877
1ed818b4
MM
8782020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
879
880 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
881 loop initial declaration.
882
5aae9ae9
MM
8832020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
884
885 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
886 instructions that can have 5 arguments.
887 (enum operand_parse_code): Add new operands.
888 (parse_operands): Account for new operands.
889 (S5): New macro.
890 (enum neon_shape_el): Introduce P suffixes for coprocessor.
891 (neon_select_shape): Account for P suffix.
892 (LOW1): Move macro to global position.
893 (HI4): Move macro to global position.
894 (vcx_assign_vec_d): New.
895 (vcx_assign_vec_m): New.
896 (vcx_assign_vec_n): New.
897 (enum vcx_reg_type): New.
898 (vcx_get_reg_type): New.
899 (vcx_size_pos): New.
900 (vcx_vec_pos): New.
901 (vcx_handle_shape): New.
902 (vcx_ensure_register_in_range): New.
903 (vcx_handle_register_arguments): New.
904 (vcx_handle_insn_block): New.
905 (vcx_handle_common_checks): New.
906 (do_vcx1): New.
907 (do_vcx2): New.
908 (do_vcx3): New.
909 * testsuite/gas/arm/cde-missing-fp.d: New test.
910 * testsuite/gas/arm/cde-missing-fp.l: New test.
911 * testsuite/gas/arm/cde-missing-mve.d: New test.
912 * testsuite/gas/arm/cde-missing-mve.l: New test.
913 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
914 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
915 * testsuite/gas/arm/cde-mve.s: New test.
916 * testsuite/gas/arm/cde-warnings.l:
917 * testsuite/gas/arm/cde-warnings.s:
918 * testsuite/gas/arm/cde.d:
919 * testsuite/gas/arm/cde.s:
920
4934a27c
MM
9212020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
922 Matthew Malcomson <matthew.malcomson@arm.com>
923
924 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
925 CDE coprocessor that can be enabled.
926 (enum pred_instruction_type): New pred type.
927 (BAD_NO_VPT): New error message.
928 (BAD_CDE): New error message.
929 (BAD_CDE_COPROC): New error message.
930 (enum operand_parse_code): Add new immediate operands.
931 (parse_operands): Account for new immediate operands.
932 (check_cde_operand): New.
933 (cde_coproc_enabled): New.
934 (cde_coproc_pos): New.
935 (cde_handle_coproc): New.
936 (cxn_handle_predication): New.
937 (do_custom_instruction_1): New.
938 (do_custom_instruction_2): New.
939 (do_custom_instruction_3): New.
940 (do_cx1): New.
941 (do_cx1a): New.
942 (do_cx1d): New.
943 (do_cx1da): New.
944 (do_cx2): New.
945 (do_cx2a): New.
946 (do_cx2d): New.
947 (do_cx2da): New.
948 (do_cx3): New.
949 (do_cx3a): New.
950 (do_cx3d): New.
951 (do_cx3da): New.
952 (handle_pred_state): Define new IT block behaviour.
953 (insns): Add newn CX*{,d}{,a} instructions.
954 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
955 Define new cdecp extension strings.
956 * doc/c-arm.texi: Document new cdecp extension arguments.
957 * testsuite/gas/arm/cde-scalar.d: New test.
958 * testsuite/gas/arm/cde-scalar.s: New test.
959 * testsuite/gas/arm/cde-warnings.d: New test.
960 * testsuite/gas/arm/cde-warnings.l: New test.
961 * testsuite/gas/arm/cde-warnings.s: New test.
962 * testsuite/gas/arm/cde.d: New test.
963 * testsuite/gas/arm/cde.s: New test.
964
4b5aaf5f
L
9652020-02-10 H.J. Lu <hongjiu.lu@intel.com>
966
967 PR gas/25516
968 * config/tc-i386.c (intel64): Renamed to ...
969 (isa64): This.
970 (match_template): Accept Intel64 only instruction by default.
971 (i386_displacement): Updated.
972 (md_parse_option): Updated.
973 * c-i386.texi: Update -mamd64/-mintel64 documentation.
974 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
975 -mamd64 to x86-64-sysenter-amd.
976 * testsuite/gas/i386/x86-64-sysenter.d: New file.
977
33176d91
AM
9782020-02-10 Alan Modra <amodra@gmail.com>
979
980 * config/obj-elf.c (obj_elf_change_section): Error for section
981 type, attr or entsize changes in assembly.
982 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
983 * testsuite/gas/elf/section5.l: Update.
984
82194874
AM
9852020-02-10 Alan Modra <amodra@gmail.com>
986
987 * output-file.c (output_file_close): Do a normal close when
988 flag_always_generate_output.
989 * write.c (write_object_file): Don't stop output when
990 flag_always_generate_output.
991
9fc0b501
SB
9922020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
993
994 PR 25469
995 * config/tc-z80.c: Add -gbz80 command line option to generate code
996 for the GameBoy Z80. Add support for generating DWARF.
997 * config/tc-z80.h: Add support for DWARF debug information
998 generation.
999 * doc/c-z80.texi: Document new command line option.
1000 * testsuite/gas/z80/gbz80_all.d: New file.
1001 * testsuite/gas/z80/gbz80_all.s: New file.
1002 * testsuite/gas/z80/z80.exp: Run the new tests.
1003 * testsuite/gas/z80/z80n_all.d: New file.
1004 * testsuite/gas/z80/z80n_all.s: New file.
1005 * testsuite/gas/z80/z80n_reloc.d: New file.
1006
b7d07216
L
10072020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1008
1009 PR gas/25381
1010 * config/obj-elf.c (get_section): Also check
1011 linked_to_symbol_name.
1012 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1013 (obj_elf_parse_section_letters): Handle the 'o' flag.
1014 (build_group_lists): Renamed to ...
1015 (build_additional_section_info): This. Set elf_linked_to_section
1016 from map_head.linked_to_symbol_name.
1017 (elf_adjust_symtab): Updated.
1018 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1019 * doc/as.texi: Document the 'o' flag.
1020 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1021 * testsuite/gas/elf/section18.d: New file.
1022 * testsuite/gas/elf/section18.s: Likewise.
1023 * testsuite/gas/elf/section19.d: Likewise.
1024 * testsuite/gas/elf/section19.s: Likewise.
1025 * testsuite/gas/elf/section20.d: Likewise.
1026 * testsuite/gas/elf/section20.s: Likewise.
1027 * testsuite/gas/elf/section21.d: Likewise.
1028 * testsuite/gas/elf/section21.l: Likewise.
1029 * testsuite/gas/elf/section21.s: Likewise.
1030
5eb617a7
L
10312020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1032
1033 * NEWS: Mention x86 assembler options to align branches for
1034 binutils 2.34.
1035
986ac314
L
10362020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1037
1038 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1039 only for ELF targets.
1040 * testsuite/gas/i386/unique.d: Don't xfail.
1041 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1042
19234a6d
AM
10432020-02-06 Alan Modra <amodra@gmail.com>
1044
1045 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1046 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1047
02e0be69
AM
10482020-02-06 Alan Modra <amodra@gmail.com>
1049
1050 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1051 xfail, and rename test.
1052 * testsuite/gas/elf/section12b.d: Likewise.
1053 * testsuite/gas/elf/section16a.d: Likewise.
1054 * testsuite/gas/elf/section16b.d: Likewise.
1055
a8c4d40b
L
10562020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1057
1058 PR gas/25380
1059 * config/obj-elf.c (section_match): Removed.
1060 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1061 section_id.
1062 (obj_elf_change_section): Replace info and group_name arguments
1063 with match_p. Also update the section ID and flags from match_p.
1064 (obj_elf_section): Handle "unique,N". Update call to
1065 obj_elf_change_section.
1066 * config/obj-elf.h (elf_section_match): New.
1067 (obj_elf_change_section): Updated.
1068 * config/tc-arm.c (start_unwind_section): Update call to
1069 obj_elf_change_section.
1070 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1071 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1072 (microblaze_s_sdata): Likewise.
1073 (microblaze_s_rdata): Likewise.
1074 (microblaze_s_bss): Likewise.
1075 * config/tc-mips.c (s_change_section): Likewise.
1076 * config/tc-msp430.c (msp430_profiler): Likewise.
1077 * config/tc-rx.c (parse_rx_section): Likewise.
1078 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1079 * doc/as.texi: Document "unique,N" in .section directive.
1080 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1081 * testsuite/gas/elf/section15.d: New file.
1082 * testsuite/gas/elf/section15.s: Likewise.
1083 * testsuite/gas/elf/section16.s: Likewise.
1084 * testsuite/gas/elf/section16a.d: Likewise.
1085 * testsuite/gas/elf/section16b.d: Likewise.
1086 * testsuite/gas/elf/section17.d: Likewise.
1087 * testsuite/gas/elf/section17.l: Likewise.
1088 * testsuite/gas/elf/section17.s: Likewise.
1089 * testsuite/gas/i386/unique.d: Likewise.
1090 * testsuite/gas/i386/unique.s: Likewise.
1091 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1092 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1093
575d37ae
L
10942020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1095
1096 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1097
2384096c
G
10982020-02-01 Anthony Green <green@moxielogic.com>
1099
1100 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1101
95441c43
SL
11022020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1103
1104 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1105 %tls_ldo.
1106
d465d695
AV
11072020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1108
1109 PR gas/25472
1110 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1111 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1112 +mve.
1113 * testsuite/gas/arm/mve_dsp.d: New test.
1114
d26cc8a9
NC
11152020-01-31 Nick Clifton <nickc@redhat.com>
1116
1117 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1118 rather than BFD_RELOC_NONE.
1119
90e9955a
SP
11202020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1121
1122 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1123 to support VLDMIA instruction for MVE.
1124 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1125 instruction for MVE.
1126 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1127 instruction for MVE.
1128 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1129 instruction for MVE.
1130 * testsuite/gas/arm/mve-ldst.d: New test.
1131 * testsuite/gas/arm/mve-ldst.s: Likewise.
1132
53943f32
NC
11332020-01-31 Nick Clifton <nickc@redhat.com>
1134
1135 * po/fr.po: Updated French translation.
1136 * po/ru.po: Updated Russian translation.
1137
c3036ed0
RS
11382020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1139
1140 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1141 .s for the movprfx.
1142 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1143 * testsuite/gas/aarch64/sve-movprfx_28.d,
1144 * testsuite/gas/aarch64/sve-movprfx_28.l,
1145 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1146
2ae4c703
JB
11472020-01-30 Jan Beulich <jbeulich@suse.com>
1148
1149 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1150 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1151 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1152 Adjust expectations.
1153
bd434cc4
JM
11542020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1155
1156 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1157 * testsuite/gas/bpf/alu-be.d: Likewise.
1158 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1159 * testsuite/gas/bpf/alu32-be.d: Likewise.
1160
aeab2b26
JB
11612020-01-30 Jan Beulich <jbeulich@suse.com>
1162
1163 * testsuite/gas/i386/x86-64-branch-2.s,
1164 testsuite/gas/i386/x86-64-branch-4.s,
1165 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1166 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1167 testsuite/gas/i386/x86-64-branch-2.d,
1168 testsuite/gas/i386/x86-64-branch-4.l,
1169 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1170
873494c8
JB
11712020-01-30 Jan Beulich <jbeulich@suse.com>
1172
1173 * config/tc-i386.c (process_suffix): .
1174 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1175 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1176 Add LRETQ case.
1177 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1178 suffix.
1179 testsuite/gas/i386/x86_64.s: Add RETF cases.
1180 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1181 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1182 testsuite/gas/i386/x86-64-opcode.d,
1183 testsuite/gas/i386/x86-64-suffix-intel.d,
1184 testsuite/gas/i386/x86-64-suffix.d,
1185 testsuite/gas/i386/x86_64-intel.d
1186 testsuite/gas/i386/x86_64.d: Adjust expectations.
1187 * testsuite/gas/i386/x86-64-suffix.e,
1188 testsuite/gas/i386/x86_64.e: New.
1189
62b3f548
JB
11902020-01-30 Jan Beulich <jbeulich@suse.com>
1191
1192 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1193 special case.
1194
bc31405e
L
11952020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1196
1197 PR binutils/25445
1198 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1199 movsxd.
1200 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1201 differences. Document movslq and movsxd.
1202 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1203 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1204 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1205 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1206 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1207 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1208 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1209 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1210 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1211 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1212 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1213
e3696f67
AM
12142020-01-27 Alan Modra <amodra@gmail.com>
1215
1216 * testsuite/gas/all/gas.exp: Replace case statements with switch
1217 statements.
1218 * testsuite/gas/elf/elf.exp: Likewise.
1219 * testsuite/gas/macros/macros.exp: Likewise.
1220 * testsuite/lib/gas-defs.exp: Likewise.
1221
7568c93b
TC
12222020-01-27 Tamar Christina <tamar.christina@arm.com>
1223
1224 PR 25403
1225 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1226 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1227
403d1bd9
JW
12282020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1229
1230 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1231 s exts must be known, so rename *ok* to *fail*.
1232 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1233 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1234 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1235 above change.
1236 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1237 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1238
be4c5e58
L
12392020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1240
1241 PR gas/25438
1242 * config/tc-i386.c (check_long_reg): Always disallow double word
1243 suffix in mnemonic with word general register.
1244 * testsuite/gas/i386/general.s: Replace word general register
1245 with double word general register for movl.
1246 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1247 register.
1248 * testsuite/gas/i386/general.l: Updated.
1249 * testsuite/gas/i386/inval.l: Likewise.
1250
9e7028aa
AM
12512020-01-22 Alan Modra <amodra@gmail.com>
1252
1253 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1254 __tls_get_addr_desc and __tls_get_addr_opt.
1255
e3ed17f3
JB
12562020-01-21 Jan Beulich <jbeulich@suse.com>
1257
1258 * testsuite/gas/i386/inval-crc32.s,
1259 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1260 * testsuite/gas/i386/inval-crc32.l,
1261 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1262
1a035124
JB
12632020-01-21 Jan Beulich <jbeulich@suse.com>
1264
1265 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1266 generic code path. Deal with No_lSuf being set in a template.
1267 * testsuite/gas/i386/inval-crc32.l,
1268 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1269 instead of error(s) when operand size is ambiguous.
1270 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1271 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1272 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1273 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1274 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1275 Adjust expectations.
1276
c006a730
JB
12772020-01-21 Jan Beulich <jbeulich@suse.com>
1278
1279 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1280 and an intel_syntax check. Re-write lack-of-suffix processing
1281 logic.
1282 * doc/c-i386.texi: Document operand size defaults for suffix-
1283 less AT&T syntax insns.
1284 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1285 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1286 testsuite/gas/i386/x86-64-avx-scalar.s,
1287 testsuite/gas/i386/x86-64-avx.s,
1288 testsuite/gas/i386/x86-64-bundle.s,
1289 testsuite/gas/i386/x86-64-intel64.s,
1290 testsuite/gas/i386/x86-64-lock-1.s,
1291 testsuite/gas/i386/x86-64-opcode.s,
1292 testsuite/gas/i386/x86-64-sse2avx.s,
1293 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1294 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1295 testsuite/gas/i386/x86-64-nops.s,
1296 testsuite/gas/i386/x86-64-ptwrite.s,
1297 testsuite/gas/i386/x86-64-simd.s,
1298 testsuite/gas/i386/x86-64-sse-noavx.s,
1299 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1300 insns.
1301 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1302 testsuite/gas/i386/noreg64.s: Add further tests.
1303 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1304 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1305 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1306 testsuite/gas/i386/sse-noavx.d,
1307 testsuite/gas/i386/x86-64-intel64.d,
1308 testsuite/gas/i386/x86-64-nops.d,
1309 testsuite/gas/i386/x86-64-opcode.d,
1310 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1311 testsuite/gas/i386/x86-64-ptwrite.d,
1312 testsuite/gas/i386/x86-64-simd-intel.d,
1313 testsuite/gas/i386/x86-64-simd-suffix.d,
1314 testsuite/gas/i386/x86-64-simd.d,
1315 testsuite/gas/i386/x86-64-sse-noavx.d
1316 testsuite/gas/i386/x86-64-suffix.d,
1317 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1318 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1319 testsuite/gas/i386/noreg64.l: New.
1320 * testsuite/gas/i386/i386.exp: Run new tests.
1321
c906a69a
JB
13222020-01-21 Jan Beulich <jbeulich@suse.com>
1323
1324 * testsuite/gas/i386/avx512_bf16_vl.s,
1325 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1326 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1327 broadcast forms of VCVTNEPS2BF16.
1328 * testsuite/gas/i386/avx512_bf16_vl.d,
1329 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1330
26916852
NC
13312020-01-20 Nick Clifton <nickc@redhat.com>
1332
1333 * po/uk.po: Updated Ukranian translation.
1334
14470f07
L
13352020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1336
1337 PR ld/25416
1338 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1339 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1340 x32 object.
1341 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1342 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1343 R_X86_64_GOTPC32_TLSDESC relocation.
1344
1b1bb2c6
NC
13452020-01-18 Nick Clifton <nickc@redhat.com>
1346
1347 * configure: Regenerate.
1348 * po/gas.pot: Regenerate.
1349
ae774686
NC
13502020-01-18 Nick Clifton <nickc@redhat.com>
1351
1352 Binutils 2.34 branch created.
1353
42e04b36
L
13542020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1355
1356 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1357 with vex_encoding_vex.
1358 (parse_insn): Likewise.
1359 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1360 and {vex3} documentation.
1361 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1362 {vex}.
1363 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1364
2da2eaf4
AV
13652020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1366
1367 PR 25376
1368 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1369 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1370 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1371 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1372 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1373 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1374
45a4bb20
JB
13752020-01-16 Jan Beulich <jbeulich@suse.com>
1376
1377 * config/tc-i386.c (match_template): Drop found_cpu_match local
1378 variable.
1379
4814632e
JB
13802020-01-16 Jan Beulich <jbeulich@suse.com>
1381
1382 * testsuite/gas/i386/avx512dq-inval.l,
1383 testsuite/gas/i386/avx512dq-inval.s: New.
1384 * testsuite/gas/i386/i386.exp: Run new test.
1385
131cb553
JL
13862020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1387
1388 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1389 relocations when the target is 430X, except when extracting part of an
1390 expression.
1391 (msp430_srcoperand): Adjust comment.
1392 Initialize the expp member of the msp430_operand_s struct as
1393 appropriate.
1394 (msp430_dstoperand): Likewise.
1395 * testsuite/gas/msp430/msp430.exp: Run new test.
1396 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1397 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1398
c24d0e8d
AM
13992020-01-15 Alan Modra <amodra@gmail.com>
1400
1401 * configure.tgt: Add sparc-*-freebsd case.
1402
e44925ae
LC
14032020-01-14 Lili Cui <lili.cui@intel.com>
1404
1405 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1406 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1407 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1408 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1409 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1410 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1411 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1412 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1413 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1414 * testsuite/gas/i386/align-branch-5.d: Likewise.
1415 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1416 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1417 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1418 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1419 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1420 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1421 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1422 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1423 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1424 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1425 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1426 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1427
7a6bf3be
SB
14282020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1429
1430 PR 25377
1431 * config/tc-z80.c: Add support for half precision, single
1432 precision and double precision floating point values.
1433 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1434 * doc/as.texi: Add new z80 command line options.
1435 * doc/c-z80.texi: Document new z80 command line options.
1436 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1437 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1438 * testsuite/gas/z80/z80.exp: Run the new test.
1439 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1440 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1441 * testsuite/gas/z80/strings.d: Update expected output.
1442
82e9597c
MM
14432020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1444
1445 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1446 dependency.
1447
5e4f7e05
CZ
14482020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1449
1450 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1451 the CPU.
1452 * config/tc-arc.h: Add header if/defs.
1453 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1454
febda64f
AM
14552020-01-13 Alan Modra <amodra@gmail.com>
1456
1457 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1458
5496abe1
AM
14592020-01-13 Alan Modra <amodra@gmail.com>
1460
1461 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1462 insertion.
1463
ec4181f2
AM
14642020-01-10 Alan Modra <amodra@gmail.com>
1465
1466 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1467 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1468
40c75bc8
SB
14692020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1470
1471 PR 25224
1472 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1473 opcode byte values.
1474 (emit_ld_r_r): Likewise.
1475 (emit_ld_rr_m): Likewise.
1476 (emit_ld_rr_nn): Likewise.
1477
72aea328
JB
14782020-01-09 Jan Beulich <jbeulich@suse.com>
1479
1480 * config/tc-i386.c (optimize_encoding): Add
1481 is_any_vex_encoding() invocations. Drop respective
1482 i.tm.extension_opcode == None checks.
1483
3f93af61
JB
14842020-01-09 Jan Beulich <jbeulich@suse.com>
1485
1486 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1487 REX transformations. Correct comment indentation.
1488
7697afb6
JB
14892020-01-09 Jan Beulich <jbeulich@suse.com>
1490
1491 * config/tc-i386.c (optimize_encoding): Generalize register
1492 transformation for TEST optimization.
1493
d835a58b
JB
14942020-01-09 Jan Beulich <jbeulich@suse.com>
1495
1496 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1497 testsuite/gas/i386/x86-64-sysenter-amd.d,
1498 testsuite/gas/i386/x86-64-sysenter-amd.l,
1499 testsuite/gas/i386/x86-64-sysenter-intel.d,
1500 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1501 * testsuite/gas/i386/i386.exp: Run new tests.
1502
915808f6
NC
15032020-01-08 Nick Clifton <nickc@redhat.com>
1504
1505 PR 25284
1506 * doc/as.texi (Align): Document the fact that all arguments can be
1507 omitted.
1508 (Balign): Likewise.
1509 (P2align): Likewise.
1510
f1f28025
NC
15112020-01-08 Nick Clifton <nickc@redhat.com>
1512
1513 PR 14891
1514 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1515 already defined as a different symbol type.
1516 * testsuite/gas/elf/pr14891.s: New test source file.
1517 * testsuite/gas/elf/pr14891.d: New test driver.
1518 * testsuite/gas/elf/pr14891.s: New test expected error output.
1519 * testsuite/gas/elf/elf.exp: Run the new test.
1520
030a2e78
AM
15212020-01-08 Alan Modra <amodra@gmail.com>
1522
1523 * config/tc-z8k.c (md_begin): Make idx unsigned.
1524 (get_specific): Likewise for this_index.
1525
2a1ebfb2
CZ
15262020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1527
1528 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1529 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1530 (md_operand): Set X_md to absent.
1531 (arc_parse_name): Check for X_md.
1532
16d87673
SB
15332020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1534
1535 PR 25311
1536 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1537 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1538 NO_STRING_ESCAPES.
1539 * read.c (next_char_of_string): Likewise.
1540 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1541 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1542
a2322019
NC
15432020-01-03 Nick Clifton <nickc@redhat.com>
1544
1545 * po/sv.po: Updated Swedish translation.
1546
5437a02a
JB
15472020-01-03 Jan Beulich <jbeulich@suse.com>
1548
1549 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1550 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1551
567dfba2
JB
15522020-01-03 Jan Beulich <jbeulich@suse.com>
1553
1554 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1555 by-element usdot. Add 64-bit form tests for by-element sudot.
1556 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1557
8c45011a
JB
15582020-01-03 Jan Beulich <jbeulich@suse.com>
1559
1560 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1561 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1562
f4950f76
JB
15632020-01-03 Jan Beulich <jbeulich@suse.com>
1564
1565 * testsuite/gas/aarch64/f64mm.d,
1566 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1567
6655dba2
SB
15682020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1569
1570 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1571 support for assembler code generated by SDCC. Add new relocation
1572 types. Add z80-elf target support.
1573 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1574 labels. Local labels starts from ".L".
1575 * NEWS: Mention the new support.
1576 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1577 * testsuite/gas/all/fwdexp.s: Likewise.
1578 * testsuite/gas/all/cond.l: Likewise.
1579 * testsuite/gas/all/cond.s: Likewise.
1580 * testsuite/gas/all/fwdexp.d: Likewise.
1581 * testsuite/gas/all/fwdexp.s: Likewise.
1582 * testsuite/gas/elf/section2.e-mips: Likewise.
1583 * testsuite/gas/elf/section2.l: Likewise.
1584 * testsuite/gas/elf/section2.s: Likewise.
1585 * testsuite/gas/macros/app1.d: Likewise.
1586 * testsuite/gas/macros/app1.s: Likewise.
1587 * testsuite/gas/macros/app2.d: Likewise.
1588 * testsuite/gas/macros/app2.s: Likewise.
1589 * testsuite/gas/macros/app3.d: Likewise.
1590 * testsuite/gas/macros/app3.s: Likewise.
1591 * testsuite/gas/macros/app4.d: Likewise.
1592 * testsuite/gas/macros/app4.s: Likewise.
1593 * testsuite/gas/macros/app4b.s: Likewise.
1594 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1595 * testsuite/gas/z80/z80.exp: Add new tests
1596 * testsuite/gas/z80/dollar.d: New file.
1597 * testsuite/gas/z80/dollar.s: New file.
1598 * testsuite/gas/z80/ez80_adl_all.d: New file.
1599 * testsuite/gas/z80/ez80_adl_all.s: New file.
1600 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1601 * testsuite/gas/z80/ez80_isuf.s: New file.
1602 * testsuite/gas/z80/ez80_z80_all.d: New file.
1603 * testsuite/gas/z80/ez80_z80_all.s: New file.
1604 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1605 * testsuite/gas/z80/r800_extra.d: New file.
1606 * testsuite/gas/z80/r800_extra.s: New file.
1607 * testsuite/gas/z80/r800_ii8.d: New file.
1608 * testsuite/gas/z80/r800_z80_doc.d: New file.
1609 * testsuite/gas/z80/z180.d: New file.
1610 * testsuite/gas/z80/z180.s: New file.
1611 * testsuite/gas/z80/z180_z80_doc.d: New file.
1612 * testsuite/gas/z80/z80_doc.d: New file.
1613 * testsuite/gas/z80/z80_doc.s: New file.
1614 * testsuite/gas/z80/z80_ii8.d: New file.
1615 * testsuite/gas/z80/z80_ii8.s: New file.
1616 * testsuite/gas/z80/z80_in_f_c.d: New file.
1617 * testsuite/gas/z80/z80_in_f_c.s: New file.
1618 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1619 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1620 * testsuite/gas/z80/z80_out_c_0.d: New file.
1621 * testsuite/gas/z80/z80_out_c_0.s: New file.
1622 * testsuite/gas/z80/z80_reloc.d: New file.
1623 * testsuite/gas/z80/z80_reloc.s: New file.
1624 * testsuite/gas/z80/z80_sli.d: New file.
1625 * testsuite/gas/z80/z80_sli.s: New file.
1626
a65b5de6
SN
16272020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1628
1629 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1630 REGLIST_RN.
1631
b14ce8bf
AM
16322020-01-01 Alan Modra <amodra@gmail.com>
1633
1634 Update year range in copyright notice of all files.
1635
0b114740 1636For older changes see ChangeLog-2019
3499769a 1637\f
0b114740 1638Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1639
1640Copying and distribution of this file, with or without modification,
1641are permitted in any medium without royalty provided the copyright
1642notice and this notice are preserved.
1643
1644Local Variables:
1645mode: change-log
1646left-margin: 8
1647fill-column: 74
1648version-control: never
1649End:
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