x86: use template for SSE floating point comparison insns
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
190e5fc8
AM
12020-03-07 Alan Modra <amodra@gmail.com>
2
3 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
4 first column.
5
84d9ab33
NC
62020-03-06 Nick Clifton <nickc@redhat.com>
7
8 PR 25614
9 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
10 0 if the dwarf_level is 5 or more. Complain if a filename follows
11 a file 0.
12 * testsuite/gas/elf/dwarf-5-file0.s: New test.
13 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
14 * testsuite/gas/elf/elf.exp: Run the new test.
15
16 PR 25612
17 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
18 * doc/as.texi: Fix another typo.
19
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202020-03-06 Nick Clifton <nickc@redhat.com>
21
22 PR 25612
23 * as.c (dwarf_level): Define.
24 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
25 (parse_args): Add support for the new options.
26 as.h (dwarf_level): Prototype.
27 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
28 value.
29 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
30 (DWARF2_LINE_VERSION): Remove definition.
31 * doc/as.texi: Document the new options.
32
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332020-03-06 Nick Clifton <nickc@redhat.com>
34
35 PR 25572
36 * as.c (main): Allow matching input and outputs when they are
37 not regular files.
38
bc49bfd8
JB
392020-03-06 Jan Beulich <jbeulich@suse.com>
40
41 * config/tc-i386.c (match_mem_size): Generalize broadcast special
42 casing.
43 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
44 one of byte/word/dword/qword is set alongside a SIMD register in
45 a template's operand.
46
4873e243
JB
472020-03-06 Jan Beulich <jbeulich@suse.com>
48
49 * config/tc-i386.c (match_template): Extend code in logic
50 rejecting certain suffixes in certain modes to also cover mask
51 register use and VecSIB. Drop special casing of broadcast. Skip
52 immediates in the check.
53
e365e234
JB
542020-03-06 Jan Beulich <jbeulich@suse.com>
55
56 * config/tc-i386.c (match_template): Fold duplicate code in
57 logic rejecting certain suffixes in certain modes. Drop
58 pointless "else".
59
4ed21b58
JB
602020-03-06 Jan Beulich <jbeulich@suse.com>
61
62 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
63 alongside !norex64 ones.
64 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
65 with both 32- and 64-bit GPR operands.
66 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
67 32- and 64-bit GPR operands.
68 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
69 testsuite/gas/i386/x86-64-avx512bw.d,
70 testsuite/gas/i386/x86-64-avx512f-intel.d,
71 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
72
643bb870
JB
732020-03-06 Jan Beulich <jbeulich@suse.com>
74
75 * config/tc-i386.c (md_assemble): Drop use of rex64.
76 (process_suffix): For REX.W for 64-bit CRC32.
77
a23b33b3
JB
782020-03-06 Jan Beulich <jbeulich@suse.com>
79
80 * config/tc-i386.c (i386_addressing_mode): For 32-bit
81 addressing for MPX insns without base/index.
82 * testsuite/gas/i386/mpx-16bit.s,
83 * testsuite/gas/i386/mpx-16bit.d: New.
84 * testsuite/gas/i386/i386.exp: Run new test.
85
a0497384
JB
862020-03-06 Jan Beulich <jbeulich@suse.com>
87
88 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
89 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
90 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
91 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
92 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
93 as well as a BSWAP one.
94 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
95 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
96 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
97 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
98 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
99 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
100 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
101 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
102 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
103 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
104 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
105 testsuite/gas/i386/vmx.d: Adjust expectations.
106
b630c145
JB
1072020-03-06 Jan Beulich <jbeulich@suse.com>
108
109 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
110 from having their operands swapped.
111 * testsuite/gas/i386/waitpkg.s,
112 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
113 3-operand cases as well as testing of 16-bit code generation.
114 * testsuite/gas/i386/waitpkg.d,
115 testsuite/gas/i386/waitpkg-intel.d,
116 testsuite/gas/i386/x86-64-waitpkg.d,
117 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
118
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1192020-03-04 Nelson Chu <nelson.chu@sifive.com>
120
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121 * config/tc-riscv.c (percent_op_utype): Support the modifier
122 %got_pcrel_hi.
123 * doc/c-riscv.texi: Add documentation.
124 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
125 modifier %got_pcrel_hi.
126 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
127 * testsuite/gas/riscv/relax-reloc.d: Likewise.
128 * testsuite/gas/riscv/relax-reloc.s: Likewise.
129
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130 * doc/c-riscv.texi (relocation modifiers): Add documentation.
131 (RISC-V-Formats): Update the section name from "Instruction Formats"
132 to "RISC-V Instruction Formats".
133
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1342020-03-04 Alexandre Oliva <oliva@adacore.com>
135
136 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
137 detected in a section which does not have at least 4 byte
138 alignment.
139 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
140 * testsuite/gas/arm/ldr-t.s: Likewise.
141 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
142 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
143 disassembly, ignoring any NOPs that may have been inserted because
144 of section alignment.
145 * testsuite/gas/arm/ldr-t.d: Likewise.
146
a847e322
JB
1472020-03-04 Jan Beulich <jbeulich@suse.com>
148
149 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
150 * doc/c-i386.texi: Mention sev_es.
151 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
152 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
153 expectations.
154 * testsuite/gas/i386/arch-13-znver1.d,
155 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
156
3cd7f3e3
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1572020-03-03 H.J. Lu <hongjiu.lu@intel.com>
158
159 * config/tc-i386.c (match_template): Replace ignoresize and
160 defaultsize with mnemonicsize.
161 (process_suffix): Likewise.
162
b8ba1385
SB
1632020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
164
165 PR 25627
166 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
167 instruction LD IY,(HL).
168 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
169 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
170 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
171 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
172
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1732020-03-03 H.J. Lu <hongjiu.lu@intel.com>
174
175 PR gas/25622
176 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
177 x86-64-default-suffix-avx.
178 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
179 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
180 * testsuite/gas/i386/noreg64.d: Updated.
181 * testsuite/gas/i386/noreg64.l: Likewise.
182 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
183 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
184 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
185
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1862020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
187
188 PR 25604
189 * config/tc-z80.c (contains_register): Prevent an illegal memory
190 access when checking an expression for a register name.
191
e3e896e6
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1922020-03-03 Alan Modra <amodra@gmail.com>
193
194 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
195 support.
196
a4dd6c97
AM
1972020-03-02 Alan Modra <amodra@gmail.com>
198
199 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
200 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
201 and .sbss sections.
202 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
203 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
204 (s3_s_score_lcomm): Likewise.
205 * config/tc-score7.c: Similarly.
206 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
207
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2082020-02-28 YunQiang Su <syq@debian.org>
209
210 PR gas/25539
211 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
212 to handle multi-labels.
213 (has_label_name): New.
214
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MM
2152020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
216
217 * config/tc-arm.c (enum pred_instruction_type): Remove
218 NEUTRAL_IT_NO_VPT_INSN predication type.
219 (cxn_handle_predication): Modify to require condition suffixes.
220 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
221 * testsuite/gas/arm/cde-scalar.s: Update test.
222 * testsuite/gas/arm/cde-warnings.l: Update test.
223 * testsuite/gas/arm/cde-warnings.s: Update test.
224
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2252020-02-26 Alan Modra <amodra@gmail.com>
226
227 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
228 N_() on empty string.
229
42135cad
AM
2302020-02-26 Alan Modra <amodra@gmail.com>
231
232 * read.c (read_a_source_file): Call strncpy with length one
233 less than size of original_case_string.
234
dc1e8a47
AM
2352020-02-26 Alan Modra <amodra@gmail.com>
236
237 * config/obj-elf.c: Indent labels correctly.
238 * config/obj-macho.c: Likewise.
239 * config/tc-aarch64.c: Likewise.
240 * config/tc-alpha.c: Likewise.
241 * config/tc-arm.c: Likewise.
242 * config/tc-cr16.c: Likewise.
243 * config/tc-crx.c: Likewise.
244 * config/tc-frv.c: Likewise.
245 * config/tc-i386-intel.c: Likewise.
246 * config/tc-i386.c: Likewise.
247 * config/tc-ia64.c: Likewise.
248 * config/tc-mn10200.c: Likewise.
249 * config/tc-mn10300.c: Likewise.
250 * config/tc-nds32.c: Likewise.
251 * config/tc-riscv.c: Likewise.
252 * config/tc-s12z.c: Likewise.
253 * config/tc-xtensa.c: Likewise.
254 * config/tc-z80.c: Likewise.
255 * read.c: Likewise.
256 * symbols.c: Likewise.
257 * write.c: Likewise.
258
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2592020-02-20 Nelson Chu <nelson.chu@sifive.com>
260
54b2aec1
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261 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
262 we are assembling instruction with CSR. Call riscv_csr_read_only_check
263 after parsing all arguments.
264 (enum csr_insn_type): New enum is used to classify the CSR instruction.
265 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
266 are used to check if we write a read-only CSR by the CSR instruction.
267 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
268 all CSR for the read-only CSR checking.
269 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
270 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
271 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
272 all CSR instructions for the read-only CSR checking.
273 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
274 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
275
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276 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
277 (riscv_opts): Initialize it.
278 (reg_lookup_internal): Check the `riscv_opts.csr_check`
279 before doing the CSR checking.
280 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
281 (md_longopts): Add mcsr-check and mno-csr-check.
282 (md_parse_option): Handle new enum option values.
283 (s_riscv_option): Handle new long options.
284 * doc/c-riscv.texi: Add description for the new .option and assembler
285 options.
286 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
287 the CSR checking.
288 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
289
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290 * config/tc-riscv.c (csr_extra_hash): New.
291 (enum riscv_csr_class): New enum. Used to decide
292 whether or not this CSR is legal in the current ISA string.
293 (struct riscv_csr_extra): New structure to hold all extra information
294 of CSR.
295 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
296 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
297 Call hash_reg_name to insert CSR address into reg_names_hash.
298 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
299 Decide whether the CSR is valid according to the csr_extra_hash.
300 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
301 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
302 not a boolean. This is same as riscv_init_csr_hash, so keep the
303 consistent usage.
304 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
305 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
306 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
307 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
308 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
309 f-ext CSR are not allowed.
310 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
311 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
312 source file is `priv-reg.s`, and the ISA is rv64if, so the
313 rv32-only CSR are not allowed.
314 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
315
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3162020-02-21 Alan Modra <amodra@gmail.com>
317
318 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
319 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
320
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3212020-02-21 Alan Modra <amodra@gmail.com>
322
323 PR 25569
324 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
325 on section size adjustment, instead perform another write if
326 exec header size is larger than section size.
327
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NC
3282020-02-19 Nelson Chu <nelson.chu@sifive.com>
329
330 * doc/c-riscv.texi: Add the doc entries for -march-attr/
331 -mno-arch-attr command line options.
332
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JW
3332020-02-19 Nelson Chu <nelson.chu@sifive.com>
334
335 * testsuite/gas/riscv/c-add-addi.d: New testcase.
336 * testsuite/gas/riscv/c-add-addi.s: Likewise.
337
fcaaac0a
SB
3382020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
339
340 PR 25576
341 * config/tc-z80.c (md_parse_option): Do not use an underscore
342 prefix for local labels in SDCC compatability mode.
343 (z80_start_line_hook): Remove SDCC dollar label support.
344 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
345 * testsuite/gas/z80/sdcc.s: Likewise.
346
3472020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
348
349 PR 25517
350 * config/tc-z80.c: Add -march option.
351 * doc/as.texi: Update Z80 documentation.
352 * doc/c-z80.texi: Likewise.
353 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
354 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
355 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
356 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
357 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
358 * testsuite/gas/z80/gbz80_all.d: Likewise.
359 * testsuite/gas/z80/r800_extra.d: Likewise.
360 * testsuite/gas/z80/r800_ii8.d: Likewise.
361 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
362 * testsuite/gas/z80/sdcc.d: Likewise.
363 * testsuite/gas/z80/z180.d: Likewise.
364 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
365 * testsuite/gas/z80/z80_doc.d: Likewise.
366 * testsuite/gas/z80/z80_ii8.d: Likewise.
367 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
368 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
369 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
370 * testsuite/gas/z80/z80_sli.d: Likewise.
371 * testsuite/gas/z80/z80n_all.d: Likewise.
372 * testsuite/gas/z80/z80n_reloc.d: Likewise.
373
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3742020-02-19 H.J. Lu <hongjiu.lu@intel.com>
375
376 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
377 with GNU_PROPERTY_X86_FEATURE_2_MMX.
378 * testsuite/gas/i386/i386.exp: Run property-3 and
379 x86-64-property-3.
380 * testsuite/gas/i386/property-3.d: New file.
381 * testsuite/gas/i386/property-3.s: Likewise.
382 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
383
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3842020-02-17 H.J. Lu <hongjiu.lu@intel.com>
385
386 * config/tc-i386.c (cpu_arch): Add .popcnt.
387 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
388 Add a tab before @samp{.sse4a}.
389
c8f8eebc
JB
3902020-02-17 Jan Beulich <jbeulich@suse.com>
391
392 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
393 for AddrPrefixOpReg templates. Combine the two pieces of
394 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
395 mode.
396
eedb0f2c
JB
3972020-02-17 Jan Beulich <jbeulich@suse.com>
398
399 PR gas/14439
400 * config/tc-i386.c (md_assemble): Also suppress operand
401 swapping for MONITOR{,X} and MWAIT{,X}.
402 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
403 Add Intel syntax monitor/mwait tests.
404 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
405 Adjust expectations.
406 *testsuite/gas/i386/sse3-intel.d,
407 testsuite/gas/i386/x86-64-sse3-intel.d: New.
408 * testsuite/gas/i386/i386.exp: Run new tests.
409
b9915cbc
JB
4102020-02-17 Jan Beulich <jbeulich@suse.com>
411
412 PR gas/6518
413 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
414 [XYZ]MMWord memory operand ambiguity recognition logic (largely
415 re-indentation).
416 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
417 cases.
418 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
419 * testsuite/gas/i386/avx512dq-inval.l,
420 testsuite/gas/i386/inval-avx.l,
421 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
422 * testsuite/gas/i386/avx512vl-ambig.s,
423 testsuite/gas/i386/avx512vl-ambig.l: New.
424 * testsuite/gas/i386/i386.exp: Run new test.
425
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4262020-02-16 H.J. Lu <hongjiu.lu@intel.com>
427
428 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
429 nosse4.
430 * doc/c-i386.texi: Document sse4a and nosse4a.
431
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4322020-02-14 H.J. Lu <hongjiu.lu@intel.com>
433
434 * doc/c-i386.texi: Remove the old movsx and movzx documentation
435 for AT&T syntax.
436
65fca059
JB
4372020-02-14 Jan Beulich <jbeulich@suse.com>
438
439 PR gas/25438
440 * config/tc-i386.c (md_assemble): Move movsx/movzx special
441 casing ...
442 (process_suffix): ... here. Consider just the first operand
443 initially.
444 (check_long_reg): Drop opcode 0x63 special case again.
445 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
446 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
447 Move ambiguous operand size tests ...
448 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
449 testsuite/gas/i386/noreg64.s: ... here.
450 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
451 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
452 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
453 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
454 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
455 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
456 testsuite/gas/i386/x86-64-movsxd.d,
457 testsuite/gas/i386/x86-64-movsxd-intel.d,
458 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
459 Adjust expectations.
460 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
461 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
462 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
463 * testsuite/gas/i386/i386.exp: Run new tests.
464
b6773884
JB
4652020-02-14 Jan Beulich <jbeulich@suse.com>
466
467 * config/tc-i386.c (process_operands): Also skip segment
468 override prefix emission if it matches an already present one.
469 * testsuite/gas/i386/prefix32.s: Add double segment override
470 cases.
471 * testsuite/gas/i386/prefix32.l: Adjust expectations.
472
92334ad2
JB
4732020-02-14 Jan Beulich <jbeulich@suse.com>
474
475 * config/tc-i386.c (process_operands): Drop ineffectual segment
476 overrides when optimizing.
477 * testsuite/gas/i386/lea-optimize.d: New.
478 * testsuite/gas/i386/i386.exp: Run new test.
479
4802020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
481
482 * config/tc-i386.c (process_operands): Also check insn prefix
483 for ineffectual segment override warning. Don't cover possible
484 VEX/EVEX encoded insns there.
485 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
486 testsuite/gas/i386/lea.e: New.
487 * testsuite/gas/i386/i386.exp: Run new test.
488
0e6724de
L
4892020-02-14 H.J. Lu <hongjiu.lu@intel.com>
490
491 PR gas/25438
492 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
493 syntax.
494
292676c1
L
4952020-02-13 Fangrui Song <maskray@google.com>
496 H.J. Lu <hongjiu.lu@intel.com>
497
498 PR gas/25551
499 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
500 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
501 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
502 * testsuite/gas/i386/relax-5.d: New file.
503 * testsuite/gas/i386/relax-5.s: Likewise.
504 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
505 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
506
7deea9aa
JB
5072020-02-13 Jan Beulich <jbeulich@suse.com>
508
509 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
510 "nosse4" entry.
511
6c0946d0
JB
5122020-02-12 Jan Beulich <jbeulich@suse.com>
513
514 * config/tc-i386.c (avx512): New (at file scope), moved from
515 (check_VecOperands): ... here.
516 (process_suffix): Add [XYZ]MMword operand size handling.
517 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
518 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
519 tests.
520 * testsuite/gas/i386/avx512dq-inval.l,
521 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
522
5990e377
JB
5232020-02-12 Jan Beulich <jbeulich@suse.com>
524
525 PR gas/24546
526 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
527 code only.
528 * config/tc-i386-intel.c (i386_intel_operand): Also handle
529 CALL/JMP in O_tbyte_ptr case.
530 * doc/c-i386.texi: Mention far call and full pointer load ISA
531 differences.
532 * testsuite/gas/i386/x86-64-branch-3.s,
533 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
534 * testsuite/gas/i386/x86-64-branch-3.d,
535 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
536 * testsuite/gas/i386/x86-64-branch-5.l,
537 testsuite/gas/i386/x86-64-branch-5.s: New.
538 * testsuite/gas/i386/i386.exp: Run new test.
539
9706160a
JB
5402020-02-12 Jan Beulich <jbeulich@suse.com>
541
542 PR gas/25438
543 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
544 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
545 64-bit-only warning.
546 (check_word_reg): Consistently error on mismatching register
547 size and suffix.
548 * testsuite/gas/i386/general.s: Replace dword GPR with word one
549 for movw. Replace suffix / GPR for orb.
550 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
551 byte GPRs as well as ones for inb/outb with a word accumulator.
552 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
553 testsuite/gas/i386/inval.l: Adjust expectations.
554
5de4d9ef
JB
5552020-02-12 Jan Beulich <jbeulich@suse.com>
556
557 * config/tc-i386.c (operand_type_register_match): Also fall
558 through initial two if()-s when the template allows for a GPR
559 operand. Adjust comment.
560
50128d0c
JB
5612020-02-11 Jan Beulich <jbeulich@suse.com>
562
563 (struct _i386_insn): New field "short_form".
564 (optimize_encoding): Drop setting of shortform field.
565 (process_suffix): Set i.short_form. Replace shortform use.
566 (process_operands): Replace shortform use.
567
1ed818b4
MM
5682020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
569
570 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
571 loop initial declaration.
572
5aae9ae9
MM
5732020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
574
575 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
576 instructions that can have 5 arguments.
577 (enum operand_parse_code): Add new operands.
578 (parse_operands): Account for new operands.
579 (S5): New macro.
580 (enum neon_shape_el): Introduce P suffixes for coprocessor.
581 (neon_select_shape): Account for P suffix.
582 (LOW1): Move macro to global position.
583 (HI4): Move macro to global position.
584 (vcx_assign_vec_d): New.
585 (vcx_assign_vec_m): New.
586 (vcx_assign_vec_n): New.
587 (enum vcx_reg_type): New.
588 (vcx_get_reg_type): New.
589 (vcx_size_pos): New.
590 (vcx_vec_pos): New.
591 (vcx_handle_shape): New.
592 (vcx_ensure_register_in_range): New.
593 (vcx_handle_register_arguments): New.
594 (vcx_handle_insn_block): New.
595 (vcx_handle_common_checks): New.
596 (do_vcx1): New.
597 (do_vcx2): New.
598 (do_vcx3): New.
599 * testsuite/gas/arm/cde-missing-fp.d: New test.
600 * testsuite/gas/arm/cde-missing-fp.l: New test.
601 * testsuite/gas/arm/cde-missing-mve.d: New test.
602 * testsuite/gas/arm/cde-missing-mve.l: New test.
603 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
604 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
605 * testsuite/gas/arm/cde-mve.s: New test.
606 * testsuite/gas/arm/cde-warnings.l:
607 * testsuite/gas/arm/cde-warnings.s:
608 * testsuite/gas/arm/cde.d:
609 * testsuite/gas/arm/cde.s:
610
4934a27c
MM
6112020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
612 Matthew Malcomson <matthew.malcomson@arm.com>
613
614 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
615 CDE coprocessor that can be enabled.
616 (enum pred_instruction_type): New pred type.
617 (BAD_NO_VPT): New error message.
618 (BAD_CDE): New error message.
619 (BAD_CDE_COPROC): New error message.
620 (enum operand_parse_code): Add new immediate operands.
621 (parse_operands): Account for new immediate operands.
622 (check_cde_operand): New.
623 (cde_coproc_enabled): New.
624 (cde_coproc_pos): New.
625 (cde_handle_coproc): New.
626 (cxn_handle_predication): New.
627 (do_custom_instruction_1): New.
628 (do_custom_instruction_2): New.
629 (do_custom_instruction_3): New.
630 (do_cx1): New.
631 (do_cx1a): New.
632 (do_cx1d): New.
633 (do_cx1da): New.
634 (do_cx2): New.
635 (do_cx2a): New.
636 (do_cx2d): New.
637 (do_cx2da): New.
638 (do_cx3): New.
639 (do_cx3a): New.
640 (do_cx3d): New.
641 (do_cx3da): New.
642 (handle_pred_state): Define new IT block behaviour.
643 (insns): Add newn CX*{,d}{,a} instructions.
644 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
645 Define new cdecp extension strings.
646 * doc/c-arm.texi: Document new cdecp extension arguments.
647 * testsuite/gas/arm/cde-scalar.d: New test.
648 * testsuite/gas/arm/cde-scalar.s: New test.
649 * testsuite/gas/arm/cde-warnings.d: New test.
650 * testsuite/gas/arm/cde-warnings.l: New test.
651 * testsuite/gas/arm/cde-warnings.s: New test.
652 * testsuite/gas/arm/cde.d: New test.
653 * testsuite/gas/arm/cde.s: New test.
654
4b5aaf5f
L
6552020-02-10 H.J. Lu <hongjiu.lu@intel.com>
656
657 PR gas/25516
658 * config/tc-i386.c (intel64): Renamed to ...
659 (isa64): This.
660 (match_template): Accept Intel64 only instruction by default.
661 (i386_displacement): Updated.
662 (md_parse_option): Updated.
663 * c-i386.texi: Update -mamd64/-mintel64 documentation.
664 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
665 -mamd64 to x86-64-sysenter-amd.
666 * testsuite/gas/i386/x86-64-sysenter.d: New file.
667
33176d91
AM
6682020-02-10 Alan Modra <amodra@gmail.com>
669
670 * config/obj-elf.c (obj_elf_change_section): Error for section
671 type, attr or entsize changes in assembly.
672 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
673 * testsuite/gas/elf/section5.l: Update.
674
82194874
AM
6752020-02-10 Alan Modra <amodra@gmail.com>
676
677 * output-file.c (output_file_close): Do a normal close when
678 flag_always_generate_output.
679 * write.c (write_object_file): Don't stop output when
680 flag_always_generate_output.
681
9fc0b501
SB
6822020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
683
684 PR 25469
685 * config/tc-z80.c: Add -gbz80 command line option to generate code
686 for the GameBoy Z80. Add support for generating DWARF.
687 * config/tc-z80.h: Add support for DWARF debug information
688 generation.
689 * doc/c-z80.texi: Document new command line option.
690 * testsuite/gas/z80/gbz80_all.d: New file.
691 * testsuite/gas/z80/gbz80_all.s: New file.
692 * testsuite/gas/z80/z80.exp: Run the new tests.
693 * testsuite/gas/z80/z80n_all.d: New file.
694 * testsuite/gas/z80/z80n_all.s: New file.
695 * testsuite/gas/z80/z80n_reloc.d: New file.
696
b7d07216
L
6972020-02-06 H.J. Lu <hongjiu.lu@intel.com>
698
699 PR gas/25381
700 * config/obj-elf.c (get_section): Also check
701 linked_to_symbol_name.
702 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
703 (obj_elf_parse_section_letters): Handle the 'o' flag.
704 (build_group_lists): Renamed to ...
705 (build_additional_section_info): This. Set elf_linked_to_section
706 from map_head.linked_to_symbol_name.
707 (elf_adjust_symtab): Updated.
708 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
709 * doc/as.texi: Document the 'o' flag.
710 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
711 * testsuite/gas/elf/section18.d: New file.
712 * testsuite/gas/elf/section18.s: Likewise.
713 * testsuite/gas/elf/section19.d: Likewise.
714 * testsuite/gas/elf/section19.s: Likewise.
715 * testsuite/gas/elf/section20.d: Likewise.
716 * testsuite/gas/elf/section20.s: Likewise.
717 * testsuite/gas/elf/section21.d: Likewise.
718 * testsuite/gas/elf/section21.l: Likewise.
719 * testsuite/gas/elf/section21.s: Likewise.
720
5eb617a7
L
7212020-02-06 H.J. Lu <hongjiu.lu@intel.com>
722
723 * NEWS: Mention x86 assembler options to align branches for
724 binutils 2.34.
725
986ac314
L
7262020-02-06 H.J. Lu <hongjiu.lu@intel.com>
727
728 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
729 only for ELF targets.
730 * testsuite/gas/i386/unique.d: Don't xfail.
731 * testsuite/gas/i386/x86-64-unique.d: Likewise.
732
19234a6d
AM
7332020-02-06 Alan Modra <amodra@gmail.com>
734
735 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
736 * testsuite/gas/i386/x86-64-unique.d: Likewise.
737
02e0be69
AM
7382020-02-06 Alan Modra <amodra@gmail.com>
739
740 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
741 xfail, and rename test.
742 * testsuite/gas/elf/section12b.d: Likewise.
743 * testsuite/gas/elf/section16a.d: Likewise.
744 * testsuite/gas/elf/section16b.d: Likewise.
745
a8c4d40b
L
7462020-02-02 H.J. Lu <hongjiu.lu@intel.com>
747
748 PR gas/25380
749 * config/obj-elf.c (section_match): Removed.
750 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
751 section_id.
752 (obj_elf_change_section): Replace info and group_name arguments
753 with match_p. Also update the section ID and flags from match_p.
754 (obj_elf_section): Handle "unique,N". Update call to
755 obj_elf_change_section.
756 * config/obj-elf.h (elf_section_match): New.
757 (obj_elf_change_section): Updated.
758 * config/tc-arm.c (start_unwind_section): Update call to
759 obj_elf_change_section.
760 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
761 * config/tc-microblaze.c (microblaze_s_data): Likewise.
762 (microblaze_s_sdata): Likewise.
763 (microblaze_s_rdata): Likewise.
764 (microblaze_s_bss): Likewise.
765 * config/tc-mips.c (s_change_section): Likewise.
766 * config/tc-msp430.c (msp430_profiler): Likewise.
767 * config/tc-rx.c (parse_rx_section): Likewise.
768 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
769 * doc/as.texi: Document "unique,N" in .section directive.
770 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
771 * testsuite/gas/elf/section15.d: New file.
772 * testsuite/gas/elf/section15.s: Likewise.
773 * testsuite/gas/elf/section16.s: Likewise.
774 * testsuite/gas/elf/section16a.d: Likewise.
775 * testsuite/gas/elf/section16b.d: Likewise.
776 * testsuite/gas/elf/section17.d: Likewise.
777 * testsuite/gas/elf/section17.l: Likewise.
778 * testsuite/gas/elf/section17.s: Likewise.
779 * testsuite/gas/i386/unique.d: Likewise.
780 * testsuite/gas/i386/unique.s: Likewise.
781 * testsuite/gas/i386/x86-64-unique.d: Likewise.
782 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
783
575d37ae
L
7842020-02-02 H.J. Lu <hongjiu.lu@intel.com>
785
786 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
787
2384096c
G
7882020-02-01 Anthony Green <green@moxielogic.com>
789
790 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
791
95441c43
SL
7922020-01-31 Sandra Loosemore <sandra@codesourcery.com>
793
794 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
795 %tls_ldo.
796
d465d695
AV
7972020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
798
799 PR gas/25472
800 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
801 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
802 +mve.
803 * testsuite/gas/arm/mve_dsp.d: New test.
804
d26cc8a9
NC
8052020-01-31 Nick Clifton <nickc@redhat.com>
806
807 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
808 rather than BFD_RELOC_NONE.
809
90e9955a
SP
8102020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
811
812 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
813 to support VLDMIA instruction for MVE.
814 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
815 instruction for MVE.
816 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
817 instruction for MVE.
818 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
819 instruction for MVE.
820 * testsuite/gas/arm/mve-ldst.d: New test.
821 * testsuite/gas/arm/mve-ldst.s: Likewise.
822
53943f32
NC
8232020-01-31 Nick Clifton <nickc@redhat.com>
824
825 * po/fr.po: Updated French translation.
826 * po/ru.po: Updated Russian translation.
827
c3036ed0
RS
8282020-01-31 Richard Sandiford <richard.sandiford@arm.com>
829
830 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
831 .s for the movprfx.
832 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
833 * testsuite/gas/aarch64/sve-movprfx_28.d,
834 * testsuite/gas/aarch64/sve-movprfx_28.l,
835 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
836
2ae4c703
JB
8372020-01-30 Jan Beulich <jbeulich@suse.com>
838
839 * config/tc-i386.c (output_disp): Tighten base_opcode check.
840 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
841 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
842 Adjust expectations.
843
bd434cc4
JM
8442020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
845
846 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
847 * testsuite/gas/bpf/alu-be.d: Likewise.
848 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
849 * testsuite/gas/bpf/alu32-be.d: Likewise.
850
aeab2b26
JB
8512020-01-30 Jan Beulich <jbeulich@suse.com>
852
853 * testsuite/gas/i386/x86-64-branch-2.s,
854 testsuite/gas/i386/x86-64-branch-4.s,
855 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
856 * testsuite/gas/i386/ilp32/x86-64-branch.d,
857 testsuite/gas/i386/x86-64-branch-2.d,
858 testsuite/gas/i386/x86-64-branch-4.l,
859 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
860
873494c8
JB
8612020-01-30 Jan Beulich <jbeulich@suse.com>
862
863 * config/tc-i386.c (process_suffix): .
864 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
865 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
866 Add LRETQ case.
867 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
868 suffix.
869 testsuite/gas/i386/x86_64.s: Add RETF cases.
870 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
871 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
872 testsuite/gas/i386/x86-64-opcode.d,
873 testsuite/gas/i386/x86-64-suffix-intel.d,
874 testsuite/gas/i386/x86-64-suffix.d,
875 testsuite/gas/i386/x86_64-intel.d
876 testsuite/gas/i386/x86_64.d: Adjust expectations.
877 * testsuite/gas/i386/x86-64-suffix.e,
878 testsuite/gas/i386/x86_64.e: New.
879
62b3f548
JB
8802020-01-30 Jan Beulich <jbeulich@suse.com>
881
882 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
883 special case.
884
bc31405e
L
8852020-01-27 H.J. Lu <hongjiu.lu@intel.com>
886
887 PR binutils/25445
888 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
889 movsxd.
890 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
891 differences. Document movslq and movsxd.
892 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
893 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
894 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
895 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
896 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
897 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
898 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
899 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
900 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
901 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
902 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
903
e3696f67
AM
9042020-01-27 Alan Modra <amodra@gmail.com>
905
906 * testsuite/gas/all/gas.exp: Replace case statements with switch
907 statements.
908 * testsuite/gas/elf/elf.exp: Likewise.
909 * testsuite/gas/macros/macros.exp: Likewise.
910 * testsuite/lib/gas-defs.exp: Likewise.
911
7568c93b
TC
9122020-01-27 Tamar Christina <tamar.christina@arm.com>
913
914 PR 25403
915 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
916 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
917
403d1bd9
JW
9182020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
919
920 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
921 s exts must be known, so rename *ok* to *fail*.
922 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
923 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
924 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
925 above change.
926 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
927 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
928
be4c5e58
L
9292020-01-22 H.J. Lu <hongjiu.lu@intel.com>
930
931 PR gas/25438
932 * config/tc-i386.c (check_long_reg): Always disallow double word
933 suffix in mnemonic with word general register.
934 * testsuite/gas/i386/general.s: Replace word general register
935 with double word general register for movl.
936 * testsuite/gas/i386/inval.s: Add tests for movl with word general
937 register.
938 * testsuite/gas/i386/general.l: Updated.
939 * testsuite/gas/i386/inval.l: Likewise.
940
9e7028aa
AM
9412020-01-22 Alan Modra <amodra@gmail.com>
942
943 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
944 __tls_get_addr_desc and __tls_get_addr_opt.
945
e3ed17f3
JB
9462020-01-21 Jan Beulich <jbeulich@suse.com>
947
948 * testsuite/gas/i386/inval-crc32.s,
949 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
950 * testsuite/gas/i386/inval-crc32.l,
951 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
952
1a035124
JB
9532020-01-21 Jan Beulich <jbeulich@suse.com>
954
955 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
956 generic code path. Deal with No_lSuf being set in a template.
957 * testsuite/gas/i386/inval-crc32.l,
958 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
959 instead of error(s) when operand size is ambiguous.
960 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
961 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
962 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
963 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
964 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
965 Adjust expectations.
966
c006a730
JB
9672020-01-21 Jan Beulich <jbeulich@suse.com>
968
969 * config/tc-i386.c (process_suffix): Drop SYSRET special case
970 and an intel_syntax check. Re-write lack-of-suffix processing
971 logic.
972 * doc/c-i386.texi: Document operand size defaults for suffix-
973 less AT&T syntax insns.
974 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
975 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
976 testsuite/gas/i386/x86-64-avx-scalar.s,
977 testsuite/gas/i386/x86-64-avx.s,
978 testsuite/gas/i386/x86-64-bundle.s,
979 testsuite/gas/i386/x86-64-intel64.s,
980 testsuite/gas/i386/x86-64-lock-1.s,
981 testsuite/gas/i386/x86-64-opcode.s,
982 testsuite/gas/i386/x86-64-sse2avx.s,
983 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
984 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
985 testsuite/gas/i386/x86-64-nops.s,
986 testsuite/gas/i386/x86-64-ptwrite.s,
987 testsuite/gas/i386/x86-64-simd.s,
988 testsuite/gas/i386/x86-64-sse-noavx.s,
989 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
990 insns.
991 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
992 testsuite/gas/i386/noreg64.s: Add further tests.
993 * testsuite/gas/i386/ilp32/x86-64-nops.d,
994 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
995 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
996 testsuite/gas/i386/sse-noavx.d,
997 testsuite/gas/i386/x86-64-intel64.d,
998 testsuite/gas/i386/x86-64-nops.d,
999 testsuite/gas/i386/x86-64-opcode.d,
1000 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1001 testsuite/gas/i386/x86-64-ptwrite.d,
1002 testsuite/gas/i386/x86-64-simd-intel.d,
1003 testsuite/gas/i386/x86-64-simd-suffix.d,
1004 testsuite/gas/i386/x86-64-simd.d,
1005 testsuite/gas/i386/x86-64-sse-noavx.d
1006 testsuite/gas/i386/x86-64-suffix.d,
1007 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1008 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1009 testsuite/gas/i386/noreg64.l: New.
1010 * testsuite/gas/i386/i386.exp: Run new tests.
1011
c906a69a
JB
10122020-01-21 Jan Beulich <jbeulich@suse.com>
1013
1014 * testsuite/gas/i386/avx512_bf16_vl.s,
1015 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1016 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1017 broadcast forms of VCVTNEPS2BF16.
1018 * testsuite/gas/i386/avx512_bf16_vl.d,
1019 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1020
26916852
NC
10212020-01-20 Nick Clifton <nickc@redhat.com>
1022
1023 * po/uk.po: Updated Ukranian translation.
1024
14470f07
L
10252020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1026
1027 PR ld/25416
1028 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1029 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1030 x32 object.
1031 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1032 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1033 R_X86_64_GOTPC32_TLSDESC relocation.
1034
1b1bb2c6
NC
10352020-01-18 Nick Clifton <nickc@redhat.com>
1036
1037 * configure: Regenerate.
1038 * po/gas.pot: Regenerate.
1039
ae774686
NC
10402020-01-18 Nick Clifton <nickc@redhat.com>
1041
1042 Binutils 2.34 branch created.
1043
42e04b36
L
10442020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1045
1046 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1047 with vex_encoding_vex.
1048 (parse_insn): Likewise.
1049 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1050 and {vex3} documentation.
1051 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1052 {vex}.
1053 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1054
2da2eaf4
AV
10552020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1056
1057 PR 25376
1058 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1059 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1060 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1061 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1062 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1063 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1064
45a4bb20
JB
10652020-01-16 Jan Beulich <jbeulich@suse.com>
1066
1067 * config/tc-i386.c (match_template): Drop found_cpu_match local
1068 variable.
1069
4814632e
JB
10702020-01-16 Jan Beulich <jbeulich@suse.com>
1071
1072 * testsuite/gas/i386/avx512dq-inval.l,
1073 testsuite/gas/i386/avx512dq-inval.s: New.
1074 * testsuite/gas/i386/i386.exp: Run new test.
1075
131cb553
JL
10762020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1077
1078 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1079 relocations when the target is 430X, except when extracting part of an
1080 expression.
1081 (msp430_srcoperand): Adjust comment.
1082 Initialize the expp member of the msp430_operand_s struct as
1083 appropriate.
1084 (msp430_dstoperand): Likewise.
1085 * testsuite/gas/msp430/msp430.exp: Run new test.
1086 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1087 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1088
c24d0e8d
AM
10892020-01-15 Alan Modra <amodra@gmail.com>
1090
1091 * configure.tgt: Add sparc-*-freebsd case.
1092
e44925ae
LC
10932020-01-14 Lili Cui <lili.cui@intel.com>
1094
1095 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1096 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1097 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1098 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1099 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1100 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1101 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1102 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1103 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1104 * testsuite/gas/i386/align-branch-5.d: Likewise.
1105 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1106 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1107 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1108 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1109 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1110 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1111 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1112 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1113 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1114 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1115 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1116 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1117
7a6bf3be
SB
11182020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1119
1120 PR 25377
1121 * config/tc-z80.c: Add support for half precision, single
1122 precision and double precision floating point values.
1123 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1124 * doc/as.texi: Add new z80 command line options.
1125 * doc/c-z80.texi: Document new z80 command line options.
1126 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1127 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1128 * testsuite/gas/z80/z80.exp: Run the new test.
1129 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1130 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1131 * testsuite/gas/z80/strings.d: Update expected output.
1132
82e9597c
MM
11332020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1134
1135 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1136 dependency.
1137
5e4f7e05
CZ
11382020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1139
1140 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1141 the CPU.
1142 * config/tc-arc.h: Add header if/defs.
1143 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1144
febda64f
AM
11452020-01-13 Alan Modra <amodra@gmail.com>
1146
1147 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1148
5496abe1
AM
11492020-01-13 Alan Modra <amodra@gmail.com>
1150
1151 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1152 insertion.
1153
ec4181f2
AM
11542020-01-10 Alan Modra <amodra@gmail.com>
1155
1156 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1157 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1158
40c75bc8
SB
11592020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1160
1161 PR 25224
1162 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1163 opcode byte values.
1164 (emit_ld_r_r): Likewise.
1165 (emit_ld_rr_m): Likewise.
1166 (emit_ld_rr_nn): Likewise.
1167
72aea328
JB
11682020-01-09 Jan Beulich <jbeulich@suse.com>
1169
1170 * config/tc-i386.c (optimize_encoding): Add
1171 is_any_vex_encoding() invocations. Drop respective
1172 i.tm.extension_opcode == None checks.
1173
3f93af61
JB
11742020-01-09 Jan Beulich <jbeulich@suse.com>
1175
1176 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1177 REX transformations. Correct comment indentation.
1178
7697afb6
JB
11792020-01-09 Jan Beulich <jbeulich@suse.com>
1180
1181 * config/tc-i386.c (optimize_encoding): Generalize register
1182 transformation for TEST optimization.
1183
d835a58b
JB
11842020-01-09 Jan Beulich <jbeulich@suse.com>
1185
1186 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1187 testsuite/gas/i386/x86-64-sysenter-amd.d,
1188 testsuite/gas/i386/x86-64-sysenter-amd.l,
1189 testsuite/gas/i386/x86-64-sysenter-intel.d,
1190 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1191 * testsuite/gas/i386/i386.exp: Run new tests.
1192
915808f6
NC
11932020-01-08 Nick Clifton <nickc@redhat.com>
1194
1195 PR 25284
1196 * doc/as.texi (Align): Document the fact that all arguments can be
1197 omitted.
1198 (Balign): Likewise.
1199 (P2align): Likewise.
1200
f1f28025
NC
12012020-01-08 Nick Clifton <nickc@redhat.com>
1202
1203 PR 14891
1204 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1205 already defined as a different symbol type.
1206 * testsuite/gas/elf/pr14891.s: New test source file.
1207 * testsuite/gas/elf/pr14891.d: New test driver.
1208 * testsuite/gas/elf/pr14891.s: New test expected error output.
1209 * testsuite/gas/elf/elf.exp: Run the new test.
1210
030a2e78
AM
12112020-01-08 Alan Modra <amodra@gmail.com>
1212
1213 * config/tc-z8k.c (md_begin): Make idx unsigned.
1214 (get_specific): Likewise for this_index.
1215
2a1ebfb2
CZ
12162020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1217
1218 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1219 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1220 (md_operand): Set X_md to absent.
1221 (arc_parse_name): Check for X_md.
1222
16d87673
SB
12232020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1224
1225 PR 25311
1226 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1227 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1228 NO_STRING_ESCAPES.
1229 * read.c (next_char_of_string): Likewise.
1230 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1231 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1232
a2322019
NC
12332020-01-03 Nick Clifton <nickc@redhat.com>
1234
1235 * po/sv.po: Updated Swedish translation.
1236
5437a02a
JB
12372020-01-03 Jan Beulich <jbeulich@suse.com>
1238
1239 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1240 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1241
567dfba2
JB
12422020-01-03 Jan Beulich <jbeulich@suse.com>
1243
1244 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1245 by-element usdot. Add 64-bit form tests for by-element sudot.
1246 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1247
8c45011a
JB
12482020-01-03 Jan Beulich <jbeulich@suse.com>
1249
1250 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1251 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1252
f4950f76
JB
12532020-01-03 Jan Beulich <jbeulich@suse.com>
1254
1255 * testsuite/gas/aarch64/f64mm.d,
1256 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1257
6655dba2
SB
12582020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1259
1260 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1261 support for assembler code generated by SDCC. Add new relocation
1262 types. Add z80-elf target support.
1263 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1264 labels. Local labels starts from ".L".
1265 * NEWS: Mention the new support.
1266 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1267 * testsuite/gas/all/fwdexp.s: Likewise.
1268 * testsuite/gas/all/cond.l: Likewise.
1269 * testsuite/gas/all/cond.s: Likewise.
1270 * testsuite/gas/all/fwdexp.d: Likewise.
1271 * testsuite/gas/all/fwdexp.s: Likewise.
1272 * testsuite/gas/elf/section2.e-mips: Likewise.
1273 * testsuite/gas/elf/section2.l: Likewise.
1274 * testsuite/gas/elf/section2.s: Likewise.
1275 * testsuite/gas/macros/app1.d: Likewise.
1276 * testsuite/gas/macros/app1.s: Likewise.
1277 * testsuite/gas/macros/app2.d: Likewise.
1278 * testsuite/gas/macros/app2.s: Likewise.
1279 * testsuite/gas/macros/app3.d: Likewise.
1280 * testsuite/gas/macros/app3.s: Likewise.
1281 * testsuite/gas/macros/app4.d: Likewise.
1282 * testsuite/gas/macros/app4.s: Likewise.
1283 * testsuite/gas/macros/app4b.s: Likewise.
1284 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1285 * testsuite/gas/z80/z80.exp: Add new tests
1286 * testsuite/gas/z80/dollar.d: New file.
1287 * testsuite/gas/z80/dollar.s: New file.
1288 * testsuite/gas/z80/ez80_adl_all.d: New file.
1289 * testsuite/gas/z80/ez80_adl_all.s: New file.
1290 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1291 * testsuite/gas/z80/ez80_isuf.s: New file.
1292 * testsuite/gas/z80/ez80_z80_all.d: New file.
1293 * testsuite/gas/z80/ez80_z80_all.s: New file.
1294 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1295 * testsuite/gas/z80/r800_extra.d: New file.
1296 * testsuite/gas/z80/r800_extra.s: New file.
1297 * testsuite/gas/z80/r800_ii8.d: New file.
1298 * testsuite/gas/z80/r800_z80_doc.d: New file.
1299 * testsuite/gas/z80/z180.d: New file.
1300 * testsuite/gas/z80/z180.s: New file.
1301 * testsuite/gas/z80/z180_z80_doc.d: New file.
1302 * testsuite/gas/z80/z80_doc.d: New file.
1303 * testsuite/gas/z80/z80_doc.s: New file.
1304 * testsuite/gas/z80/z80_ii8.d: New file.
1305 * testsuite/gas/z80/z80_ii8.s: New file.
1306 * testsuite/gas/z80/z80_in_f_c.d: New file.
1307 * testsuite/gas/z80/z80_in_f_c.s: New file.
1308 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1309 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1310 * testsuite/gas/z80/z80_out_c_0.d: New file.
1311 * testsuite/gas/z80/z80_out_c_0.s: New file.
1312 * testsuite/gas/z80/z80_reloc.d: New file.
1313 * testsuite/gas/z80/z80_reloc.s: New file.
1314 * testsuite/gas/z80/z80_sli.d: New file.
1315 * testsuite/gas/z80/z80_sli.s: New file.
1316
a65b5de6
SN
13172020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1318
1319 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1320 REGLIST_RN.
1321
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13222020-01-01 Alan Modra <amodra@gmail.com>
1323
1324 Update year range in copyright notice of all files.
1325
0b114740 1326For older changes see ChangeLog-2019
3499769a 1327\f
0b114740 1328Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1329
1330Copying and distribution of this file, with or without modification,
1331are permitted in any medium without royalty provided the copyright
1332notice and this notice are preserved.
1333
1334Local Variables:
1335mode: change-log
1336left-margin: 8
1337fill-column: 74
1338version-control: never
1339End:
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