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x86: Replace IgnoreSize/DefaultSize with MnemonicSize
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
3cd7f3e3
L		 12020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.c (match_template): Replace ignoresize and
4 defaultsize with mnemonicsize.
5 (process_suffix): Likewise.
6
b8ba1385
SB		 72020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
8
9 PR 25627
10 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
11 instruction LD IY,(HL).
12 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
13 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
14 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
15 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
16
10d97a0f
L		 172020-03-03 H.J. Lu <hongjiu.lu@intel.com>
18
19 PR gas/25622
20 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
21 x86-64-default-suffix-avx.
22 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
23 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
24 * testsuite/gas/i386/noreg64.d: Updated.
25 * testsuite/gas/i386/noreg64.l: Likewise.
26 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
27 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
28 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
29
8326546e
SB		 302020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
31
32 PR 25604
33 * config/tc-z80.c (contains_register): Prevent an illegal memory
34 access when checking an expression for a register name.
35
e3e896e6
AM		 362020-03-03 Alan Modra <amodra@gmail.com>
37
38 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
39 support.
40
a4dd6c97
AM		 412020-03-02 Alan Modra <amodra@gmail.com>
42
43 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
44 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
45 and .sbss sections.
46 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
47 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
48 (s3_s_score_lcomm): Likewise.
49 * config/tc-score7.c: Similarly.
50 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
51
dec7b24b
YS		 522020-02-28 YunQiang Su <syq@debian.org>
53
54 PR gas/25539
55 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
56 to handle multi-labels.
57 (has_label_name): New.
58
cceb53b8
MM		 592020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
60
61 * config/tc-arm.c (enum pred_instruction_type): Remove
62 NEUTRAL_IT_NO_VPT_INSN predication type.
63 (cxn_handle_predication): Modify to require condition suffixes.
64 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
65 * testsuite/gas/arm/cde-scalar.s: Update test.
66 * testsuite/gas/arm/cde-warnings.l: Update test.
67 * testsuite/gas/arm/cde-warnings.s: Update test.
68
da3ec71f
AM		 692020-02-26 Alan Modra <amodra@gmail.com>
70
71 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
72 N_() on empty string.
73
42135cad
AM		 742020-02-26 Alan Modra <amodra@gmail.com>
75
76 * read.c (read_a_source_file): Call strncpy with length one
77 less than size of original_case_string.
78
dc1e8a47
AM		 792020-02-26 Alan Modra <amodra@gmail.com>
80
81 * config/obj-elf.c: Indent labels correctly.
82 * config/obj-macho.c: Likewise.
83 * config/tc-aarch64.c: Likewise.
84 * config/tc-alpha.c: Likewise.
85 * config/tc-arm.c: Likewise.
86 * config/tc-cr16.c: Likewise.
87 * config/tc-crx.c: Likewise.
88 * config/tc-frv.c: Likewise.
89 * config/tc-i386-intel.c: Likewise.
90 * config/tc-i386.c: Likewise.
91 * config/tc-ia64.c: Likewise.
92 * config/tc-mn10200.c: Likewise.
93 * config/tc-mn10300.c: Likewise.
94 * config/tc-nds32.c: Likewise.
95 * config/tc-riscv.c: Likewise.
96 * config/tc-s12z.c: Likewise.
97 * config/tc-xtensa.c: Likewise.
98 * config/tc-z80.c: Likewise.
99 * read.c: Likewise.
100 * symbols.c: Likewise.
101 * write.c: Likewise.
102
bd0cf5a6
NC		 1032020-02-20 Nelson Chu <nelson.chu@sifive.com>
104
54b2aec1
NC		 105 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
106 we are assembling instruction with CSR. Call riscv_csr_read_only_check
107 after parsing all arguments.
108 (enum csr_insn_type): New enum is used to classify the CSR instruction.
109 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
110 are used to check if we write a read-only CSR by the CSR instruction.
111 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
112 all CSR for the read-only CSR checking.
113 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
114 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
115 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
116 all CSR instructions for the read-only CSR checking.
117 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
118 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
119
2ca89224
NC		 120 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
121 (riscv_opts): Initialize it.
122 (reg_lookup_internal): Check the `riscv_opts.csr_check`
123 before doing the CSR checking.
124 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
125 (md_longopts): Add mcsr-check and mno-csr-check.
126 (md_parse_option): Handle new enum option values.
127 (s_riscv_option): Handle new long options.
128 * doc/c-riscv.texi: Add description for the new .option and assembler
129 options.
130 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
131 the CSR checking.
132 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
133
bd0cf5a6
NC		 134 * config/tc-riscv.c (csr_extra_hash): New.
135 (enum riscv_csr_class): New enum. Used to decide
136 whether or not this CSR is legal in the current ISA string.
137 (struct riscv_csr_extra): New structure to hold all extra information
138 of CSR.
139 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
140 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
141 Call hash_reg_name to insert CSR address into reg_names_hash.
142 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
143 Decide whether the CSR is valid according to the csr_extra_hash.
144 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
145 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
146 not a boolean. This is same as riscv_init_csr_hash, so keep the
147 consistent usage.
148 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
149 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
150 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
151 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
152 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
153 f-ext CSR are not allowed.
154 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
155 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
156 source file is `priv-reg.s`, and the ISA is rv64if, so the
157 rv32-only CSR are not allowed.
158 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
159
10a95fcc
AM		 1602020-02-21 Alan Modra <amodra@gmail.com>
161
162 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
163 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
164
dda2980f
AM		 1652020-02-21 Alan Modra <amodra@gmail.com>
166
167 PR 25569
168 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
169 on section size adjustment, instead perform another write if
170 exec header size is larger than section size.
171
bd3380bc
NC		 1722020-02-19 Nelson Chu <nelson.chu@sifive.com>
173
174 * doc/c-riscv.texi: Add the doc entries for -march-attr/
175 -mno-arch-attr command line options.
176
fa164239
JW		 1772020-02-19 Nelson Chu <nelson.chu@sifive.com>
178
179 * testsuite/gas/riscv/c-add-addi.d: New testcase.
180 * testsuite/gas/riscv/c-add-addi.s: Likewise.
181
fcaaac0a
SB		 1822020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
183
184 PR 25576
185 * config/tc-z80.c (md_parse_option): Do not use an underscore
186 prefix for local labels in SDCC compatability mode.
187 (z80_start_line_hook): Remove SDCC dollar label support.
188 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
189 * testsuite/gas/z80/sdcc.s: Likewise.
190
1912020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
192
193 PR 25517
194 * config/tc-z80.c: Add -march option.
195 * doc/as.texi: Update Z80 documentation.
196 * doc/c-z80.texi: Likewise.
197 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
198 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
199 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
200 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
201 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
202 * testsuite/gas/z80/gbz80_all.d: Likewise.
203 * testsuite/gas/z80/r800_extra.d: Likewise.
204 * testsuite/gas/z80/r800_ii8.d: Likewise.
205 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
206 * testsuite/gas/z80/sdcc.d: Likewise.
207 * testsuite/gas/z80/z180.d: Likewise.
208 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
209 * testsuite/gas/z80/z80_doc.d: Likewise.
210 * testsuite/gas/z80/z80_ii8.d: Likewise.
211 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
212 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
213 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
214 * testsuite/gas/z80/z80_sli.d: Likewise.
215 * testsuite/gas/z80/z80n_all.d: Likewise.
216 * testsuite/gas/z80/z80n_reloc.d: Likewise.
217
a7e12755
L		 2182020-02-19 H.J. Lu <hongjiu.lu@intel.com>
219
220 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
221 with GNU_PROPERTY_X86_FEATURE_2_MMX.
222 * testsuite/gas/i386/i386.exp: Run property-3 and
223 x86-64-property-3.
224 * testsuite/gas/i386/property-3.d: New file.
225 * testsuite/gas/i386/property-3.s: Likewise.
226 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
227
272a84b1
L		 2282020-02-17 H.J. Lu <hongjiu.lu@intel.com>
229
230 * config/tc-i386.c (cpu_arch): Add .popcnt.
231 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
232 Add a tab before @samp{.sse4a}.
233
c8f8eebc
JB		 2342020-02-17 Jan Beulich <jbeulich@suse.com>
235
236 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
237 for AddrPrefixOpReg templates. Combine the two pieces of
238 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
239 mode.
240
eedb0f2c
JB		 2412020-02-17 Jan Beulich <jbeulich@suse.com>
242
243 PR gas/14439
244 * config/tc-i386.c (md_assemble): Also suppress operand
245 swapping for MONITOR{,X} and MWAIT{,X}.
246 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
247 Add Intel syntax monitor/mwait tests.
248 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
249 Adjust expectations.
250 *testsuite/gas/i386/sse3-intel.d,
251 testsuite/gas/i386/x86-64-sse3-intel.d: New.
252 * testsuite/gas/i386/i386.exp: Run new tests.
253
b9915cbc
JB		 2542020-02-17 Jan Beulich <jbeulich@suse.com>
255
256 PR gas/6518
257 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
258 [XYZ]MMWord memory operand ambiguity recognition logic (largely
259 re-indentation).
260 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
261 cases.
262 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
263 * testsuite/gas/i386/avx512dq-inval.l,
264 testsuite/gas/i386/inval-avx.l,
265 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
266 * testsuite/gas/i386/avx512vl-ambig.s,
267 testsuite/gas/i386/avx512vl-ambig.l: New.
268 * testsuite/gas/i386/i386.exp: Run new test.
269
af5c13b0
L		 2702020-02-16 H.J. Lu <hongjiu.lu@intel.com>
271
272 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
273 nosse4.
274 * doc/c-i386.texi: Document sse4a and nosse4a.
275
07d98387
L		 2762020-02-14 H.J. Lu <hongjiu.lu@intel.com>
277
278 * doc/c-i386.texi: Remove the old movsx and movzx documentation
279 for AT&T syntax.
280
65fca059
JB		 2812020-02-14 Jan Beulich <jbeulich@suse.com>
282
283 PR gas/25438
284 * config/tc-i386.c (md_assemble): Move movsx/movzx special
285 casing ...
286 (process_suffix): ... here. Consider just the first operand
287 initially.
288 (check_long_reg): Drop opcode 0x63 special case again.
289 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
290 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
291 Move ambiguous operand size tests ...
292 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
293 testsuite/gas/i386/noreg64.s: ... here.
294 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
295 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
296 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
297 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
298 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
299 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
300 testsuite/gas/i386/x86-64-movsxd.d,
301 testsuite/gas/i386/x86-64-movsxd-intel.d,
302 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
303 Adjust expectations.
304 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
305 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
306 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
307 * testsuite/gas/i386/i386.exp: Run new tests.
308
b6773884
JB		 3092020-02-14 Jan Beulich <jbeulich@suse.com>
310
311 * config/tc-i386.c (process_operands): Also skip segment
312 override prefix emission if it matches an already present one.
313 * testsuite/gas/i386/prefix32.s: Add double segment override
314 cases.
315 * testsuite/gas/i386/prefix32.l: Adjust expectations.
316
92334ad2
JB		 3172020-02-14 Jan Beulich <jbeulich@suse.com>
318
319 * config/tc-i386.c (process_operands): Drop ineffectual segment
320 overrides when optimizing.
321 * testsuite/gas/i386/lea-optimize.d: New.
322 * testsuite/gas/i386/i386.exp: Run new test.
323
3242020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 325
326 * config/tc-i386.c (process_operands): Also check insn prefix
327 for ineffectual segment override warning. Don't cover possible
328 VEX/EVEX encoded insns there.
329 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
330 testsuite/gas/i386/lea.e: New.
331 * testsuite/gas/i386/i386.exp: Run new test.
332
0e6724de
L		 3332020-02-14 H.J. Lu <hongjiu.lu@intel.com>
334
335 PR gas/25438
336 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
337 syntax.
338
292676c1
L		 3392020-02-13 Fangrui Song <maskray@google.com>
340 H.J. Lu <hongjiu.lu@intel.com>
341
342 PR gas/25551
343 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
344 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
345 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
346 * testsuite/gas/i386/relax-5.d: New file.
347 * testsuite/gas/i386/relax-5.s: Likewise.
348 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
349 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
350
7deea9aa
JB		 3512020-02-13 Jan Beulich <jbeulich@suse.com>
352
353 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
354 "nosse4" entry.
355
6c0946d0
JB		 3562020-02-12 Jan Beulich <jbeulich@suse.com>
357
358 * config/tc-i386.c (avx512): New (at file scope), moved from
359 (check_VecOperands): ... here.
360 (process_suffix): Add [XYZ]MMword operand size handling.
361 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
362 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
363 tests.
364 * testsuite/gas/i386/avx512dq-inval.l,
365 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
366
5990e377
JB		 3672020-02-12 Jan Beulich <jbeulich@suse.com>
368
369 PR gas/24546
370 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
371 code only.
372 * config/tc-i386-intel.c (i386_intel_operand): Also handle
373 CALL/JMP in O_tbyte_ptr case.
374 * doc/c-i386.texi: Mention far call and full pointer load ISA
375 differences.
376 * testsuite/gas/i386/x86-64-branch-3.s,
377 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
378 * testsuite/gas/i386/x86-64-branch-3.d,
379 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
380 * testsuite/gas/i386/x86-64-branch-5.l,
381 testsuite/gas/i386/x86-64-branch-5.s: New.
382 * testsuite/gas/i386/i386.exp: Run new test.
383
9706160a
JB		 3842020-02-12 Jan Beulich <jbeulich@suse.com>
385
386 PR gas/25438
387 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
388 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
389 64-bit-only warning.
390 (check_word_reg): Consistently error on mismatching register
391 size and suffix.
392 * testsuite/gas/i386/general.s: Replace dword GPR with word one
393 for movw. Replace suffix / GPR for orb.
394 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
395 byte GPRs as well as ones for inb/outb with a word accumulator.
396 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
397 testsuite/gas/i386/inval.l: Adjust expectations.
398
5de4d9ef
JB		 3992020-02-12 Jan Beulich <jbeulich@suse.com>
400
401 * config/tc-i386.c (operand_type_register_match): Also fall
402 through initial two if()-s when the template allows for a GPR
403 operand. Adjust comment.
404
50128d0c
JB		 4052020-02-11 Jan Beulich <jbeulich@suse.com>
406
407 (struct _i386_insn): New field "short_form".
408 (optimize_encoding): Drop setting of shortform field.
409 (process_suffix): Set i.short_form. Replace shortform use.
410 (process_operands): Replace shortform use.
411
1ed818b4
MM		 4122020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
413
414 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
415 loop initial declaration.
416
5aae9ae9
MM		 4172020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
418
419 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
420 instructions that can have 5 arguments.
421 (enum operand_parse_code): Add new operands.
422 (parse_operands): Account for new operands.
423 (S5): New macro.
424 (enum neon_shape_el): Introduce P suffixes for coprocessor.
425 (neon_select_shape): Account for P suffix.
426 (LOW1): Move macro to global position.
427 (HI4): Move macro to global position.
428 (vcx_assign_vec_d): New.
429 (vcx_assign_vec_m): New.
430 (vcx_assign_vec_n): New.
431 (enum vcx_reg_type): New.
432 (vcx_get_reg_type): New.
433 (vcx_size_pos): New.
434 (vcx_vec_pos): New.
435 (vcx_handle_shape): New.
436 (vcx_ensure_register_in_range): New.
437 (vcx_handle_register_arguments): New.
438 (vcx_handle_insn_block): New.
439 (vcx_handle_common_checks): New.
440 (do_vcx1): New.
441 (do_vcx2): New.
442 (do_vcx3): New.
443 * testsuite/gas/arm/cde-missing-fp.d: New test.
444 * testsuite/gas/arm/cde-missing-fp.l: New test.
445 * testsuite/gas/arm/cde-missing-mve.d: New test.
446 * testsuite/gas/arm/cde-missing-mve.l: New test.
447 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
448 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
449 * testsuite/gas/arm/cde-mve.s: New test.
450 * testsuite/gas/arm/cde-warnings.l:
451 * testsuite/gas/arm/cde-warnings.s:
452 * testsuite/gas/arm/cde.d:
453 * testsuite/gas/arm/cde.s:
454
4934a27c
MM		 4552020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
456 Matthew Malcomson <matthew.malcomson@arm.com>
457
458 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
459 CDE coprocessor that can be enabled.
460 (enum pred_instruction_type): New pred type.
461 (BAD_NO_VPT): New error message.
462 (BAD_CDE): New error message.
463 (BAD_CDE_COPROC): New error message.
464 (enum operand_parse_code): Add new immediate operands.
465 (parse_operands): Account for new immediate operands.
466 (check_cde_operand): New.
467 (cde_coproc_enabled): New.
468 (cde_coproc_pos): New.
469 (cde_handle_coproc): New.
470 (cxn_handle_predication): New.
471 (do_custom_instruction_1): New.
472 (do_custom_instruction_2): New.
473 (do_custom_instruction_3): New.
474 (do_cx1): New.
475 (do_cx1a): New.
476 (do_cx1d): New.
477 (do_cx1da): New.
478 (do_cx2): New.
479 (do_cx2a): New.
480 (do_cx2d): New.
481 (do_cx2da): New.
482 (do_cx3): New.
483 (do_cx3a): New.
484 (do_cx3d): New.
485 (do_cx3da): New.
486 (handle_pred_state): Define new IT block behaviour.
487 (insns): Add newn CX*{,d}{,a} instructions.
488 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
489 Define new cdecp extension strings.
490 * doc/c-arm.texi: Document new cdecp extension arguments.
491 * testsuite/gas/arm/cde-scalar.d: New test.
492 * testsuite/gas/arm/cde-scalar.s: New test.
493 * testsuite/gas/arm/cde-warnings.d: New test.
494 * testsuite/gas/arm/cde-warnings.l: New test.
495 * testsuite/gas/arm/cde-warnings.s: New test.
496 * testsuite/gas/arm/cde.d: New test.
497 * testsuite/gas/arm/cde.s: New test.
498
4b5aaf5f
L		 4992020-02-10 H.J. Lu <hongjiu.lu@intel.com>
500
501 PR gas/25516
502 * config/tc-i386.c (intel64): Renamed to ...
503 (isa64): This.
504 (match_template): Accept Intel64 only instruction by default.
505 (i386_displacement): Updated.
506 (md_parse_option): Updated.
507 * c-i386.texi: Update -mamd64/-mintel64 documentation.
508 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
509 -mamd64 to x86-64-sysenter-amd.
510 * testsuite/gas/i386/x86-64-sysenter.d: New file.
511
33176d91
AM		 5122020-02-10 Alan Modra <amodra@gmail.com>
513
514 * config/obj-elf.c (obj_elf_change_section): Error for section
515 type, attr or entsize changes in assembly.
516 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
517 * testsuite/gas/elf/section5.l: Update.
518
82194874
AM		 5192020-02-10 Alan Modra <amodra@gmail.com>
520
521 * output-file.c (output_file_close): Do a normal close when
522 flag_always_generate_output.
523 * write.c (write_object_file): Don't stop output when
524 flag_always_generate_output.
525
9fc0b501
SB		 5262020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
527
528 PR 25469
529 * config/tc-z80.c: Add -gbz80 command line option to generate code
530 for the GameBoy Z80. Add support for generating DWARF.
531 * config/tc-z80.h: Add support for DWARF debug information
532 generation.
533 * doc/c-z80.texi: Document new command line option.
534 * testsuite/gas/z80/gbz80_all.d: New file.
535 * testsuite/gas/z80/gbz80_all.s: New file.
536 * testsuite/gas/z80/z80.exp: Run the new tests.
537 * testsuite/gas/z80/z80n_all.d: New file.
538 * testsuite/gas/z80/z80n_all.s: New file.
539 * testsuite/gas/z80/z80n_reloc.d: New file.
540
b7d07216
L		 5412020-02-06 H.J. Lu <hongjiu.lu@intel.com>
542
543 PR gas/25381
544 * config/obj-elf.c (get_section): Also check
545 linked_to_symbol_name.
546 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
547 (obj_elf_parse_section_letters): Handle the 'o' flag.
548 (build_group_lists): Renamed to ...
549 (build_additional_section_info): This. Set elf_linked_to_section
550 from map_head.linked_to_symbol_name.
551 (elf_adjust_symtab): Updated.
552 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
553 * doc/as.texi: Document the 'o' flag.
554 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
555 * testsuite/gas/elf/section18.d: New file.
556 * testsuite/gas/elf/section18.s: Likewise.
557 * testsuite/gas/elf/section19.d: Likewise.
558 * testsuite/gas/elf/section19.s: Likewise.
559 * testsuite/gas/elf/section20.d: Likewise.
560 * testsuite/gas/elf/section20.s: Likewise.
561 * testsuite/gas/elf/section21.d: Likewise.
562 * testsuite/gas/elf/section21.l: Likewise.
563 * testsuite/gas/elf/section21.s: Likewise.
564
5eb617a7
L		 5652020-02-06 H.J. Lu <hongjiu.lu@intel.com>
566
567 * NEWS: Mention x86 assembler options to align branches for
568 binutils 2.34.
569
986ac314
L		 5702020-02-06 H.J. Lu <hongjiu.lu@intel.com>
571
572 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
573 only for ELF targets.
574 * testsuite/gas/i386/unique.d: Don't xfail.
575 * testsuite/gas/i386/x86-64-unique.d: Likewise.
576
19234a6d
AM		 5772020-02-06 Alan Modra <amodra@gmail.com>
578
579 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
580 * testsuite/gas/i386/x86-64-unique.d: Likewise.
581
02e0be69
AM		 5822020-02-06 Alan Modra <amodra@gmail.com>
583
584 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
585 xfail, and rename test.
586 * testsuite/gas/elf/section12b.d: Likewise.
587 * testsuite/gas/elf/section16a.d: Likewise.
588 * testsuite/gas/elf/section16b.d: Likewise.
589
a8c4d40b
L		 5902020-02-02 H.J. Lu <hongjiu.lu@intel.com>
591
592 PR gas/25380
593 * config/obj-elf.c (section_match): Removed.
594 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
595 section_id.
596 (obj_elf_change_section): Replace info and group_name arguments
597 with match_p. Also update the section ID and flags from match_p.
598 (obj_elf_section): Handle "unique,N". Update call to
599 obj_elf_change_section.
600 * config/obj-elf.h (elf_section_match): New.
601 (obj_elf_change_section): Updated.
602 * config/tc-arm.c (start_unwind_section): Update call to
603 obj_elf_change_section.
604 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
605 * config/tc-microblaze.c (microblaze_s_data): Likewise.
606 (microblaze_s_sdata): Likewise.
607 (microblaze_s_rdata): Likewise.
608 (microblaze_s_bss): Likewise.
609 * config/tc-mips.c (s_change_section): Likewise.
610 * config/tc-msp430.c (msp430_profiler): Likewise.
611 * config/tc-rx.c (parse_rx_section): Likewise.
612 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
613 * doc/as.texi: Document "unique,N" in .section directive.
614 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
615 * testsuite/gas/elf/section15.d: New file.
616 * testsuite/gas/elf/section15.s: Likewise.
617 * testsuite/gas/elf/section16.s: Likewise.
618 * testsuite/gas/elf/section16a.d: Likewise.
619 * testsuite/gas/elf/section16b.d: Likewise.
620 * testsuite/gas/elf/section17.d: Likewise.
621 * testsuite/gas/elf/section17.l: Likewise.
622 * testsuite/gas/elf/section17.s: Likewise.
623 * testsuite/gas/i386/unique.d: Likewise.
624 * testsuite/gas/i386/unique.s: Likewise.
625 * testsuite/gas/i386/x86-64-unique.d: Likewise.
626 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
627
575d37ae
L		 6282020-02-02 H.J. Lu <hongjiu.lu@intel.com>
629
630 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
631
2384096c
G		 6322020-02-01 Anthony Green <green@moxielogic.com>
633
634 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
635
95441c43
SL		 6362020-01-31 Sandra Loosemore <sandra@codesourcery.com>
637
638 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
639 %tls_ldo.
640
d465d695
AV		 6412020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
642
643 PR gas/25472
644 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
645 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
646 +mve.
647 * testsuite/gas/arm/mve_dsp.d: New test.
648
d26cc8a9
NC		 6492020-01-31 Nick Clifton <nickc@redhat.com>
650
651 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
652 rather than BFD_RELOC_NONE.
653
90e9955a
SP		 6542020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
655
656 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
657 to support VLDMIA instruction for MVE.
658 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
659 instruction for MVE.
660 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
661 instruction for MVE.
662 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
663 instruction for MVE.
664 * testsuite/gas/arm/mve-ldst.d: New test.
665 * testsuite/gas/arm/mve-ldst.s: Likewise.
666
53943f32
NC		 6672020-01-31 Nick Clifton <nickc@redhat.com>
668
669 * po/fr.po: Updated French translation.
670 * po/ru.po: Updated Russian translation.
671
c3036ed0
RS		 6722020-01-31 Richard Sandiford <richard.sandiford@arm.com>
673
674 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
675 .s for the movprfx.
676 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
677 * testsuite/gas/aarch64/sve-movprfx_28.d,
678 * testsuite/gas/aarch64/sve-movprfx_28.l,
679 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
680
2ae4c703
JB		 6812020-01-30 Jan Beulich <jbeulich@suse.com>
682
683 * config/tc-i386.c (output_disp): Tighten base_opcode check.
684 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
685 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
686 Adjust expectations.
687
bd434cc4
JM		 6882020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
689
690 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
691 * testsuite/gas/bpf/alu-be.d: Likewise.
692 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
693 * testsuite/gas/bpf/alu32-be.d: Likewise.
694
aeab2b26
JB		 6952020-01-30 Jan Beulich <jbeulich@suse.com>
696
697 * testsuite/gas/i386/x86-64-branch-2.s,
698 testsuite/gas/i386/x86-64-branch-4.s,
699 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
700 * testsuite/gas/i386/ilp32/x86-64-branch.d,
701 testsuite/gas/i386/x86-64-branch-2.d,
702 testsuite/gas/i386/x86-64-branch-4.l,
703 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
704
873494c8
JB		 7052020-01-30 Jan Beulich <jbeulich@suse.com>
706
707 * config/tc-i386.c (process_suffix): .
708 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
709 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
710 Add LRETQ case.
711 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
712 suffix.
713 testsuite/gas/i386/x86_64.s: Add RETF cases.
714 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
715 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
716 testsuite/gas/i386/x86-64-opcode.d,
717 testsuite/gas/i386/x86-64-suffix-intel.d,
718 testsuite/gas/i386/x86-64-suffix.d,
719 testsuite/gas/i386/x86_64-intel.d
720 testsuite/gas/i386/x86_64.d: Adjust expectations.
721 * testsuite/gas/i386/x86-64-suffix.e,
722 testsuite/gas/i386/x86_64.e: New.
723
62b3f548
JB		 7242020-01-30 Jan Beulich <jbeulich@suse.com>
725
726 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
727 special case.
728
bc31405e
L		 7292020-01-27 H.J. Lu <hongjiu.lu@intel.com>
730
731 PR binutils/25445
732 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
733 movsxd.
734 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
735 differences. Document movslq and movsxd.
736 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
737 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
738 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
739 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
740 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
741 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
742 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
743 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
744 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
745 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
746 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
747
e3696f67
AM		 7482020-01-27 Alan Modra <amodra@gmail.com>
749
750 * testsuite/gas/all/gas.exp: Replace case statements with switch
751 statements.
752 * testsuite/gas/elf/elf.exp: Likewise.
753 * testsuite/gas/macros/macros.exp: Likewise.
754 * testsuite/lib/gas-defs.exp: Likewise.
755
7568c93b
TC		 7562020-01-27 Tamar Christina <tamar.christina@arm.com>
757
758 PR 25403
759 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
760 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
761
403d1bd9
JW		 7622020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
763
764 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
765 s exts must be known, so rename *ok* to *fail*.
766 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
767 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
768 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
769 above change.
770 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
771 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
772
be4c5e58
L		 7732020-01-22 H.J. Lu <hongjiu.lu@intel.com>
774
775 PR gas/25438
776 * config/tc-i386.c (check_long_reg): Always disallow double word
777 suffix in mnemonic with word general register.
778 * testsuite/gas/i386/general.s: Replace word general register
779 with double word general register for movl.
780 * testsuite/gas/i386/inval.s: Add tests for movl with word general
781 register.
782 * testsuite/gas/i386/general.l: Updated.
783 * testsuite/gas/i386/inval.l: Likewise.
784
9e7028aa
AM		 7852020-01-22 Alan Modra <amodra@gmail.com>
786
787 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
788 __tls_get_addr_desc and __tls_get_addr_opt.
789
e3ed17f3
JB		 7902020-01-21 Jan Beulich <jbeulich@suse.com>
791
792 * testsuite/gas/i386/inval-crc32.s,
793 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
794 * testsuite/gas/i386/inval-crc32.l,
795 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
796
1a035124
JB		 7972020-01-21 Jan Beulich <jbeulich@suse.com>
798
799 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
800 generic code path. Deal with No_lSuf being set in a template.
801 * testsuite/gas/i386/inval-crc32.l,
802 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
803 instead of error(s) when operand size is ambiguous.
804 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
805 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
806 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
807 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
808 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
809 Adjust expectations.
810
c006a730
JB		 8112020-01-21 Jan Beulich <jbeulich@suse.com>
812
813 * config/tc-i386.c (process_suffix): Drop SYSRET special case
814 and an intel_syntax check. Re-write lack-of-suffix processing
815 logic.
816 * doc/c-i386.texi: Document operand size defaults for suffix-
817 less AT&T syntax insns.
818 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
819 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
820 testsuite/gas/i386/x86-64-avx-scalar.s,
821 testsuite/gas/i386/x86-64-avx.s,
822 testsuite/gas/i386/x86-64-bundle.s,
823 testsuite/gas/i386/x86-64-intel64.s,
824 testsuite/gas/i386/x86-64-lock-1.s,
825 testsuite/gas/i386/x86-64-opcode.s,
826 testsuite/gas/i386/x86-64-sse2avx.s,
827 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
828 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
829 testsuite/gas/i386/x86-64-nops.s,
830 testsuite/gas/i386/x86-64-ptwrite.s,
831 testsuite/gas/i386/x86-64-simd.s,
832 testsuite/gas/i386/x86-64-sse-noavx.s,
833 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
834 insns.
835 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
836 testsuite/gas/i386/noreg64.s: Add further tests.
837 * testsuite/gas/i386/ilp32/x86-64-nops.d,
838 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
839 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
840 testsuite/gas/i386/sse-noavx.d,
841 testsuite/gas/i386/x86-64-intel64.d,
842 testsuite/gas/i386/x86-64-nops.d,
843 testsuite/gas/i386/x86-64-opcode.d,
844 testsuite/gas/i386/x86-64-ptwrite-intel.d,
845 testsuite/gas/i386/x86-64-ptwrite.d,
846 testsuite/gas/i386/x86-64-simd-intel.d,
847 testsuite/gas/i386/x86-64-simd-suffix.d,
848 testsuite/gas/i386/x86-64-simd.d,
849 testsuite/gas/i386/x86-64-sse-noavx.d
850 testsuite/gas/i386/x86-64-suffix.d,
851 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
852 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
853 testsuite/gas/i386/noreg64.l: New.
854 * testsuite/gas/i386/i386.exp: Run new tests.
855
c906a69a
JB		 8562020-01-21 Jan Beulich <jbeulich@suse.com>
857
858 * testsuite/gas/i386/avx512_bf16_vl.s,
859 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
860 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
861 broadcast forms of VCVTNEPS2BF16.
862 * testsuite/gas/i386/avx512_bf16_vl.d,
863 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
864
26916852
NC		 8652020-01-20 Nick Clifton <nickc@redhat.com>
866
867 * po/uk.po: Updated Ukranian translation.
868
14470f07
L		 8692020-01-20 H.J. Lu <hongjiu.lu@intel.com>
870
871 PR ld/25416
872 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
873 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
874 x32 object.
875 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
876 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
877 R_X86_64_GOTPC32_TLSDESC relocation.
878
1b1bb2c6
NC		 8792020-01-18 Nick Clifton <nickc@redhat.com>
880
881 * configure: Regenerate.
882 * po/gas.pot: Regenerate.
883
ae774686
NC		 8842020-01-18 Nick Clifton <nickc@redhat.com>
885
886 Binutils 2.34 branch created.
887
42e04b36
L		 8882020-01-17 H.J. Lu <hongjiu.lu@intel.com>
889
890 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
891 with vex_encoding_vex.
892 (parse_insn): Likewise.
893 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
894 and {vex3} documentation.
895 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
896 {vex}.
897 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
898
2da2eaf4
AV		 8992020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
900
901 PR 25376
902 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
903 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
904 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
905 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
906 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
907 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
908
45a4bb20
JB		 9092020-01-16 Jan Beulich <jbeulich@suse.com>
910
911 * config/tc-i386.c (match_template): Drop found_cpu_match local
912 variable.
913
4814632e
JB		 9142020-01-16 Jan Beulich <jbeulich@suse.com>
915
916 * testsuite/gas/i386/avx512dq-inval.l,
917 testsuite/gas/i386/avx512dq-inval.s: New.
918 * testsuite/gas/i386/i386.exp: Run new test.
919
131cb553
JL		 9202020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
921
922 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
923 relocations when the target is 430X, except when extracting part of an
924 expression.
925 (msp430_srcoperand): Adjust comment.
926 Initialize the expp member of the msp430_operand_s struct as
927 appropriate.
928 (msp430_dstoperand): Likewise.
929 * testsuite/gas/msp430/msp430.exp: Run new test.
930 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
931 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
932
c24d0e8d
AM		 9332020-01-15 Alan Modra <amodra@gmail.com>
934
935 * configure.tgt: Add sparc-*-freebsd case.
936
e44925ae
LC		 9372020-01-14 Lili Cui <lili.cui@intel.com>
938
939 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
940 * testsuite/gas/i386/align-branch-1b.d: Likewise.
941 * testsuite/gas/i386/align-branch-1c.d: Likewise.
942 * testsuite/gas/i386/align-branch-1d.d: Likewise.
943 * testsuite/gas/i386/align-branch-1e.d: Likewise.
944 * testsuite/gas/i386/align-branch-1f.d: Likewise.
945 * testsuite/gas/i386/align-branch-1g.d: Likewise.
946 * testsuite/gas/i386/align-branch-1h.d: Likewise.
947 * testsuite/gas/i386/align-branch-1i.d: Likewise.
948 * testsuite/gas/i386/align-branch-5.d: Likewise.
949 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
950 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
951 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
952 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
953 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
954 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
955 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
956 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
957 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
958 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
959 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
960 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
961
7a6bf3be
SB		 9622020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
963
964 PR 25377
965 * config/tc-z80.c: Add support for half precision, single
966 precision and double precision floating point values.
967 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
968 * doc/as.texi: Add new z80 command line options.
969 * doc/c-z80.texi: Document new z80 command line options.
970 * testsuite/gas/z80/ez80_pref_dis.s: New test.
971 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
972 * testsuite/gas/z80/z80.exp: Run the new test.
973 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
974 * testsuite/gas/z80/fp_zeda32.d: Likewise.
975 * testsuite/gas/z80/strings.d: Update expected output.
976
82e9597c
MM		 9772020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
978
979 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
980 dependency.
981
5e4f7e05
CZ		 9822020-01-13 Claudiu Zissulescu <claziss@gmail.com>
983
984 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
985 the CPU.
986 * config/tc-arc.h: Add header if/defs.
987 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
988
febda64f
AM		 9892020-01-13 Alan Modra <amodra@gmail.com>
990
991 * testsuite/gas/wasm32/allinsn.d: Update expected output.
992
5496abe1
AM		 9932020-01-13 Alan Modra <amodra@gmail.com>
994
995 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
996 insertion.
997
ec4181f2
AM		 9982020-01-10 Alan Modra <amodra@gmail.com>
999
1000 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1001 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1002
40c75bc8
SB		 10032020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1004
1005 PR 25224
1006 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1007 opcode byte values.
1008 (emit_ld_r_r): Likewise.
1009 (emit_ld_rr_m): Likewise.
1010 (emit_ld_rr_nn): Likewise.
1011
72aea328
JB		 10122020-01-09 Jan Beulich <jbeulich@suse.com>
1013
1014 * config/tc-i386.c (optimize_encoding): Add
1015 is_any_vex_encoding() invocations. Drop respective
1016 i.tm.extension_opcode == None checks.
1017
3f93af61
JB		 10182020-01-09 Jan Beulich <jbeulich@suse.com>
1019
1020 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1021 REX transformations. Correct comment indentation.
1022
7697afb6
JB		 10232020-01-09 Jan Beulich <jbeulich@suse.com>
1024
1025 * config/tc-i386.c (optimize_encoding): Generalize register
1026 transformation for TEST optimization.
1027
d835a58b
JB		 10282020-01-09 Jan Beulich <jbeulich@suse.com>
1029
1030 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1031 testsuite/gas/i386/x86-64-sysenter-amd.d,
1032 testsuite/gas/i386/x86-64-sysenter-amd.l,
1033 testsuite/gas/i386/x86-64-sysenter-intel.d,
1034 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1035 * testsuite/gas/i386/i386.exp: Run new tests.
1036
915808f6
NC		 10372020-01-08 Nick Clifton <nickc@redhat.com>
1038
1039 PR 25284
1040 * doc/as.texi (Align): Document the fact that all arguments can be
1041 omitted.
1042 (Balign): Likewise.
1043 (P2align): Likewise.
1044
f1f28025
NC		 10452020-01-08 Nick Clifton <nickc@redhat.com>
1046
1047 PR 14891
1048 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1049 already defined as a different symbol type.
1050 * testsuite/gas/elf/pr14891.s: New test source file.
1051 * testsuite/gas/elf/pr14891.d: New test driver.
1052 * testsuite/gas/elf/pr14891.s: New test expected error output.
1053 * testsuite/gas/elf/elf.exp: Run the new test.
1054
030a2e78
AM		 10552020-01-08 Alan Modra <amodra@gmail.com>
1056
1057 * config/tc-z8k.c (md_begin): Make idx unsigned.
1058 (get_specific): Likewise for this_index.
1059
2a1ebfb2
CZ		 10602020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1061
1062 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1063 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1064 (md_operand): Set X_md to absent.
1065 (arc_parse_name): Check for X_md.
1066
16d87673
SB		 10672020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1068
1069 PR 25311
1070 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1071 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1072 NO_STRING_ESCAPES.
1073 * read.c (next_char_of_string): Likewise.
1074 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1075 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1076
a2322019
NC		 10772020-01-03 Nick Clifton <nickc@redhat.com>
1078
1079 * po/sv.po: Updated Swedish translation.
1080
5437a02a
JB		 10812020-01-03 Jan Beulich <jbeulich@suse.com>
1082
1083 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1084 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1085
567dfba2
JB		 10862020-01-03 Jan Beulich <jbeulich@suse.com>
1087
1088 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1089 by-element usdot. Add 64-bit form tests for by-element sudot.
1090 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1091
8c45011a
JB		 10922020-01-03 Jan Beulich <jbeulich@suse.com>
1093
1094 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1095 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1096
f4950f76
JB		 10972020-01-03 Jan Beulich <jbeulich@suse.com>
1098
1099 * testsuite/gas/aarch64/f64mm.d,
1100 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1101
6655dba2
SB		 11022020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1103
1104 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1105 support for assembler code generated by SDCC. Add new relocation
1106 types. Add z80-elf target support.
1107 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1108 labels. Local labels starts from ".L".
1109 * NEWS: Mention the new support.
1110 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1111 * testsuite/gas/all/fwdexp.s: Likewise.
1112 * testsuite/gas/all/cond.l: Likewise.
1113 * testsuite/gas/all/cond.s: Likewise.
1114 * testsuite/gas/all/fwdexp.d: Likewise.
1115 * testsuite/gas/all/fwdexp.s: Likewise.
1116 * testsuite/gas/elf/section2.e-mips: Likewise.
1117 * testsuite/gas/elf/section2.l: Likewise.
1118 * testsuite/gas/elf/section2.s: Likewise.
1119 * testsuite/gas/macros/app1.d: Likewise.
1120 * testsuite/gas/macros/app1.s: Likewise.
1121 * testsuite/gas/macros/app2.d: Likewise.
1122 * testsuite/gas/macros/app2.s: Likewise.
1123 * testsuite/gas/macros/app3.d: Likewise.
1124 * testsuite/gas/macros/app3.s: Likewise.
1125 * testsuite/gas/macros/app4.d: Likewise.
1126 * testsuite/gas/macros/app4.s: Likewise.
1127 * testsuite/gas/macros/app4b.s: Likewise.
1128 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1129 * testsuite/gas/z80/z80.exp: Add new tests
1130 * testsuite/gas/z80/dollar.d: New file.
1131 * testsuite/gas/z80/dollar.s: New file.
1132 * testsuite/gas/z80/ez80_adl_all.d: New file.
1133 * testsuite/gas/z80/ez80_adl_all.s: New file.
1134 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1135 * testsuite/gas/z80/ez80_isuf.s: New file.
1136 * testsuite/gas/z80/ez80_z80_all.d: New file.
1137 * testsuite/gas/z80/ez80_z80_all.s: New file.
1138 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1139 * testsuite/gas/z80/r800_extra.d: New file.
1140 * testsuite/gas/z80/r800_extra.s: New file.
1141 * testsuite/gas/z80/r800_ii8.d: New file.
1142 * testsuite/gas/z80/r800_z80_doc.d: New file.
1143 * testsuite/gas/z80/z180.d: New file.
1144 * testsuite/gas/z80/z180.s: New file.
1145 * testsuite/gas/z80/z180_z80_doc.d: New file.
1146 * testsuite/gas/z80/z80_doc.d: New file.
1147 * testsuite/gas/z80/z80_doc.s: New file.
1148 * testsuite/gas/z80/z80_ii8.d: New file.
1149 * testsuite/gas/z80/z80_ii8.s: New file.
1150 * testsuite/gas/z80/z80_in_f_c.d: New file.
1151 * testsuite/gas/z80/z80_in_f_c.s: New file.
1152 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1153 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1154 * testsuite/gas/z80/z80_out_c_0.d: New file.
1155 * testsuite/gas/z80/z80_out_c_0.s: New file.
1156 * testsuite/gas/z80/z80_reloc.d: New file.
1157 * testsuite/gas/z80/z80_reloc.s: New file.
1158 * testsuite/gas/z80/z80_sli.d: New file.
1159 * testsuite/gas/z80/z80_sli.s: New file.
1160
a65b5de6
SN		 11612020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1162
1163 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1164 REGLIST_RN.
1165
b14ce8bf
AM		 11662020-01-01 Alan Modra <amodra@gmail.com>
1167
1168 Update year range in copyright notice of all files.
1169
0b114740 1170For older changes see ChangeLog-2019
3499769a 1171\f
0b114740 1172Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1173
1174Copying and distribution of this file, with or without modification,
1175are permitted in any medium without royalty provided the copyright
1176notice and this notice are preserved.
1177
1178Local Variables:
1179mode: change-log
1180left-margin: 8
1181fill-column: 74
1182version-control: never
1183End:
GDB Binutils - Deliverables
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