* config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
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12013-12-18 Nick Clifton <nickc@redhat.com>
2
3 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
4 order to avoid conflict with same named variable in MinGW system
5 header file.
6
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NC
72013-12-13 Nick Clifton <nickc@redhat.com>
8
9 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
10 (OPTION_INTR_NOPS): Define.
11 (gen_interrupt_nops): Default to FALSE.
12 (md_parse_opton): Add support for OPTION_INTR_NOPS.
13 (md_longopts): Add -mn.
14 (md_show_usage): Add -mn.
15 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
16 * doc/c-msp430.c: Document -mn.
17
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KLC
182013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
19 Wei-Cheng Wang <cole945@gmail.com>
20 Hsiang-Kai Wang <hsiangkai@gmail.com>
21 Hui-Wen Ni <sabrinanitw@gmail.com>
22
23 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
24 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
25 * Makefile.in: Regenerate.
26 * configure.in (nds32): Add nds32 target extension config support.
27 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
28 * configure: Regenerate.
29 * config/tc-nds32.c: New file for nds32.
30 * config/tc-nds32.h: New file for nds32.
31 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
32 * doc/Makefile.in: Regenerate.
33 * doc/as.texinfo: Add nds32 options.
34 * doc/all.texi: Set NDS32.
35 * doc/c-nds32.texi: New file dor nds32 document.
36 * NEWS: Announce Andes nds32 support.
37
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382013-12-10 Roland McGrath <mcgrathr@google.com>
39
40 * Makefile.am (install-exec-bindir): Prefix libtool invocation
41 with $(INSTALL_PROGRAM_ENV).
42 (install-exec-tooldir): Likewise.
43 * Makefile.in: Regenerate.
44
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MF
452013-12-07 Mike Frysinger <vapier@gentoo.org>
46
47 * config/bfin-aux.h: Remove +x file mode.
48 * config/tc-epiphany.c: Likewise.
49 * config/tc-epiphany.h: Likewise.
50
c2a5914e
TG
512013-12-03 Tristan Gingold <gingold@adacore.com>
52
53 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
54 overflow on pointers.
55
9a73e520
YZ
562013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
57
58 Revert
59
60 2013-11-19 Nick Clifton <nickc@redhat.com>
61
62 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
63 for deprecated system registers when parsing pstate fields.
64
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652013-11-19 Nick Clifton <nickc@redhat.com>
66
67 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
68 for deprecated system registers when parsing pstate fields.
69
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CM
702013-11-19 Catherine Moore <clm@codesourcery.com>
71
72 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
73 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
74 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
75 (INSN_DMULT): Define.
76 (INSN_DMULTU): Define.
77 (insns_between): Detect PMC RM7000 errata.
78 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
79 OPTION_NO_FIX_PMC_RM7000.
80 * doc/as.texinfo: Document new options.
81 * doc/c-mips.texi: Likewise.
03e621be 82
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832013-11-19 Alexey Makhalov <makhaloff@gmail.com>
84
85 PR gas/16109
86 * app.c (do_scrub_chars): Only insert a newline character if
87 end-of-file has been reached.
88
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L
892013-11-18 H.J. Lu <hongjiu.lu@intel.com>
90
91 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
92 argument.
93
c9fb6e58
YZ
942013-11-18 Renlin Li <Renlin.Li@arm.com>
95
96 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
97 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
98 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
99 (cpu_arch_ver): Likewise.
100 * doc/c-arm.texi: Document armv7ve.
101
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YZ
1022013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
103
104 * config/tc-aarch64.c (parse_sys_reg): Support
105 S2_<op1>_<Cn>_<Cm>_<op2>.
106
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YZ
1072013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
108
109 Revert
110
111 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
112
113 * config/tc-aarch64.c (set_other_error): New function.
114 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
115 the variable to which it points with 'o'.
116 (parse_operands): Update; check for write to read-only system
117 registers or read from write-only ones.
118
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1192013-11-17 H.J. Lu <hongjiu.lu@intel.com>
120
121 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
122 indicate if instruction has the BND prefix. Return
123 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
124 bnd_prefix isn't zero.
125 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
126 if needed.
127 (output_jump): Update reloc call.
128 (output_interseg_jump): Likewise.
129 (output_disp): Likewise.
130 (output_imm): Likewise.
131 (x86_cons_fix_new): Likewise.
132 (lex_got): Add an argument, bnd_prefix, to indicate if
133 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
134 if needed.
135 (x86_cons): Update lex_got call.
136 (i386_immediate): Likewise.
137 (i386_displacement): Likewise.
138 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
139 BFD_RELOC_X86_64_PLT32_BND.
140 (tc_gen_reloc): Likewise.
141 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
142
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1432013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
144
145 * config/tc-aarch64.c (set_other_error): New function.
146 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
147 the variable to which it points with 'o'.
148 (parse_operands): Update; check for write to read-only system
149 registers or read from write-only ones.
150
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1512013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
152
153 * config/tc-i386.c (check_VecOperands): Reorder checks.
154
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CM
1552013-11-11 Catherine Moore <clm@codesourcery.com>
156
157 * config/mips/tc-mips.c (convert_reg_type): Use
158 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
159 (reg_needs_delay): Likewise.
160 (insns_between): Likewise.
161
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JBG
1622013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
163
164 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
165
49eec193
YZ
1662013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
167
168 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
169 call aarch64_sys_reg_deprecated_p and warn about the deprecated
170 system registers.
171
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YZ
1722013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
173
174 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
175
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WN
1762013-11-05 Will Newton <will.newton@linaro.org>
177
178 PR gas/16103
179 * config/tc-aarch64.c (parse_operands): Avoid trying to
180 parse a vector register as an immediate.
181
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JB
1822013-11-04 Jan Beulich <jbeulich@suse.com>
183
184 * config/tc-i386.c (check_long_reg): Correct comment indentation.
185 (check_qword_reg): Correct comment and its indentation.
186 (check_word_reg): Extend comment and correct its indentation. Also
187 check for 64-bit register.
188
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AM
1892013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
190
191 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
192 (ppc_elf_localentry): New function.
193 (ppc_force_relocation): Force relocs on all branches to localenty
194 symbols.
195 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
196
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AM
1972013-10-30 Alan Modra <amodra@gmail.com>
198
199 * config/tc-ppc.c: Include elf/ppc64.h.
200 (ppc_abiversion): New variable.
201 (md_pseudo_table): Add .abiversion.
202 (ppc_elf_abiversion, ppc_elf_end): New functions.
203 * config/tc-ppc.h (md_end): Define.
204
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AM
2052013-10-30 Alan Modra <amodra@gmail.com>
206
207 * config/tc-ppc.c (SEX16): Don't mask.
208 (REPORT_OVERFLOW_HI): Define as zero.
209 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
210 @tprel@high, and @tprel@higha modifiers.
211 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
212 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
213 Handle new relocs.
214 (md_apply_fix): Similarly.
215
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CF
2162013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
217
218 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
219 (fpr_write_mask): Test MSA registers.
220 (can_swap_branch_p): Check fpr write followed by fpr read.
221
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2222013-10-18 Nick Clifton <nickc@redhat.com>
223
224 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
225
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CF
2262013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
227 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
228
229 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
230 (md_longopts): Add mmsa and mno-msa.
231 (mips_ases): Add msa.
232 (RTYPE_MASK): Update.
233 (RTYPE_MSA): New define.
234 (OT_REG_ELEMENT): Replace with...
235 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
236 (mips_operand_token): Replace reg_element with index.
237 (mips_parse_argument_token): Treat vector indices as separate tokens.
238 Handle register indices.
239 (md_begin): Add MSA register names.
240 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
241 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
242 (match_mdmx_imm_reg_operand): Update accordingly.
243 (match_imm_index_operand): New function.
244 (match_reg_index_operand): New function.
245 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
246 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
247 (md_show_usage): Print -mmsa and -mno-msa.
248 * doc/as.texinfo: Document -mmsa and -mno-msa.
249 * doc/c-mips.texi: Document -mmsa and -mno-msa.
250 Document .set msa and .set nomsa.
251
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2522013-10-14 Nick Clifton <nickc@redhat.com>
253
254 * read.c (add_include_dir): Use xrealloc.
255 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
256 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
257
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2582013-10-13 Sandra Loosemore <sandra@codesourcery.com>
259
260 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
261 also test/refer to "sstatus". Reformat the warning message.
262
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2632013-10-10 Sean Keys <skeys@ipdatasys.com>
264
265 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
266
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2672013-10-10 Jan Beulich <jbeulich@suse.com>
268
269 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
270 swapping for bndmk, bndldx, and bndstx.
271
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NC
2722013-10-09 Nick Clifton <nickc@redhat.com>
273
b7b2bb1d
NC
274 PR gas/16025
275 * config/tc-epiphany.c (md_convert_frag): Add missing break
276 statement.
277
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NC
278 PR gas/16026
279 * config/tc-mn10200.c (md_convert_frag): Add missing break
280 statement.
281
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2822013-10-08 Jan Beulich <jbeulich@suse.com>
283
284 * tc-i386.c (check_word_reg): Remove misplaced "else".
285 (check_long_reg): Restore symmetry with check_word_reg.
286
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2872013-10-08 Jan Beulich <jbeulich@suse.com>
288
289 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
290 LR/PC check.
291
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2922013-10-08 Nick Clifton <nickc@redhat.com>
293
294 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
295 for "<foo>a". Issue error messages for unrecognised or corrrupt
296 size extensions.
297
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2982013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
299
300 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
301 possible.
302
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SE
3032013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
304
305 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
306 * doc/c-i386.texi: Add -march=bdver4 option.
307
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AM
3082013-09-20 Alan Modra <amodra@gmail.com>
309
310 * configure: Regenerate.
311
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3122013-09-18 Tristan Gingold <gingold@adacore.com>
313
314 * NEWS: Add marker for 2.24.
315
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3162013-09-18 Nick Clifton <nickc@redhat.com>
317
318 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
319 (move_data): New variable.
320 (md_parse_option): Parse -md.
321 (msp430_section): New function. Catch references to the .bss or
322 .data sections and generate a special symbol for use by the libcrt
323 library.
324 (md_pseudo_table): Intercept .section directives.
325 (md_longopt): Add -md
326 (md_show_usage): Likewise.
327 (msp430_operands): Generate a warning message if a NOP is inserted
328 into the instruction stream.
329 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
330
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SE
3312013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
332
333 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 334 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 335
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3362013-09-16 Will Newton <will.newton@linaro.org>
337
338 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
339 disallowing element size 64 with interleave other than 1.
340
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CF
3412013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
342
343 * config/tc-mips.c (match_insn): Set error when $31 is used for
344 bltzal* and bgezal*.
345
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TG
3462013-09-04 Tristan Gingold <gingold@adacore.com>
347
348 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
349 symbols.
350
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NC
3512013-09-04 Roland McGrath <mcgrathr@google.com>
352
353 PR gas/15914
354 * config/tc-arm.c (T16_32_TAB): Add _udf.
355 (do_t_udf): New function.
356 (insns): Add "udf".
357
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3582013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
359
360 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
361 assembler errors at correct position.
362
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NC
3632013-08-23 Yuri Chornoivan <yurchor@ukr.net>
364
365 PR binutils/15834
366 * config/tc-ia64.c: Fix typos.
367 * config/tc-sparc.c: Likewise.
368 * config/tc-z80.c: Likewise.
369 * doc/c-i386.texi: Likewise.
370 * doc/c-m32r.texi: Likewise.
371
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3722013-08-23 Will Newton <will.newton@linaro.org>
373
9aff4b7a 374 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
375 for pre-indexed addressing modes.
376
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3772013-08-21 Alan Modra <amodra@gmail.com>
378
379 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
380 range check label number for use with fb_low_counter array.
381
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3822013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
383
384 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
385 (mips_parse_argument_token, validate_micromips_insn, md_begin)
386 (check_regno, match_float_constant, check_completed_insn, append_insn)
387 (match_insn, match_mips16_insn, match_insns, macro_start)
388 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
389 (mips16_ip, mips_set_option_string, md_parse_option)
390 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
391 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
392 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
393 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
394 Start error messages with a lower-case letter. Do not end error
395 messages with a period. Wrap long messages to 80 character-lines.
396 Use "cannot" instead of "can't" and "can not".
397
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3982013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
399
400 * config/tc-mips.c (imm_expr): Expand comment.
401 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
402 when populated.
403
e423441d
RS
4042013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
405
406 * config/tc-mips.c (imm2_expr): Delete.
407 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
408
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RS
4092013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
410
411 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
412 (macro): Remove M_DEXT and M_DINS handling.
413
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RS
4142013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
415
416 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
417 lax_max with lax_match.
418 (match_int_operand): Update accordingly. Don't report an error
419 for !lax_match-only cases.
420 (match_insn): Replace more_alts with lax_match and use it to
421 initialize the mips_arg_info field. Add a complete_p parameter.
422 Handle implicit VU0 suffixes here.
423 (match_invalid_for_isa, match_insns, match_mips16_insns): New
424 functions.
425 (mips_ip, mips16_ip): Use them.
426
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4272013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
428
429 * config/tc-mips.c (match_expression): Report uses of registers here.
430 Add a "must be an immediate expression" error. Handle elided offsets
431 here rather than...
432 (match_int_operand): ...here.
433
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RS
4342013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
435
436 * config/tc-mips.c (mips_arg_info): Remove soft_match.
437 (match_out_of_range, match_not_constant): New functions.
438 (match_const_int): Remove fallback parameter and check for soft_match.
439 Use match_not_constant.
440 (match_mapped_int_operand, match_addiusp_operand)
441 (match_perf_reg_operand, match_save_restore_list_operand)
442 (match_mdmx_imm_reg_operand): Update accordingly. Use
443 match_out_of_range and set_insn_error* instead of as_bad.
444 (match_int_operand): Likewise. Use match_not_constant in the
445 !allows_nonconst case.
446 (match_float_constant): Report invalid float constants.
447 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
448 match_float_constant to check for invalid constants. Fail the
449 match if match_const_int or match_float_constant return false.
450 (mips_ip): Update accordingly.
451 (mips16_ip): Likewise. Undo null termination of instruction name
452 once lookup is complete.
453
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RS
4542013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
455
456 * config/tc-mips.c (mips_insn_error_format): New enum.
457 (mips_insn_error): New struct.
458 (insn_error): Change to a mips_insn_error.
459 (clear_insn_error, set_insn_error_format, set_insn_error)
460 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
461 functions.
462 (mips_parse_argument_token, md_assemble, match_insn)
463 (match_mips16_insn): Use them instead of manipulating insn_error
464 directly.
465 (mips_ip, mips16_ip): Likewise. Simplify control flow.
466
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RS
4672013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
468
469 * config/tc-mips.c (normalize_constant_expr): Move further up file.
470 (normalize_address_expr): Likewise.
471 (match_insn, match_mips16_insn): New functions, split out from...
472 (mips_ip, mips16_ip): ...here.
473
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RS
4742013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
475
476 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
477 OP_OPTIONAL_REG.
478 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
479 for optional operands.
480
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AM
4812013-08-16 Alan Modra <amodra@gmail.com>
482
483 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
484 modifiers generally.
485
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4862013-08-16 Alan Modra <amodra@gmail.com>
487
488 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
489
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4902013-08-14 David Edelsohn <dje.gcc@gmail.com>
491
492 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
493 argument as alignment.
494
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4952013-08-09 Nick Clifton <nickc@redhat.com>
496
497 * config/tc-rl78.c (elf_flags): New variable.
498 (enum options): Add OPTION_G10.
499 (md_longopts): Add mg10.
500 (md_parse_option): Parse -mg10.
501 (rl78_elf_final_processing): New function.
502 * config/tc-rl78.c (tc_final_processing): Define.
503 * doc/c-rl78.texi: Document -mg10 option.
504
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5052013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
506
507 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
508 suffixes to be elided too.
509 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
510 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
511 to be omitted too.
512
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5132013-08-05 John Tytgat <john@bass-software.com>
514
515 * po/POTFILES.in: Regenerate.
516
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EB
5172013-08-05 Eric Botcazou <ebotcazou@adacore.com>
518 Konrad Eisele <konrad@gaisler.com>
519
520 * config/tc-sparc.c (sparc_arch_types): Add leon.
521 (sparc_arch): Move sparc4 around and add leon.
522 (sparc_target_format): Document -Aleon.
523 * doc/c-sparc.texi: Likewise.
524
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5252013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
526
527 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
528
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5292013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
530 Richard Sandiford <rdsandiford@googlemail.com>
531
532 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
533 (RWARN): Bump to 0x8000000.
534 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
535 (RTYPE_R5900_ACC): New register types.
536 (RTYPE_MASK): Include them.
537 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
538 macros.
539 (reg_names): Include them.
540 (mips_parse_register_1): New function, split out from...
541 (mips_parse_register): ...here. Add a channels_ptr parameter.
542 Look for VU0 channel suffixes when nonnull.
543 (reg_lookup): Update the call to mips_parse_register.
544 (mips_parse_vu0_channels): New function.
545 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
546 (mips_operand_token): Add a "channels" field to the union.
547 Extend the comment above "ch" to OT_DOUBLE_CHAR.
548 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
549 (mips_parse_argument_token): Handle channel suffixes here too.
550 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
551 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
552 Handle '#' formats.
553 (md_begin): Register $vfN and $vfI registers.
554 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
555 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
556 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
557 (match_vu0_suffix_operand): New function.
558 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
559 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
560 (mips_lookup_insn): New function.
561 (mips_ip): Use it. Allow "+K" operands to be elided at the end
562 of an instruction. Handle '#' sequences.
563
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5642013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
565
566 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
567 values and use it instead of sreg, treg, xreg, etc.
568
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5692013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
572 and mips_int_operand_max.
573 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
574 Delete.
575 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
576 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
577 instead of mips16_immed_operand.
578
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5792013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
580
581 * config/tc-mips.c (mips16_macro): Don't use move_register.
582 (mips16_ip): Allow macros to use 'p'.
583
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5842013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
585
586 * config/tc-mips.c (MAX_OPERANDS): New macro.
587 (mips_operand_array): New structure.
588 (mips_operands, mips16_operands, micromips_operands): New arrays.
589 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
590 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
591 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
592 (micromips_to_32_reg_q_map): Delete.
593 (insn_operands, insn_opno, insn_extract_operand): New functions.
594 (validate_mips_insn): Take a mips_operand_array as argument and
595 use it to build up a list of operands. Extend to handle INSN_MACRO
596 and MIPS16.
597 (validate_mips16_insn): New function.
598 (validate_micromips_insn): Take a mips_operand_array as argument.
599 Handle INSN_MACRO.
600 (md_begin): Initialize mips_operands, mips16_operands and
601 micromips_operands. Call validate_mips_insn and
602 validate_micromips_insn for macro instructions too.
603 Call validate_mips16_insn for MIPS16 instructions.
604 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
605 New functions.
606 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
607 them. Handle INSN_UDI.
608 (get_append_method): Use gpr_read_mask.
609
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6102013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
611
612 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
613 flags for MIPS16 and non-MIPS16 instructions.
614 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
615 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
616 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
617 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
618 and non-MIPS16 instructions. Fix formatting.
619
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6202013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
621
622 * config/tc-mips.c (reg_needs_delay): Move later in file.
623 Use gpr_write_mask.
624 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
625
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6262013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
627 Alexander Ivchenko <alexander.ivchenko@intel.com>
628 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
629 Sergey Lega <sergey.s.lega@intel.com>
630 Anna Tikhonova <anna.tikhonova@intel.com>
631 Ilya Tocar <ilya.tocar@intel.com>
632 Andrey Turetskiy <andrey.turetskiy@intel.com>
633 Ilya Verbin <ilya.verbin@intel.com>
634 Kirill Yukhin <kirill.yukhin@intel.com>
635 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
636
637 * config/tc-i386-intel.c (O_zmmword_ptr): New.
638 (i386_types): Add zmmword.
639 (i386_intel_simplify_register): Allow regzmm.
640 (i386_intel_simplify): Handle zmmwords.
641 (i386_intel_operand): Handle RC/SAE, vector operations and
642 zmmwords.
643 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
644 (struct RC_Operation): New.
645 (struct Mask_Operation): New.
646 (struct Broadcast_Operation): New.
647 (vex_prefix): Size of bytes increased to 4 to support EVEX
648 encoding.
649 (enum i386_error): Add new error codes: unsupported_broadcast,
650 broadcast_not_on_src_operand, broadcast_needed,
651 unsupported_masking, mask_not_on_destination, no_default_mask,
652 unsupported_rc_sae, rc_sae_operand_not_last_imm,
653 invalid_register_operand, try_vector_disp8.
654 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
655 rounding, broadcast, memshift.
656 (struct RC_name): New.
657 (RC_NamesTable): New.
658 (evexlig): New.
659 (evexwig): New.
660 (extra_symbol_chars): Add '{'.
661 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
662 (i386_operand_type): Add regzmm, regmask and vec_disp8.
663 (match_mem_size): Handle zmmwords.
664 (operand_type_match): Handle zmm-registers.
665 (mode_from_disp_size): Handle vec_disp8.
666 (fits_in_vec_disp8): New.
667 (md_begin): Handle {} properly.
668 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
669 (build_vex_prefix): Handle vrex.
670 (build_evex_prefix): New.
671 (process_immext): Adjust to properly handle EVEX.
672 (md_assemble): Add EVEX encoding support.
673 (swap_2_operands): Correctly handle operands with masking,
674 broadcasting or RC/SAE.
675 (check_VecOperands): Support EVEX features.
676 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
677 (match_template): Support regzmm and handle new error codes.
678 (process_suffix): Handle zmmwords and zmm-registers.
679 (check_byte_reg): Extend to zmm-registers.
680 (process_operands): Extend to zmm-registers.
681 (build_modrm_byte): Handle EVEX.
682 (output_insn): Adjust to properly handle EVEX case.
683 (disp_size): Handle vec_disp8.
684 (output_disp): Support compressed disp8*N evex feature.
685 (output_imm): Handle RC/SAE immediates properly.
686 (check_VecOperations): New.
687 (i386_immediate): Handle EVEX features.
688 (i386_index_check): Handle zmmwords and zmm-registers.
689 (RC_SAE_immediate): New.
690 (i386_att_operand): Handle EVEX features.
691 (parse_real_register): Add a check for ZMM/Mask registers.
692 (OPTION_MEVEXLIG): New.
693 (OPTION_MEVEXWIG): New.
694 (md_longopts): Add mevexlig and mevexwig.
695 (md_parse_option): Handle mevexlig and mevexwig options.
696 (md_show_usage): Add description for mevexlig and mevexwig.
697 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
698 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
699
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7002013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
701
702 * config/tc-i386.c (cpu_arch): Add .sha.
703 * doc/c-i386.texi: Document sha/.sha.
704
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7052013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
706 Kirill Yukhin <kirill.yukhin@intel.com>
707 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
708
709 * config/tc-i386.c (BND_PREFIX): New.
710 (struct _i386_insn): Add new field bnd_prefix.
711 (add_bnd_prefix): New.
712 (cpu_arch): Add MPX.
713 (i386_operand_type): Add regbnd.
714 (md_assemble): Handle BND prefixes.
715 (parse_insn): Likewise.
716 (output_branch): Likewise.
717 (output_jump): Likewise.
718 (build_modrm_byte): Handle regbnd.
719 (OPTION_MADD_BND_PREFIX): New.
720 (md_longopts): Add entry for 'madd-bnd-prefix'.
721 (md_parse_option): Handle madd-bnd-prefix option.
722 (md_show_usage): Add description for madd-bnd-prefix
723 option.
724 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
725
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7262013-07-24 Tristan Gingold <gingold@adacore.com>
727
728 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
729 xcoff targets.
730
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7312013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
732
733 * config/tc-s390.c (s390_machine): Don't force the .machine
734 argument to lower case.
735
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KT
7362013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
737
738 * config/tc-arm.c (s_arm_arch_extension): Improve error message
739 for invalid extension.
740
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YZ
7412013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
742
743 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
744 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
745 (aarch64_abi): New variable.
746 (ilp32_p): Change to be a macro.
747 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
748 (struct aarch64_option_abi_value_table): New struct.
749 (aarch64_abis): New table.
750 (aarch64_parse_abi): New function.
751 (aarch64_long_opts): Add entry for -mabi=.
752 * doc/as.texinfo (Target AArch64 options): Document -mabi.
753 * doc/c-aarch64.texi: Likewise.
754
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7552013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
756
757 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
758 unsigned comparison.
759
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7602013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
761
cbe02d4f 762 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 763 RX610.
cbe02d4f 764 * config/rx-parse.y: (rx_check_float_support): Add function to
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765 check floating point operation support for target RX100 and
766 RX200.
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AM
767 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
768 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
769 RX200, RX600, and RX610
f0c00282 770
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7712013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
772
773 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
774
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7752013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
776
777 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
778 * doc/c-avr.texi: Likewise.
779
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7802013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
781
782 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
783 error with older GCCs.
784 (mips16_macro_build): Dereference args.
785
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7862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
787
788 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
789 New functions, split out from...
790 (reg_lookup): ...here. Remove itbl support.
791 (reglist_lookup): Delete.
792 (mips_operand_token_type): New enum.
793 (mips_operand_token): New structure.
794 (mips_operand_tokens): New variable.
795 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
796 (mips_parse_arguments): New functions.
797 (md_begin): Initialize mips_operand_tokens.
798 (mips_arg_info): Add a token field. Remove optional_reg field.
799 (match_char, match_expression): New functions.
800 (match_const_int): Use match_expression. Remove "s" argument
801 and return a boolean result. Remove O_register handling.
802 (match_regno, match_reg, match_reg_range): New functions.
803 (match_int_operand, match_mapped_int_operand, match_msb_operand)
804 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
805 (match_addiusp_operand, match_clo_clz_dest_operand)
806 (match_lwm_swm_list_operand, match_entry_exit_operand)
807 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
808 (match_tied_reg_operand): Remove "s" argument and return a boolean
809 result. Match tokens rather than text. Update calls to
810 match_const_int. Rely on match_regno to call check_regno.
811 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
812 "arg" argument. Return a boolean result.
813 (parse_float_constant): Replace with...
814 (match_float_constant): ...this new function.
815 (match_operand): Remove "s" argument and return a boolean result.
816 Update calls to subfunctions.
817 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
818 rather than string-parsing routines. Update handling of optional
819 registers for token scheme.
820
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8212013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
822
823 * config/tc-mips.c (parse_float_constant): Split out from...
824 (mips_ip): ...here.
825
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8262013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
827
828 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
829 Delete.
830
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8312013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
832
833 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
834 (match_entry_exit_operand): New function.
835 (match_save_restore_list_operand): Likewise.
836 (match_operand): Use them.
837 (check_absolute_expr): Delete.
838 (mips16_ip): Rewrite main parsing loop to use mips_operands.
839
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8402013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
841
842 * config/tc-mips.c: Enable functions commented out in previous patch.
843 (SKIP_SPACE_TABS): Move further up file.
844 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
845 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
846 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
847 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
848 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
849 (micromips_imm_b_map, micromips_imm_c_map): Delete.
850 (mips_lookup_reg_pair): Delete.
851 (macro): Use report_bad_range and report_bad_field.
852 (mips_immed, expr_const_in_range): Delete.
853 (mips_ip): Rewrite main parsing loop to use new functions.
854
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8552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
856
857 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
858 Change return type to bfd_boolean.
859 (report_bad_range, report_bad_field): New functions.
860 (mips_arg_info): New structure.
861 (match_const_int, convert_reg_type, check_regno, match_int_operand)
862 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
863 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
864 (match_addiusp_operand, match_clo_clz_dest_operand)
865 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
866 (match_pc_operand, match_tied_reg_operand, match_operand)
867 (check_completed_insn): New functions, commented out for now.
868
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8692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
870
871 * config/tc-mips.c (insn_insert_operand): New function.
872 (macro_build, mips16_macro_build): Put null character check
873 in the for loop and convert continues to breaks. Use operand
874 structures to handle constant operands.
875
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8762013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
877
878 * config/tc-mips.c (validate_mips_insn): Move further up file.
879 Add insn_bits and decode_operand arguments. Use the mips_operand
880 fields to work out which bits an operand occupies. Detect double
881 definitions.
882 (validate_micromips_insn): Move further up file. Call into
883 validate_mips_insn.
884
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8852013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
886
887 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
888
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8892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
890
891 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
892 and "~".
893 (macro): Update accordingly.
894
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8952013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
896
897 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
898 (imm_reloc): Delete.
899 (md_assemble): Remove imm_reloc handling.
900 (mips_ip): Update commentary. Use offset_expr and offset_reloc
901 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
902 Use a temporary array rather than imm_reloc when parsing
903 constant expressions. Remove imm_reloc initialization.
904 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
905 for the relaxable field. Use a relax_char variable to track the
906 type of this field. Remove imm_reloc initialization.
907
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9082013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
909
910 * config/tc-mips.c (mips16_ip): Handle "I".
911
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MR
9122013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
913
914 * config/tc-mips.c (mips_flag_nan2008): New variable.
915 (options): Add OPTION_NAN enum value.
916 (md_longopts): Handle it.
917 (md_parse_option): Likewise.
918 (s_nan): New function.
919 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
920 (md_show_usage): Add -mnan.
921
922 * doc/as.texinfo (Overview): Add -mnan.
923 * doc/c-mips.texi (MIPS Opts): Document -mnan.
924 (MIPS NaN Encodings): New node. Document .nan directive.
925 (MIPS-Dependent): List the new node.
926
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9272013-07-09 Tristan Gingold <gingold@adacore.com>
928
929 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
930
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RS
9312013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
932
933 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
934 for 'A' and assume that the constant has been elided if the result
935 is an O_register.
936
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9372013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
938
939 * config/tc-mips.c (gprel16_reloc_p): New function.
940 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
941 BFD_RELOC_UNUSED.
942 (offset_high_part, small_offset_p): New functions.
943 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
944 register load and store macros, handle the 16-bit offset case first.
945 If a 16-bit offset is not suitable for the instruction we're
946 generating, load it into the temporary register using
947 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
948 M_L_DAB code once the address has been constructed. For double load
949 and store macros, again handle the 16-bit offset case first.
950 If the second register cannot be accessed from the same high
951 part as the first, load it into AT using ADDRESS_ADDI_INSN.
952 Fix the handling of LD in cases where the first register is the
953 same as the base. Also handle the case where the offset is
954 not 16 bits and the second register cannot be accessed from the
955 same high part as the first. For unaligned loads and stores,
956 fuse the offbits == 12 and old "ab" handling. Apply this handling
957 whenever the second offset needs a different high part from the first.
958 Construct the offset using ADDRESS_ADDI_INSN where possible,
959 for offbits == 16 as well as offbits == 12. Use offset_reloc
960 when constructing the individual loads and stores.
961 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
962 and offset_reloc before matching against a particular opcode.
963 Handle elided 'A' constants. Allow 'A' constants to use
964 relocation operators.
965
5c324c16
RS
9662013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
967
968 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
969 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
970 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
971
23e69e47
RS
9722013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
973
974 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
975 Require the msb to be <= 31 for "+s". Check that the size is <= 31
976 for both "+s" and "+S".
977
27c5c572
RS
9782013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
979
980 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
981 (mips_ip, mips16_ip): Handle "+i".
982
e76ff5ab
RS
9832013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
984
985 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
986 (micromips_to_32_reg_h_map): Rename to...
987 (micromips_to_32_reg_h_map1): ...this.
988 (micromips_to_32_reg_i_map): Rename to...
989 (micromips_to_32_reg_h_map2): ...this.
990 (mips_lookup_reg_pair): New function.
991 (gpr_write_mask, macro): Adjust after above renaming.
992 (validate_micromips_insn): Remove "mi" handling.
993 (mips_ip): Likewise. Parse both registers in a pair for "mh".
994
fa7616a4
RS
9952013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
996
997 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
998 (mips_ip): Remove "+D" and "+T" handling.
999
fb798c50
AK
10002013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
1001
1002 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
1003 relocs.
1004
2c0a3565
MS
10052013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
1006
4aa2c5e2
MS
1007 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1008
10092013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
1010
2c0a3565
MS
1011 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1012 (aarch64_force_relocation): Likewise.
1013
f40da81b
AM
10142013-07-02 Alan Modra <amodra@gmail.com>
1015
1016 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1017
81566a9b
MR
10182013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1019
1020 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1021 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1022 Replace @sc{mips16} with literal `MIPS16'.
1023 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1024
a6bb11b2
YZ
10252013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1026
1027 * config/tc-aarch64.c (reloc_table): Replace
1028 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1029 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1030 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1031 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1032 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1033 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1034 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1035 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1036 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1037 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1038 (aarch64_force_relocation): Likewise.
1039
cec5225b
YZ
10402013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1041
1042 * config/tc-aarch64.c (ilp32_p): New static variable.
1043 (elf64_aarch64_target_format): Return the target according to the
1044 value of 'ilp32_p'.
1045 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1046 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1047 (aarch64_dwarf2_addr_size): New function.
1048 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1049 (DWARF2_ADDR_SIZE): New define.
1050
e335d9cb
RS
10512013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1052
1053 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1054
18870af7
RS
10552013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1056
1057 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1058
833794fc
MR
10592013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1060
1061 * config/tc-mips.c (mips_set_options): Add insn32 member.
1062 (mips_opts): Initialize it.
1063 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1064 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1065 (md_longopts): Add "minsn32" and "mno-insn32" options.
1066 (is_size_valid): Handle insn32 mode.
1067 (md_assemble): Pass instruction string down to macro.
1068 (brk_fmt): Add second dimension and insn32 mode initializers.
1069 (mfhl_fmt): Likewise.
1070 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1071 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1072 (macro_build_jalr, move_register): Handle insn32 mode.
1073 (macro_build_branch_rs): Likewise.
1074 (macro): Handle insn32 mode.
1075 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1076 (mips_ip): Handle insn32 mode.
1077 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1078 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1079 (mips_handle_align): Handle insn32 mode.
1080 (md_show_usage): Add -minsn32 and -mno-insn32.
1081
1082 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1083 -mno-insn32 options.
1084 (-minsn32, -mno-insn32): New options.
1085 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1086 options.
1087 (MIPS assembly options): New node. Document .set insn32 and
1088 .set noinsn32.
1089 (MIPS-Dependent): List the new node.
1090
d1706f38
NC
10912013-06-25 Nick Clifton <nickc@redhat.com>
1092
1093 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1094 the PC in indirect addressing on 430xv2 parts.
1095 (msp430_operands): Add version test to hardware bug encoding
1096 restrictions.
1097
477330fc
RM
10982013-06-24 Roland McGrath <mcgrathr@google.com>
1099
d996d970
RM
1100 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1101 so it skips whitespace before it.
1102 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1103
477330fc
RM
1104 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1105 (arm_reg_parse_multi): Skip whitespace first.
1106 (parse_reg_list): Likewise.
1107 (parse_vfp_reg_list): Likewise.
1108 (s_arm_unwind_save_mmxwcg): Likewise.
1109
24382199
NC
11102013-06-24 Nick Clifton <nickc@redhat.com>
1111
1112 PR gas/15623
1113 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1114
c3678916
RS
11152013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1116
1117 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1118
42429eac
RS
11192013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1120
1121 * config/tc-mips.c: Assert that offsetT and valueT are at least
1122 8 bytes in size.
1123 (GPR_SMIN, GPR_SMAX): New macros.
1124 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1125
f3ded42a
RS
11262013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1127
1128 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1129 conditions. Remove any code deselected by them.
1130 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1131
e8044f35
RS
11322013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1133
1134 * NEWS: Note removal of ECOFF support.
1135 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1136 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1137 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1138 * Makefile.in: Regenerate.
1139 * configure.in: Remove MIPS ECOFF references.
1140 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1141 Delete cases.
1142 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1143 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1144 (mips-*-*): ...this single case.
1145 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1146 MIPS emulations to be e-mipself*.
1147 * configure: Regenerate.
1148 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1149 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1150 (mips-*-sysv*): Remove coff and ecoff cases.
1151 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1152 * ecoff.c: Remove reference to MIPS ECOFF.
1153 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1154 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1155 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1156 (mips_hi_fixup): Tweak comment.
1157 (append_insn): Require a howto.
1158 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1159
98508b2a
RS
11602013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1161
1162 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1163 Use "CPU" instead of "cpu".
1164 * doc/c-mips.texi: Likewise.
1165 (MIPS Opts): Rename to MIPS Options.
1166 (MIPS option stack): Rename to MIPS Option Stack.
1167 (MIPS ASE instruction generation overrides): Rename to
1168 MIPS ASE Instruction Generation Overrides (for now).
1169 (MIPS floating-point): Rename to MIPS Floating-Point.
1170
fc16f8cc
RS
11712013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1172
1173 * doc/c-mips.texi (MIPS Macros): New section.
1174 (MIPS Object): Replace with...
1175 (MIPS Small Data): ...this new section.
1176
5a7560b5
RS
11772013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1178
1179 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1180 Capitalize name. Use @kindex instead of @cindex for .set entries.
1181
a1b86ab7
RS
11822013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1183
1184 * doc/c-mips.texi (MIPS Stabs): Remove section.
1185
c6278170
RS
11862013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1187
1188 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1189 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1190 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1191 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1192 (mips_ase): New structure.
1193 (mips_ases): New table.
1194 (FP64_ASES): New macro.
1195 (mips_ase_groups): New array.
1196 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1197 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1198 functions.
1199 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1200 (md_parse_option): Use mips_ases and mips_set_ase instead of
1201 separate case statements for each ASE option.
1202 (mips_after_parse_args): Use FP64_ASES. Use
1203 mips_check_isa_supports_ases to check the ASEs against
1204 other options.
1205 (s_mipsset): Use mips_ases and mips_set_ase instead of
1206 separate if statements for each ASE option. Use
1207 mips_check_isa_supports_ases, even when a non-ASE option
1208 is specified.
1209
63a4bc21
KT
12102013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1211
1212 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1213
c31f3936
RS
12142013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1215
1216 * config/tc-mips.c (md_shortopts, options, md_longopts)
1217 (md_longopts_size): Move earlier in file.
1218
846ef2d0
RS
12192013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1220
1221 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1222 with a single "ase" bitmask.
1223 (mips_opts): Update accordingly.
1224 (file_ase, file_ase_explicit): New variables.
1225 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1226 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1227 (ISA_HAS_ROR): Adjust for mips_set_options change.
1228 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1229 (mips_ip): Adjust for mips_set_options change.
1230 (md_parse_option): Likewise. Update file_ase_explicit.
1231 (mips_after_parse_args): Adjust for mips_set_options change.
1232 Use bitmask operations to select the default ASEs. Set file_ase
1233 rather than individual per-ASE variables.
1234 (s_mipsset): Adjust for mips_set_options change.
1235 (mips_elf_final_processing): Test file_ase rather than
1236 file_ase_mdmx. Remove commented-out code.
1237
d16afab6
RS
12382013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1239
1240 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1241 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1242 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1243 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1244 (mips_after_parse_args): Use the new "ase" field to choose
1245 the default ASEs.
1246 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1247 "ase" field.
1248
e83a675f
RE
12492013-06-18 Richard Earnshaw <rearnsha@arm.com>
1250
1251 * config/tc-arm.c (symbol_preemptible): New function.
1252 (relax_branch): Use it.
1253
7f3c4072
CM
12542013-06-17 Catherine Moore <clm@codesourcery.com>
1255 Maciej W. Rozycki <macro@codesourcery.com>
1256 Chao-Ying Fu <fu@mips.com>
1257
1258 * config/tc-mips.c (mips_set_options): Add ase_eva.
1259 (mips_set_options mips_opts): Add ase_eva.
1260 (file_ase_eva): Declare.
1261 (ISA_SUPPORTS_EVA_ASE): Define.
1262 (IS_SEXT_9BIT_NUM): Define.
1263 (MIPS_CPU_ASE_EVA): Define.
1264 (is_opcode_valid): Add support for ase_eva.
1265 (macro_build): Likewise.
1266 (macro): Likewise.
1267 (validate_mips_insn): Likewise.
1268 (validate_micromips_insn): Likewise.
1269 (mips_ip): Likewise.
1270 (options): Add OPTION_EVA and OPTION_NO_EVA.
1271 (md_longopts): Add -meva and -mno-eva.
1272 (md_parse_option): Process new options.
1273 (mips_after_parse_args): Check for valid EVA combinations.
1274 (s_mipsset): Likewise.
1275
e410add4
RS
12762013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1277
1278 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1279 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1280 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1281 (dwarf2_gen_line_info_1): Update call accordingly.
1282 (dwarf2_move_insn): New function.
1283 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1284
6a50d470
RS
12852013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1286
1287 Revert:
1288
1289 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1290
1291 PR gas/13024
1292 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1293 (dwarf2_gen_line_info_1): Delete.
1294 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1295 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1296 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1297 (dwarf2_directive_loc): Push previous .locs instead of generating
1298 them immediately.
1299
f122319e
CF
13002013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1301
1302 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1303 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1304
909c7f9c
NC
13052013-06-13 Nick Clifton <nickc@redhat.com>
1306
1307 PR gas/15602
1308 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1309 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1310 function. Generates an error if the adjusted offset is out of a
1311 16-bit range.
1312
5d5755a7
SL
13132013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1314
1315 * config/tc-nios2.c (md_apply_fix): Mask constant
1316 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1317
3bf0dbfb
MR
13182013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1319
1320 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1321 MIPS-3D instructions either.
1322 (md_convert_frag): Update the COPx branch mask accordingly.
1323
1324 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1325 option.
1326 * doc/as.texinfo (Overview): Add --relax-branch and
1327 --no-relax-branch.
1328 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1329 --no-relax-branch.
1330
9daf7bab
SL
13312013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1332
1333 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1334 omitted.
1335
d301a56b
RS
13362013-06-08 Catherine Moore <clm@codesourcery.com>
1337
1338 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1339 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1340 (append_insn): Change INSN_xxxx to ASE_xxxx.
1341
7bab7634
DC
13422013-06-01 George Thomas <george.thomas@atmel.com>
1343
cbe02d4f 1344 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1345 AVR_ISA_XMEGAU
1346
f60cf82f
L
13472013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1348
1349 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1350 for ELF.
1351
a3f278e2
CM
13522013-05-31 Paul Brook <paul@codesourcery.com>
1353
a3f278e2
CM
1354 * config/tc-mips.c (s_ehword): New.
1355
067ec077
CM
13562013-05-30 Paul Brook <paul@codesourcery.com>
1357
1358 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1359
d6101ac2
MR
13602013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1361
1362 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1363 convert relocs who have no relocatable field either. Rephrase
1364 the conditional so that the PC-relative check is only applied
1365 for REL targets.
1366
f19ccbda
MR
13672013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1368
1369 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1370 calculation.
1371
418009c2
YZ
13722013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1373
1374 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1375 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1376 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1377 (md_apply_fix): Likewise.
1378 (aarch64_force_relocation): Likewise.
1379
0a8897c7
KT
13802013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1381
1382 * config/tc-arm.c (it_fsm_post_encode): Improve
1383 warning messages about deprecated IT block formats.
1384
89d2a2a3
MS
13852013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1386
1387 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1388 inside fx_done condition.
1389
c77c0862
RS
13902013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1391
1392 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1393
c0637f3a
PB
13942013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1395
1396 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1397 and clean up warning when using PRINT_OPCODE_TABLE.
1398
5656a981
AM
13992013-05-20 Alan Modra <amodra@gmail.com>
1400
1401 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1402 and data fixups performing shift/high adjust/sign extension on
1403 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1404 when writing data fixups rather than recalculating size.
1405
997b26e8
JBG
14062013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1407
1408 * doc/c-msp430.texi: Fix typo.
1409
9f6e76f4
TG
14102013-05-16 Tristan Gingold <gingold@adacore.com>
1411
1412 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1413 are also TOC symbols.
1414
638d3803
NC
14152013-05-16 Nick Clifton <nickc@redhat.com>
1416
1417 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1418 Add -mcpu command to specify core type.
997b26e8 1419 * doc/c-msp430.texi: Update documentation.
638d3803 1420
b015e599
AP
14212013-05-09 Andrew Pinski <apinski@cavium.com>
1422
1423 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1424 (mips_opts): Update for the new field.
1425 (file_ase_virt): New variable.
1426 (ISA_SUPPORTS_VIRT_ASE): New macro.
1427 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1428 (MIPS_CPU_ASE_VIRT): New define.
1429 (is_opcode_valid): Handle ase_virt.
1430 (macro_build): Handle "+J".
1431 (validate_mips_insn): Likewise.
1432 (mips_ip): Likewise.
1433 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1434 (md_longopts): Add mvirt and mnovirt
1435 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1436 (mips_after_parse_args): Handle ase_virt field.
1437 (s_mipsset): Handle "virt" and "novirt".
1438 (mips_elf_final_processing): Add a comment about virt ASE might need
1439 a new flag.
1440 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1441 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1442 Document ".set virt" and ".set novirt".
1443
da8094d7
AM
14442013-05-09 Alan Modra <amodra@gmail.com>
1445
1446 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1447 control of operand flag bits.
1448
c5f8c205
AM
14492013-05-07 Alan Modra <amodra@gmail.com>
1450
1451 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1452 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1453 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1454 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1455 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1456 Shift and sign-extend fieldval for use by some VLE reloc
1457 operand->insert functions.
1458
b47468a6
CM
14592013-05-06 Paul Brook <paul@codesourcery.com>
1460 Catherine Moore <clm@codesourcery.com>
1461
c5f8c205
AM
1462 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1463 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1464 (md_apply_fix): Likewise.
1465 (tc_gen_reloc): Likewise.
1466
2de39019
CM
14672013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1468
1469 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1470 (mips_fix_adjustable): Adjust pc-relative check to use
1471 limited_pc_reloc_p.
1472
754e2bb9
RS
14732013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1474
1475 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1476 (s_mips_stab): Do not restrict to stabn only.
1477
13761a11
NC
14782013-05-02 Nick Clifton <nickc@redhat.com>
1479
1480 * config/tc-msp430.c: Add support for the MSP430X architecture.
1481 Add code to insert a NOP instruction after any instruction that
1482 might change the interrupt state.
1483 Add support for the LARGE memory model.
1484 Add code to initialise the .MSP430.attributes section.
1485 * config/tc-msp430.h: Add support for the MSP430X architecture.
1486 * doc/c-msp430.texi: Document the new -mL and -mN command line
1487 options.
1488 * NEWS: Mention support for the MSP430X architecture.
1489
df26367c
MR
14902013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1491
1492 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1493 alpha*-*-linux*ecoff*.
1494
f02d8318
CF
14952013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1496
1497 * config/tc-mips.c (mips_ip): Add sizelo.
1498 For "+C", "+G", and "+H", set sizelo and compare against it.
1499
b40bf0a2
NC
15002013-04-29 Nick Clifton <nickc@redhat.com>
1501
1502 * as.c (Options): Add -gdwarf-sections.
1503 (parse_args): Likewise.
1504 * as.h (flag_dwarf_sections): Declare.
1505 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1506 (process_entries): When -gdwarf-sections is enabled generate
1507 fragmentary .debug_line sections.
1508 (out_debug_line): Set the section for the .debug_line section end
1509 symbol.
1510 * doc/as.texinfo: Document -gdwarf-sections.
1511 * NEWS: Mention -gdwarf-sections.
1512
8eeccb77 15132013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1514
1515 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1516 according to the target parameter. Don't call s_segm since s_segm
1517 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1518 initialized yet.
1519 (md_begin): Call s_segm according to target parameter from command
1520 line.
1521
49926cd0
AM
15222013-04-25 Alan Modra <amodra@gmail.com>
1523
1524 * configure.in: Allow little-endian linux.
1525 * configure: Regenerate.
1526
e3031850
SL
15272013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1528
1529 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1530 "fstatus" control register to "eccinj".
1531
cb948fc0
KT
15322013-04-19 Kai Tietz <ktietz@redhat.com>
1533
1534 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1535
4455e9ad
JB
15362013-04-15 Julian Brown <julian@codesourcery.com>
1537
1538 * expr.c (add_to_result, subtract_from_result): Make global.
1539 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1540 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1541 subtract_from_result to handle extra bit of precision for .sleb128
1542 directive operands.
1543
956a6ba3
JB
15442013-04-10 Julian Brown <julian@codesourcery.com>
1545
1546 * read.c (convert_to_bignum): Add sign parameter. Use it
1547 instead of X_unsigned to determine sign of resulting bignum.
1548 (emit_expr): Pass extra argument to convert_to_bignum.
1549 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1550 X_extrabit to convert_to_bignum.
1551 (parse_bitfield_cons): Set X_extrabit.
1552 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1553 Initialise X_extrabit field as appropriate.
1554 (add_to_result): New.
1555 (subtract_from_result): New.
1556 (expr): Use above.
1557 * expr.h (expressionS): Add X_extrabit field.
1558
eb9f3f00
JB
15592013-04-10 Jan Beulich <jbeulich@suse.com>
1560
1561 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1562 register being PC when is_t or writeback, and use distinct
1563 diagnostic for the latter case.
1564
ccb84d65
JB
15652013-04-10 Jan Beulich <jbeulich@suse.com>
1566
1567 * gas/config/tc-arm.c (parse_operands): Re-write
1568 po_barrier_or_imm().
1569 (do_barrier): Remove bogus constraint().
1570 (do_t_barrier): Remove.
1571
4d13caa0
NC
15722013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1573
1574 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1575 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1576 ATmega2564RFR2
1577 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1578
16d02dc9
JB
15792013-04-09 Jan Beulich <jbeulich@suse.com>
1580
1581 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1582 Use local variable Rt in more places.
1583 (do_vmsr): Accept all control registers.
1584
05ac0ffb
JB
15852013-04-09 Jan Beulich <jbeulich@suse.com>
1586
1587 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1588 if there was none specified for moves between scalar and core
1589 register.
1590
2d51fb74
JB
15912013-04-09 Jan Beulich <jbeulich@suse.com>
1592
1593 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1594 NEON_ALL_LANES case.
1595
94dcf8bf
JB
15962013-04-08 Jan Beulich <jbeulich@suse.com>
1597
1598 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1599 PC-relative VSTR.
1600
1472d06f
JB
16012013-04-08 Jan Beulich <jbeulich@suse.com>
1602
1603 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1604 entry to sp_fiq.
1605
0c76cae8
AM
16062013-04-03 Alan Modra <amodra@gmail.com>
1607
1608 * doc/as.texinfo: Add support to generate man options for h8300.
1609 * doc/c-h8300.texi: Likewise.
1610
92eb40d9
RR
16112013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1612
1613 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1614 Cortex-A57.
1615
51dcdd4d
NC
16162013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1617
1618 PR binutils/15068
1619 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1620
c5d685bf
NC
16212013-03-26 Nick Clifton <nickc@redhat.com>
1622
9b978282
NC
1623 PR gas/15295
1624 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1625 start of the file each time.
1626
c5d685bf
NC
1627 PR gas/15178
1628 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1629 FreeBSD targets.
1630
9699c833
TG
16312013-03-26 Douglas B Rupp <rupp@gnat.com>
1632
1633 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1634 after fixup.
1635
4755303e
WN
16362013-03-21 Will Newton <will.newton@linaro.org>
1637
1638 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1639 pc-relative str instructions in Thumb mode.
1640
81f5558e
NC
16412013-03-21 Michael Schewe <michael.schewe@gmx.net>
1642
1643 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1644 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1645 R_H8_DISP32A16.
1646 * config/tc-h8300.h: Remove duplicated defines.
1647
71863e73
NC
16482013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1649
1650 PR gas/15282
1651 * tc-avr.c (mcu_has_3_byte_pc): New function.
1652 (tc_cfi_frame_initial_instructions): Call it to find return
1653 address size.
1654
795b8e6b
NC
16552013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1656
1657 PR gas/15095
1658 * config/tc-tic6x.c (tic6x_try_encode): Handle
1659 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1660 encode register pair numbers when required.
1661
ba86b375
WN
16622013-03-15 Will Newton <will.newton@linaro.org>
1663
1664 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1665 in vstr in Thumb mode for pre-ARMv7 cores.
1666
9e6f3811
AS
16672013-03-14 Andreas Schwab <schwab@suse.de>
1668
1669 * doc/c-arc.texi (ARC Directives): Revert last change and use
1670 @itemize instead of @table.
1671 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1672
b10bf8c5
NC
16732013-03-14 Nick Clifton <nickc@redhat.com>
1674
1675 PR gas/15273
1676 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1677 NULL message, instead just check ARM_CPU_IS_ANY directly.
1678
ba724cfc
NC
16792013-03-14 Nick Clifton <nickc@redhat.com>
1680
1681 PR gas/15212
9e6f3811 1682 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1683 for table format.
1684 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1685 to the @item directives.
1686 (ARM-Neon-Alignment): Move to correct place in the document.
1687 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1688 formatting.
1689 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1690 @smallexample.
1691
531a94fd
SL
16922013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1693
1694 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1695 case. Add default BAD_CASE to switch.
1696
dad60f8e
SL
16972013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1698
1699 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1700 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1701
dd5181d5
KT
17022013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1703
1704 * config/tc-arm.c (crc_ext_armv8): New feature set.
1705 (UNPRED_REG): New macro.
1706 (do_crc32_1): New function.
1707 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1708 do_crc32ch, do_crc32cw): Likewise.
1709 (TUEc): New macro.
1710 (insns): Add entries for crc32 mnemonics.
1711 (arm_extensions): Add entry for crc.
1712
8e723a10
CLT
17132013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1714
1715 * write.h (struct fix): Add fx_dot_frag field.
1716 (dot_frag): Declare.
1717 * write.c (dot_frag): New variable.
1718 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1719 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1720 * expr.c (expr): Save value of frag_now in dot_frag when setting
1721 dot_value.
1722 * read.c (emit_expr): Likewise. Delete comments.
1723
be05d201
L
17242013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1725
1726 * config/tc-i386.c (flag_code_names): Removed.
1727 (i386_index_check): Rewrote.
1728
62b0d0d5
YZ
17292013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1730
1731 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1732 add comment.
1733 (aarch64_double_precision_fmovable): New function.
1734 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1735 function; handle hexadecimal representation of IEEE754 encoding.
1736 (parse_operands): Update the call to parse_aarch64_imm_float.
1737
165de32a
L
17382013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1739
1740 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1741 (check_hle): Updated.
1742 (md_assemble): Likewise.
1743 (parse_insn): Likewise.
1744
d5de92cf
L
17452013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1746
1747 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1748 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1749 (parse_insn): Remove expecting_string_instruction. Set
1750 i.rep_prefix.
1751
e60bb1dd
YZ
17522013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1753
1754 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1755
aeebdd9b
YZ
17562013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1757
1758 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1759 for system registers.
1760
4107ae22
DD
17612013-02-27 DJ Delorie <dj@redhat.com>
1762
1763 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1764 (rl78_op): Handle %code().
1765 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1766 (tc_gen_reloc): Likwise; convert to a computed reloc.
1767 (md_apply_fix): Likewise.
1768
151fa98f
NC
17692013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1770
1771 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1772
70a8bc5b 17732013-02-25 Terry Guo <terry.guo@arm.com>
1774
1775 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1776 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1777 list of accepted CPUs.
1778
5c111e37
L
17792013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1780
1781 PR gas/15159
1782 * config/tc-i386.c (cpu_arch): Add ".smap".
1783
1784 * doc/c-i386.texi: Document smap.
1785
8a75745d
MR
17862013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1787
1788 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1789 mips_assembling_insn appropriately.
1790 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1791
79850f26
MR
17922013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1793
cf29fc61 1794 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1795 extraneous braces.
1796
4c261dff
NC
17972013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1798
5c111e37 1799 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1800
ea33f281
NC
18012013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1802
1803 * configure.tgt: Add nios2-*-rtems*.
1804
a1ccaec9
YZ
18052013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1806
1807 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1808 NULL.
1809
0aa27725
RS
18102013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1811
1812 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1813 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1814
da4339ed
NC
18152013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1816
1817 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1818 core.
1819
36591ba1 18202013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1821 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1822
1823 Based on patches from Altera Corporation.
1824
1825 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1826 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1827 * Makefile.in: Regenerated.
1828 * configure.tgt: Add case for nios2*-linux*.
1829 * config/obj-elf.c: Conditionally include elf/nios2.h.
1830 * config/tc-nios2.c: New file.
1831 * config/tc-nios2.h: New file.
1832 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1833 * doc/Makefile.in: Regenerated.
1834 * doc/all.texi: Set NIOSII.
1835 * doc/as.texinfo (Overview): Add Nios II options.
1836 (Machine Dependencies): Include c-nios2.texi.
1837 * doc/c-nios2.texi: New file.
1838 * NEWS: Note Altera Nios II support.
1839
94d4433a
AM
18402013-02-06 Alan Modra <amodra@gmail.com>
1841
1842 PR gas/14255
1843 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1844 Don't skip fixups with fx_subsy non-NULL.
1845 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1846 with fx_subsy non-NULL.
1847
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18482013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1849
1850 * doc/c-metag.texi: Add "@c man" markers.
1851
89d67ed9
AM
18522013-02-04 Alan Modra <amodra@gmail.com>
1853
1854 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1855 related code.
1856 (TC_ADJUST_RELOC_COUNT): Delete.
1857 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1858
89072bd6
AM
18592013-02-04 Alan Modra <amodra@gmail.com>
1860
1861 * po/POTFILES.in: Regenerate.
1862
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NC
18632013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1864
1865 * config/tc-metag.c: Make SWAP instruction less permissive with
1866 its operands.
1867
392ca752
DD
18682013-01-29 DJ Delorie <dj@redhat.com>
1869
1870 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1871 relocs in .word/.etc statements.
1872
427d0db6
RM
18732013-01-29 Roland McGrath <mcgrathr@google.com>
1874
1875 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1876 immediate value for 8-bit offset" error so it shows line info.
1877
4faf939a
JM
18782013-01-24 Joseph Myers <joseph@codesourcery.com>
1879
1880 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1881 for 64-bit output.
1882
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18832013-01-24 Nick Clifton <nickc@redhat.com>
1884
1885 * config/tc-v850.c: Add support for e3v5 architecture.
1886 * doc/c-v850.texi: Mention new support.
1887
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NC
18882013-01-23 Nick Clifton <nickc@redhat.com>
1889
1890 PR gas/15039
1891 * config/tc-avr.c: Include dwarf2dbg.h.
1892
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L
18932013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1894
1895 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1896 (tc_i386_fix_adjustable): Likewise.
1897 (lex_got): Likewise.
1898 (tc_gen_reloc): Likewise.
1899
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19002013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1901
1902 * config/tc-aarch64.c (output_operand_error_record): Change to output
1903 the out-of-range error message as value-expected message if there is
1904 only one single value in the expected range.
1905 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1906 LSL #0 as a programmer-friendly feature.
1907
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L
19082013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1909
1910 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1911 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1912 BFD_RELOC_64_SIZE relocations.
1913 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1914 for it.
1915 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1916 relocations against local symbols.
1917
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AM
19182013-01-16 Alan Modra <amodra@gmail.com>
1919
1920 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1921 finding some sort of toc syntax error, and break to avoid
1922 compiler uninit warning.
1923
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L
19242013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1925
1926 PR gas/15019
1927 * config/tc-i386.c (lex_got): Increment length by 1 if the
1928 relocation token is removed.
1929
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NC
19302013-01-15 Nick Clifton <nickc@redhat.com>
1931
1932 * config/tc-v850.c (md_assemble): Allow signed values for
1933 V850E_IMMEDIATE.
1934
464e3686
SK
19352013-01-11 Sean Keys <skeys@ipdatasys.com>
1936
1937 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1938 git to cvs.
464e3686 1939
5817ffd1
PB
19402013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1941
1942 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1943 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1944 * config/tc-ppc.c (md_show_usage): Likewise.
1945 (ppc_handle_align): Handle power8's group ending nop.
1946
f4b1f6a9
SK
19472013-01-10 Sean Keys <skeys@ipdatasys.com>
1948
1949 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1950 that the assember exits after the opcodes have been printed.
f4b1f6a9 1951
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L
19522013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1953
1954 * app.c: Remove trailing white spaces.
1955 * as.c: Likewise.
1956 * as.h: Likewise.
1957 * cond.c: Likewise.
1958 * dw2gencfi.c: Likewise.
1959 * dwarf2dbg.h: Likewise.
1960 * ecoff.c: Likewise.
1961 * input-file.c: Likewise.
1962 * itbl-lex.h: Likewise.
1963 * output-file.c: Likewise.
1964 * read.c: Likewise.
1965 * sb.c: Likewise.
1966 * subsegs.c: Likewise.
1967 * symbols.c: Likewise.
1968 * write.c: Likewise.
1969 * config/tc-i386.c: Likewise.
1970 * doc/Makefile.am: Likewise.
1971 * doc/Makefile.in: Likewise.
1972 * doc/c-aarch64.texi: Likewise.
1973 * doc/c-alpha.texi: Likewise.
1974 * doc/c-arc.texi: Likewise.
1975 * doc/c-arm.texi: Likewise.
1976 * doc/c-avr.texi: Likewise.
1977 * doc/c-bfin.texi: Likewise.
1978 * doc/c-cr16.texi: Likewise.
1979 * doc/c-d10v.texi: Likewise.
1980 * doc/c-d30v.texi: Likewise.
1981 * doc/c-h8300.texi: Likewise.
1982 * doc/c-hppa.texi: Likewise.
1983 * doc/c-i370.texi: Likewise.
1984 * doc/c-i386.texi: Likewise.
1985 * doc/c-i860.texi: Likewise.
1986 * doc/c-m32c.texi: Likewise.
1987 * doc/c-m32r.texi: Likewise.
1988 * doc/c-m68hc11.texi: Likewise.
1989 * doc/c-m68k.texi: Likewise.
1990 * doc/c-microblaze.texi: Likewise.
1991 * doc/c-mips.texi: Likewise.
1992 * doc/c-msp430.texi: Likewise.
1993 * doc/c-mt.texi: Likewise.
1994 * doc/c-s390.texi: Likewise.
1995 * doc/c-score.texi: Likewise.
1996 * doc/c-sh.texi: Likewise.
1997 * doc/c-sh64.texi: Likewise.
1998 * doc/c-tic54x.texi: Likewise.
1999 * doc/c-tic6x.texi: Likewise.
2000 * doc/c-v850.texi: Likewise.
2001 * doc/c-xc16x.texi: Likewise.
2002 * doc/c-xgate.texi: Likewise.
2003 * doc/c-xtensa.texi: Likewise.
2004 * doc/c-z80.texi: Likewise.
2005 * doc/internals.texi: Likewise.
2006
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RM
20072013-01-10 Roland McGrath <mcgrathr@google.com>
2008
2009 * hash.c (hash_new_sized): Make it global.
2010 * hash.h: Declare it.
2011 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2012 pass a small size.
2013
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NC
20142013-01-10 Will Newton <will.newton@imgtec.com>
2015
2016 * Makefile.am: Add Meta.
2017 * Makefile.in: Regenerate.
2018 * config/tc-metag.c: New file.
2019 * config/tc-metag.h: New file.
2020 * configure.tgt: Add Meta.
2021 * doc/Makefile.am: Add Meta.
2022 * doc/Makefile.in: Regenerate.
2023 * doc/all.texi: Add Meta.
2024 * doc/as.texiinfo: Document Meta options.
2025 * doc/c-metag.texi: New file.
2026
b37df7c4
SE
20272013-01-09 Steve Ellcey <sellcey@mips.com>
2028
2029 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2030 calls.
2031 * config/tc-mips.c (internalError): Remove, replace with abort.
2032
a3251895
YZ
20332013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2034
2035 * config/tc-aarch64.c (parse_operands): Change to compare the result
2036 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2037
8ab8155f
NC
20382013-01-07 Nick Clifton <nickc@redhat.com>
2039
2040 PR gas/14887
2041 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2042 anticipated character.
2043 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2044 here as it is no longer needed.
2045
a4ac1c42
AS
20462013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2047
2048 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2049 * doc/c-score.texi (SCORE-Opts): Likewise.
2050 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2051
e407c74b
NC
20522013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2053
2054 * config/tc-mips.c: Add support for MIPS r5900.
2055 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2056 lq and sq.
2057 (can_swap_branch_p, get_append_method): Detect some conditional
2058 short loops to fix a bug on the r5900 by NOP in the branch delay
2059 slot.
2060 (M_MUL): Support 3 operands in multu on r5900.
2061 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2062 (s_mipsset): Force 32 bit floating point on r5900.
2063 (mips_ip): Check parameter range of instructions mfps and mtps on
2064 r5900.
2065 * configure.in: Detect CPU type when target string contains r5900
2066 (e.g. mips64r5900el-linux-gnu).
2067
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L
20682013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2069
2070 * as.c (parse_args): Update copyright year to 2013.
2071
95830fd1
YZ
20722013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2073
2074 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2075 and "cortex57".
2076
517bb291 20772013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 2078
517bb291
NC
2079 PR gas/14987
2080 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2081 closing bracket.
d709e4e6 2082
517bb291 2083For older changes see ChangeLog-2012
08d56133 2084\f
517bb291 2085Copyright (C) 2013 Free Software Foundation, Inc.
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2086
2087Copying and distribution of this file, with or without modification,
2088are permitted in any medium without royalty provided the copyright
2089notice and this notice are preserved.
2090
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2091Local Variables:
2092mode: change-log
2093left-margin: 8
2094fill-column: 74
2095version-control: never
2096End:
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