Fix the test for PR 18963 so that it will work on 16-bit targets.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
c54a9b56
DF
12020-02-16 David Faust <david.faust@oracle.com>
2
3 * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
4 * testsuite/gas/bpf/jump32.s: New file.
5 * testsuite/gas/bpf/jump32.d: Likewise.
6
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72020-04-08 H.J. Lu <hongjiu.lu@intel.com>
8
9 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
10 documentation.
11
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122020-04-08 Gunther Nikl <gnikl@justmail.de>
13
14 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
15 (md_pcrel_from): Remove prototytpe.
d9f19885
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16 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
17 define.
18 (md_pcrel_from_section): Remove duplicate prototype.
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19 * tc.h (md_pcrel_from_section): Add prototype.
20 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
21 * config/tc-arc.h (md_pcrel_from_section): Likewise.
22 * config/tc-arm.h (md_pcrel_from_section): Likewise.
23 * config/tc-avr.h (md_pcrel_from_section): Likewise.
24 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
25 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
26 * config/tc-csky.h (md_pcrel_from_section): Likewise.
27 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
28 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
29 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
30 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
31 * config/tc-frv.h (md_pcrel_from_section): Likewise.
32 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
33 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
34 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
35 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
36 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
37 * config/tc-mep.h (md_pcrel_from_section): Likewise.
38 * config/tc-metag.h (md_pcrel_from_section): Likewise.
39 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
40 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
41 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
42 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
43 * config/tc-mt.h (md_pcrel_from_section): Likewise.
44 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
45 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
46 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
47 * config/tc-rx.h (md_pcrel_from_section): Likewise.
48 * config/tc-s390.h (md_pcrel_from_section): Likewise.
49 * config/tc-sh.h (md_pcrel_from_section): Likewise.
50 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
51 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
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52 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
53 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
54 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
55 md_apply_fix3): Delete prototypes.
6a3ab923 56
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572020-04-07 H.J. Lu <hongjiu.lu@intel.com>
58
59 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
60 instructions.
61
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622020-04-07 H.J. Lu <hongjiu.lu@intel.com>
63
64 * doc/c-z80.texi: Fix @xref warnings.
65
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662020-04-07 Lili Cui <lili.cui@intel.com>
67
68 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
69 (cpu_noarch): Likewise.
70 * doc/c-i386.texi: Document TSXLDTRK.
71 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
72 * testsuite/gas/i386/tsxldtrk.d: Likewise.
73 * testsuite/gas/i386/tsxldtrk.s: Likewise.
74 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
75
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762020-04-02 Lili Cui <lili.cui@intel.com>
77
78 * config/tc-i386.c (cpu_arch): Add .serialize.
79 (cpu_noarch): Likewise.
80 * doc/c-i386.texi: Document serialize.
81 * testsuite/gas/i386/i386.exp: Run serialize tests
82 * testsuite/gas/i386/serialize.d: Likewise.
83 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
84 * testsuite/gas/i386/serialize.s: Likewise.
85
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862020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
87
88 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
89 * testsuite/gas/elf/section12b.d: Likewise.
90 * testsuite/gas/elf/section16a.d: Likewise.
91 * testsuite/gas/elf/section16b.d: Likewise.
92
59e28a97
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932020-04-02 Gunther Nikl <gnikl@justmail.de>
94
95 * config/tc-m68k.c (m68k_ip): Fix range check for index register
96 with a suppressed address register.
97
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982020-04-01 H.J. Lu <hongjiu.lu@intel.com>
99
100 PR gas/25756
101 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
102 * testsuite/gas/i386/localpic.s: Add a test for relocation
103 against local absolute symbol.
104 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
105 * testsuite/gas/i386/localpic.d: Updated.
106 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
107 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
108
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1092020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
110
111 PR gas/25732
112 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
113 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
114 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
115 testsuite/gas/i386/x86-64-jump.d.
116 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
117 Incorporate changes to
118 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
119 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
120 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
121 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
122 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
123
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1242020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
125
126 PR 25611
127 PR 25614
128 * dwarf2dbg.c: Do not include "bignum.h".
129
d1a89da5
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1302020-03-30 Nelson Chu <nelson.chu@sifive.com>
131
132 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
133 * testsuite/gas/riscv/alias-csr.s: Likewise.
134 * testsuite/gas/riscv/no-aliases-csr.d: Move this
135 to priv-reg-pseudo-noalias.
136 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
137 * testsuite/gas/riscv/bad-csr.l: Likewise.
138 * testsuite/gas/riscv/bad-csr.s: Likewise.
139 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
140 * testsuite/gas/riscv/satp.s: Likewise.
141 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
142 csr instruction, including alias-csr testcase.
143 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
144 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
145 pseudo instruction with objdump -Mno-aliases.
146 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
147 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
148 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
149 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
150 * testsuite/gas/riscv/priv-reg.s: Likewise.
151 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
152 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
153 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
154
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1552020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
156
157 * config/obj-coff.c (obj_coff_section): Set the bss flag on
158 sections with the "b" attribute.
159
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AM
1602020-03-22 Alan Modra <amodra@gmail.com>
161
162 * testsuite/gas/s12z/truncated.d: Update expected output.
163
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1642020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
165
166 PR 25690
167 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
168 * doc/c-z80.texi: Update documentation.
169
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1702020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
171
172 PR 25641
173 PR 25668
174 PR 25633
175 Fix disassembling ED+A4/AC/B4/BC opcodes.
176 Fix assembling lines containing colonless label and instruction
177 with first operand inside parentheses.
178 Fix registration of unsupported by target CPU registers.
179 * config/tc-z80.c: See above.
180 * config/tc-z80.h: See above.
181 * testsuite/gas/z80/colonless.d: Update test.
182 * testsuite/gas/z80/colonless.s: Likewise.
183 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
184 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
185 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
186 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
187 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
188 * testsuite/gas/z80/unsup_regs.s: Likewise.
189 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
190 * testsuite/gas/z80/z80.exp: Likewise.
191 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
192 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
193 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
194
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AV
1952020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
196
197 PR 25660
198 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
199 (parse_operands): Handle new operand codes.
200 (do_neon_dyadic_long): Make shape check accept the scalar variants.
201 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
202 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
203 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
204 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
205 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
206 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
207 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
208
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2092020-03-11 H.J. Lu <hongjiu.lu@intel.com>
210
211 * NEWS: Mention x86 assembler options for CVE-2020-0551.
212
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2132020-03-11 H.J. Lu <hongjiu.lu@intel.com>
214
215 * testsuite/gas/i386/i386.exp: Run new tests.
216 * testsuite/gas/i386/lfence-byte.d: New file.
217 * testsuite/gas/i386/lfence-byte.e: Likewise.
218 * testsuite/gas/i386/lfence-byte.s: Likewise.
219 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
220 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
221 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
222 * testsuite/gas/i386/lfence-indbr.e: Likewise.
223 * testsuite/gas/i386/lfence-indbr.s: Likewise.
224 * testsuite/gas/i386/lfence-load.d: Likewise.
225 * testsuite/gas/i386/lfence-load.s: Likewise.
226 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
227 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
228 * testsuite/gas/i386/lfence-ret.s: Likewise.
229 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
230 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
231 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
232 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
233 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
234 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
235 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
236 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
237 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
238 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
239 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
240 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
241
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2422020-03-11 H.J. Lu <hongjiu.lu@intel.com>
243
244 * config/tc-i386.c (lfence_after_load): New.
245 (lfence_before_indirect_branch_kind): New.
246 (lfence_before_indirect_branch): New.
247 (lfence_before_ret_kind): New.
248 (lfence_before_ret): New.
249 (last_insn): New.
250 (load_insn_p): New.
251 (insert_lfence_after): New.
252 (insert_lfence_before): New.
253 (md_assemble): Call insert_lfence_before and insert_lfence_after.
254 Set last_insn.
255 (OPTION_MLFENCE_AFTER_LOAD): New.
256 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
257 (OPTION_MLFENCE_BEFORE_RET): New.
258 (md_longopts): Add -mlfence-after-load=,
259 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
260 (md_parse_option): Handle -mlfence-after-load=,
261 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
262 (md_show_usage): Display -mlfence-after-load=,
263 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
264 (i386_cons_align): New.
265 * config/tc-i386.h (i386_cons_align): New.
266 (md_cons_align): New.
267 * doc/c-i386.texi: Document -mlfence-after-load=,
268 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
269
5496f3c6
NC
2702020-03-11 Nick Clifton <nickc@redhat.com>
271
272 PR 25611
273 PR 25614
274 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
275 (DWARF2_FILE_SIZE_NAME): Default to -1.
276 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
277 whichever is higher.
278 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
279 (NUM_MD5_BYTES): Define.
280 (struct file entry): Add md5 field.
281 (get_filenum): Delete and replace with...
282 (get_basename): New function.
283 (get_directory_table_entry): New function.
284 (allocate_filenum): New function.
285 (allocate_filename_to_slot): New function.
286 (dwarf2_where): Use new functions.
287 (dwarf2_directive_filename): Add support for extended .file
288 pseudo-op.
289 (dwarf2_directive_loc): Allow the use of file number zero with
290 DWARF 5 or higher.
291 (out_file_list): Rename to...
292 (out_dir_and_file_list): Add DWARF 5 support.
293 (out_debug_line): Emit extra values into the section header for
294 DWARF 5.
295 (out_debug_str): Allow for file 0 to be used with DWARF 5.
296 * doc/as.texi (.file): Update the description of this pseudo-op.
297 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
298 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
299 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
300 * NEWS: Mention the new feature.
301
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AM
3022020-03-10 Alan Modra <amodra@gmail.com>
303
304 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
305 to avoid signed overflow.
306 * config/tc-mcore.c (md_assemble): Likewise.
307 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
308 * config/tc-nds32.c (SET_ADDEND): Likewise.
309 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
310
3fabc179
JB
3112020-03-09 Jan Beulich <jbeulich@suse.com>
312
313 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
314 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
315 testsuite/gas/i386/avx-intel.d: Adjust expectations.
316
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AM
3172020-03-07 Alan Modra <amodra@gmail.com>
318
319 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
320 first column.
321
84d9ab33
NC
3222020-03-06 Nick Clifton <nickc@redhat.com>
323
324 PR 25614
325 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
326 0 if the dwarf_level is 5 or more. Complain if a filename follows
327 a file 0.
328 * testsuite/gas/elf/dwarf-5-file0.s: New test.
329 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
330 * testsuite/gas/elf/elf.exp: Run the new test.
331
332 PR 25612
333 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
334 * doc/as.texi: Fix another typo.
335
31bf1864
NC
3362020-03-06 Nick Clifton <nickc@redhat.com>
337
338 PR 25612
339 * as.c (dwarf_level): Define.
340 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
341 (parse_args): Add support for the new options.
342 as.h (dwarf_level): Prototype.
343 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
344 value.
345 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
346 (DWARF2_LINE_VERSION): Remove definition.
347 * doc/as.texi: Document the new options.
348
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NC
3492020-03-06 Nick Clifton <nickc@redhat.com>
350
351 PR 25572
352 * as.c (main): Allow matching input and outputs when they are
353 not regular files.
354
bc49bfd8
JB
3552020-03-06 Jan Beulich <jbeulich@suse.com>
356
357 * config/tc-i386.c (match_mem_size): Generalize broadcast special
358 casing.
359 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
360 one of byte/word/dword/qword is set alongside a SIMD register in
361 a template's operand.
362
4873e243
JB
3632020-03-06 Jan Beulich <jbeulich@suse.com>
364
365 * config/tc-i386.c (match_template): Extend code in logic
366 rejecting certain suffixes in certain modes to also cover mask
367 register use and VecSIB. Drop special casing of broadcast. Skip
368 immediates in the check.
369
e365e234
JB
3702020-03-06 Jan Beulich <jbeulich@suse.com>
371
372 * config/tc-i386.c (match_template): Fold duplicate code in
373 logic rejecting certain suffixes in certain modes. Drop
374 pointless "else".
375
4ed21b58
JB
3762020-03-06 Jan Beulich <jbeulich@suse.com>
377
378 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
379 alongside !norex64 ones.
380 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
381 with both 32- and 64-bit GPR operands.
382 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
383 32- and 64-bit GPR operands.
384 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
385 testsuite/gas/i386/x86-64-avx512bw.d,
386 testsuite/gas/i386/x86-64-avx512f-intel.d,
387 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
388
643bb870
JB
3892020-03-06 Jan Beulich <jbeulich@suse.com>
390
391 * config/tc-i386.c (md_assemble): Drop use of rex64.
392 (process_suffix): For REX.W for 64-bit CRC32.
393
a23b33b3
JB
3942020-03-06 Jan Beulich <jbeulich@suse.com>
395
396 * config/tc-i386.c (i386_addressing_mode): For 32-bit
397 addressing for MPX insns without base/index.
398 * testsuite/gas/i386/mpx-16bit.s,
399 * testsuite/gas/i386/mpx-16bit.d: New.
400 * testsuite/gas/i386/i386.exp: Run new test.
401
a0497384
JB
4022020-03-06 Jan Beulich <jbeulich@suse.com>
403
404 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
405 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
406 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
407 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
408 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
409 as well as a BSWAP one.
410 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
411 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
412 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
413 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
414 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
415 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
416 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
417 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
418 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
419 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
420 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
421 testsuite/gas/i386/vmx.d: Adjust expectations.
422
b630c145
JB
4232020-03-06 Jan Beulich <jbeulich@suse.com>
424
425 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
426 from having their operands swapped.
427 * testsuite/gas/i386/waitpkg.s,
428 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
429 3-operand cases as well as testing of 16-bit code generation.
430 * testsuite/gas/i386/waitpkg.d,
431 testsuite/gas/i386/waitpkg-intel.d,
432 testsuite/gas/i386/x86-64-waitpkg.d,
433 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
434
de48783e
NC
4352020-03-04 Nelson Chu <nelson.chu@sifive.com>
436
dee35d02
NC
437 * config/tc-riscv.c (percent_op_utype): Support the modifier
438 %got_pcrel_hi.
439 * doc/c-riscv.texi: Add documentation.
440 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
441 modifier %got_pcrel_hi.
442 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
443 * testsuite/gas/riscv/relax-reloc.d: Likewise.
444 * testsuite/gas/riscv/relax-reloc.s: Likewise.
445
de48783e
NC
446 * doc/c-riscv.texi (relocation modifiers): Add documentation.
447 (RISC-V-Formats): Update the section name from "Instruction Formats"
448 to "RISC-V Instruction Formats".
449
749479c8
AO
4502020-03-04 Alexandre Oliva <oliva@adacore.com>
451
452 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
453 detected in a section which does not have at least 4 byte
454 alignment.
455 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
456 * testsuite/gas/arm/ldr-t.s: Likewise.
457 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
458 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
459 disassembly, ignoring any NOPs that may have been inserted because
460 of section alignment.
461 * testsuite/gas/arm/ldr-t.d: Likewise.
462
a847e322
JB
4632020-03-04 Jan Beulich <jbeulich@suse.com>
464
465 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
466 * doc/c-i386.texi: Mention sev_es.
467 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
468 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
469 expectations.
470 * testsuite/gas/i386/arch-13-znver1.d,
471 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
472
3cd7f3e3
L
4732020-03-03 H.J. Lu <hongjiu.lu@intel.com>
474
475 * config/tc-i386.c (match_template): Replace ignoresize and
476 defaultsize with mnemonicsize.
477 (process_suffix): Likewise.
478
b8ba1385
SB
4792020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
480
481 PR 25627
482 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
483 instruction LD IY,(HL).
484 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
485 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
486 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
487 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
488
10d97a0f
L
4892020-03-03 H.J. Lu <hongjiu.lu@intel.com>
490
491 PR gas/25622
492 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
493 x86-64-default-suffix-avx.
494 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
495 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
496 * testsuite/gas/i386/noreg64.d: Updated.
497 * testsuite/gas/i386/noreg64.l: Likewise.
498 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
499 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
500 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
501
8326546e
SB
5022020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
503
504 PR 25604
505 * config/tc-z80.c (contains_register): Prevent an illegal memory
506 access when checking an expression for a register name.
507
e3e896e6
AM
5082020-03-03 Alan Modra <amodra@gmail.com>
509
510 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
511 support.
512
a4dd6c97
AM
5132020-03-02 Alan Modra <amodra@gmail.com>
514
515 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
516 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
517 and .sbss sections.
518 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
519 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
520 (s3_s_score_lcomm): Likewise.
521 * config/tc-score7.c: Similarly.
522 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
523
dec7b24b
YS
5242020-02-28 YunQiang Su <syq@debian.org>
525
526 PR gas/25539
527 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
528 to handle multi-labels.
529 (has_label_name): New.
530
cceb53b8
MM
5312020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
532
533 * config/tc-arm.c (enum pred_instruction_type): Remove
534 NEUTRAL_IT_NO_VPT_INSN predication type.
535 (cxn_handle_predication): Modify to require condition suffixes.
536 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
537 * testsuite/gas/arm/cde-scalar.s: Update test.
538 * testsuite/gas/arm/cde-warnings.l: Update test.
539 * testsuite/gas/arm/cde-warnings.s: Update test.
540
da3ec71f
AM
5412020-02-26 Alan Modra <amodra@gmail.com>
542
543 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
544 N_() on empty string.
545
42135cad
AM
5462020-02-26 Alan Modra <amodra@gmail.com>
547
548 * read.c (read_a_source_file): Call strncpy with length one
549 less than size of original_case_string.
550
dc1e8a47
AM
5512020-02-26 Alan Modra <amodra@gmail.com>
552
553 * config/obj-elf.c: Indent labels correctly.
554 * config/obj-macho.c: Likewise.
555 * config/tc-aarch64.c: Likewise.
556 * config/tc-alpha.c: Likewise.
557 * config/tc-arm.c: Likewise.
558 * config/tc-cr16.c: Likewise.
559 * config/tc-crx.c: Likewise.
560 * config/tc-frv.c: Likewise.
561 * config/tc-i386-intel.c: Likewise.
562 * config/tc-i386.c: Likewise.
563 * config/tc-ia64.c: Likewise.
564 * config/tc-mn10200.c: Likewise.
565 * config/tc-mn10300.c: Likewise.
566 * config/tc-nds32.c: Likewise.
567 * config/tc-riscv.c: Likewise.
568 * config/tc-s12z.c: Likewise.
569 * config/tc-xtensa.c: Likewise.
570 * config/tc-z80.c: Likewise.
571 * read.c: Likewise.
572 * symbols.c: Likewise.
573 * write.c: Likewise.
574
bd0cf5a6
NC
5752020-02-20 Nelson Chu <nelson.chu@sifive.com>
576
54b2aec1
NC
577 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
578 we are assembling instruction with CSR. Call riscv_csr_read_only_check
579 after parsing all arguments.
580 (enum csr_insn_type): New enum is used to classify the CSR instruction.
581 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
582 are used to check if we write a read-only CSR by the CSR instruction.
583 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
584 all CSR for the read-only CSR checking.
585 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
586 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
587 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
588 all CSR instructions for the read-only CSR checking.
589 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
590 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
591
2ca89224
NC
592 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
593 (riscv_opts): Initialize it.
594 (reg_lookup_internal): Check the `riscv_opts.csr_check`
595 before doing the CSR checking.
596 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
597 (md_longopts): Add mcsr-check and mno-csr-check.
598 (md_parse_option): Handle new enum option values.
599 (s_riscv_option): Handle new long options.
600 * doc/c-riscv.texi: Add description for the new .option and assembler
601 options.
602 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
603 the CSR checking.
604 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
605
bd0cf5a6
NC
606 * config/tc-riscv.c (csr_extra_hash): New.
607 (enum riscv_csr_class): New enum. Used to decide
608 whether or not this CSR is legal in the current ISA string.
609 (struct riscv_csr_extra): New structure to hold all extra information
610 of CSR.
611 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
612 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
613 Call hash_reg_name to insert CSR address into reg_names_hash.
614 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
615 Decide whether the CSR is valid according to the csr_extra_hash.
616 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
617 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
618 not a boolean. This is same as riscv_init_csr_hash, so keep the
619 consistent usage.
620 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
621 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
622 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
623 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
624 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
625 f-ext CSR are not allowed.
626 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
627 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
628 source file is `priv-reg.s`, and the ISA is rv64if, so the
629 rv32-only CSR are not allowed.
630 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
631
10a95fcc
AM
6322020-02-21 Alan Modra <amodra@gmail.com>
633
634 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
635 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
636
dda2980f
AM
6372020-02-21 Alan Modra <amodra@gmail.com>
638
639 PR 25569
640 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
641 on section size adjustment, instead perform another write if
642 exec header size is larger than section size.
643
bd3380bc
NC
6442020-02-19 Nelson Chu <nelson.chu@sifive.com>
645
646 * doc/c-riscv.texi: Add the doc entries for -march-attr/
647 -mno-arch-attr command line options.
648
fa164239
JW
6492020-02-19 Nelson Chu <nelson.chu@sifive.com>
650
651 * testsuite/gas/riscv/c-add-addi.d: New testcase.
652 * testsuite/gas/riscv/c-add-addi.s: Likewise.
653
fcaaac0a
SB
6542020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
655
656 PR 25576
657 * config/tc-z80.c (md_parse_option): Do not use an underscore
658 prefix for local labels in SDCC compatability mode.
659 (z80_start_line_hook): Remove SDCC dollar label support.
660 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
661 * testsuite/gas/z80/sdcc.s: Likewise.
662
6632020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
664
665 PR 25517
666 * config/tc-z80.c: Add -march option.
667 * doc/as.texi: Update Z80 documentation.
668 * doc/c-z80.texi: Likewise.
669 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
670 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
671 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
672 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
673 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
674 * testsuite/gas/z80/gbz80_all.d: Likewise.
675 * testsuite/gas/z80/r800_extra.d: Likewise.
676 * testsuite/gas/z80/r800_ii8.d: Likewise.
677 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
678 * testsuite/gas/z80/sdcc.d: Likewise.
679 * testsuite/gas/z80/z180.d: Likewise.
680 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
681 * testsuite/gas/z80/z80_doc.d: Likewise.
682 * testsuite/gas/z80/z80_ii8.d: Likewise.
683 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
684 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
685 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
686 * testsuite/gas/z80/z80_sli.d: Likewise.
687 * testsuite/gas/z80/z80n_all.d: Likewise.
688 * testsuite/gas/z80/z80n_reloc.d: Likewise.
689
a7e12755
L
6902020-02-19 H.J. Lu <hongjiu.lu@intel.com>
691
692 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
693 with GNU_PROPERTY_X86_FEATURE_2_MMX.
694 * testsuite/gas/i386/i386.exp: Run property-3 and
695 x86-64-property-3.
696 * testsuite/gas/i386/property-3.d: New file.
697 * testsuite/gas/i386/property-3.s: Likewise.
698 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
699
272a84b1
L
7002020-02-17 H.J. Lu <hongjiu.lu@intel.com>
701
702 * config/tc-i386.c (cpu_arch): Add .popcnt.
703 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
704 Add a tab before @samp{.sse4a}.
705
c8f8eebc
JB
7062020-02-17 Jan Beulich <jbeulich@suse.com>
707
708 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
709 for AddrPrefixOpReg templates. Combine the two pieces of
710 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
711 mode.
712
eedb0f2c
JB
7132020-02-17 Jan Beulich <jbeulich@suse.com>
714
715 PR gas/14439
716 * config/tc-i386.c (md_assemble): Also suppress operand
717 swapping for MONITOR{,X} and MWAIT{,X}.
718 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
719 Add Intel syntax monitor/mwait tests.
720 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
721 Adjust expectations.
722 *testsuite/gas/i386/sse3-intel.d,
723 testsuite/gas/i386/x86-64-sse3-intel.d: New.
724 * testsuite/gas/i386/i386.exp: Run new tests.
725
b9915cbc
JB
7262020-02-17 Jan Beulich <jbeulich@suse.com>
727
728 PR gas/6518
729 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
730 [XYZ]MMWord memory operand ambiguity recognition logic (largely
731 re-indentation).
732 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
733 cases.
734 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
735 * testsuite/gas/i386/avx512dq-inval.l,
736 testsuite/gas/i386/inval-avx.l,
737 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
738 * testsuite/gas/i386/avx512vl-ambig.s,
739 testsuite/gas/i386/avx512vl-ambig.l: New.
740 * testsuite/gas/i386/i386.exp: Run new test.
741
af5c13b0
L
7422020-02-16 H.J. Lu <hongjiu.lu@intel.com>
743
744 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
745 nosse4.
746 * doc/c-i386.texi: Document sse4a and nosse4a.
747
07d98387
L
7482020-02-14 H.J. Lu <hongjiu.lu@intel.com>
749
750 * doc/c-i386.texi: Remove the old movsx and movzx documentation
751 for AT&T syntax.
752
65fca059
JB
7532020-02-14 Jan Beulich <jbeulich@suse.com>
754
755 PR gas/25438
756 * config/tc-i386.c (md_assemble): Move movsx/movzx special
757 casing ...
758 (process_suffix): ... here. Consider just the first operand
759 initially.
760 (check_long_reg): Drop opcode 0x63 special case again.
761 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
762 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
763 Move ambiguous operand size tests ...
764 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
765 testsuite/gas/i386/noreg64.s: ... here.
766 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
767 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
768 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
769 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
770 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
771 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
772 testsuite/gas/i386/x86-64-movsxd.d,
773 testsuite/gas/i386/x86-64-movsxd-intel.d,
774 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
775 Adjust expectations.
776 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
777 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
778 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
779 * testsuite/gas/i386/i386.exp: Run new tests.
780
b6773884
JB
7812020-02-14 Jan Beulich <jbeulich@suse.com>
782
783 * config/tc-i386.c (process_operands): Also skip segment
784 override prefix emission if it matches an already present one.
785 * testsuite/gas/i386/prefix32.s: Add double segment override
786 cases.
787 * testsuite/gas/i386/prefix32.l: Adjust expectations.
788
92334ad2
JB
7892020-02-14 Jan Beulich <jbeulich@suse.com>
790
791 * config/tc-i386.c (process_operands): Drop ineffectual segment
792 overrides when optimizing.
793 * testsuite/gas/i386/lea-optimize.d: New.
794 * testsuite/gas/i386/i386.exp: Run new test.
795
7962020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
797
798 * config/tc-i386.c (process_operands): Also check insn prefix
799 for ineffectual segment override warning. Don't cover possible
800 VEX/EVEX encoded insns there.
801 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
802 testsuite/gas/i386/lea.e: New.
803 * testsuite/gas/i386/i386.exp: Run new test.
804
0e6724de
L
8052020-02-14 H.J. Lu <hongjiu.lu@intel.com>
806
807 PR gas/25438
808 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
809 syntax.
810
292676c1
L
8112020-02-13 Fangrui Song <maskray@google.com>
812 H.J. Lu <hongjiu.lu@intel.com>
813
814 PR gas/25551
815 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
816 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
817 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
818 * testsuite/gas/i386/relax-5.d: New file.
819 * testsuite/gas/i386/relax-5.s: Likewise.
820 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
821 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
822
7deea9aa
JB
8232020-02-13 Jan Beulich <jbeulich@suse.com>
824
825 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
826 "nosse4" entry.
827
6c0946d0
JB
8282020-02-12 Jan Beulich <jbeulich@suse.com>
829
830 * config/tc-i386.c (avx512): New (at file scope), moved from
831 (check_VecOperands): ... here.
832 (process_suffix): Add [XYZ]MMword operand size handling.
833 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
834 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
835 tests.
836 * testsuite/gas/i386/avx512dq-inval.l,
837 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
838
5990e377
JB
8392020-02-12 Jan Beulich <jbeulich@suse.com>
840
841 PR gas/24546
842 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
843 code only.
844 * config/tc-i386-intel.c (i386_intel_operand): Also handle
845 CALL/JMP in O_tbyte_ptr case.
846 * doc/c-i386.texi: Mention far call and full pointer load ISA
847 differences.
848 * testsuite/gas/i386/x86-64-branch-3.s,
849 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
850 * testsuite/gas/i386/x86-64-branch-3.d,
851 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
852 * testsuite/gas/i386/x86-64-branch-5.l,
853 testsuite/gas/i386/x86-64-branch-5.s: New.
854 * testsuite/gas/i386/i386.exp: Run new test.
855
9706160a
JB
8562020-02-12 Jan Beulich <jbeulich@suse.com>
857
858 PR gas/25438
859 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
860 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
861 64-bit-only warning.
862 (check_word_reg): Consistently error on mismatching register
863 size and suffix.
864 * testsuite/gas/i386/general.s: Replace dword GPR with word one
865 for movw. Replace suffix / GPR for orb.
866 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
867 byte GPRs as well as ones for inb/outb with a word accumulator.
868 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
869 testsuite/gas/i386/inval.l: Adjust expectations.
870
5de4d9ef
JB
8712020-02-12 Jan Beulich <jbeulich@suse.com>
872
873 * config/tc-i386.c (operand_type_register_match): Also fall
874 through initial two if()-s when the template allows for a GPR
875 operand. Adjust comment.
876
50128d0c
JB
8772020-02-11 Jan Beulich <jbeulich@suse.com>
878
879 (struct _i386_insn): New field "short_form".
880 (optimize_encoding): Drop setting of shortform field.
881 (process_suffix): Set i.short_form. Replace shortform use.
882 (process_operands): Replace shortform use.
883
1ed818b4
MM
8842020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
885
886 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
887 loop initial declaration.
888
5aae9ae9
MM
8892020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
890
891 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
892 instructions that can have 5 arguments.
893 (enum operand_parse_code): Add new operands.
894 (parse_operands): Account for new operands.
895 (S5): New macro.
896 (enum neon_shape_el): Introduce P suffixes for coprocessor.
897 (neon_select_shape): Account for P suffix.
898 (LOW1): Move macro to global position.
899 (HI4): Move macro to global position.
900 (vcx_assign_vec_d): New.
901 (vcx_assign_vec_m): New.
902 (vcx_assign_vec_n): New.
903 (enum vcx_reg_type): New.
904 (vcx_get_reg_type): New.
905 (vcx_size_pos): New.
906 (vcx_vec_pos): New.
907 (vcx_handle_shape): New.
908 (vcx_ensure_register_in_range): New.
909 (vcx_handle_register_arguments): New.
910 (vcx_handle_insn_block): New.
911 (vcx_handle_common_checks): New.
912 (do_vcx1): New.
913 (do_vcx2): New.
914 (do_vcx3): New.
915 * testsuite/gas/arm/cde-missing-fp.d: New test.
916 * testsuite/gas/arm/cde-missing-fp.l: New test.
917 * testsuite/gas/arm/cde-missing-mve.d: New test.
918 * testsuite/gas/arm/cde-missing-mve.l: New test.
919 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
920 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
921 * testsuite/gas/arm/cde-mve.s: New test.
922 * testsuite/gas/arm/cde-warnings.l:
923 * testsuite/gas/arm/cde-warnings.s:
924 * testsuite/gas/arm/cde.d:
925 * testsuite/gas/arm/cde.s:
926
4934a27c
MM
9272020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
928 Matthew Malcomson <matthew.malcomson@arm.com>
929
930 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
931 CDE coprocessor that can be enabled.
932 (enum pred_instruction_type): New pred type.
933 (BAD_NO_VPT): New error message.
934 (BAD_CDE): New error message.
935 (BAD_CDE_COPROC): New error message.
936 (enum operand_parse_code): Add new immediate operands.
937 (parse_operands): Account for new immediate operands.
938 (check_cde_operand): New.
939 (cde_coproc_enabled): New.
940 (cde_coproc_pos): New.
941 (cde_handle_coproc): New.
942 (cxn_handle_predication): New.
943 (do_custom_instruction_1): New.
944 (do_custom_instruction_2): New.
945 (do_custom_instruction_3): New.
946 (do_cx1): New.
947 (do_cx1a): New.
948 (do_cx1d): New.
949 (do_cx1da): New.
950 (do_cx2): New.
951 (do_cx2a): New.
952 (do_cx2d): New.
953 (do_cx2da): New.
954 (do_cx3): New.
955 (do_cx3a): New.
956 (do_cx3d): New.
957 (do_cx3da): New.
958 (handle_pred_state): Define new IT block behaviour.
959 (insns): Add newn CX*{,d}{,a} instructions.
960 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
961 Define new cdecp extension strings.
962 * doc/c-arm.texi: Document new cdecp extension arguments.
963 * testsuite/gas/arm/cde-scalar.d: New test.
964 * testsuite/gas/arm/cde-scalar.s: New test.
965 * testsuite/gas/arm/cde-warnings.d: New test.
966 * testsuite/gas/arm/cde-warnings.l: New test.
967 * testsuite/gas/arm/cde-warnings.s: New test.
968 * testsuite/gas/arm/cde.d: New test.
969 * testsuite/gas/arm/cde.s: New test.
970
4b5aaf5f
L
9712020-02-10 H.J. Lu <hongjiu.lu@intel.com>
972
973 PR gas/25516
974 * config/tc-i386.c (intel64): Renamed to ...
975 (isa64): This.
976 (match_template): Accept Intel64 only instruction by default.
977 (i386_displacement): Updated.
978 (md_parse_option): Updated.
979 * c-i386.texi: Update -mamd64/-mintel64 documentation.
980 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
981 -mamd64 to x86-64-sysenter-amd.
982 * testsuite/gas/i386/x86-64-sysenter.d: New file.
983
33176d91
AM
9842020-02-10 Alan Modra <amodra@gmail.com>
985
986 * config/obj-elf.c (obj_elf_change_section): Error for section
987 type, attr or entsize changes in assembly.
988 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
989 * testsuite/gas/elf/section5.l: Update.
990
82194874
AM
9912020-02-10 Alan Modra <amodra@gmail.com>
992
993 * output-file.c (output_file_close): Do a normal close when
994 flag_always_generate_output.
995 * write.c (write_object_file): Don't stop output when
996 flag_always_generate_output.
997
9fc0b501
SB
9982020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
999
1000 PR 25469
1001 * config/tc-z80.c: Add -gbz80 command line option to generate code
1002 for the GameBoy Z80. Add support for generating DWARF.
1003 * config/tc-z80.h: Add support for DWARF debug information
1004 generation.
1005 * doc/c-z80.texi: Document new command line option.
1006 * testsuite/gas/z80/gbz80_all.d: New file.
1007 * testsuite/gas/z80/gbz80_all.s: New file.
1008 * testsuite/gas/z80/z80.exp: Run the new tests.
1009 * testsuite/gas/z80/z80n_all.d: New file.
1010 * testsuite/gas/z80/z80n_all.s: New file.
1011 * testsuite/gas/z80/z80n_reloc.d: New file.
1012
b7d07216
L
10132020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1014
1015 PR gas/25381
1016 * config/obj-elf.c (get_section): Also check
1017 linked_to_symbol_name.
1018 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1019 (obj_elf_parse_section_letters): Handle the 'o' flag.
1020 (build_group_lists): Renamed to ...
1021 (build_additional_section_info): This. Set elf_linked_to_section
1022 from map_head.linked_to_symbol_name.
1023 (elf_adjust_symtab): Updated.
1024 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1025 * doc/as.texi: Document the 'o' flag.
1026 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1027 * testsuite/gas/elf/section18.d: New file.
1028 * testsuite/gas/elf/section18.s: Likewise.
1029 * testsuite/gas/elf/section19.d: Likewise.
1030 * testsuite/gas/elf/section19.s: Likewise.
1031 * testsuite/gas/elf/section20.d: Likewise.
1032 * testsuite/gas/elf/section20.s: Likewise.
1033 * testsuite/gas/elf/section21.d: Likewise.
1034 * testsuite/gas/elf/section21.l: Likewise.
1035 * testsuite/gas/elf/section21.s: Likewise.
1036
5eb617a7
L
10372020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1038
1039 * NEWS: Mention x86 assembler options to align branches for
1040 binutils 2.34.
1041
986ac314
L
10422020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1043
1044 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1045 only for ELF targets.
1046 * testsuite/gas/i386/unique.d: Don't xfail.
1047 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1048
19234a6d
AM
10492020-02-06 Alan Modra <amodra@gmail.com>
1050
1051 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1052 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1053
02e0be69
AM
10542020-02-06 Alan Modra <amodra@gmail.com>
1055
1056 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1057 xfail, and rename test.
1058 * testsuite/gas/elf/section12b.d: Likewise.
1059 * testsuite/gas/elf/section16a.d: Likewise.
1060 * testsuite/gas/elf/section16b.d: Likewise.
1061
a8c4d40b
L
10622020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1063
1064 PR gas/25380
1065 * config/obj-elf.c (section_match): Removed.
1066 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1067 section_id.
1068 (obj_elf_change_section): Replace info and group_name arguments
1069 with match_p. Also update the section ID and flags from match_p.
1070 (obj_elf_section): Handle "unique,N". Update call to
1071 obj_elf_change_section.
1072 * config/obj-elf.h (elf_section_match): New.
1073 (obj_elf_change_section): Updated.
1074 * config/tc-arm.c (start_unwind_section): Update call to
1075 obj_elf_change_section.
1076 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1077 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1078 (microblaze_s_sdata): Likewise.
1079 (microblaze_s_rdata): Likewise.
1080 (microblaze_s_bss): Likewise.
1081 * config/tc-mips.c (s_change_section): Likewise.
1082 * config/tc-msp430.c (msp430_profiler): Likewise.
1083 * config/tc-rx.c (parse_rx_section): Likewise.
1084 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1085 * doc/as.texi: Document "unique,N" in .section directive.
1086 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1087 * testsuite/gas/elf/section15.d: New file.
1088 * testsuite/gas/elf/section15.s: Likewise.
1089 * testsuite/gas/elf/section16.s: Likewise.
1090 * testsuite/gas/elf/section16a.d: Likewise.
1091 * testsuite/gas/elf/section16b.d: Likewise.
1092 * testsuite/gas/elf/section17.d: Likewise.
1093 * testsuite/gas/elf/section17.l: Likewise.
1094 * testsuite/gas/elf/section17.s: Likewise.
1095 * testsuite/gas/i386/unique.d: Likewise.
1096 * testsuite/gas/i386/unique.s: Likewise.
1097 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1098 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1099
575d37ae
L
11002020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1101
1102 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1103
2384096c
G
11042020-02-01 Anthony Green <green@moxielogic.com>
1105
1106 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1107
95441c43
SL
11082020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1109
1110 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1111 %tls_ldo.
1112
d465d695
AV
11132020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1114
1115 PR gas/25472
1116 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1117 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1118 +mve.
1119 * testsuite/gas/arm/mve_dsp.d: New test.
1120
d26cc8a9
NC
11212020-01-31 Nick Clifton <nickc@redhat.com>
1122
1123 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1124 rather than BFD_RELOC_NONE.
1125
90e9955a
SP
11262020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1127
1128 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1129 to support VLDMIA instruction for MVE.
1130 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1131 instruction for MVE.
1132 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1133 instruction for MVE.
1134 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1135 instruction for MVE.
1136 * testsuite/gas/arm/mve-ldst.d: New test.
1137 * testsuite/gas/arm/mve-ldst.s: Likewise.
1138
53943f32
NC
11392020-01-31 Nick Clifton <nickc@redhat.com>
1140
1141 * po/fr.po: Updated French translation.
1142 * po/ru.po: Updated Russian translation.
1143
c3036ed0
RS
11442020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1145
1146 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1147 .s for the movprfx.
1148 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1149 * testsuite/gas/aarch64/sve-movprfx_28.d,
1150 * testsuite/gas/aarch64/sve-movprfx_28.l,
1151 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1152
2ae4c703
JB
11532020-01-30 Jan Beulich <jbeulich@suse.com>
1154
1155 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1156 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1157 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1158 Adjust expectations.
1159
bd434cc4
JM
11602020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1161
1162 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1163 * testsuite/gas/bpf/alu-be.d: Likewise.
1164 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1165 * testsuite/gas/bpf/alu32-be.d: Likewise.
1166
aeab2b26
JB
11672020-01-30 Jan Beulich <jbeulich@suse.com>
1168
1169 * testsuite/gas/i386/x86-64-branch-2.s,
1170 testsuite/gas/i386/x86-64-branch-4.s,
1171 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1172 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1173 testsuite/gas/i386/x86-64-branch-2.d,
1174 testsuite/gas/i386/x86-64-branch-4.l,
1175 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1176
873494c8
JB
11772020-01-30 Jan Beulich <jbeulich@suse.com>
1178
1179 * config/tc-i386.c (process_suffix): .
1180 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1181 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1182 Add LRETQ case.
1183 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1184 suffix.
1185 testsuite/gas/i386/x86_64.s: Add RETF cases.
1186 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1187 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1188 testsuite/gas/i386/x86-64-opcode.d,
1189 testsuite/gas/i386/x86-64-suffix-intel.d,
1190 testsuite/gas/i386/x86-64-suffix.d,
1191 testsuite/gas/i386/x86_64-intel.d
1192 testsuite/gas/i386/x86_64.d: Adjust expectations.
1193 * testsuite/gas/i386/x86-64-suffix.e,
1194 testsuite/gas/i386/x86_64.e: New.
1195
62b3f548
JB
11962020-01-30 Jan Beulich <jbeulich@suse.com>
1197
1198 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1199 special case.
1200
bc31405e
L
12012020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1202
1203 PR binutils/25445
1204 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1205 movsxd.
1206 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1207 differences. Document movslq and movsxd.
1208 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1209 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1210 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1211 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1212 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1213 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1214 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1215 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1216 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1217 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1218 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1219
e3696f67
AM
12202020-01-27 Alan Modra <amodra@gmail.com>
1221
1222 * testsuite/gas/all/gas.exp: Replace case statements with switch
1223 statements.
1224 * testsuite/gas/elf/elf.exp: Likewise.
1225 * testsuite/gas/macros/macros.exp: Likewise.
1226 * testsuite/lib/gas-defs.exp: Likewise.
1227
7568c93b
TC
12282020-01-27 Tamar Christina <tamar.christina@arm.com>
1229
1230 PR 25403
1231 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1232 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1233
403d1bd9
JW
12342020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1235
1236 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1237 s exts must be known, so rename *ok* to *fail*.
1238 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1239 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1240 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1241 above change.
1242 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1243 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1244
be4c5e58
L
12452020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1246
1247 PR gas/25438
1248 * config/tc-i386.c (check_long_reg): Always disallow double word
1249 suffix in mnemonic with word general register.
1250 * testsuite/gas/i386/general.s: Replace word general register
1251 with double word general register for movl.
1252 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1253 register.
1254 * testsuite/gas/i386/general.l: Updated.
1255 * testsuite/gas/i386/inval.l: Likewise.
1256
9e7028aa
AM
12572020-01-22 Alan Modra <amodra@gmail.com>
1258
1259 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1260 __tls_get_addr_desc and __tls_get_addr_opt.
1261
e3ed17f3
JB
12622020-01-21 Jan Beulich <jbeulich@suse.com>
1263
1264 * testsuite/gas/i386/inval-crc32.s,
1265 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1266 * testsuite/gas/i386/inval-crc32.l,
1267 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1268
1a035124
JB
12692020-01-21 Jan Beulich <jbeulich@suse.com>
1270
1271 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1272 generic code path. Deal with No_lSuf being set in a template.
1273 * testsuite/gas/i386/inval-crc32.l,
1274 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1275 instead of error(s) when operand size is ambiguous.
1276 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1277 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1278 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1279 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1280 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1281 Adjust expectations.
1282
c006a730
JB
12832020-01-21 Jan Beulich <jbeulich@suse.com>
1284
1285 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1286 and an intel_syntax check. Re-write lack-of-suffix processing
1287 logic.
1288 * doc/c-i386.texi: Document operand size defaults for suffix-
1289 less AT&T syntax insns.
1290 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1291 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1292 testsuite/gas/i386/x86-64-avx-scalar.s,
1293 testsuite/gas/i386/x86-64-avx.s,
1294 testsuite/gas/i386/x86-64-bundle.s,
1295 testsuite/gas/i386/x86-64-intel64.s,
1296 testsuite/gas/i386/x86-64-lock-1.s,
1297 testsuite/gas/i386/x86-64-opcode.s,
1298 testsuite/gas/i386/x86-64-sse2avx.s,
1299 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1300 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1301 testsuite/gas/i386/x86-64-nops.s,
1302 testsuite/gas/i386/x86-64-ptwrite.s,
1303 testsuite/gas/i386/x86-64-simd.s,
1304 testsuite/gas/i386/x86-64-sse-noavx.s,
1305 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1306 insns.
1307 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1308 testsuite/gas/i386/noreg64.s: Add further tests.
1309 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1310 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1311 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1312 testsuite/gas/i386/sse-noavx.d,
1313 testsuite/gas/i386/x86-64-intel64.d,
1314 testsuite/gas/i386/x86-64-nops.d,
1315 testsuite/gas/i386/x86-64-opcode.d,
1316 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1317 testsuite/gas/i386/x86-64-ptwrite.d,
1318 testsuite/gas/i386/x86-64-simd-intel.d,
1319 testsuite/gas/i386/x86-64-simd-suffix.d,
1320 testsuite/gas/i386/x86-64-simd.d,
1321 testsuite/gas/i386/x86-64-sse-noavx.d
1322 testsuite/gas/i386/x86-64-suffix.d,
1323 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1324 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1325 testsuite/gas/i386/noreg64.l: New.
1326 * testsuite/gas/i386/i386.exp: Run new tests.
1327
c906a69a
JB
13282020-01-21 Jan Beulich <jbeulich@suse.com>
1329
1330 * testsuite/gas/i386/avx512_bf16_vl.s,
1331 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1332 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1333 broadcast forms of VCVTNEPS2BF16.
1334 * testsuite/gas/i386/avx512_bf16_vl.d,
1335 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1336
26916852
NC
13372020-01-20 Nick Clifton <nickc@redhat.com>
1338
1339 * po/uk.po: Updated Ukranian translation.
1340
14470f07
L
13412020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1342
1343 PR ld/25416
1344 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1345 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1346 x32 object.
1347 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1348 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1349 R_X86_64_GOTPC32_TLSDESC relocation.
1350
1b1bb2c6
NC
13512020-01-18 Nick Clifton <nickc@redhat.com>
1352
1353 * configure: Regenerate.
1354 * po/gas.pot: Regenerate.
1355
ae774686
NC
13562020-01-18 Nick Clifton <nickc@redhat.com>
1357
1358 Binutils 2.34 branch created.
1359
42e04b36
L
13602020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1361
1362 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1363 with vex_encoding_vex.
1364 (parse_insn): Likewise.
1365 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1366 and {vex3} documentation.
1367 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1368 {vex}.
1369 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1370
2da2eaf4
AV
13712020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1372
1373 PR 25376
1374 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1375 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1376 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1377 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1378 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1379 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1380
45a4bb20
JB
13812020-01-16 Jan Beulich <jbeulich@suse.com>
1382
1383 * config/tc-i386.c (match_template): Drop found_cpu_match local
1384 variable.
1385
4814632e
JB
13862020-01-16 Jan Beulich <jbeulich@suse.com>
1387
1388 * testsuite/gas/i386/avx512dq-inval.l,
1389 testsuite/gas/i386/avx512dq-inval.s: New.
1390 * testsuite/gas/i386/i386.exp: Run new test.
1391
131cb553
JL
13922020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1393
1394 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1395 relocations when the target is 430X, except when extracting part of an
1396 expression.
1397 (msp430_srcoperand): Adjust comment.
1398 Initialize the expp member of the msp430_operand_s struct as
1399 appropriate.
1400 (msp430_dstoperand): Likewise.
1401 * testsuite/gas/msp430/msp430.exp: Run new test.
1402 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1403 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1404
c24d0e8d
AM
14052020-01-15 Alan Modra <amodra@gmail.com>
1406
1407 * configure.tgt: Add sparc-*-freebsd case.
1408
e44925ae
LC
14092020-01-14 Lili Cui <lili.cui@intel.com>
1410
1411 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1412 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1413 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1414 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1415 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1416 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1417 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1418 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1419 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1420 * testsuite/gas/i386/align-branch-5.d: Likewise.
1421 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1422 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1423 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1424 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1425 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1426 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1427 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1428 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1429 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1430 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1431 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1432 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1433
7a6bf3be
SB
14342020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1435
1436 PR 25377
1437 * config/tc-z80.c: Add support for half precision, single
1438 precision and double precision floating point values.
1439 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1440 * doc/as.texi: Add new z80 command line options.
1441 * doc/c-z80.texi: Document new z80 command line options.
1442 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1443 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1444 * testsuite/gas/z80/z80.exp: Run the new test.
1445 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1446 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1447 * testsuite/gas/z80/strings.d: Update expected output.
1448
82e9597c
MM
14492020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1450
1451 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1452 dependency.
1453
5e4f7e05
CZ
14542020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1455
1456 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1457 the CPU.
1458 * config/tc-arc.h: Add header if/defs.
1459 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1460
febda64f
AM
14612020-01-13 Alan Modra <amodra@gmail.com>
1462
1463 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1464
5496abe1
AM
14652020-01-13 Alan Modra <amodra@gmail.com>
1466
1467 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1468 insertion.
1469
ec4181f2
AM
14702020-01-10 Alan Modra <amodra@gmail.com>
1471
1472 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1473 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1474
40c75bc8
SB
14752020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1476
1477 PR 25224
1478 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1479 opcode byte values.
1480 (emit_ld_r_r): Likewise.
1481 (emit_ld_rr_m): Likewise.
1482 (emit_ld_rr_nn): Likewise.
1483
72aea328
JB
14842020-01-09 Jan Beulich <jbeulich@suse.com>
1485
1486 * config/tc-i386.c (optimize_encoding): Add
1487 is_any_vex_encoding() invocations. Drop respective
1488 i.tm.extension_opcode == None checks.
1489
3f93af61
JB
14902020-01-09 Jan Beulich <jbeulich@suse.com>
1491
1492 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1493 REX transformations. Correct comment indentation.
1494
7697afb6
JB
14952020-01-09 Jan Beulich <jbeulich@suse.com>
1496
1497 * config/tc-i386.c (optimize_encoding): Generalize register
1498 transformation for TEST optimization.
1499
d835a58b
JB
15002020-01-09 Jan Beulich <jbeulich@suse.com>
1501
1502 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1503 testsuite/gas/i386/x86-64-sysenter-amd.d,
1504 testsuite/gas/i386/x86-64-sysenter-amd.l,
1505 testsuite/gas/i386/x86-64-sysenter-intel.d,
1506 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1507 * testsuite/gas/i386/i386.exp: Run new tests.
1508
915808f6
NC
15092020-01-08 Nick Clifton <nickc@redhat.com>
1510
1511 PR 25284
1512 * doc/as.texi (Align): Document the fact that all arguments can be
1513 omitted.
1514 (Balign): Likewise.
1515 (P2align): Likewise.
1516
f1f28025
NC
15172020-01-08 Nick Clifton <nickc@redhat.com>
1518
1519 PR 14891
1520 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1521 already defined as a different symbol type.
1522 * testsuite/gas/elf/pr14891.s: New test source file.
1523 * testsuite/gas/elf/pr14891.d: New test driver.
1524 * testsuite/gas/elf/pr14891.s: New test expected error output.
1525 * testsuite/gas/elf/elf.exp: Run the new test.
1526
030a2e78
AM
15272020-01-08 Alan Modra <amodra@gmail.com>
1528
1529 * config/tc-z8k.c (md_begin): Make idx unsigned.
1530 (get_specific): Likewise for this_index.
1531
2a1ebfb2
CZ
15322020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1533
1534 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1535 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1536 (md_operand): Set X_md to absent.
1537 (arc_parse_name): Check for X_md.
1538
16d87673
SB
15392020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1540
1541 PR 25311
1542 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1543 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1544 NO_STRING_ESCAPES.
1545 * read.c (next_char_of_string): Likewise.
1546 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1547 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1548
a2322019
NC
15492020-01-03 Nick Clifton <nickc@redhat.com>
1550
1551 * po/sv.po: Updated Swedish translation.
1552
5437a02a
JB
15532020-01-03 Jan Beulich <jbeulich@suse.com>
1554
1555 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1556 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1557
567dfba2
JB
15582020-01-03 Jan Beulich <jbeulich@suse.com>
1559
1560 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1561 by-element usdot. Add 64-bit form tests for by-element sudot.
1562 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1563
8c45011a
JB
15642020-01-03 Jan Beulich <jbeulich@suse.com>
1565
1566 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1567 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1568
f4950f76
JB
15692020-01-03 Jan Beulich <jbeulich@suse.com>
1570
1571 * testsuite/gas/aarch64/f64mm.d,
1572 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1573
6655dba2
SB
15742020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1575
1576 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1577 support for assembler code generated by SDCC. Add new relocation
1578 types. Add z80-elf target support.
1579 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1580 labels. Local labels starts from ".L".
1581 * NEWS: Mention the new support.
1582 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1583 * testsuite/gas/all/fwdexp.s: Likewise.
1584 * testsuite/gas/all/cond.l: Likewise.
1585 * testsuite/gas/all/cond.s: Likewise.
1586 * testsuite/gas/all/fwdexp.d: Likewise.
1587 * testsuite/gas/all/fwdexp.s: Likewise.
1588 * testsuite/gas/elf/section2.e-mips: Likewise.
1589 * testsuite/gas/elf/section2.l: Likewise.
1590 * testsuite/gas/elf/section2.s: Likewise.
1591 * testsuite/gas/macros/app1.d: Likewise.
1592 * testsuite/gas/macros/app1.s: Likewise.
1593 * testsuite/gas/macros/app2.d: Likewise.
1594 * testsuite/gas/macros/app2.s: Likewise.
1595 * testsuite/gas/macros/app3.d: Likewise.
1596 * testsuite/gas/macros/app3.s: Likewise.
1597 * testsuite/gas/macros/app4.d: Likewise.
1598 * testsuite/gas/macros/app4.s: Likewise.
1599 * testsuite/gas/macros/app4b.s: Likewise.
1600 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1601 * testsuite/gas/z80/z80.exp: Add new tests
1602 * testsuite/gas/z80/dollar.d: New file.
1603 * testsuite/gas/z80/dollar.s: New file.
1604 * testsuite/gas/z80/ez80_adl_all.d: New file.
1605 * testsuite/gas/z80/ez80_adl_all.s: New file.
1606 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1607 * testsuite/gas/z80/ez80_isuf.s: New file.
1608 * testsuite/gas/z80/ez80_z80_all.d: New file.
1609 * testsuite/gas/z80/ez80_z80_all.s: New file.
1610 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1611 * testsuite/gas/z80/r800_extra.d: New file.
1612 * testsuite/gas/z80/r800_extra.s: New file.
1613 * testsuite/gas/z80/r800_ii8.d: New file.
1614 * testsuite/gas/z80/r800_z80_doc.d: New file.
1615 * testsuite/gas/z80/z180.d: New file.
1616 * testsuite/gas/z80/z180.s: New file.
1617 * testsuite/gas/z80/z180_z80_doc.d: New file.
1618 * testsuite/gas/z80/z80_doc.d: New file.
1619 * testsuite/gas/z80/z80_doc.s: New file.
1620 * testsuite/gas/z80/z80_ii8.d: New file.
1621 * testsuite/gas/z80/z80_ii8.s: New file.
1622 * testsuite/gas/z80/z80_in_f_c.d: New file.
1623 * testsuite/gas/z80/z80_in_f_c.s: New file.
1624 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1625 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1626 * testsuite/gas/z80/z80_out_c_0.d: New file.
1627 * testsuite/gas/z80/z80_out_c_0.s: New file.
1628 * testsuite/gas/z80/z80_reloc.d: New file.
1629 * testsuite/gas/z80/z80_reloc.s: New file.
1630 * testsuite/gas/z80/z80_sli.d: New file.
1631 * testsuite/gas/z80/z80_sli.s: New file.
1632
a65b5de6
SN
16332020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1634
1635 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1636 REGLIST_RN.
1637
b14ce8bf
AM
16382020-01-01 Alan Modra <amodra@gmail.com>
1639
1640 Update year range in copyright notice of all files.
1641
0b114740 1642For older changes see ChangeLog-2019
3499769a 1643\f
0b114740 1644Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1645
1646Copying and distribution of this file, with or without modification,
1647are permitted in any medium without royalty provided the copyright
1648notice and this notice are preserved.
1649
1650Local Variables:
1651mode: change-log
1652left-margin: 8
1653fill-column: 74
1654version-control: never
1655End:
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