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Replace oprand_size_mismatch with operand_size_mismatch.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
86e026a4
L		 12010-03-21 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
4 with operand_size_mismatch.
5 (operand_size_match): Updated.
6 (match_template): Likewise.
7
a65babc9
L		 82010-03-21 H.J. Lu <hongjiu.lu@intel.com>
9
10 * config/tc-i386.c (i386_error): New.
11 (_i386_insn): Replace err_msg with error.
12 (operand_size_match): Set error instead of err_msg on failure.
13 (operand_type_match): Likewise.
14 (operand_type_register_match): Likewise.
15 (VEX_check_operands): Likewise.
16 (match_template): Likewise. Use error instead of err_msg with
17 as_bad.
18
0f020cef
JZ		 192010-03-19 Jie Zhang <jie@codesourcery.com>
20
21 * config/tc-arm.c (make_mapping_symbol): Hanle the case
22 that two mapping symbols have the same value.
23
a5b82cbe
DJ		 242010-03-18 Daniel Jacobowitz <dan@codesourcery.com>
25
26 * doc/c-arm.texi (.setfp): Correct example.
27
b43420e6
NC		 282010-03-18 Wei Guozhi <carrot@google.com>
29
30 PR gas/11323
31 * config/tc-arm.c (reloc_names): New relocation names.
32 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
33 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
34 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
35
4e4e1355
TS		 362010-03-15 Thomas Schwinge <thomas@codesourcery.com>
37
d905c788
TS		 38 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
39 cases, and not only for .eh_frame.
40
4e4e1355
TS		 41 * dw2gencfi.c (output_cie): Make it more explicit which code paths
42 belong to .eh_frame only.
43
dc86b458
SB		 442010-03-13 Segher Boessenkool <segher@kernel.crashing.org>
45
46 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
47 assembler constants on 64-bit hosts.
48
ee9e7c78
MF		 492010-03-10 Mike Frysinger <michael.frysinger@analog.com>
50
51 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
52 Strip trailing whitespace.
53
a23c851a
MF		 542010-03-10 Mike Frysinger <michael.frysinger@analog.com>
55
56 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
57 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
58 BFIN_CPU_BF506.
59 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
60
9982501a
JZ		 612010-03-10 Jie Zhang <jie@codesourcery.com>
62
63 * doc/as.texinfo: Add Blackfin options.
64 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
65 * config/tc-bfin.c (md_show_usage): Show usage for all
66 Blackfin specific options.
67
4199fe12
AM		 682010-03-09 Alan Modra <amodra@gmail.com>
69
70 PR gas/11356
71 * listing.c (listing_newline): Correct backslash quote logic.
72
40cf28aa
RO		 732010-03-08 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
74
75 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
76 (ELF_TARGET_FORMAT64): Define.
77
26b6f191
PB		 782010-03-05 Paul Brook <paul@codesourcery.com>
79
80 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
81
772657e9
AS		 822010-03-02 Andrew Stubbs <ams@codesourcery.com>
83
84 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
85 reading uninitialized data.
86
bd56defd
TG		 872010-03-01 Tristan Gingold <gingold@adacore.com>
88
89 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
90
743d7f19
DE		 912010-02-26 Doug Evans <dje@sebabeach.org>
92
93 * configure.tgt: Fix mep cpu case.
94
f8a8e9d6
JZ		 952010-02-26 Jie Zhang <jie@codesourcery.com>
96
97 * config/tc-arm.c (do_t_strexd): Remove
98 operand[1] != operand[2] contraint.
99
3fde54a2
JZ		 1002010-02-26 Jie Zhang <jie@codesourcery.com>
101
102 * config/tc-arm.c (neon_select_shape): No need to match
103 the remaining operands in the shape when one operand does
104 not match.
105
e23c0ad8
JZ		 1062010-02-26 Jie Zhang <jie@codesourcery.com>
107
108 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
109 alignment.
110
fae0b242
DE		 1112010-02-25 Doug Evans <dje@sebabeach.org>
112
113 * cgen.c: Whitespace fixes.
114 (weak_operand_overflow_check): Formatting fix.
115
a6c56050
L		 1162010-02-25 H.J. Lu <hongjiu.lu@intel.com>
117
118 * config/tc-i386.c (match_template): Update error messages.
119
891edac4
L		 1202010-02-25 H.J. Lu <hongjiu.lu@intel.com>
121
122 * config/tc-i386.c (_i386_insn): Add err_msg.
123 (operand_size_match): Set err_msg on failure.
124 (operand_type_match): Likewise.
125 (operand_type_register_match): Likewise.
126 (VEX_check_operands): Likewise.
127 (match_template): Likewise. Use i.err_msg with as_bad.
128
c67a084a
NC		 1292010-02-25 Wu Zhangjin <wuzhangjin@gmail.com>
130
131 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
132 mips_fix_loongson2f_jump): New variables.
133 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
134 -mno-fix-loongson2f-nop/jump.
135 (md_parse_option): Initialize variables via above options.
136 (options): New enums for the above options.
137 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
138 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
139 New functions.
140 (append_insn): call fix_loongson2f().
141 (mips_handle_align): Replace the implicit nops.
142 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
143 for the new mips_handle_align().
144 * doc/c-mips.texi: Document the new options.
145
56adecf4
DG		 1462010-02-23 Daniel Gutson <dgutson@codesourcery.com>
147
148 * config/tc-arm.c (do_rd_rm_rn): Added warning
149 for obsolete insns.
150
17e57237
NC		 1512010-02-23 Andrew Zabolotny <anpaza@mail.ru>
152
153 PR binutils/11297
154 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
155 (avr_cons_fix_new): Handle fixups of a single byte.
156
8a59fff3
MGD		 1572010-02-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
158
159 PR 9861
160 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
161 compiler's predefines.
162
487565fe
AM		 1632010-02-19 Alan Modra <amodra@gmail.com>
164
165 * configure.tgt: Whiltespace. Sort moxie entry.
166
cd21e546
MGD		 1672010-02-18 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
168
169 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
170 * doc/c-arm.texi: Likewise.
171
77551a33
DG		 1722010-02-12 Daniel Gutson <dgutson@codesourcery.com>
173
174 * config/tc-arm.c (asm_opcode): operands type
175 change.
176 (BAD_PC_ADDRESSING): New macro message.
177 (BAD_PC_WRITEBACK): Likewise.
178 (MIX_ARM_THUMB_OPERANDS): New macro.
179 (operand_parse_code): Added enum values.
180 (parse_operands): Added thumb/arm distinction,
181 plus new enum values handling.
182 (encode_arm_addr_mode_2): Validations enhanced.
183 (encode_arm_addr_mode_3): Likewise.
184 (do_rm_rd_rn): Likewise.
185 (encode_thumb32_addr_mode): Likewise.
186 (do_t_ldrex): Likewise.
187 (do_t_ldst): Likewise.
188 (do_t_strex): Likewise.
189 (md_assemble): Call parse_operands with
190 a new parameter.
191 (OPS_1): New macro.
192 (OPS_2): Likewise.
193 (OPS_3): Likewise.
194 (OPS_4): Likewise.
195 (OPS_5): Likewise.
196 (OPS_6): Likewise.
197 (insns): Updated insns operands.
198
9d0e8497
TG		 1992010-02-12 Tristan Gingold <gingold@adacore.com>
200 Douglas B Rupp <rupp@gnat.com>
201
202 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
203 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
204 (pseudo_func): Add an entry for slotcount.
205 (md_begin): Initialize slotcount pseudo symbol.
206 (ia64_parse_name): Handle @slotcount parameter.
207 (ia64_gen_real_reloc_type): Handle slotcount.
208 (md_apply_fix): Ditto.
209 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
210
6fa78d94
SA		 2112010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
212
213 * config/tc-xtensa.c (istack_init): Don't call memset.
214
a89c407e
SA		 2152010-02-11 Sterling Augustine <sterling@tensilica.com>
216
217 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
218 well as suffixes.
219
6fa78d94 2202010-02-11 Sterling Augustine <sterling@tensilica.com>
a89c407e
SA		 221
222 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
223
24981e7b
L		 2242010-02-11 H.J. Lu <hongjiu.lu@intel.com>
225
226 * config/tc-i386.c (build_modrm_byte): Reformat.
227
c75ef631
L		 2282010-02-11 H.J. Lu <hongjiu.lu@intel.com>
229
230 * config/tc-i386.c: Update copyright.
231
a683cc34
SP		 2322010-02-10 Quentin Neill <quentin.neill@amd.com>
233 Sebastian Pop <sebastian.pop@amd.com>
234
235 * config/tc-i386.c (vec_imm4) New operand type.
236 (fits_in_imm4): New.
237 (VEX_check_operands): New.
238 (check_reverse): Call VEX_check_operands.
239 (build_modrm_byte): Reintroduce code for 5
240 operand insns. Fix whitespace.
241
cdc51b07
RS		 2422010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
243
244 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
245 -mpwr6 and -mpwr7.
246
3a1e9c4a
SA		 2472010-02-09 Sterling Augustine <sterling@tensilica.com>
248
249 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
250 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
251 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
252
486499d0
CL		 2532010-02-08 Christophe Lyon <christophe.lyon@st.com>
254
255 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
256 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
257 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
258 BFD_RELOC_ARM_PCREL_CALL)
259
19ef5f3d
SA		 2602010-02-08 Sterling Augustine <sterling@tensilica.com>
261
262 * config/tc-xtensa.c (frag_format_size): Generalize logic to
263 handle more instruction sizes and fetch widths.
264 (branch_align_power): Likewise.
265 (text_align_power): Likewise.
266 (bytes_to_stretch): Likewise.
267
ce3d2015
AM		 2682010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
269
270 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
271 (ppc_mach): Handle titan.
272 * doc/c-ppc.texi: Mention -mtitan.
273
19ef5f3d
SA		 2742010-02-05 Sterling Augustine <sterling@tensilica.com>
275
276 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
277 replace with...
278 (xtensa_fetch_width) ...this.
279
1e4cb857
JM		 2802010-02-05 Joseph Myers <joseph@codesourcery.com>
281
282 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
283 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
284 * Makefile.in: Regenerate.
285
68339fdf
SP		 2862010-02-03 Quentin Neill <quentin.neill@amd.com>
287
288 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
289 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
290 * config/tc-i386.h (processor_type): Same.
291 * doc/c-i386.texi: Change amdfam15 to bdver1.
292
99b253c5
NC		 2932010-01-29 Nick Clifton <nickc@redhat.com>
294
295 PR 11136
296 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
297 NS_NULL.
298
31907d5e
DK		 2992010-01-27 Dave Korn <dave.korn.cygwin@gmail.com>
300
301 * NEWS: Mention new feature.
302 * config/obj-coff.c (obj_coff_section): Accept digits and use
303 to override default section alignment power if specified.
304 * doc/as.texinfo (.section directive): Update documentation.
305
539f890d
L		 3062010-01-27 H.J. Lu <hongjiu.lu@intel.com>
307
308 * config/tc-i386.c (avxscalar): New.
309 (OPTION_MAVXSCALAR): Likewise.
310 (build_vex_prefix): Select vector_length for scalar instructions
311 based on avxscalar.
312 (md_longopts): Add OPTION_MAVXSCALAR.
313 (md_parse_option): Handle OPTION_MAVXSCALAR.
314 (md_show_usage): Add -mavxscalar=.
315
316 * doc/c-i386.texi: Document -mavxscalar=.
317
80de6e00
L		 3182010-01-24 H.J. Lu <hongjiu.lu@intel.com>
319
320 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
321 0xc4 individually.
322
c865e45b
RS		 3232010-01-23 Richard Sandiford <r.sandiford@uk.ibm.com>
324
325 * write.h (fix_at_start): Declare.
326 * write.c (fix_new_internal): Add at_beginning parameter.
327 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
328 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
329 (fix_new, fix_new_exp): Update accordingly.
330 (fix_at_start): New function.
331 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
332 (ppc_ref): New function, for OBJ_XCOFF.
333 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
334 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
335
53e5c8fe
RO		 3362010-01-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
337
338 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
339 on 64-bit Solaris/x86.
340 Include obj-format.h earlier.
341
55786da2 3422010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
99b253c5 343
55786da2
AK		 344 * config/tc-s390.c (s390_elf_final_processing): New function.
345 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
346 (s390_elf_final_processing): Added prototype.
347
348
760f3a89
NC		 3492010-01-20 Nick Clifton <nickc@redhat.com>
350
351 PR 11109
352 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
353 code to handle round-to-zero for VCVT conversions.
354 (do_neon_cvt): New. Call do_neon_cvt_1.
355 (do_neon_cvtr): New. Call do_neon_cvt_1.
356 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
357 insn.
358
37a1f277
TG		 3592010-01-18 Tristan Gingold <gingold@adacore.com>
360
361 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
760f3a89 362
a6461c02
SP		 3632010-01-15 Sebastian Pop <sebastian.pop@amd.com>
364
365 * config/tc-i386.c (md_assemble): Before accessing the IMM field
366 check that it's not an XOP insn.
367
62fb9fe1
JZ		 3682010-01-14 Jie Zhang <jie.zhang@analog.com>
369
370 * config/bfin-aux.h: Remove argument names in function
371 declarations.
372 * config/bfin-lex.l (parse_int): Fix shadowed variable name
373 warning.
374 * config/bfin-parse.y (value_match): Remove argument names
375 in declaration.
376 (notethat): Likewise.
377 (yyerror): Likewise.
378
afa62d5e
DJ		 3792010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
380
381 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
382
52b010e4
NC		 3832010-01-13 Nick Clifton <nickc@redhat.com>
384
385 * config/tc-h8300.c (h8300_elf_section): New function - issue a
386 warning message if a new section is created without setting any
387 attributes for it.
388 (md_pseudo_table): Intercept section creation pseudos.
389 (md_pcrel_from): Replace abort with an error message.
390 * config/obj-elf.c (obj_elf_section_name): Export this function.
391 * config/obj-elf.h (obj_elf_section_name): Prototype.
392
cc761f75
AM		 3932010-01-12 Alan Modra <amodra@gmail.com>
394
395 PR 11122
396 * listing.c (print_source): Add one to line number.
397
3725885a
RW		 3982010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
399
400 * Makefile.in: Regenerate.
401 * configure: Regenerate.
402 * doc/Makefile.in: Regenerate.
403
5256a5b0
L		 4042010-01-08 H.J. Lu <hongjiu.lu@intel.com>
405
406 * version.c (parse_args): Change to "Copyright 2010".
407
69dd9865
SP		 4082010-01-06 Quentin Neill <quentin.neill@amd.com>
409
410 * config/tc-i386.c (cpu_arch): Add amdfam15.
411 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
412 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
413 * doc/c-i386.texi: Add amdfam15.
414
4316f0d2
DG		 4152010-01-04 Daniel Gutson <dgutson@codesourcery.com>
416
417 * config/tc-arm.c (do_neon_logic): Accept imm value
418 in the third operand too.
419 (operand_parse_code): OP_RNDQ_IMVNb renamed to
420 OP_RNDQ_Ibig.
421 (parse_operands): OP_NILO case removed, applied renaming.
422 (insns): Neon shape changed for some logic instructions.
423
b1a769ed
DG		 4242010-01-04 Daniel Gutson <dgutson@codesourcery.com>
425
426 * config/tc-arm.c (do_neon_ldx_stx): Added
427 validation for vector load/store insns.
428
0dc93057
AM		 4292010-01-04 Edmar Wienskoski <edmar@freescale.com>
430
431 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
432
88714cb8
DG		 4332010-01-03 Daniel Gutson <dgutson@codesourcery.com>
434
435 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
436 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
437 (NEON_ENCODE): New macro.
438 (check_neon_suffixes): New macro.
439 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
440 (do_vfp_nsyn_opcode): Likewise.
441 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
442 (do_vfp_nsyn_cmp): Likewise.
443 (do_neon_shl_imm): Likewise.
444 (do_neon_qshl_imm): Likewise.
445 (neon_dyadic_misc): Likewise.
446 (do_neon_mac_maybe_scalar): Likewise.
447 (do_neon_qdmulh): Likewise.
448 (do_neon_qmovn): Likewise.
449 (do_neon_qmovun): Likewise.
450 (do_neon_movn): Likewise.
451 (neon_mac_reg_scalar_long): Likewise.
452 (do_neon_vmull): Likewise.
453 (do_neon_trn): Likewise.
454 (do_neon_ldx_stx): Likewise.
455 (neon_dp_fixup): Changed signature and set the flag.
456 (neon_three_same): Call the above with new signature.
457 (neon_two_same): Likewise.
458 (neon_imm_shift): Likewise.
459 (neon_mul_mac): Likewise.
460 (do_neon_abs_neg): Likewise.
461 (neon_mixed_length): Likewise.
462 (do_neon_ext): Likewise.
463 (do_neon_mov): Likewise.
464 (do_neon_tbl_tbx): Likewise.
465 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
466 (neon_compare): Likewise.
467 (do_neon_shll): Likewise.
468 (do_neon_cvt): Likewise.
469 (do_neon_mvn): Likewise.
470 (do_neon_dup): Likewise.
0dc93057 471 (md_assemble): Call check_neon_suffixes ().
99f1a7a7 472
43ecc30f 473For older changes see ChangeLog-2009
08d56133
NC		 474\f
475Local Variables:
476mode: change-log
477left-margin: 8
478fill-column: 74
479version-control: never
480End:
GDB Binutils - Deliverables
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