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Also use unsigned 8-bit immediate values for the LDRC and SETRC insns.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
5c936ef5
NC		 12020-04-29 Nick Clifton <nickc@redhat.com>
2
3 PR 22699
4 * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
5 IMM0_8S and add support for IMM0_8U.
6 * testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
7 unsigned 8-bit immediate.
8 * testsuite/gas/sh/sh4a.d: Extended expected disassembly.
9
251dae91
TC		 102020-04-27 Tamar Christina <tamar.christina@arm.com>
11
12 * NEWS: Add news entry for big-obj.
13 * config/tc-i386.c (i386_target_format): Support new format.
14 * doc/c-i386.texi: Add i386 support.
15 * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
16 * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.
17
714e6c96
NC		 182020-04-27 Nick Clifton <nickc@redhat.com>
19
20 PR 25878
21 * dwarf2dbg.c (struct file_entry): Add auto_assigned field.
22 (assign_file_to_slot): New function. Fills in an entry in the
23 files table.
24 (allocate_filenum): Use new function.
25 (allocate_filename_to_slot): Use new function. If the specified
26 slot entry is already in use, but was chosen automatically then
27 reassign the automatic entry.
28
a09f656b 292020-04-26 Hongtao Liu <hongtao.liu@intel.com
30
31 * config/tc-i386.c (lfence_before_ret_shl): New member.
32 (load_insn_p): implict load for POP/POPA/POPF/XLATB, no load
33 for Anysize insns.
34 (insert_after_load): Issue warning for REP CMPS/SCAS.
35 (insert_before_before): Handle iret, Handle
36 -mlfence-before-ret=shl, Adjust operand size of or/not/shl to ret's,
37 (md_parse_option): Change -mlfence-before-ret=[none|not|or] to
38 -mlfence-before-ret=[none/not/or/shl/yes].
39 Enable -mlfence-before-ret=shl when
40 -mlfence-beofre-indirect-branch=all and no explict -mlfence-before-ret option.
41 (md_show_usage): Ditto.
42 * doc/c-i386.texi: Ditto.
43 * testsuite/gas/i386/i386.exp: Add new testcases.
44 * testsuite/gas/i386/lfence-load-b.d: New.
45 * testsuite/gas/i386/lfence-load-b.e: New.
46 * testsuite/gas/i386/lfence-load.d: Modified.
47 * testsuite/gas/i386/lfence-load.e: New.
48 * testsuite/gas/i386/lfence-load.s: Modified.
49 * testsuite/gas/i386/lfence-ret-a.d: Modified.
50 * testsuite/gas/i386/lfence-ret-b.d: Modified.
51 * testsuite/gas/i386/lfence-ret-c.d: New.
52 * testsuite/gas/i386/lfence-ret-d.d: New.
53 * testsuite/gas/i386/lfence-ret.s: Modified.
54 * testsuite/gas/i386/x86-64-lfence-load-b.d: New.
55 * testsuite/gas/i386/x86-64-lfence-load.d: Modified.
56 * testsuite/gas/i386/x86-64-lfence-load.s: Modified.
57 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Modified.
58 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Modified.
59 * testsuite/gas/i386/x86-64-lfence-ret-c.d: New.
60 * testsuite/gas/i386/x86-64-lfence-ret-d.d: New
61 * testsuite/gas/i386/x86-64-lfence-ret-e.d: New.
62 * testsuite/gas/i386/x86-64-lfence-ret.e: New.
63 * testsuite/gas/i386/x86-64-lfence-ret.s: New.
64
30ce8e47
MF		 652020-04-22 Max Filippov <jcmvbkbc@gmail.com>
66
67 PR ld/25861
68 * config/tc-xtensa.c (md_apply_fix): Replace
69 BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
70 BFD_RELOC_XTENSA_PDIFF{8,16,32} and
71 BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
72 * testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
73 with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
74
31c89d60
AM		 752020-04-22 Alan Modra <amodra@gmail.com>
76
77 * config/obj-elf.c (elf_frob_symbol): Unconditionally remove
78 symbol for ".symver .. remove".
79 * doc/as.texi (.symver): Update.
80 * testsuite/gas/symver/symver11.s: Make foo weak.
81 * testsuite/gas/symver/symver11.d: Expect an error.
82 * testsuite/gas/symver/symver7.d: Allow other random symbols.
83
1d3eb556
L		 842020-04-21 H.J. Lu <hongjiu.lu@intel.com>
85
86 * testsuite/gas/symver/symver11.s: Add ".balign 8".
87
bb2a1453
AS		 882020-04-21 Andreas Schwab <schwab@linux-m68k.org>
89
90 PR 25848
91 * testsuite/gas/m68k/operands.s: Add tests for cmpi.
92 * testsuite/gas/m68k/operands.d: Update.
93 * testsuite/gas/m68k/op68000.d: Update for new error messages.
94
c36876fe
TC		 952020-04-21 Tamar Christina <tamar.christina@arm.com>
96
97 PR binutils/24753
98 * testsuite/gas/arm/pr24753.d: New test.
99 * testsuite/gas/arm/pr24753.s: New test.
100
6914be53
L		 1012020-04-21 H.J. Lu <hongjiu.lu@intel.com>
102
103 PR gas/23840
104 PR gas/25295
105 * NEWS: Mention .symver extension.
106 * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
107 function.
108 (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
109 add a version name. Add local, hidden and remove visibility
110 support.
111 (elf_frob_symbol): Handle the list of version names. Update the
112 original symbol to local, hidden or remove it from the symbol
113 table.
114 (elf_frob_file_before_adjust): Handle the list of version names.
115 * config/obj-elf.h (elf_visibility): New.
116 (elf_versioned_name_list): Likewise.
117 (elf_obj_sy): Change local to bitfield. Add rename, bad_version
118 and visibility. Change versioned_name pointer to struct
119 elf_versioned_name_list.
120 * doc/as.texi: Update .symver directive.
121 * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more
122 error checking tests.
123 * testsuite/gas/symver/symver6.d: New file.
124 * testsuite/gas/symver/symver7.d: Likewise.
125 * testsuite/gas/symver/symver7.s: Likewise.
126 * testsuite/gas/symver/symver8.d: Likewise.
127 * testsuite/gas/symver/symver8.s: Likewise.
128 * testsuite/gas/symver/symver9.s: Likewise.
129 * testsuite/gas/symver/symver9a.d: Likewise.
130 * testsuite/gas/symver/symver9b.d: Likewise.
131 * testsuite/gas/symver/symver10.s: Likewise.
132 * testsuite/gas/symver/symver10a.d: Likewise.
133 * testsuite/gas/symver/symver10b.d: Likewise.
134 * testsuite/gas/symver/symver11.d: Likewise.
135 * testsuite/gas/symver/symver11.s: Likewise.
136 * testsuite/gas/symver/symver12.d: Likewise.
137 * testsuite/gas/symver/symver12.s: Likewise.
138 * testsuite/gas/symver/symver13.d: Likewise.
139 * testsuite/gas/symver/symver13.s: Likewise.
140 * testsuite/gas/symver/symver14.d: Likewise.
141 * testsuite/gas/symver/symver14.l: Likewise.
142 * testsuite/gas/symver/symver15.d: Likewise.
143 * testsuite/gas/symver/symver15.l: Likewise.
144 * testsuite/gas/symver/symver6.l: Removed.
145 * testsuite/gas/symver/symver6.s: Updated.
146
c2e5c986
SD		 1472020-04-20 Sudakshina Das <sudi.das@arm.com>
148
149 * config/tc-aarch64.c (parse_barrier_psb): Update error messages
150 to include TSB.
151 * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
152 * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
153 * testsuite/gas/aarch64/system.d: Update.
154
8a6e1d1d
SD		 1552020-04-20 Sudakshina Das <sudi.das@arm.com>
156
157 * testsuite/gas/aarch64/bti.d: Update -march option.
158 * testsuite/gas/aarch64/illegal-bti.d: Remove.
159 * testsuite/gas/aarch64/illegal-bti.l: Remove.
160 * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
161 * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
162
49af2f5c
AM		 1632020-04-17 Alan Modra <amodra@gmail.com>
164
165 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
166
8e4979ac
NC		 1672020-04-16 Gagan Singh Sidhu <broly@mac.com>
168 Nick Clifton <nickc@redhat.com>
169
170 PR 25803
171 * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
172 targets.
173 * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
174 for the type-2 test.
175 * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
176 targets running this test.
177
c54a9b56
DF		 1782020-02-16 David Faust <david.faust@oracle.com>
179
180 * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
181 * testsuite/gas/bpf/jump32.s: New file.
182 * testsuite/gas/bpf/jump32.d: Likewise.
183
3071b197
L		 1842020-04-08 H.J. Lu <hongjiu.lu@intel.com>
185
186 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
187 documentation.
188
6a3ab923
GN		 1892020-04-08 Gunther Nikl <gnikl@justmail.de>
190
191 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
192 (md_pcrel_from): Remove prototytpe.
d9f19885
GN		 193 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
194 define.
195 (md_pcrel_from_section): Remove duplicate prototype.
9ad4cfa8
GN		 196 * tc.h (md_pcrel_from_section): Add prototype.
197 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
198 * config/tc-arc.h (md_pcrel_from_section): Likewise.
199 * config/tc-arm.h (md_pcrel_from_section): Likewise.
200 * config/tc-avr.h (md_pcrel_from_section): Likewise.
201 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
202 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
203 * config/tc-csky.h (md_pcrel_from_section): Likewise.
204 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
205 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
206 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
207 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
208 * config/tc-frv.h (md_pcrel_from_section): Likewise.
209 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
210 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
211 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
212 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
213 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
214 * config/tc-mep.h (md_pcrel_from_section): Likewise.
215 * config/tc-metag.h (md_pcrel_from_section): Likewise.
216 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
217 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
218 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
219 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
220 * config/tc-mt.h (md_pcrel_from_section): Likewise.
221 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
222 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
223 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
224 * config/tc-rx.h (md_pcrel_from_section): Likewise.
225 * config/tc-s390.h (md_pcrel_from_section): Likewise.
226 * config/tc-sh.h (md_pcrel_from_section): Likewise.
227 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
228 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
4c09b8c4
GN		 229 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
230 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
231 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
232 md_apply_fix3): Delete prototypes.
6a3ab923 233
6e0e8b45
L		 2342020-04-07 H.J. Lu <hongjiu.lu@intel.com>
235
236 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
237 instructions.
238
266803a2
L		 2392020-04-07 H.J. Lu <hongjiu.lu@intel.com>
240
241 * doc/c-z80.texi: Fix @xref warnings.
242
bb651e8b
CL		 2432020-04-07 Lili Cui <lili.cui@intel.com>
244
245 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
246 (cpu_noarch): Likewise.
247 * doc/c-i386.texi: Document TSXLDTRK.
248 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
249 * testsuite/gas/i386/tsxldtrk.d: Likewise.
250 * testsuite/gas/i386/tsxldtrk.s: Likewise.
251 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
252
4b27d27c
L		 2532020-04-02 Lili Cui <lili.cui@intel.com>
254
255 * config/tc-i386.c (cpu_arch): Add .serialize.
256 (cpu_noarch): Likewise.
257 * doc/c-i386.texi: Document serialize.
258 * testsuite/gas/i386/i386.exp: Run serialize tests
259 * testsuite/gas/i386/serialize.d: Likewise.
260 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
261 * testsuite/gas/i386/serialize.s: Likewise.
262
bb897477
RO		 2632020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
264
265 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
266 * testsuite/gas/elf/section12b.d: Likewise.
267 * testsuite/gas/elf/section16a.d: Likewise.
268 * testsuite/gas/elf/section16b.d: Likewise.
269
59e28a97
GN		 2702020-04-02 Gunther Nikl <gnikl@justmail.de>
271
272 * config/tc-m68k.c (m68k_ip): Fix range check for index register
273 with a suppressed address register.
274
efc3a950
L		 2752020-04-01 H.J. Lu <hongjiu.lu@intel.com>
276
277 PR gas/25756
278 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
279 * testsuite/gas/i386/localpic.s: Add a test for relocation
280 against local absolute symbol.
281 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
282 * testsuite/gas/i386/localpic.d: Updated.
283 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
284 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
285
15d47c3a
RO		 2862020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
287
288 PR gas/25732
289 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
290 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
291 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
292 testsuite/gas/i386/x86-64-jump.d.
293 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
294 Incorporate changes to
295 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
296 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
297 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
298 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
299 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
300
876678f0
MR		 3012020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
302
303 PR 25611
304 PR 25614
305 * dwarf2dbg.c: Do not include "bignum.h".
306
d1a89da5
NC		 3072020-03-30 Nelson Chu <nelson.chu@sifive.com>
308
309 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
310 * testsuite/gas/riscv/alias-csr.s: Likewise.
311 * testsuite/gas/riscv/no-aliases-csr.d: Move this
312 to priv-reg-pseudo-noalias.
313 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
314 * testsuite/gas/riscv/bad-csr.l: Likewise.
315 * testsuite/gas/riscv/bad-csr.s: Likewise.
316 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
317 * testsuite/gas/riscv/satp.s: Likewise.
318 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
319 csr instruction, including alias-csr testcase.
320 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
321 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
322 pseudo instruction with objdump -Mno-aliases.
323 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
324 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
325 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
326 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
327 * testsuite/gas/riscv/priv-reg.s: Likewise.
328 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
329 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
330 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
331
b7780957
J		 3322020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
333
334 * config/obj-coff.c (obj_coff_section): Set the bss flag on
335 sections with the "b" attribute.
336
d1023b5d
AM		 3372020-03-22 Alan Modra <amodra@gmail.com>
338
339 * testsuite/gas/s12z/truncated.d: Update expected output.
340
0d832e7f
SB		 3412020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
342
343 PR 25690
344 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
345 * doc/c-z80.texi: Update documentation.
346
327ef784
NC		 3472020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
348
349 PR 25641
350 PR 25668
351 PR 25633
352 Fix disassembling ED+A4/AC/B4/BC opcodes.
353 Fix assembling lines containing colonless label and instruction
354 with first operand inside parentheses.
355 Fix registration of unsupported by target CPU registers.
356 * config/tc-z80.c: See above.
357 * config/tc-z80.h: See above.
358 * testsuite/gas/z80/colonless.d: Update test.
359 * testsuite/gas/z80/colonless.s: Likewise.
360 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
361 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
362 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
363 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
364 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
365 * testsuite/gas/z80/unsup_regs.s: Likewise.
366 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
367 * testsuite/gas/z80/z80.exp: Likewise.
368 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
369 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
370 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
371
66d1f7cc
AV		 3722020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
373
374 PR 25660
375 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
376 (parse_operands): Handle new operand codes.
377 (do_neon_dyadic_long): Make shape check accept the scalar variants.
378 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
379 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
380 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
381 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
382 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
383 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
384 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
385
9e8f1c90
L		 3862020-03-11 H.J. Lu <hongjiu.lu@intel.com>
387
388 * NEWS: Mention x86 assembler options for CVE-2020-0551.
389
97b4a8f7
L		 3902020-03-11 H.J. Lu <hongjiu.lu@intel.com>
391
392 * testsuite/gas/i386/i386.exp: Run new tests.
393 * testsuite/gas/i386/lfence-byte.d: New file.
394 * testsuite/gas/i386/lfence-byte.e: Likewise.
395 * testsuite/gas/i386/lfence-byte.s: Likewise.
396 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
397 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
398 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
399 * testsuite/gas/i386/lfence-indbr.e: Likewise.
400 * testsuite/gas/i386/lfence-indbr.s: Likewise.
401 * testsuite/gas/i386/lfence-load.d: Likewise.
402 * testsuite/gas/i386/lfence-load.s: Likewise.
403 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
404 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
405 * testsuite/gas/i386/lfence-ret.s: Likewise.
406 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
407 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
408 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
409 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
410 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
411 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
412 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
413 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
414 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
415 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
416 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
417 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
418
ae531041
L		 4192020-03-11 H.J. Lu <hongjiu.lu@intel.com>
420
421 * config/tc-i386.c (lfence_after_load): New.
422 (lfence_before_indirect_branch_kind): New.
423 (lfence_before_indirect_branch): New.
424 (lfence_before_ret_kind): New.
425 (lfence_before_ret): New.
426 (last_insn): New.
427 (load_insn_p): New.
428 (insert_lfence_after): New.
429 (insert_lfence_before): New.
430 (md_assemble): Call insert_lfence_before and insert_lfence_after.
431 Set last_insn.
432 (OPTION_MLFENCE_AFTER_LOAD): New.
433 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
434 (OPTION_MLFENCE_BEFORE_RET): New.
435 (md_longopts): Add -mlfence-after-load=,
436 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
437 (md_parse_option): Handle -mlfence-after-load=,
438 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
439 (md_show_usage): Display -mlfence-after-load=,
440 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
441 (i386_cons_align): New.
442 * config/tc-i386.h (i386_cons_align): New.
443 (md_cons_align): New.
444 * doc/c-i386.texi: Document -mlfence-after-load=,
445 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
446
5496f3c6
NC		 4472020-03-11 Nick Clifton <nickc@redhat.com>
448
449 PR 25611
450 PR 25614
451 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
452 (DWARF2_FILE_SIZE_NAME): Default to -1.
453 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
454 whichever is higher.
455 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
456 (NUM_MD5_BYTES): Define.
457 (struct file entry): Add md5 field.
458 (get_filenum): Delete and replace with...
459 (get_basename): New function.
460 (get_directory_table_entry): New function.
461 (allocate_filenum): New function.
462 (allocate_filename_to_slot): New function.
463 (dwarf2_where): Use new functions.
464 (dwarf2_directive_filename): Add support for extended .file
465 pseudo-op.
466 (dwarf2_directive_loc): Allow the use of file number zero with
467 DWARF 5 or higher.
468 (out_file_list): Rename to...
469 (out_dir_and_file_list): Add DWARF 5 support.
470 (out_debug_line): Emit extra values into the section header for
471 DWARF 5.
472 (out_debug_str): Allow for file 0 to be used with DWARF 5.
473 * doc/as.texi (.file): Update the description of this pseudo-op.
474 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
475 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
476 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
477 * NEWS: Mention the new feature.
478
a6a1f5e0
AM		 4792020-03-10 Alan Modra <amodra@gmail.com>
480
481 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
482 to avoid signed overflow.
483 * config/tc-mcore.c (md_assemble): Likewise.
484 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
485 * config/tc-nds32.c (SET_ADDEND): Likewise.
486 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
487
3fabc179
JB		 4882020-03-09 Jan Beulich <jbeulich@suse.com>
489
490 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
491 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
492 testsuite/gas/i386/avx-intel.d: Adjust expectations.
493
190e5fc8
AM		 4942020-03-07 Alan Modra <amodra@gmail.com>
495
496 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
497 first column.
498
84d9ab33
NC		 4992020-03-06 Nick Clifton <nickc@redhat.com>
500
501 PR 25614
502 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
503 0 if the dwarf_level is 5 or more. Complain if a filename follows
504 a file 0.
505 * testsuite/gas/elf/dwarf-5-file0.s: New test.
506 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
507 * testsuite/gas/elf/elf.exp: Run the new test.
508
509 PR 25612
510 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
511 * doc/as.texi: Fix another typo.
512
31bf1864
NC		 5132020-03-06 Nick Clifton <nickc@redhat.com>
514
515 PR 25612
516 * as.c (dwarf_level): Define.
517 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
518 (parse_args): Add support for the new options.
519 as.h (dwarf_level): Prototype.
520 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
521 value.
522 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
523 (DWARF2_LINE_VERSION): Remove definition.
524 * doc/as.texi: Document the new options.
525
3c968de5
NC		 5262020-03-06 Nick Clifton <nickc@redhat.com>
527
528 PR 25572
529 * as.c (main): Allow matching input and outputs when they are
530 not regular files.
531
bc49bfd8
JB		 5322020-03-06 Jan Beulich <jbeulich@suse.com>
533
534 * config/tc-i386.c (match_mem_size): Generalize broadcast special
535 casing.
536 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
537 one of byte/word/dword/qword is set alongside a SIMD register in
538 a template's operand.
539
4873e243
JB		 5402020-03-06 Jan Beulich <jbeulich@suse.com>
541
542 * config/tc-i386.c (match_template): Extend code in logic
543 rejecting certain suffixes in certain modes to also cover mask
544 register use and VecSIB. Drop special casing of broadcast. Skip
545 immediates in the check.
546
e365e234
JB		 5472020-03-06 Jan Beulich <jbeulich@suse.com>
548
549 * config/tc-i386.c (match_template): Fold duplicate code in
550 logic rejecting certain suffixes in certain modes. Drop
551 pointless "else".
552
4ed21b58
JB		 5532020-03-06 Jan Beulich <jbeulich@suse.com>
554
555 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
556 alongside !norex64 ones.
557 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
558 with both 32- and 64-bit GPR operands.
559 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
560 32- and 64-bit GPR operands.
561 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
562 testsuite/gas/i386/x86-64-avx512bw.d,
563 testsuite/gas/i386/x86-64-avx512f-intel.d,
564 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
565
643bb870
JB		 5662020-03-06 Jan Beulich <jbeulich@suse.com>
567
568 * config/tc-i386.c (md_assemble): Drop use of rex64.
569 (process_suffix): For REX.W for 64-bit CRC32.
570
a23b33b3
JB		 5712020-03-06 Jan Beulich <jbeulich@suse.com>
572
573 * config/tc-i386.c (i386_addressing_mode): For 32-bit
574 addressing for MPX insns without base/index.
575 * testsuite/gas/i386/mpx-16bit.s,
576 * testsuite/gas/i386/mpx-16bit.d: New.
577 * testsuite/gas/i386/i386.exp: Run new test.
578
a0497384
JB		 5792020-03-06 Jan Beulich <jbeulich@suse.com>
580
581 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
582 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
583 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
584 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
585 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
586 as well as a BSWAP one.
587 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
588 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
589 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
590 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
591 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
592 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
593 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
594 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
595 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
596 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
597 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
598 testsuite/gas/i386/vmx.d: Adjust expectations.
599
b630c145
JB		 6002020-03-06 Jan Beulich <jbeulich@suse.com>
601
602 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
603 from having their operands swapped.
604 * testsuite/gas/i386/waitpkg.s,
605 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
606 3-operand cases as well as testing of 16-bit code generation.
607 * testsuite/gas/i386/waitpkg.d,
608 testsuite/gas/i386/waitpkg-intel.d,
609 testsuite/gas/i386/x86-64-waitpkg.d,
610 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
611
de48783e
NC		 6122020-03-04 Nelson Chu <nelson.chu@sifive.com>
613
dee35d02
NC		 614 * config/tc-riscv.c (percent_op_utype): Support the modifier
615 %got_pcrel_hi.
616 * doc/c-riscv.texi: Add documentation.
617 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
618 modifier %got_pcrel_hi.
619 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
620 * testsuite/gas/riscv/relax-reloc.d: Likewise.
621 * testsuite/gas/riscv/relax-reloc.s: Likewise.
622
de48783e
NC		 623 * doc/c-riscv.texi (relocation modifiers): Add documentation.
624 (RISC-V-Formats): Update the section name from "Instruction Formats"
625 to "RISC-V Instruction Formats".
626
749479c8
AO		 6272020-03-04 Alexandre Oliva <oliva@adacore.com>
628
629 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
630 detected in a section which does not have at least 4 byte
631 alignment.
632 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
633 * testsuite/gas/arm/ldr-t.s: Likewise.
634 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
635 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
636 disassembly, ignoring any NOPs that may have been inserted because
637 of section alignment.
638 * testsuite/gas/arm/ldr-t.d: Likewise.
639
a847e322
JB		 6402020-03-04 Jan Beulich <jbeulich@suse.com>
641
642 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
643 * doc/c-i386.texi: Mention sev_es.
644 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
645 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
646 expectations.
647 * testsuite/gas/i386/arch-13-znver1.d,
648 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
649
3cd7f3e3
L		 6502020-03-03 H.J. Lu <hongjiu.lu@intel.com>
651
652 * config/tc-i386.c (match_template): Replace ignoresize and
653 defaultsize with mnemonicsize.
654 (process_suffix): Likewise.
655
b8ba1385
SB		 6562020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
657
658 PR 25627
659 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
660 instruction LD IY,(HL).
661 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
662 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
663 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
664 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
665
10d97a0f
L		 6662020-03-03 H.J. Lu <hongjiu.lu@intel.com>
667
668 PR gas/25622
669 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
670 x86-64-default-suffix-avx.
671 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
672 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
673 * testsuite/gas/i386/noreg64.d: Updated.
674 * testsuite/gas/i386/noreg64.l: Likewise.
675 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
676 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
677 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
678
8326546e
SB		 6792020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
680
681 PR 25604
682 * config/tc-z80.c (contains_register): Prevent an illegal memory
683 access when checking an expression for a register name.
684
e3e896e6
AM		 6852020-03-03 Alan Modra <amodra@gmail.com>
686
687 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
688 support.
689
a4dd6c97
AM		 6902020-03-02 Alan Modra <amodra@gmail.com>
691
692 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
693 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
694 and .sbss sections.
695 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
696 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
697 (s3_s_score_lcomm): Likewise.
698 * config/tc-score7.c: Similarly.
699 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
700
dec7b24b
YS		 7012020-02-28 YunQiang Su <syq@debian.org>
702
703 PR gas/25539
704 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
705 to handle multi-labels.
706 (has_label_name): New.
707
cceb53b8
MM		 7082020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
709
710 * config/tc-arm.c (enum pred_instruction_type): Remove
711 NEUTRAL_IT_NO_VPT_INSN predication type.
712 (cxn_handle_predication): Modify to require condition suffixes.
713 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
714 * testsuite/gas/arm/cde-scalar.s: Update test.
715 * testsuite/gas/arm/cde-warnings.l: Update test.
716 * testsuite/gas/arm/cde-warnings.s: Update test.
717
da3ec71f
AM		 7182020-02-26 Alan Modra <amodra@gmail.com>
719
720 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
721 N_() on empty string.
722
42135cad
AM		 7232020-02-26 Alan Modra <amodra@gmail.com>
724
725 * read.c (read_a_source_file): Call strncpy with length one
726 less than size of original_case_string.
727
dc1e8a47
AM		 7282020-02-26 Alan Modra <amodra@gmail.com>
729
730 * config/obj-elf.c: Indent labels correctly.
731 * config/obj-macho.c: Likewise.
732 * config/tc-aarch64.c: Likewise.
733 * config/tc-alpha.c: Likewise.
734 * config/tc-arm.c: Likewise.
735 * config/tc-cr16.c: Likewise.
736 * config/tc-crx.c: Likewise.
737 * config/tc-frv.c: Likewise.
738 * config/tc-i386-intel.c: Likewise.
739 * config/tc-i386.c: Likewise.
740 * config/tc-ia64.c: Likewise.
741 * config/tc-mn10200.c: Likewise.
742 * config/tc-mn10300.c: Likewise.
743 * config/tc-nds32.c: Likewise.
744 * config/tc-riscv.c: Likewise.
745 * config/tc-s12z.c: Likewise.
746 * config/tc-xtensa.c: Likewise.
747 * config/tc-z80.c: Likewise.
748 * read.c: Likewise.
749 * symbols.c: Likewise.
750 * write.c: Likewise.
751
bd0cf5a6
NC		 7522020-02-20 Nelson Chu <nelson.chu@sifive.com>
753
54b2aec1
NC		 754 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
755 we are assembling instruction with CSR. Call riscv_csr_read_only_check
756 after parsing all arguments.
757 (enum csr_insn_type): New enum is used to classify the CSR instruction.
758 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
759 are used to check if we write a read-only CSR by the CSR instruction.
760 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
761 all CSR for the read-only CSR checking.
762 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
763 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
764 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
765 all CSR instructions for the read-only CSR checking.
766 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
767 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
768
2ca89224
NC		 769 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
770 (riscv_opts): Initialize it.
771 (reg_lookup_internal): Check the `riscv_opts.csr_check`
772 before doing the CSR checking.
773 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
774 (md_longopts): Add mcsr-check and mno-csr-check.
775 (md_parse_option): Handle new enum option values.
776 (s_riscv_option): Handle new long options.
777 * doc/c-riscv.texi: Add description for the new .option and assembler
778 options.
779 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
780 the CSR checking.
781 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
782
bd0cf5a6
NC		 783 * config/tc-riscv.c (csr_extra_hash): New.
784 (enum riscv_csr_class): New enum. Used to decide
785 whether or not this CSR is legal in the current ISA string.
786 (struct riscv_csr_extra): New structure to hold all extra information
787 of CSR.
788 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
789 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
790 Call hash_reg_name to insert CSR address into reg_names_hash.
791 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
792 Decide whether the CSR is valid according to the csr_extra_hash.
793 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
794 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
795 not a boolean. This is same as riscv_init_csr_hash, so keep the
796 consistent usage.
797 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
798 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
799 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
800 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
801 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
802 f-ext CSR are not allowed.
803 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
804 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
805 source file is `priv-reg.s`, and the ISA is rv64if, so the
806 rv32-only CSR are not allowed.
807 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
808
10a95fcc
AM		 8092020-02-21 Alan Modra <amodra@gmail.com>
810
811 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
812 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
813
dda2980f
AM		 8142020-02-21 Alan Modra <amodra@gmail.com>
815
816 PR 25569
817 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
818 on section size adjustment, instead perform another write if
819 exec header size is larger than section size.
820
bd3380bc
NC		 8212020-02-19 Nelson Chu <nelson.chu@sifive.com>
822
823 * doc/c-riscv.texi: Add the doc entries for -march-attr/
824 -mno-arch-attr command line options.
825
fa164239
JW		 8262020-02-19 Nelson Chu <nelson.chu@sifive.com>
827
828 * testsuite/gas/riscv/c-add-addi.d: New testcase.
829 * testsuite/gas/riscv/c-add-addi.s: Likewise.
830
fcaaac0a
SB		 8312020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
832
833 PR 25576
834 * config/tc-z80.c (md_parse_option): Do not use an underscore
835 prefix for local labels in SDCC compatability mode.
836 (z80_start_line_hook): Remove SDCC dollar label support.
837 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
838 * testsuite/gas/z80/sdcc.s: Likewise.
839
8402020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
841
842 PR 25517
843 * config/tc-z80.c: Add -march option.
844 * doc/as.texi: Update Z80 documentation.
845 * doc/c-z80.texi: Likewise.
846 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
847 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
848 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
849 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
850 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
851 * testsuite/gas/z80/gbz80_all.d: Likewise.
852 * testsuite/gas/z80/r800_extra.d: Likewise.
853 * testsuite/gas/z80/r800_ii8.d: Likewise.
854 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
855 * testsuite/gas/z80/sdcc.d: Likewise.
856 * testsuite/gas/z80/z180.d: Likewise.
857 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
858 * testsuite/gas/z80/z80_doc.d: Likewise.
859 * testsuite/gas/z80/z80_ii8.d: Likewise.
860 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
861 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
862 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
863 * testsuite/gas/z80/z80_sli.d: Likewise.
864 * testsuite/gas/z80/z80n_all.d: Likewise.
865 * testsuite/gas/z80/z80n_reloc.d: Likewise.
866
a7e12755
L		 8672020-02-19 H.J. Lu <hongjiu.lu@intel.com>
868
869 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
870 with GNU_PROPERTY_X86_FEATURE_2_MMX.
871 * testsuite/gas/i386/i386.exp: Run property-3 and
872 x86-64-property-3.
873 * testsuite/gas/i386/property-3.d: New file.
874 * testsuite/gas/i386/property-3.s: Likewise.
875 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
876
272a84b1
L		 8772020-02-17 H.J. Lu <hongjiu.lu@intel.com>
878
879 * config/tc-i386.c (cpu_arch): Add .popcnt.
880 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
881 Add a tab before @samp{.sse4a}.
882
c8f8eebc
JB		 8832020-02-17 Jan Beulich <jbeulich@suse.com>
884
885 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
886 for AddrPrefixOpReg templates. Combine the two pieces of
887 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
888 mode.
889
eedb0f2c
JB		 8902020-02-17 Jan Beulich <jbeulich@suse.com>
891
892 PR gas/14439
893 * config/tc-i386.c (md_assemble): Also suppress operand
894 swapping for MONITOR{,X} and MWAIT{,X}.
895 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
896 Add Intel syntax monitor/mwait tests.
897 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
898 Adjust expectations.
899 *testsuite/gas/i386/sse3-intel.d,
900 testsuite/gas/i386/x86-64-sse3-intel.d: New.
901 * testsuite/gas/i386/i386.exp: Run new tests.
902
b9915cbc
JB		 9032020-02-17 Jan Beulich <jbeulich@suse.com>
904
905 PR gas/6518
906 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
907 [XYZ]MMWord memory operand ambiguity recognition logic (largely
908 re-indentation).
909 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
910 cases.
911 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
912 * testsuite/gas/i386/avx512dq-inval.l,
913 testsuite/gas/i386/inval-avx.l,
914 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
915 * testsuite/gas/i386/avx512vl-ambig.s,
916 testsuite/gas/i386/avx512vl-ambig.l: New.
917 * testsuite/gas/i386/i386.exp: Run new test.
918
af5c13b0
L		 9192020-02-16 H.J. Lu <hongjiu.lu@intel.com>
920
921 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
922 nosse4.
923 * doc/c-i386.texi: Document sse4a and nosse4a.
924
07d98387
L		 9252020-02-14 H.J. Lu <hongjiu.lu@intel.com>
926
927 * doc/c-i386.texi: Remove the old movsx and movzx documentation
928 for AT&T syntax.
929
65fca059
JB		 9302020-02-14 Jan Beulich <jbeulich@suse.com>
931
932 PR gas/25438
933 * config/tc-i386.c (md_assemble): Move movsx/movzx special
934 casing ...
935 (process_suffix): ... here. Consider just the first operand
936 initially.
937 (check_long_reg): Drop opcode 0x63 special case again.
938 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
939 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
940 Move ambiguous operand size tests ...
941 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
942 testsuite/gas/i386/noreg64.s: ... here.
943 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
944 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
945 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
946 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
947 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
948 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
949 testsuite/gas/i386/x86-64-movsxd.d,
950 testsuite/gas/i386/x86-64-movsxd-intel.d,
951 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
952 Adjust expectations.
953 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
954 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
955 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
956 * testsuite/gas/i386/i386.exp: Run new tests.
957
b6773884
JB		 9582020-02-14 Jan Beulich <jbeulich@suse.com>
959
960 * config/tc-i386.c (process_operands): Also skip segment
961 override prefix emission if it matches an already present one.
962 * testsuite/gas/i386/prefix32.s: Add double segment override
963 cases.
964 * testsuite/gas/i386/prefix32.l: Adjust expectations.
965
92334ad2
JB		 9662020-02-14 Jan Beulich <jbeulich@suse.com>
967
968 * config/tc-i386.c (process_operands): Drop ineffectual segment
969 overrides when optimizing.
970 * testsuite/gas/i386/lea-optimize.d: New.
971 * testsuite/gas/i386/i386.exp: Run new test.
972
9732020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 974
975 * config/tc-i386.c (process_operands): Also check insn prefix
976 for ineffectual segment override warning. Don't cover possible
977 VEX/EVEX encoded insns there.
978 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
979 testsuite/gas/i386/lea.e: New.
980 * testsuite/gas/i386/i386.exp: Run new test.
981
0e6724de
L		 9822020-02-14 H.J. Lu <hongjiu.lu@intel.com>
983
984 PR gas/25438
985 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
986 syntax.
987
292676c1
L		 9882020-02-13 Fangrui Song <maskray@google.com>
989 H.J. Lu <hongjiu.lu@intel.com>
990
991 PR gas/25551
992 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
993 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
994 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
995 * testsuite/gas/i386/relax-5.d: New file.
996 * testsuite/gas/i386/relax-5.s: Likewise.
997 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
998 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
999
7deea9aa
JB		 10002020-02-13 Jan Beulich <jbeulich@suse.com>
1001
1002 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
1003 "nosse4" entry.
1004
6c0946d0
JB		 10052020-02-12 Jan Beulich <jbeulich@suse.com>
1006
1007 * config/tc-i386.c (avx512): New (at file scope), moved from
1008 (check_VecOperands): ... here.
1009 (process_suffix): Add [XYZ]MMword operand size handling.
1010 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
1011 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
1012 tests.
1013 * testsuite/gas/i386/avx512dq-inval.l,
1014 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
1015
5990e377
JB		 10162020-02-12 Jan Beulich <jbeulich@suse.com>
1017
1018 PR gas/24546
1019 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
1020 code only.
1021 * config/tc-i386-intel.c (i386_intel_operand): Also handle
1022 CALL/JMP in O_tbyte_ptr case.
1023 * doc/c-i386.texi: Mention far call and full pointer load ISA
1024 differences.
1025 * testsuite/gas/i386/x86-64-branch-3.s,
1026 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
1027 * testsuite/gas/i386/x86-64-branch-3.d,
1028 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
1029 * testsuite/gas/i386/x86-64-branch-5.l,
1030 testsuite/gas/i386/x86-64-branch-5.s: New.
1031 * testsuite/gas/i386/i386.exp: Run new test.
1032
9706160a
JB		 10332020-02-12 Jan Beulich <jbeulich@suse.com>
1034
1035 PR gas/25438
1036 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
1037 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
1038 64-bit-only warning.
1039 (check_word_reg): Consistently error on mismatching register
1040 size and suffix.
1041 * testsuite/gas/i386/general.s: Replace dword GPR with word one
1042 for movw. Replace suffix / GPR for orb.
1043 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
1044 byte GPRs as well as ones for inb/outb with a word accumulator.
1045 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
1046 testsuite/gas/i386/inval.l: Adjust expectations.
1047
5de4d9ef
JB		 10482020-02-12 Jan Beulich <jbeulich@suse.com>
1049
1050 * config/tc-i386.c (operand_type_register_match): Also fall
1051 through initial two if()-s when the template allows for a GPR
1052 operand. Adjust comment.
1053
50128d0c
JB		 10542020-02-11 Jan Beulich <jbeulich@suse.com>
1055
1056 (struct _i386_insn): New field "short_form".
1057 (optimize_encoding): Drop setting of shortform field.
1058 (process_suffix): Set i.short_form. Replace shortform use.
1059 (process_operands): Replace shortform use.
1060
1ed818b4
MM		 10612020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
1062
1063 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
1064 loop initial declaration.
1065
5aae9ae9
MM		 10662020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
1067
1068 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
1069 instructions that can have 5 arguments.
1070 (enum operand_parse_code): Add new operands.
1071 (parse_operands): Account for new operands.
1072 (S5): New macro.
1073 (enum neon_shape_el): Introduce P suffixes for coprocessor.
1074 (neon_select_shape): Account for P suffix.
1075 (LOW1): Move macro to global position.
1076 (HI4): Move macro to global position.
1077 (vcx_assign_vec_d): New.
1078 (vcx_assign_vec_m): New.
1079 (vcx_assign_vec_n): New.
1080 (enum vcx_reg_type): New.
1081 (vcx_get_reg_type): New.
1082 (vcx_size_pos): New.
1083 (vcx_vec_pos): New.
1084 (vcx_handle_shape): New.
1085 (vcx_ensure_register_in_range): New.
1086 (vcx_handle_register_arguments): New.
1087 (vcx_handle_insn_block): New.
1088 (vcx_handle_common_checks): New.
1089 (do_vcx1): New.
1090 (do_vcx2): New.
1091 (do_vcx3): New.
1092 * testsuite/gas/arm/cde-missing-fp.d: New test.
1093 * testsuite/gas/arm/cde-missing-fp.l: New test.
1094 * testsuite/gas/arm/cde-missing-mve.d: New test.
1095 * testsuite/gas/arm/cde-missing-mve.l: New test.
1096 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
1097 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
1098 * testsuite/gas/arm/cde-mve.s: New test.
1099 * testsuite/gas/arm/cde-warnings.l:
1100 * testsuite/gas/arm/cde-warnings.s:
1101 * testsuite/gas/arm/cde.d:
1102 * testsuite/gas/arm/cde.s:
1103
4934a27c
MM		 11042020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
1105 Matthew Malcomson <matthew.malcomson@arm.com>
1106
1107 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
1108 CDE coprocessor that can be enabled.
1109 (enum pred_instruction_type): New pred type.
1110 (BAD_NO_VPT): New error message.
1111 (BAD_CDE): New error message.
1112 (BAD_CDE_COPROC): New error message.
1113 (enum operand_parse_code): Add new immediate operands.
1114 (parse_operands): Account for new immediate operands.
1115 (check_cde_operand): New.
1116 (cde_coproc_enabled): New.
1117 (cde_coproc_pos): New.
1118 (cde_handle_coproc): New.
1119 (cxn_handle_predication): New.
1120 (do_custom_instruction_1): New.
1121 (do_custom_instruction_2): New.
1122 (do_custom_instruction_3): New.
1123 (do_cx1): New.
1124 (do_cx1a): New.
1125 (do_cx1d): New.
1126 (do_cx1da): New.
1127 (do_cx2): New.
1128 (do_cx2a): New.
1129 (do_cx2d): New.
1130 (do_cx2da): New.
1131 (do_cx3): New.
1132 (do_cx3a): New.
1133 (do_cx3d): New.
1134 (do_cx3da): New.
1135 (handle_pred_state): Define new IT block behaviour.
1136 (insns): Add newn CX*{,d}{,a} instructions.
1137 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
1138 Define new cdecp extension strings.
1139 * doc/c-arm.texi: Document new cdecp extension arguments.
1140 * testsuite/gas/arm/cde-scalar.d: New test.
1141 * testsuite/gas/arm/cde-scalar.s: New test.
1142 * testsuite/gas/arm/cde-warnings.d: New test.
1143 * testsuite/gas/arm/cde-warnings.l: New test.
1144 * testsuite/gas/arm/cde-warnings.s: New test.
1145 * testsuite/gas/arm/cde.d: New test.
1146 * testsuite/gas/arm/cde.s: New test.
1147
4b5aaf5f
L		 11482020-02-10 H.J. Lu <hongjiu.lu@intel.com>
1149
1150 PR gas/25516
1151 * config/tc-i386.c (intel64): Renamed to ...
1152 (isa64): This.
1153 (match_template): Accept Intel64 only instruction by default.
1154 (i386_displacement): Updated.
1155 (md_parse_option): Updated.
1156 * c-i386.texi: Update -mamd64/-mintel64 documentation.
1157 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
1158 -mamd64 to x86-64-sysenter-amd.
1159 * testsuite/gas/i386/x86-64-sysenter.d: New file.
1160
33176d91
AM		 11612020-02-10 Alan Modra <amodra@gmail.com>
1162
1163 * config/obj-elf.c (obj_elf_change_section): Error for section
1164 type, attr or entsize changes in assembly.
1165 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
1166 * testsuite/gas/elf/section5.l: Update.
1167
82194874
AM		 11682020-02-10 Alan Modra <amodra@gmail.com>
1169
1170 * output-file.c (output_file_close): Do a normal close when
1171 flag_always_generate_output.
1172 * write.c (write_object_file): Don't stop output when
1173 flag_always_generate_output.
1174
9fc0b501
SB		 11752020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
1176
1177 PR 25469
1178 * config/tc-z80.c: Add -gbz80 command line option to generate code
1179 for the GameBoy Z80. Add support for generating DWARF.
1180 * config/tc-z80.h: Add support for DWARF debug information
1181 generation.
1182 * doc/c-z80.texi: Document new command line option.
1183 * testsuite/gas/z80/gbz80_all.d: New file.
1184 * testsuite/gas/z80/gbz80_all.s: New file.
1185 * testsuite/gas/z80/z80.exp: Run the new tests.
1186 * testsuite/gas/z80/z80n_all.d: New file.
1187 * testsuite/gas/z80/z80n_all.s: New file.
1188 * testsuite/gas/z80/z80n_reloc.d: New file.
1189
b7d07216
L		 11902020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1191
1192 PR gas/25381
1193 * config/obj-elf.c (get_section): Also check
1194 linked_to_symbol_name.
1195 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1196 (obj_elf_parse_section_letters): Handle the 'o' flag.
1197 (build_group_lists): Renamed to ...
1198 (build_additional_section_info): This. Set elf_linked_to_section
1199 from map_head.linked_to_symbol_name.
1200 (elf_adjust_symtab): Updated.
1201 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1202 * doc/as.texi: Document the 'o' flag.
1203 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1204 * testsuite/gas/elf/section18.d: New file.
1205 * testsuite/gas/elf/section18.s: Likewise.
1206 * testsuite/gas/elf/section19.d: Likewise.
1207 * testsuite/gas/elf/section19.s: Likewise.
1208 * testsuite/gas/elf/section20.d: Likewise.
1209 * testsuite/gas/elf/section20.s: Likewise.
1210 * testsuite/gas/elf/section21.d: Likewise.
1211 * testsuite/gas/elf/section21.l: Likewise.
1212 * testsuite/gas/elf/section21.s: Likewise.
1213
5eb617a7
L		 12142020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1215
1216 * NEWS: Mention x86 assembler options to align branches for
1217 binutils 2.34.
1218
986ac314
L		 12192020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1220
1221 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1222 only for ELF targets.
1223 * testsuite/gas/i386/unique.d: Don't xfail.
1224 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1225
19234a6d
AM		 12262020-02-06 Alan Modra <amodra@gmail.com>
1227
1228 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1229 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1230
02e0be69
AM		 12312020-02-06 Alan Modra <amodra@gmail.com>
1232
1233 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1234 xfail, and rename test.
1235 * testsuite/gas/elf/section12b.d: Likewise.
1236 * testsuite/gas/elf/section16a.d: Likewise.
1237 * testsuite/gas/elf/section16b.d: Likewise.
1238
a8c4d40b
L		 12392020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1240
1241 PR gas/25380
1242 * config/obj-elf.c (section_match): Removed.
1243 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1244 section_id.
1245 (obj_elf_change_section): Replace info and group_name arguments
1246 with match_p. Also update the section ID and flags from match_p.
1247 (obj_elf_section): Handle "unique,N". Update call to
1248 obj_elf_change_section.
1249 * config/obj-elf.h (elf_section_match): New.
1250 (obj_elf_change_section): Updated.
1251 * config/tc-arm.c (start_unwind_section): Update call to
1252 obj_elf_change_section.
1253 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1254 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1255 (microblaze_s_sdata): Likewise.
1256 (microblaze_s_rdata): Likewise.
1257 (microblaze_s_bss): Likewise.
1258 * config/tc-mips.c (s_change_section): Likewise.
1259 * config/tc-msp430.c (msp430_profiler): Likewise.
1260 * config/tc-rx.c (parse_rx_section): Likewise.
1261 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1262 * doc/as.texi: Document "unique,N" in .section directive.
1263 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1264 * testsuite/gas/elf/section15.d: New file.
1265 * testsuite/gas/elf/section15.s: Likewise.
1266 * testsuite/gas/elf/section16.s: Likewise.
1267 * testsuite/gas/elf/section16a.d: Likewise.
1268 * testsuite/gas/elf/section16b.d: Likewise.
1269 * testsuite/gas/elf/section17.d: Likewise.
1270 * testsuite/gas/elf/section17.l: Likewise.
1271 * testsuite/gas/elf/section17.s: Likewise.
1272 * testsuite/gas/i386/unique.d: Likewise.
1273 * testsuite/gas/i386/unique.s: Likewise.
1274 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1275 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1276
575d37ae
L		 12772020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1278
1279 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1280
2384096c
G		 12812020-02-01 Anthony Green <green@moxielogic.com>
1282
1283 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1284
95441c43
SL		 12852020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1286
1287 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1288 %tls_ldo.
1289
d465d695
AV		 12902020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1291
1292 PR gas/25472
1293 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1294 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1295 +mve.
1296 * testsuite/gas/arm/mve_dsp.d: New test.
1297
d26cc8a9
NC		 12982020-01-31 Nick Clifton <nickc@redhat.com>
1299
1300 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1301 rather than BFD_RELOC_NONE.
1302
90e9955a
SP		 13032020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1304
1305 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1306 to support VLDMIA instruction for MVE.
1307 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1308 instruction for MVE.
1309 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1310 instruction for MVE.
1311 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1312 instruction for MVE.
1313 * testsuite/gas/arm/mve-ldst.d: New test.
1314 * testsuite/gas/arm/mve-ldst.s: Likewise.
1315
53943f32
NC		 13162020-01-31 Nick Clifton <nickc@redhat.com>
1317
1318 * po/fr.po: Updated French translation.
1319 * po/ru.po: Updated Russian translation.
1320
c3036ed0
RS		 13212020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1322
1323 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1324 .s for the movprfx.
1325 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1326 * testsuite/gas/aarch64/sve-movprfx_28.d,
1327 * testsuite/gas/aarch64/sve-movprfx_28.l,
1328 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1329
2ae4c703
JB		 13302020-01-30 Jan Beulich <jbeulich@suse.com>
1331
1332 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1333 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1334 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1335 Adjust expectations.
1336
bd434cc4
JM		 13372020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1338
1339 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1340 * testsuite/gas/bpf/alu-be.d: Likewise.
1341 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1342 * testsuite/gas/bpf/alu32-be.d: Likewise.
1343
aeab2b26
JB		 13442020-01-30 Jan Beulich <jbeulich@suse.com>
1345
1346 * testsuite/gas/i386/x86-64-branch-2.s,
1347 testsuite/gas/i386/x86-64-branch-4.s,
1348 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1349 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1350 testsuite/gas/i386/x86-64-branch-2.d,
1351 testsuite/gas/i386/x86-64-branch-4.l,
1352 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1353
873494c8
JB		 13542020-01-30 Jan Beulich <jbeulich@suse.com>
1355
1356 * config/tc-i386.c (process_suffix): .
1357 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1358 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1359 Add LRETQ case.
1360 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1361 suffix.
1362 testsuite/gas/i386/x86_64.s: Add RETF cases.
1363 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1364 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1365 testsuite/gas/i386/x86-64-opcode.d,
1366 testsuite/gas/i386/x86-64-suffix-intel.d,
1367 testsuite/gas/i386/x86-64-suffix.d,
1368 testsuite/gas/i386/x86_64-intel.d
1369 testsuite/gas/i386/x86_64.d: Adjust expectations.
1370 * testsuite/gas/i386/x86-64-suffix.e,
1371 testsuite/gas/i386/x86_64.e: New.
1372
62b3f548
JB		 13732020-01-30 Jan Beulich <jbeulich@suse.com>
1374
1375 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1376 special case.
1377
bc31405e
L		 13782020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1379
1380 PR binutils/25445
1381 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1382 movsxd.
1383 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1384 differences. Document movslq and movsxd.
1385 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1386 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1387 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1388 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1389 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1390 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1391 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1392 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1393 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1394 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1395 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1396
e3696f67
AM		 13972020-01-27 Alan Modra <amodra@gmail.com>
1398
1399 * testsuite/gas/all/gas.exp: Replace case statements with switch
1400 statements.
1401 * testsuite/gas/elf/elf.exp: Likewise.
1402 * testsuite/gas/macros/macros.exp: Likewise.
1403 * testsuite/lib/gas-defs.exp: Likewise.
1404
7568c93b
TC		 14052020-01-27 Tamar Christina <tamar.christina@arm.com>
1406
1407 PR 25403
1408 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1409 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1410
403d1bd9
JW		 14112020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1412
1413 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1414 s exts must be known, so rename *ok* to *fail*.
1415 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1416 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1417 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1418 above change.
1419 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1420 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1421
be4c5e58
L		 14222020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1423
1424 PR gas/25438
1425 * config/tc-i386.c (check_long_reg): Always disallow double word
1426 suffix in mnemonic with word general register.
1427 * testsuite/gas/i386/general.s: Replace word general register
1428 with double word general register for movl.
1429 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1430 register.
1431 * testsuite/gas/i386/general.l: Updated.
1432 * testsuite/gas/i386/inval.l: Likewise.
1433
9e7028aa
AM		 14342020-01-22 Alan Modra <amodra@gmail.com>
1435
1436 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1437 __tls_get_addr_desc and __tls_get_addr_opt.
1438
e3ed17f3
JB		 14392020-01-21 Jan Beulich <jbeulich@suse.com>
1440
1441 * testsuite/gas/i386/inval-crc32.s,
1442 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1443 * testsuite/gas/i386/inval-crc32.l,
1444 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1445
1a035124
JB		 14462020-01-21 Jan Beulich <jbeulich@suse.com>
1447
1448 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1449 generic code path. Deal with No_lSuf being set in a template.
1450 * testsuite/gas/i386/inval-crc32.l,
1451 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1452 instead of error(s) when operand size is ambiguous.
1453 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1454 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1455 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1456 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1457 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1458 Adjust expectations.
1459
c006a730
JB		 14602020-01-21 Jan Beulich <jbeulich@suse.com>
1461
1462 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1463 and an intel_syntax check. Re-write lack-of-suffix processing
1464 logic.
1465 * doc/c-i386.texi: Document operand size defaults for suffix-
1466 less AT&T syntax insns.
1467 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1468 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1469 testsuite/gas/i386/x86-64-avx-scalar.s,
1470 testsuite/gas/i386/x86-64-avx.s,
1471 testsuite/gas/i386/x86-64-bundle.s,
1472 testsuite/gas/i386/x86-64-intel64.s,
1473 testsuite/gas/i386/x86-64-lock-1.s,
1474 testsuite/gas/i386/x86-64-opcode.s,
1475 testsuite/gas/i386/x86-64-sse2avx.s,
1476 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1477 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1478 testsuite/gas/i386/x86-64-nops.s,
1479 testsuite/gas/i386/x86-64-ptwrite.s,
1480 testsuite/gas/i386/x86-64-simd.s,
1481 testsuite/gas/i386/x86-64-sse-noavx.s,
1482 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1483 insns.
1484 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1485 testsuite/gas/i386/noreg64.s: Add further tests.
1486 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1487 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1488 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1489 testsuite/gas/i386/sse-noavx.d,
1490 testsuite/gas/i386/x86-64-intel64.d,
1491 testsuite/gas/i386/x86-64-nops.d,
1492 testsuite/gas/i386/x86-64-opcode.d,
1493 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1494 testsuite/gas/i386/x86-64-ptwrite.d,
1495 testsuite/gas/i386/x86-64-simd-intel.d,
1496 testsuite/gas/i386/x86-64-simd-suffix.d,
1497 testsuite/gas/i386/x86-64-simd.d,
1498 testsuite/gas/i386/x86-64-sse-noavx.d
1499 testsuite/gas/i386/x86-64-suffix.d,
1500 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1501 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1502 testsuite/gas/i386/noreg64.l: New.
1503 * testsuite/gas/i386/i386.exp: Run new tests.
1504
c906a69a
JB		 15052020-01-21 Jan Beulich <jbeulich@suse.com>
1506
1507 * testsuite/gas/i386/avx512_bf16_vl.s,
1508 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1509 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1510 broadcast forms of VCVTNEPS2BF16.
1511 * testsuite/gas/i386/avx512_bf16_vl.d,
1512 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1513
26916852
NC		 15142020-01-20 Nick Clifton <nickc@redhat.com>
1515
1516 * po/uk.po: Updated Ukranian translation.
1517
14470f07
L		 15182020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1519
1520 PR ld/25416
1521 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1522 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1523 x32 object.
1524 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1525 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1526 R_X86_64_GOTPC32_TLSDESC relocation.
1527
1b1bb2c6
NC		 15282020-01-18 Nick Clifton <nickc@redhat.com>
1529
1530 * configure: Regenerate.
1531 * po/gas.pot: Regenerate.
1532
ae774686
NC		 15332020-01-18 Nick Clifton <nickc@redhat.com>
1534
1535 Binutils 2.34 branch created.
1536
42e04b36
L		 15372020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1538
1539 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1540 with vex_encoding_vex.
1541 (parse_insn): Likewise.
1542 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1543 and {vex3} documentation.
1544 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1545 {vex}.
1546 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1547
2da2eaf4
AV		 15482020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1549
1550 PR 25376
1551 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1552 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1553 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1554 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1555 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1556 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1557
45a4bb20
JB		 15582020-01-16 Jan Beulich <jbeulich@suse.com>
1559
1560 * config/tc-i386.c (match_template): Drop found_cpu_match local
1561 variable.
1562
4814632e
JB		 15632020-01-16 Jan Beulich <jbeulich@suse.com>
1564
1565 * testsuite/gas/i386/avx512dq-inval.l,
1566 testsuite/gas/i386/avx512dq-inval.s: New.
1567 * testsuite/gas/i386/i386.exp: Run new test.
1568
131cb553
JL		 15692020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1570
1571 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1572 relocations when the target is 430X, except when extracting part of an
1573 expression.
1574 (msp430_srcoperand): Adjust comment.
1575 Initialize the expp member of the msp430_operand_s struct as
1576 appropriate.
1577 (msp430_dstoperand): Likewise.
1578 * testsuite/gas/msp430/msp430.exp: Run new test.
1579 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1580 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1581
c24d0e8d
AM		 15822020-01-15 Alan Modra <amodra@gmail.com>
1583
1584 * configure.tgt: Add sparc-*-freebsd case.
1585
e44925ae
LC		 15862020-01-14 Lili Cui <lili.cui@intel.com>
1587
1588 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1589 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1590 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1591 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1592 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1593 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1594 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1595 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1596 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1597 * testsuite/gas/i386/align-branch-5.d: Likewise.
1598 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1599 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1600 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1601 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1602 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1603 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1604 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1605 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1606 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1607 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1608 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1609 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1610
7a6bf3be
SB		 16112020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1612
1613 PR 25377
1614 * config/tc-z80.c: Add support for half precision, single
1615 precision and double precision floating point values.
1616 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1617 * doc/as.texi: Add new z80 command line options.
1618 * doc/c-z80.texi: Document new z80 command line options.
1619 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1620 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1621 * testsuite/gas/z80/z80.exp: Run the new test.
1622 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1623 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1624 * testsuite/gas/z80/strings.d: Update expected output.
1625
82e9597c
MM		 16262020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1627
1628 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1629 dependency.
1630
5e4f7e05
CZ		 16312020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1632
1633 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1634 the CPU.
1635 * config/tc-arc.h: Add header if/defs.
1636 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1637
febda64f
AM		 16382020-01-13 Alan Modra <amodra@gmail.com>
1639
1640 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1641
5496abe1
AM		 16422020-01-13 Alan Modra <amodra@gmail.com>
1643
1644 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1645 insertion.
1646
ec4181f2
AM		 16472020-01-10 Alan Modra <amodra@gmail.com>
1648
1649 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1650 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1651
40c75bc8
SB		 16522020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1653
1654 PR 25224
1655 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1656 opcode byte values.
1657 (emit_ld_r_r): Likewise.
1658 (emit_ld_rr_m): Likewise.
1659 (emit_ld_rr_nn): Likewise.
1660
72aea328
JB		 16612020-01-09 Jan Beulich <jbeulich@suse.com>
1662
1663 * config/tc-i386.c (optimize_encoding): Add
1664 is_any_vex_encoding() invocations. Drop respective
1665 i.tm.extension_opcode == None checks.
1666
3f93af61
JB		 16672020-01-09 Jan Beulich <jbeulich@suse.com>
1668
1669 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1670 REX transformations. Correct comment indentation.
1671
7697afb6
JB		 16722020-01-09 Jan Beulich <jbeulich@suse.com>
1673
1674 * config/tc-i386.c (optimize_encoding): Generalize register
1675 transformation for TEST optimization.
1676
d835a58b
JB		 16772020-01-09 Jan Beulich <jbeulich@suse.com>
1678
1679 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1680 testsuite/gas/i386/x86-64-sysenter-amd.d,
1681 testsuite/gas/i386/x86-64-sysenter-amd.l,
1682 testsuite/gas/i386/x86-64-sysenter-intel.d,
1683 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1684 * testsuite/gas/i386/i386.exp: Run new tests.
1685
915808f6
NC		 16862020-01-08 Nick Clifton <nickc@redhat.com>
1687
1688 PR 25284
1689 * doc/as.texi (Align): Document the fact that all arguments can be
1690 omitted.
1691 (Balign): Likewise.
1692 (P2align): Likewise.
1693
f1f28025
NC		 16942020-01-08 Nick Clifton <nickc@redhat.com>
1695
1696 PR 14891
1697 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1698 already defined as a different symbol type.
1699 * testsuite/gas/elf/pr14891.s: New test source file.
1700 * testsuite/gas/elf/pr14891.d: New test driver.
1701 * testsuite/gas/elf/pr14891.s: New test expected error output.
1702 * testsuite/gas/elf/elf.exp: Run the new test.
1703
030a2e78
AM		 17042020-01-08 Alan Modra <amodra@gmail.com>
1705
1706 * config/tc-z8k.c (md_begin): Make idx unsigned.
1707 (get_specific): Likewise for this_index.
1708
2a1ebfb2
CZ		 17092020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1710
1711 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1712 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1713 (md_operand): Set X_md to absent.
1714 (arc_parse_name): Check for X_md.
1715
16d87673
SB		 17162020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1717
1718 PR 25311
1719 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1720 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1721 NO_STRING_ESCAPES.
1722 * read.c (next_char_of_string): Likewise.
1723 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1724 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1725
a2322019
NC		 17262020-01-03 Nick Clifton <nickc@redhat.com>
1727
1728 * po/sv.po: Updated Swedish translation.
1729
5437a02a
JB		 17302020-01-03 Jan Beulich <jbeulich@suse.com>
1731
1732 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1733 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1734
567dfba2
JB		 17352020-01-03 Jan Beulich <jbeulich@suse.com>
1736
1737 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1738 by-element usdot. Add 64-bit form tests for by-element sudot.
1739 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1740
8c45011a
JB		 17412020-01-03 Jan Beulich <jbeulich@suse.com>
1742
1743 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1744 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1745
f4950f76
JB		 17462020-01-03 Jan Beulich <jbeulich@suse.com>
1747
1748 * testsuite/gas/aarch64/f64mm.d,
1749 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1750
6655dba2
SB		 17512020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1752
1753 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1754 support for assembler code generated by SDCC. Add new relocation
1755 types. Add z80-elf target support.
1756 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1757 labels. Local labels starts from ".L".
1758 * NEWS: Mention the new support.
1759 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1760 * testsuite/gas/all/fwdexp.s: Likewise.
1761 * testsuite/gas/all/cond.l: Likewise.
1762 * testsuite/gas/all/cond.s: Likewise.
1763 * testsuite/gas/all/fwdexp.d: Likewise.
1764 * testsuite/gas/all/fwdexp.s: Likewise.
1765 * testsuite/gas/elf/section2.e-mips: Likewise.
1766 * testsuite/gas/elf/section2.l: Likewise.
1767 * testsuite/gas/elf/section2.s: Likewise.
1768 * testsuite/gas/macros/app1.d: Likewise.
1769 * testsuite/gas/macros/app1.s: Likewise.
1770 * testsuite/gas/macros/app2.d: Likewise.
1771 * testsuite/gas/macros/app2.s: Likewise.
1772 * testsuite/gas/macros/app3.d: Likewise.
1773 * testsuite/gas/macros/app3.s: Likewise.
1774 * testsuite/gas/macros/app4.d: Likewise.
1775 * testsuite/gas/macros/app4.s: Likewise.
1776 * testsuite/gas/macros/app4b.s: Likewise.
1777 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1778 * testsuite/gas/z80/z80.exp: Add new tests
1779 * testsuite/gas/z80/dollar.d: New file.
1780 * testsuite/gas/z80/dollar.s: New file.
1781 * testsuite/gas/z80/ez80_adl_all.d: New file.
1782 * testsuite/gas/z80/ez80_adl_all.s: New file.
1783 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1784 * testsuite/gas/z80/ez80_isuf.s: New file.
1785 * testsuite/gas/z80/ez80_z80_all.d: New file.
1786 * testsuite/gas/z80/ez80_z80_all.s: New file.
1787 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1788 * testsuite/gas/z80/r800_extra.d: New file.
1789 * testsuite/gas/z80/r800_extra.s: New file.
1790 * testsuite/gas/z80/r800_ii8.d: New file.
1791 * testsuite/gas/z80/r800_z80_doc.d: New file.
1792 * testsuite/gas/z80/z180.d: New file.
1793 * testsuite/gas/z80/z180.s: New file.
1794 * testsuite/gas/z80/z180_z80_doc.d: New file.
1795 * testsuite/gas/z80/z80_doc.d: New file.
1796 * testsuite/gas/z80/z80_doc.s: New file.
1797 * testsuite/gas/z80/z80_ii8.d: New file.
1798 * testsuite/gas/z80/z80_ii8.s: New file.
1799 * testsuite/gas/z80/z80_in_f_c.d: New file.
1800 * testsuite/gas/z80/z80_in_f_c.s: New file.
1801 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1802 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1803 * testsuite/gas/z80/z80_out_c_0.d: New file.
1804 * testsuite/gas/z80/z80_out_c_0.s: New file.
1805 * testsuite/gas/z80/z80_reloc.d: New file.
1806 * testsuite/gas/z80/z80_reloc.s: New file.
1807 * testsuite/gas/z80/z80_sli.d: New file.
1808 * testsuite/gas/z80/z80_sli.s: New file.
1809
a65b5de6
SN		 18102020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1811
1812 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1813 REGLIST_RN.
1814
b14ce8bf
AM		 18152020-01-01 Alan Modra <amodra@gmail.com>
1816
1817 Update year range in copyright notice of all files.
1818
0b114740 1819For older changes see ChangeLog-2019
3499769a 1820\f
0b114740 1821Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1822
1823Copying and distribution of this file, with or without modification,
1824are permitted in any medium without royalty provided the copyright
1825notice and this notice are preserved.
1826
1827Local Variables:
1828mode: change-log
1829left-margin: 8
1830fill-column: 74
1831version-control: never
1832End:
GDB Binutils - Deliverables
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