* dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ae424f82
JJ
12006-11-03 Jakub Jelinek <jakub@redhat.com>
2
9b8ae42e
JJ
3 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
4 personality and lsda.
5 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
6 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
7 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
8 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
9 (output_cie): Output personality including its encoding and LSDA encoding.
10 (output_fde): Output LSDA.
11 (select_cie_for_fde): Don't share CIE if personality, its encoding or
12 LSDA encoding are different. Copy the 3 fields from fde_entry to
13 cie_entry.
14 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
15
ae424f82
JJ
16 * subsegs.h (struct frchain): Add frch_cfi_data field.
17 * dw2gencfi.c: Include subsegs.h.
18 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
19 (struct frch_cfi_data): New type.
20 (unused_cfi_data): New variable.
21 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
22 and cfa_save_stack static vars into a structure pointed from
23 each frchain.
24 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
25 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
26 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
27 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
28 Likewise.
29
d1e50f8a
DJ
302006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
31
32 * config/tc-h8300.c (build_bytes): Fix const warning.
33
06d2da93
NC
342006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
35
36 * tc-score.c (do16_rdrs): Handle not! instruction especially.
37
3ba67470
PB
382006-10-31 Paul Brook <paul@codesourcery.com>
39
40 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
41 for EABIv4.
42
7a1d4c38
PB
432006-10-31 Paul Brook <paul@codesourcery.com>
44
45 gas/
46 * config/tc-arm.c (object_arch): New variable.
47 (s_arm_object_arch): New function.
48 (md_pseudo_table): Add object_arch.
49 (aeabi_set_public_attributes): Obey object_arch.
50 * doc/c-arm.texi: Document .object_arch.
51
b138abaa
NC
522006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
53
54 * tc-score.c (data_op2): Check invalid operands.
55 (my_get_expression): Const operand of some instructions can not be
56 symbol in assembly.
57 (get_insn_class_from_type): Handle instruction type Insn_internal.
58 (do_macro_ldst_label): Modify inst.type.
59 (Insn_PIC): Delete.
60 (data_op2): The immediate value in lw is 15 bit signed.
61
c79b7c30
RC
622006-10-29 Randolph Chung <tausq@debian.org>
63
64 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
65 (hppa_regname_to_dw2regnum): New funcions.
66 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
67 (tc_cfi_frame_initial_instructions)
68 (tc_regname_to_dw2regnum): Define.
69 (hppa_cfi_frame_initial_instructions)
70 (hppa_regname_to_dw2regnum): Declare.
71 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
72 (DWARF2_CIE_DATA_ALIGNMENT): Define.
73
e2785c44
NC
742006-10-29 Nick Clifton <nickc@redhat.com>
75
76 * config/tc-spu.c (md_assemble): Cast printf string size parameter
77 to int in order to avoid a compiler warning.
78
86157c20
AS
792006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
80
81 * config/tc-sh.c (md_assemble): Define size of branches.
82
ba5f0fda
BE
832006-10-26 Ben Elliston <bje@au.ibm.com>
84
85 * dw2gencfi.c (cfi_add_CFA_offset):
86 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
87
033cd5fd
BE
88 * write.c (chain_frchains_together_1): Assert that this function
89 never returns a pointer to the auto variable `dummy'.
90
e9f53129
AM
912006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
92 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
93 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
94 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
95 Alan Modra <amodra@bigpond.net.au>
96
97 * config/tc-spu.c: New file.
98 * config/tc-spu.h: New file.
99 * configure.tgt: Add SPU support.
100 * Makefile.am: Likewise. Run "make dep-am".
101 * Makefile.in: Regenerate.
102 * po/POTFILES.in: Regenerate.
103
7b383517
BE
1042006-10-25 Ben Elliston <bje@au.ibm.com>
105
106 * expr.c (expr): Replace O_add case in switch (op_left) explaining
107 why it can never occur.
108
ede602d7
AM
1092006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
110
111 * doc/c-ppc.texi (-mcell): Document.
112 * config/tc-ppc.c (parse_cpu): Parse -mcell.
113 (md_show_usage): Document -mcell.
114
7918206c
MM
1152006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
116
117 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
118
878bcc43
AM
1192006-10-23 Alan Modra <amodra@bigpond.net.au>
120
121 * config/tc-m68hc11.c (md_assemble): Quiet warning.
122
8620418b
MF
1232006-10-19 Mike Frysinger <vapier@gentoo.org>
124
125 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
126 (x86_64_section_letter): Likewise.
127
b3549761
NC
1282006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
129
130 * config/tc-score.c (build_relax_frag): Compute correct
131 tc_frag_data.fixp.
132
71a75f6f
MF
1332006-10-18 Roy Marples <uberlord@gentoo.org>
134
135 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
136 elf32-sparc as a viable target for the -32 switch and any target
137 starting with elf64-sparc as a viable target for the -64 switch.
138 (sparc_target_format): For 64-bit ELF flavoured output use
139 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
140 ELF_TARGET_FORMAT.
71a75f6f
MF
141 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
142
e1b5fdd4
L
1432006-10-17 H.J. Lu <hongjiu.lu@intel.com>
144
145 * configure: Regenerated.
146
f8ef9cd7
BS
1472006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
148
149 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
150 in addition to testing for '\n'.
151 (TC_EOL_IN_INSN): Provide a default definition if necessary.
152
eb1fe072
NC
1532006-10-13 Sterling Augstine <sterling@tensilica.com>
154
155 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
156 a disjoint DW_AT range.
157
ec6e49f4
NC
1582006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
159
160 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
161
036dc3f7
PB
1622006-10-08 Paul Brook <paul@codesourcery.com>
163
164 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
165 (parse_operands): Use parse_big_immediate for OP_NILO.
166 (neon_cmode_for_logic_imm): Try smaller element sizes.
167 (neon_cmode_for_move_imm): Ditto.
168 (do_neon_logic): Handle .i64 pseudo-op.
169
3bb0c887
AM
1702006-09-29 Alan Modra <amodra@bigpond.net.au>
171
172 * po/POTFILES.in: Regenerate.
173
ef05d495
L
1742006-09-28 H.J. Lu <hongjiu.lu@intel.com>
175
176 * config/tc-i386.h (CpuMNI): Renamed to ...
177 (CpuSSSE3): This.
178 (CpuUnknownFlags): Updated.
179 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
180 and PROCESSOR_MEROM with PROCESSOR_CORE2.
181 * config/tc-i386.c: Updated.
182 * doc/c-i386.texi: Likewise.
a70ae331 183
ef05d495
L
184 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
185
d8ad03e9
NC
1862006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
187
188 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
189
df3ca5a3
NC
1902006-09-27 Nick Clifton <nickc@redhat.com>
191
192 * output-file.c (output_file_close): Prevent an infinite loop
193 reporting that stdoutput could not be closed.
194
2d447fca
JM
1952006-09-26 Mark Shinwell <shinwell@codesourcery.com>
196 Joseph Myers <joseph@codesourcery.com>
197 Ian Lance Taylor <ian@wasabisystems.com>
198 Ben Elliston <bje@wasabisystems.com>
199
200 * config/tc-arm.c (arm_cext_iwmmxt2): New.
201 (enum operand_parse_code): New code OP_RIWR_I32z.
202 (parse_operands): Handle OP_RIWR_I32z.
203 (do_iwmmxt_wmerge): New function.
204 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
205 a register.
206 (do_iwmmxt_wrwrwr_or_imm5): New function.
207 (insns): Mark instructions as RIWR_I32z as appropriate.
208 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
209 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
210 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
211 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
212 (md_begin): Handle IWMMXT2.
213 (arm_cpus): Add iwmmxt2.
214 (arm_extensions): Likewise.
215 (arm_archs): Likewise.
216
ba83aca1
BW
2172006-09-25 Bob Wilson <bob.wilson@acm.org>
218
219 * doc/as.texinfo (Overview): Revise description of --keep-locals.
220 Add xref to "Symbol Names".
221 (L): Refer to "local symbols" instead of "local labels". Move
222 definition to "Symbol Names" section; add xref to that section.
223 (Symbol Names): Use "Local Symbol Names" section to define local
224 symbols. Add "Local Labels" heading for description of temporary
225 forward/backward labels, and refer to those as "local labels".
226
539e75ad
L
2272006-09-23 H.J. Lu <hongjiu.lu@intel.com>
228
229 PR binutils/3235
230 * config/tc-i386.c (match_template): Check address size prefix
231 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
232 operand.
233
5e02f92e
AM
2342006-09-22 Alan Modra <amodra@bigpond.net.au>
235
236 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
237
885afe7b
AM
2382006-09-22 Alan Modra <amodra@bigpond.net.au>
239
240 * as.h (as_perror): Delete declaration.
241 * gdbinit.in (as_perror): Delete breakpoint.
242 * messages.c (as_perror): Delete function.
243 * doc/internals.texi: Remove as_perror description.
244 * listing.c (listing_print: Don't use as_perror.
245 * output-file.c (output_file_create, output_file_close): Likewise.
246 * symbols.c (symbol_create, symbol_clone): Likewise.
247 * write.c (write_contents): Likewise.
248 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
249 * config/tc-tic54x.c (tic54x_mlib): Likewise.
250
3aeeedbb
AM
2512006-09-22 Alan Modra <amodra@bigpond.net.au>
252
253 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
254 (ppc_handle_align): New function.
255 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
256 (SUB_SEGMENT_ALIGN): Define as zero.
257
96e9638b
BW
2582006-09-20 Bob Wilson <bob.wilson@acm.org>
259
260 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
261 (Overview): Skip cross reference in man page.
262
99ad8390
NC
2632006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
264
265 * configure.in: Add new target x86_64-pc-mingw64.
266 * configure: Regenerate.
267 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
268 * config/obj-coff.h: Add handling for TE_PEP target specific code
269 and definitions.
99ad8390
NC
270 * config/tc-i386.c: Add new targets.
271 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
272 (x86_64_target_format): Add new method for setup proper default
273 target cpu mode.
99ad8390
NC
274 * config/te-pep.h: Add new target definition header.
275 (TE_PEP): New macro: Identifies new target architecture.
276 (COFF_WITH_pex64): Set proper includes in bfd.
277 * NEWS: Mention new target.
278
73332571
BS
2792006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
280
281 * config/bfin-parse.y (binary): Change sub of const to add of negated
282 const.
283
1c0d3aa6
NC
2842006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
285
286 * config/tc-score.c: New file.
287 * config/tc-score.h: Newf file.
288 * configure.tgt: Add Score target.
289 * Makefile.am: Add Score files.
290 * Makefile.in: Regenerate.
291 * NEWS: Mention new target support.
292
4fa3602b
PB
2932006-09-16 Paul Brook <paul@codesourcery.com>
294
295 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
296 * doc/c-arm.texi (movsp): Document offset argument.
297
16dd5e42
PB
2982006-09-16 Paul Brook <paul@codesourcery.com>
299
300 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
301 unsigned int to avoid 64-bit host problems.
302
c4ae04ce
BS
3032006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
304
305 * config/bfin-parse.y (binary): Do some more constant folding for
306 additions.
307
e5d4a5a6
JB
3082006-09-13 Jan Beulich <jbeulich@novell.com>
309
310 * input-file.c (input_file_give_next_buffer): Demote as_bad to
311 as_warn.
312
1a1219cb
AM
3132006-09-13 Alan Modra <amodra@bigpond.net.au>
314
315 PR gas/3165
316 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
317 in parens.
318
f79d9c1d
AM
3192006-09-13 Alan Modra <amodra@bigpond.net.au>
320
321 * input-file.c (input_file_open): Replace as_perror with as_bad
322 so that gas exits with error on file errors. Correct error
323 message.
324 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 325 * input-file.h: Update comment.
f79d9c1d 326
f512f76f
NC
3272006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
328
329 PR gas/3172
330 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
331 registers as a sub-class of wC registers.
332
8d79fd44
AM
3332006-09-11 Alan Modra <amodra@bigpond.net.au>
334
335 PR gas/3165
336 * config/tc-mips.h (enum dwarf2_format): Forward declare.
337 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
338 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
339 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
340
6258339f
NC
3412006-09-08 Nick Clifton <nickc@redhat.com>
342
343 PR gas/3129
344 * doc/as.texinfo (Macro): Improve documentation about separating
345 macro arguments from following text.
346
f91e006c
PB
3472006-09-08 Paul Brook <paul@codesourcery.com>
348
349 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
350
466bbf93
PB
3512006-09-07 Paul Brook <paul@codesourcery.com>
352
353 * config/tc-arm.c (parse_operands): Mark operand as present.
354
428e3f1f
PB
3552006-09-04 Paul Brook <paul@codesourcery.com>
356
357 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
358 (do_neon_dyadic_if_i_d): Avoid setting U bit.
359 (do_neon_mac_maybe_scalar): Ditto.
360 (do_neon_dyadic_narrow): Force operand type to NT_integer.
361 (insns): Remove out of date comments.
362
fb25138b
NC
3632006-08-29 Nick Clifton <nickc@redhat.com>
364
365 * read.c (s_align): Initialize the 'stopc' variable to prevent
366 compiler complaints about it being used without being
367 initialized.
368 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
369 s_float_space, s_struct, cons_worker, equals): Likewise.
370
5091343a
AM
3712006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
372
373 * ecoff.c (ecoff_directive_val): Fix message typo.
374 * config/tc-ns32k.c (convert_iif): Likewise.
375 * config/tc-sh64.c (shmedia_check_limits): Likewise.
376
1f2a7e38
BW
3772006-08-25 Sterling Augustine <sterling@tensilica.com>
378 Bob Wilson <bob.wilson@acm.org>
379
380 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
381 the state of the absolute_literals directive. Remove align frag at
382 the start of the literal pool position.
383
34135039
BW
3842006-08-25 Bob Wilson <bob.wilson@acm.org>
385
386 * doc/c-xtensa.texi: Add @group commands in examples.
387
74869ac7
BW
3882006-08-24 Bob Wilson <bob.wilson@acm.org>
389
390 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
391 (INIT_LITERAL_SECTION_NAME): Delete.
392 (lit_state struct): Remove segment names, init_lit_seg, and
393 fini_lit_seg. Add lit_prefix and current_text_seg.
394 (init_literal_head_h, init_literal_head): Delete.
395 (fini_literal_head_h, fini_literal_head): Delete.
396 (xtensa_begin_directive): Move argument parsing to
397 xtensa_literal_prefix function.
398 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
399 (xtensa_literal_prefix): Parse the directive argument here and
400 record it in the lit_prefix field. Remove code to derive literal
401 section names.
402 (linkonce_len): New.
403 (get_is_linkonce_section): Use linkonce_len. Check for any
404 ".gnu.linkonce.*" section, not just text sections.
405 (md_begin): Remove initialization of deleted lit_state fields.
406 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
407 to init_literal_head and fini_literal_head.
408 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
409 when traversing literal_head list.
410 (match_section_group): New.
411 (cache_literal_section): Rewrite to determine the literal section
412 name on the fly, create the section and return it.
413 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
414 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
415 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
416 Use xtensa_get_property_section from bfd.
417 (retrieve_xtensa_section): Delete.
418 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
419 description to refer to plural literal sections and add xref to
420 the Literal Directive section.
421 (Literal Directive): Describe new rules for deriving literal section
422 names. Add footnote for special case of .init/.fini with
423 --text-section-literals.
424 (Literal Prefix Directive): Replace old naming rules with xref to the
425 Literal Directive section.
426
87a1fd79
JM
4272006-08-21 Joseph Myers <joseph@codesourcery.com>
428
429 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
430 merging with previous long opcode.
431
7148cc28
NC
4322006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
433
434 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
435 * Makefile.in: Regenerate.
436 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
437 renamed. Adjust.
438
3e9e4fcf
JB
4392006-08-16 Julian Brown <julian@codesourcery.com>
440
441 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
442 to use ARM instructions on non-ARM-supporting cores.
443 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
444 mode automatically based on cpu variant.
445 (md_begin): Call above function.
446
267d2029
JB
4472006-08-16 Julian Brown <julian@codesourcery.com>
448
449 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
450 recognized in non-unified syntax mode.
451
4be041b2
TS
4522006-08-15 Thiemo Seufer <ths@mips.com>
453 Nigel Stephens <nigel@mips.com>
454 David Ung <davidu@mips.com>
455
456 * configure.tgt: Handle mips*-sde-elf*.
457
3a93f742
TS
4582006-08-12 Thiemo Seufer <ths@networkno.de>
459
460 * config/tc-mips.c (mips16_ip): Fix argument register handling
461 for restore instruction.
462
1737851b
BW
4632006-08-08 Bob Wilson <bob.wilson@acm.org>
464
465 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
466 (out_sleb128): New.
467 (out_fixed_inc_line_addr): New.
468 (process_entries): Use out_fixed_inc_line_addr when
469 DWARF2_USE_FIXED_ADVANCE_PC is set.
470 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
471
e14e52f8
DD
4722006-08-08 DJ Delorie <dj@redhat.com>
473
474 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
475 vs full symbols so that we never have more than one pointer value
476 for any given symbol in our symbol table.
477
802f5d9e
NC
4782006-08-08 Sterling Augustine <sterling@tensilica.com>
479
480 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
481 and emit DW_AT_ranges when code in compilation unit is not
482 contiguous.
483 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
484 is not contiguous.
485 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
486 (out_debug_ranges): New function to emit .debug_ranges section
487 when code is not contiguous.
488
720abc60
NC
4892006-08-08 Nick Clifton <nickc@redhat.com>
490
491 * config/tc-arm.c (WARN_DEPRECATED): Enable.
492
f0927246
NC
4932006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
494
495 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
496 only block.
497 (pe_directive_secrel) [TE_PE]: New function.
498 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
499 loc, loc_mark_labels.
500 [TE_PE]: Handle secrel32.
501 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
502 call.
503 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
504 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
505 (md_section_align): Only round section sizes here for AOUT
506 targets.
507 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
508 (tc_pe_dwarf2_emit_offset): New function.
509 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
510 (cons_fix_new_arm): Handle O_secrel.
511 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
512 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
513 of OBJ_ELF only block.
514 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
515 tc_pe_dwarf2_emit_offset.
516
55e6e397
RS
5172006-08-04 Richard Sandiford <richard@codesourcery.com>
518
519 * config/tc-sh.c (apply_full_field_fix): New function.
520 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
521 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
522 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
523 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
524
9cd19b17
NC
5252006-08-03 Nick Clifton <nickc@redhat.com>
526
527 PR gas/2991
528 * config.in: Regenerate.
529
97f87066
JM
5302006-08-03 Joseph Myers <joseph@codesourcery.com>
531
532 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 533 for OP_RIWR_RIWC.
97f87066 534
41adaa5c
JM
5352006-08-03 Joseph Myers <joseph@codesourcery.com>
536
537 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
538 (parse_operands): Handle it.
539 (insns): Use it for tmcr and tmrc.
540
9d7cbccd
NC
5412006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
542
543 PR binutils/2983
544 * config/tc-i386.c (md_parse_option): Treat any target starting
545 with elf64_x86_64 as a viable target for the -64 switch.
546 (i386_target_format): For 64-bit ELF flavoured output use
547 ELF_TARGET_FORMAT64.
548 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
549
c973bc5c
NC
5502006-08-02 Nick Clifton <nickc@redhat.com>
551
552 PR gas/2991
553 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
554 bfd/aclocal.m4.
555 * configure.in: Run BFD_BINARY_FOPEN.
556 * configure: Regenerate.
557 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
558 file to include.
559
cfde7f70
L
5602006-08-01 H.J. Lu <hongjiu.lu@intel.com>
561
562 * config/tc-i386.c (md_assemble): Don't update
563 cpu_arch_isa_flags.
564
b4c71f56
TS
5652006-08-01 Thiemo Seufer <ths@mips.com>
566
567 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
568
54f4ddb3
TS
5692006-08-01 Thiemo Seufer <ths@mips.com>
570
571 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
572 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
573 BFD_RELOC_32 and BFD_RELOC_16.
574 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
575 md_convert_frag, md_obj_end): Fix comment formatting.
576
d103cf61
TS
5772006-07-31 Thiemo Seufer <ths@mips.com>
578
579 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
580 handling for BFD_RELOC_MIPS16_JMP.
581
601e61cd
NC
5822006-07-24 Andreas Schwab <schwab@suse.de>
583
584 PR/2756
585 * read.c (read_a_source_file): Ignore unknown text after line
586 comment character. Fix misleading comment.
587
b45619c0
NC
5882006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
589
590 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
591 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
592 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
593 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
594 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
595 doc/c-z80.texi, doc/internals.texi: Fix some typos.
596
784906c5
NC
5972006-07-21 Nick Clifton <nickc@redhat.com>
598
599 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
600 linker testsuite.
601
d5f010e9
TS
6022006-07-20 Thiemo Seufer <ths@mips.com>
603 Nigel Stephens <nigel@mips.com>
604
605 * config/tc-mips.c (md_parse_option): Don't infer optimisation
606 options from debug options.
607
35d3d567
TS
6082006-07-20 Thiemo Seufer <ths@mips.com>
609
610 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
611 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
612
401a54cf
PB
6132006-07-19 Paul Brook <paul@codesourcery.com>
614
615 * config/tc-arm.c (insns): Fix rbit Arm opcode.
616
16805f35
PB
6172006-07-18 Paul Brook <paul@codesourcery.com>
618
619 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
620 (md_convert_frag): Use correct reloc for add_pc. Use
621 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
622 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
623 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
624
d9e05e4e
AM
6252006-07-17 Mat Hostetter <mat@lcs.mit.edu>
626
627 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
628 when file and line unknown.
629
f43abd2b
TS
6302006-07-17 Thiemo Seufer <ths@mips.com>
631
632 * read.c (s_struct): Use IS_ELF.
633 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
634 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
635 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
636 s_mips_mask): Likewise.
637
a2902af6
TS
6382006-07-16 Thiemo Seufer <ths@mips.com>
639 David Ung <davidu@mips.com>
640
641 * read.c (s_struct): Handle ELF section changing.
642 * config/tc-mips.c (s_align): Leave enabling auto-align to the
643 generic code.
644 (s_change_sec): Try section changing only if we output ELF.
645
d32cad65
L
6462006-07-15 H.J. Lu <hongjiu.lu@intel.com>
647
648 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
649 CpuAmdFam10.
650 (smallest_imm_type): Remove Cpu086.
651 (i386_target_format): Likewise.
652
653 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
654 Update CpuXXX.
655
050dfa73
MM
6562006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
657 Michael Meissner <michael.meissner@amd.com>
658
659 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
660 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
661 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
662 architecture.
663 (i386_align_code): Ditto.
664 (md_assemble_code): Add support for insertq/extrq instructions,
665 swapping as needed for intel syntax.
666 (swap_imm_operands): New function to swap immediate operands.
667 (swap_operands): Deal with 4 operand instructions.
668 (build_modrm_byte): Add support for insertq instruction.
669
6b2de085
L
6702006-07-13 H.J. Lu <hongjiu.lu@intel.com>
671
672 * config/tc-i386.h (Size64): Fix a typo in comment.
673
01eaea5a
NC
6742006-07-12 Nick Clifton <nickc@redhat.com>
675
676 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 677 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
678 already been checked here.
679
1e85aad8
JW
6802006-07-07 James E Wilson <wilson@specifix.com>
681
682 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
683
1370e33d
NC
6842006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
685 Nick Clifton <nickc@redhat.com>
686
687 PR binutils/2877
688 * doc/as.texi: Fix spelling typo: branchs => branches.
689 * doc/c-m68hc11.texi: Likewise.
690 * config/tc-m68hc11.c: Likewise.
691 Support old spelling of command line switch for backwards
692 compatibility.
693
5f0fe04b
TS
6942006-07-04 Thiemo Seufer <ths@mips.com>
695 David Ung <davidu@mips.com>
696
697 * config/tc-mips.c (s_is_linkonce): New function.
698 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
699 weak, external, and linkonce symbols.
700 (pic_need_relax): Use s_is_linkonce.
701
85234291
L
7022006-06-24 H.J. Lu <hongjiu.lu@intel.com>
703
704 * doc/as.texinfo (Org): Remove space.
705 (P2align): Add "@var{abs-expr},".
706
ccc9c027
L
7072006-06-23 H.J. Lu <hongjiu.lu@intel.com>
708
709 * config/tc-i386.c (cpu_arch_tune_set): New.
710 (cpu_arch_isa): Likewise.
711 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
712 nops with short or long nop sequences based on -march=/.arch
713 and -mtune=.
714 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
715 set cpu_arch_tune and cpu_arch_tune_flags.
716 (md_parse_option): For -march=, set cpu_arch_isa and set
717 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
718 0. Set cpu_arch_tune_set to 1 for -mtune=.
719 (i386_target_format): Don't set cpu_arch_tune.
720
d4dc2f22
TS
7212006-06-23 Nigel Stephens <nigel@mips.com>
722
723 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
724 generated .sbss.* and .gnu.linkonce.sb.*.
725
a8dbcb85
TS
7262006-06-23 Thiemo Seufer <ths@mips.com>
727 David Ung <davidu@mips.com>
728
729 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
730 label_list.
731 * config/tc-mips.c (label_list): Define per-segment label_list.
732 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
733 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
734 mips_from_file_after_relocs, mips_define_label): Use per-segment
735 label_list.
736
3994f87e
TS
7372006-06-22 Thiemo Seufer <ths@mips.com>
738
739 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
740 (append_insn): Use it.
741 (md_apply_fix): Whitespace formatting.
742 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
743 mips16_extended_frag): Remove register specifier.
744 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
745 constants.
746
fa073d69
MS
7472006-06-21 Mark Shinwell <shinwell@codesourcery.com>
748
749 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
750 a directive saving VFP registers for ARMv6 or later.
751 (s_arm_unwind_save): Add parameter arch_v6 and call
752 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
753 appropriate.
754 (md_pseudo_table): Add entry for new "vsave" directive.
755 * doc/c-arm.texi: Correct error in example for "save"
756 directive (fstmdf -> fstmdx). Also document "vsave" directive.
757
8e77b565 7582006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
759 Anatoly Sokolov <aesok@post.ru>
760
a70ae331
AM
761 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
762 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
763 atmega164p/atmega324p.
764 * doc/c-avr.texi: Document new mcu and arch options.
765
8b1ad454
NC
7662006-06-17 Nick Clifton <nickc@redhat.com>
767
768 * config/tc-arm.c (enum parse_operand_result): Move outside of
769 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
770
9103f4f4
L
7712006-06-16 H.J. Lu <hongjiu.lu@intel.com>
772
773 * config/tc-i386.h (processor_type): New.
774 (arch_entry): Add type.
775
776 * config/tc-i386.c (cpu_arch_tune): New.
777 (cpu_arch_tune_flags): Likewise.
778 (cpu_arch_isa_flags): Likewise.
779 (cpu_arch): Updated.
780 (set_cpu_arch): Also update cpu_arch_isa_flags.
781 (md_assemble): Update cpu_arch_isa_flags.
782 (OPTION_MARCH): New.
783 (OPTION_MTUNE): Likewise.
784 (md_longopts): Add -march= and -mtune=.
785 (md_parse_option): Support -march= and -mtune=.
786 (md_show_usage): Add -march=CPU/-mtune=CPU.
787 (i386_target_format): Also update cpu_arch_isa_flags,
788 cpu_arch_tune and cpu_arch_tune_flags.
789
790 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
791
792 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
793
4962c51a
MS
7942006-06-15 Mark Shinwell <shinwell@codesourcery.com>
795
796 * config/tc-arm.c (enum parse_operand_result): New.
797 (struct group_reloc_table_entry): New.
798 (enum group_reloc_type): New.
799 (group_reloc_table): New array.
800 (find_group_reloc_table_entry): New function.
801 (parse_shifter_operand_group_reloc): New function.
802 (parse_address_main): New function, incorporating code
803 from the old parse_address function. To be used via...
804 (parse_address): wrapper for parse_address_main; and
805 (parse_address_group_reloc): new function, likewise.
806 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
807 OP_ADDRGLDRS, OP_ADDRGLDC.
808 (parse_operands): Support for these new operand codes.
809 New macro po_misc_or_fail_no_backtrack.
810 (encode_arm_cp_address): Preserve group relocations.
811 (insns): Modify to use the above operand codes where group
812 relocations are permitted.
813 (md_apply_fix): Handle the group relocations
814 ALU_PC_G0_NC through LDC_SB_G2.
815 (tc_gen_reloc): Likewise.
816 (arm_force_relocation): Leave group relocations for the linker.
817 (arm_fix_adjustable): Likewise.
818
cd2f129f
JB
8192006-06-15 Julian Brown <julian@codesourcery.com>
820
821 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
822 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
823 relocs properly.
824
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L
8252006-06-12 H.J. Lu <hongjiu.lu@intel.com>
826
827 * config/tc-i386.c (process_suffix): Don't add rex64 for
828 "xchg %rax,%rax".
829
1787fe5b
TS
8302006-06-09 Thiemo Seufer <ths@mips.com>
831
832 * config/tc-mips.c (mips_ip): Maintain argument count.
833
96f989c2
AM
8342006-06-09 Alan Modra <amodra@bigpond.net.au>
835
836 * config/tc-iq2000.c: Include sb.h.
837
7c752c2a
TS
8382006-06-08 Nigel Stephens <nigel@mips.com>
839
840 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
841 aliases for better compatibility with SGI tools.
842
03bf704f
AM
8432006-06-08 Alan Modra <amodra@bigpond.net.au>
844
845 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
846 * Makefile.am (GASLIBS): Expand @BFDLIB@.
847 (BFDVER_H): Delete.
848 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
849 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
850 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
851 Run "make dep-am".
852 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
853 * Makefile.in: Regenerate.
854 * doc/Makefile.in: Regenerate.
855 * configure: Regenerate.
856
6648b7cf
JM
8572006-06-07 Joseph S. Myers <joseph@codesourcery.com>
858
859 * po/Make-in (pdf, ps): New dummy targets.
860
037e8744
JB
8612006-06-07 Julian Brown <julian@codesourcery.com>
862
863 * config/tc-arm.c (stdarg.h): include.
864 (arm_it): Add uncond_value field. Add isvec and issingle to operand
865 array.
866 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
867 REG_TYPE_NSDQ (single, double or quad vector reg).
868 (reg_expected_msgs): Update.
869 (BAD_FPU): Add macro for unsupported FPU instruction error.
870 (parse_neon_type): Support 'd' as an alias for .f64.
871 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
872 sets of registers.
873 (parse_vfp_reg_list): Don't update first arg on error.
874 (parse_neon_mov): Support extra syntax for VFP moves.
875 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
876 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
877 (parse_operands): Support isvec, issingle operands fields, new parse
878 codes above.
879 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
880 msr variants.
881 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
882 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
883 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
884 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
885 shapes.
886 (neon_shape): Redefine in terms of above.
887 (neon_shape_class): New enumeration, table of shape classes.
888 (neon_shape_el): New enumeration. One element of a shape.
889 (neon_shape_el_size): Register widths of above, where appropriate.
890 (neon_shape_info): New struct. Info for shape table.
891 (neon_shape_tab): New array.
892 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
893 (neon_check_shape): Rewrite as...
894 (neon_select_shape): New function to classify instruction shapes,
895 driven by new table neon_shape_tab array.
896 (neon_quad): New function. Return 1 if shape should set Q flag in
897 instructions (or equivalent), 0 otherwise.
898 (type_chk_of_el_type): Support F64.
899 (el_type_of_type_chk): Likewise.
900 (neon_check_type): Add support for VFP type checking (VFP data
901 elements fill their containing registers).
902 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
903 in thumb mode for VFP instructions.
904 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
905 and encode the current instruction as if it were that opcode.
906 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
907 arguments, call function in PFN.
908 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
909 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
910 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
911 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
912 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
913 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
914 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
915 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
916 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
917 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
918 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
919 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
920 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
921 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
922 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
923 neon_quad.
924 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
925 between VFP and Neon turns out to belong to Neon. Perform
926 architecture check and fill in condition field if appropriate.
927 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
928 (do_neon_cvt): Add support for VFP variants of instructions.
929 (neon_cvt_flavour): Extend to cover VFP conversions.
930 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
931 vmov variants.
932 (do_neon_ldr_str): Handle single-precision VFP load/store.
933 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
934 NS_NULL not NS_IGNORE.
935 (opcode_tag): Add OT_csuffixF for operands which either take a
936 conditional suffix, or have 0xF in the condition field.
937 (md_assemble): Add support for OT_csuffixF.
938 (NCE): Replace macro with...
939 (NCE_tag, NCE, NCEF): New macros.
940 (nCE): Replace macro with...
941 (nCE_tag, nCE, nCEF): New macros.
942 (insns): Add support for VFP insns or VFP versions of insns msr,
943 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
944 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
945 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
946 VFP/Neon insns together.
947
ebd1c875
AM
9482006-06-07 Alan Modra <amodra@bigpond.net.au>
949 Ladislav Michl <ladis@linux-mips.org>
950
951 * app.c: Don't include headers already included by as.h.
952 * as.c: Likewise.
953 * atof-generic.c: Likewise.
954 * cgen.c: Likewise.
955 * dwarf2dbg.c: Likewise.
956 * expr.c: Likewise.
957 * input-file.c: Likewise.
958 * input-scrub.c: Likewise.
959 * macro.c: Likewise.
960 * output-file.c: Likewise.
961 * read.c: Likewise.
962 * sb.c: Likewise.
963 * config/bfin-lex.l: Likewise.
964 * config/obj-coff.h: Likewise.
965 * config/obj-elf.h: Likewise.
966 * config/obj-som.h: Likewise.
967 * config/tc-arc.c: Likewise.
968 * config/tc-arm.c: Likewise.
969 * config/tc-avr.c: Likewise.
970 * config/tc-bfin.c: Likewise.
971 * config/tc-cris.c: Likewise.
972 * config/tc-d10v.c: Likewise.
973 * config/tc-d30v.c: Likewise.
974 * config/tc-dlx.h: Likewise.
975 * config/tc-fr30.c: Likewise.
976 * config/tc-frv.c: Likewise.
977 * config/tc-h8300.c: Likewise.
978 * config/tc-hppa.c: Likewise.
979 * config/tc-i370.c: Likewise.
980 * config/tc-i860.c: Likewise.
981 * config/tc-i960.c: Likewise.
982 * config/tc-ip2k.c: Likewise.
983 * config/tc-iq2000.c: Likewise.
984 * config/tc-m32c.c: Likewise.
985 * config/tc-m32r.c: Likewise.
986 * config/tc-maxq.c: Likewise.
987 * config/tc-mcore.c: Likewise.
988 * config/tc-mips.c: Likewise.
989 * config/tc-mmix.c: Likewise.
990 * config/tc-mn10200.c: Likewise.
991 * config/tc-mn10300.c: Likewise.
992 * config/tc-msp430.c: Likewise.
993 * config/tc-mt.c: Likewise.
994 * config/tc-ns32k.c: Likewise.
995 * config/tc-openrisc.c: Likewise.
996 * config/tc-ppc.c: Likewise.
997 * config/tc-s390.c: Likewise.
998 * config/tc-sh.c: Likewise.
999 * config/tc-sh64.c: Likewise.
1000 * config/tc-sparc.c: Likewise.
1001 * config/tc-tic30.c: Likewise.
1002 * config/tc-tic4x.c: Likewise.
1003 * config/tc-tic54x.c: Likewise.
1004 * config/tc-v850.c: Likewise.
1005 * config/tc-vax.c: Likewise.
1006 * config/tc-xc16x.c: Likewise.
1007 * config/tc-xstormy16.c: Likewise.
1008 * config/tc-xtensa.c: Likewise.
1009 * config/tc-z80.c: Likewise.
1010 * config/tc-z8k.c: Likewise.
1011 * macro.h: Don't include sb.h or ansidecl.h.
1012 * sb.h: Don't include stdio.h or ansidecl.h.
1013 * cond.c: Include sb.h.
1014 * itbl-lex.l: Include as.h instead of other system headers.
1015 * itbl-parse.y: Likewise.
1016 * itbl-ops.c: Similarly.
1017 * itbl-ops.h: Don't include as.h or ansidecl.h.
1018 * config/bfin-defs.h: Don't include bfd.h or as.h.
1019 * config/bfin-parse.y: Include as.h instead of other system headers.
1020
9622b051
AM
10212006-06-06 Ben Elliston <bje@au.ibm.com>
1022 Anton Blanchard <anton@samba.org>
1023
1024 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1025 (md_show_usage): Document it.
1026 (ppc_setup_opcodes): Test power6 opcode flag bits.
1027 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1028
65263ce3
TS
10292006-06-06 Thiemo Seufer <ths@mips.com>
1030 Chao-ying Fu <fu@mips.com>
1031
1032 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1033 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1034 (macro_build): Update comment.
1035 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1036 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1037 CPU_HAS_MDMX.
1038 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1039 MIPS_CPU_ASE_MDMX flags for sb1.
1040
a9e24354
TS
10412006-06-05 Thiemo Seufer <ths@mips.com>
1042
1043 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1044 appropriate.
1045 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1046 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1047 and MT instructions a fatal error. Use INSERT_OPERAND where
1048 appropriate. Improve warnings for break and wait code overflows.
1049 Use symbolic constant of OP_MASK_COPZ.
1050 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1051
4cfe2c59
DJ
10522006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1053
1054 * po/Make-in (top_builddir): Define.
1055
e10fad12
JM
10562006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1057
1058 * doc/Makefile.am (TEXI2DVI): Define.
1059 * doc/Makefile.in: Regenerate.
1060 * doc/c-arc.texi: Fix typo.
1061
12e64c2c
AM
10622006-06-01 Alan Modra <amodra@bigpond.net.au>
1063
1064 * config/obj-ieee.c: Delete.
1065 * config/obj-ieee.h: Delete.
1066 * Makefile.am (OBJ_FORMATS): Remove ieee.
1067 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1068 (obj-ieee.o): Remove rule.
1069 * Makefile.in: Regenerate.
1070 * configure.in (atof): Remove tahoe.
1071 (OBJ_MAYBE_IEEE): Don't define.
1072 * configure: Regenerate.
1073 * config.in: Regenerate.
1074 * doc/Makefile.in: Regenerate.
1075 * po/POTFILES.in: Regenerate.
1076
20e95c23
DJ
10772006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1078
1079 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1080 and LIBINTL_DEP everywhere.
1081 (INTLLIBS): Remove.
1082 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1083 * acinclude.m4: Include new gettext macros.
1084 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1085 Remove local code for po/Makefile.
1086 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1087
eebf07fb
NC
10882006-05-30 Nick Clifton <nickc@redhat.com>
1089
1090 * po/es.po: Updated Spanish translation.
1091
b6aee19e
DC
10922006-05-06 Denis Chertykov <denisc@overta.ru>
1093
1094 * doc/c-avr.texi: New file.
1095 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1096 * doc/all.texi: Set AVR
1097 * doc/as.texinfo: Include c-avr.texi
1098
f8fdc850 10992006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1100
f8fdc850
JZ
1101 * config/bfin-parse.y (check_macfunc): Loose the condition of
1102 calling check_multiply_halfregs ().
1103
a3205465
JZ
11042006-05-25 Jie Zhang <jie.zhang@analog.com>
1105
1106 * config/bfin-parse.y (asm_1): Better check and deal with
1107 vector and scalar Multiply 16-Bit Operands instructions.
1108
9b52905e
NC
11092006-05-24 Nick Clifton <nickc@redhat.com>
1110
1111 * config/tc-hppa.c: Convert to ISO C90 format.
1112 * config/tc-hppa.h: Likewise.
1113
11142006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1115 Randolph Chung <randolph@tausq.org>
a70ae331 1116
9b52905e
NC
1117 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1118 is_tls_ieoff, is_tls_leoff): Define.
1119 (fix_new_hppa): Handle TLS.
1120 (cons_fix_new_hppa): Likewise.
1121 (pa_ip): Likewise.
1122 (md_apply_fix): Handle TLS relocs.
1123 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1124
a70ae331 11252006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1126
1127 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1128
ad3fea08
TS
11292006-05-23 Thiemo Seufer <ths@mips.com>
1130 David Ung <davidu@mips.com>
1131 Nigel Stephens <nigel@mips.com>
1132
1133 [ gas/ChangeLog ]
1134 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1135 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1136 ISA_HAS_MXHC1): New macros.
1137 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1138 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1139 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1140 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1141 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1142 (mips_after_parse_args): Change default handling of float register
1143 size to account for 32bit code with 64bit FP. Better sanity checking
1144 of ISA/ASE/ABI option combinations.
1145 (s_mipsset): Support switching of GPR and FPR sizes via
1146 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1147 options.
1148 (mips_elf_final_processing): We should record the use of 64bit FP
1149 registers in 32bit code but we don't, because ELF header flags are
1150 a scarce ressource.
1151 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1152 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1153 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1154 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1155 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1156 missing -march options. Document .set arch=CPU. Move .set smartmips
1157 to ASE page. Use @code for .set FOO examples.
1158
8b64503a
JZ
11592006-05-23 Jie Zhang <jie.zhang@analog.com>
1160
1161 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1162 if needed.
1163
403022e0
JZ
11642006-05-23 Jie Zhang <jie.zhang@analog.com>
1165
1166 * config/bfin-defs.h (bfin_equals): Remove declaration.
1167 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1168 * config/tc-bfin.c (bfin_name_is_register): Remove.
1169 (bfin_equals): Remove.
1170 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1171 (bfin_name_is_register): Remove declaration.
1172
7455baf8
TS
11732006-05-19 Thiemo Seufer <ths@mips.com>
1174 Nigel Stephens <nigel@mips.com>
1175
1176 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1177 (mips_oddfpreg_ok): New function.
1178 (mips_ip): Use it.
1179
707bfff6
TS
11802006-05-19 Thiemo Seufer <ths@mips.com>
1181 David Ung <davidu@mips.com>
1182
1183 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1184 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1185 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1186 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1187 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1188 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1189 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1190 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1191 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1192 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1193 reg_names_o32, reg_names_n32n64): Define register classes.
1194 (reg_lookup): New function, use register classes.
1195 (md_begin): Reserve register names in the symbol table. Simplify
1196 OBJ_ELF defines.
1197 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1198 Use reg_lookup.
1199 (mips16_ip): Use reg_lookup.
1200 (tc_get_register): Likewise.
1201 (tc_mips_regname_to_dw2regnum): New function.
1202
1df69f4f
TS
12032006-05-19 Thiemo Seufer <ths@mips.com>
1204
1205 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1206 Un-constify string argument.
1207 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1208 Likewise.
1209 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1210 Likewise.
1211 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1212 Likewise.
1213 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1214 Likewise.
1215 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1216 Likewise.
1217 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1218 Likewise.
1219
377260ba
NS
12202006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1221
1222 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1223 cfloat/m68881 to correct architecture before using it.
1224
cce7653b
NC
12252006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1226
a70ae331 1227 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1228 constant values.
1229
b0796911
PB
12302006-05-15 Paul Brook <paul@codesourcery.com>
1231
1232 * config/tc-arm.c (arm_adjust_symtab): Use
1233 bfd_is_arm_special_symbol_name.
1234
64b607e6
BW
12352006-05-15 Bob Wilson <bob.wilson@acm.org>
1236
1237 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1238 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1239 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1240 Handle errors from calls to xtensa_opcode_is_* functions.
1241
9b3f89ee
TS
12422006-05-14 Thiemo Seufer <ths@mips.com>
1243
1244 * config/tc-mips.c (macro_build): Test for currently active
1245 mips16 option.
1246 (mips16_ip): Reject invalid opcodes.
1247
370b66a1
CD
12482006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1249
1250 * doc/as.texinfo: Rename "Index" to "AS Index",
1251 and "ABORT" to "ABORT (COFF)".
1252
b6895b4f
PB
12532006-05-11 Paul Brook <paul@codesourcery.com>
1254
1255 * config/tc-arm.c (parse_half): New function.
1256 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1257 (parse_operands): Ditto.
1258 (do_mov16): Reject invalid relocations.
1259 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1260 (insns): Replace Iffff with HALF.
1261 (md_apply_fix): Add MOVW and MOVT relocs.
1262 (tc_gen_reloc): Ditto.
1263 * doc/c-arm.texi: Document relocation operators
1264
e28387c3
PB
12652006-05-11 Paul Brook <paul@codesourcery.com>
1266
1267 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1268
89ee2ebe
TS
12692006-05-11 Thiemo Seufer <ths@mips.com>
1270
1271 * config/tc-mips.c (append_insn): Don't check the range of j or
1272 jal addresses.
1273
53baae48
NC
12742006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1275
1276 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1277 relocs against external symbols for WinCE targets.
53baae48
NC
1278 (md_apply_fix): Likewise.
1279
4e2a74a8
TS
12802006-05-09 David Ung <davidu@mips.com>
1281
1282 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1283 j or jal address.
1284
337ff0a5
NC
12852006-05-09 Nick Clifton <nickc@redhat.com>
1286
1287 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1288 against symbols which are not going to be placed into the symbol
1289 table.
1290
8c9f705e
BE
12912006-05-09 Ben Elliston <bje@au.ibm.com>
1292
1293 * expr.c (operand): Remove `if (0 && ..)' statement and
1294 subsequently unused target_op label. Collapse `if (1 || ..)'
1295 statement.
1296 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1297 separately above the switch.
1298
2fd0d2ac
NC
12992006-05-08 Nick Clifton <nickc@redhat.com>
1300
1301 PR gas/2623
1302 * config/tc-msp430.c (line_separator_character): Define as |.
1303
e16bfa71
TS
13042006-05-08 Thiemo Seufer <ths@mips.com>
1305 Nigel Stephens <nigel@mips.com>
1306 David Ung <davidu@mips.com>
1307
1308 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1309 (mips_opts): Likewise.
1310 (file_ase_smartmips): New variable.
1311 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1312 (macro_build): Handle SmartMIPS instructions.
1313 (mips_ip): Likewise.
1314 (md_longopts): Add argument handling for smartmips.
1315 (md_parse_options, mips_after_parse_args): Likewise.
1316 (s_mipsset): Add .set smartmips support.
1317 (md_show_usage): Document -msmartmips/-mno-smartmips.
1318 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1319 .set smartmips.
1320 * doc/c-mips.texi: Likewise.
1321
32638454
AM
13222006-05-08 Alan Modra <amodra@bigpond.net.au>
1323
1324 * write.c (relax_segment): Add pass count arg. Don't error on
1325 negative org/space on first two passes.
1326 (relax_seg_info): New struct.
1327 (relax_seg, write_object_file): Adjust.
1328 * write.h (relax_segment): Update prototype.
1329
b7fc2769
JB
13302006-05-05 Julian Brown <julian@codesourcery.com>
1331
1332 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1333 checking.
1334 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1335 architecture version checks.
1336 (insns): Allow overlapping instructions to be used in VFP mode.
1337
7f841127
L
13382006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1339
1340 PR gas/2598
1341 * config/obj-elf.c (obj_elf_change_section): Allow user
1342 specified SHF_ALPHA_GPREL.
1343
73160847
NC
13442006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1345
1346 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1347 for PMEM related expressions.
1348
56487c55
NC
13492006-05-05 Nick Clifton <nickc@redhat.com>
1350
1351 PR gas/2582
1352 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1353 insertion of a directory separator character into a string at a
1354 given offset. Uses heuristics to decide when to use a backslash
1355 character rather than a forward-slash character.
1356 (dwarf2_directive_loc): Use the macro.
1357 (out_debug_info): Likewise.
1358
d43b4baf
TS
13592006-05-05 Thiemo Seufer <ths@mips.com>
1360 David Ung <davidu@mips.com>
1361
1362 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1363 instruction.
1364 (macro): Add new case M_CACHE_AB.
1365
088fa78e
KH
13662006-05-04 Kazu Hirata <kazu@codesourcery.com>
1367
1368 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1369 (opcode_lookup): Issue a warning for opcode with
1370 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1371 identical to OT_cinfix3.
1372 (TxC3w, TC3w, tC3w): New.
1373 (insns): Use tC3w and TC3w for comparison instructions with
1374 's' suffix.
1375
c9049d30
AM
13762006-05-04 Alan Modra <amodra@bigpond.net.au>
1377
1378 * subsegs.h (struct frchain): Delete frch_seg.
1379 (frchain_root): Delete.
1380 (seg_info): Define as macro.
1381 * subsegs.c (frchain_root): Delete.
1382 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1383 (subsegs_begin, subseg_change): Adjust for above.
1384 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1385 rather than to one big list.
1386 (subseg_get): Don't special case abs, und sections.
1387 (subseg_new, subseg_force_new): Don't set frchainP here.
1388 (seg_info): Delete.
1389 (subsegs_print_statistics): Adjust frag chain control list traversal.
1390 * debug.c (dmp_frags): Likewise.
1391 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1392 at frchain_root. Make use of known frchain ordering.
1393 (last_frag_for_seg): Likewise.
1394 (get_frag_fix): Likewise. Add seg param.
1395 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1396 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1397 (SUB_SEGMENT_ALIGN): Likewise.
1398 (subsegs_finish): Adjust frchain list traversal.
1399 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1400 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1401 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1402 (xtensa_fix_b_j_loop_end_frags): Likewise.
1403 (xtensa_fix_close_loop_end_frags): Likewise.
1404 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1405 (retrieve_segment_info): Delete frch_seg initialisation.
1406
f592407e
AM
14072006-05-03 Alan Modra <amodra@bigpond.net.au>
1408
1409 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1410 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1411 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1412 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1413
df7849c5
JM
14142006-05-02 Joseph Myers <joseph@codesourcery.com>
1415
1416 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1417 here.
1418 (md_apply_fix3): Multiply offset by 4 here for
1419 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1420
2d545b82
L
14212006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1422 Jan Beulich <jbeulich@novell.com>
1423
1424 * config/tc-i386.c (output_invalid_buf): Change size for
1425 unsigned char.
1426 * config/tc-tic30.c (output_invalid_buf): Likewise.
1427
1428 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1429 unsigned char.
1430 * config/tc-tic30.c (output_invalid): Likewise.
1431
38fc1cb1
DJ
14322006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1433
1434 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1435 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1436 (asconfig.texi): Don't set top_srcdir.
1437 * doc/as.texinfo: Don't use top_srcdir.
1438 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1439
2d545b82
L
14402006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1441
1442 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1443 * config/tc-tic30.c (output_invalid_buf): Likewise.
1444
1445 * config/tc-i386.c (output_invalid): Use snprintf instead of
1446 sprintf.
1447 * config/tc-ia64.c (declare_register_set): Likewise.
1448 (emit_one_bundle): Likewise.
1449 (check_dependencies): Likewise.
1450 * config/tc-tic30.c (output_invalid): Likewise.
1451
a8bc6c78
PB
14522006-05-02 Paul Brook <paul@codesourcery.com>
1453
1454 * config/tc-arm.c (arm_optimize_expr): New function.
1455 * config/tc-arm.h (md_optimize_expr): Define
1456 (arm_optimize_expr): Add prototype.
1457 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1458
58633d9a
BE
14592006-05-02 Ben Elliston <bje@au.ibm.com>
1460
22772e33
BE
1461 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1462 field unsigned.
1463
58633d9a
BE
1464 * sb.h (sb_list_vector): Move to sb.c.
1465 * sb.c (free_list): Use type of sb_list_vector directly.
1466 (sb_build): Fix off-by-one error in assertion about `size'.
1467
89cdfe57
BE
14682006-05-01 Ben Elliston <bje@au.ibm.com>
1469
1470 * listing.c (listing_listing): Remove useless loop.
1471 * macro.c (macro_expand): Remove is_positional local variable.
1472 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1473 and simplify surrounding expressions, where possible.
1474 (assign_symbol): Likewise.
1475 (s_weakref): Likewise.
1476 * symbols.c (colon): Likewise.
1477
c35da140
AM
14782006-05-01 James Lemke <jwlemke@wasabisystems.com>
1479
1480 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1481
9bcd4f99
TS
14822006-04-30 Thiemo Seufer <ths@mips.com>
1483 David Ung <davidu@mips.com>
1484
1485 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1486 (mips_immed): New table that records various handling of udi
1487 instruction patterns.
1488 (mips_ip): Adds udi handling.
1489
001ae1a4
AM
14902006-04-28 Alan Modra <amodra@bigpond.net.au>
1491
1492 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1493 of list rather than beginning.
1494
136da414
JB
14952006-04-26 Julian Brown <julian@codesourcery.com>
1496
1497 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1498 (is_quarter_float): Rename from above. Simplify slightly.
1499 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1500 number.
1501 (parse_neon_mov): Parse floating-point constants.
1502 (neon_qfloat_bits): Fix encoding.
1503 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1504 preference to integer encoding when using the F32 type.
1505
dcbf9037
JB
15062006-04-26 Julian Brown <julian@codesourcery.com>
1507
1508 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1509 zero-initialising structures containing it will lead to invalid types).
1510 (arm_it): Add vectype to each operand.
1511 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1512 defined field.
1513 (neon_typed_alias): New structure. Extra information for typed
1514 register aliases.
1515 (reg_entry): Add neon type info field.
1516 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1517 Break out alternative syntax for coprocessor registers, etc. into...
1518 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1519 out from arm_reg_parse.
1520 (parse_neon_type): Move. Return SUCCESS/FAIL.
1521 (first_error): New function. Call to ensure first error which occurs is
1522 reported.
1523 (parse_neon_operand_type): Parse exactly one type.
1524 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1525 (parse_typed_reg_or_scalar): New function. Handle core of both
1526 arm_typed_reg_parse and parse_scalar.
1527 (arm_typed_reg_parse): Parse a register with an optional type.
1528 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1529 result.
1530 (parse_scalar): Parse a Neon scalar with optional type.
1531 (parse_reg_list): Use first_error.
1532 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1533 (neon_alias_types_same): New function. Return true if two (alias) types
1534 are the same.
1535 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1536 of elements.
1537 (insert_reg_alias): Return new reg_entry not void.
1538 (insert_neon_reg_alias): New function. Insert type/index information as
1539 well as register for alias.
1540 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1541 make typed register aliases accordingly.
1542 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1543 of line.
1544 (s_unreq): Delete type information if present.
1545 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1546 (s_arm_unwind_save_mmxwcg): Likewise.
1547 (s_arm_unwind_movsp): Likewise.
1548 (s_arm_unwind_setfp): Likewise.
1549 (parse_shift): Likewise.
1550 (parse_shifter_operand): Likewise.
1551 (parse_address): Likewise.
1552 (parse_tb): Likewise.
1553 (tc_arm_regname_to_dw2regnum): Likewise.
1554 (md_pseudo_table): Add dn, qn.
1555 (parse_neon_mov): Handle typed operands.
1556 (parse_operands): Likewise.
1557 (neon_type_mask): Add N_SIZ.
1558 (N_ALLMODS): New macro.
1559 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1560 (el_type_of_type_chk): Add some safeguards.
1561 (modify_types_allowed): Fix logic bug.
1562 (neon_check_type): Handle operands with types.
1563 (neon_three_same): Remove redundant optional arg handling.
1564 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1565 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1566 (do_neon_step): Adjust accordingly.
1567 (neon_cmode_for_logic_imm): Use first_error.
1568 (do_neon_bitfield): Call neon_check_type.
1569 (neon_dyadic): Rename to...
1570 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1571 to allow modification of type of the destination.
1572 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1573 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1574 (do_neon_compare): Make destination be an untyped bitfield.
1575 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1576 (neon_mul_mac): Return early in case of errors.
1577 (neon_move_immediate): Use first_error.
1578 (neon_mac_reg_scalar_long): Fix type to include scalar.
1579 (do_neon_dup): Likewise.
1580 (do_neon_mov): Likewise (in several places).
1581 (do_neon_tbl_tbx): Fix type.
1582 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1583 (do_neon_ld_dup): Exit early in case of errors and/or use
1584 first_error.
1585 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1586 Handle .dn/.qn directives.
1587 (REGDEF): Add zero for reg_entry neon field.
1588
5287ad62
JB
15892006-04-26 Julian Brown <julian@codesourcery.com>
1590
1591 * config/tc-arm.c (limits.h): Include.
1592 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1593 (fpu_vfp_v3_or_neon_ext): Declare constants.
1594 (neon_el_type): New enumeration of types for Neon vector elements.
1595 (neon_type_el): New struct. Define type and size of a vector element.
1596 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1597 instruction.
1598 (neon_type): Define struct. The type of an instruction.
1599 (arm_it): Add 'vectype' for the current instruction.
1600 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1601 (vfp_sp_reg_pos): Rename to...
1602 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1603 tags.
1604 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1605 (Neon D or Q register).
1606 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1607 register.
1608 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1609 (my_get_expression): Allow above constant as argument to accept
1610 64-bit constants with optional prefix.
1611 (arm_reg_parse): Add extra argument to return the specific type of
1612 register in when either a D or Q register (REG_TYPE_NDQ) is
1613 requested. Can be NULL.
1614 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1615 (parse_reg_list): Update for new arm_reg_parse args.
1616 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1617 (parse_neon_el_struct_list): New function. Parse element/structure
1618 register lists for VLD<n>/VST<n> instructions.
1619 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1620 (s_arm_unwind_save_mmxwr): Likewise.
1621 (s_arm_unwind_save_mmxwcg): Likewise.
1622 (s_arm_unwind_movsp): Likewise.
1623 (s_arm_unwind_setfp): Likewise.
1624 (parse_big_immediate): New function. Parse an immediate, which may be
1625 64 bits wide. Put results in inst.operands[i].
1626 (parse_shift): Update for new arm_reg_parse args.
1627 (parse_address): Likewise. Add parsing of alignment specifiers.
1628 (parse_neon_mov): Parse the operands of a VMOV instruction.
1629 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1630 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1631 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1632 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1633 (parse_operands): Handle new codes above.
1634 (encode_arm_vfp_sp_reg): Rename to...
1635 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1636 selected VFP version only supports D0-D15.
1637 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1638 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1639 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1640 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1641 encode_arm_vfp_reg name, and allow 32 D regs.
1642 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1643 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1644 regs.
1645 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1646 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1647 constant-load and conversion insns introduced with VFPv3.
1648 (neon_tab_entry): New struct.
1649 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1650 those which are the targets of pseudo-instructions.
1651 (neon_opc): Enumerate opcodes, use as indices into...
1652 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1653 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1654 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1655 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1656 neon_enc_tab.
1657 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1658 Neon instructions.
1659 (neon_type_mask): New. Compact type representation for type checking.
1660 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1661 permitted type combinations.
1662 (N_IGNORE_TYPE): New macro.
1663 (neon_check_shape): New function. Check an instruction shape for
1664 multiple alternatives. Return the specific shape for the current
1665 instruction.
1666 (neon_modify_type_size): New function. Modify a vector type and size,
1667 depending on the bit mask in argument 1.
1668 (neon_type_promote): New function. Convert a given "key" type (of an
1669 operand) into the correct type for a different operand, based on a bit
1670 mask.
1671 (type_chk_of_el_type): New function. Convert a type and size into the
1672 compact representation used for type checking.
1673 (el_type_of_type_ckh): New function. Reverse of above (only when a
1674 single bit is set in the bit mask).
1675 (modify_types_allowed): New function. Alter a mask of allowed types
1676 based on a bit mask of modifications.
1677 (neon_check_type): New function. Check the type of the current
1678 instruction against the variable argument list. The "key" type of the
1679 instruction is returned.
1680 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1681 a Neon data-processing instruction depending on whether we're in ARM
1682 mode or Thumb-2 mode.
1683 (neon_logbits): New function.
1684 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1685 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1686 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1687 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1688 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1689 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1690 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1691 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1692 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1693 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1694 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1695 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1696 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1697 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1698 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1699 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1700 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1701 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1702 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1703 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1704 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1705 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1706 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1707 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1708 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1709 helpers.
1710 (parse_neon_type): New function. Parse Neon type specifier.
1711 (opcode_lookup): Allow parsing of Neon type specifiers.
1712 (REGNUM2, REGSETH, REGSET2): New macros.
1713 (reg_names): Add new VFPv3 and Neon registers.
1714 (NUF, nUF, NCE, nCE): New macros for opcode table.
1715 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1716 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1717 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1718 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1719 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1720 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1721 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1722 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1723 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1724 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1725 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1726 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1727 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1728 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1729 fto[us][lh][sd].
1730 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1731 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1732 (arm_option_cpu_value): Add vfp3 and neon.
1733 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1734 VFPv1 attribute.
1735
1946c96e
BW
17362006-04-25 Bob Wilson <bob.wilson@acm.org>
1737
1738 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1739 syntax instead of hardcoded opcodes with ".w18" suffixes.
1740 (wide_branch_opcode): New.
1741 (build_transition): Use it to check for wide branch opcodes with
1742 either ".w18" or ".w15" suffixes.
1743
5033a645
BW
17442006-04-25 Bob Wilson <bob.wilson@acm.org>
1745
1746 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1747 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1748 frag's is_literal flag.
1749
395fa56f
BW
17502006-04-25 Bob Wilson <bob.wilson@acm.org>
1751
1752 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1753
708587a4
KH
17542006-04-23 Kazu Hirata <kazu@codesourcery.com>
1755
1756 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1757 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1758 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1759 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1760 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1761
8463be01
PB
17622005-04-20 Paul Brook <paul@codesourcery.com>
1763
1764 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1765 all targets.
1766 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1767
f26a5955
AM
17682006-04-19 Alan Modra <amodra@bigpond.net.au>
1769
1770 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1771 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1772 Make some cpus unsupported on ELF. Run "make dep-am".
1773 * Makefile.in: Regenerate.
1774
241a6c40
AM
17752006-04-19 Alan Modra <amodra@bigpond.net.au>
1776
1777 * configure.in (--enable-targets): Indent help message.
1778 * configure: Regenerate.
1779
bb8f5920
L
17802006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1781
1782 PR gas/2533
1783 * config/tc-i386.c (i386_immediate): Check illegal immediate
1784 register operand.
1785
23d9d9de
AM
17862006-04-18 Alan Modra <amodra@bigpond.net.au>
1787
64e74474
AM
1788 * config/tc-i386.c: Formatting.
1789 (output_disp, output_imm): ISO C90 params.
1790
6cbe03fb
AM
1791 * frags.c (frag_offset_fixed_p): Constify args.
1792 * frags.h (frag_offset_fixed_p): Ditto.
1793
23d9d9de
AM
1794 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1795 (COFF_MAGIC): Delete.
a37d486e
AM
1796
1797 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1798
e7403566
DJ
17992006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1800
1801 * po/POTFILES.in: Regenerated.
1802
58ab4f3d
MM
18032006-04-16 Mark Mitchell <mark@codesourcery.com>
1804
1805 * doc/as.texinfo: Mention that some .type syntaxes are not
1806 supported on all architectures.
1807
482fd9f9
BW
18082006-04-14 Sterling Augustine <sterling@tensilica.com>
1809
1810 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1811 instructions when such transformations have been disabled.
1812
05d58145
BW
18132006-04-10 Sterling Augustine <sterling@tensilica.com>
1814
1815 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1816 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1817 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1818 decoding the loop instructions. Remove current_offset variable.
1819 (xtensa_fix_short_loop_frags): Likewise.
1820 (min_bytes_to_other_loop_end): Remove current_offset argument.
1821
9e75b3fa
AM
18222006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1823
a37d486e 1824 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1825 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1826
d727e8c2
NC
18272006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1828
1829 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1830 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1831 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1832 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1833 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1834 at90can64, at90usb646, at90usb647, at90usb1286 and
1835 at90usb1287.
1836 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1837
d252fdde
PB
18382006-04-07 Paul Brook <paul@codesourcery.com>
1839
1840 * config/tc-arm.c (parse_operands): Set default error message.
1841
ab1eb5fe
PB
18422006-04-07 Paul Brook <paul@codesourcery.com>
1843
1844 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1845
7ae2971b
PB
18462006-04-07 Paul Brook <paul@codesourcery.com>
1847
1848 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1849
53365c0d
PB
18502006-04-07 Paul Brook <paul@codesourcery.com>
1851
1852 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1853 (move_or_literal_pool): Handle Thumb-2 instructions.
1854 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1855
45aa61fe
AM
18562006-04-07 Alan Modra <amodra@bigpond.net.au>
1857
1858 PR 2512.
1859 * config/tc-i386.c (match_template): Move 64-bit operand tests
1860 inside loop.
1861
108a6f8e
CD
18622006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1863
1864 * po/Make-in: Add install-html target.
1865 * Makefile.am: Add install-html and install-html-recursive targets.
1866 * Makefile.in: Regenerate.
1867 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1868 * configure: Regenerate.
1869 * doc/Makefile.am: Add install-html and install-html-am targets.
1870 * doc/Makefile.in: Regenerate.
1871
ec651a3b
AM
18722006-04-06 Alan Modra <amodra@bigpond.net.au>
1873
1874 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1875 second scan.
1876
910600e9
RS
18772006-04-05 Richard Sandiford <richard@codesourcery.com>
1878 Daniel Jacobowitz <dan@codesourcery.com>
1879
1880 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1881 (GOTT_BASE, GOTT_INDEX): New.
1882 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1883 GOTT_INDEX when generating VxWorks PIC.
1884 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1885 use the generic *-*-vxworks* stanza instead.
1886
99630778
AM
18872006-04-04 Alan Modra <amodra@bigpond.net.au>
1888
1889 PR 997
1890 * frags.c (frag_offset_fixed_p): New function.
1891 * frags.h (frag_offset_fixed_p): Declare.
1892 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1893 (resolve_expression): Likewise.
1894
a02728c8
BW
18952006-04-03 Sterling Augustine <sterling@tensilica.com>
1896
1897 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1898 of the same length but different numbers of slots.
1899
9dfde49d
AS
19002006-03-30 Andreas Schwab <schwab@suse.de>
1901
1902 * configure.in: Fix help string for --enable-targets option.
1903 * configure: Regenerate.
1904
2da12c60
NS
19052006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1906
6d89cc8f
NS
1907 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1908 (m68k_ip): ... here. Use for all chips. Protect against buffer
1909 overrun and avoid excessive copying.
1910
2da12c60
NS
1911 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1912 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1913 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1914 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1915 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1916 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1917 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1918 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1919 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1920 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1921 (struct m68k_cpu): Change chip field to control_regs.
1922 (current_chip): Remove.
1923 (control_regs): New.
1924 (m68k_archs, m68k_extensions): Adjust.
1925 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1926 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1927 (find_cf_chip): Reimplement for new organization of cpu table.
1928 (select_control_regs): Remove.
1929 (mri_chip): Adjust.
1930 (struct save_opts): Save control regs, not chip.
1931 (s_save, s_restore): Adjust.
1932 (m68k_lookup_cpu): Give deprecated warning when necessary.
1933 (m68k_init_arch): Adjust.
1934 (md_show_usage): Adjust for new cpu table organization.
1935
1ac4baed
BS
19362006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1937
1938 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1939 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1940 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1941 "elf/bfin.h".
1942 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1943 (any_gotrel): New rule.
1944 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1945 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1946 "elf/bfin.h".
1947 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1948 (bfin_pic_ptr): New function.
1949 (md_pseudo_table): Add it for ".picptr".
1950 (OPTION_FDPIC): New macro.
1951 (md_longopts): Add -mfdpic.
1952 (md_parse_option): Handle it.
1953 (md_begin): Set BFD flags.
1954 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1955 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1956 us for GOT relocs.
1957 * Makefile.am (bfin-parse.o): Update dependencies.
1958 (DEPTC_bfin_elf): Likewise.
1959 * Makefile.in: Regenerate.
1960
a9d34880
RS
19612006-03-25 Richard Sandiford <richard@codesourcery.com>
1962
1963 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1964 mcfemac instead of mcfmac.
1965
9ca26584
AJ
19662006-03-23 Michael Matz <matz@suse.de>
1967
1968 * config/tc-i386.c (type_names): Correct placement of 'static'.
1969 (reloc): Map some more relocs to their 64 bit counterpart when
1970 size is 8.
1971 (output_insn): Work around breakage if DEBUG386 is defined.
1972 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1973 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1974 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1975 different from i386.
1976 (output_imm): Ditto.
1977 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1978 Imm64.
1979 (md_convert_frag): Jumps can now be larger than 2GB away, error
1980 out in that case.
1981 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1982 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1983
0a44bf69
RS
19842006-03-22 Richard Sandiford <richard@codesourcery.com>
1985 Daniel Jacobowitz <dan@codesourcery.com>
1986 Phil Edwards <phil@codesourcery.com>
1987 Zack Weinberg <zack@codesourcery.com>
1988 Mark Mitchell <mark@codesourcery.com>
1989 Nathan Sidwell <nathan@codesourcery.com>
1990
1991 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1992 (md_begin): Complain about -G being used for PIC. Don't change
1993 the text, data and bss alignments on VxWorks.
1994 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1995 generating VxWorks PIC.
1996 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1997 (macro): Likewise, but do not treat la $25 specially for
1998 VxWorks PIC, and do not handle jal.
1999 (OPTION_MVXWORKS_PIC): New macro.
2000 (md_longopts): Add -mvxworks-pic.
2001 (md_parse_option): Don't complain about using PIC and -G together here.
2002 Handle OPTION_MVXWORKS_PIC.
2003 (md_estimate_size_before_relax): Always use the first relaxation
2004 sequence on VxWorks.
2005 * config/tc-mips.h (VXWORKS_PIC): New.
2006
080eb7fe
PB
20072006-03-21 Paul Brook <paul@codesourcery.com>
2008
2009 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2010
03aaa593
BW
20112006-03-21 Sterling Augustine <sterling@tensilica.com>
2012
2013 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2014 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2015 (get_loop_align_size): New.
2016 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2017 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2018 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2019 (get_noop_aligned_address): Use get_loop_align_size.
2020 (get_aligned_diff): Likewise.
2021
3e94bf1a
PB
20222006-03-21 Paul Brook <paul@codesourcery.com>
2023
2024 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2025
dfa9f0d5
PB
20262006-03-20 Paul Brook <paul@codesourcery.com>
2027
2028 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2029 (do_t_branch): Encode branches inside IT blocks as unconditional.
2030 (do_t_cps): New function.
2031 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2032 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2033 (opcode_lookup): Allow conditional suffixes on all instructions in
2034 Thumb mode.
2035 (md_assemble): Advance condexec state before checking for errors.
2036 (insns): Use do_t_cps.
2037
6e1cb1a6
PB
20382006-03-20 Paul Brook <paul@codesourcery.com>
2039
2040 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2041 outputting the insn.
2042
0a966e2d
JBG
20432006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2044
2045 * config/tc-vax.c: Update copyright year.
2046 * config/tc-vax.h: Likewise.
2047
a49fcc17
JBG
20482006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2049
2050 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2051 make it static.
2052 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2053
f5208ef2
PB
20542006-03-17 Paul Brook <paul@codesourcery.com>
2055
2056 * config/tc-arm.c (insns): Add ldm and stm.
2057
cb4c78d6
BE
20582006-03-17 Ben Elliston <bje@au.ibm.com>
2059
2060 PR gas/2446
2061 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2062
c16d2bf0
PB
20632006-03-16 Paul Brook <paul@codesourcery.com>
2064
2065 * config/tc-arm.c (insns): Add "svc".
2066
80ca4e2c
BW
20672006-03-13 Bob Wilson <bob.wilson@acm.org>
2068
2069 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2070 flag and avoid double underscore prefixes.
2071
3a4a14e9
PB
20722006-03-10 Paul Brook <paul@codesourcery.com>
2073
2074 * config/tc-arm.c (md_begin): Handle EABIv5.
2075 (arm_eabis): Add EF_ARM_EABI_VER5.
2076 * doc/c-arm.texi: Document -meabi=5.
2077
518051dc
BE
20782006-03-10 Ben Elliston <bje@au.ibm.com>
2079
2080 * app.c (do_scrub_chars): Simplify string handling.
2081
00a97672
RS
20822006-03-07 Richard Sandiford <richard@codesourcery.com>
2083 Daniel Jacobowitz <dan@codesourcery.com>
2084 Zack Weinberg <zack@codesourcery.com>
2085 Nathan Sidwell <nathan@codesourcery.com>
2086 Paul Brook <paul@codesourcery.com>
2087 Ricardo Anguiano <anguiano@codesourcery.com>
2088 Phil Edwards <phil@codesourcery.com>
2089
2090 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2091 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2092 R_ARM_ABS12 reloc.
2093 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2094 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2095 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2096
b29757dc
BW
20972006-03-06 Bob Wilson <bob.wilson@acm.org>
2098
2099 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2100 even when using the text-section-literals option.
2101
0b2e31dc
NS
21022006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2103
2104 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2105 and cf.
2106 (m68k_ip): <case 'J'> Check we have some control regs.
2107 (md_parse_option): Allow raw arch switch.
2108 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2109 whether 68881 or cfloat was meant by -mfloat.
2110 (md_show_usage): Adjust extension display.
2111 (m68k_elf_final_processing): Adjust.
2112
df406460
NC
21132006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2114
2115 * config/tc-avr.c (avr_mod_hash_value): New function.
2116 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2117 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2118 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2119 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2120 of (int).
2121 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2122 fixups, abort otherwise.
df406460
NC
2123 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2124 tc_fix_adjustable): Define.
a70ae331 2125
53022e4a
JW
21262006-03-02 James E Wilson <wilson@specifix.com>
2127
2128 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2129 change the template, then clear md.slot[curr].end_of_insn_group.
2130
9f6f925e
JB
21312006-02-28 Jan Beulich <jbeulich@novell.com>
2132
2133 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2134
0e31b3e1
JB
21352006-02-28 Jan Beulich <jbeulich@novell.com>
2136
2137 PR/1070
2138 * macro.c (getstring): Don't treat parentheses special anymore.
2139 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2140 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2141 characters.
2142
10cd14b4
AM
21432006-02-28 Mat <mat@csail.mit.edu>
2144
2145 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2146
63752a75
JJ
21472006-02-27 Jakub Jelinek <jakub@redhat.com>
2148
2149 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2150 field.
2151 (CFI_signal_frame): Define.
2152 (cfi_pseudo_table): Add .cfi_signal_frame.
2153 (dot_cfi): Handle CFI_signal_frame.
2154 (output_cie): Handle cie->signal_frame.
2155 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2156 different. Copy signal_frame from FDE to newly created CIE.
2157 * doc/as.texinfo: Document .cfi_signal_frame.
2158
f7d9e5c3
CD
21592006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2160
2161 * doc/Makefile.am: Add html target.
2162 * doc/Makefile.in: Regenerate.
2163 * po/Make-in: Add html target.
2164
331d2d0d
L
21652006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2166
8502d882 2167 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2168 Instructions.
2169
8502d882 2170 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2171 (CpuUnknownFlags): Add CpuMNI.
2172
10156f83
DM
21732006-02-24 David S. Miller <davem@sunset.davemloft.net>
2174
2175 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2176 (hpriv_reg_table): New table for hyperprivileged registers.
2177 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2178 register encoding.
2179
6772dd07
DD
21802006-02-24 DJ Delorie <dj@redhat.com>
2181
2182 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2183 (tc_gen_reloc): Don't define.
2184 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2185 (OPTION_LINKRELAX): New.
2186 (md_longopts): Add it.
2187 (m32c_relax): New.
2188 (md_parse_options): Set it.
2189 (md_assemble): Emit relaxation relocs as needed.
2190 (md_convert_frag): Emit relaxation relocs as needed.
2191 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2192 (m32c_apply_fix): New.
2193 (tc_gen_reloc): New.
2194 (m32c_force_relocation): Force out jump relocs when relaxing.
2195 (m32c_fix_adjustable): Return false if relaxing.
2196
62b3e311
PB
21972006-02-24 Paul Brook <paul@codesourcery.com>
2198
2199 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2200 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2201 (struct asm_barrier_opt): Define.
2202 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2203 (parse_psr): Accept V7M psr names.
2204 (parse_barrier): New function.
2205 (enum operand_parse_code): Add OP_oBARRIER.
2206 (parse_operands): Implement OP_oBARRIER.
2207 (do_barrier): New function.
2208 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2209 (do_t_cpsi): Add V7M restrictions.
2210 (do_t_mrs, do_t_msr): Validate V7M variants.
2211 (md_assemble): Check for NULL variants.
2212 (v7m_psrs, barrier_opt_names): New tables.
2213 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2214 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2215 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2216 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2217 (struct cpu_arch_ver_table): Define.
2218 (cpu_arch_ver): New.
2219 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2220 Tag_CPU_arch_profile.
2221 * doc/c-arm.texi: Document new cpu and arch options.
2222
59cf82fe
L
22232006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2224
2225 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2226
19a7219f
L
22272006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2228
2229 * config/tc-ia64.c: Update copyright years.
2230
7f3dfb9c
L
22312006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2232
2233 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2234 SDM 2.2.
2235
f40d1643
PB
22362005-02-22 Paul Brook <paul@codesourcery.com>
2237
2238 * config/tc-arm.c (do_pld): Remove incorrect write to
2239 inst.instruction.
2240 (encode_thumb32_addr_mode): Use correct operand.
2241
216d22bc
PB
22422006-02-21 Paul Brook <paul@codesourcery.com>
2243
2244 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2245
d70c5fc7
NC
22462006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2247 Anil Paranjape <anilp1@kpitcummins.com>
2248 Shilin Shakti <shilins@kpitcummins.com>
2249
2250 * Makefile.am: Add xc16x related entry.
2251 * Makefile.in: Regenerate.
2252 * configure.in: Added xc16x related entry.
2253 * configure: Regenerate.
2254 * config/tc-xc16x.h: New file
2255 * config/tc-xc16x.c: New file
2256 * doc/c-xc16x.texi: New file for xc16x
2257 * doc/all.texi: Entry for xc16x
a70ae331 2258 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2259 * NEWS: Announce the support for the new target.
2260
aaa2ab3d
NH
22612006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2262
2263 * configure.tgt: set emulation for mips-*-netbsd*
2264
82de001f
JJ
22652006-02-14 Jakub Jelinek <jakub@redhat.com>
2266
2267 * config.in: Rebuilt.
2268
431ad2d0
BW
22692006-02-13 Bob Wilson <bob.wilson@acm.org>
2270
2271 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2272 from 1, not 0, in error messages.
2273 (md_assemble): Simplify special-case check for ENTRY instructions.
2274 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2275 operand in error message.
2276
94089a50
JM
22772006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2278
2279 * configure.tgt (arm-*-linux-gnueabi*): Change to
2280 arm-*-linux-*eabi*.
2281
52de4c06
NC
22822006-02-10 Nick Clifton <nickc@redhat.com>
2283
70e45ad9
NC
2284 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2285 32-bit value is propagated into the upper bits of a 64-bit long.
2286
52de4c06
NC
2287 * config/tc-arc.c (init_opcode_tables): Fix cast.
2288 (arc_extoper, md_operand): Likewise.
2289
21af2bbd
BW
22902006-02-09 David Heine <dlheine@tensilica.com>
2291
2292 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2293 each relaxation step.
2294
75a706fc 22952006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2296
75a706fc
L
2297 * configure.in (CHECK_DECLS): Add vsnprintf.
2298 * configure: Regenerate.
2299 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2300 include/declare here, but...
2301 * as.h: Move code detecting VARARGS idiom to the top.
2302 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2303 (vsnprintf): Declare if not already declared.
2304
0d474464
L
23052006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2306
2307 * as.c (close_output_file): New.
2308 (main): Register close_output_file with xatexit before
2309 dump_statistics. Don't call output_file_close.
2310
266abb8f
NS
23112006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2312
2313 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2314 mcf5329_control_regs): New.
2315 (not_current_architecture, selected_arch, selected_cpu): New.
2316 (m68k_archs, m68k_extensions): New.
2317 (archs): Renamed to ...
2318 (m68k_cpus): ... here. Adjust.
2319 (n_arches): Remove.
2320 (md_pseudo_table): Add arch and cpu directives.
2321 (find_cf_chip, m68k_ip): Adjust table scanning.
2322 (no_68851, no_68881): Remove.
2323 (md_assemble): Lazily initialize.
2324 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2325 (md_init_after_args): Move functionality to m68k_init_arch.
2326 (mri_chip): Adjust table scanning.
2327 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2328 options with saner parsing.
2329 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2330 m68k_init_arch): New.
2331 (s_m68k_cpu, s_m68k_arch): New.
2332 (md_show_usage): Adjust.
2333 (m68k_elf_final_processing): Set CF EF flags.
2334 * config/tc-m68k.h (m68k_init_after_args): Remove.
2335 (tc_init_after_args): Remove.
2336 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2337 (M68k-Directives): Document .arch and .cpu directives.
2338
134dcee5
AM
23392006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2340
a70ae331
AM
2341 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2342 synonyms for equ and defl.
134dcee5
AM
2343 (z80_cons_fix_new): New function.
2344 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2345 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2346 now handled as pseudo-op rather than an instruction.
2347 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2348 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2349 Add entries for def24,def32,d24,d32.
2350 (md_assemble): Improved error handling.
2351 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2352 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2353 (z80_cons_fix_new): Declare.
a70ae331 2354 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2355 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2356
a9931606
PB
23572006-02-02 Paul Brook <paul@codesourcery.com>
2358
2359 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2360
ef8d22e6
PB
23612005-02-02 Paul Brook <paul@codesourcery.com>
2362
2363 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2364 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2365 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2366 T2_OPCODE_RSB): Define.
2367 (thumb32_negate_data_op): New function.
2368 (md_apply_fix): Use it.
2369
e7da6241
BW
23702006-01-31 Bob Wilson <bob.wilson@acm.org>
2371
2372 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2373 fields.
2374 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2375 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2376 subtracted symbols.
2377 (relaxation_requirements): Add pfinish_frag argument and use it to
2378 replace setting tinsn->record_fix fields.
2379 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2380 and vinsn_to_insnbuf. Remove references to record_fix and
2381 slot_sub_symbols fields.
2382 (xtensa_mark_narrow_branches): Delete unused code.
2383 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2384 a symbol.
2385 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2386 record_fix fields.
2387 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2388 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2389 of the record_fix field. Simplify error messages for unexpected
2390 symbolic operands.
2391 (set_expr_symbol_offset_diff): Delete.
2392
79134647
PB
23932006-01-31 Paul Brook <paul@codesourcery.com>
2394
2395 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2396
e74cfd16
PB
23972006-01-31 Paul Brook <paul@codesourcery.com>
2398 Richard Earnshaw <rearnsha@arm.com>
2399
2400 * config/tc-arm.c: Use arm_feature_set.
2401 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2402 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2403 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2404 New variables.
2405 (insns): Use them.
2406 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2407 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2408 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2409 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2410 feature flags.
2411 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2412 (arm_opts): Move old cpu/arch options from here...
2413 (arm_legacy_opts): ... to here.
2414 (md_parse_option): Search arm_legacy_opts.
2415 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2416 (arm_float_abis, arm_eabis): Make const.
2417
d47d412e
BW
24182006-01-25 Bob Wilson <bob.wilson@acm.org>
2419
2420 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2421
b14273fe
JZ
24222006-01-21 Jie Zhang <jie.zhang@analog.com>
2423
2424 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2425 in load immediate intruction.
2426
39cd1c76
JZ
24272006-01-21 Jie Zhang <jie.zhang@analog.com>
2428
2429 * config/bfin-parse.y (value_match): Use correct conversion
2430 specifications in template string for __FILE__ and __LINE__.
2431 (binary): Ditto.
2432 (unary): Ditto.
2433
67a4f2b7
AO
24342006-01-18 Alexandre Oliva <aoliva@redhat.com>
2435
2436 Introduce TLS descriptors for i386 and x86_64.
2437 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2438 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2439 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2440 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2441 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2442 displacement bits.
2443 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2444 (lex_got): Handle @tlsdesc and @tlscall.
2445 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2446
8ad7c533
NC
24472006-01-11 Nick Clifton <nickc@redhat.com>
2448
2449 Fixes for building on 64-bit hosts:
2450 * config/tc-avr.c (mod_index): New union to allow conversion
2451 between pointers and integers.
2452 (md_begin, avr_ldi_expression): Use it.
2453 * config/tc-i370.c (md_assemble): Add cast for argument to print
2454 statement.
2455 * config/tc-tic54x.c (subsym_substitute): Likewise.
2456 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2457 opindex field of fr_cgen structure into a pointer so that it can
2458 be stored in a frag.
2459 * config/tc-mn10300.c (md_assemble): Likewise.
2460 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2461 types.
2462 * config/tc-v850.c: Replace uses of (int) casts with correct
2463 types.
2464
4dcb3903
L
24652006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2466
2467 PR gas/2117
2468 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2469
e0f6ea40
HPN
24702006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2471
2472 PR gas/2101
2473 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2474 a local-label reference.
2475
e88d958a 2476For older changes see ChangeLog-2005
08d56133
NC
2477\f
2478Local Variables:
2479mode: change-log
2480left-margin: 8
2481fill-column: 74
2482version-control: never
2483End:
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