2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a5c311ca
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12006-12-13 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.c (match_template): Use a for loop to set
4 operand_types array.
5
f48ff2ae
L
62006-12-13 H.J. Lu <hongjiu.lu@intel.com>
7
8 PR gas/3712
9 * config/tc-i386.c (match_template): Use MAX_OPERANDS for the
10 number of operands. Issue an error if MAX_OPERANDS != 4. Add
11 the 4th operand check.
12
c450d570
PB
132006-12-13 Paul Brook <paul@codesourcery.com>
14
15 * config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
16 * doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
17
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182006-12-12 H.J. Lu <hongjiu.lu@intel.com>
19
20 * config/tc-i386.h (WordMem): Document it for 64 bit memory
21 reference.
22
37d037c1
DJ
232006-12-12 Daniel Jacobowitz <dan@codesourcery.com>
24
25 * doc/Makefile.am (as_TEXINFOS): Set.
26 (as.info as.dvi as.html): Delete rule.
27 * doc/Makefile.in: Regenerated.
28
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DJ
292006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
30
31 * configure.in: Define GENINSRC_NEVER.
32 * doc/Makefile.am (as.info): Remove srcdir prefix.
33 (MAINTAINERCLEANFILES): Add info file.
34 (DISTCLEANFILES): Pretend to add info file.
35 * po/Make-in (.po.gmo): Put gmo files in objdir.
36 * configure, Makefile.in, doc/Makefile.in: Regenerated.
37
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382006-12-09 H.J. Lu <hongjiu.lu@intel.com>
39
40 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
af26ccbe 41 for operand_types array.
ffb08c80 42
41d3b056
CG
432006-12-08 Christian Groessler <chris@groessler.org>
44
45 * config/tc-z8k.c (whatreg): Add comment describing function.
46 Return NULL if symbol name characters follow the register number.
47 (parse_reg): Use NULL instead of 0 for pointer values. Stop
48 processing if whatreg returned NULL.
49
c694fd50
KH
502006-12-07 Kazu Hirata <kazu@codesourcery.com>
51
52 * config/tc-m68k.c: Update uses of EF_M68K_*.
53
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542006-12-06 H.J. Lu <hjl@gnu.org>
55
56 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
57 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
58
b3b1f034
JJ
592006-12-02 Jakub Jelinek <jakub@redhat.com>
60
61 PR gas/3607
62 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
63
f0291e4c
PB
642006-12-01 Paul Brook <paul@codesourcery.com>
65
66 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
67 function symbols.
68
e1da3f5b
PB
692006-11-29 Paul Brook <paul@codesourcery.com>
70
71 * config/tc-arm.c (arm_is_eabi): New function.
72 * config/tc-arm.h (arm_is_eabi): New prototype.
73 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
74 * doc/c-arm.texi (.thumb_func): Update documentation.
75
00249aaa
PB
762006-11-29 Paul Brook <paul@codesourcery.com>
77
78 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
79 encoding.
80
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BW
812006-11-27 Sterling Augustine <sterling@tensilica.com>
82
83 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
84 as the first slot_subtype, not the frag subtype.
85
2caa7ca0
BW
862006-11-27 Bob Wilson <bob.wilson@acm.org>
87
88 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
89 (directive_state): Disable scheduling by default.
90 (xtensa_add_config_info): New.
91 (xtensa_end): Call xtensa_add_config_info.
92
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932006-11-27 Eric Botcazou <ebotcazou@adacore.com>
94
95 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
96 their unaligned counterparts in debugging sections.
97
cefdba39
AM
982006-11-24 Alan Modra <amodra@bigpond.net.au>
99
100 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
101
e821645d
DJ
1022006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
103
104 * config/tc-arm.h (md_cons_align): Define.
105 (mapping_state): New prototype.
106 * config/tc-arm.c (mapping_state): Make global.
107
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AM
1082006-11-22 Alan Modra <amodra@bigpond.net.au>
109
110 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
111
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1122006-11-16 Mei ligang <ligang@sunnorth.com.cn>
113
5ab504f9
AM
114 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
115 branch instruction, handle it specially.
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116 (score_insns): Modify 32 bit branch instruction.
117
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AM
1182006-11-16 Alan Modra <amodra@bigpond.net.au>
119
120 * symbols.c (resolve_symbol_value): Formatting.
121
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JB
1222006-11-15 Jan Beulich <jbeulich@novell.com>
123
124 PR/3469
125 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
126 chain by linking it to itself.
127 (resolve_symbol_value): Also check symbol_shadow_p().
128 (symbol_shadow_p): New.
129 * symbols.h (symbol_shadow_p): Declare.
130
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MS
1312006-11-12 Mark Shinwell <shinwell@codesourcery.com>
132
133 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
134 (insns): Adjust accordingly.
135 (md_apply_fix): Alter comments to use CBZ instead of CZB.
136
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NC
1372006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
138
139 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
140 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
141
6afdfa61
NC
1422006-11-10 Nick Clifton <nickc@redhat.com>
143
144 PR gas/3456:
145 * config/obj-elf.c (obj_elf_version): Do not include the name
146 field's padding in the namesz value.
147
d84bcf09
TS
1482006-11-09 Thiemo Seufer <ths@mips.com>
149
150 * config/tc-mips.c: Fix outdated comment.
151
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1522006-11-08 H.J. Lu <hongjiu.lu@intel.com>
153
154 * config/tc-i386.h (CpuPNI): Removed.
155 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
156 * config/tc-i386.c (md_assemble): Likewise.
157
05e7221f
AM
1582006-11-08 Alan Modra <amodra@bigpond.net.au>
159
160 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
161
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DD
1622006-11-06 David Daney <ddaney@avtrex.com>
163
164 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
165
82100185
TS
1662006-11-06 Thiemo Seufer <ths@mips.com>
167
168 * doc/c-mips.texi (-march): Document sb1a.
169
a360e743
TS
1702006-11-06 Thiemo Seufer <ths@mips.com>
171
172 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
173 34k always has DSP ASE.
174
64817874
TS
1752006-11-03 Thiemo Seufer <ths@mips.com>
176
177 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
178 MIPS16 instructions referencing other sections, unless they are
179 external branches.
180
7764b395
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1812006-11-03 Thiemo Seufer <ths@mips.com>
182
183 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
184 release 1 CPU.
185
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JJ
1862006-11-03 Jakub Jelinek <jakub@redhat.com>
187
9b8ae42e
JJ
188 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
189 personality and lsda.
190 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
191 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
192 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
193 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
194 (output_cie): Output personality including its encoding and LSDA encoding.
195 (output_fde): Output LSDA.
196 (select_cie_for_fde): Don't share CIE if personality, its encoding or
197 LSDA encoding are different. Copy the 3 fields from fde_entry to
198 cie_entry.
199 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
200
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JJ
201 * subsegs.h (struct frchain): Add frch_cfi_data field.
202 * dw2gencfi.c: Include subsegs.h.
203 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
204 (struct frch_cfi_data): New type.
205 (unused_cfi_data): New variable.
206 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
207 and cfa_save_stack static vars into a structure pointed from
208 each frchain.
209 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
210 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
211 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
212 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
213 Likewise.
214
d1e50f8a
DJ
2152006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
216
217 * config/tc-h8300.c (build_bytes): Fix const warning.
218
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NC
2192006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
220
221 * tc-score.c (do16_rdrs): Handle not! instruction especially.
222
3ba67470
PB
2232006-10-31 Paul Brook <paul@codesourcery.com>
224
225 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
226 for EABIv4.
227
7a1d4c38
PB
2282006-10-31 Paul Brook <paul@codesourcery.com>
229
230 gas/
231 * config/tc-arm.c (object_arch): New variable.
232 (s_arm_object_arch): New function.
233 (md_pseudo_table): Add object_arch.
234 (aeabi_set_public_attributes): Obey object_arch.
235 * doc/c-arm.texi: Document .object_arch.
236
b138abaa
NC
2372006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
238
239 * tc-score.c (data_op2): Check invalid operands.
240 (my_get_expression): Const operand of some instructions can not be
241 symbol in assembly.
242 (get_insn_class_from_type): Handle instruction type Insn_internal.
243 (do_macro_ldst_label): Modify inst.type.
244 (Insn_PIC): Delete.
245 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 246
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RC
2472006-10-29 Randolph Chung <tausq@debian.org>
248
249 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
250 (hppa_regname_to_dw2regnum): New funcions.
251 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
252 (tc_cfi_frame_initial_instructions)
253 (tc_regname_to_dw2regnum): Define.
254 (hppa_cfi_frame_initial_instructions)
255 (hppa_regname_to_dw2regnum): Declare.
256 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
257 (DWARF2_CIE_DATA_ALIGNMENT): Define.
258
e2785c44
NC
2592006-10-29 Nick Clifton <nickc@redhat.com>
260
261 * config/tc-spu.c (md_assemble): Cast printf string size parameter
262 to int in order to avoid a compiler warning.
263
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2642006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
265
266 * config/tc-sh.c (md_assemble): Define size of branches.
267
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BE
2682006-10-26 Ben Elliston <bje@au.ibm.com>
269
270 * dw2gencfi.c (cfi_add_CFA_offset):
271 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
272
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BE
273 * write.c (chain_frchains_together_1): Assert that this function
274 never returns a pointer to the auto variable `dummy'.
275
e9f53129
AM
2762006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
277 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
278 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
279 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
280 Alan Modra <amodra@bigpond.net.au>
281
282 * config/tc-spu.c: New file.
283 * config/tc-spu.h: New file.
284 * configure.tgt: Add SPU support.
285 * Makefile.am: Likewise. Run "make dep-am".
286 * Makefile.in: Regenerate.
287 * po/POTFILES.in: Regenerate.
288
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BE
2892006-10-25 Ben Elliston <bje@au.ibm.com>
290
291 * expr.c (expr): Replace O_add case in switch (op_left) explaining
292 why it can never occur.
5ab504f9 293
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AM
2942006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
295
296 * doc/c-ppc.texi (-mcell): Document.
297 * config/tc-ppc.c (parse_cpu): Parse -mcell.
298 (md_show_usage): Document -mcell.
299
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MM
3002006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
301
302 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
303
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AM
3042006-10-23 Alan Modra <amodra@bigpond.net.au>
305
306 * config/tc-m68hc11.c (md_assemble): Quiet warning.
307
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MF
3082006-10-19 Mike Frysinger <vapier@gentoo.org>
309
310 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
311 (x86_64_section_letter): Likewise.
312
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NC
3132006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
314
315 * config/tc-score.c (build_relax_frag): Compute correct
316 tc_frag_data.fixp.
317
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MF
3182006-10-18 Roy Marples <uberlord@gentoo.org>
319
320 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
321 elf32-sparc as a viable target for the -32 switch and any target
322 starting with elf64-sparc as a viable target for the -64 switch.
323 (sparc_target_format): For 64-bit ELF flavoured output use
324 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
325 ELF_TARGET_FORMAT.
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MF
326 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
327
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3282006-10-17 H.J. Lu <hongjiu.lu@intel.com>
329
330 * configure: Regenerated.
331
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3322006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
333
334 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
335 in addition to testing for '\n'.
336 (TC_EOL_IN_INSN): Provide a default definition if necessary.
337
eb1fe072
NC
3382006-10-13 Sterling Augstine <sterling@tensilica.com>
339
340 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
341 a disjoint DW_AT range.
342
ec6e49f4
NC
3432006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
344
345 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
346
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PB
3472006-10-08 Paul Brook <paul@codesourcery.com>
348
349 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
350 (parse_operands): Use parse_big_immediate for OP_NILO.
351 (neon_cmode_for_logic_imm): Try smaller element sizes.
352 (neon_cmode_for_move_imm): Ditto.
353 (do_neon_logic): Handle .i64 pseudo-op.
354
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AM
3552006-09-29 Alan Modra <amodra@bigpond.net.au>
356
357 * po/POTFILES.in: Regenerate.
358
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L
3592006-09-28 H.J. Lu <hongjiu.lu@intel.com>
360
361 * config/tc-i386.h (CpuMNI): Renamed to ...
362 (CpuSSSE3): This.
363 (CpuUnknownFlags): Updated.
364 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
365 and PROCESSOR_MEROM with PROCESSOR_CORE2.
366 * config/tc-i386.c: Updated.
367 * doc/c-i386.texi: Likewise.
a70ae331 368
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369 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
370
d8ad03e9
NC
3712006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
372
373 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
374
df3ca5a3
NC
3752006-09-27 Nick Clifton <nickc@redhat.com>
376
377 * output-file.c (output_file_close): Prevent an infinite loop
378 reporting that stdoutput could not be closed.
379
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JM
3802006-09-26 Mark Shinwell <shinwell@codesourcery.com>
381 Joseph Myers <joseph@codesourcery.com>
382 Ian Lance Taylor <ian@wasabisystems.com>
383 Ben Elliston <bje@wasabisystems.com>
384
385 * config/tc-arm.c (arm_cext_iwmmxt2): New.
386 (enum operand_parse_code): New code OP_RIWR_I32z.
387 (parse_operands): Handle OP_RIWR_I32z.
388 (do_iwmmxt_wmerge): New function.
389 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
390 a register.
391 (do_iwmmxt_wrwrwr_or_imm5): New function.
392 (insns): Mark instructions as RIWR_I32z as appropriate.
393 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
394 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
395 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
396 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
397 (md_begin): Handle IWMMXT2.
398 (arm_cpus): Add iwmmxt2.
399 (arm_extensions): Likewise.
400 (arm_archs): Likewise.
401
ba83aca1
BW
4022006-09-25 Bob Wilson <bob.wilson@acm.org>
403
404 * doc/as.texinfo (Overview): Revise description of --keep-locals.
405 Add xref to "Symbol Names".
406 (L): Refer to "local symbols" instead of "local labels". Move
407 definition to "Symbol Names" section; add xref to that section.
408 (Symbol Names): Use "Local Symbol Names" section to define local
409 symbols. Add "Local Labels" heading for description of temporary
410 forward/backward labels, and refer to those as "local labels".
411
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L
4122006-09-23 H.J. Lu <hongjiu.lu@intel.com>
413
414 PR binutils/3235
415 * config/tc-i386.c (match_template): Check address size prefix
416 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
417 operand.
418
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AM
4192006-09-22 Alan Modra <amodra@bigpond.net.au>
420
421 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
422
885afe7b
AM
4232006-09-22 Alan Modra <amodra@bigpond.net.au>
424
425 * as.h (as_perror): Delete declaration.
426 * gdbinit.in (as_perror): Delete breakpoint.
427 * messages.c (as_perror): Delete function.
428 * doc/internals.texi: Remove as_perror description.
429 * listing.c (listing_print: Don't use as_perror.
430 * output-file.c (output_file_create, output_file_close): Likewise.
431 * symbols.c (symbol_create, symbol_clone): Likewise.
432 * write.c (write_contents): Likewise.
433 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
434 * config/tc-tic54x.c (tic54x_mlib): Likewise.
435
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AM
4362006-09-22 Alan Modra <amodra@bigpond.net.au>
437
438 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
439 (ppc_handle_align): New function.
440 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
441 (SUB_SEGMENT_ALIGN): Define as zero.
442
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BW
4432006-09-20 Bob Wilson <bob.wilson@acm.org>
444
445 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
446 (Overview): Skip cross reference in man page.
447
99ad8390
NC
4482006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
449
450 * configure.in: Add new target x86_64-pc-mingw64.
451 * configure: Regenerate.
452 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
453 * config/obj-coff.h: Add handling for TE_PEP target specific code
454 and definitions.
99ad8390
NC
455 * config/tc-i386.c: Add new targets.
456 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
457 (x86_64_target_format): Add new method for setup proper default
458 target cpu mode.
99ad8390
NC
459 * config/te-pep.h: Add new target definition header.
460 (TE_PEP): New macro: Identifies new target architecture.
461 (COFF_WITH_pex64): Set proper includes in bfd.
462 * NEWS: Mention new target.
463
73332571
BS
4642006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
465
466 * config/bfin-parse.y (binary): Change sub of const to add of negated
467 const.
468
1c0d3aa6
NC
4692006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
470
471 * config/tc-score.c: New file.
472 * config/tc-score.h: Newf file.
473 * configure.tgt: Add Score target.
474 * Makefile.am: Add Score files.
475 * Makefile.in: Regenerate.
476 * NEWS: Mention new target support.
477
4fa3602b
PB
4782006-09-16 Paul Brook <paul@codesourcery.com>
479
480 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
481 * doc/c-arm.texi (movsp): Document offset argument.
482
16dd5e42
PB
4832006-09-16 Paul Brook <paul@codesourcery.com>
484
485 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
486 unsigned int to avoid 64-bit host problems.
487
c4ae04ce
BS
4882006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
489
490 * config/bfin-parse.y (binary): Do some more constant folding for
491 additions.
492
e5d4a5a6
JB
4932006-09-13 Jan Beulich <jbeulich@novell.com>
494
495 * input-file.c (input_file_give_next_buffer): Demote as_bad to
496 as_warn.
497
1a1219cb
AM
4982006-09-13 Alan Modra <amodra@bigpond.net.au>
499
500 PR gas/3165
501 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
502 in parens.
503
f79d9c1d
AM
5042006-09-13 Alan Modra <amodra@bigpond.net.au>
505
506 * input-file.c (input_file_open): Replace as_perror with as_bad
507 so that gas exits with error on file errors. Correct error
508 message.
509 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 510 * input-file.h: Update comment.
f79d9c1d 511
f512f76f
NC
5122006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
513
514 PR gas/3172
515 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
516 registers as a sub-class of wC registers.
517
8d79fd44
AM
5182006-09-11 Alan Modra <amodra@bigpond.net.au>
519
520 PR gas/3165
521 * config/tc-mips.h (enum dwarf2_format): Forward declare.
522 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
523 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
524 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
525
6258339f
NC
5262006-09-08 Nick Clifton <nickc@redhat.com>
527
528 PR gas/3129
529 * doc/as.texinfo (Macro): Improve documentation about separating
530 macro arguments from following text.
531
f91e006c
PB
5322006-09-08 Paul Brook <paul@codesourcery.com>
533
534 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
535
466bbf93
PB
5362006-09-07 Paul Brook <paul@codesourcery.com>
537
538 * config/tc-arm.c (parse_operands): Mark operand as present.
539
428e3f1f
PB
5402006-09-04 Paul Brook <paul@codesourcery.com>
541
542 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
543 (do_neon_dyadic_if_i_d): Avoid setting U bit.
544 (do_neon_mac_maybe_scalar): Ditto.
545 (do_neon_dyadic_narrow): Force operand type to NT_integer.
546 (insns): Remove out of date comments.
547
fb25138b
NC
5482006-08-29 Nick Clifton <nickc@redhat.com>
549
550 * read.c (s_align): Initialize the 'stopc' variable to prevent
551 compiler complaints about it being used without being
552 initialized.
553 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
554 s_float_space, s_struct, cons_worker, equals): Likewise.
555
5091343a
AM
5562006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
557
558 * ecoff.c (ecoff_directive_val): Fix message typo.
559 * config/tc-ns32k.c (convert_iif): Likewise.
560 * config/tc-sh64.c (shmedia_check_limits): Likewise.
561
1f2a7e38
BW
5622006-08-25 Sterling Augustine <sterling@tensilica.com>
563 Bob Wilson <bob.wilson@acm.org>
564
565 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
566 the state of the absolute_literals directive. Remove align frag at
567 the start of the literal pool position.
568
34135039
BW
5692006-08-25 Bob Wilson <bob.wilson@acm.org>
570
571 * doc/c-xtensa.texi: Add @group commands in examples.
572
74869ac7
BW
5732006-08-24 Bob Wilson <bob.wilson@acm.org>
574
575 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
576 (INIT_LITERAL_SECTION_NAME): Delete.
577 (lit_state struct): Remove segment names, init_lit_seg, and
578 fini_lit_seg. Add lit_prefix and current_text_seg.
579 (init_literal_head_h, init_literal_head): Delete.
580 (fini_literal_head_h, fini_literal_head): Delete.
581 (xtensa_begin_directive): Move argument parsing to
582 xtensa_literal_prefix function.
583 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
584 (xtensa_literal_prefix): Parse the directive argument here and
585 record it in the lit_prefix field. Remove code to derive literal
586 section names.
587 (linkonce_len): New.
588 (get_is_linkonce_section): Use linkonce_len. Check for any
589 ".gnu.linkonce.*" section, not just text sections.
590 (md_begin): Remove initialization of deleted lit_state fields.
591 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
592 to init_literal_head and fini_literal_head.
593 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
594 when traversing literal_head list.
595 (match_section_group): New.
596 (cache_literal_section): Rewrite to determine the literal section
597 name on the fly, create the section and return it.
598 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
599 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
600 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
601 Use xtensa_get_property_section from bfd.
602 (retrieve_xtensa_section): Delete.
603 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
604 description to refer to plural literal sections and add xref to
605 the Literal Directive section.
606 (Literal Directive): Describe new rules for deriving literal section
607 names. Add footnote for special case of .init/.fini with
608 --text-section-literals.
609 (Literal Prefix Directive): Replace old naming rules with xref to the
610 Literal Directive section.
611
87a1fd79
JM
6122006-08-21 Joseph Myers <joseph@codesourcery.com>
613
614 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
615 merging with previous long opcode.
616
7148cc28
NC
6172006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
618
619 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
620 * Makefile.in: Regenerate.
621 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
622 renamed. Adjust.
623
3e9e4fcf
JB
6242006-08-16 Julian Brown <julian@codesourcery.com>
625
626 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
627 to use ARM instructions on non-ARM-supporting cores.
628 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
629 mode automatically based on cpu variant.
630 (md_begin): Call above function.
631
267d2029
JB
6322006-08-16 Julian Brown <julian@codesourcery.com>
633
634 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
635 recognized in non-unified syntax mode.
636
4be041b2
TS
6372006-08-15 Thiemo Seufer <ths@mips.com>
638 Nigel Stephens <nigel@mips.com>
639 David Ung <davidu@mips.com>
640
641 * configure.tgt: Handle mips*-sde-elf*.
642
3a93f742
TS
6432006-08-12 Thiemo Seufer <ths@networkno.de>
644
645 * config/tc-mips.c (mips16_ip): Fix argument register handling
646 for restore instruction.
647
1737851b
BW
6482006-08-08 Bob Wilson <bob.wilson@acm.org>
649
650 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
651 (out_sleb128): New.
652 (out_fixed_inc_line_addr): New.
653 (process_entries): Use out_fixed_inc_line_addr when
654 DWARF2_USE_FIXED_ADVANCE_PC is set.
655 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
656
e14e52f8
DD
6572006-08-08 DJ Delorie <dj@redhat.com>
658
659 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
660 vs full symbols so that we never have more than one pointer value
661 for any given symbol in our symbol table.
662
802f5d9e
NC
6632006-08-08 Sterling Augustine <sterling@tensilica.com>
664
665 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
666 and emit DW_AT_ranges when code in compilation unit is not
667 contiguous.
668 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
669 is not contiguous.
670 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
671 (out_debug_ranges): New function to emit .debug_ranges section
672 when code is not contiguous.
673
720abc60
NC
6742006-08-08 Nick Clifton <nickc@redhat.com>
675
676 * config/tc-arm.c (WARN_DEPRECATED): Enable.
677
f0927246
NC
6782006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
679
680 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
681 only block.
682 (pe_directive_secrel) [TE_PE]: New function.
683 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
684 loc, loc_mark_labels.
685 [TE_PE]: Handle secrel32.
686 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
687 call.
688 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
689 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
690 (md_section_align): Only round section sizes here for AOUT
691 targets.
692 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
693 (tc_pe_dwarf2_emit_offset): New function.
694 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
695 (cons_fix_new_arm): Handle O_secrel.
696 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
697 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
698 of OBJ_ELF only block.
699 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
700 tc_pe_dwarf2_emit_offset.
701
55e6e397
RS
7022006-08-04 Richard Sandiford <richard@codesourcery.com>
703
704 * config/tc-sh.c (apply_full_field_fix): New function.
705 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
706 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
707 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
708 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
709
9cd19b17
NC
7102006-08-03 Nick Clifton <nickc@redhat.com>
711
712 PR gas/2991
713 * config.in: Regenerate.
714
97f87066
JM
7152006-08-03 Joseph Myers <joseph@codesourcery.com>
716
717 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 718 for OP_RIWR_RIWC.
97f87066 719
41adaa5c
JM
7202006-08-03 Joseph Myers <joseph@codesourcery.com>
721
722 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
723 (parse_operands): Handle it.
724 (insns): Use it for tmcr and tmrc.
725
9d7cbccd
NC
7262006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
727
728 PR binutils/2983
729 * config/tc-i386.c (md_parse_option): Treat any target starting
730 with elf64_x86_64 as a viable target for the -64 switch.
731 (i386_target_format): For 64-bit ELF flavoured output use
732 ELF_TARGET_FORMAT64.
733 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
734
c973bc5c
NC
7352006-08-02 Nick Clifton <nickc@redhat.com>
736
737 PR gas/2991
738 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
739 bfd/aclocal.m4.
740 * configure.in: Run BFD_BINARY_FOPEN.
741 * configure: Regenerate.
742 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
743 file to include.
744
cfde7f70
L
7452006-08-01 H.J. Lu <hongjiu.lu@intel.com>
746
747 * config/tc-i386.c (md_assemble): Don't update
748 cpu_arch_isa_flags.
749
b4c71f56
TS
7502006-08-01 Thiemo Seufer <ths@mips.com>
751
752 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
753
54f4ddb3
TS
7542006-08-01 Thiemo Seufer <ths@mips.com>
755
756 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
757 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
758 BFD_RELOC_32 and BFD_RELOC_16.
759 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
760 md_convert_frag, md_obj_end): Fix comment formatting.
761
d103cf61
TS
7622006-07-31 Thiemo Seufer <ths@mips.com>
763
764 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
765 handling for BFD_RELOC_MIPS16_JMP.
766
601e61cd
NC
7672006-07-24 Andreas Schwab <schwab@suse.de>
768
769 PR/2756
770 * read.c (read_a_source_file): Ignore unknown text after line
771 comment character. Fix misleading comment.
772
b45619c0
NC
7732006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
774
775 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
776 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
777 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
778 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
779 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
780 doc/c-z80.texi, doc/internals.texi: Fix some typos.
781
784906c5
NC
7822006-07-21 Nick Clifton <nickc@redhat.com>
783
784 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
785 linker testsuite.
786
d5f010e9
TS
7872006-07-20 Thiemo Seufer <ths@mips.com>
788 Nigel Stephens <nigel@mips.com>
789
790 * config/tc-mips.c (md_parse_option): Don't infer optimisation
791 options from debug options.
792
35d3d567
TS
7932006-07-20 Thiemo Seufer <ths@mips.com>
794
795 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
796 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
797
401a54cf
PB
7982006-07-19 Paul Brook <paul@codesourcery.com>
799
800 * config/tc-arm.c (insns): Fix rbit Arm opcode.
801
16805f35
PB
8022006-07-18 Paul Brook <paul@codesourcery.com>
803
804 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
805 (md_convert_frag): Use correct reloc for add_pc. Use
806 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
807 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
808 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
809
d9e05e4e
AM
8102006-07-17 Mat Hostetter <mat@lcs.mit.edu>
811
812 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
813 when file and line unknown.
814
f43abd2b
TS
8152006-07-17 Thiemo Seufer <ths@mips.com>
816
817 * read.c (s_struct): Use IS_ELF.
818 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
819 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
820 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
821 s_mips_mask): Likewise.
822
a2902af6
TS
8232006-07-16 Thiemo Seufer <ths@mips.com>
824 David Ung <davidu@mips.com>
825
826 * read.c (s_struct): Handle ELF section changing.
827 * config/tc-mips.c (s_align): Leave enabling auto-align to the
828 generic code.
829 (s_change_sec): Try section changing only if we output ELF.
830
d32cad65
L
8312006-07-15 H.J. Lu <hongjiu.lu@intel.com>
832
833 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
834 CpuAmdFam10.
835 (smallest_imm_type): Remove Cpu086.
836 (i386_target_format): Likewise.
837
838 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
839 Update CpuXXX.
840
050dfa73
MM
8412006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
842 Michael Meissner <michael.meissner@amd.com>
843
844 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
845 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
846 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
847 architecture.
848 (i386_align_code): Ditto.
849 (md_assemble_code): Add support for insertq/extrq instructions,
850 swapping as needed for intel syntax.
851 (swap_imm_operands): New function to swap immediate operands.
852 (swap_operands): Deal with 4 operand instructions.
853 (build_modrm_byte): Add support for insertq instruction.
854
6b2de085
L
8552006-07-13 H.J. Lu <hongjiu.lu@intel.com>
856
857 * config/tc-i386.h (Size64): Fix a typo in comment.
858
01eaea5a
NC
8592006-07-12 Nick Clifton <nickc@redhat.com>
860
861 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 862 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
863 already been checked here.
864
1e85aad8
JW
8652006-07-07 James E Wilson <wilson@specifix.com>
866
867 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
868
1370e33d
NC
8692006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
870 Nick Clifton <nickc@redhat.com>
871
872 PR binutils/2877
873 * doc/as.texi: Fix spelling typo: branchs => branches.
874 * doc/c-m68hc11.texi: Likewise.
875 * config/tc-m68hc11.c: Likewise.
876 Support old spelling of command line switch for backwards
877 compatibility.
878
5f0fe04b
TS
8792006-07-04 Thiemo Seufer <ths@mips.com>
880 David Ung <davidu@mips.com>
881
882 * config/tc-mips.c (s_is_linkonce): New function.
883 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
884 weak, external, and linkonce symbols.
885 (pic_need_relax): Use s_is_linkonce.
886
85234291
L
8872006-06-24 H.J. Lu <hongjiu.lu@intel.com>
888
889 * doc/as.texinfo (Org): Remove space.
890 (P2align): Add "@var{abs-expr},".
891
ccc9c027
L
8922006-06-23 H.J. Lu <hongjiu.lu@intel.com>
893
894 * config/tc-i386.c (cpu_arch_tune_set): New.
895 (cpu_arch_isa): Likewise.
896 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
897 nops with short or long nop sequences based on -march=/.arch
898 and -mtune=.
899 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
900 set cpu_arch_tune and cpu_arch_tune_flags.
901 (md_parse_option): For -march=, set cpu_arch_isa and set
902 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
903 0. Set cpu_arch_tune_set to 1 for -mtune=.
904 (i386_target_format): Don't set cpu_arch_tune.
905
d4dc2f22
TS
9062006-06-23 Nigel Stephens <nigel@mips.com>
907
908 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
909 generated .sbss.* and .gnu.linkonce.sb.*.
910
a8dbcb85
TS
9112006-06-23 Thiemo Seufer <ths@mips.com>
912 David Ung <davidu@mips.com>
913
914 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
915 label_list.
916 * config/tc-mips.c (label_list): Define per-segment label_list.
917 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
918 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
919 mips_from_file_after_relocs, mips_define_label): Use per-segment
920 label_list.
921
3994f87e
TS
9222006-06-22 Thiemo Seufer <ths@mips.com>
923
924 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
925 (append_insn): Use it.
926 (md_apply_fix): Whitespace formatting.
927 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
928 mips16_extended_frag): Remove register specifier.
929 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
930 constants.
931
fa073d69
MS
9322006-06-21 Mark Shinwell <shinwell@codesourcery.com>
933
934 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
935 a directive saving VFP registers for ARMv6 or later.
936 (s_arm_unwind_save): Add parameter arch_v6 and call
937 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
938 appropriate.
939 (md_pseudo_table): Add entry for new "vsave" directive.
940 * doc/c-arm.texi: Correct error in example for "save"
941 directive (fstmdf -> fstmdx). Also document "vsave" directive.
942
8e77b565 9432006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
944 Anatoly Sokolov <aesok@post.ru>
945
a70ae331
AM
946 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
947 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
948 atmega164p/atmega324p.
949 * doc/c-avr.texi: Document new mcu and arch options.
950
8b1ad454
NC
9512006-06-17 Nick Clifton <nickc@redhat.com>
952
953 * config/tc-arm.c (enum parse_operand_result): Move outside of
954 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
955
9103f4f4
L
9562006-06-16 H.J. Lu <hongjiu.lu@intel.com>
957
958 * config/tc-i386.h (processor_type): New.
959 (arch_entry): Add type.
960
961 * config/tc-i386.c (cpu_arch_tune): New.
962 (cpu_arch_tune_flags): Likewise.
963 (cpu_arch_isa_flags): Likewise.
964 (cpu_arch): Updated.
965 (set_cpu_arch): Also update cpu_arch_isa_flags.
966 (md_assemble): Update cpu_arch_isa_flags.
967 (OPTION_MARCH): New.
968 (OPTION_MTUNE): Likewise.
969 (md_longopts): Add -march= and -mtune=.
970 (md_parse_option): Support -march= and -mtune=.
971 (md_show_usage): Add -march=CPU/-mtune=CPU.
972 (i386_target_format): Also update cpu_arch_isa_flags,
973 cpu_arch_tune and cpu_arch_tune_flags.
974
975 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
976
977 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
978
4962c51a
MS
9792006-06-15 Mark Shinwell <shinwell@codesourcery.com>
980
981 * config/tc-arm.c (enum parse_operand_result): New.
982 (struct group_reloc_table_entry): New.
983 (enum group_reloc_type): New.
984 (group_reloc_table): New array.
985 (find_group_reloc_table_entry): New function.
986 (parse_shifter_operand_group_reloc): New function.
987 (parse_address_main): New function, incorporating code
988 from the old parse_address function. To be used via...
989 (parse_address): wrapper for parse_address_main; and
990 (parse_address_group_reloc): new function, likewise.
991 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
992 OP_ADDRGLDRS, OP_ADDRGLDC.
993 (parse_operands): Support for these new operand codes.
994 New macro po_misc_or_fail_no_backtrack.
995 (encode_arm_cp_address): Preserve group relocations.
996 (insns): Modify to use the above operand codes where group
997 relocations are permitted.
998 (md_apply_fix): Handle the group relocations
999 ALU_PC_G0_NC through LDC_SB_G2.
1000 (tc_gen_reloc): Likewise.
1001 (arm_force_relocation): Leave group relocations for the linker.
1002 (arm_fix_adjustable): Likewise.
1003
cd2f129f
JB
10042006-06-15 Julian Brown <julian@codesourcery.com>
1005
1006 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
1007 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
1008 relocs properly.
1009
46e883c5
L
10102006-06-12 H.J. Lu <hongjiu.lu@intel.com>
1011
1012 * config/tc-i386.c (process_suffix): Don't add rex64 for
1013 "xchg %rax,%rax".
1014
1787fe5b
TS
10152006-06-09 Thiemo Seufer <ths@mips.com>
1016
1017 * config/tc-mips.c (mips_ip): Maintain argument count.
1018
96f989c2
AM
10192006-06-09 Alan Modra <amodra@bigpond.net.au>
1020
1021 * config/tc-iq2000.c: Include sb.h.
1022
7c752c2a
TS
10232006-06-08 Nigel Stephens <nigel@mips.com>
1024
1025 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
1026 aliases for better compatibility with SGI tools.
1027
03bf704f
AM
10282006-06-08 Alan Modra <amodra@bigpond.net.au>
1029
1030 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
1031 * Makefile.am (GASLIBS): Expand @BFDLIB@.
1032 (BFDVER_H): Delete.
1033 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
1034 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
1035 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
1036 Run "make dep-am".
1037 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
1038 * Makefile.in: Regenerate.
1039 * doc/Makefile.in: Regenerate.
1040 * configure: Regenerate.
1041
6648b7cf
JM
10422006-06-07 Joseph S. Myers <joseph@codesourcery.com>
1043
1044 * po/Make-in (pdf, ps): New dummy targets.
1045
037e8744
JB
10462006-06-07 Julian Brown <julian@codesourcery.com>
1047
1048 * config/tc-arm.c (stdarg.h): include.
1049 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1050 array.
1051 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1052 REG_TYPE_NSDQ (single, double or quad vector reg).
1053 (reg_expected_msgs): Update.
1054 (BAD_FPU): Add macro for unsupported FPU instruction error.
1055 (parse_neon_type): Support 'd' as an alias for .f64.
1056 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1057 sets of registers.
1058 (parse_vfp_reg_list): Don't update first arg on error.
1059 (parse_neon_mov): Support extra syntax for VFP moves.
1060 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1061 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1062 (parse_operands): Support isvec, issingle operands fields, new parse
1063 codes above.
1064 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1065 msr variants.
1066 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1067 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1068 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1069 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1070 shapes.
1071 (neon_shape): Redefine in terms of above.
1072 (neon_shape_class): New enumeration, table of shape classes.
1073 (neon_shape_el): New enumeration. One element of a shape.
1074 (neon_shape_el_size): Register widths of above, where appropriate.
1075 (neon_shape_info): New struct. Info for shape table.
1076 (neon_shape_tab): New array.
1077 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1078 (neon_check_shape): Rewrite as...
1079 (neon_select_shape): New function to classify instruction shapes,
1080 driven by new table neon_shape_tab array.
1081 (neon_quad): New function. Return 1 if shape should set Q flag in
1082 instructions (or equivalent), 0 otherwise.
1083 (type_chk_of_el_type): Support F64.
1084 (el_type_of_type_chk): Likewise.
1085 (neon_check_type): Add support for VFP type checking (VFP data
1086 elements fill their containing registers).
1087 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1088 in thumb mode for VFP instructions.
1089 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1090 and encode the current instruction as if it were that opcode.
1091 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1092 arguments, call function in PFN.
1093 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1094 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1095 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1096 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1097 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1098 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1099 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1100 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1101 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1102 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1103 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1104 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1105 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1106 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1107 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1108 neon_quad.
1109 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1110 between VFP and Neon turns out to belong to Neon. Perform
1111 architecture check and fill in condition field if appropriate.
1112 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1113 (do_neon_cvt): Add support for VFP variants of instructions.
1114 (neon_cvt_flavour): Extend to cover VFP conversions.
1115 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1116 vmov variants.
1117 (do_neon_ldr_str): Handle single-precision VFP load/store.
1118 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1119 NS_NULL not NS_IGNORE.
1120 (opcode_tag): Add OT_csuffixF for operands which either take a
1121 conditional suffix, or have 0xF in the condition field.
1122 (md_assemble): Add support for OT_csuffixF.
1123 (NCE): Replace macro with...
1124 (NCE_tag, NCE, NCEF): New macros.
1125 (nCE): Replace macro with...
1126 (nCE_tag, nCE, nCEF): New macros.
1127 (insns): Add support for VFP insns or VFP versions of insns msr,
1128 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1129 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1130 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1131 VFP/Neon insns together.
1132
ebd1c875
AM
11332006-06-07 Alan Modra <amodra@bigpond.net.au>
1134 Ladislav Michl <ladis@linux-mips.org>
1135
1136 * app.c: Don't include headers already included by as.h.
1137 * as.c: Likewise.
1138 * atof-generic.c: Likewise.
1139 * cgen.c: Likewise.
1140 * dwarf2dbg.c: Likewise.
1141 * expr.c: Likewise.
1142 * input-file.c: Likewise.
1143 * input-scrub.c: Likewise.
1144 * macro.c: Likewise.
1145 * output-file.c: Likewise.
1146 * read.c: Likewise.
1147 * sb.c: Likewise.
1148 * config/bfin-lex.l: Likewise.
1149 * config/obj-coff.h: Likewise.
1150 * config/obj-elf.h: Likewise.
1151 * config/obj-som.h: Likewise.
1152 * config/tc-arc.c: Likewise.
1153 * config/tc-arm.c: Likewise.
1154 * config/tc-avr.c: Likewise.
1155 * config/tc-bfin.c: Likewise.
1156 * config/tc-cris.c: Likewise.
1157 * config/tc-d10v.c: Likewise.
1158 * config/tc-d30v.c: Likewise.
1159 * config/tc-dlx.h: Likewise.
1160 * config/tc-fr30.c: Likewise.
1161 * config/tc-frv.c: Likewise.
1162 * config/tc-h8300.c: Likewise.
1163 * config/tc-hppa.c: Likewise.
1164 * config/tc-i370.c: Likewise.
1165 * config/tc-i860.c: Likewise.
1166 * config/tc-i960.c: Likewise.
1167 * config/tc-ip2k.c: Likewise.
1168 * config/tc-iq2000.c: Likewise.
1169 * config/tc-m32c.c: Likewise.
1170 * config/tc-m32r.c: Likewise.
1171 * config/tc-maxq.c: Likewise.
1172 * config/tc-mcore.c: Likewise.
1173 * config/tc-mips.c: Likewise.
1174 * config/tc-mmix.c: Likewise.
1175 * config/tc-mn10200.c: Likewise.
1176 * config/tc-mn10300.c: Likewise.
1177 * config/tc-msp430.c: Likewise.
1178 * config/tc-mt.c: Likewise.
1179 * config/tc-ns32k.c: Likewise.
1180 * config/tc-openrisc.c: Likewise.
1181 * config/tc-ppc.c: Likewise.
1182 * config/tc-s390.c: Likewise.
1183 * config/tc-sh.c: Likewise.
1184 * config/tc-sh64.c: Likewise.
1185 * config/tc-sparc.c: Likewise.
1186 * config/tc-tic30.c: Likewise.
1187 * config/tc-tic4x.c: Likewise.
1188 * config/tc-tic54x.c: Likewise.
1189 * config/tc-v850.c: Likewise.
1190 * config/tc-vax.c: Likewise.
1191 * config/tc-xc16x.c: Likewise.
1192 * config/tc-xstormy16.c: Likewise.
1193 * config/tc-xtensa.c: Likewise.
1194 * config/tc-z80.c: Likewise.
1195 * config/tc-z8k.c: Likewise.
1196 * macro.h: Don't include sb.h or ansidecl.h.
1197 * sb.h: Don't include stdio.h or ansidecl.h.
1198 * cond.c: Include sb.h.
1199 * itbl-lex.l: Include as.h instead of other system headers.
1200 * itbl-parse.y: Likewise.
1201 * itbl-ops.c: Similarly.
1202 * itbl-ops.h: Don't include as.h or ansidecl.h.
1203 * config/bfin-defs.h: Don't include bfd.h or as.h.
1204 * config/bfin-parse.y: Include as.h instead of other system headers.
1205
9622b051
AM
12062006-06-06 Ben Elliston <bje@au.ibm.com>
1207 Anton Blanchard <anton@samba.org>
1208
1209 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1210 (md_show_usage): Document it.
1211 (ppc_setup_opcodes): Test power6 opcode flag bits.
1212 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1213
65263ce3
TS
12142006-06-06 Thiemo Seufer <ths@mips.com>
1215 Chao-ying Fu <fu@mips.com>
1216
1217 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1218 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1219 (macro_build): Update comment.
1220 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1221 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1222 CPU_HAS_MDMX.
1223 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1224 MIPS_CPU_ASE_MDMX flags for sb1.
1225
a9e24354
TS
12262006-06-05 Thiemo Seufer <ths@mips.com>
1227
1228 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1229 appropriate.
1230 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1231 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1232 and MT instructions a fatal error. Use INSERT_OPERAND where
1233 appropriate. Improve warnings for break and wait code overflows.
1234 Use symbolic constant of OP_MASK_COPZ.
1235 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1236
4cfe2c59
DJ
12372006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1238
1239 * po/Make-in (top_builddir): Define.
1240
e10fad12
JM
12412006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1242
1243 * doc/Makefile.am (TEXI2DVI): Define.
1244 * doc/Makefile.in: Regenerate.
1245 * doc/c-arc.texi: Fix typo.
1246
12e64c2c
AM
12472006-06-01 Alan Modra <amodra@bigpond.net.au>
1248
1249 * config/obj-ieee.c: Delete.
1250 * config/obj-ieee.h: Delete.
1251 * Makefile.am (OBJ_FORMATS): Remove ieee.
1252 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1253 (obj-ieee.o): Remove rule.
1254 * Makefile.in: Regenerate.
1255 * configure.in (atof): Remove tahoe.
1256 (OBJ_MAYBE_IEEE): Don't define.
1257 * configure: Regenerate.
1258 * config.in: Regenerate.
1259 * doc/Makefile.in: Regenerate.
1260 * po/POTFILES.in: Regenerate.
1261
20e95c23
DJ
12622006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1263
1264 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1265 and LIBINTL_DEP everywhere.
1266 (INTLLIBS): Remove.
1267 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1268 * acinclude.m4: Include new gettext macros.
1269 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1270 Remove local code for po/Makefile.
1271 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1272
eebf07fb
NC
12732006-05-30 Nick Clifton <nickc@redhat.com>
1274
1275 * po/es.po: Updated Spanish translation.
1276
b6aee19e
DC
12772006-05-06 Denis Chertykov <denisc@overta.ru>
1278
1279 * doc/c-avr.texi: New file.
1280 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1281 * doc/all.texi: Set AVR
1282 * doc/as.texinfo: Include c-avr.texi
1283
f8fdc850 12842006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1285
f8fdc850
JZ
1286 * config/bfin-parse.y (check_macfunc): Loose the condition of
1287 calling check_multiply_halfregs ().
1288
a3205465
JZ
12892006-05-25 Jie Zhang <jie.zhang@analog.com>
1290
1291 * config/bfin-parse.y (asm_1): Better check and deal with
1292 vector and scalar Multiply 16-Bit Operands instructions.
1293
9b52905e
NC
12942006-05-24 Nick Clifton <nickc@redhat.com>
1295
1296 * config/tc-hppa.c: Convert to ISO C90 format.
1297 * config/tc-hppa.h: Likewise.
1298
12992006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1300 Randolph Chung <randolph@tausq.org>
a70ae331 1301
9b52905e
NC
1302 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1303 is_tls_ieoff, is_tls_leoff): Define.
1304 (fix_new_hppa): Handle TLS.
1305 (cons_fix_new_hppa): Likewise.
1306 (pa_ip): Likewise.
1307 (md_apply_fix): Handle TLS relocs.
1308 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1309
a70ae331 13102006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1311
1312 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1313
ad3fea08
TS
13142006-05-23 Thiemo Seufer <ths@mips.com>
1315 David Ung <davidu@mips.com>
1316 Nigel Stephens <nigel@mips.com>
1317
1318 [ gas/ChangeLog ]
1319 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1320 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1321 ISA_HAS_MXHC1): New macros.
1322 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1323 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1324 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1325 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1326 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1327 (mips_after_parse_args): Change default handling of float register
1328 size to account for 32bit code with 64bit FP. Better sanity checking
1329 of ISA/ASE/ABI option combinations.
1330 (s_mipsset): Support switching of GPR and FPR sizes via
1331 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1332 options.
1333 (mips_elf_final_processing): We should record the use of 64bit FP
1334 registers in 32bit code but we don't, because ELF header flags are
1335 a scarce ressource.
1336 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1337 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1338 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1339 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1340 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1341 missing -march options. Document .set arch=CPU. Move .set smartmips
1342 to ASE page. Use @code for .set FOO examples.
1343
8b64503a
JZ
13442006-05-23 Jie Zhang <jie.zhang@analog.com>
1345
1346 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1347 if needed.
1348
403022e0
JZ
13492006-05-23 Jie Zhang <jie.zhang@analog.com>
1350
1351 * config/bfin-defs.h (bfin_equals): Remove declaration.
1352 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1353 * config/tc-bfin.c (bfin_name_is_register): Remove.
1354 (bfin_equals): Remove.
1355 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1356 (bfin_name_is_register): Remove declaration.
1357
7455baf8
TS
13582006-05-19 Thiemo Seufer <ths@mips.com>
1359 Nigel Stephens <nigel@mips.com>
1360
1361 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1362 (mips_oddfpreg_ok): New function.
1363 (mips_ip): Use it.
1364
707bfff6
TS
13652006-05-19 Thiemo Seufer <ths@mips.com>
1366 David Ung <davidu@mips.com>
1367
1368 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1369 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1370 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1371 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1372 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1373 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1374 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1375 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1376 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1377 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1378 reg_names_o32, reg_names_n32n64): Define register classes.
1379 (reg_lookup): New function, use register classes.
1380 (md_begin): Reserve register names in the symbol table. Simplify
1381 OBJ_ELF defines.
1382 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1383 Use reg_lookup.
1384 (mips16_ip): Use reg_lookup.
1385 (tc_get_register): Likewise.
1386 (tc_mips_regname_to_dw2regnum): New function.
1387
1df69f4f
TS
13882006-05-19 Thiemo Seufer <ths@mips.com>
1389
1390 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1391 Un-constify string argument.
1392 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1393 Likewise.
1394 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1395 Likewise.
1396 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1397 Likewise.
1398 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1399 Likewise.
1400 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1401 Likewise.
1402 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1403 Likewise.
1404
377260ba
NS
14052006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1406
1407 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1408 cfloat/m68881 to correct architecture before using it.
1409
cce7653b
NC
14102006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1411
a70ae331 1412 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1413 constant values.
1414
b0796911
PB
14152006-05-15 Paul Brook <paul@codesourcery.com>
1416
1417 * config/tc-arm.c (arm_adjust_symtab): Use
1418 bfd_is_arm_special_symbol_name.
1419
64b607e6
BW
14202006-05-15 Bob Wilson <bob.wilson@acm.org>
1421
1422 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1423 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1424 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1425 Handle errors from calls to xtensa_opcode_is_* functions.
1426
9b3f89ee
TS
14272006-05-14 Thiemo Seufer <ths@mips.com>
1428
1429 * config/tc-mips.c (macro_build): Test for currently active
1430 mips16 option.
1431 (mips16_ip): Reject invalid opcodes.
1432
370b66a1
CD
14332006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1434
1435 * doc/as.texinfo: Rename "Index" to "AS Index",
1436 and "ABORT" to "ABORT (COFF)".
1437
b6895b4f
PB
14382006-05-11 Paul Brook <paul@codesourcery.com>
1439
1440 * config/tc-arm.c (parse_half): New function.
1441 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1442 (parse_operands): Ditto.
1443 (do_mov16): Reject invalid relocations.
1444 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1445 (insns): Replace Iffff with HALF.
1446 (md_apply_fix): Add MOVW and MOVT relocs.
1447 (tc_gen_reloc): Ditto.
1448 * doc/c-arm.texi: Document relocation operators
1449
e28387c3
PB
14502006-05-11 Paul Brook <paul@codesourcery.com>
1451
1452 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1453
89ee2ebe
TS
14542006-05-11 Thiemo Seufer <ths@mips.com>
1455
1456 * config/tc-mips.c (append_insn): Don't check the range of j or
1457 jal addresses.
1458
53baae48
NC
14592006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1460
1461 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1462 relocs against external symbols for WinCE targets.
53baae48
NC
1463 (md_apply_fix): Likewise.
1464
4e2a74a8
TS
14652006-05-09 David Ung <davidu@mips.com>
1466
1467 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1468 j or jal address.
1469
337ff0a5
NC
14702006-05-09 Nick Clifton <nickc@redhat.com>
1471
1472 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1473 against symbols which are not going to be placed into the symbol
1474 table.
1475
8c9f705e
BE
14762006-05-09 Ben Elliston <bje@au.ibm.com>
1477
1478 * expr.c (operand): Remove `if (0 && ..)' statement and
1479 subsequently unused target_op label. Collapse `if (1 || ..)'
1480 statement.
1481 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1482 separately above the switch.
1483
2fd0d2ac
NC
14842006-05-08 Nick Clifton <nickc@redhat.com>
1485
1486 PR gas/2623
1487 * config/tc-msp430.c (line_separator_character): Define as |.
1488
e16bfa71
TS
14892006-05-08 Thiemo Seufer <ths@mips.com>
1490 Nigel Stephens <nigel@mips.com>
1491 David Ung <davidu@mips.com>
1492
1493 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1494 (mips_opts): Likewise.
1495 (file_ase_smartmips): New variable.
1496 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1497 (macro_build): Handle SmartMIPS instructions.
1498 (mips_ip): Likewise.
1499 (md_longopts): Add argument handling for smartmips.
1500 (md_parse_options, mips_after_parse_args): Likewise.
1501 (s_mipsset): Add .set smartmips support.
1502 (md_show_usage): Document -msmartmips/-mno-smartmips.
1503 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1504 .set smartmips.
1505 * doc/c-mips.texi: Likewise.
1506
32638454
AM
15072006-05-08 Alan Modra <amodra@bigpond.net.au>
1508
1509 * write.c (relax_segment): Add pass count arg. Don't error on
1510 negative org/space on first two passes.
1511 (relax_seg_info): New struct.
1512 (relax_seg, write_object_file): Adjust.
1513 * write.h (relax_segment): Update prototype.
1514
b7fc2769
JB
15152006-05-05 Julian Brown <julian@codesourcery.com>
1516
1517 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1518 checking.
1519 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1520 architecture version checks.
1521 (insns): Allow overlapping instructions to be used in VFP mode.
1522
7f841127
L
15232006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1524
1525 PR gas/2598
1526 * config/obj-elf.c (obj_elf_change_section): Allow user
1527 specified SHF_ALPHA_GPREL.
1528
73160847
NC
15292006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1530
1531 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1532 for PMEM related expressions.
1533
56487c55
NC
15342006-05-05 Nick Clifton <nickc@redhat.com>
1535
1536 PR gas/2582
1537 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1538 insertion of a directory separator character into a string at a
1539 given offset. Uses heuristics to decide when to use a backslash
1540 character rather than a forward-slash character.
1541 (dwarf2_directive_loc): Use the macro.
1542 (out_debug_info): Likewise.
1543
d43b4baf
TS
15442006-05-05 Thiemo Seufer <ths@mips.com>
1545 David Ung <davidu@mips.com>
1546
1547 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1548 instruction.
1549 (macro): Add new case M_CACHE_AB.
1550
088fa78e
KH
15512006-05-04 Kazu Hirata <kazu@codesourcery.com>
1552
1553 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1554 (opcode_lookup): Issue a warning for opcode with
1555 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1556 identical to OT_cinfix3.
1557 (TxC3w, TC3w, tC3w): New.
1558 (insns): Use tC3w and TC3w for comparison instructions with
1559 's' suffix.
1560
c9049d30
AM
15612006-05-04 Alan Modra <amodra@bigpond.net.au>
1562
1563 * subsegs.h (struct frchain): Delete frch_seg.
1564 (frchain_root): Delete.
1565 (seg_info): Define as macro.
1566 * subsegs.c (frchain_root): Delete.
1567 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1568 (subsegs_begin, subseg_change): Adjust for above.
1569 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1570 rather than to one big list.
1571 (subseg_get): Don't special case abs, und sections.
1572 (subseg_new, subseg_force_new): Don't set frchainP here.
1573 (seg_info): Delete.
1574 (subsegs_print_statistics): Adjust frag chain control list traversal.
1575 * debug.c (dmp_frags): Likewise.
1576 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1577 at frchain_root. Make use of known frchain ordering.
1578 (last_frag_for_seg): Likewise.
1579 (get_frag_fix): Likewise. Add seg param.
1580 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1581 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1582 (SUB_SEGMENT_ALIGN): Likewise.
1583 (subsegs_finish): Adjust frchain list traversal.
1584 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1585 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1586 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1587 (xtensa_fix_b_j_loop_end_frags): Likewise.
1588 (xtensa_fix_close_loop_end_frags): Likewise.
1589 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1590 (retrieve_segment_info): Delete frch_seg initialisation.
1591
f592407e
AM
15922006-05-03 Alan Modra <amodra@bigpond.net.au>
1593
1594 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1595 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1596 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1597 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1598
df7849c5
JM
15992006-05-02 Joseph Myers <joseph@codesourcery.com>
1600
1601 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1602 here.
1603 (md_apply_fix3): Multiply offset by 4 here for
1604 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1605
2d545b82
L
16062006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1607 Jan Beulich <jbeulich@novell.com>
1608
1609 * config/tc-i386.c (output_invalid_buf): Change size for
1610 unsigned char.
1611 * config/tc-tic30.c (output_invalid_buf): Likewise.
1612
1613 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1614 unsigned char.
1615 * config/tc-tic30.c (output_invalid): Likewise.
1616
38fc1cb1
DJ
16172006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1618
1619 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1620 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1621 (asconfig.texi): Don't set top_srcdir.
1622 * doc/as.texinfo: Don't use top_srcdir.
1623 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1624
2d545b82
L
16252006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1626
1627 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1628 * config/tc-tic30.c (output_invalid_buf): Likewise.
1629
1630 * config/tc-i386.c (output_invalid): Use snprintf instead of
1631 sprintf.
1632 * config/tc-ia64.c (declare_register_set): Likewise.
1633 (emit_one_bundle): Likewise.
1634 (check_dependencies): Likewise.
1635 * config/tc-tic30.c (output_invalid): Likewise.
1636
a8bc6c78
PB
16372006-05-02 Paul Brook <paul@codesourcery.com>
1638
1639 * config/tc-arm.c (arm_optimize_expr): New function.
1640 * config/tc-arm.h (md_optimize_expr): Define
1641 (arm_optimize_expr): Add prototype.
1642 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1643
58633d9a
BE
16442006-05-02 Ben Elliston <bje@au.ibm.com>
1645
22772e33
BE
1646 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1647 field unsigned.
1648
58633d9a
BE
1649 * sb.h (sb_list_vector): Move to sb.c.
1650 * sb.c (free_list): Use type of sb_list_vector directly.
1651 (sb_build): Fix off-by-one error in assertion about `size'.
1652
89cdfe57
BE
16532006-05-01 Ben Elliston <bje@au.ibm.com>
1654
1655 * listing.c (listing_listing): Remove useless loop.
1656 * macro.c (macro_expand): Remove is_positional local variable.
1657 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1658 and simplify surrounding expressions, where possible.
1659 (assign_symbol): Likewise.
1660 (s_weakref): Likewise.
1661 * symbols.c (colon): Likewise.
1662
c35da140
AM
16632006-05-01 James Lemke <jwlemke@wasabisystems.com>
1664
1665 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1666
9bcd4f99
TS
16672006-04-30 Thiemo Seufer <ths@mips.com>
1668 David Ung <davidu@mips.com>
1669
1670 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1671 (mips_immed): New table that records various handling of udi
1672 instruction patterns.
1673 (mips_ip): Adds udi handling.
1674
001ae1a4
AM
16752006-04-28 Alan Modra <amodra@bigpond.net.au>
1676
1677 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1678 of list rather than beginning.
1679
136da414
JB
16802006-04-26 Julian Brown <julian@codesourcery.com>
1681
1682 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1683 (is_quarter_float): Rename from above. Simplify slightly.
1684 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1685 number.
1686 (parse_neon_mov): Parse floating-point constants.
1687 (neon_qfloat_bits): Fix encoding.
1688 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1689 preference to integer encoding when using the F32 type.
1690
dcbf9037
JB
16912006-04-26 Julian Brown <julian@codesourcery.com>
1692
1693 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1694 zero-initialising structures containing it will lead to invalid types).
1695 (arm_it): Add vectype to each operand.
1696 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1697 defined field.
1698 (neon_typed_alias): New structure. Extra information for typed
1699 register aliases.
1700 (reg_entry): Add neon type info field.
1701 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1702 Break out alternative syntax for coprocessor registers, etc. into...
1703 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1704 out from arm_reg_parse.
1705 (parse_neon_type): Move. Return SUCCESS/FAIL.
1706 (first_error): New function. Call to ensure first error which occurs is
1707 reported.
1708 (parse_neon_operand_type): Parse exactly one type.
1709 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1710 (parse_typed_reg_or_scalar): New function. Handle core of both
1711 arm_typed_reg_parse and parse_scalar.
1712 (arm_typed_reg_parse): Parse a register with an optional type.
1713 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1714 result.
1715 (parse_scalar): Parse a Neon scalar with optional type.
1716 (parse_reg_list): Use first_error.
1717 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1718 (neon_alias_types_same): New function. Return true if two (alias) types
1719 are the same.
1720 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1721 of elements.
1722 (insert_reg_alias): Return new reg_entry not void.
1723 (insert_neon_reg_alias): New function. Insert type/index information as
1724 well as register for alias.
1725 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1726 make typed register aliases accordingly.
1727 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1728 of line.
1729 (s_unreq): Delete type information if present.
1730 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1731 (s_arm_unwind_save_mmxwcg): Likewise.
1732 (s_arm_unwind_movsp): Likewise.
1733 (s_arm_unwind_setfp): Likewise.
1734 (parse_shift): Likewise.
1735 (parse_shifter_operand): Likewise.
1736 (parse_address): Likewise.
1737 (parse_tb): Likewise.
1738 (tc_arm_regname_to_dw2regnum): Likewise.
1739 (md_pseudo_table): Add dn, qn.
1740 (parse_neon_mov): Handle typed operands.
1741 (parse_operands): Likewise.
1742 (neon_type_mask): Add N_SIZ.
1743 (N_ALLMODS): New macro.
1744 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1745 (el_type_of_type_chk): Add some safeguards.
1746 (modify_types_allowed): Fix logic bug.
1747 (neon_check_type): Handle operands with types.
1748 (neon_three_same): Remove redundant optional arg handling.
1749 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1750 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1751 (do_neon_step): Adjust accordingly.
1752 (neon_cmode_for_logic_imm): Use first_error.
1753 (do_neon_bitfield): Call neon_check_type.
1754 (neon_dyadic): Rename to...
1755 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1756 to allow modification of type of the destination.
1757 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1758 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1759 (do_neon_compare): Make destination be an untyped bitfield.
1760 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1761 (neon_mul_mac): Return early in case of errors.
1762 (neon_move_immediate): Use first_error.
1763 (neon_mac_reg_scalar_long): Fix type to include scalar.
1764 (do_neon_dup): Likewise.
1765 (do_neon_mov): Likewise (in several places).
1766 (do_neon_tbl_tbx): Fix type.
1767 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1768 (do_neon_ld_dup): Exit early in case of errors and/or use
1769 first_error.
1770 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1771 Handle .dn/.qn directives.
1772 (REGDEF): Add zero for reg_entry neon field.
1773
5287ad62
JB
17742006-04-26 Julian Brown <julian@codesourcery.com>
1775
1776 * config/tc-arm.c (limits.h): Include.
1777 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1778 (fpu_vfp_v3_or_neon_ext): Declare constants.
1779 (neon_el_type): New enumeration of types for Neon vector elements.
1780 (neon_type_el): New struct. Define type and size of a vector element.
1781 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1782 instruction.
1783 (neon_type): Define struct. The type of an instruction.
1784 (arm_it): Add 'vectype' for the current instruction.
1785 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1786 (vfp_sp_reg_pos): Rename to...
1787 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1788 tags.
1789 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1790 (Neon D or Q register).
1791 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1792 register.
1793 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1794 (my_get_expression): Allow above constant as argument to accept
1795 64-bit constants with optional prefix.
1796 (arm_reg_parse): Add extra argument to return the specific type of
1797 register in when either a D or Q register (REG_TYPE_NDQ) is
1798 requested. Can be NULL.
1799 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1800 (parse_reg_list): Update for new arm_reg_parse args.
1801 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1802 (parse_neon_el_struct_list): New function. Parse element/structure
1803 register lists for VLD<n>/VST<n> instructions.
1804 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1805 (s_arm_unwind_save_mmxwr): Likewise.
1806 (s_arm_unwind_save_mmxwcg): Likewise.
1807 (s_arm_unwind_movsp): Likewise.
1808 (s_arm_unwind_setfp): Likewise.
1809 (parse_big_immediate): New function. Parse an immediate, which may be
1810 64 bits wide. Put results in inst.operands[i].
1811 (parse_shift): Update for new arm_reg_parse args.
1812 (parse_address): Likewise. Add parsing of alignment specifiers.
1813 (parse_neon_mov): Parse the operands of a VMOV instruction.
1814 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1815 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1816 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1817 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1818 (parse_operands): Handle new codes above.
1819 (encode_arm_vfp_sp_reg): Rename to...
1820 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1821 selected VFP version only supports D0-D15.
1822 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1823 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1824 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1825 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1826 encode_arm_vfp_reg name, and allow 32 D regs.
1827 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1828 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1829 regs.
1830 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1831 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1832 constant-load and conversion insns introduced with VFPv3.
1833 (neon_tab_entry): New struct.
1834 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1835 those which are the targets of pseudo-instructions.
1836 (neon_opc): Enumerate opcodes, use as indices into...
1837 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1838 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1839 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1840 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1841 neon_enc_tab.
1842 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1843 Neon instructions.
1844 (neon_type_mask): New. Compact type representation for type checking.
1845 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1846 permitted type combinations.
1847 (N_IGNORE_TYPE): New macro.
1848 (neon_check_shape): New function. Check an instruction shape for
1849 multiple alternatives. Return the specific shape for the current
1850 instruction.
1851 (neon_modify_type_size): New function. Modify a vector type and size,
1852 depending on the bit mask in argument 1.
1853 (neon_type_promote): New function. Convert a given "key" type (of an
1854 operand) into the correct type for a different operand, based on a bit
1855 mask.
1856 (type_chk_of_el_type): New function. Convert a type and size into the
1857 compact representation used for type checking.
1858 (el_type_of_type_ckh): New function. Reverse of above (only when a
1859 single bit is set in the bit mask).
1860 (modify_types_allowed): New function. Alter a mask of allowed types
1861 based on a bit mask of modifications.
1862 (neon_check_type): New function. Check the type of the current
1863 instruction against the variable argument list. The "key" type of the
1864 instruction is returned.
1865 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1866 a Neon data-processing instruction depending on whether we're in ARM
1867 mode or Thumb-2 mode.
1868 (neon_logbits): New function.
1869 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1870 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1871 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1872 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1873 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1874 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1875 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1876 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1877 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1878 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1879 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1880 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1881 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1882 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1883 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1884 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1885 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1886 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1887 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1888 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1889 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1890 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1891 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1892 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1893 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1894 helpers.
1895 (parse_neon_type): New function. Parse Neon type specifier.
1896 (opcode_lookup): Allow parsing of Neon type specifiers.
1897 (REGNUM2, REGSETH, REGSET2): New macros.
1898 (reg_names): Add new VFPv3 and Neon registers.
1899 (NUF, nUF, NCE, nCE): New macros for opcode table.
1900 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1901 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1902 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1903 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1904 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1905 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1906 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1907 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1908 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1909 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1910 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1911 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1912 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1913 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1914 fto[us][lh][sd].
1915 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1916 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1917 (arm_option_cpu_value): Add vfp3 and neon.
1918 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1919 VFPv1 attribute.
1920
1946c96e
BW
19212006-04-25 Bob Wilson <bob.wilson@acm.org>
1922
1923 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1924 syntax instead of hardcoded opcodes with ".w18" suffixes.
1925 (wide_branch_opcode): New.
1926 (build_transition): Use it to check for wide branch opcodes with
1927 either ".w18" or ".w15" suffixes.
1928
5033a645
BW
19292006-04-25 Bob Wilson <bob.wilson@acm.org>
1930
1931 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1932 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1933 frag's is_literal flag.
1934
395fa56f
BW
19352006-04-25 Bob Wilson <bob.wilson@acm.org>
1936
1937 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1938
708587a4
KH
19392006-04-23 Kazu Hirata <kazu@codesourcery.com>
1940
1941 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1942 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1943 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1944 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1945 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1946
8463be01
PB
19472005-04-20 Paul Brook <paul@codesourcery.com>
1948
1949 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1950 all targets.
1951 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1952
f26a5955
AM
19532006-04-19 Alan Modra <amodra@bigpond.net.au>
1954
1955 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1956 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1957 Make some cpus unsupported on ELF. Run "make dep-am".
1958 * Makefile.in: Regenerate.
1959
241a6c40
AM
19602006-04-19 Alan Modra <amodra@bigpond.net.au>
1961
1962 * configure.in (--enable-targets): Indent help message.
1963 * configure: Regenerate.
1964
bb8f5920
L
19652006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1966
1967 PR gas/2533
1968 * config/tc-i386.c (i386_immediate): Check illegal immediate
1969 register operand.
1970
23d9d9de
AM
19712006-04-18 Alan Modra <amodra@bigpond.net.au>
1972
64e74474
AM
1973 * config/tc-i386.c: Formatting.
1974 (output_disp, output_imm): ISO C90 params.
1975
6cbe03fb
AM
1976 * frags.c (frag_offset_fixed_p): Constify args.
1977 * frags.h (frag_offset_fixed_p): Ditto.
1978
23d9d9de
AM
1979 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1980 (COFF_MAGIC): Delete.
a37d486e
AM
1981
1982 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1983
e7403566
DJ
19842006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1985
1986 * po/POTFILES.in: Regenerated.
1987
58ab4f3d
MM
19882006-04-16 Mark Mitchell <mark@codesourcery.com>
1989
1990 * doc/as.texinfo: Mention that some .type syntaxes are not
1991 supported on all architectures.
1992
482fd9f9
BW
19932006-04-14 Sterling Augustine <sterling@tensilica.com>
1994
1995 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1996 instructions when such transformations have been disabled.
1997
05d58145
BW
19982006-04-10 Sterling Augustine <sterling@tensilica.com>
1999
2000 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
2001 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
2002 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
2003 decoding the loop instructions. Remove current_offset variable.
2004 (xtensa_fix_short_loop_frags): Likewise.
2005 (min_bytes_to_other_loop_end): Remove current_offset argument.
2006
9e75b3fa
AM
20072006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
2008
a37d486e 2009 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
2010 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
2011
d727e8c2
NC
20122006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
2013
2014 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
2015 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
2016 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
2017 atmega644, atmega329, atmega3290, atmega649, atmega6490,
2018 atmega406, atmega640, atmega1280, atmega1281, at90can32,
2019 at90can64, at90usb646, at90usb647, at90usb1286 and
2020 at90usb1287.
2021 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2022
d252fdde
PB
20232006-04-07 Paul Brook <paul@codesourcery.com>
2024
2025 * config/tc-arm.c (parse_operands): Set default error message.
2026
ab1eb5fe
PB
20272006-04-07 Paul Brook <paul@codesourcery.com>
2028
2029 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
2030
7ae2971b
PB
20312006-04-07 Paul Brook <paul@codesourcery.com>
2032
2033 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
2034
53365c0d
PB
20352006-04-07 Paul Brook <paul@codesourcery.com>
2036
2037 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
2038 (move_or_literal_pool): Handle Thumb-2 instructions.
2039 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2040
45aa61fe
AM
20412006-04-07 Alan Modra <amodra@bigpond.net.au>
2042
2043 PR 2512.
2044 * config/tc-i386.c (match_template): Move 64-bit operand tests
2045 inside loop.
2046
108a6f8e
CD
20472006-04-06 Carlos O'Donell <carlos@codesourcery.com>
2048
2049 * po/Make-in: Add install-html target.
2050 * Makefile.am: Add install-html and install-html-recursive targets.
2051 * Makefile.in: Regenerate.
2052 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2053 * configure: Regenerate.
2054 * doc/Makefile.am: Add install-html and install-html-am targets.
2055 * doc/Makefile.in: Regenerate.
2056
ec651a3b
AM
20572006-04-06 Alan Modra <amodra@bigpond.net.au>
2058
2059 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2060 second scan.
2061
910600e9
RS
20622006-04-05 Richard Sandiford <richard@codesourcery.com>
2063 Daniel Jacobowitz <dan@codesourcery.com>
2064
2065 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2066 (GOTT_BASE, GOTT_INDEX): New.
2067 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2068 GOTT_INDEX when generating VxWorks PIC.
2069 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2070 use the generic *-*-vxworks* stanza instead.
2071
99630778
AM
20722006-04-04 Alan Modra <amodra@bigpond.net.au>
2073
2074 PR 997
2075 * frags.c (frag_offset_fixed_p): New function.
2076 * frags.h (frag_offset_fixed_p): Declare.
2077 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2078 (resolve_expression): Likewise.
2079
a02728c8
BW
20802006-04-03 Sterling Augustine <sterling@tensilica.com>
2081
2082 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2083 of the same length but different numbers of slots.
2084
9dfde49d
AS
20852006-03-30 Andreas Schwab <schwab@suse.de>
2086
2087 * configure.in: Fix help string for --enable-targets option.
2088 * configure: Regenerate.
2089
2da12c60
NS
20902006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2091
6d89cc8f
NS
2092 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2093 (m68k_ip): ... here. Use for all chips. Protect against buffer
2094 overrun and avoid excessive copying.
2095
2da12c60
NS
2096 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2097 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2098 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2099 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2100 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2101 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2102 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2103 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2104 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2105 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2106 (struct m68k_cpu): Change chip field to control_regs.
2107 (current_chip): Remove.
2108 (control_regs): New.
2109 (m68k_archs, m68k_extensions): Adjust.
2110 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2111 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2112 (find_cf_chip): Reimplement for new organization of cpu table.
2113 (select_control_regs): Remove.
2114 (mri_chip): Adjust.
2115 (struct save_opts): Save control regs, not chip.
2116 (s_save, s_restore): Adjust.
2117 (m68k_lookup_cpu): Give deprecated warning when necessary.
2118 (m68k_init_arch): Adjust.
2119 (md_show_usage): Adjust for new cpu table organization.
2120
1ac4baed
BS
21212006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2122
2123 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2124 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2125 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2126 "elf/bfin.h".
2127 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2128 (any_gotrel): New rule.
2129 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2130 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2131 "elf/bfin.h".
2132 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2133 (bfin_pic_ptr): New function.
2134 (md_pseudo_table): Add it for ".picptr".
2135 (OPTION_FDPIC): New macro.
2136 (md_longopts): Add -mfdpic.
2137 (md_parse_option): Handle it.
2138 (md_begin): Set BFD flags.
2139 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2140 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2141 us for GOT relocs.
2142 * Makefile.am (bfin-parse.o): Update dependencies.
2143 (DEPTC_bfin_elf): Likewise.
2144 * Makefile.in: Regenerate.
2145
a9d34880
RS
21462006-03-25 Richard Sandiford <richard@codesourcery.com>
2147
2148 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2149 mcfemac instead of mcfmac.
2150
9ca26584
AJ
21512006-03-23 Michael Matz <matz@suse.de>
2152
2153 * config/tc-i386.c (type_names): Correct placement of 'static'.
2154 (reloc): Map some more relocs to their 64 bit counterpart when
2155 size is 8.
2156 (output_insn): Work around breakage if DEBUG386 is defined.
2157 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2158 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2159 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2160 different from i386.
2161 (output_imm): Ditto.
2162 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2163 Imm64.
2164 (md_convert_frag): Jumps can now be larger than 2GB away, error
2165 out in that case.
2166 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2167 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2168
0a44bf69
RS
21692006-03-22 Richard Sandiford <richard@codesourcery.com>
2170 Daniel Jacobowitz <dan@codesourcery.com>
2171 Phil Edwards <phil@codesourcery.com>
2172 Zack Weinberg <zack@codesourcery.com>
2173 Mark Mitchell <mark@codesourcery.com>
2174 Nathan Sidwell <nathan@codesourcery.com>
2175
2176 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2177 (md_begin): Complain about -G being used for PIC. Don't change
2178 the text, data and bss alignments on VxWorks.
2179 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2180 generating VxWorks PIC.
2181 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2182 (macro): Likewise, but do not treat la $25 specially for
2183 VxWorks PIC, and do not handle jal.
2184 (OPTION_MVXWORKS_PIC): New macro.
2185 (md_longopts): Add -mvxworks-pic.
2186 (md_parse_option): Don't complain about using PIC and -G together here.
2187 Handle OPTION_MVXWORKS_PIC.
2188 (md_estimate_size_before_relax): Always use the first relaxation
2189 sequence on VxWorks.
2190 * config/tc-mips.h (VXWORKS_PIC): New.
2191
080eb7fe
PB
21922006-03-21 Paul Brook <paul@codesourcery.com>
2193
2194 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2195
03aaa593
BW
21962006-03-21 Sterling Augustine <sterling@tensilica.com>
2197
2198 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2199 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2200 (get_loop_align_size): New.
2201 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2202 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2203 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2204 (get_noop_aligned_address): Use get_loop_align_size.
2205 (get_aligned_diff): Likewise.
2206
3e94bf1a
PB
22072006-03-21 Paul Brook <paul@codesourcery.com>
2208
2209 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2210
dfa9f0d5
PB
22112006-03-20 Paul Brook <paul@codesourcery.com>
2212
2213 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2214 (do_t_branch): Encode branches inside IT blocks as unconditional.
2215 (do_t_cps): New function.
2216 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2217 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2218 (opcode_lookup): Allow conditional suffixes on all instructions in
2219 Thumb mode.
2220 (md_assemble): Advance condexec state before checking for errors.
2221 (insns): Use do_t_cps.
2222
6e1cb1a6
PB
22232006-03-20 Paul Brook <paul@codesourcery.com>
2224
2225 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2226 outputting the insn.
2227
0a966e2d
JBG
22282006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2229
2230 * config/tc-vax.c: Update copyright year.
2231 * config/tc-vax.h: Likewise.
2232
a49fcc17
JBG
22332006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2234
2235 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2236 make it static.
2237 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2238
f5208ef2
PB
22392006-03-17 Paul Brook <paul@codesourcery.com>
2240
2241 * config/tc-arm.c (insns): Add ldm and stm.
2242
cb4c78d6
BE
22432006-03-17 Ben Elliston <bje@au.ibm.com>
2244
2245 PR gas/2446
2246 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2247
c16d2bf0
PB
22482006-03-16 Paul Brook <paul@codesourcery.com>
2249
2250 * config/tc-arm.c (insns): Add "svc".
2251
80ca4e2c
BW
22522006-03-13 Bob Wilson <bob.wilson@acm.org>
2253
2254 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2255 flag and avoid double underscore prefixes.
2256
3a4a14e9
PB
22572006-03-10 Paul Brook <paul@codesourcery.com>
2258
2259 * config/tc-arm.c (md_begin): Handle EABIv5.
2260 (arm_eabis): Add EF_ARM_EABI_VER5.
2261 * doc/c-arm.texi: Document -meabi=5.
2262
518051dc
BE
22632006-03-10 Ben Elliston <bje@au.ibm.com>
2264
2265 * app.c (do_scrub_chars): Simplify string handling.
2266
00a97672
RS
22672006-03-07 Richard Sandiford <richard@codesourcery.com>
2268 Daniel Jacobowitz <dan@codesourcery.com>
2269 Zack Weinberg <zack@codesourcery.com>
2270 Nathan Sidwell <nathan@codesourcery.com>
2271 Paul Brook <paul@codesourcery.com>
2272 Ricardo Anguiano <anguiano@codesourcery.com>
2273 Phil Edwards <phil@codesourcery.com>
2274
2275 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2276 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2277 R_ARM_ABS12 reloc.
2278 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2279 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2280 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2281
b29757dc
BW
22822006-03-06 Bob Wilson <bob.wilson@acm.org>
2283
2284 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2285 even when using the text-section-literals option.
2286
0b2e31dc
NS
22872006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2288
2289 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2290 and cf.
2291 (m68k_ip): <case 'J'> Check we have some control regs.
2292 (md_parse_option): Allow raw arch switch.
2293 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2294 whether 68881 or cfloat was meant by -mfloat.
2295 (md_show_usage): Adjust extension display.
2296 (m68k_elf_final_processing): Adjust.
2297
df406460
NC
22982006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2299
2300 * config/tc-avr.c (avr_mod_hash_value): New function.
2301 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2302 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2303 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2304 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2305 of (int).
2306 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2307 fixups, abort otherwise.
df406460
NC
2308 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2309 tc_fix_adjustable): Define.
a70ae331 2310
53022e4a
JW
23112006-03-02 James E Wilson <wilson@specifix.com>
2312
2313 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2314 change the template, then clear md.slot[curr].end_of_insn_group.
2315
9f6f925e
JB
23162006-02-28 Jan Beulich <jbeulich@novell.com>
2317
2318 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2319
0e31b3e1
JB
23202006-02-28 Jan Beulich <jbeulich@novell.com>
2321
2322 PR/1070
2323 * macro.c (getstring): Don't treat parentheses special anymore.
2324 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2325 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2326 characters.
2327
10cd14b4
AM
23282006-02-28 Mat <mat@csail.mit.edu>
2329
2330 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2331
63752a75
JJ
23322006-02-27 Jakub Jelinek <jakub@redhat.com>
2333
2334 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2335 field.
2336 (CFI_signal_frame): Define.
2337 (cfi_pseudo_table): Add .cfi_signal_frame.
2338 (dot_cfi): Handle CFI_signal_frame.
2339 (output_cie): Handle cie->signal_frame.
2340 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2341 different. Copy signal_frame from FDE to newly created CIE.
2342 * doc/as.texinfo: Document .cfi_signal_frame.
2343
f7d9e5c3
CD
23442006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2345
2346 * doc/Makefile.am: Add html target.
2347 * doc/Makefile.in: Regenerate.
2348 * po/Make-in: Add html target.
2349
331d2d0d
L
23502006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2351
8502d882 2352 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2353 Instructions.
2354
8502d882 2355 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2356 (CpuUnknownFlags): Add CpuMNI.
2357
10156f83
DM
23582006-02-24 David S. Miller <davem@sunset.davemloft.net>
2359
2360 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2361 (hpriv_reg_table): New table for hyperprivileged registers.
2362 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2363 register encoding.
2364
6772dd07
DD
23652006-02-24 DJ Delorie <dj@redhat.com>
2366
2367 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2368 (tc_gen_reloc): Don't define.
2369 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2370 (OPTION_LINKRELAX): New.
2371 (md_longopts): Add it.
2372 (m32c_relax): New.
2373 (md_parse_options): Set it.
2374 (md_assemble): Emit relaxation relocs as needed.
2375 (md_convert_frag): Emit relaxation relocs as needed.
2376 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2377 (m32c_apply_fix): New.
2378 (tc_gen_reloc): New.
2379 (m32c_force_relocation): Force out jump relocs when relaxing.
2380 (m32c_fix_adjustable): Return false if relaxing.
2381
62b3e311
PB
23822006-02-24 Paul Brook <paul@codesourcery.com>
2383
2384 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2385 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2386 (struct asm_barrier_opt): Define.
2387 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2388 (parse_psr): Accept V7M psr names.
2389 (parse_barrier): New function.
2390 (enum operand_parse_code): Add OP_oBARRIER.
2391 (parse_operands): Implement OP_oBARRIER.
2392 (do_barrier): New function.
2393 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2394 (do_t_cpsi): Add V7M restrictions.
2395 (do_t_mrs, do_t_msr): Validate V7M variants.
2396 (md_assemble): Check for NULL variants.
2397 (v7m_psrs, barrier_opt_names): New tables.
2398 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2399 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2400 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2401 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2402 (struct cpu_arch_ver_table): Define.
2403 (cpu_arch_ver): New.
2404 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2405 Tag_CPU_arch_profile.
2406 * doc/c-arm.texi: Document new cpu and arch options.
2407
59cf82fe
L
24082006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2409
2410 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2411
19a7219f
L
24122006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2413
2414 * config/tc-ia64.c: Update copyright years.
2415
7f3dfb9c
L
24162006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2417
2418 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2419 SDM 2.2.
2420
f40d1643
PB
24212005-02-22 Paul Brook <paul@codesourcery.com>
2422
2423 * config/tc-arm.c (do_pld): Remove incorrect write to
2424 inst.instruction.
2425 (encode_thumb32_addr_mode): Use correct operand.
2426
216d22bc
PB
24272006-02-21 Paul Brook <paul@codesourcery.com>
2428
2429 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2430
d70c5fc7
NC
24312006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2432 Anil Paranjape <anilp1@kpitcummins.com>
2433 Shilin Shakti <shilins@kpitcummins.com>
2434
2435 * Makefile.am: Add xc16x related entry.
2436 * Makefile.in: Regenerate.
2437 * configure.in: Added xc16x related entry.
2438 * configure: Regenerate.
2439 * config/tc-xc16x.h: New file
2440 * config/tc-xc16x.c: New file
2441 * doc/c-xc16x.texi: New file for xc16x
2442 * doc/all.texi: Entry for xc16x
a70ae331 2443 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2444 * NEWS: Announce the support for the new target.
2445
aaa2ab3d
NH
24462006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2447
2448 * configure.tgt: set emulation for mips-*-netbsd*
2449
82de001f
JJ
24502006-02-14 Jakub Jelinek <jakub@redhat.com>
2451
2452 * config.in: Rebuilt.
2453
431ad2d0
BW
24542006-02-13 Bob Wilson <bob.wilson@acm.org>
2455
2456 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2457 from 1, not 0, in error messages.
2458 (md_assemble): Simplify special-case check for ENTRY instructions.
2459 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2460 operand in error message.
2461
94089a50
JM
24622006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2463
2464 * configure.tgt (arm-*-linux-gnueabi*): Change to
2465 arm-*-linux-*eabi*.
2466
52de4c06
NC
24672006-02-10 Nick Clifton <nickc@redhat.com>
2468
70e45ad9
NC
2469 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2470 32-bit value is propagated into the upper bits of a 64-bit long.
2471
52de4c06
NC
2472 * config/tc-arc.c (init_opcode_tables): Fix cast.
2473 (arc_extoper, md_operand): Likewise.
2474
21af2bbd
BW
24752006-02-09 David Heine <dlheine@tensilica.com>
2476
2477 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2478 each relaxation step.
2479
75a706fc 24802006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2481
75a706fc
L
2482 * configure.in (CHECK_DECLS): Add vsnprintf.
2483 * configure: Regenerate.
2484 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2485 include/declare here, but...
2486 * as.h: Move code detecting VARARGS idiom to the top.
2487 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2488 (vsnprintf): Declare if not already declared.
2489
0d474464
L
24902006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2491
2492 * as.c (close_output_file): New.
2493 (main): Register close_output_file with xatexit before
2494 dump_statistics. Don't call output_file_close.
2495
266abb8f
NS
24962006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2497
2498 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2499 mcf5329_control_regs): New.
2500 (not_current_architecture, selected_arch, selected_cpu): New.
2501 (m68k_archs, m68k_extensions): New.
2502 (archs): Renamed to ...
2503 (m68k_cpus): ... here. Adjust.
2504 (n_arches): Remove.
2505 (md_pseudo_table): Add arch and cpu directives.
2506 (find_cf_chip, m68k_ip): Adjust table scanning.
2507 (no_68851, no_68881): Remove.
2508 (md_assemble): Lazily initialize.
2509 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2510 (md_init_after_args): Move functionality to m68k_init_arch.
2511 (mri_chip): Adjust table scanning.
2512 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2513 options with saner parsing.
2514 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2515 m68k_init_arch): New.
2516 (s_m68k_cpu, s_m68k_arch): New.
2517 (md_show_usage): Adjust.
2518 (m68k_elf_final_processing): Set CF EF flags.
2519 * config/tc-m68k.h (m68k_init_after_args): Remove.
2520 (tc_init_after_args): Remove.
2521 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2522 (M68k-Directives): Document .arch and .cpu directives.
2523
134dcee5
AM
25242006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2525
a70ae331
AM
2526 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2527 synonyms for equ and defl.
134dcee5
AM
2528 (z80_cons_fix_new): New function.
2529 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2530 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2531 now handled as pseudo-op rather than an instruction.
2532 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2533 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2534 Add entries for def24,def32,d24,d32.
2535 (md_assemble): Improved error handling.
2536 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2537 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2538 (z80_cons_fix_new): Declare.
a70ae331 2539 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2540 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2541
a9931606
PB
25422006-02-02 Paul Brook <paul@codesourcery.com>
2543
2544 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2545
ef8d22e6
PB
25462005-02-02 Paul Brook <paul@codesourcery.com>
2547
2548 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2549 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2550 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2551 T2_OPCODE_RSB): Define.
2552 (thumb32_negate_data_op): New function.
2553 (md_apply_fix): Use it.
2554
e7da6241
BW
25552006-01-31 Bob Wilson <bob.wilson@acm.org>
2556
2557 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2558 fields.
2559 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2560 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2561 subtracted symbols.
2562 (relaxation_requirements): Add pfinish_frag argument and use it to
2563 replace setting tinsn->record_fix fields.
2564 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2565 and vinsn_to_insnbuf. Remove references to record_fix and
2566 slot_sub_symbols fields.
2567 (xtensa_mark_narrow_branches): Delete unused code.
2568 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2569 a symbol.
2570 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2571 record_fix fields.
2572 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2573 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2574 of the record_fix field. Simplify error messages for unexpected
2575 symbolic operands.
2576 (set_expr_symbol_offset_diff): Delete.
2577
79134647
PB
25782006-01-31 Paul Brook <paul@codesourcery.com>
2579
2580 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2581
e74cfd16
PB
25822006-01-31 Paul Brook <paul@codesourcery.com>
2583 Richard Earnshaw <rearnsha@arm.com>
2584
2585 * config/tc-arm.c: Use arm_feature_set.
2586 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2587 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2588 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2589 New variables.
2590 (insns): Use them.
2591 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2592 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2593 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2594 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2595 feature flags.
2596 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2597 (arm_opts): Move old cpu/arch options from here...
2598 (arm_legacy_opts): ... to here.
2599 (md_parse_option): Search arm_legacy_opts.
2600 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2601 (arm_float_abis, arm_eabis): Make const.
2602
d47d412e
BW
26032006-01-25 Bob Wilson <bob.wilson@acm.org>
2604
2605 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2606
b14273fe
JZ
26072006-01-21 Jie Zhang <jie.zhang@analog.com>
2608
2609 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2610 in load immediate intruction.
2611
39cd1c76
JZ
26122006-01-21 Jie Zhang <jie.zhang@analog.com>
2613
2614 * config/bfin-parse.y (value_match): Use correct conversion
2615 specifications in template string for __FILE__ and __LINE__.
2616 (binary): Ditto.
2617 (unary): Ditto.
2618
67a4f2b7
AO
26192006-01-18 Alexandre Oliva <aoliva@redhat.com>
2620
2621 Introduce TLS descriptors for i386 and x86_64.
2622 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2623 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2624 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2625 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2626 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2627 displacement bits.
2628 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2629 (lex_got): Handle @tlsdesc and @tlscall.
2630 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2631
8ad7c533
NC
26322006-01-11 Nick Clifton <nickc@redhat.com>
2633
2634 Fixes for building on 64-bit hosts:
2635 * config/tc-avr.c (mod_index): New union to allow conversion
2636 between pointers and integers.
2637 (md_begin, avr_ldi_expression): Use it.
2638 * config/tc-i370.c (md_assemble): Add cast for argument to print
2639 statement.
2640 * config/tc-tic54x.c (subsym_substitute): Likewise.
2641 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2642 opindex field of fr_cgen structure into a pointer so that it can
2643 be stored in a frag.
2644 * config/tc-mn10300.c (md_assemble): Likewise.
2645 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2646 types.
2647 * config/tc-v850.c: Replace uses of (int) casts with correct
2648 types.
2649
4dcb3903
L
26502006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2651
2652 PR gas/2117
2653 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2654
e0f6ea40
HPN
26552006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2656
2657 PR gas/2101
2658 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2659 a local-label reference.
2660
e88d958a 2661For older changes see ChangeLog-2005
08d56133
NC
2662\f
2663Local Variables:
2664mode: change-log
2665left-margin: 8
2666fill-column: 74
2667version-control: never
2668End:
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