gas/
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
c81128dc
L
12006-12-29 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.c (build_modrm_byte): Handle shift count
4 register with 3 operands.
5
cab737b9
L
62006-12-28 H.J. Lu <hongjiu.lu@intel.com>
7
8 * config/tc-i386.c (process_operands): Check i.reg_operands
9 and increment i.operands when adding a register operand.
10 (build_modrm_byte): Fix 4 operand instruction handling.
11
31b2323c
L
122006-12-27 H.J. Lu <hongjiu.lu@intel.com>
13
14 * config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS
15 for array size instead of 2.
16 (im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size
17 instead of 2.
18 (i386_immediate): Update immediate operand overflow error
19 message.
20 (i386_displacement): Check displacement operand overflow.
21
b534c6d3
L
222006-12-27 H.J. Lu <hongjiu.lu@intel.com>
23
24 * config/tc-i386.c: Document tc-i386.c, not i386.c.
25
f7ec513b
KH
262006-12-27 Kazu Hirata <kazu@codesourcery.com>
27
28 * config/m68k-parse.h (m68k_register): Add CAC and MBB.
29 * config/tc-m68k.c (fido_ctrl): New.
30 (m68k_archs): Use fido_ctrl for -mfidoa.
31 (m68k_cpus): Use fido_ctrl on fido-*-*.
32 (m68k_ip): Add support for CAC and MBB.
33 (init_table): Add CAC and MBB.
34
70e41ade
L
352006-12-26 H.J. Lu <hongjiu.lu@intel.com>
36
37 * config/tc-i386.c (i386_immediate): Remove prototype.
38
9840d27e
KH
392006-12-25 Kazu Hirata <kazu@codesourcery.com>
40
41 * config/tc-m68k.c (cpu_of_arch): Add fido.
42 (m68k_archs, m68k_cpu): Add entries for fido.
43 (m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A.
44
8fce5f8c
ML
452006-12-25 Mei Ligang <ligang@sunnorth.com.cn>
46
47 * config/tc-score.c (build_lw_pic): Rename as build_lwst_pic.
48 Delete the code handling large constant for PIC.
49 Modify some comments.
50 (score_relax_frag): Decrease insn_addr in certain situation.
51 (s_score_cprestore): Change .cprestore syntax from ".cprestore offset"
52 to ".cprestore reg, offset".
53
ebff6cd5
KH
542006-12-23 Kazu Hirata <kazu@codesourcery.com>
55
56 * configure.tgt: Recognize fido.
57
2a962e6d
L
582006-12-15 H.J. Lu <hongjiu.lu@intel.com>
59
60 * config/tc-i386.c: Add a blank line bewteen function bodies.
61
fc225355
L
622006-12-15 H.J. Lu <hongjiu.lu@intel.com>
63
64 * config/tc-i386.c (build_modrm_byte): Reformat to 72 columns.
65
6008641e
DJ
662006-12-14 Daniel Jacobowitz <dan@codesourcery.com>
67
68 * Makefile.am (YFLAGS): Define.
69 * Makefile.in: Regenerated.
70
d1cbb4db
L
712006-12-14 H.J. Lu <hongjiu.lu@intel.com>
72
73 * config/tc-i386.c (match_template): Simplify 3 and 4 operand
74 match.
75
71903a11
L
762006-12-13 H.J. Lu <hongjiu.lu@intel.com>
77
78 * config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel
79 bit only.
80
a5c311ca
L
812006-12-13 H.J. Lu <hongjiu.lu@intel.com>
82
83 * config/tc-i386.c (match_template): Use a for loop to set
84 operand_types array.
85
f48ff2ae
L
862006-12-13 H.J. Lu <hongjiu.lu@intel.com>
87
88 PR gas/3712
89 * config/tc-i386.c (match_template): Use MAX_OPERANDS for the
90 number of operands. Issue an error if MAX_OPERANDS != 4. Add
91 the 4th operand check.
92
c450d570
PB
932006-12-13 Paul Brook <paul@codesourcery.com>
94
95 * config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
96 * doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
97
eca5433b
L
982006-12-12 H.J. Lu <hongjiu.lu@intel.com>
99
100 * config/tc-i386.h (WordMem): Document it for 64 bit memory
101 reference.
102
37d037c1
DJ
1032006-12-12 Daniel Jacobowitz <dan@codesourcery.com>
104
105 * doc/Makefile.am (as_TEXINFOS): Set.
106 (as.info as.dvi as.html): Delete rule.
107 * doc/Makefile.in: Regenerated.
108
d5fbea21
DJ
1092006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
110
111 * configure.in: Define GENINSRC_NEVER.
112 * doc/Makefile.am (as.info): Remove srcdir prefix.
113 (MAINTAINERCLEANFILES): Add info file.
114 (DISTCLEANFILES): Pretend to add info file.
115 * po/Make-in (.po.gmo): Put gmo files in objdir.
116 * configure, Makefile.in, doc/Makefile.in: Regenerated.
117
ffb08c80
L
1182006-12-09 H.J. Lu <hongjiu.lu@intel.com>
119
120 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
af26ccbe 121 for operand_types array.
ffb08c80 122
41d3b056
CG
1232006-12-08 Christian Groessler <chris@groessler.org>
124
125 * config/tc-z8k.c (whatreg): Add comment describing function.
126 Return NULL if symbol name characters follow the register number.
127 (parse_reg): Use NULL instead of 0 for pointer values. Stop
128 processing if whatreg returned NULL.
129
c694fd50
KH
1302006-12-07 Kazu Hirata <kazu@codesourcery.com>
131
132 * config/tc-m68k.c: Update uses of EF_M68K_*.
133
9021ec07
L
1342006-12-06 H.J. Lu <hjl@gnu.org>
135
136 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
137 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
138
b3b1f034
JJ
1392006-12-02 Jakub Jelinek <jakub@redhat.com>
140
141 PR gas/3607
142 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
143
f0291e4c
PB
1442006-12-01 Paul Brook <paul@codesourcery.com>
145
146 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
147 function symbols.
148
e1da3f5b
PB
1492006-11-29 Paul Brook <paul@codesourcery.com>
150
151 * config/tc-arm.c (arm_is_eabi): New function.
152 * config/tc-arm.h (arm_is_eabi): New prototype.
153 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
154 * doc/c-arm.texi (.thumb_func): Update documentation.
155
00249aaa
PB
1562006-11-29 Paul Brook <paul@codesourcery.com>
157
158 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
159 encoding.
160
a7284bf1
BW
1612006-11-27 Sterling Augustine <sterling@tensilica.com>
162
163 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
164 as the first slot_subtype, not the frag subtype.
165
2caa7ca0
BW
1662006-11-27 Bob Wilson <bob.wilson@acm.org>
167
168 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
169 (directive_state): Disable scheduling by default.
170 (xtensa_add_config_info): New.
171 (xtensa_end): Call xtensa_add_config_info.
172
062cf837
EB
1732006-11-27 Eric Botcazou <ebotcazou@adacore.com>
174
175 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
176 their unaligned counterparts in debugging sections.
177
cefdba39
AM
1782006-11-24 Alan Modra <amodra@bigpond.net.au>
179
180 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
181
e821645d
DJ
1822006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
183
184 * config/tc-arm.h (md_cons_align): Define.
185 (mapping_state): New prototype.
186 * config/tc-arm.c (mapping_state): Make global.
187
5ab504f9
AM
1882006-11-22 Alan Modra <amodra@bigpond.net.au>
189
190 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
191
98a16ee1
ML
1922006-11-16 Mei ligang <ligang@sunnorth.com.cn>
193
5ab504f9
AM
194 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
195 branch instruction, handle it specially.
98a16ee1
ML
196 (score_insns): Modify 32 bit branch instruction.
197
0023dd27
AM
1982006-11-16 Alan Modra <amodra@bigpond.net.au>
199
200 * symbols.c (resolve_symbol_value): Formatting.
201
bdf128d6
JB
2022006-11-15 Jan Beulich <jbeulich@novell.com>
203
204 PR/3469
205 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
206 chain by linking it to itself.
207 (resolve_symbol_value): Also check symbol_shadow_p().
208 (symbol_shadow_p): New.
209 * symbols.h (symbol_shadow_p): Declare.
210
25fe350b
MS
2112006-11-12 Mark Shinwell <shinwell@codesourcery.com>
212
213 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
214 (insns): Adjust accordingly.
215 (md_apply_fix): Alter comments to use CBZ instead of CZB.
216
0ffdc86c
NC
2172006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
218
219 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
220 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
221
6afdfa61
NC
2222006-11-10 Nick Clifton <nickc@redhat.com>
223
224 PR gas/3456:
225 * config/obj-elf.c (obj_elf_version): Do not include the name
226 field's padding in the namesz value.
227
d84bcf09
TS
2282006-11-09 Thiemo Seufer <ths@mips.com>
229
230 * config/tc-mips.c: Fix outdated comment.
231
b7d9ef37
L
2322006-11-08 H.J. Lu <hongjiu.lu@intel.com>
233
234 * config/tc-i386.h (CpuPNI): Removed.
235 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
236 * config/tc-i386.c (md_assemble): Likewise.
237
05e7221f
AM
2382006-11-08 Alan Modra <amodra@bigpond.net.au>
239
240 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
241
df1f3cda
DD
2422006-11-06 David Daney <ddaney@avtrex.com>
243
244 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
245
82100185
TS
2462006-11-06 Thiemo Seufer <ths@mips.com>
247
248 * doc/c-mips.texi (-march): Document sb1a.
249
a360e743
TS
2502006-11-06 Thiemo Seufer <ths@mips.com>
251
252 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
253 34k always has DSP ASE.
254
64817874
TS
2552006-11-03 Thiemo Seufer <ths@mips.com>
256
257 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
258 MIPS16 instructions referencing other sections, unless they are
259 external branches.
260
7764b395
TS
2612006-11-03 Thiemo Seufer <ths@mips.com>
262
263 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
264 release 1 CPU.
265
ae424f82
JJ
2662006-11-03 Jakub Jelinek <jakub@redhat.com>
267
9b8ae42e
JJ
268 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
269 personality and lsda.
270 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
271 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
272 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
273 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
274 (output_cie): Output personality including its encoding and LSDA encoding.
275 (output_fde): Output LSDA.
276 (select_cie_for_fde): Don't share CIE if personality, its encoding or
277 LSDA encoding are different. Copy the 3 fields from fde_entry to
278 cie_entry.
279 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
280
ae424f82
JJ
281 * subsegs.h (struct frchain): Add frch_cfi_data field.
282 * dw2gencfi.c: Include subsegs.h.
283 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
284 (struct frch_cfi_data): New type.
285 (unused_cfi_data): New variable.
286 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
287 and cfa_save_stack static vars into a structure pointed from
288 each frchain.
289 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
290 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
291 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
292 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
293 Likewise.
294
d1e50f8a
DJ
2952006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
296
297 * config/tc-h8300.c (build_bytes): Fix const warning.
298
06d2da93
NC
2992006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
300
301 * tc-score.c (do16_rdrs): Handle not! instruction especially.
302
3ba67470
PB
3032006-10-31 Paul Brook <paul@codesourcery.com>
304
305 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
306 for EABIv4.
307
7a1d4c38
PB
3082006-10-31 Paul Brook <paul@codesourcery.com>
309
310 gas/
311 * config/tc-arm.c (object_arch): New variable.
312 (s_arm_object_arch): New function.
313 (md_pseudo_table): Add object_arch.
314 (aeabi_set_public_attributes): Obey object_arch.
315 * doc/c-arm.texi: Document .object_arch.
316
b138abaa
NC
3172006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
318
319 * tc-score.c (data_op2): Check invalid operands.
320 (my_get_expression): Const operand of some instructions can not be
321 symbol in assembly.
322 (get_insn_class_from_type): Handle instruction type Insn_internal.
323 (do_macro_ldst_label): Modify inst.type.
324 (Insn_PIC): Delete.
325 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 326
c79b7c30
RC
3272006-10-29 Randolph Chung <tausq@debian.org>
328
329 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
330 (hppa_regname_to_dw2regnum): New funcions.
331 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
332 (tc_cfi_frame_initial_instructions)
333 (tc_regname_to_dw2regnum): Define.
334 (hppa_cfi_frame_initial_instructions)
335 (hppa_regname_to_dw2regnum): Declare.
336 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
337 (DWARF2_CIE_DATA_ALIGNMENT): Define.
338
e2785c44
NC
3392006-10-29 Nick Clifton <nickc@redhat.com>
340
341 * config/tc-spu.c (md_assemble): Cast printf string size parameter
342 to int in order to avoid a compiler warning.
343
86157c20
AS
3442006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
345
346 * config/tc-sh.c (md_assemble): Define size of branches.
347
ba5f0fda
BE
3482006-10-26 Ben Elliston <bje@au.ibm.com>
349
350 * dw2gencfi.c (cfi_add_CFA_offset):
351 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
352
033cd5fd
BE
353 * write.c (chain_frchains_together_1): Assert that this function
354 never returns a pointer to the auto variable `dummy'.
355
e9f53129
AM
3562006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
357 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
358 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
359 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
360 Alan Modra <amodra@bigpond.net.au>
361
362 * config/tc-spu.c: New file.
363 * config/tc-spu.h: New file.
364 * configure.tgt: Add SPU support.
365 * Makefile.am: Likewise. Run "make dep-am".
366 * Makefile.in: Regenerate.
367 * po/POTFILES.in: Regenerate.
368
7b383517
BE
3692006-10-25 Ben Elliston <bje@au.ibm.com>
370
371 * expr.c (expr): Replace O_add case in switch (op_left) explaining
372 why it can never occur.
5ab504f9 373
ede602d7
AM
3742006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
375
376 * doc/c-ppc.texi (-mcell): Document.
377 * config/tc-ppc.c (parse_cpu): Parse -mcell.
378 (md_show_usage): Document -mcell.
379
7918206c
MM
3802006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
381
382 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
383
878bcc43
AM
3842006-10-23 Alan Modra <amodra@bigpond.net.au>
385
386 * config/tc-m68hc11.c (md_assemble): Quiet warning.
387
8620418b
MF
3882006-10-19 Mike Frysinger <vapier@gentoo.org>
389
390 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
391 (x86_64_section_letter): Likewise.
392
b3549761
NC
3932006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
394
395 * config/tc-score.c (build_relax_frag): Compute correct
396 tc_frag_data.fixp.
397
71a75f6f
MF
3982006-10-18 Roy Marples <uberlord@gentoo.org>
399
400 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
401 elf32-sparc as a viable target for the -32 switch and any target
402 starting with elf64-sparc as a viable target for the -64 switch.
403 (sparc_target_format): For 64-bit ELF flavoured output use
404 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
405 ELF_TARGET_FORMAT.
71a75f6f
MF
406 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
407
e1b5fdd4
L
4082006-10-17 H.J. Lu <hongjiu.lu@intel.com>
409
410 * configure: Regenerated.
411
f8ef9cd7
BS
4122006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
413
414 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
415 in addition to testing for '\n'.
416 (TC_EOL_IN_INSN): Provide a default definition if necessary.
417
eb1fe072
NC
4182006-10-13 Sterling Augstine <sterling@tensilica.com>
419
420 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
421 a disjoint DW_AT range.
422
ec6e49f4
NC
4232006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
424
425 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
426
036dc3f7
PB
4272006-10-08 Paul Brook <paul@codesourcery.com>
428
429 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
430 (parse_operands): Use parse_big_immediate for OP_NILO.
431 (neon_cmode_for_logic_imm): Try smaller element sizes.
432 (neon_cmode_for_move_imm): Ditto.
433 (do_neon_logic): Handle .i64 pseudo-op.
434
3bb0c887
AM
4352006-09-29 Alan Modra <amodra@bigpond.net.au>
436
437 * po/POTFILES.in: Regenerate.
438
ef05d495
L
4392006-09-28 H.J. Lu <hongjiu.lu@intel.com>
440
441 * config/tc-i386.h (CpuMNI): Renamed to ...
442 (CpuSSSE3): This.
443 (CpuUnknownFlags): Updated.
444 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
445 and PROCESSOR_MEROM with PROCESSOR_CORE2.
446 * config/tc-i386.c: Updated.
447 * doc/c-i386.texi: Likewise.
a70ae331 448
ef05d495
L
449 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
450
d8ad03e9
NC
4512006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
452
453 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
454
df3ca5a3
NC
4552006-09-27 Nick Clifton <nickc@redhat.com>
456
457 * output-file.c (output_file_close): Prevent an infinite loop
458 reporting that stdoutput could not be closed.
459
2d447fca
JM
4602006-09-26 Mark Shinwell <shinwell@codesourcery.com>
461 Joseph Myers <joseph@codesourcery.com>
462 Ian Lance Taylor <ian@wasabisystems.com>
463 Ben Elliston <bje@wasabisystems.com>
464
465 * config/tc-arm.c (arm_cext_iwmmxt2): New.
466 (enum operand_parse_code): New code OP_RIWR_I32z.
467 (parse_operands): Handle OP_RIWR_I32z.
468 (do_iwmmxt_wmerge): New function.
469 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
470 a register.
471 (do_iwmmxt_wrwrwr_or_imm5): New function.
472 (insns): Mark instructions as RIWR_I32z as appropriate.
473 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
474 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
475 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
476 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
477 (md_begin): Handle IWMMXT2.
478 (arm_cpus): Add iwmmxt2.
479 (arm_extensions): Likewise.
480 (arm_archs): Likewise.
481
ba83aca1
BW
4822006-09-25 Bob Wilson <bob.wilson@acm.org>
483
484 * doc/as.texinfo (Overview): Revise description of --keep-locals.
485 Add xref to "Symbol Names".
486 (L): Refer to "local symbols" instead of "local labels". Move
487 definition to "Symbol Names" section; add xref to that section.
488 (Symbol Names): Use "Local Symbol Names" section to define local
489 symbols. Add "Local Labels" heading for description of temporary
490 forward/backward labels, and refer to those as "local labels".
491
539e75ad
L
4922006-09-23 H.J. Lu <hongjiu.lu@intel.com>
493
494 PR binutils/3235
495 * config/tc-i386.c (match_template): Check address size prefix
496 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
497 operand.
498
5e02f92e
AM
4992006-09-22 Alan Modra <amodra@bigpond.net.au>
500
501 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
502
885afe7b
AM
5032006-09-22 Alan Modra <amodra@bigpond.net.au>
504
505 * as.h (as_perror): Delete declaration.
506 * gdbinit.in (as_perror): Delete breakpoint.
507 * messages.c (as_perror): Delete function.
508 * doc/internals.texi: Remove as_perror description.
509 * listing.c (listing_print: Don't use as_perror.
510 * output-file.c (output_file_create, output_file_close): Likewise.
511 * symbols.c (symbol_create, symbol_clone): Likewise.
512 * write.c (write_contents): Likewise.
513 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
514 * config/tc-tic54x.c (tic54x_mlib): Likewise.
515
3aeeedbb
AM
5162006-09-22 Alan Modra <amodra@bigpond.net.au>
517
518 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
519 (ppc_handle_align): New function.
520 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
521 (SUB_SEGMENT_ALIGN): Define as zero.
522
96e9638b
BW
5232006-09-20 Bob Wilson <bob.wilson@acm.org>
524
525 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
526 (Overview): Skip cross reference in man page.
527
99ad8390
NC
5282006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
529
530 * configure.in: Add new target x86_64-pc-mingw64.
531 * configure: Regenerate.
532 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
533 * config/obj-coff.h: Add handling for TE_PEP target specific code
534 and definitions.
99ad8390
NC
535 * config/tc-i386.c: Add new targets.
536 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
537 (x86_64_target_format): Add new method for setup proper default
538 target cpu mode.
99ad8390
NC
539 * config/te-pep.h: Add new target definition header.
540 (TE_PEP): New macro: Identifies new target architecture.
541 (COFF_WITH_pex64): Set proper includes in bfd.
542 * NEWS: Mention new target.
543
73332571
BS
5442006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
545
546 * config/bfin-parse.y (binary): Change sub of const to add of negated
547 const.
548
1c0d3aa6
NC
5492006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
550
551 * config/tc-score.c: New file.
552 * config/tc-score.h: Newf file.
553 * configure.tgt: Add Score target.
554 * Makefile.am: Add Score files.
555 * Makefile.in: Regenerate.
556 * NEWS: Mention new target support.
557
4fa3602b
PB
5582006-09-16 Paul Brook <paul@codesourcery.com>
559
560 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
561 * doc/c-arm.texi (movsp): Document offset argument.
562
16dd5e42
PB
5632006-09-16 Paul Brook <paul@codesourcery.com>
564
565 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
566 unsigned int to avoid 64-bit host problems.
567
c4ae04ce
BS
5682006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
569
570 * config/bfin-parse.y (binary): Do some more constant folding for
571 additions.
572
e5d4a5a6
JB
5732006-09-13 Jan Beulich <jbeulich@novell.com>
574
575 * input-file.c (input_file_give_next_buffer): Demote as_bad to
576 as_warn.
577
1a1219cb
AM
5782006-09-13 Alan Modra <amodra@bigpond.net.au>
579
580 PR gas/3165
581 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
582 in parens.
583
f79d9c1d
AM
5842006-09-13 Alan Modra <amodra@bigpond.net.au>
585
586 * input-file.c (input_file_open): Replace as_perror with as_bad
587 so that gas exits with error on file errors. Correct error
588 message.
589 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 590 * input-file.h: Update comment.
f79d9c1d 591
f512f76f
NC
5922006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
593
594 PR gas/3172
595 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
596 registers as a sub-class of wC registers.
597
8d79fd44
AM
5982006-09-11 Alan Modra <amodra@bigpond.net.au>
599
600 PR gas/3165
601 * config/tc-mips.h (enum dwarf2_format): Forward declare.
602 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
603 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
604 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
605
6258339f
NC
6062006-09-08 Nick Clifton <nickc@redhat.com>
607
608 PR gas/3129
609 * doc/as.texinfo (Macro): Improve documentation about separating
610 macro arguments from following text.
611
f91e006c
PB
6122006-09-08 Paul Brook <paul@codesourcery.com>
613
614 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
615
466bbf93
PB
6162006-09-07 Paul Brook <paul@codesourcery.com>
617
618 * config/tc-arm.c (parse_operands): Mark operand as present.
619
428e3f1f
PB
6202006-09-04 Paul Brook <paul@codesourcery.com>
621
622 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
623 (do_neon_dyadic_if_i_d): Avoid setting U bit.
624 (do_neon_mac_maybe_scalar): Ditto.
625 (do_neon_dyadic_narrow): Force operand type to NT_integer.
626 (insns): Remove out of date comments.
627
fb25138b
NC
6282006-08-29 Nick Clifton <nickc@redhat.com>
629
630 * read.c (s_align): Initialize the 'stopc' variable to prevent
631 compiler complaints about it being used without being
632 initialized.
633 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
634 s_float_space, s_struct, cons_worker, equals): Likewise.
635
5091343a
AM
6362006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
637
638 * ecoff.c (ecoff_directive_val): Fix message typo.
639 * config/tc-ns32k.c (convert_iif): Likewise.
640 * config/tc-sh64.c (shmedia_check_limits): Likewise.
641
1f2a7e38
BW
6422006-08-25 Sterling Augustine <sterling@tensilica.com>
643 Bob Wilson <bob.wilson@acm.org>
644
645 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
646 the state of the absolute_literals directive. Remove align frag at
647 the start of the literal pool position.
648
34135039
BW
6492006-08-25 Bob Wilson <bob.wilson@acm.org>
650
651 * doc/c-xtensa.texi: Add @group commands in examples.
652
74869ac7
BW
6532006-08-24 Bob Wilson <bob.wilson@acm.org>
654
655 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
656 (INIT_LITERAL_SECTION_NAME): Delete.
657 (lit_state struct): Remove segment names, init_lit_seg, and
658 fini_lit_seg. Add lit_prefix and current_text_seg.
659 (init_literal_head_h, init_literal_head): Delete.
660 (fini_literal_head_h, fini_literal_head): Delete.
661 (xtensa_begin_directive): Move argument parsing to
662 xtensa_literal_prefix function.
663 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
664 (xtensa_literal_prefix): Parse the directive argument here and
665 record it in the lit_prefix field. Remove code to derive literal
666 section names.
667 (linkonce_len): New.
668 (get_is_linkonce_section): Use linkonce_len. Check for any
669 ".gnu.linkonce.*" section, not just text sections.
670 (md_begin): Remove initialization of deleted lit_state fields.
671 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
672 to init_literal_head and fini_literal_head.
673 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
674 when traversing literal_head list.
675 (match_section_group): New.
676 (cache_literal_section): Rewrite to determine the literal section
677 name on the fly, create the section and return it.
678 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
679 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
680 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
681 Use xtensa_get_property_section from bfd.
682 (retrieve_xtensa_section): Delete.
683 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
684 description to refer to plural literal sections and add xref to
685 the Literal Directive section.
686 (Literal Directive): Describe new rules for deriving literal section
687 names. Add footnote for special case of .init/.fini with
688 --text-section-literals.
689 (Literal Prefix Directive): Replace old naming rules with xref to the
690 Literal Directive section.
691
87a1fd79
JM
6922006-08-21 Joseph Myers <joseph@codesourcery.com>
693
694 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
695 merging with previous long opcode.
696
7148cc28
NC
6972006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
698
699 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
700 * Makefile.in: Regenerate.
701 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
702 renamed. Adjust.
703
3e9e4fcf
JB
7042006-08-16 Julian Brown <julian@codesourcery.com>
705
706 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
707 to use ARM instructions on non-ARM-supporting cores.
708 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
709 mode automatically based on cpu variant.
710 (md_begin): Call above function.
711
267d2029
JB
7122006-08-16 Julian Brown <julian@codesourcery.com>
713
714 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
715 recognized in non-unified syntax mode.
716
4be041b2
TS
7172006-08-15 Thiemo Seufer <ths@mips.com>
718 Nigel Stephens <nigel@mips.com>
719 David Ung <davidu@mips.com>
720
721 * configure.tgt: Handle mips*-sde-elf*.
722
3a93f742
TS
7232006-08-12 Thiemo Seufer <ths@networkno.de>
724
725 * config/tc-mips.c (mips16_ip): Fix argument register handling
726 for restore instruction.
727
1737851b
BW
7282006-08-08 Bob Wilson <bob.wilson@acm.org>
729
730 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
731 (out_sleb128): New.
732 (out_fixed_inc_line_addr): New.
733 (process_entries): Use out_fixed_inc_line_addr when
734 DWARF2_USE_FIXED_ADVANCE_PC is set.
735 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
736
e14e52f8
DD
7372006-08-08 DJ Delorie <dj@redhat.com>
738
739 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
740 vs full symbols so that we never have more than one pointer value
741 for any given symbol in our symbol table.
742
802f5d9e
NC
7432006-08-08 Sterling Augustine <sterling@tensilica.com>
744
745 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
746 and emit DW_AT_ranges when code in compilation unit is not
747 contiguous.
748 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
749 is not contiguous.
750 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
751 (out_debug_ranges): New function to emit .debug_ranges section
752 when code is not contiguous.
753
720abc60
NC
7542006-08-08 Nick Clifton <nickc@redhat.com>
755
756 * config/tc-arm.c (WARN_DEPRECATED): Enable.
757
f0927246
NC
7582006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
759
760 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
761 only block.
762 (pe_directive_secrel) [TE_PE]: New function.
763 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
764 loc, loc_mark_labels.
765 [TE_PE]: Handle secrel32.
766 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
767 call.
768 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
769 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
770 (md_section_align): Only round section sizes here for AOUT
771 targets.
772 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
773 (tc_pe_dwarf2_emit_offset): New function.
774 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
775 (cons_fix_new_arm): Handle O_secrel.
776 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
777 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
778 of OBJ_ELF only block.
779 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
780 tc_pe_dwarf2_emit_offset.
781
55e6e397
RS
7822006-08-04 Richard Sandiford <richard@codesourcery.com>
783
784 * config/tc-sh.c (apply_full_field_fix): New function.
785 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
786 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
787 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
788 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
789
9cd19b17
NC
7902006-08-03 Nick Clifton <nickc@redhat.com>
791
792 PR gas/2991
793 * config.in: Regenerate.
794
97f87066
JM
7952006-08-03 Joseph Myers <joseph@codesourcery.com>
796
797 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 798 for OP_RIWR_RIWC.
97f87066 799
41adaa5c
JM
8002006-08-03 Joseph Myers <joseph@codesourcery.com>
801
802 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
803 (parse_operands): Handle it.
804 (insns): Use it for tmcr and tmrc.
805
9d7cbccd
NC
8062006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
807
808 PR binutils/2983
809 * config/tc-i386.c (md_parse_option): Treat any target starting
810 with elf64_x86_64 as a viable target for the -64 switch.
811 (i386_target_format): For 64-bit ELF flavoured output use
812 ELF_TARGET_FORMAT64.
813 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
814
c973bc5c
NC
8152006-08-02 Nick Clifton <nickc@redhat.com>
816
817 PR gas/2991
818 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
819 bfd/aclocal.m4.
820 * configure.in: Run BFD_BINARY_FOPEN.
821 * configure: Regenerate.
822 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
823 file to include.
824
cfde7f70
L
8252006-08-01 H.J. Lu <hongjiu.lu@intel.com>
826
827 * config/tc-i386.c (md_assemble): Don't update
828 cpu_arch_isa_flags.
829
b4c71f56
TS
8302006-08-01 Thiemo Seufer <ths@mips.com>
831
832 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
833
54f4ddb3
TS
8342006-08-01 Thiemo Seufer <ths@mips.com>
835
836 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
837 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
838 BFD_RELOC_32 and BFD_RELOC_16.
839 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
840 md_convert_frag, md_obj_end): Fix comment formatting.
841
d103cf61
TS
8422006-07-31 Thiemo Seufer <ths@mips.com>
843
844 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
845 handling for BFD_RELOC_MIPS16_JMP.
846
601e61cd
NC
8472006-07-24 Andreas Schwab <schwab@suse.de>
848
849 PR/2756
850 * read.c (read_a_source_file): Ignore unknown text after line
851 comment character. Fix misleading comment.
852
b45619c0
NC
8532006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
854
855 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
856 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
857 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
858 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
859 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
860 doc/c-z80.texi, doc/internals.texi: Fix some typos.
861
784906c5
NC
8622006-07-21 Nick Clifton <nickc@redhat.com>
863
864 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
865 linker testsuite.
866
d5f010e9
TS
8672006-07-20 Thiemo Seufer <ths@mips.com>
868 Nigel Stephens <nigel@mips.com>
869
870 * config/tc-mips.c (md_parse_option): Don't infer optimisation
871 options from debug options.
872
35d3d567
TS
8732006-07-20 Thiemo Seufer <ths@mips.com>
874
875 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
876 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
877
401a54cf
PB
8782006-07-19 Paul Brook <paul@codesourcery.com>
879
880 * config/tc-arm.c (insns): Fix rbit Arm opcode.
881
16805f35
PB
8822006-07-18 Paul Brook <paul@codesourcery.com>
883
884 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
885 (md_convert_frag): Use correct reloc for add_pc. Use
886 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
887 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
888 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
889
d9e05e4e
AM
8902006-07-17 Mat Hostetter <mat@lcs.mit.edu>
891
892 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
893 when file and line unknown.
894
f43abd2b
TS
8952006-07-17 Thiemo Seufer <ths@mips.com>
896
897 * read.c (s_struct): Use IS_ELF.
898 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
899 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
900 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
901 s_mips_mask): Likewise.
902
a2902af6
TS
9032006-07-16 Thiemo Seufer <ths@mips.com>
904 David Ung <davidu@mips.com>
905
906 * read.c (s_struct): Handle ELF section changing.
907 * config/tc-mips.c (s_align): Leave enabling auto-align to the
908 generic code.
909 (s_change_sec): Try section changing only if we output ELF.
910
d32cad65
L
9112006-07-15 H.J. Lu <hongjiu.lu@intel.com>
912
913 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
914 CpuAmdFam10.
915 (smallest_imm_type): Remove Cpu086.
916 (i386_target_format): Likewise.
917
918 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
919 Update CpuXXX.
920
050dfa73
MM
9212006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
922 Michael Meissner <michael.meissner@amd.com>
923
924 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
925 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
926 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
927 architecture.
928 (i386_align_code): Ditto.
929 (md_assemble_code): Add support for insertq/extrq instructions,
930 swapping as needed for intel syntax.
931 (swap_imm_operands): New function to swap immediate operands.
932 (swap_operands): Deal with 4 operand instructions.
933 (build_modrm_byte): Add support for insertq instruction.
934
6b2de085
L
9352006-07-13 H.J. Lu <hongjiu.lu@intel.com>
936
937 * config/tc-i386.h (Size64): Fix a typo in comment.
938
01eaea5a
NC
9392006-07-12 Nick Clifton <nickc@redhat.com>
940
941 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 942 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
943 already been checked here.
944
1e85aad8
JW
9452006-07-07 James E Wilson <wilson@specifix.com>
946
947 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
948
1370e33d
NC
9492006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
950 Nick Clifton <nickc@redhat.com>
951
952 PR binutils/2877
953 * doc/as.texi: Fix spelling typo: branchs => branches.
954 * doc/c-m68hc11.texi: Likewise.
955 * config/tc-m68hc11.c: Likewise.
956 Support old spelling of command line switch for backwards
957 compatibility.
958
5f0fe04b
TS
9592006-07-04 Thiemo Seufer <ths@mips.com>
960 David Ung <davidu@mips.com>
961
962 * config/tc-mips.c (s_is_linkonce): New function.
963 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
964 weak, external, and linkonce symbols.
965 (pic_need_relax): Use s_is_linkonce.
966
85234291
L
9672006-06-24 H.J. Lu <hongjiu.lu@intel.com>
968
969 * doc/as.texinfo (Org): Remove space.
970 (P2align): Add "@var{abs-expr},".
971
ccc9c027
L
9722006-06-23 H.J. Lu <hongjiu.lu@intel.com>
973
974 * config/tc-i386.c (cpu_arch_tune_set): New.
975 (cpu_arch_isa): Likewise.
976 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
977 nops with short or long nop sequences based on -march=/.arch
978 and -mtune=.
979 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
980 set cpu_arch_tune and cpu_arch_tune_flags.
981 (md_parse_option): For -march=, set cpu_arch_isa and set
982 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
983 0. Set cpu_arch_tune_set to 1 for -mtune=.
984 (i386_target_format): Don't set cpu_arch_tune.
985
d4dc2f22
TS
9862006-06-23 Nigel Stephens <nigel@mips.com>
987
988 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
989 generated .sbss.* and .gnu.linkonce.sb.*.
990
a8dbcb85
TS
9912006-06-23 Thiemo Seufer <ths@mips.com>
992 David Ung <davidu@mips.com>
993
994 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
995 label_list.
996 * config/tc-mips.c (label_list): Define per-segment label_list.
997 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
998 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
999 mips_from_file_after_relocs, mips_define_label): Use per-segment
1000 label_list.
1001
3994f87e
TS
10022006-06-22 Thiemo Seufer <ths@mips.com>
1003
1004 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
1005 (append_insn): Use it.
1006 (md_apply_fix): Whitespace formatting.
1007 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
1008 mips16_extended_frag): Remove register specifier.
1009 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
1010 constants.
1011
fa073d69
MS
10122006-06-21 Mark Shinwell <shinwell@codesourcery.com>
1013
1014 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
1015 a directive saving VFP registers for ARMv6 or later.
1016 (s_arm_unwind_save): Add parameter arch_v6 and call
1017 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
1018 appropriate.
1019 (md_pseudo_table): Add entry for new "vsave" directive.
1020 * doc/c-arm.texi: Correct error in example for "save"
1021 directive (fstmdf -> fstmdx). Also document "vsave" directive.
1022
8e77b565 10232006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
1024 Anatoly Sokolov <aesok@post.ru>
1025
a70ae331
AM
1026 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
1027 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
1028 atmega164p/atmega324p.
1029 * doc/c-avr.texi: Document new mcu and arch options.
1030
8b1ad454
NC
10312006-06-17 Nick Clifton <nickc@redhat.com>
1032
1033 * config/tc-arm.c (enum parse_operand_result): Move outside of
1034 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
1035
9103f4f4
L
10362006-06-16 H.J. Lu <hongjiu.lu@intel.com>
1037
1038 * config/tc-i386.h (processor_type): New.
1039 (arch_entry): Add type.
1040
1041 * config/tc-i386.c (cpu_arch_tune): New.
1042 (cpu_arch_tune_flags): Likewise.
1043 (cpu_arch_isa_flags): Likewise.
1044 (cpu_arch): Updated.
1045 (set_cpu_arch): Also update cpu_arch_isa_flags.
1046 (md_assemble): Update cpu_arch_isa_flags.
1047 (OPTION_MARCH): New.
1048 (OPTION_MTUNE): Likewise.
1049 (md_longopts): Add -march= and -mtune=.
1050 (md_parse_option): Support -march= and -mtune=.
1051 (md_show_usage): Add -march=CPU/-mtune=CPU.
1052 (i386_target_format): Also update cpu_arch_isa_flags,
1053 cpu_arch_tune and cpu_arch_tune_flags.
1054
1055 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
1056
1057 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
1058
4962c51a
MS
10592006-06-15 Mark Shinwell <shinwell@codesourcery.com>
1060
1061 * config/tc-arm.c (enum parse_operand_result): New.
1062 (struct group_reloc_table_entry): New.
1063 (enum group_reloc_type): New.
1064 (group_reloc_table): New array.
1065 (find_group_reloc_table_entry): New function.
1066 (parse_shifter_operand_group_reloc): New function.
1067 (parse_address_main): New function, incorporating code
1068 from the old parse_address function. To be used via...
1069 (parse_address): wrapper for parse_address_main; and
1070 (parse_address_group_reloc): new function, likewise.
1071 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
1072 OP_ADDRGLDRS, OP_ADDRGLDC.
1073 (parse_operands): Support for these new operand codes.
1074 New macro po_misc_or_fail_no_backtrack.
1075 (encode_arm_cp_address): Preserve group relocations.
1076 (insns): Modify to use the above operand codes where group
1077 relocations are permitted.
1078 (md_apply_fix): Handle the group relocations
1079 ALU_PC_G0_NC through LDC_SB_G2.
1080 (tc_gen_reloc): Likewise.
1081 (arm_force_relocation): Leave group relocations for the linker.
1082 (arm_fix_adjustable): Likewise.
1083
cd2f129f
JB
10842006-06-15 Julian Brown <julian@codesourcery.com>
1085
1086 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
1087 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
1088 relocs properly.
1089
46e883c5
L
10902006-06-12 H.J. Lu <hongjiu.lu@intel.com>
1091
1092 * config/tc-i386.c (process_suffix): Don't add rex64 for
1093 "xchg %rax,%rax".
1094
1787fe5b
TS
10952006-06-09 Thiemo Seufer <ths@mips.com>
1096
1097 * config/tc-mips.c (mips_ip): Maintain argument count.
1098
96f989c2
AM
10992006-06-09 Alan Modra <amodra@bigpond.net.au>
1100
1101 * config/tc-iq2000.c: Include sb.h.
1102
7c752c2a
TS
11032006-06-08 Nigel Stephens <nigel@mips.com>
1104
1105 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
1106 aliases for better compatibility with SGI tools.
1107
03bf704f
AM
11082006-06-08 Alan Modra <amodra@bigpond.net.au>
1109
1110 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
1111 * Makefile.am (GASLIBS): Expand @BFDLIB@.
1112 (BFDVER_H): Delete.
1113 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
1114 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
1115 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
1116 Run "make dep-am".
1117 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
1118 * Makefile.in: Regenerate.
1119 * doc/Makefile.in: Regenerate.
1120 * configure: Regenerate.
1121
6648b7cf
JM
11222006-06-07 Joseph S. Myers <joseph@codesourcery.com>
1123
1124 * po/Make-in (pdf, ps): New dummy targets.
1125
037e8744
JB
11262006-06-07 Julian Brown <julian@codesourcery.com>
1127
1128 * config/tc-arm.c (stdarg.h): include.
1129 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1130 array.
1131 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1132 REG_TYPE_NSDQ (single, double or quad vector reg).
1133 (reg_expected_msgs): Update.
1134 (BAD_FPU): Add macro for unsupported FPU instruction error.
1135 (parse_neon_type): Support 'd' as an alias for .f64.
1136 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1137 sets of registers.
1138 (parse_vfp_reg_list): Don't update first arg on error.
1139 (parse_neon_mov): Support extra syntax for VFP moves.
1140 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1141 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1142 (parse_operands): Support isvec, issingle operands fields, new parse
1143 codes above.
1144 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1145 msr variants.
1146 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1147 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1148 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1149 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1150 shapes.
1151 (neon_shape): Redefine in terms of above.
1152 (neon_shape_class): New enumeration, table of shape classes.
1153 (neon_shape_el): New enumeration. One element of a shape.
1154 (neon_shape_el_size): Register widths of above, where appropriate.
1155 (neon_shape_info): New struct. Info for shape table.
1156 (neon_shape_tab): New array.
1157 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1158 (neon_check_shape): Rewrite as...
1159 (neon_select_shape): New function to classify instruction shapes,
1160 driven by new table neon_shape_tab array.
1161 (neon_quad): New function. Return 1 if shape should set Q flag in
1162 instructions (or equivalent), 0 otherwise.
1163 (type_chk_of_el_type): Support F64.
1164 (el_type_of_type_chk): Likewise.
1165 (neon_check_type): Add support for VFP type checking (VFP data
1166 elements fill their containing registers).
1167 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1168 in thumb mode for VFP instructions.
1169 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1170 and encode the current instruction as if it were that opcode.
1171 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1172 arguments, call function in PFN.
1173 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1174 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1175 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1176 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1177 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1178 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1179 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1180 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1181 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1182 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1183 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1184 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1185 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1186 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1187 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1188 neon_quad.
1189 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1190 between VFP and Neon turns out to belong to Neon. Perform
1191 architecture check and fill in condition field if appropriate.
1192 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1193 (do_neon_cvt): Add support for VFP variants of instructions.
1194 (neon_cvt_flavour): Extend to cover VFP conversions.
1195 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1196 vmov variants.
1197 (do_neon_ldr_str): Handle single-precision VFP load/store.
1198 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1199 NS_NULL not NS_IGNORE.
1200 (opcode_tag): Add OT_csuffixF for operands which either take a
1201 conditional suffix, or have 0xF in the condition field.
1202 (md_assemble): Add support for OT_csuffixF.
1203 (NCE): Replace macro with...
1204 (NCE_tag, NCE, NCEF): New macros.
1205 (nCE): Replace macro with...
1206 (nCE_tag, nCE, nCEF): New macros.
1207 (insns): Add support for VFP insns or VFP versions of insns msr,
1208 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1209 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1210 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1211 VFP/Neon insns together.
1212
ebd1c875
AM
12132006-06-07 Alan Modra <amodra@bigpond.net.au>
1214 Ladislav Michl <ladis@linux-mips.org>
1215
1216 * app.c: Don't include headers already included by as.h.
1217 * as.c: Likewise.
1218 * atof-generic.c: Likewise.
1219 * cgen.c: Likewise.
1220 * dwarf2dbg.c: Likewise.
1221 * expr.c: Likewise.
1222 * input-file.c: Likewise.
1223 * input-scrub.c: Likewise.
1224 * macro.c: Likewise.
1225 * output-file.c: Likewise.
1226 * read.c: Likewise.
1227 * sb.c: Likewise.
1228 * config/bfin-lex.l: Likewise.
1229 * config/obj-coff.h: Likewise.
1230 * config/obj-elf.h: Likewise.
1231 * config/obj-som.h: Likewise.
1232 * config/tc-arc.c: Likewise.
1233 * config/tc-arm.c: Likewise.
1234 * config/tc-avr.c: Likewise.
1235 * config/tc-bfin.c: Likewise.
1236 * config/tc-cris.c: Likewise.
1237 * config/tc-d10v.c: Likewise.
1238 * config/tc-d30v.c: Likewise.
1239 * config/tc-dlx.h: Likewise.
1240 * config/tc-fr30.c: Likewise.
1241 * config/tc-frv.c: Likewise.
1242 * config/tc-h8300.c: Likewise.
1243 * config/tc-hppa.c: Likewise.
1244 * config/tc-i370.c: Likewise.
1245 * config/tc-i860.c: Likewise.
1246 * config/tc-i960.c: Likewise.
1247 * config/tc-ip2k.c: Likewise.
1248 * config/tc-iq2000.c: Likewise.
1249 * config/tc-m32c.c: Likewise.
1250 * config/tc-m32r.c: Likewise.
1251 * config/tc-maxq.c: Likewise.
1252 * config/tc-mcore.c: Likewise.
1253 * config/tc-mips.c: Likewise.
1254 * config/tc-mmix.c: Likewise.
1255 * config/tc-mn10200.c: Likewise.
1256 * config/tc-mn10300.c: Likewise.
1257 * config/tc-msp430.c: Likewise.
1258 * config/tc-mt.c: Likewise.
1259 * config/tc-ns32k.c: Likewise.
1260 * config/tc-openrisc.c: Likewise.
1261 * config/tc-ppc.c: Likewise.
1262 * config/tc-s390.c: Likewise.
1263 * config/tc-sh.c: Likewise.
1264 * config/tc-sh64.c: Likewise.
1265 * config/tc-sparc.c: Likewise.
1266 * config/tc-tic30.c: Likewise.
1267 * config/tc-tic4x.c: Likewise.
1268 * config/tc-tic54x.c: Likewise.
1269 * config/tc-v850.c: Likewise.
1270 * config/tc-vax.c: Likewise.
1271 * config/tc-xc16x.c: Likewise.
1272 * config/tc-xstormy16.c: Likewise.
1273 * config/tc-xtensa.c: Likewise.
1274 * config/tc-z80.c: Likewise.
1275 * config/tc-z8k.c: Likewise.
1276 * macro.h: Don't include sb.h or ansidecl.h.
1277 * sb.h: Don't include stdio.h or ansidecl.h.
1278 * cond.c: Include sb.h.
1279 * itbl-lex.l: Include as.h instead of other system headers.
1280 * itbl-parse.y: Likewise.
1281 * itbl-ops.c: Similarly.
1282 * itbl-ops.h: Don't include as.h or ansidecl.h.
1283 * config/bfin-defs.h: Don't include bfd.h or as.h.
1284 * config/bfin-parse.y: Include as.h instead of other system headers.
1285
9622b051
AM
12862006-06-06 Ben Elliston <bje@au.ibm.com>
1287 Anton Blanchard <anton@samba.org>
1288
1289 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1290 (md_show_usage): Document it.
1291 (ppc_setup_opcodes): Test power6 opcode flag bits.
1292 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1293
65263ce3
TS
12942006-06-06 Thiemo Seufer <ths@mips.com>
1295 Chao-ying Fu <fu@mips.com>
1296
1297 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1298 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1299 (macro_build): Update comment.
1300 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1301 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1302 CPU_HAS_MDMX.
1303 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1304 MIPS_CPU_ASE_MDMX flags for sb1.
1305
a9e24354
TS
13062006-06-05 Thiemo Seufer <ths@mips.com>
1307
1308 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1309 appropriate.
1310 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1311 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1312 and MT instructions a fatal error. Use INSERT_OPERAND where
1313 appropriate. Improve warnings for break and wait code overflows.
1314 Use symbolic constant of OP_MASK_COPZ.
1315 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1316
4cfe2c59
DJ
13172006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1318
1319 * po/Make-in (top_builddir): Define.
1320
e10fad12
JM
13212006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1322
1323 * doc/Makefile.am (TEXI2DVI): Define.
1324 * doc/Makefile.in: Regenerate.
1325 * doc/c-arc.texi: Fix typo.
1326
12e64c2c
AM
13272006-06-01 Alan Modra <amodra@bigpond.net.au>
1328
1329 * config/obj-ieee.c: Delete.
1330 * config/obj-ieee.h: Delete.
1331 * Makefile.am (OBJ_FORMATS): Remove ieee.
1332 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1333 (obj-ieee.o): Remove rule.
1334 * Makefile.in: Regenerate.
1335 * configure.in (atof): Remove tahoe.
1336 (OBJ_MAYBE_IEEE): Don't define.
1337 * configure: Regenerate.
1338 * config.in: Regenerate.
1339 * doc/Makefile.in: Regenerate.
1340 * po/POTFILES.in: Regenerate.
1341
20e95c23
DJ
13422006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1343
1344 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1345 and LIBINTL_DEP everywhere.
1346 (INTLLIBS): Remove.
1347 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1348 * acinclude.m4: Include new gettext macros.
1349 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1350 Remove local code for po/Makefile.
1351 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1352
eebf07fb
NC
13532006-05-30 Nick Clifton <nickc@redhat.com>
1354
1355 * po/es.po: Updated Spanish translation.
1356
b6aee19e
DC
13572006-05-06 Denis Chertykov <denisc@overta.ru>
1358
1359 * doc/c-avr.texi: New file.
1360 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1361 * doc/all.texi: Set AVR
1362 * doc/as.texinfo: Include c-avr.texi
1363
f8fdc850 13642006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1365
f8fdc850
JZ
1366 * config/bfin-parse.y (check_macfunc): Loose the condition of
1367 calling check_multiply_halfregs ().
1368
a3205465
JZ
13692006-05-25 Jie Zhang <jie.zhang@analog.com>
1370
1371 * config/bfin-parse.y (asm_1): Better check and deal with
1372 vector and scalar Multiply 16-Bit Operands instructions.
1373
9b52905e
NC
13742006-05-24 Nick Clifton <nickc@redhat.com>
1375
1376 * config/tc-hppa.c: Convert to ISO C90 format.
1377 * config/tc-hppa.h: Likewise.
1378
13792006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1380 Randolph Chung <randolph@tausq.org>
a70ae331 1381
9b52905e
NC
1382 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1383 is_tls_ieoff, is_tls_leoff): Define.
1384 (fix_new_hppa): Handle TLS.
1385 (cons_fix_new_hppa): Likewise.
1386 (pa_ip): Likewise.
1387 (md_apply_fix): Handle TLS relocs.
1388 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1389
a70ae331 13902006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1391
1392 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1393
ad3fea08
TS
13942006-05-23 Thiemo Seufer <ths@mips.com>
1395 David Ung <davidu@mips.com>
1396 Nigel Stephens <nigel@mips.com>
1397
1398 [ gas/ChangeLog ]
1399 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1400 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1401 ISA_HAS_MXHC1): New macros.
1402 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1403 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1404 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1405 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1406 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1407 (mips_after_parse_args): Change default handling of float register
1408 size to account for 32bit code with 64bit FP. Better sanity checking
1409 of ISA/ASE/ABI option combinations.
1410 (s_mipsset): Support switching of GPR and FPR sizes via
1411 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1412 options.
1413 (mips_elf_final_processing): We should record the use of 64bit FP
1414 registers in 32bit code but we don't, because ELF header flags are
1415 a scarce ressource.
1416 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1417 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1418 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1419 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1420 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1421 missing -march options. Document .set arch=CPU. Move .set smartmips
1422 to ASE page. Use @code for .set FOO examples.
1423
8b64503a
JZ
14242006-05-23 Jie Zhang <jie.zhang@analog.com>
1425
1426 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1427 if needed.
1428
403022e0
JZ
14292006-05-23 Jie Zhang <jie.zhang@analog.com>
1430
1431 * config/bfin-defs.h (bfin_equals): Remove declaration.
1432 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1433 * config/tc-bfin.c (bfin_name_is_register): Remove.
1434 (bfin_equals): Remove.
1435 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1436 (bfin_name_is_register): Remove declaration.
1437
7455baf8
TS
14382006-05-19 Thiemo Seufer <ths@mips.com>
1439 Nigel Stephens <nigel@mips.com>
1440
1441 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1442 (mips_oddfpreg_ok): New function.
1443 (mips_ip): Use it.
1444
707bfff6
TS
14452006-05-19 Thiemo Seufer <ths@mips.com>
1446 David Ung <davidu@mips.com>
1447
1448 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1449 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1450 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1451 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1452 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1453 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1454 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1455 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1456 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1457 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1458 reg_names_o32, reg_names_n32n64): Define register classes.
1459 (reg_lookup): New function, use register classes.
1460 (md_begin): Reserve register names in the symbol table. Simplify
1461 OBJ_ELF defines.
1462 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1463 Use reg_lookup.
1464 (mips16_ip): Use reg_lookup.
1465 (tc_get_register): Likewise.
1466 (tc_mips_regname_to_dw2regnum): New function.
1467
1df69f4f
TS
14682006-05-19 Thiemo Seufer <ths@mips.com>
1469
1470 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1471 Un-constify string argument.
1472 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1473 Likewise.
1474 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1475 Likewise.
1476 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1477 Likewise.
1478 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1479 Likewise.
1480 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1481 Likewise.
1482 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1483 Likewise.
1484
377260ba
NS
14852006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1486
1487 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1488 cfloat/m68881 to correct architecture before using it.
1489
cce7653b
NC
14902006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1491
a70ae331 1492 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1493 constant values.
1494
b0796911
PB
14952006-05-15 Paul Brook <paul@codesourcery.com>
1496
1497 * config/tc-arm.c (arm_adjust_symtab): Use
1498 bfd_is_arm_special_symbol_name.
1499
64b607e6
BW
15002006-05-15 Bob Wilson <bob.wilson@acm.org>
1501
1502 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1503 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1504 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1505 Handle errors from calls to xtensa_opcode_is_* functions.
1506
9b3f89ee
TS
15072006-05-14 Thiemo Seufer <ths@mips.com>
1508
1509 * config/tc-mips.c (macro_build): Test for currently active
1510 mips16 option.
1511 (mips16_ip): Reject invalid opcodes.
1512
370b66a1
CD
15132006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1514
1515 * doc/as.texinfo: Rename "Index" to "AS Index",
1516 and "ABORT" to "ABORT (COFF)".
1517
b6895b4f
PB
15182006-05-11 Paul Brook <paul@codesourcery.com>
1519
1520 * config/tc-arm.c (parse_half): New function.
1521 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1522 (parse_operands): Ditto.
1523 (do_mov16): Reject invalid relocations.
1524 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1525 (insns): Replace Iffff with HALF.
1526 (md_apply_fix): Add MOVW and MOVT relocs.
1527 (tc_gen_reloc): Ditto.
1528 * doc/c-arm.texi: Document relocation operators
1529
e28387c3
PB
15302006-05-11 Paul Brook <paul@codesourcery.com>
1531
1532 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1533
89ee2ebe
TS
15342006-05-11 Thiemo Seufer <ths@mips.com>
1535
1536 * config/tc-mips.c (append_insn): Don't check the range of j or
1537 jal addresses.
1538
53baae48
NC
15392006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1540
1541 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1542 relocs against external symbols for WinCE targets.
53baae48
NC
1543 (md_apply_fix): Likewise.
1544
4e2a74a8
TS
15452006-05-09 David Ung <davidu@mips.com>
1546
1547 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1548 j or jal address.
1549
337ff0a5
NC
15502006-05-09 Nick Clifton <nickc@redhat.com>
1551
1552 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1553 against symbols which are not going to be placed into the symbol
1554 table.
1555
8c9f705e
BE
15562006-05-09 Ben Elliston <bje@au.ibm.com>
1557
1558 * expr.c (operand): Remove `if (0 && ..)' statement and
1559 subsequently unused target_op label. Collapse `if (1 || ..)'
1560 statement.
1561 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1562 separately above the switch.
1563
2fd0d2ac
NC
15642006-05-08 Nick Clifton <nickc@redhat.com>
1565
1566 PR gas/2623
1567 * config/tc-msp430.c (line_separator_character): Define as |.
1568
e16bfa71
TS
15692006-05-08 Thiemo Seufer <ths@mips.com>
1570 Nigel Stephens <nigel@mips.com>
1571 David Ung <davidu@mips.com>
1572
1573 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1574 (mips_opts): Likewise.
1575 (file_ase_smartmips): New variable.
1576 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1577 (macro_build): Handle SmartMIPS instructions.
1578 (mips_ip): Likewise.
1579 (md_longopts): Add argument handling for smartmips.
1580 (md_parse_options, mips_after_parse_args): Likewise.
1581 (s_mipsset): Add .set smartmips support.
1582 (md_show_usage): Document -msmartmips/-mno-smartmips.
1583 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1584 .set smartmips.
1585 * doc/c-mips.texi: Likewise.
1586
32638454
AM
15872006-05-08 Alan Modra <amodra@bigpond.net.au>
1588
1589 * write.c (relax_segment): Add pass count arg. Don't error on
1590 negative org/space on first two passes.
1591 (relax_seg_info): New struct.
1592 (relax_seg, write_object_file): Adjust.
1593 * write.h (relax_segment): Update prototype.
1594
b7fc2769
JB
15952006-05-05 Julian Brown <julian@codesourcery.com>
1596
1597 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1598 checking.
1599 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1600 architecture version checks.
1601 (insns): Allow overlapping instructions to be used in VFP mode.
1602
7f841127
L
16032006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1604
1605 PR gas/2598
1606 * config/obj-elf.c (obj_elf_change_section): Allow user
1607 specified SHF_ALPHA_GPREL.
1608
73160847
NC
16092006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1610
1611 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1612 for PMEM related expressions.
1613
56487c55
NC
16142006-05-05 Nick Clifton <nickc@redhat.com>
1615
1616 PR gas/2582
1617 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1618 insertion of a directory separator character into a string at a
1619 given offset. Uses heuristics to decide when to use a backslash
1620 character rather than a forward-slash character.
1621 (dwarf2_directive_loc): Use the macro.
1622 (out_debug_info): Likewise.
1623
d43b4baf
TS
16242006-05-05 Thiemo Seufer <ths@mips.com>
1625 David Ung <davidu@mips.com>
1626
1627 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1628 instruction.
1629 (macro): Add new case M_CACHE_AB.
1630
088fa78e
KH
16312006-05-04 Kazu Hirata <kazu@codesourcery.com>
1632
1633 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1634 (opcode_lookup): Issue a warning for opcode with
1635 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1636 identical to OT_cinfix3.
1637 (TxC3w, TC3w, tC3w): New.
1638 (insns): Use tC3w and TC3w for comparison instructions with
1639 's' suffix.
1640
c9049d30
AM
16412006-05-04 Alan Modra <amodra@bigpond.net.au>
1642
1643 * subsegs.h (struct frchain): Delete frch_seg.
1644 (frchain_root): Delete.
1645 (seg_info): Define as macro.
1646 * subsegs.c (frchain_root): Delete.
1647 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1648 (subsegs_begin, subseg_change): Adjust for above.
1649 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1650 rather than to one big list.
1651 (subseg_get): Don't special case abs, und sections.
1652 (subseg_new, subseg_force_new): Don't set frchainP here.
1653 (seg_info): Delete.
1654 (subsegs_print_statistics): Adjust frag chain control list traversal.
1655 * debug.c (dmp_frags): Likewise.
1656 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1657 at frchain_root. Make use of known frchain ordering.
1658 (last_frag_for_seg): Likewise.
1659 (get_frag_fix): Likewise. Add seg param.
1660 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1661 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1662 (SUB_SEGMENT_ALIGN): Likewise.
1663 (subsegs_finish): Adjust frchain list traversal.
1664 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1665 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1666 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1667 (xtensa_fix_b_j_loop_end_frags): Likewise.
1668 (xtensa_fix_close_loop_end_frags): Likewise.
1669 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1670 (retrieve_segment_info): Delete frch_seg initialisation.
1671
f592407e
AM
16722006-05-03 Alan Modra <amodra@bigpond.net.au>
1673
1674 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1675 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1676 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1677 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1678
df7849c5
JM
16792006-05-02 Joseph Myers <joseph@codesourcery.com>
1680
1681 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1682 here.
1683 (md_apply_fix3): Multiply offset by 4 here for
1684 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1685
2d545b82
L
16862006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1687 Jan Beulich <jbeulich@novell.com>
1688
1689 * config/tc-i386.c (output_invalid_buf): Change size for
1690 unsigned char.
1691 * config/tc-tic30.c (output_invalid_buf): Likewise.
1692
1693 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1694 unsigned char.
1695 * config/tc-tic30.c (output_invalid): Likewise.
1696
38fc1cb1
DJ
16972006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1698
1699 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1700 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1701 (asconfig.texi): Don't set top_srcdir.
1702 * doc/as.texinfo: Don't use top_srcdir.
1703 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1704
2d545b82
L
17052006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1706
1707 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1708 * config/tc-tic30.c (output_invalid_buf): Likewise.
1709
1710 * config/tc-i386.c (output_invalid): Use snprintf instead of
1711 sprintf.
1712 * config/tc-ia64.c (declare_register_set): Likewise.
1713 (emit_one_bundle): Likewise.
1714 (check_dependencies): Likewise.
1715 * config/tc-tic30.c (output_invalid): Likewise.
1716
a8bc6c78
PB
17172006-05-02 Paul Brook <paul@codesourcery.com>
1718
1719 * config/tc-arm.c (arm_optimize_expr): New function.
1720 * config/tc-arm.h (md_optimize_expr): Define
1721 (arm_optimize_expr): Add prototype.
1722 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1723
58633d9a
BE
17242006-05-02 Ben Elliston <bje@au.ibm.com>
1725
22772e33
BE
1726 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1727 field unsigned.
1728
58633d9a
BE
1729 * sb.h (sb_list_vector): Move to sb.c.
1730 * sb.c (free_list): Use type of sb_list_vector directly.
1731 (sb_build): Fix off-by-one error in assertion about `size'.
1732
89cdfe57
BE
17332006-05-01 Ben Elliston <bje@au.ibm.com>
1734
1735 * listing.c (listing_listing): Remove useless loop.
1736 * macro.c (macro_expand): Remove is_positional local variable.
1737 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1738 and simplify surrounding expressions, where possible.
1739 (assign_symbol): Likewise.
1740 (s_weakref): Likewise.
1741 * symbols.c (colon): Likewise.
1742
c35da140
AM
17432006-05-01 James Lemke <jwlemke@wasabisystems.com>
1744
1745 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1746
9bcd4f99
TS
17472006-04-30 Thiemo Seufer <ths@mips.com>
1748 David Ung <davidu@mips.com>
1749
1750 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1751 (mips_immed): New table that records various handling of udi
1752 instruction patterns.
1753 (mips_ip): Adds udi handling.
1754
001ae1a4
AM
17552006-04-28 Alan Modra <amodra@bigpond.net.au>
1756
1757 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1758 of list rather than beginning.
1759
136da414
JB
17602006-04-26 Julian Brown <julian@codesourcery.com>
1761
1762 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1763 (is_quarter_float): Rename from above. Simplify slightly.
1764 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1765 number.
1766 (parse_neon_mov): Parse floating-point constants.
1767 (neon_qfloat_bits): Fix encoding.
1768 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1769 preference to integer encoding when using the F32 type.
1770
dcbf9037
JB
17712006-04-26 Julian Brown <julian@codesourcery.com>
1772
1773 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1774 zero-initialising structures containing it will lead to invalid types).
1775 (arm_it): Add vectype to each operand.
1776 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1777 defined field.
1778 (neon_typed_alias): New structure. Extra information for typed
1779 register aliases.
1780 (reg_entry): Add neon type info field.
1781 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1782 Break out alternative syntax for coprocessor registers, etc. into...
1783 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1784 out from arm_reg_parse.
1785 (parse_neon_type): Move. Return SUCCESS/FAIL.
1786 (first_error): New function. Call to ensure first error which occurs is
1787 reported.
1788 (parse_neon_operand_type): Parse exactly one type.
1789 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1790 (parse_typed_reg_or_scalar): New function. Handle core of both
1791 arm_typed_reg_parse and parse_scalar.
1792 (arm_typed_reg_parse): Parse a register with an optional type.
1793 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1794 result.
1795 (parse_scalar): Parse a Neon scalar with optional type.
1796 (parse_reg_list): Use first_error.
1797 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1798 (neon_alias_types_same): New function. Return true if two (alias) types
1799 are the same.
1800 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1801 of elements.
1802 (insert_reg_alias): Return new reg_entry not void.
1803 (insert_neon_reg_alias): New function. Insert type/index information as
1804 well as register for alias.
1805 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1806 make typed register aliases accordingly.
1807 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1808 of line.
1809 (s_unreq): Delete type information if present.
1810 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1811 (s_arm_unwind_save_mmxwcg): Likewise.
1812 (s_arm_unwind_movsp): Likewise.
1813 (s_arm_unwind_setfp): Likewise.
1814 (parse_shift): Likewise.
1815 (parse_shifter_operand): Likewise.
1816 (parse_address): Likewise.
1817 (parse_tb): Likewise.
1818 (tc_arm_regname_to_dw2regnum): Likewise.
1819 (md_pseudo_table): Add dn, qn.
1820 (parse_neon_mov): Handle typed operands.
1821 (parse_operands): Likewise.
1822 (neon_type_mask): Add N_SIZ.
1823 (N_ALLMODS): New macro.
1824 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1825 (el_type_of_type_chk): Add some safeguards.
1826 (modify_types_allowed): Fix logic bug.
1827 (neon_check_type): Handle operands with types.
1828 (neon_three_same): Remove redundant optional arg handling.
1829 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1830 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1831 (do_neon_step): Adjust accordingly.
1832 (neon_cmode_for_logic_imm): Use first_error.
1833 (do_neon_bitfield): Call neon_check_type.
1834 (neon_dyadic): Rename to...
1835 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1836 to allow modification of type of the destination.
1837 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1838 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1839 (do_neon_compare): Make destination be an untyped bitfield.
1840 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1841 (neon_mul_mac): Return early in case of errors.
1842 (neon_move_immediate): Use first_error.
1843 (neon_mac_reg_scalar_long): Fix type to include scalar.
1844 (do_neon_dup): Likewise.
1845 (do_neon_mov): Likewise (in several places).
1846 (do_neon_tbl_tbx): Fix type.
1847 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1848 (do_neon_ld_dup): Exit early in case of errors and/or use
1849 first_error.
1850 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1851 Handle .dn/.qn directives.
1852 (REGDEF): Add zero for reg_entry neon field.
1853
5287ad62
JB
18542006-04-26 Julian Brown <julian@codesourcery.com>
1855
1856 * config/tc-arm.c (limits.h): Include.
1857 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1858 (fpu_vfp_v3_or_neon_ext): Declare constants.
1859 (neon_el_type): New enumeration of types for Neon vector elements.
1860 (neon_type_el): New struct. Define type and size of a vector element.
1861 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1862 instruction.
1863 (neon_type): Define struct. The type of an instruction.
1864 (arm_it): Add 'vectype' for the current instruction.
1865 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1866 (vfp_sp_reg_pos): Rename to...
1867 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1868 tags.
1869 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1870 (Neon D or Q register).
1871 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1872 register.
1873 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1874 (my_get_expression): Allow above constant as argument to accept
1875 64-bit constants with optional prefix.
1876 (arm_reg_parse): Add extra argument to return the specific type of
1877 register in when either a D or Q register (REG_TYPE_NDQ) is
1878 requested. Can be NULL.
1879 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1880 (parse_reg_list): Update for new arm_reg_parse args.
1881 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1882 (parse_neon_el_struct_list): New function. Parse element/structure
1883 register lists for VLD<n>/VST<n> instructions.
1884 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1885 (s_arm_unwind_save_mmxwr): Likewise.
1886 (s_arm_unwind_save_mmxwcg): Likewise.
1887 (s_arm_unwind_movsp): Likewise.
1888 (s_arm_unwind_setfp): Likewise.
1889 (parse_big_immediate): New function. Parse an immediate, which may be
1890 64 bits wide. Put results in inst.operands[i].
1891 (parse_shift): Update for new arm_reg_parse args.
1892 (parse_address): Likewise. Add parsing of alignment specifiers.
1893 (parse_neon_mov): Parse the operands of a VMOV instruction.
1894 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1895 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1896 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1897 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1898 (parse_operands): Handle new codes above.
1899 (encode_arm_vfp_sp_reg): Rename to...
1900 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1901 selected VFP version only supports D0-D15.
1902 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1903 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1904 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1905 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1906 encode_arm_vfp_reg name, and allow 32 D regs.
1907 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1908 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1909 regs.
1910 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1911 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1912 constant-load and conversion insns introduced with VFPv3.
1913 (neon_tab_entry): New struct.
1914 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1915 those which are the targets of pseudo-instructions.
1916 (neon_opc): Enumerate opcodes, use as indices into...
1917 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1918 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1919 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1920 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1921 neon_enc_tab.
1922 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1923 Neon instructions.
1924 (neon_type_mask): New. Compact type representation for type checking.
1925 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1926 permitted type combinations.
1927 (N_IGNORE_TYPE): New macro.
1928 (neon_check_shape): New function. Check an instruction shape for
1929 multiple alternatives. Return the specific shape for the current
1930 instruction.
1931 (neon_modify_type_size): New function. Modify a vector type and size,
1932 depending on the bit mask in argument 1.
1933 (neon_type_promote): New function. Convert a given "key" type (of an
1934 operand) into the correct type for a different operand, based on a bit
1935 mask.
1936 (type_chk_of_el_type): New function. Convert a type and size into the
1937 compact representation used for type checking.
1938 (el_type_of_type_ckh): New function. Reverse of above (only when a
1939 single bit is set in the bit mask).
1940 (modify_types_allowed): New function. Alter a mask of allowed types
1941 based on a bit mask of modifications.
1942 (neon_check_type): New function. Check the type of the current
1943 instruction against the variable argument list. The "key" type of the
1944 instruction is returned.
1945 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1946 a Neon data-processing instruction depending on whether we're in ARM
1947 mode or Thumb-2 mode.
1948 (neon_logbits): New function.
1949 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1950 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1951 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1952 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1953 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1954 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1955 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1956 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1957 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1958 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1959 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1960 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1961 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1962 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1963 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1964 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1965 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1966 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1967 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1968 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1969 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1970 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1971 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1972 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1973 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1974 helpers.
1975 (parse_neon_type): New function. Parse Neon type specifier.
1976 (opcode_lookup): Allow parsing of Neon type specifiers.
1977 (REGNUM2, REGSETH, REGSET2): New macros.
1978 (reg_names): Add new VFPv3 and Neon registers.
1979 (NUF, nUF, NCE, nCE): New macros for opcode table.
1980 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1981 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1982 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1983 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1984 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1985 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1986 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1987 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1988 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1989 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1990 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1991 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1992 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1993 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1994 fto[us][lh][sd].
1995 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1996 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1997 (arm_option_cpu_value): Add vfp3 and neon.
1998 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1999 VFPv1 attribute.
2000
1946c96e
BW
20012006-04-25 Bob Wilson <bob.wilson@acm.org>
2002
2003 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
2004 syntax instead of hardcoded opcodes with ".w18" suffixes.
2005 (wide_branch_opcode): New.
2006 (build_transition): Use it to check for wide branch opcodes with
2007 either ".w18" or ".w15" suffixes.
2008
5033a645
BW
20092006-04-25 Bob Wilson <bob.wilson@acm.org>
2010
2011 * config/tc-xtensa.c (xtensa_create_literal_symbol,
2012 xg_assemble_literal, xg_assemble_literal_space): Do not set the
2013 frag's is_literal flag.
2014
395fa56f
BW
20152006-04-25 Bob Wilson <bob.wilson@acm.org>
2016
2017 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
2018
708587a4
KH
20192006-04-23 Kazu Hirata <kazu@codesourcery.com>
2020
2021 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
2022 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
2023 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
2024 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
2025 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
2026
8463be01
PB
20272005-04-20 Paul Brook <paul@codesourcery.com>
2028
2029 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
2030 all targets.
2031 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
2032
f26a5955
AM
20332006-04-19 Alan Modra <amodra@bigpond.net.au>
2034
2035 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
2036 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
2037 Make some cpus unsupported on ELF. Run "make dep-am".
2038 * Makefile.in: Regenerate.
2039
241a6c40
AM
20402006-04-19 Alan Modra <amodra@bigpond.net.au>
2041
2042 * configure.in (--enable-targets): Indent help message.
2043 * configure: Regenerate.
2044
bb8f5920
L
20452006-04-18 H.J. Lu <hongjiu.lu@intel.com>
2046
2047 PR gas/2533
2048 * config/tc-i386.c (i386_immediate): Check illegal immediate
2049 register operand.
2050
23d9d9de
AM
20512006-04-18 Alan Modra <amodra@bigpond.net.au>
2052
64e74474
AM
2053 * config/tc-i386.c: Formatting.
2054 (output_disp, output_imm): ISO C90 params.
2055
6cbe03fb
AM
2056 * frags.c (frag_offset_fixed_p): Constify args.
2057 * frags.h (frag_offset_fixed_p): Ditto.
2058
23d9d9de
AM
2059 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
2060 (COFF_MAGIC): Delete.
a37d486e
AM
2061
2062 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
2063
e7403566
DJ
20642006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
2065
2066 * po/POTFILES.in: Regenerated.
2067
58ab4f3d
MM
20682006-04-16 Mark Mitchell <mark@codesourcery.com>
2069
2070 * doc/as.texinfo: Mention that some .type syntaxes are not
2071 supported on all architectures.
2072
482fd9f9
BW
20732006-04-14 Sterling Augustine <sterling@tensilica.com>
2074
2075 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
2076 instructions when such transformations have been disabled.
2077
05d58145
BW
20782006-04-10 Sterling Augustine <sterling@tensilica.com>
2079
2080 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
2081 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
2082 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
2083 decoding the loop instructions. Remove current_offset variable.
2084 (xtensa_fix_short_loop_frags): Likewise.
2085 (min_bytes_to_other_loop_end): Remove current_offset argument.
2086
9e75b3fa
AM
20872006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
2088
a37d486e 2089 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
2090 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
2091
d727e8c2
NC
20922006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
2093
2094 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
2095 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
2096 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
2097 atmega644, atmega329, atmega3290, atmega649, atmega6490,
2098 atmega406, atmega640, atmega1280, atmega1281, at90can32,
2099 at90can64, at90usb646, at90usb647, at90usb1286 and
2100 at90usb1287.
2101 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2102
d252fdde
PB
21032006-04-07 Paul Brook <paul@codesourcery.com>
2104
2105 * config/tc-arm.c (parse_operands): Set default error message.
2106
ab1eb5fe
PB
21072006-04-07 Paul Brook <paul@codesourcery.com>
2108
2109 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
2110
7ae2971b
PB
21112006-04-07 Paul Brook <paul@codesourcery.com>
2112
2113 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
2114
53365c0d
PB
21152006-04-07 Paul Brook <paul@codesourcery.com>
2116
2117 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
2118 (move_or_literal_pool): Handle Thumb-2 instructions.
2119 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2120
45aa61fe
AM
21212006-04-07 Alan Modra <amodra@bigpond.net.au>
2122
2123 PR 2512.
2124 * config/tc-i386.c (match_template): Move 64-bit operand tests
2125 inside loop.
2126
108a6f8e
CD
21272006-04-06 Carlos O'Donell <carlos@codesourcery.com>
2128
2129 * po/Make-in: Add install-html target.
2130 * Makefile.am: Add install-html and install-html-recursive targets.
2131 * Makefile.in: Regenerate.
2132 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2133 * configure: Regenerate.
2134 * doc/Makefile.am: Add install-html and install-html-am targets.
2135 * doc/Makefile.in: Regenerate.
2136
ec651a3b
AM
21372006-04-06 Alan Modra <amodra@bigpond.net.au>
2138
2139 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2140 second scan.
2141
910600e9
RS
21422006-04-05 Richard Sandiford <richard@codesourcery.com>
2143 Daniel Jacobowitz <dan@codesourcery.com>
2144
2145 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2146 (GOTT_BASE, GOTT_INDEX): New.
2147 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2148 GOTT_INDEX when generating VxWorks PIC.
2149 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2150 use the generic *-*-vxworks* stanza instead.
2151
99630778
AM
21522006-04-04 Alan Modra <amodra@bigpond.net.au>
2153
2154 PR 997
2155 * frags.c (frag_offset_fixed_p): New function.
2156 * frags.h (frag_offset_fixed_p): Declare.
2157 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2158 (resolve_expression): Likewise.
2159
a02728c8
BW
21602006-04-03 Sterling Augustine <sterling@tensilica.com>
2161
2162 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2163 of the same length but different numbers of slots.
2164
9dfde49d
AS
21652006-03-30 Andreas Schwab <schwab@suse.de>
2166
2167 * configure.in: Fix help string for --enable-targets option.
2168 * configure: Regenerate.
2169
2da12c60
NS
21702006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2171
6d89cc8f
NS
2172 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2173 (m68k_ip): ... here. Use for all chips. Protect against buffer
2174 overrun and avoid excessive copying.
2175
2da12c60
NS
2176 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2177 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2178 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2179 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2180 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2181 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2182 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2183 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2184 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2185 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2186 (struct m68k_cpu): Change chip field to control_regs.
2187 (current_chip): Remove.
2188 (control_regs): New.
2189 (m68k_archs, m68k_extensions): Adjust.
2190 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2191 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2192 (find_cf_chip): Reimplement for new organization of cpu table.
2193 (select_control_regs): Remove.
2194 (mri_chip): Adjust.
2195 (struct save_opts): Save control regs, not chip.
2196 (s_save, s_restore): Adjust.
2197 (m68k_lookup_cpu): Give deprecated warning when necessary.
2198 (m68k_init_arch): Adjust.
2199 (md_show_usage): Adjust for new cpu table organization.
2200
1ac4baed
BS
22012006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2202
2203 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2204 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2205 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2206 "elf/bfin.h".
2207 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2208 (any_gotrel): New rule.
2209 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2210 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2211 "elf/bfin.h".
2212 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2213 (bfin_pic_ptr): New function.
2214 (md_pseudo_table): Add it for ".picptr".
2215 (OPTION_FDPIC): New macro.
2216 (md_longopts): Add -mfdpic.
2217 (md_parse_option): Handle it.
2218 (md_begin): Set BFD flags.
2219 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2220 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2221 us for GOT relocs.
2222 * Makefile.am (bfin-parse.o): Update dependencies.
2223 (DEPTC_bfin_elf): Likewise.
2224 * Makefile.in: Regenerate.
2225
a9d34880
RS
22262006-03-25 Richard Sandiford <richard@codesourcery.com>
2227
2228 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2229 mcfemac instead of mcfmac.
2230
9ca26584
AJ
22312006-03-23 Michael Matz <matz@suse.de>
2232
2233 * config/tc-i386.c (type_names): Correct placement of 'static'.
2234 (reloc): Map some more relocs to their 64 bit counterpart when
2235 size is 8.
2236 (output_insn): Work around breakage if DEBUG386 is defined.
2237 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2238 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2239 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2240 different from i386.
2241 (output_imm): Ditto.
2242 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2243 Imm64.
2244 (md_convert_frag): Jumps can now be larger than 2GB away, error
2245 out in that case.
2246 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2247 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2248
0a44bf69
RS
22492006-03-22 Richard Sandiford <richard@codesourcery.com>
2250 Daniel Jacobowitz <dan@codesourcery.com>
2251 Phil Edwards <phil@codesourcery.com>
2252 Zack Weinberg <zack@codesourcery.com>
2253 Mark Mitchell <mark@codesourcery.com>
2254 Nathan Sidwell <nathan@codesourcery.com>
2255
2256 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2257 (md_begin): Complain about -G being used for PIC. Don't change
2258 the text, data and bss alignments on VxWorks.
2259 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2260 generating VxWorks PIC.
2261 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2262 (macro): Likewise, but do not treat la $25 specially for
2263 VxWorks PIC, and do not handle jal.
2264 (OPTION_MVXWORKS_PIC): New macro.
2265 (md_longopts): Add -mvxworks-pic.
2266 (md_parse_option): Don't complain about using PIC and -G together here.
2267 Handle OPTION_MVXWORKS_PIC.
2268 (md_estimate_size_before_relax): Always use the first relaxation
2269 sequence on VxWorks.
2270 * config/tc-mips.h (VXWORKS_PIC): New.
2271
080eb7fe
PB
22722006-03-21 Paul Brook <paul@codesourcery.com>
2273
2274 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2275
03aaa593
BW
22762006-03-21 Sterling Augustine <sterling@tensilica.com>
2277
2278 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2279 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2280 (get_loop_align_size): New.
2281 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2282 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2283 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2284 (get_noop_aligned_address): Use get_loop_align_size.
2285 (get_aligned_diff): Likewise.
2286
3e94bf1a
PB
22872006-03-21 Paul Brook <paul@codesourcery.com>
2288
2289 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2290
dfa9f0d5
PB
22912006-03-20 Paul Brook <paul@codesourcery.com>
2292
2293 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2294 (do_t_branch): Encode branches inside IT blocks as unconditional.
2295 (do_t_cps): New function.
2296 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2297 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2298 (opcode_lookup): Allow conditional suffixes on all instructions in
2299 Thumb mode.
2300 (md_assemble): Advance condexec state before checking for errors.
2301 (insns): Use do_t_cps.
2302
6e1cb1a6
PB
23032006-03-20 Paul Brook <paul@codesourcery.com>
2304
2305 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2306 outputting the insn.
2307
0a966e2d
JBG
23082006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2309
2310 * config/tc-vax.c: Update copyright year.
2311 * config/tc-vax.h: Likewise.
2312
a49fcc17
JBG
23132006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2314
2315 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2316 make it static.
2317 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2318
f5208ef2
PB
23192006-03-17 Paul Brook <paul@codesourcery.com>
2320
2321 * config/tc-arm.c (insns): Add ldm and stm.
2322
cb4c78d6
BE
23232006-03-17 Ben Elliston <bje@au.ibm.com>
2324
2325 PR gas/2446
2326 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2327
c16d2bf0
PB
23282006-03-16 Paul Brook <paul@codesourcery.com>
2329
2330 * config/tc-arm.c (insns): Add "svc".
2331
80ca4e2c
BW
23322006-03-13 Bob Wilson <bob.wilson@acm.org>
2333
2334 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2335 flag and avoid double underscore prefixes.
2336
3a4a14e9
PB
23372006-03-10 Paul Brook <paul@codesourcery.com>
2338
2339 * config/tc-arm.c (md_begin): Handle EABIv5.
2340 (arm_eabis): Add EF_ARM_EABI_VER5.
2341 * doc/c-arm.texi: Document -meabi=5.
2342
518051dc
BE
23432006-03-10 Ben Elliston <bje@au.ibm.com>
2344
2345 * app.c (do_scrub_chars): Simplify string handling.
2346
00a97672
RS
23472006-03-07 Richard Sandiford <richard@codesourcery.com>
2348 Daniel Jacobowitz <dan@codesourcery.com>
2349 Zack Weinberg <zack@codesourcery.com>
2350 Nathan Sidwell <nathan@codesourcery.com>
2351 Paul Brook <paul@codesourcery.com>
2352 Ricardo Anguiano <anguiano@codesourcery.com>
2353 Phil Edwards <phil@codesourcery.com>
2354
2355 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2356 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2357 R_ARM_ABS12 reloc.
2358 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2359 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2360 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2361
b29757dc
BW
23622006-03-06 Bob Wilson <bob.wilson@acm.org>
2363
2364 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2365 even when using the text-section-literals option.
2366
0b2e31dc
NS
23672006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2368
2369 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2370 and cf.
2371 (m68k_ip): <case 'J'> Check we have some control regs.
2372 (md_parse_option): Allow raw arch switch.
2373 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2374 whether 68881 or cfloat was meant by -mfloat.
2375 (md_show_usage): Adjust extension display.
2376 (m68k_elf_final_processing): Adjust.
2377
df406460
NC
23782006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2379
2380 * config/tc-avr.c (avr_mod_hash_value): New function.
2381 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2382 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2383 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2384 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2385 of (int).
2386 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2387 fixups, abort otherwise.
df406460
NC
2388 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2389 tc_fix_adjustable): Define.
a70ae331 2390
53022e4a
JW
23912006-03-02 James E Wilson <wilson@specifix.com>
2392
2393 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2394 change the template, then clear md.slot[curr].end_of_insn_group.
2395
9f6f925e
JB
23962006-02-28 Jan Beulich <jbeulich@novell.com>
2397
2398 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2399
0e31b3e1
JB
24002006-02-28 Jan Beulich <jbeulich@novell.com>
2401
2402 PR/1070
2403 * macro.c (getstring): Don't treat parentheses special anymore.
2404 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2405 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2406 characters.
2407
10cd14b4
AM
24082006-02-28 Mat <mat@csail.mit.edu>
2409
2410 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2411
63752a75
JJ
24122006-02-27 Jakub Jelinek <jakub@redhat.com>
2413
2414 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2415 field.
2416 (CFI_signal_frame): Define.
2417 (cfi_pseudo_table): Add .cfi_signal_frame.
2418 (dot_cfi): Handle CFI_signal_frame.
2419 (output_cie): Handle cie->signal_frame.
2420 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2421 different. Copy signal_frame from FDE to newly created CIE.
2422 * doc/as.texinfo: Document .cfi_signal_frame.
2423
f7d9e5c3
CD
24242006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2425
2426 * doc/Makefile.am: Add html target.
2427 * doc/Makefile.in: Regenerate.
2428 * po/Make-in: Add html target.
2429
331d2d0d
L
24302006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2431
8502d882 2432 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2433 Instructions.
2434
8502d882 2435 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2436 (CpuUnknownFlags): Add CpuMNI.
2437
10156f83
DM
24382006-02-24 David S. Miller <davem@sunset.davemloft.net>
2439
2440 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2441 (hpriv_reg_table): New table for hyperprivileged registers.
2442 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2443 register encoding.
2444
6772dd07
DD
24452006-02-24 DJ Delorie <dj@redhat.com>
2446
2447 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2448 (tc_gen_reloc): Don't define.
2449 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2450 (OPTION_LINKRELAX): New.
2451 (md_longopts): Add it.
2452 (m32c_relax): New.
2453 (md_parse_options): Set it.
2454 (md_assemble): Emit relaxation relocs as needed.
2455 (md_convert_frag): Emit relaxation relocs as needed.
2456 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2457 (m32c_apply_fix): New.
2458 (tc_gen_reloc): New.
2459 (m32c_force_relocation): Force out jump relocs when relaxing.
2460 (m32c_fix_adjustable): Return false if relaxing.
2461
62b3e311
PB
24622006-02-24 Paul Brook <paul@codesourcery.com>
2463
2464 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2465 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2466 (struct asm_barrier_opt): Define.
2467 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2468 (parse_psr): Accept V7M psr names.
2469 (parse_barrier): New function.
2470 (enum operand_parse_code): Add OP_oBARRIER.
2471 (parse_operands): Implement OP_oBARRIER.
2472 (do_barrier): New function.
2473 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2474 (do_t_cpsi): Add V7M restrictions.
2475 (do_t_mrs, do_t_msr): Validate V7M variants.
2476 (md_assemble): Check for NULL variants.
2477 (v7m_psrs, barrier_opt_names): New tables.
2478 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2479 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2480 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2481 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2482 (struct cpu_arch_ver_table): Define.
2483 (cpu_arch_ver): New.
2484 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2485 Tag_CPU_arch_profile.
2486 * doc/c-arm.texi: Document new cpu and arch options.
2487
59cf82fe
L
24882006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2489
2490 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2491
19a7219f
L
24922006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2493
2494 * config/tc-ia64.c: Update copyright years.
2495
7f3dfb9c
L
24962006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2497
2498 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2499 SDM 2.2.
2500
f40d1643
PB
25012005-02-22 Paul Brook <paul@codesourcery.com>
2502
2503 * config/tc-arm.c (do_pld): Remove incorrect write to
2504 inst.instruction.
2505 (encode_thumb32_addr_mode): Use correct operand.
2506
216d22bc
PB
25072006-02-21 Paul Brook <paul@codesourcery.com>
2508
2509 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2510
d70c5fc7
NC
25112006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2512 Anil Paranjape <anilp1@kpitcummins.com>
2513 Shilin Shakti <shilins@kpitcummins.com>
2514
2515 * Makefile.am: Add xc16x related entry.
2516 * Makefile.in: Regenerate.
2517 * configure.in: Added xc16x related entry.
2518 * configure: Regenerate.
2519 * config/tc-xc16x.h: New file
2520 * config/tc-xc16x.c: New file
2521 * doc/c-xc16x.texi: New file for xc16x
2522 * doc/all.texi: Entry for xc16x
a70ae331 2523 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2524 * NEWS: Announce the support for the new target.
2525
aaa2ab3d
NH
25262006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2527
2528 * configure.tgt: set emulation for mips-*-netbsd*
2529
82de001f
JJ
25302006-02-14 Jakub Jelinek <jakub@redhat.com>
2531
2532 * config.in: Rebuilt.
2533
431ad2d0
BW
25342006-02-13 Bob Wilson <bob.wilson@acm.org>
2535
2536 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2537 from 1, not 0, in error messages.
2538 (md_assemble): Simplify special-case check for ENTRY instructions.
2539 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2540 operand in error message.
2541
94089a50
JM
25422006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2543
2544 * configure.tgt (arm-*-linux-gnueabi*): Change to
2545 arm-*-linux-*eabi*.
2546
52de4c06
NC
25472006-02-10 Nick Clifton <nickc@redhat.com>
2548
70e45ad9
NC
2549 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2550 32-bit value is propagated into the upper bits of a 64-bit long.
2551
52de4c06
NC
2552 * config/tc-arc.c (init_opcode_tables): Fix cast.
2553 (arc_extoper, md_operand): Likewise.
2554
21af2bbd
BW
25552006-02-09 David Heine <dlheine@tensilica.com>
2556
2557 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2558 each relaxation step.
2559
75a706fc 25602006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2561
75a706fc
L
2562 * configure.in (CHECK_DECLS): Add vsnprintf.
2563 * configure: Regenerate.
2564 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2565 include/declare here, but...
2566 * as.h: Move code detecting VARARGS idiom to the top.
2567 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2568 (vsnprintf): Declare if not already declared.
2569
0d474464
L
25702006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2571
2572 * as.c (close_output_file): New.
2573 (main): Register close_output_file with xatexit before
2574 dump_statistics. Don't call output_file_close.
2575
266abb8f
NS
25762006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2577
2578 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2579 mcf5329_control_regs): New.
2580 (not_current_architecture, selected_arch, selected_cpu): New.
2581 (m68k_archs, m68k_extensions): New.
2582 (archs): Renamed to ...
2583 (m68k_cpus): ... here. Adjust.
2584 (n_arches): Remove.
2585 (md_pseudo_table): Add arch and cpu directives.
2586 (find_cf_chip, m68k_ip): Adjust table scanning.
2587 (no_68851, no_68881): Remove.
2588 (md_assemble): Lazily initialize.
2589 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2590 (md_init_after_args): Move functionality to m68k_init_arch.
2591 (mri_chip): Adjust table scanning.
2592 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2593 options with saner parsing.
2594 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2595 m68k_init_arch): New.
2596 (s_m68k_cpu, s_m68k_arch): New.
2597 (md_show_usage): Adjust.
2598 (m68k_elf_final_processing): Set CF EF flags.
2599 * config/tc-m68k.h (m68k_init_after_args): Remove.
2600 (tc_init_after_args): Remove.
2601 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2602 (M68k-Directives): Document .arch and .cpu directives.
2603
134dcee5
AM
26042006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2605
a70ae331
AM
2606 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2607 synonyms for equ and defl.
134dcee5
AM
2608 (z80_cons_fix_new): New function.
2609 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2610 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2611 now handled as pseudo-op rather than an instruction.
2612 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2613 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2614 Add entries for def24,def32,d24,d32.
2615 (md_assemble): Improved error handling.
2616 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2617 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2618 (z80_cons_fix_new): Declare.
a70ae331 2619 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2620 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2621
a9931606
PB
26222006-02-02 Paul Brook <paul@codesourcery.com>
2623
2624 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2625
ef8d22e6
PB
26262005-02-02 Paul Brook <paul@codesourcery.com>
2627
2628 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2629 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2630 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2631 T2_OPCODE_RSB): Define.
2632 (thumb32_negate_data_op): New function.
2633 (md_apply_fix): Use it.
2634
e7da6241
BW
26352006-01-31 Bob Wilson <bob.wilson@acm.org>
2636
2637 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2638 fields.
2639 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2640 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2641 subtracted symbols.
2642 (relaxation_requirements): Add pfinish_frag argument and use it to
2643 replace setting tinsn->record_fix fields.
2644 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2645 and vinsn_to_insnbuf. Remove references to record_fix and
2646 slot_sub_symbols fields.
2647 (xtensa_mark_narrow_branches): Delete unused code.
2648 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2649 a symbol.
2650 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2651 record_fix fields.
2652 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2653 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2654 of the record_fix field. Simplify error messages for unexpected
2655 symbolic operands.
2656 (set_expr_symbol_offset_diff): Delete.
2657
79134647
PB
26582006-01-31 Paul Brook <paul@codesourcery.com>
2659
2660 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2661
e74cfd16
PB
26622006-01-31 Paul Brook <paul@codesourcery.com>
2663 Richard Earnshaw <rearnsha@arm.com>
2664
2665 * config/tc-arm.c: Use arm_feature_set.
2666 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2667 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2668 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2669 New variables.
2670 (insns): Use them.
2671 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2672 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2673 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2674 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2675 feature flags.
2676 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2677 (arm_opts): Move old cpu/arch options from here...
2678 (arm_legacy_opts): ... to here.
2679 (md_parse_option): Search arm_legacy_opts.
2680 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2681 (arm_float_abis, arm_eabis): Make const.
2682
d47d412e
BW
26832006-01-25 Bob Wilson <bob.wilson@acm.org>
2684
2685 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2686
b14273fe
JZ
26872006-01-21 Jie Zhang <jie.zhang@analog.com>
2688
2689 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2690 in load immediate intruction.
2691
39cd1c76
JZ
26922006-01-21 Jie Zhang <jie.zhang@analog.com>
2693
2694 * config/bfin-parse.y (value_match): Use correct conversion
2695 specifications in template string for __FILE__ and __LINE__.
2696 (binary): Ditto.
2697 (unary): Ditto.
2698
67a4f2b7
AO
26992006-01-18 Alexandre Oliva <aoliva@redhat.com>
2700
2701 Introduce TLS descriptors for i386 and x86_64.
2702 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2703 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2704 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2705 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2706 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2707 displacement bits.
2708 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2709 (lex_got): Handle @tlsdesc and @tlscall.
2710 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2711
8ad7c533
NC
27122006-01-11 Nick Clifton <nickc@redhat.com>
2713
2714 Fixes for building on 64-bit hosts:
2715 * config/tc-avr.c (mod_index): New union to allow conversion
2716 between pointers and integers.
2717 (md_begin, avr_ldi_expression): Use it.
2718 * config/tc-i370.c (md_assemble): Add cast for argument to print
2719 statement.
2720 * config/tc-tic54x.c (subsym_substitute): Likewise.
2721 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2722 opindex field of fr_cgen structure into a pointer so that it can
2723 be stored in a frag.
2724 * config/tc-mn10300.c (md_assemble): Likewise.
2725 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2726 types.
2727 * config/tc-v850.c: Replace uses of (int) casts with correct
2728 types.
2729
4dcb3903
L
27302006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2731
2732 PR gas/2117
2733 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2734
e0f6ea40
HPN
27352006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2736
2737 PR gas/2101
2738 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2739 a local-label reference.
2740
e88d958a 2741For older changes see ChangeLog-2005
08d56133
NC
2742\f
2743Local Variables:
2744mode: change-log
2745left-margin: 8
2746fill-column: 74
2747version-control: never
2748End:
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