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Kill cmd_async_ok.
[deliverable/binutils-gdb.git] / gas / ChangeLog
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81fd73ed
JZ		 12008-07-24 Jie Zhang <jie.zhang@analog.com>
2
3 * config/bfin-parse.y (asm_1): Error if plain symbol is used
4 as load/store offset.
5
570de991
NC		 62008-07-22 Chao-ying Fu <fu@mips.com>
7
8 * config/tc-mips.c (mips_ip): Reset s to argsStart.
9
b4f42c96
JZ		 102008-07-22 Jie Zhang <jie.zhang@analog.com>
11
12 * config/tc-bfin.c (bfin_gen_loop): Remove loop symbol.
13
cc189afc
DD		 142008-07-21 DJ Delorie <dj@redhat.com>
15
16 * config/tc-h8300.c (fix_operand_size): Use the default size
17 specified by the .lbranch/.sbranch pseudos.
18
c54b5932
DD		 192008-07-18 DJ Delorie <dj@redhat.com>
20
21 * config/tc-m32c.h (H_TICK_HEX): Define.
22 * config/tc-m32c.c (OPTION_H_TICK_HEX): Define.
23 (md_longopts): Add support for it.
24 (md_parse_option): Likewise.
25 * doc/as.texinfo (Overview): Add new m32c options.
26 * doc/c-m32c.texi (M32C-Modifiers): Likewise
27
28 * as.h: (enable_h_tick_hex): New.
29 * app.c (enable_h_tick_hex): New.
30 (LEX_IS_H): New.
31 (do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex.
32 (do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00
33 style hex constants and convert the input stream to 0x00 style.
34 (do_scrub_chars): If a 'X style character constant is found after
35 a symbol character (like you're or X'00), warn the user.
36
30c09090
RS		 372008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
38
39 * config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
40 (mips_fix_adjustable): Likewise.
41 (mips_frob_file_after_relocs): Likewise.
42
bfbba8e4
NS		 432008-07-08 Nathan Sidwell <nathan@codesourcery.com>
44
45 * config/tc-m68k.c (m68k_set_cpu, m68k_set_arch): Don't complain
46 about overriding an earlier setting.
47
b19e8a9b
AN		 482008-07-07 Adam Nemet <anemet@caviumnetworks.com>
49
50 * config/tc-mips.c (NO_ISA_COP): New macro.
51 (COP_INSN): New macro.
52 (is_opcode_valid): Use them.
53 (macro) <ld_st>: Use them. Don't accept coprocessor load store
54 insns based on the ISA if CPU is NO_ISA_COP.
55 <copz>: Likewise for coprocessor operations.
56
79947c54
CD		 572008-07-07 Paul Brook <paul@codesourcery.com>
58
59 * config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT
60 relocations.
61
9990da1d
NC		 622008-07-07 Ralf Corsépius <ralf.corsepius@rtems.org>
63
64 * configure.tgt: Add bfin-*-rtems*.
65
d62f07d0
AM		 662008-07-04 Alan Modra <amodra@bigpond.net.au>
67
68 * config/tc-spu.c (md_apply_fix): Handle fully resolved
69 BFD_RELOC_32_PCREL, BFD_RELOC_SPU_HI16 and BFD_RELOC_SPU_LO16.
70
c8187e15
PB		 712008-06-25 Peter Bergner <bergner@vnet.ibm.com>
72
73 * config/tc-ppc.c (parse_cpu): Handle -m464.
74 (md_show_usage): Likewise.
75
3bb06f78
EW		 762008-06-24 Eric B. Weddington <eric.weddington@atmel.com>
77
78 Add support for ATtiny13A.
79 * config/tc-avr.c (mcu_types): Add attiny13a.
80 * doc/c-avr.texi: Likewise.
81
6afe8e98
AM		 822008-06-24 Bob Wilson <bob.wilson@acm.org>
83 Alan Modra <amodra@bigpond.net.au>
84
85 * write.c (relax_segment <rs_org>): Include current stretch
86 value when calculating whether .org is backwards.
87
7a283e07
RW		 882008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
89
90 * configure: Regenerate.
91
0146fc9d
NC		 922008-06-17 Nick Clifton <nickc@redhat.com>
93
94 * app.c (do_scrub_chars): Do not UNGET an EOF value.
95
1afc8def
HPN		 962008-06-16 Hans-Peter Nilsson <hp@bitrange.com>
97
98 PR gas/6607
99 * config/tc-mmix.c (s_loc): Assume "negative" addresses belong to
100 text_section. Do the "stepping backwards" test for text_section
101 using unsigned operands.
102
fa452fa6
PB		 1032008-06-13 Peter Bergner <bergner@vnet.ibm.com>
104
105 * config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
106 (ppc_insert_operand): Likewise.
107 (ppc_machine): Likewise.
108 * config/tc-ppc.h: #include "opcode/ppc.h"
109 (struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
110 (ppc_cpu): Update extern decl.
111
bb35fb24
NC		 1122008-06-12 Adam Nemet <anemet@caviumnetworks.com>
113
114 * config/tc-mips.c (validate_mips_insn): Handle field descriptors
115 +x, +X, +p, +P, +s, +S.
116 (mips_ip): Likewise.
117
dd3cbb7e
NC		 118 * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
119 (mips_ip): Likewise.
120 (macro_build): Likewise.
121 (CPU_HAS_SEQ): New macro.
122 (macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
123
e8568f6c
EW		 1242008-06-09 Eric B. Weddington <eric.weddington@atmel.com>
125
126 * config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
127 * doc/c-avr.texi: Likewise.
128
83bd7402
NC		 1292008-06-04 Nick Clifton <nickc@redhat.com>
130
131 * app.c (do_scrub_chars): Do not UNGET an EOF value.
132
cb19c032
L		 1332008-06-03 H.J. Lu <hongjiu.lu@intel.com>
134
135 * config/tc-i386.c (set_sse_check): New.
136 (md_pseudo_table): Add "sse_check".
137
4ecab7d4
PB		 1382008-06-03 Paul Brook <paul@codesourcery.com>
139
140 * config/tc-arm.c (do_t_rbit): Populate both rm fields.
141
0a903bab
NC		 1422008-05-30 Nick Clifton <nickc@redhat.com>
143
144 PR 5523
145 * config/tc-avr.c (avr_ldi_expression): Do not warn about unknown
146 relocs here.
147
b15591bb
AN		 1482008-05-29 Maxim Kuvyrkov <maxim@codesourcery.com>
149
150 * config/tc-mips.c (mips_cpu_info_table): Move records for
151 ST Loongson-2E/2F processors to a better place.
152
95f283e8
L		 1532008-05-23 H.J. Lu <hongjiu.lu@intel.com>
154
155 PR gas/6518
156 * config/tc-i386.c (match_template): Report ambiguous operand
157 size, not invalid suffix when there is no match in Intel
158 syntax.
159
c462b453
PB		 1602008-05-22 Paul Brook <paul@codesourcery.com>
161
162 * config/tc-arm.c (parse_cond): Covert to lowercase before matching.
163
7fac0536
NC		 1642008-05-21 I-Jui Sung <ijsung@gmail.com>
165
166 * config/tc-arm.c (arm_cpus): Add Faraday ARMv4 and ARMv5TE
167 compatible cores: fa526, fa626, fa626te, fa726te.
168 * doc/c-arm.texi (ARM Opts): Add -mcpu={fa526, fa626, fa626te,
169 fa726te} options.
170
8944f3c2
AM		 1712008-05-14 Alan Modra <amodra@bigpond.net.au>
172
173 * Makefile.am: Run "make dep-am".
174 * Makefile.in: Regenerate.
175 * doc/Makefile.in: Regenerate.
176 * po/POTFILES.in: Regenerate.
177
35903be0
CM		 1782008-05-09 Catherine Moore <clm@codesourcery.com>
179
180 * config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
181 with non-MIPS16 relocs.
182
c41e87e3
CF		 1832008-05-09 Chao-ying Fu <fu@mips.com>
184
185 * config/tc-mips.c (md_begin): Use strncmp to compare TARGET_OS, in
186 case that some characters append at the end of the name.
187 (mips_ip): Likewise.
188 (s_change_sec): Likewise.
189 (md_section_align): Likewise.
190
51c8ebc1
BW		 1912008-05-07 Bob Wilson <bob.wilson@acm.org>
192
193 * config/tc-xtensa.c (xtensa_create_property_segments): Use
194 xtensa_make_property_section instead of xtensa_get_property_section.
195 (xtensa_create_xproperty_segments): Likewise.
196
f1f8f695
L		 1972008-05-02 H.J. Lu <hongjiu.lu@intel.com>
198
199 * NEWS: Mention XSAVE, EPT and MOVBE.
200
201 * config/tc-i386.c (cpu_arch): Add .movbe and .ept.
202 (md_show_usage): Add .movbe and .ept.
203
204 * doc/c-i386.texi: Add movbe and ept to -march=. Document
205 .movbe and .ept.
206
2b661f3d
DM		 2072008-04-29 David S. Miller <davem@davemloft.net>
208
209 * config/tc-sparc.c (v9a_asr_table): Fix order of softint entries.
210
037b32b9
AN		 2112008-04-28 Adam Nemet <anemet@caviumnetworks.com>
212
213 * config/tc-mips.c (file_mips_soft_float, file_mips_single_float):
214 New statics.
215 (OPTION_ELF_BASE): Make room for new option macros.
216 (OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
217 OPTION_DOUBLE_FLOAT): New option macros.
218 (md_longopts): Add msoft-float, mhard-float, msingle-float and
219 mdouble-float.
220 (md_parse_option): Handle OPTION_SINGLE_FLOAT,
221 OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
222 (md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
223 and -mdouble-float.
224 (struct mips_set_options): New fields soft_float and single_float.
225 (mips_opts): Initialized them. Add comment for each field
226 initializer.
227 (mips_after_parse_args): Set them based on file_mips_soft_float
228 and file_mips_single_float.
229 (s_mipsset): Add support for `.set softfloat', `.set hardfloat',
230 `.set singlefloat' and `.set doublefloat'.
231 (is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
232 Handle single-float and soft-float instructions here.
233 (macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
234 (is_opcode_valid_16): New function.
235 (mips16_ip): Use it instead of OPCODE_IS_MEMBER.
236 (macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
237 M_S_DOB>: Remove special-casing of r4650.
238 * doc/c-mips.texi (-march=): Add Octeon.
239 (MIPS Opts): Document -msoft-float and -mhard-float. Document
240 -msingle-float and -mdouble-float.
241 (MIPS floating-point): New section. Document `.set softfloat' and
242 `.set hardfloat'. Document `.set singlefloat' and `.set
243 doublefloat'.
244
f04d18b7
DM		 2452008-04-25 David S. Miller <davem@davemloft.net>
246
247 * config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
248 %asr aliases.
249
250 * doc/c-sparc.texi: Consistently refer to architecture 'versions',
251 rather than occaisionally 'levels'. Consistently refer to Sun's
252 UNIX variant as SunOS, every version of Solaris is also SunOS.
253 Document new 'softint_clear' and 'softint_set' aliases. Clarify
254 which architecture versions support '%dcr', '%cq', and '%gl'. Add
255 section on 32-bit/64-bit opcode translations.
256
fe4fa32c
MF		 2572008-04-23 Mike Frysinger <vapier@gentoo.org>
258
259 * Makefile.am (OBJ_FORMAT_CFILES): Add config/obj-fdpicelf.c.
260 (OBJ_FORMAT_HFILES): Add config/obj-fdpicelf.h.
261 (obj-fdpicelf.o): Define.
262 * Makefile.in: Regenerate.
263 * configure.tgt: Set bfd_gas to yes when fmt is fdpicelf.
264 (bfin-*-*): Delete.
265 (bfin-*-linux-uclibc): New; set fmt to fdpicelf and em to linux.
266 (bfin-*-uclinux*): New; set fmt to elf and em to linux.
267 * config/obj-fdpicelf.c: New.
268 * config/obj-fdpicelf.h: Likewise.
269 * config/tc-bfin.c (bfin_flags, bfin_pic_flag): Set default based on
270 the OBJ_FDPIC_ELF define.
271 (OPTION_NOPIC): Define.
272 (md_longopts): Add mnopic and mno-fdpic.
273 (md_parse_option): Handle OPTION_NOPIC.
274
6194aaab
L		 2752008-04-23 Paolo Bonzini <bonzini@gnu.org>
276
277 * aclocal.m4: Regenerate.
278 * configure: Regenerate.
279
1a6b486f
DM		 2802008-04-23 David S. Miller <davem@davemloft.net>
281
282 * config/tc-sparc.c (v9a_asr_table): Add missing
283 'stick' and 'stick_cmpr', and document ordering rules
284 of table.
285 (tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
286 BFD_RELOC_SPARC_PC10.
287 * doc/c-sparc.texi: New section on Sparc constants.
288 Add documentation for %stick and %stick_cmpr.
289
879d3736
NC		 2902008-04-22 David S. Miller <davem@davemloft.net>
291
292 * config/obj-elf.c (obj_elf_section_type): Add prototype
293 before obj_elf_section_word and add 'warn' arg.
294 (obj_elf_section_word): Add type pointer arg, and if no #SECTION
295 is matched, try checking for #SECTION_TYPE.
296 (obj_elf_section): Adjust for new args.
297 (obj_elf_type_name): New function.
298 (obj_elf_type): Call it, and accept STT_foo number strings
299 in .type statements as output by SunPRO compiler.
300
81f8a913
L		 3012008-04-22 H.J. Lu <hongjiu.lu@intel.com>
302
303 * config/tc-i386.c (md_assemble): Don't check SSE instructions
304 if noavx is 0.
305
c15295d5
DM		 3062008-04-18 David S. Miller <davem@davemloft.net>
307
308 * doc/c-sparc.texi: Add syntax section.
309
eff014d9
L		 3102008-04-18 H.J. Lu <hongjiu.lu@intel.com>
311
312 * config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
313 REG and NDS for instructions with immediate operand.
314
dae39acc
L		 3152008-04-18 H.J. Lu <hongjiu.lu@intel.com>
316
317 * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
318 FMA.
319
739f7f82
DM		 3202008-04-16 David S. Miller <davem@davemloft.net>
321
322 * config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics
323 and relocation generation.
324 (tc_gen_reloc): Likewise.
325
52b5ca5b
AS		 3262008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
327
328 * config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
329 relocations are properly aligned, and not negative.
330
a5f245b5
NC		 3312008-04-15 Khem Raj <kraj@mvista.com>
332
333 * doc/tc-arm.texi: Fix fnstart and fnend directive names.
334
19a6653c
AM		 3352008-04-14 Edmar Wienskoski <edmar@freescale.com>
336
337 * config/tc-ppc.c (parse_cpu): Handle "e500mc". Extend "e500" to
338 accept e500mc instructions.
339 (md_show_usage): Document -me500mc.
340
d5a35a55
NC		 3412008-04-11 Nick Clifton <nickc@redhat.com>
342
343 * listing.c (print_timestamp): Use localtime rather than
344 localtime_r since not all build environments provide the latter.
345
daf50ae7
L		 3462008-04-10 H.J. Lu <hongjiu.lu@intel.com>
347
348 * NEWS: Mention -msse-check=[none|error|warning].
349
350 * config/tc-i386.c (sse_check): New.
351 (OPTION_MSSE_CHECK): Likewise.
352 (md_assemble): Check SSE instructions if needed.
353 (md_longopts): Add -msse-check.
354 (md_parse_option): Handle OPTION_MSSE_CHECK.
355 (md_show_usage): Show -msse-check=[none|error|warning].
356
357 * doc/c-i386.texi: Document -msse-check=[none|error|warning].
358