2006-12-12 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
eca5433b
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12006-12-12 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.h (WordMem): Document it for 64 bit memory
4 reference.
5
37d037c1
DJ
62006-12-12 Daniel Jacobowitz <dan@codesourcery.com>
7
8 * doc/Makefile.am (as_TEXINFOS): Set.
9 (as.info as.dvi as.html): Delete rule.
10 * doc/Makefile.in: Regenerated.
11
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DJ
122006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
13
14 * configure.in: Define GENINSRC_NEVER.
15 * doc/Makefile.am (as.info): Remove srcdir prefix.
16 (MAINTAINERCLEANFILES): Add info file.
17 (DISTCLEANFILES): Pretend to add info file.
18 * po/Make-in (.po.gmo): Put gmo files in objdir.
19 * configure, Makefile.in, doc/Makefile.in: Regenerated.
20
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212006-12-09 H.J. Lu <hongjiu.lu@intel.com>
22
23 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
af26ccbe 24 for operand_types array.
ffb08c80 25
41d3b056
CG
262006-12-08 Christian Groessler <chris@groessler.org>
27
28 * config/tc-z8k.c (whatreg): Add comment describing function.
29 Return NULL if symbol name characters follow the register number.
30 (parse_reg): Use NULL instead of 0 for pointer values. Stop
31 processing if whatreg returned NULL.
32
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332006-12-07 Kazu Hirata <kazu@codesourcery.com>
34
35 * config/tc-m68k.c: Update uses of EF_M68K_*.
36
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372006-12-06 H.J. Lu <hjl@gnu.org>
38
39 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
40 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
41
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JJ
422006-12-02 Jakub Jelinek <jakub@redhat.com>
43
44 PR gas/3607
45 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
46
f0291e4c
PB
472006-12-01 Paul Brook <paul@codesourcery.com>
48
49 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
50 function symbols.
51
e1da3f5b
PB
522006-11-29 Paul Brook <paul@codesourcery.com>
53
54 * config/tc-arm.c (arm_is_eabi): New function.
55 * config/tc-arm.h (arm_is_eabi): New prototype.
56 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
57 * doc/c-arm.texi (.thumb_func): Update documentation.
58
00249aaa
PB
592006-11-29 Paul Brook <paul@codesourcery.com>
60
61 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
62 encoding.
63
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BW
642006-11-27 Sterling Augustine <sterling@tensilica.com>
65
66 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
67 as the first slot_subtype, not the frag subtype.
68
2caa7ca0
BW
692006-11-27 Bob Wilson <bob.wilson@acm.org>
70
71 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
72 (directive_state): Disable scheduling by default.
73 (xtensa_add_config_info): New.
74 (xtensa_end): Call xtensa_add_config_info.
75
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762006-11-27 Eric Botcazou <ebotcazou@adacore.com>
77
78 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
79 their unaligned counterparts in debugging sections.
80
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AM
812006-11-24 Alan Modra <amodra@bigpond.net.au>
82
83 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
84
e821645d
DJ
852006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
86
87 * config/tc-arm.h (md_cons_align): Define.
88 (mapping_state): New prototype.
89 * config/tc-arm.c (mapping_state): Make global.
90
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912006-11-22 Alan Modra <amodra@bigpond.net.au>
92
93 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
94
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952006-11-16 Mei ligang <ligang@sunnorth.com.cn>
96
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97 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
98 branch instruction, handle it specially.
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99 (score_insns): Modify 32 bit branch instruction.
100
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1012006-11-16 Alan Modra <amodra@bigpond.net.au>
102
103 * symbols.c (resolve_symbol_value): Formatting.
104
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1052006-11-15 Jan Beulich <jbeulich@novell.com>
106
107 PR/3469
108 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
109 chain by linking it to itself.
110 (resolve_symbol_value): Also check symbol_shadow_p().
111 (symbol_shadow_p): New.
112 * symbols.h (symbol_shadow_p): Declare.
113
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1142006-11-12 Mark Shinwell <shinwell@codesourcery.com>
115
116 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
117 (insns): Adjust accordingly.
118 (md_apply_fix): Alter comments to use CBZ instead of CZB.
119
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1202006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
121
122 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
123 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
124
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1252006-11-10 Nick Clifton <nickc@redhat.com>
126
127 PR gas/3456:
128 * config/obj-elf.c (obj_elf_version): Do not include the name
129 field's padding in the namesz value.
130
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1312006-11-09 Thiemo Seufer <ths@mips.com>
132
133 * config/tc-mips.c: Fix outdated comment.
134
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1352006-11-08 H.J. Lu <hongjiu.lu@intel.com>
136
137 * config/tc-i386.h (CpuPNI): Removed.
138 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
139 * config/tc-i386.c (md_assemble): Likewise.
140
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1412006-11-08 Alan Modra <amodra@bigpond.net.au>
142
143 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
144
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1452006-11-06 David Daney <ddaney@avtrex.com>
146
147 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
148
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TS
1492006-11-06 Thiemo Seufer <ths@mips.com>
150
151 * doc/c-mips.texi (-march): Document sb1a.
152
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TS
1532006-11-06 Thiemo Seufer <ths@mips.com>
154
155 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
156 34k always has DSP ASE.
157
64817874
TS
1582006-11-03 Thiemo Seufer <ths@mips.com>
159
160 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
161 MIPS16 instructions referencing other sections, unless they are
162 external branches.
163
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1642006-11-03 Thiemo Seufer <ths@mips.com>
165
166 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
167 release 1 CPU.
168
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1692006-11-03 Jakub Jelinek <jakub@redhat.com>
170
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171 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
172 personality and lsda.
173 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
174 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
175 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
176 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
177 (output_cie): Output personality including its encoding and LSDA encoding.
178 (output_fde): Output LSDA.
179 (select_cie_for_fde): Don't share CIE if personality, its encoding or
180 LSDA encoding are different. Copy the 3 fields from fde_entry to
181 cie_entry.
182 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
183
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184 * subsegs.h (struct frchain): Add frch_cfi_data field.
185 * dw2gencfi.c: Include subsegs.h.
186 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
187 (struct frch_cfi_data): New type.
188 (unused_cfi_data): New variable.
189 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
190 and cfa_save_stack static vars into a structure pointed from
191 each frchain.
192 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
193 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
194 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
195 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
196 Likewise.
197
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1982006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
199
200 * config/tc-h8300.c (build_bytes): Fix const warning.
201
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2022006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
203
204 * tc-score.c (do16_rdrs): Handle not! instruction especially.
205
3ba67470
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2062006-10-31 Paul Brook <paul@codesourcery.com>
207
208 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
209 for EABIv4.
210
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PB
2112006-10-31 Paul Brook <paul@codesourcery.com>
212
213 gas/
214 * config/tc-arm.c (object_arch): New variable.
215 (s_arm_object_arch): New function.
216 (md_pseudo_table): Add object_arch.
217 (aeabi_set_public_attributes): Obey object_arch.
218 * doc/c-arm.texi: Document .object_arch.
219
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2202006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
221
222 * tc-score.c (data_op2): Check invalid operands.
223 (my_get_expression): Const operand of some instructions can not be
224 symbol in assembly.
225 (get_insn_class_from_type): Handle instruction type Insn_internal.
226 (do_macro_ldst_label): Modify inst.type.
227 (Insn_PIC): Delete.
228 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 229
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2302006-10-29 Randolph Chung <tausq@debian.org>
231
232 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
233 (hppa_regname_to_dw2regnum): New funcions.
234 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
235 (tc_cfi_frame_initial_instructions)
236 (tc_regname_to_dw2regnum): Define.
237 (hppa_cfi_frame_initial_instructions)
238 (hppa_regname_to_dw2regnum): Declare.
239 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
240 (DWARF2_CIE_DATA_ALIGNMENT): Define.
241
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2422006-10-29 Nick Clifton <nickc@redhat.com>
243
244 * config/tc-spu.c (md_assemble): Cast printf string size parameter
245 to int in order to avoid a compiler warning.
246
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2472006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
248
249 * config/tc-sh.c (md_assemble): Define size of branches.
250
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2512006-10-26 Ben Elliston <bje@au.ibm.com>
252
253 * dw2gencfi.c (cfi_add_CFA_offset):
254 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
255
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BE
256 * write.c (chain_frchains_together_1): Assert that this function
257 never returns a pointer to the auto variable `dummy'.
258
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AM
2592006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
260 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
261 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
262 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
263 Alan Modra <amodra@bigpond.net.au>
264
265 * config/tc-spu.c: New file.
266 * config/tc-spu.h: New file.
267 * configure.tgt: Add SPU support.
268 * Makefile.am: Likewise. Run "make dep-am".
269 * Makefile.in: Regenerate.
270 * po/POTFILES.in: Regenerate.
271
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BE
2722006-10-25 Ben Elliston <bje@au.ibm.com>
273
274 * expr.c (expr): Replace O_add case in switch (op_left) explaining
275 why it can never occur.
5ab504f9 276
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AM
2772006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
278
279 * doc/c-ppc.texi (-mcell): Document.
280 * config/tc-ppc.c (parse_cpu): Parse -mcell.
281 (md_show_usage): Document -mcell.
282
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MM
2832006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
284
285 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
286
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2872006-10-23 Alan Modra <amodra@bigpond.net.au>
288
289 * config/tc-m68hc11.c (md_assemble): Quiet warning.
290
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MF
2912006-10-19 Mike Frysinger <vapier@gentoo.org>
292
293 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
294 (x86_64_section_letter): Likewise.
295
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NC
2962006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
297
298 * config/tc-score.c (build_relax_frag): Compute correct
299 tc_frag_data.fixp.
300
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MF
3012006-10-18 Roy Marples <uberlord@gentoo.org>
302
303 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
304 elf32-sparc as a viable target for the -32 switch and any target
305 starting with elf64-sparc as a viable target for the -64 switch.
306 (sparc_target_format): For 64-bit ELF flavoured output use
307 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
308 ELF_TARGET_FORMAT.
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MF
309 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
310
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3112006-10-17 H.J. Lu <hongjiu.lu@intel.com>
312
313 * configure: Regenerated.
314
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3152006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
316
317 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
318 in addition to testing for '\n'.
319 (TC_EOL_IN_INSN): Provide a default definition if necessary.
320
eb1fe072
NC
3212006-10-13 Sterling Augstine <sterling@tensilica.com>
322
323 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
324 a disjoint DW_AT range.
325
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3262006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
327
328 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
329
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PB
3302006-10-08 Paul Brook <paul@codesourcery.com>
331
332 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
333 (parse_operands): Use parse_big_immediate for OP_NILO.
334 (neon_cmode_for_logic_imm): Try smaller element sizes.
335 (neon_cmode_for_move_imm): Ditto.
336 (do_neon_logic): Handle .i64 pseudo-op.
337
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AM
3382006-09-29 Alan Modra <amodra@bigpond.net.au>
339
340 * po/POTFILES.in: Regenerate.
341
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3422006-09-28 H.J. Lu <hongjiu.lu@intel.com>
343
344 * config/tc-i386.h (CpuMNI): Renamed to ...
345 (CpuSSSE3): This.
346 (CpuUnknownFlags): Updated.
347 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
348 and PROCESSOR_MEROM with PROCESSOR_CORE2.
349 * config/tc-i386.c: Updated.
350 * doc/c-i386.texi: Likewise.
a70ae331 351
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352 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
353
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NC
3542006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
355
356 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
357
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NC
3582006-09-27 Nick Clifton <nickc@redhat.com>
359
360 * output-file.c (output_file_close): Prevent an infinite loop
361 reporting that stdoutput could not be closed.
362
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JM
3632006-09-26 Mark Shinwell <shinwell@codesourcery.com>
364 Joseph Myers <joseph@codesourcery.com>
365 Ian Lance Taylor <ian@wasabisystems.com>
366 Ben Elliston <bje@wasabisystems.com>
367
368 * config/tc-arm.c (arm_cext_iwmmxt2): New.
369 (enum operand_parse_code): New code OP_RIWR_I32z.
370 (parse_operands): Handle OP_RIWR_I32z.
371 (do_iwmmxt_wmerge): New function.
372 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
373 a register.
374 (do_iwmmxt_wrwrwr_or_imm5): New function.
375 (insns): Mark instructions as RIWR_I32z as appropriate.
376 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
377 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
378 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
379 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
380 (md_begin): Handle IWMMXT2.
381 (arm_cpus): Add iwmmxt2.
382 (arm_extensions): Likewise.
383 (arm_archs): Likewise.
384
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BW
3852006-09-25 Bob Wilson <bob.wilson@acm.org>
386
387 * doc/as.texinfo (Overview): Revise description of --keep-locals.
388 Add xref to "Symbol Names".
389 (L): Refer to "local symbols" instead of "local labels". Move
390 definition to "Symbol Names" section; add xref to that section.
391 (Symbol Names): Use "Local Symbol Names" section to define local
392 symbols. Add "Local Labels" heading for description of temporary
393 forward/backward labels, and refer to those as "local labels".
394
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3952006-09-23 H.J. Lu <hongjiu.lu@intel.com>
396
397 PR binutils/3235
398 * config/tc-i386.c (match_template): Check address size prefix
399 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
400 operand.
401
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AM
4022006-09-22 Alan Modra <amodra@bigpond.net.au>
403
404 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
405
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AM
4062006-09-22 Alan Modra <amodra@bigpond.net.au>
407
408 * as.h (as_perror): Delete declaration.
409 * gdbinit.in (as_perror): Delete breakpoint.
410 * messages.c (as_perror): Delete function.
411 * doc/internals.texi: Remove as_perror description.
412 * listing.c (listing_print: Don't use as_perror.
413 * output-file.c (output_file_create, output_file_close): Likewise.
414 * symbols.c (symbol_create, symbol_clone): Likewise.
415 * write.c (write_contents): Likewise.
416 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
417 * config/tc-tic54x.c (tic54x_mlib): Likewise.
418
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4192006-09-22 Alan Modra <amodra@bigpond.net.au>
420
421 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
422 (ppc_handle_align): New function.
423 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
424 (SUB_SEGMENT_ALIGN): Define as zero.
425
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BW
4262006-09-20 Bob Wilson <bob.wilson@acm.org>
427
428 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
429 (Overview): Skip cross reference in man page.
430
99ad8390
NC
4312006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
432
433 * configure.in: Add new target x86_64-pc-mingw64.
434 * configure: Regenerate.
435 * configure.tgt: Add new target x86_64-pc-mingw64.
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AM
436 * config/obj-coff.h: Add handling for TE_PEP target specific code
437 and definitions.
99ad8390
NC
438 * config/tc-i386.c: Add new targets.
439 (md_parse_option): Add targets to OPTION_64.
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AM
440 (x86_64_target_format): Add new method for setup proper default
441 target cpu mode.
99ad8390
NC
442 * config/te-pep.h: Add new target definition header.
443 (TE_PEP): New macro: Identifies new target architecture.
444 (COFF_WITH_pex64): Set proper includes in bfd.
445 * NEWS: Mention new target.
446
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BS
4472006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
448
449 * config/bfin-parse.y (binary): Change sub of const to add of negated
450 const.
451
1c0d3aa6
NC
4522006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
453
454 * config/tc-score.c: New file.
455 * config/tc-score.h: Newf file.
456 * configure.tgt: Add Score target.
457 * Makefile.am: Add Score files.
458 * Makefile.in: Regenerate.
459 * NEWS: Mention new target support.
460
4fa3602b
PB
4612006-09-16 Paul Brook <paul@codesourcery.com>
462
463 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
464 * doc/c-arm.texi (movsp): Document offset argument.
465
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PB
4662006-09-16 Paul Brook <paul@codesourcery.com>
467
468 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
469 unsigned int to avoid 64-bit host problems.
470
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4712006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
472
473 * config/bfin-parse.y (binary): Do some more constant folding for
474 additions.
475
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JB
4762006-09-13 Jan Beulich <jbeulich@novell.com>
477
478 * input-file.c (input_file_give_next_buffer): Demote as_bad to
479 as_warn.
480
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4812006-09-13 Alan Modra <amodra@bigpond.net.au>
482
483 PR gas/3165
484 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
485 in parens.
486
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AM
4872006-09-13 Alan Modra <amodra@bigpond.net.au>
488
489 * input-file.c (input_file_open): Replace as_perror with as_bad
490 so that gas exits with error on file errors. Correct error
491 message.
492 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 493 * input-file.h: Update comment.
f79d9c1d 494
f512f76f
NC
4952006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
496
497 PR gas/3172
498 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
499 registers as a sub-class of wC registers.
500
8d79fd44
AM
5012006-09-11 Alan Modra <amodra@bigpond.net.au>
502
503 PR gas/3165
504 * config/tc-mips.h (enum dwarf2_format): Forward declare.
505 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
506 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
507 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
508
6258339f
NC
5092006-09-08 Nick Clifton <nickc@redhat.com>
510
511 PR gas/3129
512 * doc/as.texinfo (Macro): Improve documentation about separating
513 macro arguments from following text.
514
f91e006c
PB
5152006-09-08 Paul Brook <paul@codesourcery.com>
516
517 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
518
466bbf93
PB
5192006-09-07 Paul Brook <paul@codesourcery.com>
520
521 * config/tc-arm.c (parse_operands): Mark operand as present.
522
428e3f1f
PB
5232006-09-04 Paul Brook <paul@codesourcery.com>
524
525 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
526 (do_neon_dyadic_if_i_d): Avoid setting U bit.
527 (do_neon_mac_maybe_scalar): Ditto.
528 (do_neon_dyadic_narrow): Force operand type to NT_integer.
529 (insns): Remove out of date comments.
530
fb25138b
NC
5312006-08-29 Nick Clifton <nickc@redhat.com>
532
533 * read.c (s_align): Initialize the 'stopc' variable to prevent
534 compiler complaints about it being used without being
535 initialized.
536 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
537 s_float_space, s_struct, cons_worker, equals): Likewise.
538
5091343a
AM
5392006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
540
541 * ecoff.c (ecoff_directive_val): Fix message typo.
542 * config/tc-ns32k.c (convert_iif): Likewise.
543 * config/tc-sh64.c (shmedia_check_limits): Likewise.
544
1f2a7e38
BW
5452006-08-25 Sterling Augustine <sterling@tensilica.com>
546 Bob Wilson <bob.wilson@acm.org>
547
548 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
549 the state of the absolute_literals directive. Remove align frag at
550 the start of the literal pool position.
551
34135039
BW
5522006-08-25 Bob Wilson <bob.wilson@acm.org>
553
554 * doc/c-xtensa.texi: Add @group commands in examples.
555
74869ac7
BW
5562006-08-24 Bob Wilson <bob.wilson@acm.org>
557
558 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
559 (INIT_LITERAL_SECTION_NAME): Delete.
560 (lit_state struct): Remove segment names, init_lit_seg, and
561 fini_lit_seg. Add lit_prefix and current_text_seg.
562 (init_literal_head_h, init_literal_head): Delete.
563 (fini_literal_head_h, fini_literal_head): Delete.
564 (xtensa_begin_directive): Move argument parsing to
565 xtensa_literal_prefix function.
566 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
567 (xtensa_literal_prefix): Parse the directive argument here and
568 record it in the lit_prefix field. Remove code to derive literal
569 section names.
570 (linkonce_len): New.
571 (get_is_linkonce_section): Use linkonce_len. Check for any
572 ".gnu.linkonce.*" section, not just text sections.
573 (md_begin): Remove initialization of deleted lit_state fields.
574 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
575 to init_literal_head and fini_literal_head.
576 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
577 when traversing literal_head list.
578 (match_section_group): New.
579 (cache_literal_section): Rewrite to determine the literal section
580 name on the fly, create the section and return it.
581 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
582 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
583 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
584 Use xtensa_get_property_section from bfd.
585 (retrieve_xtensa_section): Delete.
586 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
587 description to refer to plural literal sections and add xref to
588 the Literal Directive section.
589 (Literal Directive): Describe new rules for deriving literal section
590 names. Add footnote for special case of .init/.fini with
591 --text-section-literals.
592 (Literal Prefix Directive): Replace old naming rules with xref to the
593 Literal Directive section.
594
87a1fd79
JM
5952006-08-21 Joseph Myers <joseph@codesourcery.com>
596
597 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
598 merging with previous long opcode.
599
7148cc28
NC
6002006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
601
602 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
603 * Makefile.in: Regenerate.
604 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
605 renamed. Adjust.
606
3e9e4fcf
JB
6072006-08-16 Julian Brown <julian@codesourcery.com>
608
609 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
610 to use ARM instructions on non-ARM-supporting cores.
611 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
612 mode automatically based on cpu variant.
613 (md_begin): Call above function.
614
267d2029
JB
6152006-08-16 Julian Brown <julian@codesourcery.com>
616
617 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
618 recognized in non-unified syntax mode.
619
4be041b2
TS
6202006-08-15 Thiemo Seufer <ths@mips.com>
621 Nigel Stephens <nigel@mips.com>
622 David Ung <davidu@mips.com>
623
624 * configure.tgt: Handle mips*-sde-elf*.
625
3a93f742
TS
6262006-08-12 Thiemo Seufer <ths@networkno.de>
627
628 * config/tc-mips.c (mips16_ip): Fix argument register handling
629 for restore instruction.
630
1737851b
BW
6312006-08-08 Bob Wilson <bob.wilson@acm.org>
632
633 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
634 (out_sleb128): New.
635 (out_fixed_inc_line_addr): New.
636 (process_entries): Use out_fixed_inc_line_addr when
637 DWARF2_USE_FIXED_ADVANCE_PC is set.
638 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
639
e14e52f8
DD
6402006-08-08 DJ Delorie <dj@redhat.com>
641
642 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
643 vs full symbols so that we never have more than one pointer value
644 for any given symbol in our symbol table.
645
802f5d9e
NC
6462006-08-08 Sterling Augustine <sterling@tensilica.com>
647
648 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
649 and emit DW_AT_ranges when code in compilation unit is not
650 contiguous.
651 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
652 is not contiguous.
653 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
654 (out_debug_ranges): New function to emit .debug_ranges section
655 when code is not contiguous.
656
720abc60
NC
6572006-08-08 Nick Clifton <nickc@redhat.com>
658
659 * config/tc-arm.c (WARN_DEPRECATED): Enable.
660
f0927246
NC
6612006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
662
663 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
664 only block.
665 (pe_directive_secrel) [TE_PE]: New function.
666 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
667 loc, loc_mark_labels.
668 [TE_PE]: Handle secrel32.
669 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
670 call.
671 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
672 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
673 (md_section_align): Only round section sizes here for AOUT
674 targets.
675 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
676 (tc_pe_dwarf2_emit_offset): New function.
677 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
678 (cons_fix_new_arm): Handle O_secrel.
679 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
680 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
681 of OBJ_ELF only block.
682 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
683 tc_pe_dwarf2_emit_offset.
684
55e6e397
RS
6852006-08-04 Richard Sandiford <richard@codesourcery.com>
686
687 * config/tc-sh.c (apply_full_field_fix): New function.
688 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
689 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
690 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
691 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
692
9cd19b17
NC
6932006-08-03 Nick Clifton <nickc@redhat.com>
694
695 PR gas/2991
696 * config.in: Regenerate.
697
97f87066
JM
6982006-08-03 Joseph Myers <joseph@codesourcery.com>
699
700 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 701 for OP_RIWR_RIWC.
97f87066 702
41adaa5c
JM
7032006-08-03 Joseph Myers <joseph@codesourcery.com>
704
705 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
706 (parse_operands): Handle it.
707 (insns): Use it for tmcr and tmrc.
708
9d7cbccd
NC
7092006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
710
711 PR binutils/2983
712 * config/tc-i386.c (md_parse_option): Treat any target starting
713 with elf64_x86_64 as a viable target for the -64 switch.
714 (i386_target_format): For 64-bit ELF flavoured output use
715 ELF_TARGET_FORMAT64.
716 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
717
c973bc5c
NC
7182006-08-02 Nick Clifton <nickc@redhat.com>
719
720 PR gas/2991
721 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
722 bfd/aclocal.m4.
723 * configure.in: Run BFD_BINARY_FOPEN.
724 * configure: Regenerate.
725 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
726 file to include.
727
cfde7f70
L
7282006-08-01 H.J. Lu <hongjiu.lu@intel.com>
729
730 * config/tc-i386.c (md_assemble): Don't update
731 cpu_arch_isa_flags.
732
b4c71f56
TS
7332006-08-01 Thiemo Seufer <ths@mips.com>
734
735 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
736
54f4ddb3
TS
7372006-08-01 Thiemo Seufer <ths@mips.com>
738
739 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
740 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
741 BFD_RELOC_32 and BFD_RELOC_16.
742 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
743 md_convert_frag, md_obj_end): Fix comment formatting.
744
d103cf61
TS
7452006-07-31 Thiemo Seufer <ths@mips.com>
746
747 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
748 handling for BFD_RELOC_MIPS16_JMP.
749
601e61cd
NC
7502006-07-24 Andreas Schwab <schwab@suse.de>
751
752 PR/2756
753 * read.c (read_a_source_file): Ignore unknown text after line
754 comment character. Fix misleading comment.
755
b45619c0
NC
7562006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
757
758 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
759 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
760 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
761 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
762 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
763 doc/c-z80.texi, doc/internals.texi: Fix some typos.
764
784906c5
NC
7652006-07-21 Nick Clifton <nickc@redhat.com>
766
767 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
768 linker testsuite.
769
d5f010e9
TS
7702006-07-20 Thiemo Seufer <ths@mips.com>
771 Nigel Stephens <nigel@mips.com>
772
773 * config/tc-mips.c (md_parse_option): Don't infer optimisation
774 options from debug options.
775
35d3d567
TS
7762006-07-20 Thiemo Seufer <ths@mips.com>
777
778 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
779 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
780
401a54cf
PB
7812006-07-19 Paul Brook <paul@codesourcery.com>
782
783 * config/tc-arm.c (insns): Fix rbit Arm opcode.
784
16805f35
PB
7852006-07-18 Paul Brook <paul@codesourcery.com>
786
787 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
788 (md_convert_frag): Use correct reloc for add_pc. Use
789 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
790 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
791 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
792
d9e05e4e
AM
7932006-07-17 Mat Hostetter <mat@lcs.mit.edu>
794
795 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
796 when file and line unknown.
797
f43abd2b
TS
7982006-07-17 Thiemo Seufer <ths@mips.com>
799
800 * read.c (s_struct): Use IS_ELF.
801 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
802 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
803 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
804 s_mips_mask): Likewise.
805
a2902af6
TS
8062006-07-16 Thiemo Seufer <ths@mips.com>
807 David Ung <davidu@mips.com>
808
809 * read.c (s_struct): Handle ELF section changing.
810 * config/tc-mips.c (s_align): Leave enabling auto-align to the
811 generic code.
812 (s_change_sec): Try section changing only if we output ELF.
813
d32cad65
L
8142006-07-15 H.J. Lu <hongjiu.lu@intel.com>
815
816 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
817 CpuAmdFam10.
818 (smallest_imm_type): Remove Cpu086.
819 (i386_target_format): Likewise.
820
821 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
822 Update CpuXXX.
823
050dfa73
MM
8242006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
825 Michael Meissner <michael.meissner@amd.com>
826
827 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
828 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
829 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
830 architecture.
831 (i386_align_code): Ditto.
832 (md_assemble_code): Add support for insertq/extrq instructions,
833 swapping as needed for intel syntax.
834 (swap_imm_operands): New function to swap immediate operands.
835 (swap_operands): Deal with 4 operand instructions.
836 (build_modrm_byte): Add support for insertq instruction.
837
6b2de085
L
8382006-07-13 H.J. Lu <hongjiu.lu@intel.com>
839
840 * config/tc-i386.h (Size64): Fix a typo in comment.
841
01eaea5a
NC
8422006-07-12 Nick Clifton <nickc@redhat.com>
843
844 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 845 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
846 already been checked here.
847
1e85aad8
JW
8482006-07-07 James E Wilson <wilson@specifix.com>
849
850 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
851
1370e33d
NC
8522006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
853 Nick Clifton <nickc@redhat.com>
854
855 PR binutils/2877
856 * doc/as.texi: Fix spelling typo: branchs => branches.
857 * doc/c-m68hc11.texi: Likewise.
858 * config/tc-m68hc11.c: Likewise.
859 Support old spelling of command line switch for backwards
860 compatibility.
861
5f0fe04b
TS
8622006-07-04 Thiemo Seufer <ths@mips.com>
863 David Ung <davidu@mips.com>
864
865 * config/tc-mips.c (s_is_linkonce): New function.
866 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
867 weak, external, and linkonce symbols.
868 (pic_need_relax): Use s_is_linkonce.
869
85234291
L
8702006-06-24 H.J. Lu <hongjiu.lu@intel.com>
871
872 * doc/as.texinfo (Org): Remove space.
873 (P2align): Add "@var{abs-expr},".
874
ccc9c027
L
8752006-06-23 H.J. Lu <hongjiu.lu@intel.com>
876
877 * config/tc-i386.c (cpu_arch_tune_set): New.
878 (cpu_arch_isa): Likewise.
879 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
880 nops with short or long nop sequences based on -march=/.arch
881 and -mtune=.
882 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
883 set cpu_arch_tune and cpu_arch_tune_flags.
884 (md_parse_option): For -march=, set cpu_arch_isa and set
885 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
886 0. Set cpu_arch_tune_set to 1 for -mtune=.
887 (i386_target_format): Don't set cpu_arch_tune.
888
d4dc2f22
TS
8892006-06-23 Nigel Stephens <nigel@mips.com>
890
891 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
892 generated .sbss.* and .gnu.linkonce.sb.*.
893
a8dbcb85
TS
8942006-06-23 Thiemo Seufer <ths@mips.com>
895 David Ung <davidu@mips.com>
896
897 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
898 label_list.
899 * config/tc-mips.c (label_list): Define per-segment label_list.
900 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
901 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
902 mips_from_file_after_relocs, mips_define_label): Use per-segment
903 label_list.
904
3994f87e
TS
9052006-06-22 Thiemo Seufer <ths@mips.com>
906
907 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
908 (append_insn): Use it.
909 (md_apply_fix): Whitespace formatting.
910 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
911 mips16_extended_frag): Remove register specifier.
912 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
913 constants.
914
fa073d69
MS
9152006-06-21 Mark Shinwell <shinwell@codesourcery.com>
916
917 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
918 a directive saving VFP registers for ARMv6 or later.
919 (s_arm_unwind_save): Add parameter arch_v6 and call
920 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
921 appropriate.
922 (md_pseudo_table): Add entry for new "vsave" directive.
923 * doc/c-arm.texi: Correct error in example for "save"
924 directive (fstmdf -> fstmdx). Also document "vsave" directive.
925
8e77b565 9262006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
927 Anatoly Sokolov <aesok@post.ru>
928
a70ae331
AM
929 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
930 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
931 atmega164p/atmega324p.
932 * doc/c-avr.texi: Document new mcu and arch options.
933
8b1ad454
NC
9342006-06-17 Nick Clifton <nickc@redhat.com>
935
936 * config/tc-arm.c (enum parse_operand_result): Move outside of
937 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
938
9103f4f4
L
9392006-06-16 H.J. Lu <hongjiu.lu@intel.com>
940
941 * config/tc-i386.h (processor_type): New.
942 (arch_entry): Add type.
943
944 * config/tc-i386.c (cpu_arch_tune): New.
945 (cpu_arch_tune_flags): Likewise.
946 (cpu_arch_isa_flags): Likewise.
947 (cpu_arch): Updated.
948 (set_cpu_arch): Also update cpu_arch_isa_flags.
949 (md_assemble): Update cpu_arch_isa_flags.
950 (OPTION_MARCH): New.
951 (OPTION_MTUNE): Likewise.
952 (md_longopts): Add -march= and -mtune=.
953 (md_parse_option): Support -march= and -mtune=.
954 (md_show_usage): Add -march=CPU/-mtune=CPU.
955 (i386_target_format): Also update cpu_arch_isa_flags,
956 cpu_arch_tune and cpu_arch_tune_flags.
957
958 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
959
960 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
961
4962c51a
MS
9622006-06-15 Mark Shinwell <shinwell@codesourcery.com>
963
964 * config/tc-arm.c (enum parse_operand_result): New.
965 (struct group_reloc_table_entry): New.
966 (enum group_reloc_type): New.
967 (group_reloc_table): New array.
968 (find_group_reloc_table_entry): New function.
969 (parse_shifter_operand_group_reloc): New function.
970 (parse_address_main): New function, incorporating code
971 from the old parse_address function. To be used via...
972 (parse_address): wrapper for parse_address_main; and
973 (parse_address_group_reloc): new function, likewise.
974 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
975 OP_ADDRGLDRS, OP_ADDRGLDC.
976 (parse_operands): Support for these new operand codes.
977 New macro po_misc_or_fail_no_backtrack.
978 (encode_arm_cp_address): Preserve group relocations.
979 (insns): Modify to use the above operand codes where group
980 relocations are permitted.
981 (md_apply_fix): Handle the group relocations
982 ALU_PC_G0_NC through LDC_SB_G2.
983 (tc_gen_reloc): Likewise.
984 (arm_force_relocation): Leave group relocations for the linker.
985 (arm_fix_adjustable): Likewise.
986
cd2f129f
JB
9872006-06-15 Julian Brown <julian@codesourcery.com>
988
989 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
990 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
991 relocs properly.
992
46e883c5
L
9932006-06-12 H.J. Lu <hongjiu.lu@intel.com>
994
995 * config/tc-i386.c (process_suffix): Don't add rex64 for
996 "xchg %rax,%rax".
997
1787fe5b
TS
9982006-06-09 Thiemo Seufer <ths@mips.com>
999
1000 * config/tc-mips.c (mips_ip): Maintain argument count.
1001
96f989c2
AM
10022006-06-09 Alan Modra <amodra@bigpond.net.au>
1003
1004 * config/tc-iq2000.c: Include sb.h.
1005
7c752c2a
TS
10062006-06-08 Nigel Stephens <nigel@mips.com>
1007
1008 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
1009 aliases for better compatibility with SGI tools.
1010
03bf704f
AM
10112006-06-08 Alan Modra <amodra@bigpond.net.au>
1012
1013 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
1014 * Makefile.am (GASLIBS): Expand @BFDLIB@.
1015 (BFDVER_H): Delete.
1016 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
1017 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
1018 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
1019 Run "make dep-am".
1020 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
1021 * Makefile.in: Regenerate.
1022 * doc/Makefile.in: Regenerate.
1023 * configure: Regenerate.
1024
6648b7cf
JM
10252006-06-07 Joseph S. Myers <joseph@codesourcery.com>
1026
1027 * po/Make-in (pdf, ps): New dummy targets.
1028
037e8744
JB
10292006-06-07 Julian Brown <julian@codesourcery.com>
1030
1031 * config/tc-arm.c (stdarg.h): include.
1032 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1033 array.
1034 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1035 REG_TYPE_NSDQ (single, double or quad vector reg).
1036 (reg_expected_msgs): Update.
1037 (BAD_FPU): Add macro for unsupported FPU instruction error.
1038 (parse_neon_type): Support 'd' as an alias for .f64.
1039 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1040 sets of registers.
1041 (parse_vfp_reg_list): Don't update first arg on error.
1042 (parse_neon_mov): Support extra syntax for VFP moves.
1043 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1044 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1045 (parse_operands): Support isvec, issingle operands fields, new parse
1046 codes above.
1047 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1048 msr variants.
1049 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1050 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1051 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1052 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1053 shapes.
1054 (neon_shape): Redefine in terms of above.
1055 (neon_shape_class): New enumeration, table of shape classes.
1056 (neon_shape_el): New enumeration. One element of a shape.
1057 (neon_shape_el_size): Register widths of above, where appropriate.
1058 (neon_shape_info): New struct. Info for shape table.
1059 (neon_shape_tab): New array.
1060 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1061 (neon_check_shape): Rewrite as...
1062 (neon_select_shape): New function to classify instruction shapes,
1063 driven by new table neon_shape_tab array.
1064 (neon_quad): New function. Return 1 if shape should set Q flag in
1065 instructions (or equivalent), 0 otherwise.
1066 (type_chk_of_el_type): Support F64.
1067 (el_type_of_type_chk): Likewise.
1068 (neon_check_type): Add support for VFP type checking (VFP data
1069 elements fill their containing registers).
1070 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1071 in thumb mode for VFP instructions.
1072 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1073 and encode the current instruction as if it were that opcode.
1074 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1075 arguments, call function in PFN.
1076 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1077 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1078 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1079 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1080 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1081 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1082 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1083 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1084 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1085 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1086 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1087 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1088 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1089 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1090 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1091 neon_quad.
1092 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1093 between VFP and Neon turns out to belong to Neon. Perform
1094 architecture check and fill in condition field if appropriate.
1095 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1096 (do_neon_cvt): Add support for VFP variants of instructions.
1097 (neon_cvt_flavour): Extend to cover VFP conversions.
1098 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1099 vmov variants.
1100 (do_neon_ldr_str): Handle single-precision VFP load/store.
1101 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1102 NS_NULL not NS_IGNORE.
1103 (opcode_tag): Add OT_csuffixF for operands which either take a
1104 conditional suffix, or have 0xF in the condition field.
1105 (md_assemble): Add support for OT_csuffixF.
1106 (NCE): Replace macro with...
1107 (NCE_tag, NCE, NCEF): New macros.
1108 (nCE): Replace macro with...
1109 (nCE_tag, nCE, nCEF): New macros.
1110 (insns): Add support for VFP insns or VFP versions of insns msr,
1111 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1112 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1113 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1114 VFP/Neon insns together.
1115
ebd1c875
AM
11162006-06-07 Alan Modra <amodra@bigpond.net.au>
1117 Ladislav Michl <ladis@linux-mips.org>
1118
1119 * app.c: Don't include headers already included by as.h.
1120 * as.c: Likewise.
1121 * atof-generic.c: Likewise.
1122 * cgen.c: Likewise.
1123 * dwarf2dbg.c: Likewise.
1124 * expr.c: Likewise.
1125 * input-file.c: Likewise.
1126 * input-scrub.c: Likewise.
1127 * macro.c: Likewise.
1128 * output-file.c: Likewise.
1129 * read.c: Likewise.
1130 * sb.c: Likewise.
1131 * config/bfin-lex.l: Likewise.
1132 * config/obj-coff.h: Likewise.
1133 * config/obj-elf.h: Likewise.
1134 * config/obj-som.h: Likewise.
1135 * config/tc-arc.c: Likewise.
1136 * config/tc-arm.c: Likewise.
1137 * config/tc-avr.c: Likewise.
1138 * config/tc-bfin.c: Likewise.
1139 * config/tc-cris.c: Likewise.
1140 * config/tc-d10v.c: Likewise.
1141 * config/tc-d30v.c: Likewise.
1142 * config/tc-dlx.h: Likewise.
1143 * config/tc-fr30.c: Likewise.
1144 * config/tc-frv.c: Likewise.
1145 * config/tc-h8300.c: Likewise.
1146 * config/tc-hppa.c: Likewise.
1147 * config/tc-i370.c: Likewise.
1148 * config/tc-i860.c: Likewise.
1149 * config/tc-i960.c: Likewise.
1150 * config/tc-ip2k.c: Likewise.
1151 * config/tc-iq2000.c: Likewise.
1152 * config/tc-m32c.c: Likewise.
1153 * config/tc-m32r.c: Likewise.
1154 * config/tc-maxq.c: Likewise.
1155 * config/tc-mcore.c: Likewise.
1156 * config/tc-mips.c: Likewise.
1157 * config/tc-mmix.c: Likewise.
1158 * config/tc-mn10200.c: Likewise.
1159 * config/tc-mn10300.c: Likewise.
1160 * config/tc-msp430.c: Likewise.
1161 * config/tc-mt.c: Likewise.
1162 * config/tc-ns32k.c: Likewise.
1163 * config/tc-openrisc.c: Likewise.
1164 * config/tc-ppc.c: Likewise.
1165 * config/tc-s390.c: Likewise.
1166 * config/tc-sh.c: Likewise.
1167 * config/tc-sh64.c: Likewise.
1168 * config/tc-sparc.c: Likewise.
1169 * config/tc-tic30.c: Likewise.
1170 * config/tc-tic4x.c: Likewise.
1171 * config/tc-tic54x.c: Likewise.
1172 * config/tc-v850.c: Likewise.
1173 * config/tc-vax.c: Likewise.
1174 * config/tc-xc16x.c: Likewise.
1175 * config/tc-xstormy16.c: Likewise.
1176 * config/tc-xtensa.c: Likewise.
1177 * config/tc-z80.c: Likewise.
1178 * config/tc-z8k.c: Likewise.
1179 * macro.h: Don't include sb.h or ansidecl.h.
1180 * sb.h: Don't include stdio.h or ansidecl.h.
1181 * cond.c: Include sb.h.
1182 * itbl-lex.l: Include as.h instead of other system headers.
1183 * itbl-parse.y: Likewise.
1184 * itbl-ops.c: Similarly.
1185 * itbl-ops.h: Don't include as.h or ansidecl.h.
1186 * config/bfin-defs.h: Don't include bfd.h or as.h.
1187 * config/bfin-parse.y: Include as.h instead of other system headers.
1188
9622b051
AM
11892006-06-06 Ben Elliston <bje@au.ibm.com>
1190 Anton Blanchard <anton@samba.org>
1191
1192 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1193 (md_show_usage): Document it.
1194 (ppc_setup_opcodes): Test power6 opcode flag bits.
1195 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1196
65263ce3
TS
11972006-06-06 Thiemo Seufer <ths@mips.com>
1198 Chao-ying Fu <fu@mips.com>
1199
1200 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1201 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1202 (macro_build): Update comment.
1203 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1204 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1205 CPU_HAS_MDMX.
1206 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1207 MIPS_CPU_ASE_MDMX flags for sb1.
1208
a9e24354
TS
12092006-06-05 Thiemo Seufer <ths@mips.com>
1210
1211 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1212 appropriate.
1213 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1214 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1215 and MT instructions a fatal error. Use INSERT_OPERAND where
1216 appropriate. Improve warnings for break and wait code overflows.
1217 Use symbolic constant of OP_MASK_COPZ.
1218 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1219
4cfe2c59
DJ
12202006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1221
1222 * po/Make-in (top_builddir): Define.
1223
e10fad12
JM
12242006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1225
1226 * doc/Makefile.am (TEXI2DVI): Define.
1227 * doc/Makefile.in: Regenerate.
1228 * doc/c-arc.texi: Fix typo.
1229
12e64c2c
AM
12302006-06-01 Alan Modra <amodra@bigpond.net.au>
1231
1232 * config/obj-ieee.c: Delete.
1233 * config/obj-ieee.h: Delete.
1234 * Makefile.am (OBJ_FORMATS): Remove ieee.
1235 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1236 (obj-ieee.o): Remove rule.
1237 * Makefile.in: Regenerate.
1238 * configure.in (atof): Remove tahoe.
1239 (OBJ_MAYBE_IEEE): Don't define.
1240 * configure: Regenerate.
1241 * config.in: Regenerate.
1242 * doc/Makefile.in: Regenerate.
1243 * po/POTFILES.in: Regenerate.
1244
20e95c23
DJ
12452006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1246
1247 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1248 and LIBINTL_DEP everywhere.
1249 (INTLLIBS): Remove.
1250 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1251 * acinclude.m4: Include new gettext macros.
1252 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1253 Remove local code for po/Makefile.
1254 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1255
eebf07fb
NC
12562006-05-30 Nick Clifton <nickc@redhat.com>
1257
1258 * po/es.po: Updated Spanish translation.
1259
b6aee19e
DC
12602006-05-06 Denis Chertykov <denisc@overta.ru>
1261
1262 * doc/c-avr.texi: New file.
1263 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1264 * doc/all.texi: Set AVR
1265 * doc/as.texinfo: Include c-avr.texi
1266
f8fdc850 12672006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1268
f8fdc850
JZ
1269 * config/bfin-parse.y (check_macfunc): Loose the condition of
1270 calling check_multiply_halfregs ().
1271
a3205465
JZ
12722006-05-25 Jie Zhang <jie.zhang@analog.com>
1273
1274 * config/bfin-parse.y (asm_1): Better check and deal with
1275 vector and scalar Multiply 16-Bit Operands instructions.
1276
9b52905e
NC
12772006-05-24 Nick Clifton <nickc@redhat.com>
1278
1279 * config/tc-hppa.c: Convert to ISO C90 format.
1280 * config/tc-hppa.h: Likewise.
1281
12822006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1283 Randolph Chung <randolph@tausq.org>
a70ae331 1284
9b52905e
NC
1285 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1286 is_tls_ieoff, is_tls_leoff): Define.
1287 (fix_new_hppa): Handle TLS.
1288 (cons_fix_new_hppa): Likewise.
1289 (pa_ip): Likewise.
1290 (md_apply_fix): Handle TLS relocs.
1291 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1292
a70ae331 12932006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1294
1295 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1296
ad3fea08
TS
12972006-05-23 Thiemo Seufer <ths@mips.com>
1298 David Ung <davidu@mips.com>
1299 Nigel Stephens <nigel@mips.com>
1300
1301 [ gas/ChangeLog ]
1302 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1303 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1304 ISA_HAS_MXHC1): New macros.
1305 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1306 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1307 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1308 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1309 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1310 (mips_after_parse_args): Change default handling of float register
1311 size to account for 32bit code with 64bit FP. Better sanity checking
1312 of ISA/ASE/ABI option combinations.
1313 (s_mipsset): Support switching of GPR and FPR sizes via
1314 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1315 options.
1316 (mips_elf_final_processing): We should record the use of 64bit FP
1317 registers in 32bit code but we don't, because ELF header flags are
1318 a scarce ressource.
1319 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1320 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1321 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1322 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1323 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1324 missing -march options. Document .set arch=CPU. Move .set smartmips
1325 to ASE page. Use @code for .set FOO examples.
1326
8b64503a
JZ
13272006-05-23 Jie Zhang <jie.zhang@analog.com>
1328
1329 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1330 if needed.
1331
403022e0
JZ
13322006-05-23 Jie Zhang <jie.zhang@analog.com>
1333
1334 * config/bfin-defs.h (bfin_equals): Remove declaration.
1335 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1336 * config/tc-bfin.c (bfin_name_is_register): Remove.
1337 (bfin_equals): Remove.
1338 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1339 (bfin_name_is_register): Remove declaration.
1340
7455baf8
TS
13412006-05-19 Thiemo Seufer <ths@mips.com>
1342 Nigel Stephens <nigel@mips.com>
1343
1344 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1345 (mips_oddfpreg_ok): New function.
1346 (mips_ip): Use it.
1347
707bfff6
TS
13482006-05-19 Thiemo Seufer <ths@mips.com>
1349 David Ung <davidu@mips.com>
1350
1351 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1352 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1353 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1354 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1355 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1356 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1357 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1358 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1359 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1360 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1361 reg_names_o32, reg_names_n32n64): Define register classes.
1362 (reg_lookup): New function, use register classes.
1363 (md_begin): Reserve register names in the symbol table. Simplify
1364 OBJ_ELF defines.
1365 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1366 Use reg_lookup.
1367 (mips16_ip): Use reg_lookup.
1368 (tc_get_register): Likewise.
1369 (tc_mips_regname_to_dw2regnum): New function.
1370
1df69f4f
TS
13712006-05-19 Thiemo Seufer <ths@mips.com>
1372
1373 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1374 Un-constify string argument.
1375 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1376 Likewise.
1377 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1378 Likewise.
1379 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1380 Likewise.
1381 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1382 Likewise.
1383 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1384 Likewise.
1385 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1386 Likewise.
1387
377260ba
NS
13882006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1389
1390 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1391 cfloat/m68881 to correct architecture before using it.
1392
cce7653b
NC
13932006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1394
a70ae331 1395 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1396 constant values.
1397
b0796911
PB
13982006-05-15 Paul Brook <paul@codesourcery.com>
1399
1400 * config/tc-arm.c (arm_adjust_symtab): Use
1401 bfd_is_arm_special_symbol_name.
1402
64b607e6
BW
14032006-05-15 Bob Wilson <bob.wilson@acm.org>
1404
1405 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1406 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1407 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1408 Handle errors from calls to xtensa_opcode_is_* functions.
1409
9b3f89ee
TS
14102006-05-14 Thiemo Seufer <ths@mips.com>
1411
1412 * config/tc-mips.c (macro_build): Test for currently active
1413 mips16 option.
1414 (mips16_ip): Reject invalid opcodes.
1415
370b66a1
CD
14162006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1417
1418 * doc/as.texinfo: Rename "Index" to "AS Index",
1419 and "ABORT" to "ABORT (COFF)".
1420
b6895b4f
PB
14212006-05-11 Paul Brook <paul@codesourcery.com>
1422
1423 * config/tc-arm.c (parse_half): New function.
1424 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1425 (parse_operands): Ditto.
1426 (do_mov16): Reject invalid relocations.
1427 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1428 (insns): Replace Iffff with HALF.
1429 (md_apply_fix): Add MOVW and MOVT relocs.
1430 (tc_gen_reloc): Ditto.
1431 * doc/c-arm.texi: Document relocation operators
1432
e28387c3
PB
14332006-05-11 Paul Brook <paul@codesourcery.com>
1434
1435 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1436
89ee2ebe
TS
14372006-05-11 Thiemo Seufer <ths@mips.com>
1438
1439 * config/tc-mips.c (append_insn): Don't check the range of j or
1440 jal addresses.
1441
53baae48
NC
14422006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1443
1444 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1445 relocs against external symbols for WinCE targets.
53baae48
NC
1446 (md_apply_fix): Likewise.
1447
4e2a74a8
TS
14482006-05-09 David Ung <davidu@mips.com>
1449
1450 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1451 j or jal address.
1452
337ff0a5
NC
14532006-05-09 Nick Clifton <nickc@redhat.com>
1454
1455 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1456 against symbols which are not going to be placed into the symbol
1457 table.
1458
8c9f705e
BE
14592006-05-09 Ben Elliston <bje@au.ibm.com>
1460
1461 * expr.c (operand): Remove `if (0 && ..)' statement and
1462 subsequently unused target_op label. Collapse `if (1 || ..)'
1463 statement.
1464 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1465 separately above the switch.
1466
2fd0d2ac
NC
14672006-05-08 Nick Clifton <nickc@redhat.com>
1468
1469 PR gas/2623
1470 * config/tc-msp430.c (line_separator_character): Define as |.
1471
e16bfa71
TS
14722006-05-08 Thiemo Seufer <ths@mips.com>
1473 Nigel Stephens <nigel@mips.com>
1474 David Ung <davidu@mips.com>
1475
1476 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1477 (mips_opts): Likewise.
1478 (file_ase_smartmips): New variable.
1479 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1480 (macro_build): Handle SmartMIPS instructions.
1481 (mips_ip): Likewise.
1482 (md_longopts): Add argument handling for smartmips.
1483 (md_parse_options, mips_after_parse_args): Likewise.
1484 (s_mipsset): Add .set smartmips support.
1485 (md_show_usage): Document -msmartmips/-mno-smartmips.
1486 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1487 .set smartmips.
1488 * doc/c-mips.texi: Likewise.
1489
32638454
AM
14902006-05-08 Alan Modra <amodra@bigpond.net.au>
1491
1492 * write.c (relax_segment): Add pass count arg. Don't error on
1493 negative org/space on first two passes.
1494 (relax_seg_info): New struct.
1495 (relax_seg, write_object_file): Adjust.
1496 * write.h (relax_segment): Update prototype.
1497
b7fc2769
JB
14982006-05-05 Julian Brown <julian@codesourcery.com>
1499
1500 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1501 checking.
1502 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1503 architecture version checks.
1504 (insns): Allow overlapping instructions to be used in VFP mode.
1505
7f841127
L
15062006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1507
1508 PR gas/2598
1509 * config/obj-elf.c (obj_elf_change_section): Allow user
1510 specified SHF_ALPHA_GPREL.
1511
73160847
NC
15122006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1513
1514 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1515 for PMEM related expressions.
1516
56487c55
NC
15172006-05-05 Nick Clifton <nickc@redhat.com>
1518
1519 PR gas/2582
1520 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1521 insertion of a directory separator character into a string at a
1522 given offset. Uses heuristics to decide when to use a backslash
1523 character rather than a forward-slash character.
1524 (dwarf2_directive_loc): Use the macro.
1525 (out_debug_info): Likewise.
1526
d43b4baf
TS
15272006-05-05 Thiemo Seufer <ths@mips.com>
1528 David Ung <davidu@mips.com>
1529
1530 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1531 instruction.
1532 (macro): Add new case M_CACHE_AB.
1533
088fa78e
KH
15342006-05-04 Kazu Hirata <kazu@codesourcery.com>
1535
1536 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1537 (opcode_lookup): Issue a warning for opcode with
1538 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1539 identical to OT_cinfix3.
1540 (TxC3w, TC3w, tC3w): New.
1541 (insns): Use tC3w and TC3w for comparison instructions with
1542 's' suffix.
1543
c9049d30
AM
15442006-05-04 Alan Modra <amodra@bigpond.net.au>
1545
1546 * subsegs.h (struct frchain): Delete frch_seg.
1547 (frchain_root): Delete.
1548 (seg_info): Define as macro.
1549 * subsegs.c (frchain_root): Delete.
1550 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1551 (subsegs_begin, subseg_change): Adjust for above.
1552 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1553 rather than to one big list.
1554 (subseg_get): Don't special case abs, und sections.
1555 (subseg_new, subseg_force_new): Don't set frchainP here.
1556 (seg_info): Delete.
1557 (subsegs_print_statistics): Adjust frag chain control list traversal.
1558 * debug.c (dmp_frags): Likewise.
1559 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1560 at frchain_root. Make use of known frchain ordering.
1561 (last_frag_for_seg): Likewise.
1562 (get_frag_fix): Likewise. Add seg param.
1563 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1564 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1565 (SUB_SEGMENT_ALIGN): Likewise.
1566 (subsegs_finish): Adjust frchain list traversal.
1567 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1568 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1569 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1570 (xtensa_fix_b_j_loop_end_frags): Likewise.
1571 (xtensa_fix_close_loop_end_frags): Likewise.
1572 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1573 (retrieve_segment_info): Delete frch_seg initialisation.
1574
f592407e
AM
15752006-05-03 Alan Modra <amodra@bigpond.net.au>
1576
1577 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1578 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1579 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1580 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1581
df7849c5
JM
15822006-05-02 Joseph Myers <joseph@codesourcery.com>
1583
1584 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1585 here.
1586 (md_apply_fix3): Multiply offset by 4 here for
1587 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1588
2d545b82
L
15892006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1590 Jan Beulich <jbeulich@novell.com>
1591
1592 * config/tc-i386.c (output_invalid_buf): Change size for
1593 unsigned char.
1594 * config/tc-tic30.c (output_invalid_buf): Likewise.
1595
1596 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1597 unsigned char.
1598 * config/tc-tic30.c (output_invalid): Likewise.
1599
38fc1cb1
DJ
16002006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1601
1602 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1603 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1604 (asconfig.texi): Don't set top_srcdir.
1605 * doc/as.texinfo: Don't use top_srcdir.
1606 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1607
2d545b82
L
16082006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1609
1610 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1611 * config/tc-tic30.c (output_invalid_buf): Likewise.
1612
1613 * config/tc-i386.c (output_invalid): Use snprintf instead of
1614 sprintf.
1615 * config/tc-ia64.c (declare_register_set): Likewise.
1616 (emit_one_bundle): Likewise.
1617 (check_dependencies): Likewise.
1618 * config/tc-tic30.c (output_invalid): Likewise.
1619
a8bc6c78
PB
16202006-05-02 Paul Brook <paul@codesourcery.com>
1621
1622 * config/tc-arm.c (arm_optimize_expr): New function.
1623 * config/tc-arm.h (md_optimize_expr): Define
1624 (arm_optimize_expr): Add prototype.
1625 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1626
58633d9a
BE
16272006-05-02 Ben Elliston <bje@au.ibm.com>
1628
22772e33
BE
1629 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1630 field unsigned.
1631
58633d9a
BE
1632 * sb.h (sb_list_vector): Move to sb.c.
1633 * sb.c (free_list): Use type of sb_list_vector directly.
1634 (sb_build): Fix off-by-one error in assertion about `size'.
1635
89cdfe57
BE
16362006-05-01 Ben Elliston <bje@au.ibm.com>
1637
1638 * listing.c (listing_listing): Remove useless loop.
1639 * macro.c (macro_expand): Remove is_positional local variable.
1640 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1641 and simplify surrounding expressions, where possible.
1642 (assign_symbol): Likewise.
1643 (s_weakref): Likewise.
1644 * symbols.c (colon): Likewise.
1645
c35da140
AM
16462006-05-01 James Lemke <jwlemke@wasabisystems.com>
1647
1648 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1649
9bcd4f99
TS
16502006-04-30 Thiemo Seufer <ths@mips.com>
1651 David Ung <davidu@mips.com>
1652
1653 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1654 (mips_immed): New table that records various handling of udi
1655 instruction patterns.
1656 (mips_ip): Adds udi handling.
1657
001ae1a4
AM
16582006-04-28 Alan Modra <amodra@bigpond.net.au>
1659
1660 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1661 of list rather than beginning.
1662
136da414
JB
16632006-04-26 Julian Brown <julian@codesourcery.com>
1664
1665 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1666 (is_quarter_float): Rename from above. Simplify slightly.
1667 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1668 number.
1669 (parse_neon_mov): Parse floating-point constants.
1670 (neon_qfloat_bits): Fix encoding.
1671 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1672 preference to integer encoding when using the F32 type.
1673
dcbf9037
JB
16742006-04-26 Julian Brown <julian@codesourcery.com>
1675
1676 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1677 zero-initialising structures containing it will lead to invalid types).
1678 (arm_it): Add vectype to each operand.
1679 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1680 defined field.
1681 (neon_typed_alias): New structure. Extra information for typed
1682 register aliases.
1683 (reg_entry): Add neon type info field.
1684 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1685 Break out alternative syntax for coprocessor registers, etc. into...
1686 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1687 out from arm_reg_parse.
1688 (parse_neon_type): Move. Return SUCCESS/FAIL.
1689 (first_error): New function. Call to ensure first error which occurs is
1690 reported.
1691 (parse_neon_operand_type): Parse exactly one type.
1692 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1693 (parse_typed_reg_or_scalar): New function. Handle core of both
1694 arm_typed_reg_parse and parse_scalar.
1695 (arm_typed_reg_parse): Parse a register with an optional type.
1696 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1697 result.
1698 (parse_scalar): Parse a Neon scalar with optional type.
1699 (parse_reg_list): Use first_error.
1700 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1701 (neon_alias_types_same): New function. Return true if two (alias) types
1702 are the same.
1703 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1704 of elements.
1705 (insert_reg_alias): Return new reg_entry not void.
1706 (insert_neon_reg_alias): New function. Insert type/index information as
1707 well as register for alias.
1708 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1709 make typed register aliases accordingly.
1710 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1711 of line.
1712 (s_unreq): Delete type information if present.
1713 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1714 (s_arm_unwind_save_mmxwcg): Likewise.
1715 (s_arm_unwind_movsp): Likewise.
1716 (s_arm_unwind_setfp): Likewise.
1717 (parse_shift): Likewise.
1718 (parse_shifter_operand): Likewise.
1719 (parse_address): Likewise.
1720 (parse_tb): Likewise.
1721 (tc_arm_regname_to_dw2regnum): Likewise.
1722 (md_pseudo_table): Add dn, qn.
1723 (parse_neon_mov): Handle typed operands.
1724 (parse_operands): Likewise.
1725 (neon_type_mask): Add N_SIZ.
1726 (N_ALLMODS): New macro.
1727 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1728 (el_type_of_type_chk): Add some safeguards.
1729 (modify_types_allowed): Fix logic bug.
1730 (neon_check_type): Handle operands with types.
1731 (neon_three_same): Remove redundant optional arg handling.
1732 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1733 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1734 (do_neon_step): Adjust accordingly.
1735 (neon_cmode_for_logic_imm): Use first_error.
1736 (do_neon_bitfield): Call neon_check_type.
1737 (neon_dyadic): Rename to...
1738 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1739 to allow modification of type of the destination.
1740 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1741 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1742 (do_neon_compare): Make destination be an untyped bitfield.
1743 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1744 (neon_mul_mac): Return early in case of errors.
1745 (neon_move_immediate): Use first_error.
1746 (neon_mac_reg_scalar_long): Fix type to include scalar.
1747 (do_neon_dup): Likewise.
1748 (do_neon_mov): Likewise (in several places).
1749 (do_neon_tbl_tbx): Fix type.
1750 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1751 (do_neon_ld_dup): Exit early in case of errors and/or use
1752 first_error.
1753 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1754 Handle .dn/.qn directives.
1755 (REGDEF): Add zero for reg_entry neon field.
1756
5287ad62
JB
17572006-04-26 Julian Brown <julian@codesourcery.com>
1758
1759 * config/tc-arm.c (limits.h): Include.
1760 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1761 (fpu_vfp_v3_or_neon_ext): Declare constants.
1762 (neon_el_type): New enumeration of types for Neon vector elements.
1763 (neon_type_el): New struct. Define type and size of a vector element.
1764 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1765 instruction.
1766 (neon_type): Define struct. The type of an instruction.
1767 (arm_it): Add 'vectype' for the current instruction.
1768 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1769 (vfp_sp_reg_pos): Rename to...
1770 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1771 tags.
1772 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1773 (Neon D or Q register).
1774 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1775 register.
1776 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1777 (my_get_expression): Allow above constant as argument to accept
1778 64-bit constants with optional prefix.
1779 (arm_reg_parse): Add extra argument to return the specific type of
1780 register in when either a D or Q register (REG_TYPE_NDQ) is
1781 requested. Can be NULL.
1782 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1783 (parse_reg_list): Update for new arm_reg_parse args.
1784 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1785 (parse_neon_el_struct_list): New function. Parse element/structure
1786 register lists for VLD<n>/VST<n> instructions.
1787 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1788 (s_arm_unwind_save_mmxwr): Likewise.
1789 (s_arm_unwind_save_mmxwcg): Likewise.
1790 (s_arm_unwind_movsp): Likewise.
1791 (s_arm_unwind_setfp): Likewise.
1792 (parse_big_immediate): New function. Parse an immediate, which may be
1793 64 bits wide. Put results in inst.operands[i].
1794 (parse_shift): Update for new arm_reg_parse args.
1795 (parse_address): Likewise. Add parsing of alignment specifiers.
1796 (parse_neon_mov): Parse the operands of a VMOV instruction.
1797 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1798 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1799 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1800 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1801 (parse_operands): Handle new codes above.
1802 (encode_arm_vfp_sp_reg): Rename to...
1803 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1804 selected VFP version only supports D0-D15.
1805 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1806 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1807 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1808 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1809 encode_arm_vfp_reg name, and allow 32 D regs.
1810 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1811 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1812 regs.
1813 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1814 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1815 constant-load and conversion insns introduced with VFPv3.
1816 (neon_tab_entry): New struct.
1817 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1818 those which are the targets of pseudo-instructions.
1819 (neon_opc): Enumerate opcodes, use as indices into...
1820 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1821 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1822 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1823 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1824 neon_enc_tab.
1825 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1826 Neon instructions.
1827 (neon_type_mask): New. Compact type representation for type checking.
1828 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1829 permitted type combinations.
1830 (N_IGNORE_TYPE): New macro.
1831 (neon_check_shape): New function. Check an instruction shape for
1832 multiple alternatives. Return the specific shape for the current
1833 instruction.
1834 (neon_modify_type_size): New function. Modify a vector type and size,
1835 depending on the bit mask in argument 1.
1836 (neon_type_promote): New function. Convert a given "key" type (of an
1837 operand) into the correct type for a different operand, based on a bit
1838 mask.
1839 (type_chk_of_el_type): New function. Convert a type and size into the
1840 compact representation used for type checking.
1841 (el_type_of_type_ckh): New function. Reverse of above (only when a
1842 single bit is set in the bit mask).
1843 (modify_types_allowed): New function. Alter a mask of allowed types
1844 based on a bit mask of modifications.
1845 (neon_check_type): New function. Check the type of the current
1846 instruction against the variable argument list. The "key" type of the
1847 instruction is returned.
1848 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1849 a Neon data-processing instruction depending on whether we're in ARM
1850 mode or Thumb-2 mode.
1851 (neon_logbits): New function.
1852 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1853 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1854 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1855 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1856 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1857 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1858 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1859 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1860 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1861 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1862 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1863 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1864 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1865 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1866 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1867 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1868 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1869 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1870 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1871 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1872 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1873 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1874 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1875 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1876 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1877 helpers.
1878 (parse_neon_type): New function. Parse Neon type specifier.
1879 (opcode_lookup): Allow parsing of Neon type specifiers.
1880 (REGNUM2, REGSETH, REGSET2): New macros.
1881 (reg_names): Add new VFPv3 and Neon registers.
1882 (NUF, nUF, NCE, nCE): New macros for opcode table.
1883 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1884 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1885 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1886 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1887 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1888 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1889 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1890 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1891 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1892 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1893 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1894 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1895 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1896 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1897 fto[us][lh][sd].
1898 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1899 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1900 (arm_option_cpu_value): Add vfp3 and neon.
1901 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1902 VFPv1 attribute.
1903
1946c96e
BW
19042006-04-25 Bob Wilson <bob.wilson@acm.org>
1905
1906 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1907 syntax instead of hardcoded opcodes with ".w18" suffixes.
1908 (wide_branch_opcode): New.
1909 (build_transition): Use it to check for wide branch opcodes with
1910 either ".w18" or ".w15" suffixes.
1911
5033a645
BW
19122006-04-25 Bob Wilson <bob.wilson@acm.org>
1913
1914 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1915 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1916 frag's is_literal flag.
1917
395fa56f
BW
19182006-04-25 Bob Wilson <bob.wilson@acm.org>
1919
1920 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1921
708587a4
KH
19222006-04-23 Kazu Hirata <kazu@codesourcery.com>
1923
1924 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1925 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1926 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1927 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1928 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1929
8463be01
PB
19302005-04-20 Paul Brook <paul@codesourcery.com>
1931
1932 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1933 all targets.
1934 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1935
f26a5955
AM
19362006-04-19 Alan Modra <amodra@bigpond.net.au>
1937
1938 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1939 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1940 Make some cpus unsupported on ELF. Run "make dep-am".
1941 * Makefile.in: Regenerate.
1942
241a6c40
AM
19432006-04-19 Alan Modra <amodra@bigpond.net.au>
1944
1945 * configure.in (--enable-targets): Indent help message.
1946 * configure: Regenerate.
1947
bb8f5920
L
19482006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1949
1950 PR gas/2533
1951 * config/tc-i386.c (i386_immediate): Check illegal immediate
1952 register operand.
1953
23d9d9de
AM
19542006-04-18 Alan Modra <amodra@bigpond.net.au>
1955
64e74474
AM
1956 * config/tc-i386.c: Formatting.
1957 (output_disp, output_imm): ISO C90 params.
1958
6cbe03fb
AM
1959 * frags.c (frag_offset_fixed_p): Constify args.
1960 * frags.h (frag_offset_fixed_p): Ditto.
1961
23d9d9de
AM
1962 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1963 (COFF_MAGIC): Delete.
a37d486e
AM
1964
1965 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1966
e7403566
DJ
19672006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1968
1969 * po/POTFILES.in: Regenerated.
1970
58ab4f3d
MM
19712006-04-16 Mark Mitchell <mark@codesourcery.com>
1972
1973 * doc/as.texinfo: Mention that some .type syntaxes are not
1974 supported on all architectures.
1975
482fd9f9
BW
19762006-04-14 Sterling Augustine <sterling@tensilica.com>
1977
1978 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1979 instructions when such transformations have been disabled.
1980
05d58145
BW
19812006-04-10 Sterling Augustine <sterling@tensilica.com>
1982
1983 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1984 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1985 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1986 decoding the loop instructions. Remove current_offset variable.
1987 (xtensa_fix_short_loop_frags): Likewise.
1988 (min_bytes_to_other_loop_end): Remove current_offset argument.
1989
9e75b3fa
AM
19902006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1991
a37d486e 1992 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1993 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1994
d727e8c2
NC
19952006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1996
1997 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1998 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1999 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
2000 atmega644, atmega329, atmega3290, atmega649, atmega6490,
2001 atmega406, atmega640, atmega1280, atmega1281, at90can32,
2002 at90can64, at90usb646, at90usb647, at90usb1286 and
2003 at90usb1287.
2004 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2005
d252fdde
PB
20062006-04-07 Paul Brook <paul@codesourcery.com>
2007
2008 * config/tc-arm.c (parse_operands): Set default error message.
2009
ab1eb5fe
PB
20102006-04-07 Paul Brook <paul@codesourcery.com>
2011
2012 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
2013
7ae2971b
PB
20142006-04-07 Paul Brook <paul@codesourcery.com>
2015
2016 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
2017
53365c0d
PB
20182006-04-07 Paul Brook <paul@codesourcery.com>
2019
2020 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
2021 (move_or_literal_pool): Handle Thumb-2 instructions.
2022 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2023
45aa61fe
AM
20242006-04-07 Alan Modra <amodra@bigpond.net.au>
2025
2026 PR 2512.
2027 * config/tc-i386.c (match_template): Move 64-bit operand tests
2028 inside loop.
2029
108a6f8e
CD
20302006-04-06 Carlos O'Donell <carlos@codesourcery.com>
2031
2032 * po/Make-in: Add install-html target.
2033 * Makefile.am: Add install-html and install-html-recursive targets.
2034 * Makefile.in: Regenerate.
2035 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2036 * configure: Regenerate.
2037 * doc/Makefile.am: Add install-html and install-html-am targets.
2038 * doc/Makefile.in: Regenerate.
2039
ec651a3b
AM
20402006-04-06 Alan Modra <amodra@bigpond.net.au>
2041
2042 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2043 second scan.
2044
910600e9
RS
20452006-04-05 Richard Sandiford <richard@codesourcery.com>
2046 Daniel Jacobowitz <dan@codesourcery.com>
2047
2048 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2049 (GOTT_BASE, GOTT_INDEX): New.
2050 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2051 GOTT_INDEX when generating VxWorks PIC.
2052 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2053 use the generic *-*-vxworks* stanza instead.
2054
99630778
AM
20552006-04-04 Alan Modra <amodra@bigpond.net.au>
2056
2057 PR 997
2058 * frags.c (frag_offset_fixed_p): New function.
2059 * frags.h (frag_offset_fixed_p): Declare.
2060 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2061 (resolve_expression): Likewise.
2062
a02728c8
BW
20632006-04-03 Sterling Augustine <sterling@tensilica.com>
2064
2065 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2066 of the same length but different numbers of slots.
2067
9dfde49d
AS
20682006-03-30 Andreas Schwab <schwab@suse.de>
2069
2070 * configure.in: Fix help string for --enable-targets option.
2071 * configure: Regenerate.
2072
2da12c60
NS
20732006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2074
6d89cc8f
NS
2075 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2076 (m68k_ip): ... here. Use for all chips. Protect against buffer
2077 overrun and avoid excessive copying.
2078
2da12c60
NS
2079 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2080 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2081 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2082 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2083 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2084 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2085 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2086 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2087 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2088 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2089 (struct m68k_cpu): Change chip field to control_regs.
2090 (current_chip): Remove.
2091 (control_regs): New.
2092 (m68k_archs, m68k_extensions): Adjust.
2093 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2094 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2095 (find_cf_chip): Reimplement for new organization of cpu table.
2096 (select_control_regs): Remove.
2097 (mri_chip): Adjust.
2098 (struct save_opts): Save control regs, not chip.
2099 (s_save, s_restore): Adjust.
2100 (m68k_lookup_cpu): Give deprecated warning when necessary.
2101 (m68k_init_arch): Adjust.
2102 (md_show_usage): Adjust for new cpu table organization.
2103
1ac4baed
BS
21042006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2105
2106 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2107 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2108 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2109 "elf/bfin.h".
2110 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2111 (any_gotrel): New rule.
2112 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2113 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2114 "elf/bfin.h".
2115 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2116 (bfin_pic_ptr): New function.
2117 (md_pseudo_table): Add it for ".picptr".
2118 (OPTION_FDPIC): New macro.
2119 (md_longopts): Add -mfdpic.
2120 (md_parse_option): Handle it.
2121 (md_begin): Set BFD flags.
2122 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2123 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2124 us for GOT relocs.
2125 * Makefile.am (bfin-parse.o): Update dependencies.
2126 (DEPTC_bfin_elf): Likewise.
2127 * Makefile.in: Regenerate.
2128
a9d34880
RS
21292006-03-25 Richard Sandiford <richard@codesourcery.com>
2130
2131 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2132 mcfemac instead of mcfmac.
2133
9ca26584
AJ
21342006-03-23 Michael Matz <matz@suse.de>
2135
2136 * config/tc-i386.c (type_names): Correct placement of 'static'.
2137 (reloc): Map some more relocs to their 64 bit counterpart when
2138 size is 8.
2139 (output_insn): Work around breakage if DEBUG386 is defined.
2140 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2141 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2142 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2143 different from i386.
2144 (output_imm): Ditto.
2145 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2146 Imm64.
2147 (md_convert_frag): Jumps can now be larger than 2GB away, error
2148 out in that case.
2149 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2150 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2151
0a44bf69
RS
21522006-03-22 Richard Sandiford <richard@codesourcery.com>
2153 Daniel Jacobowitz <dan@codesourcery.com>
2154 Phil Edwards <phil@codesourcery.com>
2155 Zack Weinberg <zack@codesourcery.com>
2156 Mark Mitchell <mark@codesourcery.com>
2157 Nathan Sidwell <nathan@codesourcery.com>
2158
2159 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2160 (md_begin): Complain about -G being used for PIC. Don't change
2161 the text, data and bss alignments on VxWorks.
2162 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2163 generating VxWorks PIC.
2164 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2165 (macro): Likewise, but do not treat la $25 specially for
2166 VxWorks PIC, and do not handle jal.
2167 (OPTION_MVXWORKS_PIC): New macro.
2168 (md_longopts): Add -mvxworks-pic.
2169 (md_parse_option): Don't complain about using PIC and -G together here.
2170 Handle OPTION_MVXWORKS_PIC.
2171 (md_estimate_size_before_relax): Always use the first relaxation
2172 sequence on VxWorks.
2173 * config/tc-mips.h (VXWORKS_PIC): New.
2174
080eb7fe
PB
21752006-03-21 Paul Brook <paul@codesourcery.com>
2176
2177 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2178
03aaa593
BW
21792006-03-21 Sterling Augustine <sterling@tensilica.com>
2180
2181 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2182 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2183 (get_loop_align_size): New.
2184 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2185 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2186 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2187 (get_noop_aligned_address): Use get_loop_align_size.
2188 (get_aligned_diff): Likewise.
2189
3e94bf1a
PB
21902006-03-21 Paul Brook <paul@codesourcery.com>
2191
2192 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2193
dfa9f0d5
PB
21942006-03-20 Paul Brook <paul@codesourcery.com>
2195
2196 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2197 (do_t_branch): Encode branches inside IT blocks as unconditional.
2198 (do_t_cps): New function.
2199 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2200 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2201 (opcode_lookup): Allow conditional suffixes on all instructions in
2202 Thumb mode.
2203 (md_assemble): Advance condexec state before checking for errors.
2204 (insns): Use do_t_cps.
2205
6e1cb1a6
PB
22062006-03-20 Paul Brook <paul@codesourcery.com>
2207
2208 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2209 outputting the insn.
2210
0a966e2d
JBG
22112006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2212
2213 * config/tc-vax.c: Update copyright year.
2214 * config/tc-vax.h: Likewise.
2215
a49fcc17
JBG
22162006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2217
2218 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2219 make it static.
2220 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2221
f5208ef2
PB
22222006-03-17 Paul Brook <paul@codesourcery.com>
2223
2224 * config/tc-arm.c (insns): Add ldm and stm.
2225
cb4c78d6
BE
22262006-03-17 Ben Elliston <bje@au.ibm.com>
2227
2228 PR gas/2446
2229 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2230
c16d2bf0
PB
22312006-03-16 Paul Brook <paul@codesourcery.com>
2232
2233 * config/tc-arm.c (insns): Add "svc".
2234
80ca4e2c
BW
22352006-03-13 Bob Wilson <bob.wilson@acm.org>
2236
2237 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2238 flag and avoid double underscore prefixes.
2239
3a4a14e9
PB
22402006-03-10 Paul Brook <paul@codesourcery.com>
2241
2242 * config/tc-arm.c (md_begin): Handle EABIv5.
2243 (arm_eabis): Add EF_ARM_EABI_VER5.
2244 * doc/c-arm.texi: Document -meabi=5.
2245
518051dc
BE
22462006-03-10 Ben Elliston <bje@au.ibm.com>
2247
2248 * app.c (do_scrub_chars): Simplify string handling.
2249
00a97672
RS
22502006-03-07 Richard Sandiford <richard@codesourcery.com>
2251 Daniel Jacobowitz <dan@codesourcery.com>
2252 Zack Weinberg <zack@codesourcery.com>
2253 Nathan Sidwell <nathan@codesourcery.com>
2254 Paul Brook <paul@codesourcery.com>
2255 Ricardo Anguiano <anguiano@codesourcery.com>
2256 Phil Edwards <phil@codesourcery.com>
2257
2258 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2259 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2260 R_ARM_ABS12 reloc.
2261 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2262 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2263 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2264
b29757dc
BW
22652006-03-06 Bob Wilson <bob.wilson@acm.org>
2266
2267 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2268 even when using the text-section-literals option.
2269
0b2e31dc
NS
22702006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2271
2272 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2273 and cf.
2274 (m68k_ip): <case 'J'> Check we have some control regs.
2275 (md_parse_option): Allow raw arch switch.
2276 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2277 whether 68881 or cfloat was meant by -mfloat.
2278 (md_show_usage): Adjust extension display.
2279 (m68k_elf_final_processing): Adjust.
2280
df406460
NC
22812006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2282
2283 * config/tc-avr.c (avr_mod_hash_value): New function.
2284 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2285 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2286 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2287 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2288 of (int).
2289 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2290 fixups, abort otherwise.
df406460
NC
2291 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2292 tc_fix_adjustable): Define.
a70ae331 2293
53022e4a
JW
22942006-03-02 James E Wilson <wilson@specifix.com>
2295
2296 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2297 change the template, then clear md.slot[curr].end_of_insn_group.
2298
9f6f925e
JB
22992006-02-28 Jan Beulich <jbeulich@novell.com>
2300
2301 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2302
0e31b3e1
JB
23032006-02-28 Jan Beulich <jbeulich@novell.com>
2304
2305 PR/1070
2306 * macro.c (getstring): Don't treat parentheses special anymore.
2307 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2308 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2309 characters.
2310
10cd14b4
AM
23112006-02-28 Mat <mat@csail.mit.edu>
2312
2313 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2314
63752a75
JJ
23152006-02-27 Jakub Jelinek <jakub@redhat.com>
2316
2317 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2318 field.
2319 (CFI_signal_frame): Define.
2320 (cfi_pseudo_table): Add .cfi_signal_frame.
2321 (dot_cfi): Handle CFI_signal_frame.
2322 (output_cie): Handle cie->signal_frame.
2323 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2324 different. Copy signal_frame from FDE to newly created CIE.
2325 * doc/as.texinfo: Document .cfi_signal_frame.
2326
f7d9e5c3
CD
23272006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2328
2329 * doc/Makefile.am: Add html target.
2330 * doc/Makefile.in: Regenerate.
2331 * po/Make-in: Add html target.
2332
331d2d0d
L
23332006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2334
8502d882 2335 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2336 Instructions.
2337
8502d882 2338 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2339 (CpuUnknownFlags): Add CpuMNI.
2340
10156f83
DM
23412006-02-24 David S. Miller <davem@sunset.davemloft.net>
2342
2343 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2344 (hpriv_reg_table): New table for hyperprivileged registers.
2345 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2346 register encoding.
2347
6772dd07
DD
23482006-02-24 DJ Delorie <dj@redhat.com>
2349
2350 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2351 (tc_gen_reloc): Don't define.
2352 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2353 (OPTION_LINKRELAX): New.
2354 (md_longopts): Add it.
2355 (m32c_relax): New.
2356 (md_parse_options): Set it.
2357 (md_assemble): Emit relaxation relocs as needed.
2358 (md_convert_frag): Emit relaxation relocs as needed.
2359 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2360 (m32c_apply_fix): New.
2361 (tc_gen_reloc): New.
2362 (m32c_force_relocation): Force out jump relocs when relaxing.
2363 (m32c_fix_adjustable): Return false if relaxing.
2364
62b3e311
PB
23652006-02-24 Paul Brook <paul@codesourcery.com>
2366
2367 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2368 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2369 (struct asm_barrier_opt): Define.
2370 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2371 (parse_psr): Accept V7M psr names.
2372 (parse_barrier): New function.
2373 (enum operand_parse_code): Add OP_oBARRIER.
2374 (parse_operands): Implement OP_oBARRIER.
2375 (do_barrier): New function.
2376 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2377 (do_t_cpsi): Add V7M restrictions.
2378 (do_t_mrs, do_t_msr): Validate V7M variants.
2379 (md_assemble): Check for NULL variants.
2380 (v7m_psrs, barrier_opt_names): New tables.
2381 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2382 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2383 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2384 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2385 (struct cpu_arch_ver_table): Define.
2386 (cpu_arch_ver): New.
2387 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2388 Tag_CPU_arch_profile.
2389 * doc/c-arm.texi: Document new cpu and arch options.
2390
59cf82fe
L
23912006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2392
2393 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2394
19a7219f
L
23952006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2396
2397 * config/tc-ia64.c: Update copyright years.
2398
7f3dfb9c
L
23992006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2400
2401 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2402 SDM 2.2.
2403
f40d1643
PB
24042005-02-22 Paul Brook <paul@codesourcery.com>
2405
2406 * config/tc-arm.c (do_pld): Remove incorrect write to
2407 inst.instruction.
2408 (encode_thumb32_addr_mode): Use correct operand.
2409
216d22bc
PB
24102006-02-21 Paul Brook <paul@codesourcery.com>
2411
2412 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2413
d70c5fc7
NC
24142006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2415 Anil Paranjape <anilp1@kpitcummins.com>
2416 Shilin Shakti <shilins@kpitcummins.com>
2417
2418 * Makefile.am: Add xc16x related entry.
2419 * Makefile.in: Regenerate.
2420 * configure.in: Added xc16x related entry.
2421 * configure: Regenerate.
2422 * config/tc-xc16x.h: New file
2423 * config/tc-xc16x.c: New file
2424 * doc/c-xc16x.texi: New file for xc16x
2425 * doc/all.texi: Entry for xc16x
a70ae331 2426 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2427 * NEWS: Announce the support for the new target.
2428
aaa2ab3d
NH
24292006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2430
2431 * configure.tgt: set emulation for mips-*-netbsd*
2432
82de001f
JJ
24332006-02-14 Jakub Jelinek <jakub@redhat.com>
2434
2435 * config.in: Rebuilt.
2436
431ad2d0
BW
24372006-02-13 Bob Wilson <bob.wilson@acm.org>
2438
2439 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2440 from 1, not 0, in error messages.
2441 (md_assemble): Simplify special-case check for ENTRY instructions.
2442 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2443 operand in error message.
2444
94089a50
JM
24452006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2446
2447 * configure.tgt (arm-*-linux-gnueabi*): Change to
2448 arm-*-linux-*eabi*.
2449
52de4c06
NC
24502006-02-10 Nick Clifton <nickc@redhat.com>
2451
70e45ad9
NC
2452 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2453 32-bit value is propagated into the upper bits of a 64-bit long.
2454
52de4c06
NC
2455 * config/tc-arc.c (init_opcode_tables): Fix cast.
2456 (arc_extoper, md_operand): Likewise.
2457
21af2bbd
BW
24582006-02-09 David Heine <dlheine@tensilica.com>
2459
2460 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2461 each relaxation step.
2462
75a706fc 24632006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2464
75a706fc
L
2465 * configure.in (CHECK_DECLS): Add vsnprintf.
2466 * configure: Regenerate.
2467 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2468 include/declare here, but...
2469 * as.h: Move code detecting VARARGS idiom to the top.
2470 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2471 (vsnprintf): Declare if not already declared.
2472
0d474464
L
24732006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2474
2475 * as.c (close_output_file): New.
2476 (main): Register close_output_file with xatexit before
2477 dump_statistics. Don't call output_file_close.
2478
266abb8f
NS
24792006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2480
2481 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2482 mcf5329_control_regs): New.
2483 (not_current_architecture, selected_arch, selected_cpu): New.
2484 (m68k_archs, m68k_extensions): New.
2485 (archs): Renamed to ...
2486 (m68k_cpus): ... here. Adjust.
2487 (n_arches): Remove.
2488 (md_pseudo_table): Add arch and cpu directives.
2489 (find_cf_chip, m68k_ip): Adjust table scanning.
2490 (no_68851, no_68881): Remove.
2491 (md_assemble): Lazily initialize.
2492 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2493 (md_init_after_args): Move functionality to m68k_init_arch.
2494 (mri_chip): Adjust table scanning.
2495 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2496 options with saner parsing.
2497 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2498 m68k_init_arch): New.
2499 (s_m68k_cpu, s_m68k_arch): New.
2500 (md_show_usage): Adjust.
2501 (m68k_elf_final_processing): Set CF EF flags.
2502 * config/tc-m68k.h (m68k_init_after_args): Remove.
2503 (tc_init_after_args): Remove.
2504 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2505 (M68k-Directives): Document .arch and .cpu directives.
2506
134dcee5
AM
25072006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2508
a70ae331
AM
2509 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2510 synonyms for equ and defl.
134dcee5
AM
2511 (z80_cons_fix_new): New function.
2512 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2513 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2514 now handled as pseudo-op rather than an instruction.
2515 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2516 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2517 Add entries for def24,def32,d24,d32.
2518 (md_assemble): Improved error handling.
2519 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2520 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2521 (z80_cons_fix_new): Declare.
a70ae331 2522 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2523 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2524
a9931606
PB
25252006-02-02 Paul Brook <paul@codesourcery.com>
2526
2527 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2528
ef8d22e6
PB
25292005-02-02 Paul Brook <paul@codesourcery.com>
2530
2531 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2532 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2533 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2534 T2_OPCODE_RSB): Define.
2535 (thumb32_negate_data_op): New function.
2536 (md_apply_fix): Use it.
2537
e7da6241
BW
25382006-01-31 Bob Wilson <bob.wilson@acm.org>
2539
2540 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2541 fields.
2542 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2543 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2544 subtracted symbols.
2545 (relaxation_requirements): Add pfinish_frag argument and use it to
2546 replace setting tinsn->record_fix fields.
2547 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2548 and vinsn_to_insnbuf. Remove references to record_fix and
2549 slot_sub_symbols fields.
2550 (xtensa_mark_narrow_branches): Delete unused code.
2551 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2552 a symbol.
2553 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2554 record_fix fields.
2555 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2556 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2557 of the record_fix field. Simplify error messages for unexpected
2558 symbolic operands.
2559 (set_expr_symbol_offset_diff): Delete.
2560
79134647
PB
25612006-01-31 Paul Brook <paul@codesourcery.com>
2562
2563 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2564
e74cfd16
PB
25652006-01-31 Paul Brook <paul@codesourcery.com>
2566 Richard Earnshaw <rearnsha@arm.com>
2567
2568 * config/tc-arm.c: Use arm_feature_set.
2569 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2570 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2571 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2572 New variables.
2573 (insns): Use them.
2574 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2575 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2576 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2577 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2578 feature flags.
2579 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2580 (arm_opts): Move old cpu/arch options from here...
2581 (arm_legacy_opts): ... to here.
2582 (md_parse_option): Search arm_legacy_opts.
2583 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2584 (arm_float_abis, arm_eabis): Make const.
2585
d47d412e
BW
25862006-01-25 Bob Wilson <bob.wilson@acm.org>
2587
2588 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2589
b14273fe
JZ
25902006-01-21 Jie Zhang <jie.zhang@analog.com>
2591
2592 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2593 in load immediate intruction.
2594
39cd1c76
JZ
25952006-01-21 Jie Zhang <jie.zhang@analog.com>
2596
2597 * config/bfin-parse.y (value_match): Use correct conversion
2598 specifications in template string for __FILE__ and __LINE__.
2599 (binary): Ditto.
2600 (unary): Ditto.
2601
67a4f2b7
AO
26022006-01-18 Alexandre Oliva <aoliva@redhat.com>
2603
2604 Introduce TLS descriptors for i386 and x86_64.
2605 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2606 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2607 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2608 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2609 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2610 displacement bits.
2611 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2612 (lex_got): Handle @tlsdesc and @tlscall.
2613 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2614
8ad7c533
NC
26152006-01-11 Nick Clifton <nickc@redhat.com>
2616
2617 Fixes for building on 64-bit hosts:
2618 * config/tc-avr.c (mod_index): New union to allow conversion
2619 between pointers and integers.
2620 (md_begin, avr_ldi_expression): Use it.
2621 * config/tc-i370.c (md_assemble): Add cast for argument to print
2622 statement.
2623 * config/tc-tic54x.c (subsym_substitute): Likewise.
2624 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2625 opindex field of fr_cgen structure into a pointer so that it can
2626 be stored in a frag.
2627 * config/tc-mn10300.c (md_assemble): Likewise.
2628 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2629 types.
2630 * config/tc-v850.c: Replace uses of (int) casts with correct
2631 types.
2632
4dcb3903
L
26332006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2634
2635 PR gas/2117
2636 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2637
e0f6ea40
HPN
26382006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2639
2640 PR gas/2101
2641 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2642 a local-label reference.
2643
e88d958a 2644For older changes see ChangeLog-2005
08d56133
NC
2645\f
2646Local Variables:
2647mode: change-log
2648left-margin: 8
2649fill-column: 74
2650version-control: never
2651End:
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