gas/
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ef05d495
L
12006-09-28 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.h (CpuMNI): Renamed to ...
4 (CpuSSSE3): This.
5 (CpuUnknownFlags): Updated.
6 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
7 and PROCESSOR_MEROM with PROCESSOR_CORE2.
8 * config/tc-i386.c: Updated.
9 * doc/c-i386.texi: Likewise.
10
11 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
12
d8ad03e9
NC
132006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
14
15 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
16
df3ca5a3
NC
172006-09-27 Nick Clifton <nickc@redhat.com>
18
19 * output-file.c (output_file_close): Prevent an infinite loop
20 reporting that stdoutput could not be closed.
21
2d447fca
JM
222006-09-26 Mark Shinwell <shinwell@codesourcery.com>
23 Joseph Myers <joseph@codesourcery.com>
24 Ian Lance Taylor <ian@wasabisystems.com>
25 Ben Elliston <bje@wasabisystems.com>
26
27 * config/tc-arm.c (arm_cext_iwmmxt2): New.
28 (enum operand_parse_code): New code OP_RIWR_I32z.
29 (parse_operands): Handle OP_RIWR_I32z.
30 (do_iwmmxt_wmerge): New function.
31 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
32 a register.
33 (do_iwmmxt_wrwrwr_or_imm5): New function.
34 (insns): Mark instructions as RIWR_I32z as appropriate.
35 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
36 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
37 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
38 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
39 (md_begin): Handle IWMMXT2.
40 (arm_cpus): Add iwmmxt2.
41 (arm_extensions): Likewise.
42 (arm_archs): Likewise.
43
ba83aca1
BW
442006-09-25 Bob Wilson <bob.wilson@acm.org>
45
46 * doc/as.texinfo (Overview): Revise description of --keep-locals.
47 Add xref to "Symbol Names".
48 (L): Refer to "local symbols" instead of "local labels". Move
49 definition to "Symbol Names" section; add xref to that section.
50 (Symbol Names): Use "Local Symbol Names" section to define local
51 symbols. Add "Local Labels" heading for description of temporary
52 forward/backward labels, and refer to those as "local labels".
53
539e75ad
L
542006-09-23 H.J. Lu <hongjiu.lu@intel.com>
55
56 PR binutils/3235
57 * config/tc-i386.c (match_template): Check address size prefix
58 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
59 operand.
60
5e02f92e
AM
612006-09-22 Alan Modra <amodra@bigpond.net.au>
62
63 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
64
885afe7b
AM
652006-09-22 Alan Modra <amodra@bigpond.net.au>
66
67 * as.h (as_perror): Delete declaration.
68 * gdbinit.in (as_perror): Delete breakpoint.
69 * messages.c (as_perror): Delete function.
70 * doc/internals.texi: Remove as_perror description.
71 * listing.c (listing_print: Don't use as_perror.
72 * output-file.c (output_file_create, output_file_close): Likewise.
73 * symbols.c (symbol_create, symbol_clone): Likewise.
74 * write.c (write_contents): Likewise.
75 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
76 * config/tc-tic54x.c (tic54x_mlib): Likewise.
77
3aeeedbb
AM
782006-09-22 Alan Modra <amodra@bigpond.net.au>
79
80 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
81 (ppc_handle_align): New function.
82 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
83 (SUB_SEGMENT_ALIGN): Define as zero.
84
96e9638b
BW
852006-09-20 Bob Wilson <bob.wilson@acm.org>
86
87 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
88 (Overview): Skip cross reference in man page.
89
99ad8390
NC
902006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
91
92 * configure.in: Add new target x86_64-pc-mingw64.
93 * configure: Regenerate.
94 * configure.tgt: Add new target x86_64-pc-mingw64.
95 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
96 * config/tc-i386.c: Add new targets.
97 (md_parse_option): Add targets to OPTION_64.
98 (x86_64_target_format): Add new method for setup proper default target cpu mode.
99 * config/te-pep.h: Add new target definition header.
100 (TE_PEP): New macro: Identifies new target architecture.
101 (COFF_WITH_pex64): Set proper includes in bfd.
102 * NEWS: Mention new target.
103
73332571
BS
1042006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
105
106 * config/bfin-parse.y (binary): Change sub of const to add of negated
107 const.
108
1c0d3aa6
NC
1092006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
110
111 * config/tc-score.c: New file.
112 * config/tc-score.h: Newf file.
113 * configure.tgt: Add Score target.
114 * Makefile.am: Add Score files.
115 * Makefile.in: Regenerate.
116 * NEWS: Mention new target support.
117
4fa3602b
PB
1182006-09-16 Paul Brook <paul@codesourcery.com>
119
120 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
121 * doc/c-arm.texi (movsp): Document offset argument.
122
16dd5e42
PB
1232006-09-16 Paul Brook <paul@codesourcery.com>
124
125 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
126 unsigned int to avoid 64-bit host problems.
127
c4ae04ce
BS
1282006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
129
130 * config/bfin-parse.y (binary): Do some more constant folding for
131 additions.
132
e5d4a5a6
JB
1332006-09-13 Jan Beulich <jbeulich@novell.com>
134
135 * input-file.c (input_file_give_next_buffer): Demote as_bad to
136 as_warn.
137
1a1219cb
AM
1382006-09-13 Alan Modra <amodra@bigpond.net.au>
139
140 PR gas/3165
141 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
142 in parens.
143
f79d9c1d
AM
1442006-09-13 Alan Modra <amodra@bigpond.net.au>
145
146 * input-file.c (input_file_open): Replace as_perror with as_bad
147 so that gas exits with error on file errors. Correct error
148 message.
149 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 150 * input-file.h: Update comment.
f79d9c1d 151
f512f76f
NC
1522006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
153
154 PR gas/3172
155 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
156 registers as a sub-class of wC registers.
157
8d79fd44
AM
1582006-09-11 Alan Modra <amodra@bigpond.net.au>
159
160 PR gas/3165
161 * config/tc-mips.h (enum dwarf2_format): Forward declare.
162 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
163 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
164 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
165
6258339f
NC
1662006-09-08 Nick Clifton <nickc@redhat.com>
167
168 PR gas/3129
169 * doc/as.texinfo (Macro): Improve documentation about separating
170 macro arguments from following text.
171
f91e006c
PB
1722006-09-08 Paul Brook <paul@codesourcery.com>
173
174 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
175
466bbf93
PB
1762006-09-07 Paul Brook <paul@codesourcery.com>
177
178 * config/tc-arm.c (parse_operands): Mark operand as present.
179
428e3f1f
PB
1802006-09-04 Paul Brook <paul@codesourcery.com>
181
182 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
183 (do_neon_dyadic_if_i_d): Avoid setting U bit.
184 (do_neon_mac_maybe_scalar): Ditto.
185 (do_neon_dyadic_narrow): Force operand type to NT_integer.
186 (insns): Remove out of date comments.
187
fb25138b
NC
1882006-08-29 Nick Clifton <nickc@redhat.com>
189
190 * read.c (s_align): Initialize the 'stopc' variable to prevent
191 compiler complaints about it being used without being
192 initialized.
193 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
194 s_float_space, s_struct, cons_worker, equals): Likewise.
195
5091343a
AM
1962006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
197
198 * ecoff.c (ecoff_directive_val): Fix message typo.
199 * config/tc-ns32k.c (convert_iif): Likewise.
200 * config/tc-sh64.c (shmedia_check_limits): Likewise.
201
1f2a7e38
BW
2022006-08-25 Sterling Augustine <sterling@tensilica.com>
203 Bob Wilson <bob.wilson@acm.org>
204
205 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
206 the state of the absolute_literals directive. Remove align frag at
207 the start of the literal pool position.
208
34135039
BW
2092006-08-25 Bob Wilson <bob.wilson@acm.org>
210
211 * doc/c-xtensa.texi: Add @group commands in examples.
212
74869ac7
BW
2132006-08-24 Bob Wilson <bob.wilson@acm.org>
214
215 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
216 (INIT_LITERAL_SECTION_NAME): Delete.
217 (lit_state struct): Remove segment names, init_lit_seg, and
218 fini_lit_seg. Add lit_prefix and current_text_seg.
219 (init_literal_head_h, init_literal_head): Delete.
220 (fini_literal_head_h, fini_literal_head): Delete.
221 (xtensa_begin_directive): Move argument parsing to
222 xtensa_literal_prefix function.
223 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
224 (xtensa_literal_prefix): Parse the directive argument here and
225 record it in the lit_prefix field. Remove code to derive literal
226 section names.
227 (linkonce_len): New.
228 (get_is_linkonce_section): Use linkonce_len. Check for any
229 ".gnu.linkonce.*" section, not just text sections.
230 (md_begin): Remove initialization of deleted lit_state fields.
231 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
232 to init_literal_head and fini_literal_head.
233 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
234 when traversing literal_head list.
235 (match_section_group): New.
236 (cache_literal_section): Rewrite to determine the literal section
237 name on the fly, create the section and return it.
238 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
239 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
240 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
241 Use xtensa_get_property_section from bfd.
242 (retrieve_xtensa_section): Delete.
243 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
244 description to refer to plural literal sections and add xref to
245 the Literal Directive section.
246 (Literal Directive): Describe new rules for deriving literal section
247 names. Add footnote for special case of .init/.fini with
248 --text-section-literals.
249 (Literal Prefix Directive): Replace old naming rules with xref to the
250 Literal Directive section.
251
87a1fd79
JM
2522006-08-21 Joseph Myers <joseph@codesourcery.com>
253
254 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
255 merging with previous long opcode.
256
7148cc28
NC
2572006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
258
259 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
260 * Makefile.in: Regenerate.
261 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
262 renamed. Adjust.
263
3e9e4fcf
JB
2642006-08-16 Julian Brown <julian@codesourcery.com>
265
266 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
267 to use ARM instructions on non-ARM-supporting cores.
268 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
269 mode automatically based on cpu variant.
270 (md_begin): Call above function.
271
267d2029
JB
2722006-08-16 Julian Brown <julian@codesourcery.com>
273
274 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
275 recognized in non-unified syntax mode.
276
4be041b2
TS
2772006-08-15 Thiemo Seufer <ths@mips.com>
278 Nigel Stephens <nigel@mips.com>
279 David Ung <davidu@mips.com>
280
281 * configure.tgt: Handle mips*-sde-elf*.
282
3a93f742
TS
2832006-08-12 Thiemo Seufer <ths@networkno.de>
284
285 * config/tc-mips.c (mips16_ip): Fix argument register handling
286 for restore instruction.
287
1737851b
BW
2882006-08-08 Bob Wilson <bob.wilson@acm.org>
289
290 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
291 (out_sleb128): New.
292 (out_fixed_inc_line_addr): New.
293 (process_entries): Use out_fixed_inc_line_addr when
294 DWARF2_USE_FIXED_ADVANCE_PC is set.
295 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
296
e14e52f8
DD
2972006-08-08 DJ Delorie <dj@redhat.com>
298
299 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
300 vs full symbols so that we never have more than one pointer value
301 for any given symbol in our symbol table.
302
802f5d9e
NC
3032006-08-08 Sterling Augustine <sterling@tensilica.com>
304
305 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
306 and emit DW_AT_ranges when code in compilation unit is not
307 contiguous.
308 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
309 is not contiguous.
310 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
311 (out_debug_ranges): New function to emit .debug_ranges section
312 when code is not contiguous.
313
720abc60
NC
3142006-08-08 Nick Clifton <nickc@redhat.com>
315
316 * config/tc-arm.c (WARN_DEPRECATED): Enable.
317
f0927246
NC
3182006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
319
320 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
321 only block.
322 (pe_directive_secrel) [TE_PE]: New function.
323 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
324 loc, loc_mark_labels.
325 [TE_PE]: Handle secrel32.
326 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
327 call.
328 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
329 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
330 (md_section_align): Only round section sizes here for AOUT
331 targets.
332 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
333 (tc_pe_dwarf2_emit_offset): New function.
334 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
335 (cons_fix_new_arm): Handle O_secrel.
336 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
337 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
338 of OBJ_ELF only block.
339 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
340 tc_pe_dwarf2_emit_offset.
341
55e6e397
RS
3422006-08-04 Richard Sandiford <richard@codesourcery.com>
343
344 * config/tc-sh.c (apply_full_field_fix): New function.
345 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
346 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
347 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
348 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
349
9cd19b17
NC
3502006-08-03 Nick Clifton <nickc@redhat.com>
351
352 PR gas/2991
353 * config.in: Regenerate.
354
97f87066
JM
3552006-08-03 Joseph Myers <joseph@codesourcery.com>
356
357 * config/tc-arm.c (parse_operands): Handle invalid register name
358 for OP_RIWR_RIWC.
359
41adaa5c
JM
3602006-08-03 Joseph Myers <joseph@codesourcery.com>
361
362 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
363 (parse_operands): Handle it.
364 (insns): Use it for tmcr and tmrc.
365
9d7cbccd
NC
3662006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
367
368 PR binutils/2983
369 * config/tc-i386.c (md_parse_option): Treat any target starting
370 with elf64_x86_64 as a viable target for the -64 switch.
371 (i386_target_format): For 64-bit ELF flavoured output use
372 ELF_TARGET_FORMAT64.
373 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
374
c973bc5c
NC
3752006-08-02 Nick Clifton <nickc@redhat.com>
376
377 PR gas/2991
378 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
379 bfd/aclocal.m4.
380 * configure.in: Run BFD_BINARY_FOPEN.
381 * configure: Regenerate.
382 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
383 file to include.
384
cfde7f70
L
3852006-08-01 H.J. Lu <hongjiu.lu@intel.com>
386
387 * config/tc-i386.c (md_assemble): Don't update
388 cpu_arch_isa_flags.
389
b4c71f56
TS
3902006-08-01 Thiemo Seufer <ths@mips.com>
391
392 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
393
54f4ddb3
TS
3942006-08-01 Thiemo Seufer <ths@mips.com>
395
396 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
397 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
398 BFD_RELOC_32 and BFD_RELOC_16.
399 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
400 md_convert_frag, md_obj_end): Fix comment formatting.
401
d103cf61
TS
4022006-07-31 Thiemo Seufer <ths@mips.com>
403
404 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
405 handling for BFD_RELOC_MIPS16_JMP.
406
601e61cd
NC
4072006-07-24 Andreas Schwab <schwab@suse.de>
408
409 PR/2756
410 * read.c (read_a_source_file): Ignore unknown text after line
411 comment character. Fix misleading comment.
412
b45619c0
NC
4132006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
414
415 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
416 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
417 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
418 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
419 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
420 doc/c-z80.texi, doc/internals.texi: Fix some typos.
421
784906c5
NC
4222006-07-21 Nick Clifton <nickc@redhat.com>
423
424 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
425 linker testsuite.
426
d5f010e9
TS
4272006-07-20 Thiemo Seufer <ths@mips.com>
428 Nigel Stephens <nigel@mips.com>
429
430 * config/tc-mips.c (md_parse_option): Don't infer optimisation
431 options from debug options.
432
35d3d567
TS
4332006-07-20 Thiemo Seufer <ths@mips.com>
434
435 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
436 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
437
401a54cf
PB
4382006-07-19 Paul Brook <paul@codesourcery.com>
439
440 * config/tc-arm.c (insns): Fix rbit Arm opcode.
441
16805f35
PB
4422006-07-18 Paul Brook <paul@codesourcery.com>
443
444 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
445 (md_convert_frag): Use correct reloc for add_pc. Use
446 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
447 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
448 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
449
d9e05e4e
AM
4502006-07-17 Mat Hostetter <mat@lcs.mit.edu>
451
452 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
453 when file and line unknown.
454
f43abd2b
TS
4552006-07-17 Thiemo Seufer <ths@mips.com>
456
457 * read.c (s_struct): Use IS_ELF.
458 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
459 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
460 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
461 s_mips_mask): Likewise.
462
a2902af6
TS
4632006-07-16 Thiemo Seufer <ths@mips.com>
464 David Ung <davidu@mips.com>
465
466 * read.c (s_struct): Handle ELF section changing.
467 * config/tc-mips.c (s_align): Leave enabling auto-align to the
468 generic code.
469 (s_change_sec): Try section changing only if we output ELF.
470
d32cad65
L
4712006-07-15 H.J. Lu <hongjiu.lu@intel.com>
472
473 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
474 CpuAmdFam10.
475 (smallest_imm_type): Remove Cpu086.
476 (i386_target_format): Likewise.
477
478 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
479 Update CpuXXX.
480
050dfa73
MM
4812006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
482 Michael Meissner <michael.meissner@amd.com>
483
484 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
485 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
486 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
487 architecture.
488 (i386_align_code): Ditto.
489 (md_assemble_code): Add support for insertq/extrq instructions,
490 swapping as needed for intel syntax.
491 (swap_imm_operands): New function to swap immediate operands.
492 (swap_operands): Deal with 4 operand instructions.
493 (build_modrm_byte): Add support for insertq instruction.
494
6b2de085
L
4952006-07-13 H.J. Lu <hongjiu.lu@intel.com>
496
497 * config/tc-i386.h (Size64): Fix a typo in comment.
498
01eaea5a
NC
4992006-07-12 Nick Clifton <nickc@redhat.com>
500
501 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 502 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
503 already been checked here.
504
1e85aad8
JW
5052006-07-07 James E Wilson <wilson@specifix.com>
506
507 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
508
1370e33d
NC
5092006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
510 Nick Clifton <nickc@redhat.com>
511
512 PR binutils/2877
513 * doc/as.texi: Fix spelling typo: branchs => branches.
514 * doc/c-m68hc11.texi: Likewise.
515 * config/tc-m68hc11.c: Likewise.
516 Support old spelling of command line switch for backwards
517 compatibility.
518
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TS
5192006-07-04 Thiemo Seufer <ths@mips.com>
520 David Ung <davidu@mips.com>
521
522 * config/tc-mips.c (s_is_linkonce): New function.
523 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
524 weak, external, and linkonce symbols.
525 (pic_need_relax): Use s_is_linkonce.
526
85234291
L
5272006-06-24 H.J. Lu <hongjiu.lu@intel.com>
528
529 * doc/as.texinfo (Org): Remove space.
530 (P2align): Add "@var{abs-expr},".
531
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L
5322006-06-23 H.J. Lu <hongjiu.lu@intel.com>
533
534 * config/tc-i386.c (cpu_arch_tune_set): New.
535 (cpu_arch_isa): Likewise.
536 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
537 nops with short or long nop sequences based on -march=/.arch
538 and -mtune=.
539 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
540 set cpu_arch_tune and cpu_arch_tune_flags.
541 (md_parse_option): For -march=, set cpu_arch_isa and set
542 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
543 0. Set cpu_arch_tune_set to 1 for -mtune=.
544 (i386_target_format): Don't set cpu_arch_tune.
545
d4dc2f22
TS
5462006-06-23 Nigel Stephens <nigel@mips.com>
547
548 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
549 generated .sbss.* and .gnu.linkonce.sb.*.
550
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TS
5512006-06-23 Thiemo Seufer <ths@mips.com>
552 David Ung <davidu@mips.com>
553
554 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
555 label_list.
556 * config/tc-mips.c (label_list): Define per-segment label_list.
557 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
558 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
559 mips_from_file_after_relocs, mips_define_label): Use per-segment
560 label_list.
561
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TS
5622006-06-22 Thiemo Seufer <ths@mips.com>
563
564 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
565 (append_insn): Use it.
566 (md_apply_fix): Whitespace formatting.
567 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
568 mips16_extended_frag): Remove register specifier.
569 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
570 constants.
571
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MS
5722006-06-21 Mark Shinwell <shinwell@codesourcery.com>
573
574 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
575 a directive saving VFP registers for ARMv6 or later.
576 (s_arm_unwind_save): Add parameter arch_v6 and call
577 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
578 appropriate.
579 (md_pseudo_table): Add entry for new "vsave" directive.
580 * doc/c-arm.texi: Correct error in example for "save"
581 directive (fstmdf -> fstmdx). Also document "vsave" directive.
582
8e77b565 5832006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
584 Anatoly Sokolov <aesok@post.ru>
585
586 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
587 and atmega644p devices. Rename atmega164/atmega324 devices to
588 atmega164p/atmega324p.
589 * doc/c-avr.texi: Document new mcu and arch options.
590
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NC
5912006-06-17 Nick Clifton <nickc@redhat.com>
592
593 * config/tc-arm.c (enum parse_operand_result): Move outside of
594 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
595
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L
5962006-06-16 H.J. Lu <hongjiu.lu@intel.com>
597
598 * config/tc-i386.h (processor_type): New.
599 (arch_entry): Add type.
600
601 * config/tc-i386.c (cpu_arch_tune): New.
602 (cpu_arch_tune_flags): Likewise.
603 (cpu_arch_isa_flags): Likewise.
604 (cpu_arch): Updated.
605 (set_cpu_arch): Also update cpu_arch_isa_flags.
606 (md_assemble): Update cpu_arch_isa_flags.
607 (OPTION_MARCH): New.
608 (OPTION_MTUNE): Likewise.
609 (md_longopts): Add -march= and -mtune=.
610 (md_parse_option): Support -march= and -mtune=.
611 (md_show_usage): Add -march=CPU/-mtune=CPU.
612 (i386_target_format): Also update cpu_arch_isa_flags,
613 cpu_arch_tune and cpu_arch_tune_flags.
614
615 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
616
617 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
618
4962c51a
MS
6192006-06-15 Mark Shinwell <shinwell@codesourcery.com>
620
621 * config/tc-arm.c (enum parse_operand_result): New.
622 (struct group_reloc_table_entry): New.
623 (enum group_reloc_type): New.
624 (group_reloc_table): New array.
625 (find_group_reloc_table_entry): New function.
626 (parse_shifter_operand_group_reloc): New function.
627 (parse_address_main): New function, incorporating code
628 from the old parse_address function. To be used via...
629 (parse_address): wrapper for parse_address_main; and
630 (parse_address_group_reloc): new function, likewise.
631 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
632 OP_ADDRGLDRS, OP_ADDRGLDC.
633 (parse_operands): Support for these new operand codes.
634 New macro po_misc_or_fail_no_backtrack.
635 (encode_arm_cp_address): Preserve group relocations.
636 (insns): Modify to use the above operand codes where group
637 relocations are permitted.
638 (md_apply_fix): Handle the group relocations
639 ALU_PC_G0_NC through LDC_SB_G2.
640 (tc_gen_reloc): Likewise.
641 (arm_force_relocation): Leave group relocations for the linker.
642 (arm_fix_adjustable): Likewise.
643
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JB
6442006-06-15 Julian Brown <julian@codesourcery.com>
645
646 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
647 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
648 relocs properly.
649
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L
6502006-06-12 H.J. Lu <hongjiu.lu@intel.com>
651
652 * config/tc-i386.c (process_suffix): Don't add rex64 for
653 "xchg %rax,%rax".
654
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TS
6552006-06-09 Thiemo Seufer <ths@mips.com>
656
657 * config/tc-mips.c (mips_ip): Maintain argument count.
658
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AM
6592006-06-09 Alan Modra <amodra@bigpond.net.au>
660
661 * config/tc-iq2000.c: Include sb.h.
662
7c752c2a
TS
6632006-06-08 Nigel Stephens <nigel@mips.com>
664
665 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
666 aliases for better compatibility with SGI tools.
667
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6682006-06-08 Alan Modra <amodra@bigpond.net.au>
669
670 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
671 * Makefile.am (GASLIBS): Expand @BFDLIB@.
672 (BFDVER_H): Delete.
673 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
674 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
675 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
676 Run "make dep-am".
677 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
678 * Makefile.in: Regenerate.
679 * doc/Makefile.in: Regenerate.
680 * configure: Regenerate.
681
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JM
6822006-06-07 Joseph S. Myers <joseph@codesourcery.com>
683
684 * po/Make-in (pdf, ps): New dummy targets.
685
037e8744
JB
6862006-06-07 Julian Brown <julian@codesourcery.com>
687
688 * config/tc-arm.c (stdarg.h): include.
689 (arm_it): Add uncond_value field. Add isvec and issingle to operand
690 array.
691 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
692 REG_TYPE_NSDQ (single, double or quad vector reg).
693 (reg_expected_msgs): Update.
694 (BAD_FPU): Add macro for unsupported FPU instruction error.
695 (parse_neon_type): Support 'd' as an alias for .f64.
696 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
697 sets of registers.
698 (parse_vfp_reg_list): Don't update first arg on error.
699 (parse_neon_mov): Support extra syntax for VFP moves.
700 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
701 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
702 (parse_operands): Support isvec, issingle operands fields, new parse
703 codes above.
704 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
705 msr variants.
706 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
707 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
708 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
709 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
710 shapes.
711 (neon_shape): Redefine in terms of above.
712 (neon_shape_class): New enumeration, table of shape classes.
713 (neon_shape_el): New enumeration. One element of a shape.
714 (neon_shape_el_size): Register widths of above, where appropriate.
715 (neon_shape_info): New struct. Info for shape table.
716 (neon_shape_tab): New array.
717 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
718 (neon_check_shape): Rewrite as...
719 (neon_select_shape): New function to classify instruction shapes,
720 driven by new table neon_shape_tab array.
721 (neon_quad): New function. Return 1 if shape should set Q flag in
722 instructions (or equivalent), 0 otherwise.
723 (type_chk_of_el_type): Support F64.
724 (el_type_of_type_chk): Likewise.
725 (neon_check_type): Add support for VFP type checking (VFP data
726 elements fill their containing registers).
727 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
728 in thumb mode for VFP instructions.
729 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
730 and encode the current instruction as if it were that opcode.
731 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
732 arguments, call function in PFN.
733 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
734 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
735 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
736 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
737 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
738 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
739 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
740 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
741 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
742 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
743 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
744 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
745 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
746 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
747 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
748 neon_quad.
749 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
750 between VFP and Neon turns out to belong to Neon. Perform
751 architecture check and fill in condition field if appropriate.
752 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
753 (do_neon_cvt): Add support for VFP variants of instructions.
754 (neon_cvt_flavour): Extend to cover VFP conversions.
755 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
756 vmov variants.
757 (do_neon_ldr_str): Handle single-precision VFP load/store.
758 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
759 NS_NULL not NS_IGNORE.
760 (opcode_tag): Add OT_csuffixF for operands which either take a
761 conditional suffix, or have 0xF in the condition field.
762 (md_assemble): Add support for OT_csuffixF.
763 (NCE): Replace macro with...
764 (NCE_tag, NCE, NCEF): New macros.
765 (nCE): Replace macro with...
766 (nCE_tag, nCE, nCEF): New macros.
767 (insns): Add support for VFP insns or VFP versions of insns msr,
768 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
769 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
770 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
771 VFP/Neon insns together.
772
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7732006-06-07 Alan Modra <amodra@bigpond.net.au>
774 Ladislav Michl <ladis@linux-mips.org>
775
776 * app.c: Don't include headers already included by as.h.
777 * as.c: Likewise.
778 * atof-generic.c: Likewise.
779 * cgen.c: Likewise.
780 * dwarf2dbg.c: Likewise.
781 * expr.c: Likewise.
782 * input-file.c: Likewise.
783 * input-scrub.c: Likewise.
784 * macro.c: Likewise.
785 * output-file.c: Likewise.
786 * read.c: Likewise.
787 * sb.c: Likewise.
788 * config/bfin-lex.l: Likewise.
789 * config/obj-coff.h: Likewise.
790 * config/obj-elf.h: Likewise.
791 * config/obj-som.h: Likewise.
792 * config/tc-arc.c: Likewise.
793 * config/tc-arm.c: Likewise.
794 * config/tc-avr.c: Likewise.
795 * config/tc-bfin.c: Likewise.
796 * config/tc-cris.c: Likewise.
797 * config/tc-d10v.c: Likewise.
798 * config/tc-d30v.c: Likewise.
799 * config/tc-dlx.h: Likewise.
800 * config/tc-fr30.c: Likewise.
801 * config/tc-frv.c: Likewise.
802 * config/tc-h8300.c: Likewise.
803 * config/tc-hppa.c: Likewise.
804 * config/tc-i370.c: Likewise.
805 * config/tc-i860.c: Likewise.
806 * config/tc-i960.c: Likewise.
807 * config/tc-ip2k.c: Likewise.
808 * config/tc-iq2000.c: Likewise.
809 * config/tc-m32c.c: Likewise.
810 * config/tc-m32r.c: Likewise.
811 * config/tc-maxq.c: Likewise.
812 * config/tc-mcore.c: Likewise.
813 * config/tc-mips.c: Likewise.
814 * config/tc-mmix.c: Likewise.
815 * config/tc-mn10200.c: Likewise.
816 * config/tc-mn10300.c: Likewise.
817 * config/tc-msp430.c: Likewise.
818 * config/tc-mt.c: Likewise.
819 * config/tc-ns32k.c: Likewise.
820 * config/tc-openrisc.c: Likewise.
821 * config/tc-ppc.c: Likewise.
822 * config/tc-s390.c: Likewise.
823 * config/tc-sh.c: Likewise.
824 * config/tc-sh64.c: Likewise.
825 * config/tc-sparc.c: Likewise.
826 * config/tc-tic30.c: Likewise.
827 * config/tc-tic4x.c: Likewise.
828 * config/tc-tic54x.c: Likewise.
829 * config/tc-v850.c: Likewise.
830 * config/tc-vax.c: Likewise.
831 * config/tc-xc16x.c: Likewise.
832 * config/tc-xstormy16.c: Likewise.
833 * config/tc-xtensa.c: Likewise.
834 * config/tc-z80.c: Likewise.
835 * config/tc-z8k.c: Likewise.
836 * macro.h: Don't include sb.h or ansidecl.h.
837 * sb.h: Don't include stdio.h or ansidecl.h.
838 * cond.c: Include sb.h.
839 * itbl-lex.l: Include as.h instead of other system headers.
840 * itbl-parse.y: Likewise.
841 * itbl-ops.c: Similarly.
842 * itbl-ops.h: Don't include as.h or ansidecl.h.
843 * config/bfin-defs.h: Don't include bfd.h or as.h.
844 * config/bfin-parse.y: Include as.h instead of other system headers.
845
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8462006-06-06 Ben Elliston <bje@au.ibm.com>
847 Anton Blanchard <anton@samba.org>
848
849 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
850 (md_show_usage): Document it.
851 (ppc_setup_opcodes): Test power6 opcode flag bits.
852 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
853
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8542006-06-06 Thiemo Seufer <ths@mips.com>
855 Chao-ying Fu <fu@mips.com>
856
857 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
858 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
859 (macro_build): Update comment.
860 (mips_ip): Allow DSP64 instructions for MIPS64R2.
861 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
862 CPU_HAS_MDMX.
863 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
864 MIPS_CPU_ASE_MDMX flags for sb1.
865
a9e24354
TS
8662006-06-05 Thiemo Seufer <ths@mips.com>
867
868 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
869 appropriate.
870 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
871 (mips_ip): Make overflowed/underflowed constant arguments in DSP
872 and MT instructions a fatal error. Use INSERT_OPERAND where
873 appropriate. Improve warnings for break and wait code overflows.
874 Use symbolic constant of OP_MASK_COPZ.
875 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
876
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8772006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
878
879 * po/Make-in (top_builddir): Define.
880
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JM
8812006-06-02 Joseph S. Myers <joseph@codesourcery.com>
882
883 * doc/Makefile.am (TEXI2DVI): Define.
884 * doc/Makefile.in: Regenerate.
885 * doc/c-arc.texi: Fix typo.
886
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8872006-06-01 Alan Modra <amodra@bigpond.net.au>
888
889 * config/obj-ieee.c: Delete.
890 * config/obj-ieee.h: Delete.
891 * Makefile.am (OBJ_FORMATS): Remove ieee.
892 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
893 (obj-ieee.o): Remove rule.
894 * Makefile.in: Regenerate.
895 * configure.in (atof): Remove tahoe.
896 (OBJ_MAYBE_IEEE): Don't define.
897 * configure: Regenerate.
898 * config.in: Regenerate.
899 * doc/Makefile.in: Regenerate.
900 * po/POTFILES.in: Regenerate.
901
20e95c23
DJ
9022006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
903
904 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
905 and LIBINTL_DEP everywhere.
906 (INTLLIBS): Remove.
907 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
908 * acinclude.m4: Include new gettext macros.
909 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
910 Remove local code for po/Makefile.
911 * Makefile.in, configure, doc/Makefile.in: Regenerated.
912
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NC
9132006-05-30 Nick Clifton <nickc@redhat.com>
914
915 * po/es.po: Updated Spanish translation.
916
b6aee19e
DC
9172006-05-06 Denis Chertykov <denisc@overta.ru>
918
919 * doc/c-avr.texi: New file.
920 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
921 * doc/all.texi: Set AVR
922 * doc/as.texinfo: Include c-avr.texi
923
f8fdc850
JZ
9242006-05-28 Jie Zhang <jie.zhang@analog.com>
925
926 * config/bfin-parse.y (check_macfunc): Loose the condition of
927 calling check_multiply_halfregs ().
928
a3205465
JZ
9292006-05-25 Jie Zhang <jie.zhang@analog.com>
930
931 * config/bfin-parse.y (asm_1): Better check and deal with
932 vector and scalar Multiply 16-Bit Operands instructions.
933
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NC
9342006-05-24 Nick Clifton <nickc@redhat.com>
935
936 * config/tc-hppa.c: Convert to ISO C90 format.
937 * config/tc-hppa.h: Likewise.
938
9392006-05-24 Carlos O'Donell <carlos@systemhalted.org>
940 Randolph Chung <randolph@tausq.org>
941
942 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
943 is_tls_ieoff, is_tls_leoff): Define.
944 (fix_new_hppa): Handle TLS.
945 (cons_fix_new_hppa): Likewise.
946 (pa_ip): Likewise.
947 (md_apply_fix): Handle TLS relocs.
948 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
949
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NC
9502006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
951
952 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
953
ad3fea08
TS
9542006-05-23 Thiemo Seufer <ths@mips.com>
955 David Ung <davidu@mips.com>
956 Nigel Stephens <nigel@mips.com>
957
958 [ gas/ChangeLog ]
959 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
960 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
961 ISA_HAS_MXHC1): New macros.
962 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
963 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
964 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
965 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
966 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
967 (mips_after_parse_args): Change default handling of float register
968 size to account for 32bit code with 64bit FP. Better sanity checking
969 of ISA/ASE/ABI option combinations.
970 (s_mipsset): Support switching of GPR and FPR sizes via
971 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
972 options.
973 (mips_elf_final_processing): We should record the use of 64bit FP
974 registers in 32bit code but we don't, because ELF header flags are
975 a scarce ressource.
976 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
977 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
978 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
979 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
980 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
981 missing -march options. Document .set arch=CPU. Move .set smartmips
982 to ASE page. Use @code for .set FOO examples.
983
8b64503a
JZ
9842006-05-23 Jie Zhang <jie.zhang@analog.com>
985
986 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
987 if needed.
988
403022e0
JZ
9892006-05-23 Jie Zhang <jie.zhang@analog.com>
990
991 * config/bfin-defs.h (bfin_equals): Remove declaration.
992 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
993 * config/tc-bfin.c (bfin_name_is_register): Remove.
994 (bfin_equals): Remove.
995 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
996 (bfin_name_is_register): Remove declaration.
997
7455baf8
TS
9982006-05-19 Thiemo Seufer <ths@mips.com>
999 Nigel Stephens <nigel@mips.com>
1000
1001 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1002 (mips_oddfpreg_ok): New function.
1003 (mips_ip): Use it.
1004
707bfff6
TS
10052006-05-19 Thiemo Seufer <ths@mips.com>
1006 David Ung <davidu@mips.com>
1007
1008 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1009 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1010 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1011 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1012 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1013 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1014 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1015 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1016 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1017 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1018 reg_names_o32, reg_names_n32n64): Define register classes.
1019 (reg_lookup): New function, use register classes.
1020 (md_begin): Reserve register names in the symbol table. Simplify
1021 OBJ_ELF defines.
1022 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1023 Use reg_lookup.
1024 (mips16_ip): Use reg_lookup.
1025 (tc_get_register): Likewise.
1026 (tc_mips_regname_to_dw2regnum): New function.
1027
1df69f4f
TS
10282006-05-19 Thiemo Seufer <ths@mips.com>
1029
1030 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1031 Un-constify string argument.
1032 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1033 Likewise.
1034 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1035 Likewise.
1036 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1037 Likewise.
1038 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1039 Likewise.
1040 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1041 Likewise.
1042 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1043 Likewise.
1044
377260ba
NS
10452006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1046
1047 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1048 cfloat/m68881 to correct architecture before using it.
1049
cce7653b
NC
10502006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1051
1052 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1053 constant values.
1054
b0796911
PB
10552006-05-15 Paul Brook <paul@codesourcery.com>
1056
1057 * config/tc-arm.c (arm_adjust_symtab): Use
1058 bfd_is_arm_special_symbol_name.
1059
64b607e6
BW
10602006-05-15 Bob Wilson <bob.wilson@acm.org>
1061
1062 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1063 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1064 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1065 Handle errors from calls to xtensa_opcode_is_* functions.
1066
9b3f89ee
TS
10672006-05-14 Thiemo Seufer <ths@mips.com>
1068
1069 * config/tc-mips.c (macro_build): Test for currently active
1070 mips16 option.
1071 (mips16_ip): Reject invalid opcodes.
1072
370b66a1
CD
10732006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1074
1075 * doc/as.texinfo: Rename "Index" to "AS Index",
1076 and "ABORT" to "ABORT (COFF)".
1077
b6895b4f
PB
10782006-05-11 Paul Brook <paul@codesourcery.com>
1079
1080 * config/tc-arm.c (parse_half): New function.
1081 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1082 (parse_operands): Ditto.
1083 (do_mov16): Reject invalid relocations.
1084 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1085 (insns): Replace Iffff with HALF.
1086 (md_apply_fix): Add MOVW and MOVT relocs.
1087 (tc_gen_reloc): Ditto.
1088 * doc/c-arm.texi: Document relocation operators
1089
e28387c3
PB
10902006-05-11 Paul Brook <paul@codesourcery.com>
1091
1092 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1093
89ee2ebe
TS
10942006-05-11 Thiemo Seufer <ths@mips.com>
1095
1096 * config/tc-mips.c (append_insn): Don't check the range of j or
1097 jal addresses.
1098
53baae48
NC
10992006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1100
1101 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1102 relocs against external symbols for WinCE targets.
1103 (md_apply_fix): Likewise.
1104
4e2a74a8
TS
11052006-05-09 David Ung <davidu@mips.com>
1106
1107 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1108 j or jal address.
1109
337ff0a5
NC
11102006-05-09 Nick Clifton <nickc@redhat.com>
1111
1112 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1113 against symbols which are not going to be placed into the symbol
1114 table.
1115
8c9f705e
BE
11162006-05-09 Ben Elliston <bje@au.ibm.com>
1117
1118 * expr.c (operand): Remove `if (0 && ..)' statement and
1119 subsequently unused target_op label. Collapse `if (1 || ..)'
1120 statement.
1121 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1122 separately above the switch.
1123
2fd0d2ac
NC
11242006-05-08 Nick Clifton <nickc@redhat.com>
1125
1126 PR gas/2623
1127 * config/tc-msp430.c (line_separator_character): Define as |.
1128
e16bfa71
TS
11292006-05-08 Thiemo Seufer <ths@mips.com>
1130 Nigel Stephens <nigel@mips.com>
1131 David Ung <davidu@mips.com>
1132
1133 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1134 (mips_opts): Likewise.
1135 (file_ase_smartmips): New variable.
1136 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1137 (macro_build): Handle SmartMIPS instructions.
1138 (mips_ip): Likewise.
1139 (md_longopts): Add argument handling for smartmips.
1140 (md_parse_options, mips_after_parse_args): Likewise.
1141 (s_mipsset): Add .set smartmips support.
1142 (md_show_usage): Document -msmartmips/-mno-smartmips.
1143 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1144 .set smartmips.
1145 * doc/c-mips.texi: Likewise.
1146
32638454
AM
11472006-05-08 Alan Modra <amodra@bigpond.net.au>
1148
1149 * write.c (relax_segment): Add pass count arg. Don't error on
1150 negative org/space on first two passes.
1151 (relax_seg_info): New struct.
1152 (relax_seg, write_object_file): Adjust.
1153 * write.h (relax_segment): Update prototype.
1154
b7fc2769
JB
11552006-05-05 Julian Brown <julian@codesourcery.com>
1156
1157 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1158 checking.
1159 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1160 architecture version checks.
1161 (insns): Allow overlapping instructions to be used in VFP mode.
1162
7f841127
L
11632006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1164
1165 PR gas/2598
1166 * config/obj-elf.c (obj_elf_change_section): Allow user
1167 specified SHF_ALPHA_GPREL.
1168
73160847
NC
11692006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1170
1171 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1172 for PMEM related expressions.
1173
56487c55
NC
11742006-05-05 Nick Clifton <nickc@redhat.com>
1175
1176 PR gas/2582
1177 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1178 insertion of a directory separator character into a string at a
1179 given offset. Uses heuristics to decide when to use a backslash
1180 character rather than a forward-slash character.
1181 (dwarf2_directive_loc): Use the macro.
1182 (out_debug_info): Likewise.
1183
d43b4baf
TS
11842006-05-05 Thiemo Seufer <ths@mips.com>
1185 David Ung <davidu@mips.com>
1186
1187 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1188 instruction.
1189 (macro): Add new case M_CACHE_AB.
1190
088fa78e
KH
11912006-05-04 Kazu Hirata <kazu@codesourcery.com>
1192
1193 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1194 (opcode_lookup): Issue a warning for opcode with
1195 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1196 identical to OT_cinfix3.
1197 (TxC3w, TC3w, tC3w): New.
1198 (insns): Use tC3w and TC3w for comparison instructions with
1199 's' suffix.
1200
c9049d30
AM
12012006-05-04 Alan Modra <amodra@bigpond.net.au>
1202
1203 * subsegs.h (struct frchain): Delete frch_seg.
1204 (frchain_root): Delete.
1205 (seg_info): Define as macro.
1206 * subsegs.c (frchain_root): Delete.
1207 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1208 (subsegs_begin, subseg_change): Adjust for above.
1209 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1210 rather than to one big list.
1211 (subseg_get): Don't special case abs, und sections.
1212 (subseg_new, subseg_force_new): Don't set frchainP here.
1213 (seg_info): Delete.
1214 (subsegs_print_statistics): Adjust frag chain control list traversal.
1215 * debug.c (dmp_frags): Likewise.
1216 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1217 at frchain_root. Make use of known frchain ordering.
1218 (last_frag_for_seg): Likewise.
1219 (get_frag_fix): Likewise. Add seg param.
1220 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1221 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1222 (SUB_SEGMENT_ALIGN): Likewise.
1223 (subsegs_finish): Adjust frchain list traversal.
1224 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1225 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1226 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1227 (xtensa_fix_b_j_loop_end_frags): Likewise.
1228 (xtensa_fix_close_loop_end_frags): Likewise.
1229 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1230 (retrieve_segment_info): Delete frch_seg initialisation.
1231
f592407e
AM
12322006-05-03 Alan Modra <amodra@bigpond.net.au>
1233
1234 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1235 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1236 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1237 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1238
df7849c5
JM
12392006-05-02 Joseph Myers <joseph@codesourcery.com>
1240
1241 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1242 here.
1243 (md_apply_fix3): Multiply offset by 4 here for
1244 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1245
2d545b82
L
12462006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1247 Jan Beulich <jbeulich@novell.com>
1248
1249 * config/tc-i386.c (output_invalid_buf): Change size for
1250 unsigned char.
1251 * config/tc-tic30.c (output_invalid_buf): Likewise.
1252
1253 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1254 unsigned char.
1255 * config/tc-tic30.c (output_invalid): Likewise.
1256
38fc1cb1
DJ
12572006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1258
1259 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1260 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1261 (asconfig.texi): Don't set top_srcdir.
1262 * doc/as.texinfo: Don't use top_srcdir.
1263 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1264
2d545b82
L
12652006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1266
1267 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1268 * config/tc-tic30.c (output_invalid_buf): Likewise.
1269
1270 * config/tc-i386.c (output_invalid): Use snprintf instead of
1271 sprintf.
1272 * config/tc-ia64.c (declare_register_set): Likewise.
1273 (emit_one_bundle): Likewise.
1274 (check_dependencies): Likewise.
1275 * config/tc-tic30.c (output_invalid): Likewise.
1276
a8bc6c78
PB
12772006-05-02 Paul Brook <paul@codesourcery.com>
1278
1279 * config/tc-arm.c (arm_optimize_expr): New function.
1280 * config/tc-arm.h (md_optimize_expr): Define
1281 (arm_optimize_expr): Add prototype.
1282 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1283
58633d9a
BE
12842006-05-02 Ben Elliston <bje@au.ibm.com>
1285
22772e33
BE
1286 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1287 field unsigned.
1288
58633d9a
BE
1289 * sb.h (sb_list_vector): Move to sb.c.
1290 * sb.c (free_list): Use type of sb_list_vector directly.
1291 (sb_build): Fix off-by-one error in assertion about `size'.
1292
89cdfe57
BE
12932006-05-01 Ben Elliston <bje@au.ibm.com>
1294
1295 * listing.c (listing_listing): Remove useless loop.
1296 * macro.c (macro_expand): Remove is_positional local variable.
1297 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1298 and simplify surrounding expressions, where possible.
1299 (assign_symbol): Likewise.
1300 (s_weakref): Likewise.
1301 * symbols.c (colon): Likewise.
1302
c35da140
AM
13032006-05-01 James Lemke <jwlemke@wasabisystems.com>
1304
1305 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1306
9bcd4f99
TS
13072006-04-30 Thiemo Seufer <ths@mips.com>
1308 David Ung <davidu@mips.com>
1309
1310 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1311 (mips_immed): New table that records various handling of udi
1312 instruction patterns.
1313 (mips_ip): Adds udi handling.
1314
001ae1a4
AM
13152006-04-28 Alan Modra <amodra@bigpond.net.au>
1316
1317 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1318 of list rather than beginning.
1319
136da414
JB
13202006-04-26 Julian Brown <julian@codesourcery.com>
1321
1322 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1323 (is_quarter_float): Rename from above. Simplify slightly.
1324 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1325 number.
1326 (parse_neon_mov): Parse floating-point constants.
1327 (neon_qfloat_bits): Fix encoding.
1328 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1329 preference to integer encoding when using the F32 type.
1330
dcbf9037
JB
13312006-04-26 Julian Brown <julian@codesourcery.com>
1332
1333 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1334 zero-initialising structures containing it will lead to invalid types).
1335 (arm_it): Add vectype to each operand.
1336 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1337 defined field.
1338 (neon_typed_alias): New structure. Extra information for typed
1339 register aliases.
1340 (reg_entry): Add neon type info field.
1341 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1342 Break out alternative syntax for coprocessor registers, etc. into...
1343 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1344 out from arm_reg_parse.
1345 (parse_neon_type): Move. Return SUCCESS/FAIL.
1346 (first_error): New function. Call to ensure first error which occurs is
1347 reported.
1348 (parse_neon_operand_type): Parse exactly one type.
1349 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1350 (parse_typed_reg_or_scalar): New function. Handle core of both
1351 arm_typed_reg_parse and parse_scalar.
1352 (arm_typed_reg_parse): Parse a register with an optional type.
1353 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1354 result.
1355 (parse_scalar): Parse a Neon scalar with optional type.
1356 (parse_reg_list): Use first_error.
1357 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1358 (neon_alias_types_same): New function. Return true if two (alias) types
1359 are the same.
1360 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1361 of elements.
1362 (insert_reg_alias): Return new reg_entry not void.
1363 (insert_neon_reg_alias): New function. Insert type/index information as
1364 well as register for alias.
1365 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1366 make typed register aliases accordingly.
1367 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1368 of line.
1369 (s_unreq): Delete type information if present.
1370 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1371 (s_arm_unwind_save_mmxwcg): Likewise.
1372 (s_arm_unwind_movsp): Likewise.
1373 (s_arm_unwind_setfp): Likewise.
1374 (parse_shift): Likewise.
1375 (parse_shifter_operand): Likewise.
1376 (parse_address): Likewise.
1377 (parse_tb): Likewise.
1378 (tc_arm_regname_to_dw2regnum): Likewise.
1379 (md_pseudo_table): Add dn, qn.
1380 (parse_neon_mov): Handle typed operands.
1381 (parse_operands): Likewise.
1382 (neon_type_mask): Add N_SIZ.
1383 (N_ALLMODS): New macro.
1384 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1385 (el_type_of_type_chk): Add some safeguards.
1386 (modify_types_allowed): Fix logic bug.
1387 (neon_check_type): Handle operands with types.
1388 (neon_three_same): Remove redundant optional arg handling.
1389 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1390 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1391 (do_neon_step): Adjust accordingly.
1392 (neon_cmode_for_logic_imm): Use first_error.
1393 (do_neon_bitfield): Call neon_check_type.
1394 (neon_dyadic): Rename to...
1395 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1396 to allow modification of type of the destination.
1397 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1398 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1399 (do_neon_compare): Make destination be an untyped bitfield.
1400 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1401 (neon_mul_mac): Return early in case of errors.
1402 (neon_move_immediate): Use first_error.
1403 (neon_mac_reg_scalar_long): Fix type to include scalar.
1404 (do_neon_dup): Likewise.
1405 (do_neon_mov): Likewise (in several places).
1406 (do_neon_tbl_tbx): Fix type.
1407 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1408 (do_neon_ld_dup): Exit early in case of errors and/or use
1409 first_error.
1410 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1411 Handle .dn/.qn directives.
1412 (REGDEF): Add zero for reg_entry neon field.
1413
5287ad62
JB
14142006-04-26 Julian Brown <julian@codesourcery.com>
1415
1416 * config/tc-arm.c (limits.h): Include.
1417 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1418 (fpu_vfp_v3_or_neon_ext): Declare constants.
1419 (neon_el_type): New enumeration of types for Neon vector elements.
1420 (neon_type_el): New struct. Define type and size of a vector element.
1421 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1422 instruction.
1423 (neon_type): Define struct. The type of an instruction.
1424 (arm_it): Add 'vectype' for the current instruction.
1425 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1426 (vfp_sp_reg_pos): Rename to...
1427 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1428 tags.
1429 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1430 (Neon D or Q register).
1431 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1432 register.
1433 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1434 (my_get_expression): Allow above constant as argument to accept
1435 64-bit constants with optional prefix.
1436 (arm_reg_parse): Add extra argument to return the specific type of
1437 register in when either a D or Q register (REG_TYPE_NDQ) is
1438 requested. Can be NULL.
1439 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1440 (parse_reg_list): Update for new arm_reg_parse args.
1441 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1442 (parse_neon_el_struct_list): New function. Parse element/structure
1443 register lists for VLD<n>/VST<n> instructions.
1444 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1445 (s_arm_unwind_save_mmxwr): Likewise.
1446 (s_arm_unwind_save_mmxwcg): Likewise.
1447 (s_arm_unwind_movsp): Likewise.
1448 (s_arm_unwind_setfp): Likewise.
1449 (parse_big_immediate): New function. Parse an immediate, which may be
1450 64 bits wide. Put results in inst.operands[i].
1451 (parse_shift): Update for new arm_reg_parse args.
1452 (parse_address): Likewise. Add parsing of alignment specifiers.
1453 (parse_neon_mov): Parse the operands of a VMOV instruction.
1454 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1455 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1456 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1457 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1458 (parse_operands): Handle new codes above.
1459 (encode_arm_vfp_sp_reg): Rename to...
1460 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1461 selected VFP version only supports D0-D15.
1462 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1463 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1464 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1465 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1466 encode_arm_vfp_reg name, and allow 32 D regs.
1467 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1468 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1469 regs.
1470 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1471 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1472 constant-load and conversion insns introduced with VFPv3.
1473 (neon_tab_entry): New struct.
1474 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1475 those which are the targets of pseudo-instructions.
1476 (neon_opc): Enumerate opcodes, use as indices into...
1477 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1478 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1479 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1480 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1481 neon_enc_tab.
1482 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1483 Neon instructions.
1484 (neon_type_mask): New. Compact type representation for type checking.
1485 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1486 permitted type combinations.
1487 (N_IGNORE_TYPE): New macro.
1488 (neon_check_shape): New function. Check an instruction shape for
1489 multiple alternatives. Return the specific shape for the current
1490 instruction.
1491 (neon_modify_type_size): New function. Modify a vector type and size,
1492 depending on the bit mask in argument 1.
1493 (neon_type_promote): New function. Convert a given "key" type (of an
1494 operand) into the correct type for a different operand, based on a bit
1495 mask.
1496 (type_chk_of_el_type): New function. Convert a type and size into the
1497 compact representation used for type checking.
1498 (el_type_of_type_ckh): New function. Reverse of above (only when a
1499 single bit is set in the bit mask).
1500 (modify_types_allowed): New function. Alter a mask of allowed types
1501 based on a bit mask of modifications.
1502 (neon_check_type): New function. Check the type of the current
1503 instruction against the variable argument list. The "key" type of the
1504 instruction is returned.
1505 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1506 a Neon data-processing instruction depending on whether we're in ARM
1507 mode or Thumb-2 mode.
1508 (neon_logbits): New function.
1509 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1510 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1511 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1512 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1513 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1514 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1515 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1516 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1517 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1518 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1519 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1520 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1521 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1522 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1523 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1524 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1525 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1526 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1527 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1528 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1529 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1530 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1531 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1532 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1533 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1534 helpers.
1535 (parse_neon_type): New function. Parse Neon type specifier.
1536 (opcode_lookup): Allow parsing of Neon type specifiers.
1537 (REGNUM2, REGSETH, REGSET2): New macros.
1538 (reg_names): Add new VFPv3 and Neon registers.
1539 (NUF, nUF, NCE, nCE): New macros for opcode table.
1540 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1541 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1542 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1543 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1544 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1545 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1546 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1547 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1548 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1549 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1550 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1551 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1552 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1553 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1554 fto[us][lh][sd].
1555 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1556 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1557 (arm_option_cpu_value): Add vfp3 and neon.
1558 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1559 VFPv1 attribute.
1560
1946c96e
BW
15612006-04-25 Bob Wilson <bob.wilson@acm.org>
1562
1563 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1564 syntax instead of hardcoded opcodes with ".w18" suffixes.
1565 (wide_branch_opcode): New.
1566 (build_transition): Use it to check for wide branch opcodes with
1567 either ".w18" or ".w15" suffixes.
1568
5033a645
BW
15692006-04-25 Bob Wilson <bob.wilson@acm.org>
1570
1571 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1572 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1573 frag's is_literal flag.
1574
395fa56f
BW
15752006-04-25 Bob Wilson <bob.wilson@acm.org>
1576
1577 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1578
708587a4
KH
15792006-04-23 Kazu Hirata <kazu@codesourcery.com>
1580
1581 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1582 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1583 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1584 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1585 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1586
8463be01
PB
15872005-04-20 Paul Brook <paul@codesourcery.com>
1588
1589 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1590 all targets.
1591 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1592
f26a5955
AM
15932006-04-19 Alan Modra <amodra@bigpond.net.au>
1594
1595 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1596 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1597 Make some cpus unsupported on ELF. Run "make dep-am".
1598 * Makefile.in: Regenerate.
1599
241a6c40
AM
16002006-04-19 Alan Modra <amodra@bigpond.net.au>
1601
1602 * configure.in (--enable-targets): Indent help message.
1603 * configure: Regenerate.
1604
bb8f5920
L
16052006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1606
1607 PR gas/2533
1608 * config/tc-i386.c (i386_immediate): Check illegal immediate
1609 register operand.
1610
23d9d9de
AM
16112006-04-18 Alan Modra <amodra@bigpond.net.au>
1612
64e74474
AM
1613 * config/tc-i386.c: Formatting.
1614 (output_disp, output_imm): ISO C90 params.
1615
6cbe03fb
AM
1616 * frags.c (frag_offset_fixed_p): Constify args.
1617 * frags.h (frag_offset_fixed_p): Ditto.
1618
23d9d9de
AM
1619 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1620 (COFF_MAGIC): Delete.
a37d486e
AM
1621
1622 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1623
e7403566
DJ
16242006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1625
1626 * po/POTFILES.in: Regenerated.
1627
58ab4f3d
MM
16282006-04-16 Mark Mitchell <mark@codesourcery.com>
1629
1630 * doc/as.texinfo: Mention that some .type syntaxes are not
1631 supported on all architectures.
1632
482fd9f9
BW
16332006-04-14 Sterling Augustine <sterling@tensilica.com>
1634
1635 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1636 instructions when such transformations have been disabled.
1637
05d58145
BW
16382006-04-10 Sterling Augustine <sterling@tensilica.com>
1639
1640 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1641 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1642 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1643 decoding the loop instructions. Remove current_offset variable.
1644 (xtensa_fix_short_loop_frags): Likewise.
1645 (min_bytes_to_other_loop_end): Remove current_offset argument.
1646
9e75b3fa
AM
16472006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1648
a37d486e 1649 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1650 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1651
d727e8c2
NC
16522006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1653
1654 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1655 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1656 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1657 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1658 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1659 at90can64, at90usb646, at90usb647, at90usb1286 and
1660 at90usb1287.
1661 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1662
d252fdde
PB
16632006-04-07 Paul Brook <paul@codesourcery.com>
1664
1665 * config/tc-arm.c (parse_operands): Set default error message.
1666
ab1eb5fe
PB
16672006-04-07 Paul Brook <paul@codesourcery.com>
1668
1669 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1670
7ae2971b
PB
16712006-04-07 Paul Brook <paul@codesourcery.com>
1672
1673 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1674
53365c0d
PB
16752006-04-07 Paul Brook <paul@codesourcery.com>
1676
1677 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1678 (move_or_literal_pool): Handle Thumb-2 instructions.
1679 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1680
45aa61fe
AM
16812006-04-07 Alan Modra <amodra@bigpond.net.au>
1682
1683 PR 2512.
1684 * config/tc-i386.c (match_template): Move 64-bit operand tests
1685 inside loop.
1686
108a6f8e
CD
16872006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1688
1689 * po/Make-in: Add install-html target.
1690 * Makefile.am: Add install-html and install-html-recursive targets.
1691 * Makefile.in: Regenerate.
1692 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1693 * configure: Regenerate.
1694 * doc/Makefile.am: Add install-html and install-html-am targets.
1695 * doc/Makefile.in: Regenerate.
1696
ec651a3b
AM
16972006-04-06 Alan Modra <amodra@bigpond.net.au>
1698
1699 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1700 second scan.
1701
910600e9
RS
17022006-04-05 Richard Sandiford <richard@codesourcery.com>
1703 Daniel Jacobowitz <dan@codesourcery.com>
1704
1705 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1706 (GOTT_BASE, GOTT_INDEX): New.
1707 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1708 GOTT_INDEX when generating VxWorks PIC.
1709 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1710 use the generic *-*-vxworks* stanza instead.
1711
99630778
AM
17122006-04-04 Alan Modra <amodra@bigpond.net.au>
1713
1714 PR 997
1715 * frags.c (frag_offset_fixed_p): New function.
1716 * frags.h (frag_offset_fixed_p): Declare.
1717 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1718 (resolve_expression): Likewise.
1719
a02728c8
BW
17202006-04-03 Sterling Augustine <sterling@tensilica.com>
1721
1722 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1723 of the same length but different numbers of slots.
1724
9dfde49d
AS
17252006-03-30 Andreas Schwab <schwab@suse.de>
1726
1727 * configure.in: Fix help string for --enable-targets option.
1728 * configure: Regenerate.
1729
2da12c60
NS
17302006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1731
6d89cc8f
NS
1732 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1733 (m68k_ip): ... here. Use for all chips. Protect against buffer
1734 overrun and avoid excessive copying.
1735
2da12c60
NS
1736 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1737 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1738 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1739 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1740 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1741 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1742 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1743 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1744 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1745 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1746 (struct m68k_cpu): Change chip field to control_regs.
1747 (current_chip): Remove.
1748 (control_regs): New.
1749 (m68k_archs, m68k_extensions): Adjust.
1750 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1751 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1752 (find_cf_chip): Reimplement for new organization of cpu table.
1753 (select_control_regs): Remove.
1754 (mri_chip): Adjust.
1755 (struct save_opts): Save control regs, not chip.
1756 (s_save, s_restore): Adjust.
1757 (m68k_lookup_cpu): Give deprecated warning when necessary.
1758 (m68k_init_arch): Adjust.
1759 (md_show_usage): Adjust for new cpu table organization.
1760
1ac4baed
BS
17612006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1762
1763 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1764 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1765 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1766 "elf/bfin.h".
1767 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1768 (any_gotrel): New rule.
1769 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1770 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1771 "elf/bfin.h".
1772 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1773 (bfin_pic_ptr): New function.
1774 (md_pseudo_table): Add it for ".picptr".
1775 (OPTION_FDPIC): New macro.
1776 (md_longopts): Add -mfdpic.
1777 (md_parse_option): Handle it.
1778 (md_begin): Set BFD flags.
1779 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1780 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1781 us for GOT relocs.
1782 * Makefile.am (bfin-parse.o): Update dependencies.
1783 (DEPTC_bfin_elf): Likewise.
1784 * Makefile.in: Regenerate.
1785
a9d34880
RS
17862006-03-25 Richard Sandiford <richard@codesourcery.com>
1787
1788 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1789 mcfemac instead of mcfmac.
1790
9ca26584
AJ
17912006-03-23 Michael Matz <matz@suse.de>
1792
1793 * config/tc-i386.c (type_names): Correct placement of 'static'.
1794 (reloc): Map some more relocs to their 64 bit counterpart when
1795 size is 8.
1796 (output_insn): Work around breakage if DEBUG386 is defined.
1797 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1798 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1799 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1800 different from i386.
1801 (output_imm): Ditto.
1802 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1803 Imm64.
1804 (md_convert_frag): Jumps can now be larger than 2GB away, error
1805 out in that case.
1806 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1807 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1808
0a44bf69
RS
18092006-03-22 Richard Sandiford <richard@codesourcery.com>
1810 Daniel Jacobowitz <dan@codesourcery.com>
1811 Phil Edwards <phil@codesourcery.com>
1812 Zack Weinberg <zack@codesourcery.com>
1813 Mark Mitchell <mark@codesourcery.com>
1814 Nathan Sidwell <nathan@codesourcery.com>
1815
1816 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1817 (md_begin): Complain about -G being used for PIC. Don't change
1818 the text, data and bss alignments on VxWorks.
1819 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1820 generating VxWorks PIC.
1821 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1822 (macro): Likewise, but do not treat la $25 specially for
1823 VxWorks PIC, and do not handle jal.
1824 (OPTION_MVXWORKS_PIC): New macro.
1825 (md_longopts): Add -mvxworks-pic.
1826 (md_parse_option): Don't complain about using PIC and -G together here.
1827 Handle OPTION_MVXWORKS_PIC.
1828 (md_estimate_size_before_relax): Always use the first relaxation
1829 sequence on VxWorks.
1830 * config/tc-mips.h (VXWORKS_PIC): New.
1831
080eb7fe
PB
18322006-03-21 Paul Brook <paul@codesourcery.com>
1833
1834 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1835
03aaa593
BW
18362006-03-21 Sterling Augustine <sterling@tensilica.com>
1837
1838 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1839 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1840 (get_loop_align_size): New.
1841 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1842 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1843 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1844 (get_noop_aligned_address): Use get_loop_align_size.
1845 (get_aligned_diff): Likewise.
1846
3e94bf1a
PB
18472006-03-21 Paul Brook <paul@codesourcery.com>
1848
1849 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1850
dfa9f0d5
PB
18512006-03-20 Paul Brook <paul@codesourcery.com>
1852
1853 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1854 (do_t_branch): Encode branches inside IT blocks as unconditional.
1855 (do_t_cps): New function.
1856 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1857 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1858 (opcode_lookup): Allow conditional suffixes on all instructions in
1859 Thumb mode.
1860 (md_assemble): Advance condexec state before checking for errors.
1861 (insns): Use do_t_cps.
1862
6e1cb1a6
PB
18632006-03-20 Paul Brook <paul@codesourcery.com>
1864
1865 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1866 outputting the insn.
1867
0a966e2d
JBG
18682006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1869
1870 * config/tc-vax.c: Update copyright year.
1871 * config/tc-vax.h: Likewise.
1872
a49fcc17
JBG
18732006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1874
1875 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1876 make it static.
1877 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1878
f5208ef2
PB
18792006-03-17 Paul Brook <paul@codesourcery.com>
1880
1881 * config/tc-arm.c (insns): Add ldm and stm.
1882
cb4c78d6
BE
18832006-03-17 Ben Elliston <bje@au.ibm.com>
1884
1885 PR gas/2446
1886 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1887
c16d2bf0
PB
18882006-03-16 Paul Brook <paul@codesourcery.com>
1889
1890 * config/tc-arm.c (insns): Add "svc".
1891
80ca4e2c
BW
18922006-03-13 Bob Wilson <bob.wilson@acm.org>
1893
1894 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1895 flag and avoid double underscore prefixes.
1896
3a4a14e9
PB
18972006-03-10 Paul Brook <paul@codesourcery.com>
1898
1899 * config/tc-arm.c (md_begin): Handle EABIv5.
1900 (arm_eabis): Add EF_ARM_EABI_VER5.
1901 * doc/c-arm.texi: Document -meabi=5.
1902
518051dc
BE
19032006-03-10 Ben Elliston <bje@au.ibm.com>
1904
1905 * app.c (do_scrub_chars): Simplify string handling.
1906
00a97672
RS
19072006-03-07 Richard Sandiford <richard@codesourcery.com>
1908 Daniel Jacobowitz <dan@codesourcery.com>
1909 Zack Weinberg <zack@codesourcery.com>
1910 Nathan Sidwell <nathan@codesourcery.com>
1911 Paul Brook <paul@codesourcery.com>
1912 Ricardo Anguiano <anguiano@codesourcery.com>
1913 Phil Edwards <phil@codesourcery.com>
1914
1915 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1916 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1917 R_ARM_ABS12 reloc.
1918 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1919 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1920 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1921
b29757dc
BW
19222006-03-06 Bob Wilson <bob.wilson@acm.org>
1923
1924 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1925 even when using the text-section-literals option.
1926
0b2e31dc
NS
19272006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1928
1929 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1930 and cf.
1931 (m68k_ip): <case 'J'> Check we have some control regs.
1932 (md_parse_option): Allow raw arch switch.
1933 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1934 whether 68881 or cfloat was meant by -mfloat.
1935 (md_show_usage): Adjust extension display.
1936 (m68k_elf_final_processing): Adjust.
1937
df406460
NC
19382006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1939
1940 * config/tc-avr.c (avr_mod_hash_value): New function.
1941 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1942 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1943 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1944 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1945 of (int).
1946 (tc_gen_reloc): Handle substractions of symbols, if possible do
1947 fixups, abort otherwise.
1948 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1949 tc_fix_adjustable): Define.
1950
53022e4a
JW
19512006-03-02 James E Wilson <wilson@specifix.com>
1952
1953 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1954 change the template, then clear md.slot[curr].end_of_insn_group.
1955
9f6f925e
JB
19562006-02-28 Jan Beulich <jbeulich@novell.com>
1957
1958 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1959
0e31b3e1
JB
19602006-02-28 Jan Beulich <jbeulich@novell.com>
1961
1962 PR/1070
1963 * macro.c (getstring): Don't treat parentheses special anymore.
1964 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1965 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1966 characters.
1967
10cd14b4
AM
19682006-02-28 Mat <mat@csail.mit.edu>
1969
1970 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1971
63752a75
JJ
19722006-02-27 Jakub Jelinek <jakub@redhat.com>
1973
1974 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1975 field.
1976 (CFI_signal_frame): Define.
1977 (cfi_pseudo_table): Add .cfi_signal_frame.
1978 (dot_cfi): Handle CFI_signal_frame.
1979 (output_cie): Handle cie->signal_frame.
1980 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1981 different. Copy signal_frame from FDE to newly created CIE.
1982 * doc/as.texinfo: Document .cfi_signal_frame.
1983
f7d9e5c3
CD
19842006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1985
1986 * doc/Makefile.am: Add html target.
1987 * doc/Makefile.in: Regenerate.
1988 * po/Make-in: Add html target.
1989
331d2d0d
L
19902006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1991
8502d882 1992 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
1993 Instructions.
1994
8502d882 1995 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
1996 (CpuUnknownFlags): Add CpuMNI.
1997
10156f83
DM
19982006-02-24 David S. Miller <davem@sunset.davemloft.net>
1999
2000 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2001 (hpriv_reg_table): New table for hyperprivileged registers.
2002 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2003 register encoding.
2004
6772dd07
DD
20052006-02-24 DJ Delorie <dj@redhat.com>
2006
2007 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2008 (tc_gen_reloc): Don't define.
2009 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2010 (OPTION_LINKRELAX): New.
2011 (md_longopts): Add it.
2012 (m32c_relax): New.
2013 (md_parse_options): Set it.
2014 (md_assemble): Emit relaxation relocs as needed.
2015 (md_convert_frag): Emit relaxation relocs as needed.
2016 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2017 (m32c_apply_fix): New.
2018 (tc_gen_reloc): New.
2019 (m32c_force_relocation): Force out jump relocs when relaxing.
2020 (m32c_fix_adjustable): Return false if relaxing.
2021
62b3e311
PB
20222006-02-24 Paul Brook <paul@codesourcery.com>
2023
2024 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2025 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2026 (struct asm_barrier_opt): Define.
2027 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2028 (parse_psr): Accept V7M psr names.
2029 (parse_barrier): New function.
2030 (enum operand_parse_code): Add OP_oBARRIER.
2031 (parse_operands): Implement OP_oBARRIER.
2032 (do_barrier): New function.
2033 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2034 (do_t_cpsi): Add V7M restrictions.
2035 (do_t_mrs, do_t_msr): Validate V7M variants.
2036 (md_assemble): Check for NULL variants.
2037 (v7m_psrs, barrier_opt_names): New tables.
2038 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2039 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2040 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2041 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2042 (struct cpu_arch_ver_table): Define.
2043 (cpu_arch_ver): New.
2044 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2045 Tag_CPU_arch_profile.
2046 * doc/c-arm.texi: Document new cpu and arch options.
2047
59cf82fe
L
20482006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2049
2050 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2051
19a7219f
L
20522006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2053
2054 * config/tc-ia64.c: Update copyright years.
2055
7f3dfb9c
L
20562006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2057
2058 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2059 SDM 2.2.
2060
f40d1643
PB
20612005-02-22 Paul Brook <paul@codesourcery.com>
2062
2063 * config/tc-arm.c (do_pld): Remove incorrect write to
2064 inst.instruction.
2065 (encode_thumb32_addr_mode): Use correct operand.
2066
216d22bc
PB
20672006-02-21 Paul Brook <paul@codesourcery.com>
2068
2069 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2070
d70c5fc7
NC
20712006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2072 Anil Paranjape <anilp1@kpitcummins.com>
2073 Shilin Shakti <shilins@kpitcummins.com>
2074
2075 * Makefile.am: Add xc16x related entry.
2076 * Makefile.in: Regenerate.
2077 * configure.in: Added xc16x related entry.
2078 * configure: Regenerate.
2079 * config/tc-xc16x.h: New file
2080 * config/tc-xc16x.c: New file
2081 * doc/c-xc16x.texi: New file for xc16x
2082 * doc/all.texi: Entry for xc16x
2083 * doc/Makefile.texi: Added c-xc16x.texi
2084 * NEWS: Announce the support for the new target.
2085
aaa2ab3d
NH
20862006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2087
2088 * configure.tgt: set emulation for mips-*-netbsd*
2089
82de001f
JJ
20902006-02-14 Jakub Jelinek <jakub@redhat.com>
2091
2092 * config.in: Rebuilt.
2093
431ad2d0
BW
20942006-02-13 Bob Wilson <bob.wilson@acm.org>
2095
2096 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2097 from 1, not 0, in error messages.
2098 (md_assemble): Simplify special-case check for ENTRY instructions.
2099 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2100 operand in error message.
2101
94089a50
JM
21022006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2103
2104 * configure.tgt (arm-*-linux-gnueabi*): Change to
2105 arm-*-linux-*eabi*.
2106
52de4c06
NC
21072006-02-10 Nick Clifton <nickc@redhat.com>
2108
70e45ad9
NC
2109 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2110 32-bit value is propagated into the upper bits of a 64-bit long.
2111
52de4c06
NC
2112 * config/tc-arc.c (init_opcode_tables): Fix cast.
2113 (arc_extoper, md_operand): Likewise.
2114
21af2bbd
BW
21152006-02-09 David Heine <dlheine@tensilica.com>
2116
2117 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2118 each relaxation step.
2119
75a706fc
L
21202006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2121
2122 * configure.in (CHECK_DECLS): Add vsnprintf.
2123 * configure: Regenerate.
2124 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2125 include/declare here, but...
2126 * as.h: Move code detecting VARARGS idiom to the top.
2127 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2128 (vsnprintf): Declare if not already declared.
2129
0d474464
L
21302006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2131
2132 * as.c (close_output_file): New.
2133 (main): Register close_output_file with xatexit before
2134 dump_statistics. Don't call output_file_close.
2135
266abb8f
NS
21362006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2137
2138 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2139 mcf5329_control_regs): New.
2140 (not_current_architecture, selected_arch, selected_cpu): New.
2141 (m68k_archs, m68k_extensions): New.
2142 (archs): Renamed to ...
2143 (m68k_cpus): ... here. Adjust.
2144 (n_arches): Remove.
2145 (md_pseudo_table): Add arch and cpu directives.
2146 (find_cf_chip, m68k_ip): Adjust table scanning.
2147 (no_68851, no_68881): Remove.
2148 (md_assemble): Lazily initialize.
2149 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2150 (md_init_after_args): Move functionality to m68k_init_arch.
2151 (mri_chip): Adjust table scanning.
2152 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2153 options with saner parsing.
2154 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2155 m68k_init_arch): New.
2156 (s_m68k_cpu, s_m68k_arch): New.
2157 (md_show_usage): Adjust.
2158 (m68k_elf_final_processing): Set CF EF flags.
2159 * config/tc-m68k.h (m68k_init_after_args): Remove.
2160 (tc_init_after_args): Remove.
2161 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2162 (M68k-Directives): Document .arch and .cpu directives.
2163
134dcee5
AM
21642006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2165
2166 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2167 synonyms for equ and defl.
2168 (z80_cons_fix_new): New function.
2169 (emit_byte): Disallow relative jumps to absolute locations.
2170 (emit_data): Only handle defb, prototype changed, because defb is
2171 now handled as pseudo-op rather than an instruction.
2172 (instab): Entries for defb,defw,db,dw moved from here...
2173 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2174 Add entries for def24,def32,d24,d32.
2175 (md_assemble): Improved error handling.
2176 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2177 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2178 (z80_cons_fix_new): Declare.
2179 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2180 (def24,d24,def32,d32): New pseudo-ops.
2181
a9931606
PB
21822006-02-02 Paul Brook <paul@codesourcery.com>
2183
2184 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2185
ef8d22e6
PB
21862005-02-02 Paul Brook <paul@codesourcery.com>
2187
2188 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2189 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2190 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2191 T2_OPCODE_RSB): Define.
2192 (thumb32_negate_data_op): New function.
2193 (md_apply_fix): Use it.
2194
e7da6241
BW
21952006-01-31 Bob Wilson <bob.wilson@acm.org>
2196
2197 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2198 fields.
2199 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2200 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2201 subtracted symbols.
2202 (relaxation_requirements): Add pfinish_frag argument and use it to
2203 replace setting tinsn->record_fix fields.
2204 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2205 and vinsn_to_insnbuf. Remove references to record_fix and
2206 slot_sub_symbols fields.
2207 (xtensa_mark_narrow_branches): Delete unused code.
2208 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2209 a symbol.
2210 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2211 record_fix fields.
2212 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2213 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2214 of the record_fix field. Simplify error messages for unexpected
2215 symbolic operands.
2216 (set_expr_symbol_offset_diff): Delete.
2217
79134647
PB
22182006-01-31 Paul Brook <paul@codesourcery.com>
2219
2220 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2221
e74cfd16
PB
22222006-01-31 Paul Brook <paul@codesourcery.com>
2223 Richard Earnshaw <rearnsha@arm.com>
2224
2225 * config/tc-arm.c: Use arm_feature_set.
2226 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2227 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2228 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2229 New variables.
2230 (insns): Use them.
2231 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2232 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2233 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2234 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2235 feature flags.
2236 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2237 (arm_opts): Move old cpu/arch options from here...
2238 (arm_legacy_opts): ... to here.
2239 (md_parse_option): Search arm_legacy_opts.
2240 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2241 (arm_float_abis, arm_eabis): Make const.
2242
d47d412e
BW
22432006-01-25 Bob Wilson <bob.wilson@acm.org>
2244
2245 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2246
b14273fe
JZ
22472006-01-21 Jie Zhang <jie.zhang@analog.com>
2248
2249 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2250 in load immediate intruction.
2251
39cd1c76
JZ
22522006-01-21 Jie Zhang <jie.zhang@analog.com>
2253
2254 * config/bfin-parse.y (value_match): Use correct conversion
2255 specifications in template string for __FILE__ and __LINE__.
2256 (binary): Ditto.
2257 (unary): Ditto.
2258
67a4f2b7
AO
22592006-01-18 Alexandre Oliva <aoliva@redhat.com>
2260
2261 Introduce TLS descriptors for i386 and x86_64.
2262 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2263 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2264 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2265 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2266 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2267 displacement bits.
2268 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2269 (lex_got): Handle @tlsdesc and @tlscall.
2270 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2271
8ad7c533
NC
22722006-01-11 Nick Clifton <nickc@redhat.com>
2273
2274 Fixes for building on 64-bit hosts:
2275 * config/tc-avr.c (mod_index): New union to allow conversion
2276 between pointers and integers.
2277 (md_begin, avr_ldi_expression): Use it.
2278 * config/tc-i370.c (md_assemble): Add cast for argument to print
2279 statement.
2280 * config/tc-tic54x.c (subsym_substitute): Likewise.
2281 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2282 opindex field of fr_cgen structure into a pointer so that it can
2283 be stored in a frag.
2284 * config/tc-mn10300.c (md_assemble): Likewise.
2285 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2286 types.
2287 * config/tc-v850.c: Replace uses of (int) casts with correct
2288 types.
2289
4dcb3903
L
22902006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2291
2292 PR gas/2117
2293 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2294
e0f6ea40
HPN
22952006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2296
2297 PR gas/2101
2298 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2299 a local-label reference.
2300
e88d958a 2301For older changes see ChangeLog-2005
08d56133
NC
2302\f
2303Local Variables:
2304mode: change-log
2305left-margin: 8
2306fill-column: 74
2307version-control: never
2308End:
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