* ld-powerpc/plt1.s: New.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ede602d7
AM
12006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
2
3 * doc/c-ppc.texi (-mcell): Document.
4 * config/tc-ppc.c (parse_cpu): Parse -mcell.
5 (md_show_usage): Document -mcell.
6
7918206c
MM
72006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
8
9 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
10
878bcc43
AM
112006-10-23 Alan Modra <amodra@bigpond.net.au>
12
13 * config/tc-m68hc11.c (md_assemble): Quiet warning.
14
8620418b
MF
152006-10-19 Mike Frysinger <vapier@gentoo.org>
16
17 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
18 (x86_64_section_letter): Likewise.
19
b3549761
NC
202006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
21
22 * config/tc-score.c (build_relax_frag): Compute correct
23 tc_frag_data.fixp.
24
71a75f6f
MF
252006-10-18 Roy Marples <uberlord@gentoo.org>
26
27 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
28 elf32-sparc as a viable target for the -32 switch and any target
29 starting with elf64-sparc as a viable target for the -64 switch.
30 (sparc_target_format): For 64-bit ELF flavoured output use
31 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
32 ELF_TARGET_FORMAT.
71a75f6f
MF
33 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
34
e1b5fdd4
L
352006-10-17 H.J. Lu <hongjiu.lu@intel.com>
36
37 * configure: Regenerated.
38
f8ef9cd7
BS
392006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
40
41 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
42 in addition to testing for '\n'.
43 (TC_EOL_IN_INSN): Provide a default definition if necessary.
44
eb1fe072
NC
452006-10-13 Sterling Augstine <sterling@tensilica.com>
46
47 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
48 a disjoint DW_AT range.
49
ec6e49f4
NC
502006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
51
52 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
53
036dc3f7
PB
542006-10-08 Paul Brook <paul@codesourcery.com>
55
56 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
57 (parse_operands): Use parse_big_immediate for OP_NILO.
58 (neon_cmode_for_logic_imm): Try smaller element sizes.
59 (neon_cmode_for_move_imm): Ditto.
60 (do_neon_logic): Handle .i64 pseudo-op.
61
3bb0c887
AM
622006-09-29 Alan Modra <amodra@bigpond.net.au>
63
64 * po/POTFILES.in: Regenerate.
65
ef05d495
L
662006-09-28 H.J. Lu <hongjiu.lu@intel.com>
67
68 * config/tc-i386.h (CpuMNI): Renamed to ...
69 (CpuSSSE3): This.
70 (CpuUnknownFlags): Updated.
71 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
72 and PROCESSOR_MEROM with PROCESSOR_CORE2.
73 * config/tc-i386.c: Updated.
74 * doc/c-i386.texi: Likewise.
a70ae331 75
ef05d495
L
76 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
77
d8ad03e9
NC
782006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
79
80 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
81
df3ca5a3
NC
822006-09-27 Nick Clifton <nickc@redhat.com>
83
84 * output-file.c (output_file_close): Prevent an infinite loop
85 reporting that stdoutput could not be closed.
86
2d447fca
JM
872006-09-26 Mark Shinwell <shinwell@codesourcery.com>
88 Joseph Myers <joseph@codesourcery.com>
89 Ian Lance Taylor <ian@wasabisystems.com>
90 Ben Elliston <bje@wasabisystems.com>
91
92 * config/tc-arm.c (arm_cext_iwmmxt2): New.
93 (enum operand_parse_code): New code OP_RIWR_I32z.
94 (parse_operands): Handle OP_RIWR_I32z.
95 (do_iwmmxt_wmerge): New function.
96 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
97 a register.
98 (do_iwmmxt_wrwrwr_or_imm5): New function.
99 (insns): Mark instructions as RIWR_I32z as appropriate.
100 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
101 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
102 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
103 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
104 (md_begin): Handle IWMMXT2.
105 (arm_cpus): Add iwmmxt2.
106 (arm_extensions): Likewise.
107 (arm_archs): Likewise.
108
ba83aca1
BW
1092006-09-25 Bob Wilson <bob.wilson@acm.org>
110
111 * doc/as.texinfo (Overview): Revise description of --keep-locals.
112 Add xref to "Symbol Names".
113 (L): Refer to "local symbols" instead of "local labels". Move
114 definition to "Symbol Names" section; add xref to that section.
115 (Symbol Names): Use "Local Symbol Names" section to define local
116 symbols. Add "Local Labels" heading for description of temporary
117 forward/backward labels, and refer to those as "local labels".
118
539e75ad
L
1192006-09-23 H.J. Lu <hongjiu.lu@intel.com>
120
121 PR binutils/3235
122 * config/tc-i386.c (match_template): Check address size prefix
123 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
124 operand.
125
5e02f92e
AM
1262006-09-22 Alan Modra <amodra@bigpond.net.au>
127
128 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
129
885afe7b
AM
1302006-09-22 Alan Modra <amodra@bigpond.net.au>
131
132 * as.h (as_perror): Delete declaration.
133 * gdbinit.in (as_perror): Delete breakpoint.
134 * messages.c (as_perror): Delete function.
135 * doc/internals.texi: Remove as_perror description.
136 * listing.c (listing_print: Don't use as_perror.
137 * output-file.c (output_file_create, output_file_close): Likewise.
138 * symbols.c (symbol_create, symbol_clone): Likewise.
139 * write.c (write_contents): Likewise.
140 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
141 * config/tc-tic54x.c (tic54x_mlib): Likewise.
142
3aeeedbb
AM
1432006-09-22 Alan Modra <amodra@bigpond.net.au>
144
145 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
146 (ppc_handle_align): New function.
147 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
148 (SUB_SEGMENT_ALIGN): Define as zero.
149
96e9638b
BW
1502006-09-20 Bob Wilson <bob.wilson@acm.org>
151
152 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
153 (Overview): Skip cross reference in man page.
154
99ad8390
NC
1552006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
156
157 * configure.in: Add new target x86_64-pc-mingw64.
158 * configure: Regenerate.
159 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
160 * config/obj-coff.h: Add handling for TE_PEP target specific code
161 and definitions.
99ad8390
NC
162 * config/tc-i386.c: Add new targets.
163 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
164 (x86_64_target_format): Add new method for setup proper default
165 target cpu mode.
99ad8390
NC
166 * config/te-pep.h: Add new target definition header.
167 (TE_PEP): New macro: Identifies new target architecture.
168 (COFF_WITH_pex64): Set proper includes in bfd.
169 * NEWS: Mention new target.
170
73332571
BS
1712006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
172
173 * config/bfin-parse.y (binary): Change sub of const to add of negated
174 const.
175
1c0d3aa6
NC
1762006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
177
178 * config/tc-score.c: New file.
179 * config/tc-score.h: Newf file.
180 * configure.tgt: Add Score target.
181 * Makefile.am: Add Score files.
182 * Makefile.in: Regenerate.
183 * NEWS: Mention new target support.
184
4fa3602b
PB
1852006-09-16 Paul Brook <paul@codesourcery.com>
186
187 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
188 * doc/c-arm.texi (movsp): Document offset argument.
189
16dd5e42
PB
1902006-09-16 Paul Brook <paul@codesourcery.com>
191
192 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
193 unsigned int to avoid 64-bit host problems.
194
c4ae04ce
BS
1952006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
196
197 * config/bfin-parse.y (binary): Do some more constant folding for
198 additions.
199
e5d4a5a6
JB
2002006-09-13 Jan Beulich <jbeulich@novell.com>
201
202 * input-file.c (input_file_give_next_buffer): Demote as_bad to
203 as_warn.
204
1a1219cb
AM
2052006-09-13 Alan Modra <amodra@bigpond.net.au>
206
207 PR gas/3165
208 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
209 in parens.
210
f79d9c1d
AM
2112006-09-13 Alan Modra <amodra@bigpond.net.au>
212
213 * input-file.c (input_file_open): Replace as_perror with as_bad
214 so that gas exits with error on file errors. Correct error
215 message.
216 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 217 * input-file.h: Update comment.
f79d9c1d 218
f512f76f
NC
2192006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
220
221 PR gas/3172
222 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
223 registers as a sub-class of wC registers.
224
8d79fd44
AM
2252006-09-11 Alan Modra <amodra@bigpond.net.au>
226
227 PR gas/3165
228 * config/tc-mips.h (enum dwarf2_format): Forward declare.
229 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
230 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
231 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
232
6258339f
NC
2332006-09-08 Nick Clifton <nickc@redhat.com>
234
235 PR gas/3129
236 * doc/as.texinfo (Macro): Improve documentation about separating
237 macro arguments from following text.
238
f91e006c
PB
2392006-09-08 Paul Brook <paul@codesourcery.com>
240
241 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
242
466bbf93
PB
2432006-09-07 Paul Brook <paul@codesourcery.com>
244
245 * config/tc-arm.c (parse_operands): Mark operand as present.
246
428e3f1f
PB
2472006-09-04 Paul Brook <paul@codesourcery.com>
248
249 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
250 (do_neon_dyadic_if_i_d): Avoid setting U bit.
251 (do_neon_mac_maybe_scalar): Ditto.
252 (do_neon_dyadic_narrow): Force operand type to NT_integer.
253 (insns): Remove out of date comments.
254
fb25138b
NC
2552006-08-29 Nick Clifton <nickc@redhat.com>
256
257 * read.c (s_align): Initialize the 'stopc' variable to prevent
258 compiler complaints about it being used without being
259 initialized.
260 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
261 s_float_space, s_struct, cons_worker, equals): Likewise.
262
5091343a
AM
2632006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
264
265 * ecoff.c (ecoff_directive_val): Fix message typo.
266 * config/tc-ns32k.c (convert_iif): Likewise.
267 * config/tc-sh64.c (shmedia_check_limits): Likewise.
268
1f2a7e38
BW
2692006-08-25 Sterling Augustine <sterling@tensilica.com>
270 Bob Wilson <bob.wilson@acm.org>
271
272 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
273 the state of the absolute_literals directive. Remove align frag at
274 the start of the literal pool position.
275
34135039
BW
2762006-08-25 Bob Wilson <bob.wilson@acm.org>
277
278 * doc/c-xtensa.texi: Add @group commands in examples.
279
74869ac7
BW
2802006-08-24 Bob Wilson <bob.wilson@acm.org>
281
282 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
283 (INIT_LITERAL_SECTION_NAME): Delete.
284 (lit_state struct): Remove segment names, init_lit_seg, and
285 fini_lit_seg. Add lit_prefix and current_text_seg.
286 (init_literal_head_h, init_literal_head): Delete.
287 (fini_literal_head_h, fini_literal_head): Delete.
288 (xtensa_begin_directive): Move argument parsing to
289 xtensa_literal_prefix function.
290 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
291 (xtensa_literal_prefix): Parse the directive argument here and
292 record it in the lit_prefix field. Remove code to derive literal
293 section names.
294 (linkonce_len): New.
295 (get_is_linkonce_section): Use linkonce_len. Check for any
296 ".gnu.linkonce.*" section, not just text sections.
297 (md_begin): Remove initialization of deleted lit_state fields.
298 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
299 to init_literal_head and fini_literal_head.
300 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
301 when traversing literal_head list.
302 (match_section_group): New.
303 (cache_literal_section): Rewrite to determine the literal section
304 name on the fly, create the section and return it.
305 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
306 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
307 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
308 Use xtensa_get_property_section from bfd.
309 (retrieve_xtensa_section): Delete.
310 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
311 description to refer to plural literal sections and add xref to
312 the Literal Directive section.
313 (Literal Directive): Describe new rules for deriving literal section
314 names. Add footnote for special case of .init/.fini with
315 --text-section-literals.
316 (Literal Prefix Directive): Replace old naming rules with xref to the
317 Literal Directive section.
318
87a1fd79
JM
3192006-08-21 Joseph Myers <joseph@codesourcery.com>
320
321 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
322 merging with previous long opcode.
323
7148cc28
NC
3242006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
325
326 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
327 * Makefile.in: Regenerate.
328 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
329 renamed. Adjust.
330
3e9e4fcf
JB
3312006-08-16 Julian Brown <julian@codesourcery.com>
332
333 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
334 to use ARM instructions on non-ARM-supporting cores.
335 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
336 mode automatically based on cpu variant.
337 (md_begin): Call above function.
338
267d2029
JB
3392006-08-16 Julian Brown <julian@codesourcery.com>
340
341 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
342 recognized in non-unified syntax mode.
343
4be041b2
TS
3442006-08-15 Thiemo Seufer <ths@mips.com>
345 Nigel Stephens <nigel@mips.com>
346 David Ung <davidu@mips.com>
347
348 * configure.tgt: Handle mips*-sde-elf*.
349
3a93f742
TS
3502006-08-12 Thiemo Seufer <ths@networkno.de>
351
352 * config/tc-mips.c (mips16_ip): Fix argument register handling
353 for restore instruction.
354
1737851b
BW
3552006-08-08 Bob Wilson <bob.wilson@acm.org>
356
357 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
358 (out_sleb128): New.
359 (out_fixed_inc_line_addr): New.
360 (process_entries): Use out_fixed_inc_line_addr when
361 DWARF2_USE_FIXED_ADVANCE_PC is set.
362 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
363
e14e52f8
DD
3642006-08-08 DJ Delorie <dj@redhat.com>
365
366 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
367 vs full symbols so that we never have more than one pointer value
368 for any given symbol in our symbol table.
369
802f5d9e
NC
3702006-08-08 Sterling Augustine <sterling@tensilica.com>
371
372 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
373 and emit DW_AT_ranges when code in compilation unit is not
374 contiguous.
375 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
376 is not contiguous.
377 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
378 (out_debug_ranges): New function to emit .debug_ranges section
379 when code is not contiguous.
380
720abc60
NC
3812006-08-08 Nick Clifton <nickc@redhat.com>
382
383 * config/tc-arm.c (WARN_DEPRECATED): Enable.
384
f0927246
NC
3852006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
386
387 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
388 only block.
389 (pe_directive_secrel) [TE_PE]: New function.
390 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
391 loc, loc_mark_labels.
392 [TE_PE]: Handle secrel32.
393 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
394 call.
395 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
396 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
397 (md_section_align): Only round section sizes here for AOUT
398 targets.
399 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
400 (tc_pe_dwarf2_emit_offset): New function.
401 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
402 (cons_fix_new_arm): Handle O_secrel.
403 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
404 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
405 of OBJ_ELF only block.
406 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
407 tc_pe_dwarf2_emit_offset.
408
55e6e397
RS
4092006-08-04 Richard Sandiford <richard@codesourcery.com>
410
411 * config/tc-sh.c (apply_full_field_fix): New function.
412 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
413 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
414 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
415 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
416
9cd19b17
NC
4172006-08-03 Nick Clifton <nickc@redhat.com>
418
419 PR gas/2991
420 * config.in: Regenerate.
421
97f87066
JM
4222006-08-03 Joseph Myers <joseph@codesourcery.com>
423
424 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 425 for OP_RIWR_RIWC.
97f87066 426
41adaa5c
JM
4272006-08-03 Joseph Myers <joseph@codesourcery.com>
428
429 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
430 (parse_operands): Handle it.
431 (insns): Use it for tmcr and tmrc.
432
9d7cbccd
NC
4332006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
434
435 PR binutils/2983
436 * config/tc-i386.c (md_parse_option): Treat any target starting
437 with elf64_x86_64 as a viable target for the -64 switch.
438 (i386_target_format): For 64-bit ELF flavoured output use
439 ELF_TARGET_FORMAT64.
440 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
441
c973bc5c
NC
4422006-08-02 Nick Clifton <nickc@redhat.com>
443
444 PR gas/2991
445 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
446 bfd/aclocal.m4.
447 * configure.in: Run BFD_BINARY_FOPEN.
448 * configure: Regenerate.
449 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
450 file to include.
451
cfde7f70
L
4522006-08-01 H.J. Lu <hongjiu.lu@intel.com>
453
454 * config/tc-i386.c (md_assemble): Don't update
455 cpu_arch_isa_flags.
456
b4c71f56
TS
4572006-08-01 Thiemo Seufer <ths@mips.com>
458
459 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
460
54f4ddb3
TS
4612006-08-01 Thiemo Seufer <ths@mips.com>
462
463 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
464 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
465 BFD_RELOC_32 and BFD_RELOC_16.
466 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
467 md_convert_frag, md_obj_end): Fix comment formatting.
468
d103cf61
TS
4692006-07-31 Thiemo Seufer <ths@mips.com>
470
471 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
472 handling for BFD_RELOC_MIPS16_JMP.
473
601e61cd
NC
4742006-07-24 Andreas Schwab <schwab@suse.de>
475
476 PR/2756
477 * read.c (read_a_source_file): Ignore unknown text after line
478 comment character. Fix misleading comment.
479
b45619c0
NC
4802006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
481
482 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
483 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
484 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
485 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
486 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
487 doc/c-z80.texi, doc/internals.texi: Fix some typos.
488
784906c5
NC
4892006-07-21 Nick Clifton <nickc@redhat.com>
490
491 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
492 linker testsuite.
493
d5f010e9
TS
4942006-07-20 Thiemo Seufer <ths@mips.com>
495 Nigel Stephens <nigel@mips.com>
496
497 * config/tc-mips.c (md_parse_option): Don't infer optimisation
498 options from debug options.
499
35d3d567
TS
5002006-07-20 Thiemo Seufer <ths@mips.com>
501
502 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
503 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
504
401a54cf
PB
5052006-07-19 Paul Brook <paul@codesourcery.com>
506
507 * config/tc-arm.c (insns): Fix rbit Arm opcode.
508
16805f35
PB
5092006-07-18 Paul Brook <paul@codesourcery.com>
510
511 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
512 (md_convert_frag): Use correct reloc for add_pc. Use
513 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
514 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
515 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
516
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5172006-07-17 Mat Hostetter <mat@lcs.mit.edu>
518
519 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
520 when file and line unknown.
521
f43abd2b
TS
5222006-07-17 Thiemo Seufer <ths@mips.com>
523
524 * read.c (s_struct): Use IS_ELF.
525 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
526 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
527 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
528 s_mips_mask): Likewise.
529
a2902af6
TS
5302006-07-16 Thiemo Seufer <ths@mips.com>
531 David Ung <davidu@mips.com>
532
533 * read.c (s_struct): Handle ELF section changing.
534 * config/tc-mips.c (s_align): Leave enabling auto-align to the
535 generic code.
536 (s_change_sec): Try section changing only if we output ELF.
537
d32cad65
L
5382006-07-15 H.J. Lu <hongjiu.lu@intel.com>
539
540 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
541 CpuAmdFam10.
542 (smallest_imm_type): Remove Cpu086.
543 (i386_target_format): Likewise.
544
545 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
546 Update CpuXXX.
547
050dfa73
MM
5482006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
549 Michael Meissner <michael.meissner@amd.com>
550
551 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
552 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
553 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
554 architecture.
555 (i386_align_code): Ditto.
556 (md_assemble_code): Add support for insertq/extrq instructions,
557 swapping as needed for intel syntax.
558 (swap_imm_operands): New function to swap immediate operands.
559 (swap_operands): Deal with 4 operand instructions.
560 (build_modrm_byte): Add support for insertq instruction.
561
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L
5622006-07-13 H.J. Lu <hongjiu.lu@intel.com>
563
564 * config/tc-i386.h (Size64): Fix a typo in comment.
565
01eaea5a
NC
5662006-07-12 Nick Clifton <nickc@redhat.com>
567
568 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 569 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
570 already been checked here.
571
1e85aad8
JW
5722006-07-07 James E Wilson <wilson@specifix.com>
573
574 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
575
1370e33d
NC
5762006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
577 Nick Clifton <nickc@redhat.com>
578
579 PR binutils/2877
580 * doc/as.texi: Fix spelling typo: branchs => branches.
581 * doc/c-m68hc11.texi: Likewise.
582 * config/tc-m68hc11.c: Likewise.
583 Support old spelling of command line switch for backwards
584 compatibility.
585
5f0fe04b
TS
5862006-07-04 Thiemo Seufer <ths@mips.com>
587 David Ung <davidu@mips.com>
588
589 * config/tc-mips.c (s_is_linkonce): New function.
590 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
591 weak, external, and linkonce symbols.
592 (pic_need_relax): Use s_is_linkonce.
593
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L
5942006-06-24 H.J. Lu <hongjiu.lu@intel.com>
595
596 * doc/as.texinfo (Org): Remove space.
597 (P2align): Add "@var{abs-expr},".
598
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L
5992006-06-23 H.J. Lu <hongjiu.lu@intel.com>
600
601 * config/tc-i386.c (cpu_arch_tune_set): New.
602 (cpu_arch_isa): Likewise.
603 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
604 nops with short or long nop sequences based on -march=/.arch
605 and -mtune=.
606 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
607 set cpu_arch_tune and cpu_arch_tune_flags.
608 (md_parse_option): For -march=, set cpu_arch_isa and set
609 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
610 0. Set cpu_arch_tune_set to 1 for -mtune=.
611 (i386_target_format): Don't set cpu_arch_tune.
612
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TS
6132006-06-23 Nigel Stephens <nigel@mips.com>
614
615 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
616 generated .sbss.* and .gnu.linkonce.sb.*.
617
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TS
6182006-06-23 Thiemo Seufer <ths@mips.com>
619 David Ung <davidu@mips.com>
620
621 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
622 label_list.
623 * config/tc-mips.c (label_list): Define per-segment label_list.
624 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
625 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
626 mips_from_file_after_relocs, mips_define_label): Use per-segment
627 label_list.
628
3994f87e
TS
6292006-06-22 Thiemo Seufer <ths@mips.com>
630
631 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
632 (append_insn): Use it.
633 (md_apply_fix): Whitespace formatting.
634 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
635 mips16_extended_frag): Remove register specifier.
636 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
637 constants.
638
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MS
6392006-06-21 Mark Shinwell <shinwell@codesourcery.com>
640
641 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
642 a directive saving VFP registers for ARMv6 or later.
643 (s_arm_unwind_save): Add parameter arch_v6 and call
644 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
645 appropriate.
646 (md_pseudo_table): Add entry for new "vsave" directive.
647 * doc/c-arm.texi: Correct error in example for "save"
648 directive (fstmdf -> fstmdx). Also document "vsave" directive.
649
8e77b565 6502006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
651 Anatoly Sokolov <aesok@post.ru>
652
a70ae331
AM
653 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
654 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
655 atmega164p/atmega324p.
656 * doc/c-avr.texi: Document new mcu and arch options.
657
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NC
6582006-06-17 Nick Clifton <nickc@redhat.com>
659
660 * config/tc-arm.c (enum parse_operand_result): Move outside of
661 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
662
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L
6632006-06-16 H.J. Lu <hongjiu.lu@intel.com>
664
665 * config/tc-i386.h (processor_type): New.
666 (arch_entry): Add type.
667
668 * config/tc-i386.c (cpu_arch_tune): New.
669 (cpu_arch_tune_flags): Likewise.
670 (cpu_arch_isa_flags): Likewise.
671 (cpu_arch): Updated.
672 (set_cpu_arch): Also update cpu_arch_isa_flags.
673 (md_assemble): Update cpu_arch_isa_flags.
674 (OPTION_MARCH): New.
675 (OPTION_MTUNE): Likewise.
676 (md_longopts): Add -march= and -mtune=.
677 (md_parse_option): Support -march= and -mtune=.
678 (md_show_usage): Add -march=CPU/-mtune=CPU.
679 (i386_target_format): Also update cpu_arch_isa_flags,
680 cpu_arch_tune and cpu_arch_tune_flags.
681
682 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
683
684 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
685
4962c51a
MS
6862006-06-15 Mark Shinwell <shinwell@codesourcery.com>
687
688 * config/tc-arm.c (enum parse_operand_result): New.
689 (struct group_reloc_table_entry): New.
690 (enum group_reloc_type): New.
691 (group_reloc_table): New array.
692 (find_group_reloc_table_entry): New function.
693 (parse_shifter_operand_group_reloc): New function.
694 (parse_address_main): New function, incorporating code
695 from the old parse_address function. To be used via...
696 (parse_address): wrapper for parse_address_main; and
697 (parse_address_group_reloc): new function, likewise.
698 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
699 OP_ADDRGLDRS, OP_ADDRGLDC.
700 (parse_operands): Support for these new operand codes.
701 New macro po_misc_or_fail_no_backtrack.
702 (encode_arm_cp_address): Preserve group relocations.
703 (insns): Modify to use the above operand codes where group
704 relocations are permitted.
705 (md_apply_fix): Handle the group relocations
706 ALU_PC_G0_NC through LDC_SB_G2.
707 (tc_gen_reloc): Likewise.
708 (arm_force_relocation): Leave group relocations for the linker.
709 (arm_fix_adjustable): Likewise.
710
cd2f129f
JB
7112006-06-15 Julian Brown <julian@codesourcery.com>
712
713 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
714 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
715 relocs properly.
716
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L
7172006-06-12 H.J. Lu <hongjiu.lu@intel.com>
718
719 * config/tc-i386.c (process_suffix): Don't add rex64 for
720 "xchg %rax,%rax".
721
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TS
7222006-06-09 Thiemo Seufer <ths@mips.com>
723
724 * config/tc-mips.c (mips_ip): Maintain argument count.
725
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7262006-06-09 Alan Modra <amodra@bigpond.net.au>
727
728 * config/tc-iq2000.c: Include sb.h.
729
7c752c2a
TS
7302006-06-08 Nigel Stephens <nigel@mips.com>
731
732 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
733 aliases for better compatibility with SGI tools.
734
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AM
7352006-06-08 Alan Modra <amodra@bigpond.net.au>
736
737 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
738 * Makefile.am (GASLIBS): Expand @BFDLIB@.
739 (BFDVER_H): Delete.
740 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
741 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
742 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
743 Run "make dep-am".
744 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
745 * Makefile.in: Regenerate.
746 * doc/Makefile.in: Regenerate.
747 * configure: Regenerate.
748
6648b7cf
JM
7492006-06-07 Joseph S. Myers <joseph@codesourcery.com>
750
751 * po/Make-in (pdf, ps): New dummy targets.
752
037e8744
JB
7532006-06-07 Julian Brown <julian@codesourcery.com>
754
755 * config/tc-arm.c (stdarg.h): include.
756 (arm_it): Add uncond_value field. Add isvec and issingle to operand
757 array.
758 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
759 REG_TYPE_NSDQ (single, double or quad vector reg).
760 (reg_expected_msgs): Update.
761 (BAD_FPU): Add macro for unsupported FPU instruction error.
762 (parse_neon_type): Support 'd' as an alias for .f64.
763 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
764 sets of registers.
765 (parse_vfp_reg_list): Don't update first arg on error.
766 (parse_neon_mov): Support extra syntax for VFP moves.
767 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
768 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
769 (parse_operands): Support isvec, issingle operands fields, new parse
770 codes above.
771 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
772 msr variants.
773 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
774 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
775 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
776 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
777 shapes.
778 (neon_shape): Redefine in terms of above.
779 (neon_shape_class): New enumeration, table of shape classes.
780 (neon_shape_el): New enumeration. One element of a shape.
781 (neon_shape_el_size): Register widths of above, where appropriate.
782 (neon_shape_info): New struct. Info for shape table.
783 (neon_shape_tab): New array.
784 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
785 (neon_check_shape): Rewrite as...
786 (neon_select_shape): New function to classify instruction shapes,
787 driven by new table neon_shape_tab array.
788 (neon_quad): New function. Return 1 if shape should set Q flag in
789 instructions (or equivalent), 0 otherwise.
790 (type_chk_of_el_type): Support F64.
791 (el_type_of_type_chk): Likewise.
792 (neon_check_type): Add support for VFP type checking (VFP data
793 elements fill their containing registers).
794 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
795 in thumb mode for VFP instructions.
796 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
797 and encode the current instruction as if it were that opcode.
798 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
799 arguments, call function in PFN.
800 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
801 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
802 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
803 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
804 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
805 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
806 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
807 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
808 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
809 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
810 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
811 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
812 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
813 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
814 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
815 neon_quad.
816 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
817 between VFP and Neon turns out to belong to Neon. Perform
818 architecture check and fill in condition field if appropriate.
819 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
820 (do_neon_cvt): Add support for VFP variants of instructions.
821 (neon_cvt_flavour): Extend to cover VFP conversions.
822 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
823 vmov variants.
824 (do_neon_ldr_str): Handle single-precision VFP load/store.
825 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
826 NS_NULL not NS_IGNORE.
827 (opcode_tag): Add OT_csuffixF for operands which either take a
828 conditional suffix, or have 0xF in the condition field.
829 (md_assemble): Add support for OT_csuffixF.
830 (NCE): Replace macro with...
831 (NCE_tag, NCE, NCEF): New macros.
832 (nCE): Replace macro with...
833 (nCE_tag, nCE, nCEF): New macros.
834 (insns): Add support for VFP insns or VFP versions of insns msr,
835 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
836 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
837 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
838 VFP/Neon insns together.
839
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8402006-06-07 Alan Modra <amodra@bigpond.net.au>
841 Ladislav Michl <ladis@linux-mips.org>
842
843 * app.c: Don't include headers already included by as.h.
844 * as.c: Likewise.
845 * atof-generic.c: Likewise.
846 * cgen.c: Likewise.
847 * dwarf2dbg.c: Likewise.
848 * expr.c: Likewise.
849 * input-file.c: Likewise.
850 * input-scrub.c: Likewise.
851 * macro.c: Likewise.
852 * output-file.c: Likewise.
853 * read.c: Likewise.
854 * sb.c: Likewise.
855 * config/bfin-lex.l: Likewise.
856 * config/obj-coff.h: Likewise.
857 * config/obj-elf.h: Likewise.
858 * config/obj-som.h: Likewise.
859 * config/tc-arc.c: Likewise.
860 * config/tc-arm.c: Likewise.
861 * config/tc-avr.c: Likewise.
862 * config/tc-bfin.c: Likewise.
863 * config/tc-cris.c: Likewise.
864 * config/tc-d10v.c: Likewise.
865 * config/tc-d30v.c: Likewise.
866 * config/tc-dlx.h: Likewise.
867 * config/tc-fr30.c: Likewise.
868 * config/tc-frv.c: Likewise.
869 * config/tc-h8300.c: Likewise.
870 * config/tc-hppa.c: Likewise.
871 * config/tc-i370.c: Likewise.
872 * config/tc-i860.c: Likewise.
873 * config/tc-i960.c: Likewise.
874 * config/tc-ip2k.c: Likewise.
875 * config/tc-iq2000.c: Likewise.
876 * config/tc-m32c.c: Likewise.
877 * config/tc-m32r.c: Likewise.
878 * config/tc-maxq.c: Likewise.
879 * config/tc-mcore.c: Likewise.
880 * config/tc-mips.c: Likewise.
881 * config/tc-mmix.c: Likewise.
882 * config/tc-mn10200.c: Likewise.
883 * config/tc-mn10300.c: Likewise.
884 * config/tc-msp430.c: Likewise.
885 * config/tc-mt.c: Likewise.
886 * config/tc-ns32k.c: Likewise.
887 * config/tc-openrisc.c: Likewise.
888 * config/tc-ppc.c: Likewise.
889 * config/tc-s390.c: Likewise.
890 * config/tc-sh.c: Likewise.
891 * config/tc-sh64.c: Likewise.
892 * config/tc-sparc.c: Likewise.
893 * config/tc-tic30.c: Likewise.
894 * config/tc-tic4x.c: Likewise.
895 * config/tc-tic54x.c: Likewise.
896 * config/tc-v850.c: Likewise.
897 * config/tc-vax.c: Likewise.
898 * config/tc-xc16x.c: Likewise.
899 * config/tc-xstormy16.c: Likewise.
900 * config/tc-xtensa.c: Likewise.
901 * config/tc-z80.c: Likewise.
902 * config/tc-z8k.c: Likewise.
903 * macro.h: Don't include sb.h or ansidecl.h.
904 * sb.h: Don't include stdio.h or ansidecl.h.
905 * cond.c: Include sb.h.
906 * itbl-lex.l: Include as.h instead of other system headers.
907 * itbl-parse.y: Likewise.
908 * itbl-ops.c: Similarly.
909 * itbl-ops.h: Don't include as.h or ansidecl.h.
910 * config/bfin-defs.h: Don't include bfd.h or as.h.
911 * config/bfin-parse.y: Include as.h instead of other system headers.
912
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9132006-06-06 Ben Elliston <bje@au.ibm.com>
914 Anton Blanchard <anton@samba.org>
915
916 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
917 (md_show_usage): Document it.
918 (ppc_setup_opcodes): Test power6 opcode flag bits.
919 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
920
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TS
9212006-06-06 Thiemo Seufer <ths@mips.com>
922 Chao-ying Fu <fu@mips.com>
923
924 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
925 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
926 (macro_build): Update comment.
927 (mips_ip): Allow DSP64 instructions for MIPS64R2.
928 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
929 CPU_HAS_MDMX.
930 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
931 MIPS_CPU_ASE_MDMX flags for sb1.
932
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TS
9332006-06-05 Thiemo Seufer <ths@mips.com>
934
935 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
936 appropriate.
937 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
938 (mips_ip): Make overflowed/underflowed constant arguments in DSP
939 and MT instructions a fatal error. Use INSERT_OPERAND where
940 appropriate. Improve warnings for break and wait code overflows.
941 Use symbolic constant of OP_MASK_COPZ.
942 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
943
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DJ
9442006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
945
946 * po/Make-in (top_builddir): Define.
947
e10fad12
JM
9482006-06-02 Joseph S. Myers <joseph@codesourcery.com>
949
950 * doc/Makefile.am (TEXI2DVI): Define.
951 * doc/Makefile.in: Regenerate.
952 * doc/c-arc.texi: Fix typo.
953
12e64c2c
AM
9542006-06-01 Alan Modra <amodra@bigpond.net.au>
955
956 * config/obj-ieee.c: Delete.
957 * config/obj-ieee.h: Delete.
958 * Makefile.am (OBJ_FORMATS): Remove ieee.
959 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
960 (obj-ieee.o): Remove rule.
961 * Makefile.in: Regenerate.
962 * configure.in (atof): Remove tahoe.
963 (OBJ_MAYBE_IEEE): Don't define.
964 * configure: Regenerate.
965 * config.in: Regenerate.
966 * doc/Makefile.in: Regenerate.
967 * po/POTFILES.in: Regenerate.
968
20e95c23
DJ
9692006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
970
971 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
972 and LIBINTL_DEP everywhere.
973 (INTLLIBS): Remove.
974 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
975 * acinclude.m4: Include new gettext macros.
976 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
977 Remove local code for po/Makefile.
978 * Makefile.in, configure, doc/Makefile.in: Regenerated.
979
eebf07fb
NC
9802006-05-30 Nick Clifton <nickc@redhat.com>
981
982 * po/es.po: Updated Spanish translation.
983
b6aee19e
DC
9842006-05-06 Denis Chertykov <denisc@overta.ru>
985
986 * doc/c-avr.texi: New file.
987 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
988 * doc/all.texi: Set AVR
989 * doc/as.texinfo: Include c-avr.texi
990
f8fdc850 9912006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 992
f8fdc850
JZ
993 * config/bfin-parse.y (check_macfunc): Loose the condition of
994 calling check_multiply_halfregs ().
995
a3205465
JZ
9962006-05-25 Jie Zhang <jie.zhang@analog.com>
997
998 * config/bfin-parse.y (asm_1): Better check and deal with
999 vector and scalar Multiply 16-Bit Operands instructions.
1000
9b52905e
NC
10012006-05-24 Nick Clifton <nickc@redhat.com>
1002
1003 * config/tc-hppa.c: Convert to ISO C90 format.
1004 * config/tc-hppa.h: Likewise.
1005
10062006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1007 Randolph Chung <randolph@tausq.org>
a70ae331 1008
9b52905e
NC
1009 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1010 is_tls_ieoff, is_tls_leoff): Define.
1011 (fix_new_hppa): Handle TLS.
1012 (cons_fix_new_hppa): Likewise.
1013 (pa_ip): Likewise.
1014 (md_apply_fix): Handle TLS relocs.
1015 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1016
a70ae331 10172006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1018
1019 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1020
ad3fea08
TS
10212006-05-23 Thiemo Seufer <ths@mips.com>
1022 David Ung <davidu@mips.com>
1023 Nigel Stephens <nigel@mips.com>
1024
1025 [ gas/ChangeLog ]
1026 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1027 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1028 ISA_HAS_MXHC1): New macros.
1029 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1030 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1031 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1032 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1033 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1034 (mips_after_parse_args): Change default handling of float register
1035 size to account for 32bit code with 64bit FP. Better sanity checking
1036 of ISA/ASE/ABI option combinations.
1037 (s_mipsset): Support switching of GPR and FPR sizes via
1038 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1039 options.
1040 (mips_elf_final_processing): We should record the use of 64bit FP
1041 registers in 32bit code but we don't, because ELF header flags are
1042 a scarce ressource.
1043 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1044 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1045 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1046 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1047 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1048 missing -march options. Document .set arch=CPU. Move .set smartmips
1049 to ASE page. Use @code for .set FOO examples.
1050
8b64503a
JZ
10512006-05-23 Jie Zhang <jie.zhang@analog.com>
1052
1053 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1054 if needed.
1055
403022e0
JZ
10562006-05-23 Jie Zhang <jie.zhang@analog.com>
1057
1058 * config/bfin-defs.h (bfin_equals): Remove declaration.
1059 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1060 * config/tc-bfin.c (bfin_name_is_register): Remove.
1061 (bfin_equals): Remove.
1062 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1063 (bfin_name_is_register): Remove declaration.
1064
7455baf8
TS
10652006-05-19 Thiemo Seufer <ths@mips.com>
1066 Nigel Stephens <nigel@mips.com>
1067
1068 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1069 (mips_oddfpreg_ok): New function.
1070 (mips_ip): Use it.
1071
707bfff6
TS
10722006-05-19 Thiemo Seufer <ths@mips.com>
1073 David Ung <davidu@mips.com>
1074
1075 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1076 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1077 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1078 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1079 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1080 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1081 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1082 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1083 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1084 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1085 reg_names_o32, reg_names_n32n64): Define register classes.
1086 (reg_lookup): New function, use register classes.
1087 (md_begin): Reserve register names in the symbol table. Simplify
1088 OBJ_ELF defines.
1089 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1090 Use reg_lookup.
1091 (mips16_ip): Use reg_lookup.
1092 (tc_get_register): Likewise.
1093 (tc_mips_regname_to_dw2regnum): New function.
1094
1df69f4f
TS
10952006-05-19 Thiemo Seufer <ths@mips.com>
1096
1097 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1098 Un-constify string argument.
1099 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1100 Likewise.
1101 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1102 Likewise.
1103 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1104 Likewise.
1105 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1106 Likewise.
1107 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1108 Likewise.
1109 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1110 Likewise.
1111
377260ba
NS
11122006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1113
1114 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1115 cfloat/m68881 to correct architecture before using it.
1116
cce7653b
NC
11172006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1118
a70ae331 1119 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1120 constant values.
1121
b0796911
PB
11222006-05-15 Paul Brook <paul@codesourcery.com>
1123
1124 * config/tc-arm.c (arm_adjust_symtab): Use
1125 bfd_is_arm_special_symbol_name.
1126
64b607e6
BW
11272006-05-15 Bob Wilson <bob.wilson@acm.org>
1128
1129 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1130 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1131 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1132 Handle errors from calls to xtensa_opcode_is_* functions.
1133
9b3f89ee
TS
11342006-05-14 Thiemo Seufer <ths@mips.com>
1135
1136 * config/tc-mips.c (macro_build): Test for currently active
1137 mips16 option.
1138 (mips16_ip): Reject invalid opcodes.
1139
370b66a1
CD
11402006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1141
1142 * doc/as.texinfo: Rename "Index" to "AS Index",
1143 and "ABORT" to "ABORT (COFF)".
1144
b6895b4f
PB
11452006-05-11 Paul Brook <paul@codesourcery.com>
1146
1147 * config/tc-arm.c (parse_half): New function.
1148 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1149 (parse_operands): Ditto.
1150 (do_mov16): Reject invalid relocations.
1151 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1152 (insns): Replace Iffff with HALF.
1153 (md_apply_fix): Add MOVW and MOVT relocs.
1154 (tc_gen_reloc): Ditto.
1155 * doc/c-arm.texi: Document relocation operators
1156
e28387c3
PB
11572006-05-11 Paul Brook <paul@codesourcery.com>
1158
1159 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1160
89ee2ebe
TS
11612006-05-11 Thiemo Seufer <ths@mips.com>
1162
1163 * config/tc-mips.c (append_insn): Don't check the range of j or
1164 jal addresses.
1165
53baae48
NC
11662006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1167
1168 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1169 relocs against external symbols for WinCE targets.
53baae48
NC
1170 (md_apply_fix): Likewise.
1171
4e2a74a8
TS
11722006-05-09 David Ung <davidu@mips.com>
1173
1174 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1175 j or jal address.
1176
337ff0a5
NC
11772006-05-09 Nick Clifton <nickc@redhat.com>
1178
1179 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1180 against symbols which are not going to be placed into the symbol
1181 table.
1182
8c9f705e
BE
11832006-05-09 Ben Elliston <bje@au.ibm.com>
1184
1185 * expr.c (operand): Remove `if (0 && ..)' statement and
1186 subsequently unused target_op label. Collapse `if (1 || ..)'
1187 statement.
1188 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1189 separately above the switch.
1190
2fd0d2ac
NC
11912006-05-08 Nick Clifton <nickc@redhat.com>
1192
1193 PR gas/2623
1194 * config/tc-msp430.c (line_separator_character): Define as |.
1195
e16bfa71
TS
11962006-05-08 Thiemo Seufer <ths@mips.com>
1197 Nigel Stephens <nigel@mips.com>
1198 David Ung <davidu@mips.com>
1199
1200 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1201 (mips_opts): Likewise.
1202 (file_ase_smartmips): New variable.
1203 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1204 (macro_build): Handle SmartMIPS instructions.
1205 (mips_ip): Likewise.
1206 (md_longopts): Add argument handling for smartmips.
1207 (md_parse_options, mips_after_parse_args): Likewise.
1208 (s_mipsset): Add .set smartmips support.
1209 (md_show_usage): Document -msmartmips/-mno-smartmips.
1210 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1211 .set smartmips.
1212 * doc/c-mips.texi: Likewise.
1213
32638454
AM
12142006-05-08 Alan Modra <amodra@bigpond.net.au>
1215
1216 * write.c (relax_segment): Add pass count arg. Don't error on
1217 negative org/space on first two passes.
1218 (relax_seg_info): New struct.
1219 (relax_seg, write_object_file): Adjust.
1220 * write.h (relax_segment): Update prototype.
1221
b7fc2769
JB
12222006-05-05 Julian Brown <julian@codesourcery.com>
1223
1224 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1225 checking.
1226 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1227 architecture version checks.
1228 (insns): Allow overlapping instructions to be used in VFP mode.
1229
7f841127
L
12302006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1231
1232 PR gas/2598
1233 * config/obj-elf.c (obj_elf_change_section): Allow user
1234 specified SHF_ALPHA_GPREL.
1235
73160847
NC
12362006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1237
1238 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1239 for PMEM related expressions.
1240
56487c55
NC
12412006-05-05 Nick Clifton <nickc@redhat.com>
1242
1243 PR gas/2582
1244 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1245 insertion of a directory separator character into a string at a
1246 given offset. Uses heuristics to decide when to use a backslash
1247 character rather than a forward-slash character.
1248 (dwarf2_directive_loc): Use the macro.
1249 (out_debug_info): Likewise.
1250
d43b4baf
TS
12512006-05-05 Thiemo Seufer <ths@mips.com>
1252 David Ung <davidu@mips.com>
1253
1254 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1255 instruction.
1256 (macro): Add new case M_CACHE_AB.
1257
088fa78e
KH
12582006-05-04 Kazu Hirata <kazu@codesourcery.com>
1259
1260 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1261 (opcode_lookup): Issue a warning for opcode with
1262 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1263 identical to OT_cinfix3.
1264 (TxC3w, TC3w, tC3w): New.
1265 (insns): Use tC3w and TC3w for comparison instructions with
1266 's' suffix.
1267
c9049d30
AM
12682006-05-04 Alan Modra <amodra@bigpond.net.au>
1269
1270 * subsegs.h (struct frchain): Delete frch_seg.
1271 (frchain_root): Delete.
1272 (seg_info): Define as macro.
1273 * subsegs.c (frchain_root): Delete.
1274 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1275 (subsegs_begin, subseg_change): Adjust for above.
1276 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1277 rather than to one big list.
1278 (subseg_get): Don't special case abs, und sections.
1279 (subseg_new, subseg_force_new): Don't set frchainP here.
1280 (seg_info): Delete.
1281 (subsegs_print_statistics): Adjust frag chain control list traversal.
1282 * debug.c (dmp_frags): Likewise.
1283 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1284 at frchain_root. Make use of known frchain ordering.
1285 (last_frag_for_seg): Likewise.
1286 (get_frag_fix): Likewise. Add seg param.
1287 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1288 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1289 (SUB_SEGMENT_ALIGN): Likewise.
1290 (subsegs_finish): Adjust frchain list traversal.
1291 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1292 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1293 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1294 (xtensa_fix_b_j_loop_end_frags): Likewise.
1295 (xtensa_fix_close_loop_end_frags): Likewise.
1296 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1297 (retrieve_segment_info): Delete frch_seg initialisation.
1298
f592407e
AM
12992006-05-03 Alan Modra <amodra@bigpond.net.au>
1300
1301 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1302 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1303 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1304 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1305
df7849c5
JM
13062006-05-02 Joseph Myers <joseph@codesourcery.com>
1307
1308 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1309 here.
1310 (md_apply_fix3): Multiply offset by 4 here for
1311 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1312
2d545b82
L
13132006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1314 Jan Beulich <jbeulich@novell.com>
1315
1316 * config/tc-i386.c (output_invalid_buf): Change size for
1317 unsigned char.
1318 * config/tc-tic30.c (output_invalid_buf): Likewise.
1319
1320 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1321 unsigned char.
1322 * config/tc-tic30.c (output_invalid): Likewise.
1323
38fc1cb1
DJ
13242006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1325
1326 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1327 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1328 (asconfig.texi): Don't set top_srcdir.
1329 * doc/as.texinfo: Don't use top_srcdir.
1330 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1331
2d545b82
L
13322006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1333
1334 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1335 * config/tc-tic30.c (output_invalid_buf): Likewise.
1336
1337 * config/tc-i386.c (output_invalid): Use snprintf instead of
1338 sprintf.
1339 * config/tc-ia64.c (declare_register_set): Likewise.
1340 (emit_one_bundle): Likewise.
1341 (check_dependencies): Likewise.
1342 * config/tc-tic30.c (output_invalid): Likewise.
1343
a8bc6c78
PB
13442006-05-02 Paul Brook <paul@codesourcery.com>
1345
1346 * config/tc-arm.c (arm_optimize_expr): New function.
1347 * config/tc-arm.h (md_optimize_expr): Define
1348 (arm_optimize_expr): Add prototype.
1349 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1350
58633d9a
BE
13512006-05-02 Ben Elliston <bje@au.ibm.com>
1352
22772e33
BE
1353 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1354 field unsigned.
1355
58633d9a
BE
1356 * sb.h (sb_list_vector): Move to sb.c.
1357 * sb.c (free_list): Use type of sb_list_vector directly.
1358 (sb_build): Fix off-by-one error in assertion about `size'.
1359
89cdfe57
BE
13602006-05-01 Ben Elliston <bje@au.ibm.com>
1361
1362 * listing.c (listing_listing): Remove useless loop.
1363 * macro.c (macro_expand): Remove is_positional local variable.
1364 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1365 and simplify surrounding expressions, where possible.
1366 (assign_symbol): Likewise.
1367 (s_weakref): Likewise.
1368 * symbols.c (colon): Likewise.
1369
c35da140
AM
13702006-05-01 James Lemke <jwlemke@wasabisystems.com>
1371
1372 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1373
9bcd4f99
TS
13742006-04-30 Thiemo Seufer <ths@mips.com>
1375 David Ung <davidu@mips.com>
1376
1377 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1378 (mips_immed): New table that records various handling of udi
1379 instruction patterns.
1380 (mips_ip): Adds udi handling.
1381
001ae1a4
AM
13822006-04-28 Alan Modra <amodra@bigpond.net.au>
1383
1384 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1385 of list rather than beginning.
1386
136da414
JB
13872006-04-26 Julian Brown <julian@codesourcery.com>
1388
1389 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1390 (is_quarter_float): Rename from above. Simplify slightly.
1391 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1392 number.
1393 (parse_neon_mov): Parse floating-point constants.
1394 (neon_qfloat_bits): Fix encoding.
1395 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1396 preference to integer encoding when using the F32 type.
1397
dcbf9037
JB
13982006-04-26 Julian Brown <julian@codesourcery.com>
1399
1400 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1401 zero-initialising structures containing it will lead to invalid types).
1402 (arm_it): Add vectype to each operand.
1403 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1404 defined field.
1405 (neon_typed_alias): New structure. Extra information for typed
1406 register aliases.
1407 (reg_entry): Add neon type info field.
1408 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1409 Break out alternative syntax for coprocessor registers, etc. into...
1410 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1411 out from arm_reg_parse.
1412 (parse_neon_type): Move. Return SUCCESS/FAIL.
1413 (first_error): New function. Call to ensure first error which occurs is
1414 reported.
1415 (parse_neon_operand_type): Parse exactly one type.
1416 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1417 (parse_typed_reg_or_scalar): New function. Handle core of both
1418 arm_typed_reg_parse and parse_scalar.
1419 (arm_typed_reg_parse): Parse a register with an optional type.
1420 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1421 result.
1422 (parse_scalar): Parse a Neon scalar with optional type.
1423 (parse_reg_list): Use first_error.
1424 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1425 (neon_alias_types_same): New function. Return true if two (alias) types
1426 are the same.
1427 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1428 of elements.
1429 (insert_reg_alias): Return new reg_entry not void.
1430 (insert_neon_reg_alias): New function. Insert type/index information as
1431 well as register for alias.
1432 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1433 make typed register aliases accordingly.
1434 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1435 of line.
1436 (s_unreq): Delete type information if present.
1437 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1438 (s_arm_unwind_save_mmxwcg): Likewise.
1439 (s_arm_unwind_movsp): Likewise.
1440 (s_arm_unwind_setfp): Likewise.
1441 (parse_shift): Likewise.
1442 (parse_shifter_operand): Likewise.
1443 (parse_address): Likewise.
1444 (parse_tb): Likewise.
1445 (tc_arm_regname_to_dw2regnum): Likewise.
1446 (md_pseudo_table): Add dn, qn.
1447 (parse_neon_mov): Handle typed operands.
1448 (parse_operands): Likewise.
1449 (neon_type_mask): Add N_SIZ.
1450 (N_ALLMODS): New macro.
1451 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1452 (el_type_of_type_chk): Add some safeguards.
1453 (modify_types_allowed): Fix logic bug.
1454 (neon_check_type): Handle operands with types.
1455 (neon_three_same): Remove redundant optional arg handling.
1456 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1457 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1458 (do_neon_step): Adjust accordingly.
1459 (neon_cmode_for_logic_imm): Use first_error.
1460 (do_neon_bitfield): Call neon_check_type.
1461 (neon_dyadic): Rename to...
1462 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1463 to allow modification of type of the destination.
1464 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1465 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1466 (do_neon_compare): Make destination be an untyped bitfield.
1467 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1468 (neon_mul_mac): Return early in case of errors.
1469 (neon_move_immediate): Use first_error.
1470 (neon_mac_reg_scalar_long): Fix type to include scalar.
1471 (do_neon_dup): Likewise.
1472 (do_neon_mov): Likewise (in several places).
1473 (do_neon_tbl_tbx): Fix type.
1474 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1475 (do_neon_ld_dup): Exit early in case of errors and/or use
1476 first_error.
1477 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1478 Handle .dn/.qn directives.
1479 (REGDEF): Add zero for reg_entry neon field.
1480
5287ad62
JB
14812006-04-26 Julian Brown <julian@codesourcery.com>
1482
1483 * config/tc-arm.c (limits.h): Include.
1484 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1485 (fpu_vfp_v3_or_neon_ext): Declare constants.
1486 (neon_el_type): New enumeration of types for Neon vector elements.
1487 (neon_type_el): New struct. Define type and size of a vector element.
1488 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1489 instruction.
1490 (neon_type): Define struct. The type of an instruction.
1491 (arm_it): Add 'vectype' for the current instruction.
1492 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1493 (vfp_sp_reg_pos): Rename to...
1494 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1495 tags.
1496 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1497 (Neon D or Q register).
1498 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1499 register.
1500 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1501 (my_get_expression): Allow above constant as argument to accept
1502 64-bit constants with optional prefix.
1503 (arm_reg_parse): Add extra argument to return the specific type of
1504 register in when either a D or Q register (REG_TYPE_NDQ) is
1505 requested. Can be NULL.
1506 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1507 (parse_reg_list): Update for new arm_reg_parse args.
1508 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1509 (parse_neon_el_struct_list): New function. Parse element/structure
1510 register lists for VLD<n>/VST<n> instructions.
1511 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1512 (s_arm_unwind_save_mmxwr): Likewise.
1513 (s_arm_unwind_save_mmxwcg): Likewise.
1514 (s_arm_unwind_movsp): Likewise.
1515 (s_arm_unwind_setfp): Likewise.
1516 (parse_big_immediate): New function. Parse an immediate, which may be
1517 64 bits wide. Put results in inst.operands[i].
1518 (parse_shift): Update for new arm_reg_parse args.
1519 (parse_address): Likewise. Add parsing of alignment specifiers.
1520 (parse_neon_mov): Parse the operands of a VMOV instruction.
1521 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1522 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1523 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1524 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1525 (parse_operands): Handle new codes above.
1526 (encode_arm_vfp_sp_reg): Rename to...
1527 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1528 selected VFP version only supports D0-D15.
1529 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1530 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1531 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1532 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1533 encode_arm_vfp_reg name, and allow 32 D regs.
1534 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1535 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1536 regs.
1537 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1538 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1539 constant-load and conversion insns introduced with VFPv3.
1540 (neon_tab_entry): New struct.
1541 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1542 those which are the targets of pseudo-instructions.
1543 (neon_opc): Enumerate opcodes, use as indices into...
1544 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1545 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1546 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1547 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1548 neon_enc_tab.
1549 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1550 Neon instructions.
1551 (neon_type_mask): New. Compact type representation for type checking.
1552 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1553 permitted type combinations.
1554 (N_IGNORE_TYPE): New macro.
1555 (neon_check_shape): New function. Check an instruction shape for
1556 multiple alternatives. Return the specific shape for the current
1557 instruction.
1558 (neon_modify_type_size): New function. Modify a vector type and size,
1559 depending on the bit mask in argument 1.
1560 (neon_type_promote): New function. Convert a given "key" type (of an
1561 operand) into the correct type for a different operand, based on a bit
1562 mask.
1563 (type_chk_of_el_type): New function. Convert a type and size into the
1564 compact representation used for type checking.
1565 (el_type_of_type_ckh): New function. Reverse of above (only when a
1566 single bit is set in the bit mask).
1567 (modify_types_allowed): New function. Alter a mask of allowed types
1568 based on a bit mask of modifications.
1569 (neon_check_type): New function. Check the type of the current
1570 instruction against the variable argument list. The "key" type of the
1571 instruction is returned.
1572 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1573 a Neon data-processing instruction depending on whether we're in ARM
1574 mode or Thumb-2 mode.
1575 (neon_logbits): New function.
1576 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1577 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1578 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1579 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1580 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1581 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1582 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1583 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1584 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1585 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1586 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1587 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1588 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1589 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1590 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1591 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1592 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1593 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1594 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1595 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1596 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1597 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1598 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1599 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1600 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1601 helpers.
1602 (parse_neon_type): New function. Parse Neon type specifier.
1603 (opcode_lookup): Allow parsing of Neon type specifiers.
1604 (REGNUM2, REGSETH, REGSET2): New macros.
1605 (reg_names): Add new VFPv3 and Neon registers.
1606 (NUF, nUF, NCE, nCE): New macros for opcode table.
1607 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1608 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1609 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1610 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1611 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1612 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1613 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1614 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1615 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1616 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1617 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1618 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1619 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1620 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1621 fto[us][lh][sd].
1622 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1623 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1624 (arm_option_cpu_value): Add vfp3 and neon.
1625 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1626 VFPv1 attribute.
1627
1946c96e
BW
16282006-04-25 Bob Wilson <bob.wilson@acm.org>
1629
1630 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1631 syntax instead of hardcoded opcodes with ".w18" suffixes.
1632 (wide_branch_opcode): New.
1633 (build_transition): Use it to check for wide branch opcodes with
1634 either ".w18" or ".w15" suffixes.
1635
5033a645
BW
16362006-04-25 Bob Wilson <bob.wilson@acm.org>
1637
1638 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1639 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1640 frag's is_literal flag.
1641
395fa56f
BW
16422006-04-25 Bob Wilson <bob.wilson@acm.org>
1643
1644 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1645
708587a4
KH
16462006-04-23 Kazu Hirata <kazu@codesourcery.com>
1647
1648 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1649 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1650 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1651 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1652 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1653
8463be01
PB
16542005-04-20 Paul Brook <paul@codesourcery.com>
1655
1656 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1657 all targets.
1658 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1659
f26a5955
AM
16602006-04-19 Alan Modra <amodra@bigpond.net.au>
1661
1662 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1663 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1664 Make some cpus unsupported on ELF. Run "make dep-am".
1665 * Makefile.in: Regenerate.
1666
241a6c40
AM
16672006-04-19 Alan Modra <amodra@bigpond.net.au>
1668
1669 * configure.in (--enable-targets): Indent help message.
1670 * configure: Regenerate.
1671
bb8f5920
L
16722006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1673
1674 PR gas/2533
1675 * config/tc-i386.c (i386_immediate): Check illegal immediate
1676 register operand.
1677
23d9d9de
AM
16782006-04-18 Alan Modra <amodra@bigpond.net.au>
1679
64e74474
AM
1680 * config/tc-i386.c: Formatting.
1681 (output_disp, output_imm): ISO C90 params.
1682
6cbe03fb
AM
1683 * frags.c (frag_offset_fixed_p): Constify args.
1684 * frags.h (frag_offset_fixed_p): Ditto.
1685
23d9d9de
AM
1686 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1687 (COFF_MAGIC): Delete.
a37d486e
AM
1688
1689 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1690
e7403566
DJ
16912006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1692
1693 * po/POTFILES.in: Regenerated.
1694
58ab4f3d
MM
16952006-04-16 Mark Mitchell <mark@codesourcery.com>
1696
1697 * doc/as.texinfo: Mention that some .type syntaxes are not
1698 supported on all architectures.
1699
482fd9f9
BW
17002006-04-14 Sterling Augustine <sterling@tensilica.com>
1701
1702 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1703 instructions when such transformations have been disabled.
1704
05d58145
BW
17052006-04-10 Sterling Augustine <sterling@tensilica.com>
1706
1707 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1708 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1709 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1710 decoding the loop instructions. Remove current_offset variable.
1711 (xtensa_fix_short_loop_frags): Likewise.
1712 (min_bytes_to_other_loop_end): Remove current_offset argument.
1713
9e75b3fa
AM
17142006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1715
a37d486e 1716 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1717 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1718
d727e8c2
NC
17192006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1720
1721 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1722 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1723 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1724 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1725 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1726 at90can64, at90usb646, at90usb647, at90usb1286 and
1727 at90usb1287.
1728 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1729
d252fdde
PB
17302006-04-07 Paul Brook <paul@codesourcery.com>
1731
1732 * config/tc-arm.c (parse_operands): Set default error message.
1733
ab1eb5fe
PB
17342006-04-07 Paul Brook <paul@codesourcery.com>
1735
1736 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1737
7ae2971b
PB
17382006-04-07 Paul Brook <paul@codesourcery.com>
1739
1740 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1741
53365c0d
PB
17422006-04-07 Paul Brook <paul@codesourcery.com>
1743
1744 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1745 (move_or_literal_pool): Handle Thumb-2 instructions.
1746 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1747
45aa61fe
AM
17482006-04-07 Alan Modra <amodra@bigpond.net.au>
1749
1750 PR 2512.
1751 * config/tc-i386.c (match_template): Move 64-bit operand tests
1752 inside loop.
1753
108a6f8e
CD
17542006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1755
1756 * po/Make-in: Add install-html target.
1757 * Makefile.am: Add install-html and install-html-recursive targets.
1758 * Makefile.in: Regenerate.
1759 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1760 * configure: Regenerate.
1761 * doc/Makefile.am: Add install-html and install-html-am targets.
1762 * doc/Makefile.in: Regenerate.
1763
ec651a3b
AM
17642006-04-06 Alan Modra <amodra@bigpond.net.au>
1765
1766 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1767 second scan.
1768
910600e9
RS
17692006-04-05 Richard Sandiford <richard@codesourcery.com>
1770 Daniel Jacobowitz <dan@codesourcery.com>
1771
1772 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1773 (GOTT_BASE, GOTT_INDEX): New.
1774 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1775 GOTT_INDEX when generating VxWorks PIC.
1776 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1777 use the generic *-*-vxworks* stanza instead.
1778
99630778
AM
17792006-04-04 Alan Modra <amodra@bigpond.net.au>
1780
1781 PR 997
1782 * frags.c (frag_offset_fixed_p): New function.
1783 * frags.h (frag_offset_fixed_p): Declare.
1784 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1785 (resolve_expression): Likewise.
1786
a02728c8
BW
17872006-04-03 Sterling Augustine <sterling@tensilica.com>
1788
1789 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1790 of the same length but different numbers of slots.
1791
9dfde49d
AS
17922006-03-30 Andreas Schwab <schwab@suse.de>
1793
1794 * configure.in: Fix help string for --enable-targets option.
1795 * configure: Regenerate.
1796
2da12c60
NS
17972006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1798
6d89cc8f
NS
1799 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1800 (m68k_ip): ... here. Use for all chips. Protect against buffer
1801 overrun and avoid excessive copying.
1802
2da12c60
NS
1803 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1804 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1805 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1806 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1807 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1808 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1809 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1810 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1811 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1812 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1813 (struct m68k_cpu): Change chip field to control_regs.
1814 (current_chip): Remove.
1815 (control_regs): New.
1816 (m68k_archs, m68k_extensions): Adjust.
1817 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1818 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1819 (find_cf_chip): Reimplement for new organization of cpu table.
1820 (select_control_regs): Remove.
1821 (mri_chip): Adjust.
1822 (struct save_opts): Save control regs, not chip.
1823 (s_save, s_restore): Adjust.
1824 (m68k_lookup_cpu): Give deprecated warning when necessary.
1825 (m68k_init_arch): Adjust.
1826 (md_show_usage): Adjust for new cpu table organization.
1827
1ac4baed
BS
18282006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1829
1830 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1831 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1832 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1833 "elf/bfin.h".
1834 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1835 (any_gotrel): New rule.
1836 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1837 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1838 "elf/bfin.h".
1839 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1840 (bfin_pic_ptr): New function.
1841 (md_pseudo_table): Add it for ".picptr".
1842 (OPTION_FDPIC): New macro.
1843 (md_longopts): Add -mfdpic.
1844 (md_parse_option): Handle it.
1845 (md_begin): Set BFD flags.
1846 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1847 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1848 us for GOT relocs.
1849 * Makefile.am (bfin-parse.o): Update dependencies.
1850 (DEPTC_bfin_elf): Likewise.
1851 * Makefile.in: Regenerate.
1852
a9d34880
RS
18532006-03-25 Richard Sandiford <richard@codesourcery.com>
1854
1855 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1856 mcfemac instead of mcfmac.
1857
9ca26584
AJ
18582006-03-23 Michael Matz <matz@suse.de>
1859
1860 * config/tc-i386.c (type_names): Correct placement of 'static'.
1861 (reloc): Map some more relocs to their 64 bit counterpart when
1862 size is 8.
1863 (output_insn): Work around breakage if DEBUG386 is defined.
1864 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1865 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1866 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1867 different from i386.
1868 (output_imm): Ditto.
1869 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1870 Imm64.
1871 (md_convert_frag): Jumps can now be larger than 2GB away, error
1872 out in that case.
1873 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1874 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1875
0a44bf69
RS
18762006-03-22 Richard Sandiford <richard@codesourcery.com>
1877 Daniel Jacobowitz <dan@codesourcery.com>
1878 Phil Edwards <phil@codesourcery.com>
1879 Zack Weinberg <zack@codesourcery.com>
1880 Mark Mitchell <mark@codesourcery.com>
1881 Nathan Sidwell <nathan@codesourcery.com>
1882
1883 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1884 (md_begin): Complain about -G being used for PIC. Don't change
1885 the text, data and bss alignments on VxWorks.
1886 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1887 generating VxWorks PIC.
1888 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1889 (macro): Likewise, but do not treat la $25 specially for
1890 VxWorks PIC, and do not handle jal.
1891 (OPTION_MVXWORKS_PIC): New macro.
1892 (md_longopts): Add -mvxworks-pic.
1893 (md_parse_option): Don't complain about using PIC and -G together here.
1894 Handle OPTION_MVXWORKS_PIC.
1895 (md_estimate_size_before_relax): Always use the first relaxation
1896 sequence on VxWorks.
1897 * config/tc-mips.h (VXWORKS_PIC): New.
1898
080eb7fe
PB
18992006-03-21 Paul Brook <paul@codesourcery.com>
1900
1901 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1902
03aaa593
BW
19032006-03-21 Sterling Augustine <sterling@tensilica.com>
1904
1905 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1906 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1907 (get_loop_align_size): New.
1908 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1909 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1910 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1911 (get_noop_aligned_address): Use get_loop_align_size.
1912 (get_aligned_diff): Likewise.
1913
3e94bf1a
PB
19142006-03-21 Paul Brook <paul@codesourcery.com>
1915
1916 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1917
dfa9f0d5
PB
19182006-03-20 Paul Brook <paul@codesourcery.com>
1919
1920 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1921 (do_t_branch): Encode branches inside IT blocks as unconditional.
1922 (do_t_cps): New function.
1923 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1924 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1925 (opcode_lookup): Allow conditional suffixes on all instructions in
1926 Thumb mode.
1927 (md_assemble): Advance condexec state before checking for errors.
1928 (insns): Use do_t_cps.
1929
6e1cb1a6
PB
19302006-03-20 Paul Brook <paul@codesourcery.com>
1931
1932 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1933 outputting the insn.
1934
0a966e2d
JBG
19352006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1936
1937 * config/tc-vax.c: Update copyright year.
1938 * config/tc-vax.h: Likewise.
1939
a49fcc17
JBG
19402006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1941
1942 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1943 make it static.
1944 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1945
f5208ef2
PB
19462006-03-17 Paul Brook <paul@codesourcery.com>
1947
1948 * config/tc-arm.c (insns): Add ldm and stm.
1949
cb4c78d6
BE
19502006-03-17 Ben Elliston <bje@au.ibm.com>
1951
1952 PR gas/2446
1953 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1954
c16d2bf0
PB
19552006-03-16 Paul Brook <paul@codesourcery.com>
1956
1957 * config/tc-arm.c (insns): Add "svc".
1958
80ca4e2c
BW
19592006-03-13 Bob Wilson <bob.wilson@acm.org>
1960
1961 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1962 flag and avoid double underscore prefixes.
1963
3a4a14e9
PB
19642006-03-10 Paul Brook <paul@codesourcery.com>
1965
1966 * config/tc-arm.c (md_begin): Handle EABIv5.
1967 (arm_eabis): Add EF_ARM_EABI_VER5.
1968 * doc/c-arm.texi: Document -meabi=5.
1969
518051dc
BE
19702006-03-10 Ben Elliston <bje@au.ibm.com>
1971
1972 * app.c (do_scrub_chars): Simplify string handling.
1973
00a97672
RS
19742006-03-07 Richard Sandiford <richard@codesourcery.com>
1975 Daniel Jacobowitz <dan@codesourcery.com>
1976 Zack Weinberg <zack@codesourcery.com>
1977 Nathan Sidwell <nathan@codesourcery.com>
1978 Paul Brook <paul@codesourcery.com>
1979 Ricardo Anguiano <anguiano@codesourcery.com>
1980 Phil Edwards <phil@codesourcery.com>
1981
1982 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1983 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1984 R_ARM_ABS12 reloc.
1985 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1986 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1987 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1988
b29757dc
BW
19892006-03-06 Bob Wilson <bob.wilson@acm.org>
1990
1991 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1992 even when using the text-section-literals option.
1993
0b2e31dc
NS
19942006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1995
1996 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1997 and cf.
1998 (m68k_ip): <case 'J'> Check we have some control regs.
1999 (md_parse_option): Allow raw arch switch.
2000 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2001 whether 68881 or cfloat was meant by -mfloat.
2002 (md_show_usage): Adjust extension display.
2003 (m68k_elf_final_processing): Adjust.
2004
df406460
NC
20052006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2006
2007 * config/tc-avr.c (avr_mod_hash_value): New function.
2008 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2009 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2010 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2011 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2012 of (int).
2013 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2014 fixups, abort otherwise.
df406460
NC
2015 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2016 tc_fix_adjustable): Define.
a70ae331 2017
53022e4a
JW
20182006-03-02 James E Wilson <wilson@specifix.com>
2019
2020 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2021 change the template, then clear md.slot[curr].end_of_insn_group.
2022
9f6f925e
JB
20232006-02-28 Jan Beulich <jbeulich@novell.com>
2024
2025 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2026
0e31b3e1
JB
20272006-02-28 Jan Beulich <jbeulich@novell.com>
2028
2029 PR/1070
2030 * macro.c (getstring): Don't treat parentheses special anymore.
2031 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2032 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2033 characters.
2034
10cd14b4
AM
20352006-02-28 Mat <mat@csail.mit.edu>
2036
2037 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2038
63752a75
JJ
20392006-02-27 Jakub Jelinek <jakub@redhat.com>
2040
2041 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2042 field.
2043 (CFI_signal_frame): Define.
2044 (cfi_pseudo_table): Add .cfi_signal_frame.
2045 (dot_cfi): Handle CFI_signal_frame.
2046 (output_cie): Handle cie->signal_frame.
2047 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2048 different. Copy signal_frame from FDE to newly created CIE.
2049 * doc/as.texinfo: Document .cfi_signal_frame.
2050
f7d9e5c3
CD
20512006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2052
2053 * doc/Makefile.am: Add html target.
2054 * doc/Makefile.in: Regenerate.
2055 * po/Make-in: Add html target.
2056
331d2d0d
L
20572006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2058
8502d882 2059 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2060 Instructions.
2061
8502d882 2062 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2063 (CpuUnknownFlags): Add CpuMNI.
2064
10156f83
DM
20652006-02-24 David S. Miller <davem@sunset.davemloft.net>
2066
2067 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2068 (hpriv_reg_table): New table for hyperprivileged registers.
2069 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2070 register encoding.
2071
6772dd07
DD
20722006-02-24 DJ Delorie <dj@redhat.com>
2073
2074 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2075 (tc_gen_reloc): Don't define.
2076 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2077 (OPTION_LINKRELAX): New.
2078 (md_longopts): Add it.
2079 (m32c_relax): New.
2080 (md_parse_options): Set it.
2081 (md_assemble): Emit relaxation relocs as needed.
2082 (md_convert_frag): Emit relaxation relocs as needed.
2083 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2084 (m32c_apply_fix): New.
2085 (tc_gen_reloc): New.
2086 (m32c_force_relocation): Force out jump relocs when relaxing.
2087 (m32c_fix_adjustable): Return false if relaxing.
2088
62b3e311
PB
20892006-02-24 Paul Brook <paul@codesourcery.com>
2090
2091 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2092 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2093 (struct asm_barrier_opt): Define.
2094 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2095 (parse_psr): Accept V7M psr names.
2096 (parse_barrier): New function.
2097 (enum operand_parse_code): Add OP_oBARRIER.
2098 (parse_operands): Implement OP_oBARRIER.
2099 (do_barrier): New function.
2100 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2101 (do_t_cpsi): Add V7M restrictions.
2102 (do_t_mrs, do_t_msr): Validate V7M variants.
2103 (md_assemble): Check for NULL variants.
2104 (v7m_psrs, barrier_opt_names): New tables.
2105 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2106 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2107 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2108 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2109 (struct cpu_arch_ver_table): Define.
2110 (cpu_arch_ver): New.
2111 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2112 Tag_CPU_arch_profile.
2113 * doc/c-arm.texi: Document new cpu and arch options.
2114
59cf82fe
L
21152006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2116
2117 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2118
19a7219f
L
21192006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2120
2121 * config/tc-ia64.c: Update copyright years.
2122
7f3dfb9c
L
21232006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2124
2125 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2126 SDM 2.2.
2127
f40d1643
PB
21282005-02-22 Paul Brook <paul@codesourcery.com>
2129
2130 * config/tc-arm.c (do_pld): Remove incorrect write to
2131 inst.instruction.
2132 (encode_thumb32_addr_mode): Use correct operand.
2133
216d22bc
PB
21342006-02-21 Paul Brook <paul@codesourcery.com>
2135
2136 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2137
d70c5fc7
NC
21382006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2139 Anil Paranjape <anilp1@kpitcummins.com>
2140 Shilin Shakti <shilins@kpitcummins.com>
2141
2142 * Makefile.am: Add xc16x related entry.
2143 * Makefile.in: Regenerate.
2144 * configure.in: Added xc16x related entry.
2145 * configure: Regenerate.
2146 * config/tc-xc16x.h: New file
2147 * config/tc-xc16x.c: New file
2148 * doc/c-xc16x.texi: New file for xc16x
2149 * doc/all.texi: Entry for xc16x
a70ae331 2150 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2151 * NEWS: Announce the support for the new target.
2152
aaa2ab3d
NH
21532006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2154
2155 * configure.tgt: set emulation for mips-*-netbsd*
2156
82de001f
JJ
21572006-02-14 Jakub Jelinek <jakub@redhat.com>
2158
2159 * config.in: Rebuilt.
2160
431ad2d0
BW
21612006-02-13 Bob Wilson <bob.wilson@acm.org>
2162
2163 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2164 from 1, not 0, in error messages.
2165 (md_assemble): Simplify special-case check for ENTRY instructions.
2166 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2167 operand in error message.
2168
94089a50
JM
21692006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2170
2171 * configure.tgt (arm-*-linux-gnueabi*): Change to
2172 arm-*-linux-*eabi*.
2173
52de4c06
NC
21742006-02-10 Nick Clifton <nickc@redhat.com>
2175
70e45ad9
NC
2176 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2177 32-bit value is propagated into the upper bits of a 64-bit long.
2178
52de4c06
NC
2179 * config/tc-arc.c (init_opcode_tables): Fix cast.
2180 (arc_extoper, md_operand): Likewise.
2181
21af2bbd
BW
21822006-02-09 David Heine <dlheine@tensilica.com>
2183
2184 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2185 each relaxation step.
2186
75a706fc 21872006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2188
75a706fc
L
2189 * configure.in (CHECK_DECLS): Add vsnprintf.
2190 * configure: Regenerate.
2191 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2192 include/declare here, but...
2193 * as.h: Move code detecting VARARGS idiom to the top.
2194 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2195 (vsnprintf): Declare if not already declared.
2196
0d474464
L
21972006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2198
2199 * as.c (close_output_file): New.
2200 (main): Register close_output_file with xatexit before
2201 dump_statistics. Don't call output_file_close.
2202
266abb8f
NS
22032006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2204
2205 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2206 mcf5329_control_regs): New.
2207 (not_current_architecture, selected_arch, selected_cpu): New.
2208 (m68k_archs, m68k_extensions): New.
2209 (archs): Renamed to ...
2210 (m68k_cpus): ... here. Adjust.
2211 (n_arches): Remove.
2212 (md_pseudo_table): Add arch and cpu directives.
2213 (find_cf_chip, m68k_ip): Adjust table scanning.
2214 (no_68851, no_68881): Remove.
2215 (md_assemble): Lazily initialize.
2216 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2217 (md_init_after_args): Move functionality to m68k_init_arch.
2218 (mri_chip): Adjust table scanning.
2219 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2220 options with saner parsing.
2221 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2222 m68k_init_arch): New.
2223 (s_m68k_cpu, s_m68k_arch): New.
2224 (md_show_usage): Adjust.
2225 (m68k_elf_final_processing): Set CF EF flags.
2226 * config/tc-m68k.h (m68k_init_after_args): Remove.
2227 (tc_init_after_args): Remove.
2228 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2229 (M68k-Directives): Document .arch and .cpu directives.
2230
134dcee5
AM
22312006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2232
a70ae331
AM
2233 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2234 synonyms for equ and defl.
134dcee5
AM
2235 (z80_cons_fix_new): New function.
2236 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2237 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2238 now handled as pseudo-op rather than an instruction.
2239 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2240 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2241 Add entries for def24,def32,d24,d32.
2242 (md_assemble): Improved error handling.
2243 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2244 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2245 (z80_cons_fix_new): Declare.
a70ae331 2246 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2247 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2248
a9931606
PB
22492006-02-02 Paul Brook <paul@codesourcery.com>
2250
2251 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2252
ef8d22e6
PB
22532005-02-02 Paul Brook <paul@codesourcery.com>
2254
2255 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2256 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2257 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2258 T2_OPCODE_RSB): Define.
2259 (thumb32_negate_data_op): New function.
2260 (md_apply_fix): Use it.
2261
e7da6241
BW
22622006-01-31 Bob Wilson <bob.wilson@acm.org>
2263
2264 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2265 fields.
2266 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2267 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2268 subtracted symbols.
2269 (relaxation_requirements): Add pfinish_frag argument and use it to
2270 replace setting tinsn->record_fix fields.
2271 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2272 and vinsn_to_insnbuf. Remove references to record_fix and
2273 slot_sub_symbols fields.
2274 (xtensa_mark_narrow_branches): Delete unused code.
2275 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2276 a symbol.
2277 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2278 record_fix fields.
2279 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2280 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2281 of the record_fix field. Simplify error messages for unexpected
2282 symbolic operands.
2283 (set_expr_symbol_offset_diff): Delete.
2284
79134647
PB
22852006-01-31 Paul Brook <paul@codesourcery.com>
2286
2287 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2288
e74cfd16
PB
22892006-01-31 Paul Brook <paul@codesourcery.com>
2290 Richard Earnshaw <rearnsha@arm.com>
2291
2292 * config/tc-arm.c: Use arm_feature_set.
2293 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2294 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2295 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2296 New variables.
2297 (insns): Use them.
2298 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2299 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2300 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2301 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2302 feature flags.
2303 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2304 (arm_opts): Move old cpu/arch options from here...
2305 (arm_legacy_opts): ... to here.
2306 (md_parse_option): Search arm_legacy_opts.
2307 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2308 (arm_float_abis, arm_eabis): Make const.
2309
d47d412e
BW
23102006-01-25 Bob Wilson <bob.wilson@acm.org>
2311
2312 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2313
b14273fe
JZ
23142006-01-21 Jie Zhang <jie.zhang@analog.com>
2315
2316 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2317 in load immediate intruction.
2318
39cd1c76
JZ
23192006-01-21 Jie Zhang <jie.zhang@analog.com>
2320
2321 * config/bfin-parse.y (value_match): Use correct conversion
2322 specifications in template string for __FILE__ and __LINE__.
2323 (binary): Ditto.
2324 (unary): Ditto.
2325
67a4f2b7
AO
23262006-01-18 Alexandre Oliva <aoliva@redhat.com>
2327
2328 Introduce TLS descriptors for i386 and x86_64.
2329 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2330 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2331 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2332 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2333 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2334 displacement bits.
2335 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2336 (lex_got): Handle @tlsdesc and @tlscall.
2337 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2338
8ad7c533
NC
23392006-01-11 Nick Clifton <nickc@redhat.com>
2340
2341 Fixes for building on 64-bit hosts:
2342 * config/tc-avr.c (mod_index): New union to allow conversion
2343 between pointers and integers.
2344 (md_begin, avr_ldi_expression): Use it.
2345 * config/tc-i370.c (md_assemble): Add cast for argument to print
2346 statement.
2347 * config/tc-tic54x.c (subsym_substitute): Likewise.
2348 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2349 opindex field of fr_cgen structure into a pointer so that it can
2350 be stored in a frag.
2351 * config/tc-mn10300.c (md_assemble): Likewise.
2352 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2353 types.
2354 * config/tc-v850.c: Replace uses of (int) casts with correct
2355 types.
2356
4dcb3903
L
23572006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2358
2359 PR gas/2117
2360 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2361
e0f6ea40
HPN
23622006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2363
2364 PR gas/2101
2365 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2366 a local-label reference.
2367
e88d958a 2368For older changes see ChangeLog-2005
08d56133
NC
2369\f
2370Local Variables:
2371mode: change-log
2372left-margin: 8
2373fill-column: 74
2374version-control: never
2375End:
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