gdb: fix some inferior_created observer signatures
[deliverable/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
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PW
2* Add support for Cortex-A78 and Cortex-A78AE for AArch64.
3
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PW
4* Add support for ETMv4 (Embedded Trace Macrocell) system registers for
5 AArch64.
6
7* Add support for ETE (Embedded Trace Extension) system registers for AArch64.
8
9* Add support for TRBE (Trace Buffer Extension) system registers for AArch64.
10
11* Add support for Cortex-X1 for AArch64.
12
13* Add support for Cortex-X1 for ARM.
14
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AC
15* Add support for Arm's Cortex-R82, Neoverse V1, and Neoverse N2
16 processors.
17
18* Add support for Armv8-R AArch64.
19
81d54bb7 20* Add support for Intel TDX instructions.
96a84ea3 21
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22* Add support for Intel Key Locker instructions.
23
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24* Added a .nop directive to generate a single no-op instruction in a target
25 neutral manner. This instruction does have an effect on DWARF line number
26 generation, if that is active.
27
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28* Removed --reduce-memory-overheads and --hash-size as gas now
29 uses hash tables that can be expand and shrink automatically.
30
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31* Add {disp16} pseudo prefix to x86 assembler.
32
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LC
33* Add support for Intel AMX instructions.
34
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35* Configure with --enable-x86-used-note by default for Linux/x86.
36
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NC
37Changes in 2.35:
38
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39* X86 NaCl target support is removed.
40
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L
41* Extend .symver directive to update visibility of the original symbol
42 and assign one original symbol to different versioned symbols.
43
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L
44* Add support for Intel SERIALIZE and TSXLDTRK instructions.
45
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L
46* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
47 -mlfence-before-ret= options to x86 assembler to help mitigate
48 CVE-2020-0551.
49
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50* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
51 (if such output is being generated). Added the ability to generate
52 version 5 .debug_line sections.
53
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54* Add -mbig-obj support to i386 MingW targets.
55
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NC
56Changes in 2.34:
57
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L
58* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
59 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
60 options to x86 assembler to align branches within a fixed boundary
61 with segment prefixes or NOPs.
62
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63* Add support for Zilog eZ80 and Zilog Z180 CPUs.
64
65* Add support for z80-elf target.
66
67* Add support for relocation of each byte or word of multibyte value to Z80
68 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
69 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
70
71* Add SDCC support for Z80 targets.
72
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73Changes in 2.33:
74
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75* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
76 instructions.
77
78* Add support for the Arm Transactional Memory Extension (TME)
79 instructions.
80
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81* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
82 instructions.
83
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84* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
85 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
86 time option to set the default behavior. Set the default if the configure
87 option is not used to "no".
6f2117ba 88
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89* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
90 processors.
91
92* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
93 Cortex-A76AE, and Cortex-A77 processors.
94
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95* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
96 floating point literals. Add .float16_format directive and
97 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
98 encoding.
99
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100* Add --gdwarf-cie-version command line flag. This allows control over which
101 version of DWARF CIE the assembler creates.
102
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103Changes in 2.32:
104
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105* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
106 VEX.W-ignored (WIG) VEX instructions.
107
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108* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
109 notes. Add a --enable-x86-used-note configure time option to set the
110 default behavior. Set the default if the configure option is not used
111 to "no".
112
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113* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
114
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115* Add support for the MIPS Loongson EXTensions (EXT) instructions.
116
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117* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
118
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119* Add support for the C-SKY processor series.
120
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121* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
122 ASE.
123
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NC
124Changes in 2.31:
125
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126* The ADR and ADRL pseudo-instructions supported by the ARM assembler
127 now only set the bottom bit of the address of thumb function symbols
128 if the -mthumb-interwork command line option is active.
129
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130* Add support for the MIPS Global INValidate (GINV) ASE.
131
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132* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
133
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134* Add support for the Freescale S12Z architecture.
135
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NC
136* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
137 Build Attribute notes if none are present in the input sources. Add a
138 --enable-generate-build-notes=[yes|no] configure time option to set the
139 default behaviour. Set the default if the configure option is not used
140 to "no".
141
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142* Remove -mold-gcc command-line option for x86 targets.
143
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L
144* Add -O[2|s] command-line options to x86 assembler to enable alternate
145 shorter instruction encoding.
146
8f065d3b 147* Add support for .nops directive. It is currently supported only for
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148 x86 targets.
149
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150Changes in 2.30:
151
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152* Add support for loaction views in DWARF debug line information.
153
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154Changes in 2.29:
155
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156* Add support for ELF SHF_GNU_MBIND.
157
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158* Add support for the WebAssembly file format and wasm32 ELF conversion.
159
7e0de605 160* PowerPC gas now checks that the correct register class is used in
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161 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
162 that the registers are invalid.
7e0de605 163
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164* Add support for the Texas Instruments PRU processor.
165
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TP
166* Support for the ARMv8-R architecture and Cortex-R52 processor has been
167 added to the ARM port.
ced40572 168
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169Changes in 2.28:
170
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171* Add support for the RISC-V architecture.
172
b19ea8d2 173* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 174
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175Changes in 2.27:
176
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177* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
178
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179* Add --no-pad-sections to stop the assembler from padding the end of output
180 sections up to their alignment boundary.
181
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182* Support for the ARMv8-M architecture has been added to the ARM port. Support
183 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
184 port.
185
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186* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
187 .extCoreRegister pseudo-ops that allow an user to define custom
188 instructions, conditional codes, auxiliary and core registers.
189
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L
190* Add a configure option --enable-elf-stt-common to decide whether ELF
191 assembler should generate common symbols with the STT_COMMON type by
192 default. Default to no.
193
a05a5b64 194* New command-line option --elf-stt-common= for ELF targets to control
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195 whether to generate common symbols with the STT_COMMON type.
196
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197* Add ability to set section flags and types via numeric values for ELF
198 based targets.
81c23f82 199
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200* Add a configure option --enable-x86-relax-relocations to decide whether
201 x86 assembler should generate relax relocations by default. Default to
202 yes, except for x86 Solaris targets older than Solaris 12.
203
a05a5b64 204* New command-line option -mrelax-relocations= for x86 target to control
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205 whether to generate relax relocations.
206
a05a5b64 207* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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208 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
209
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210* Add assembly-time relaxation option for ARC cpus.
211
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212* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
213 cpu type to be adjusted at configure time.
214
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215Changes in 2.26:
216
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217* Add a configure option --enable-compressed-debug-sections={all,gas} to
218 decide whether DWARF debug sections should be compressed by default.
e12fe555 219
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220* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
221 assembler support for Argonaut RISC architectures.
222
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NC
223* Symbol and label names can now be enclosed in double quotes (") which allows
224 them to contain characters that are not part of valid symbol names in high
225 level languages.
226
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227* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
228 previous spelling, -march=armv6zk, is still accepted.
229
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230* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
231 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
232 extensions has also been added to the Aarch64 port.
233
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234* Support for the ARMv8.1 architecture has been added to the ARM port. Support
235 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
236 been added to the ARM port.
237
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238* Extend --compress-debug-sections option to support
239 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
240 targets.
241
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242* --compress-debug-sections is turned on for Linux/x86 by default.
243
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244Changes in 2.25:
245
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246* Add support for the AVR Tiny microcontrollers.
247
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248* Replace support for openrisc and or32 with support for or1k.
249
2e6976a8 250* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 251 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 252
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253* Add support for the Andes NDS32.
254
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TG
255Changes in 2.24:
256
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NC
257* Add support for the Texas Instruments MSP430X processor.
258
a05a5b64 259* Add -gdwarf-sections command-line option to enable per-code-section
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260 generation of DWARF .debug_line sections.
261
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262* Add support for Altera Nios II.
263
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NC
264* Add support for the Imagination Technologies Meta processor.
265
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266* Add support for the v850e3v5.
267
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268* Remove assembler support for MIPS ECOFF targets.
269
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270Changes in 2.23:
271
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NC
272* Add support for the 64-bit ARM architecture: AArch64.
273
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NC
274* Add support for S12X processor.
275
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JL
276* Add support for the VLE extension to the PowerPC architecture.
277
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278* Add support for the Freescale XGATE architecture.
279
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RM
280* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
281 directives. These are currently available only for x86 and ARM targets.
282
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283* Add support for the Renesas RL78 architecture.
284
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NC
285* Add support for the Adapteva EPIPHANY architecture.
286
fe13e45b 287* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 288
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289Changes in 2.22:
290
69f56ae1 291* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 292
90b3661c 293Changes in 2.21:
44f45767 294
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295* Gas no longer requires doubling of ampersands in macros.
296
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JM
297* Add support for the TMS320C6000 (TI C6X) processor family.
298
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299* GAS now understands an extended syntax in the .section directive flags
300 for COFF targets that allows the section's alignment to be specified. This
301 feature has also been backported to the 2.20 release series, starting with
302 2.20.1.
303
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304* Add support for the Renesas RX processor.
305
a05a5b64 306* New command-line option, --compress-debug-sections, which requests
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307 compression of DWARF debug information sections in the relocatable output
308 file. Compressed debug sections are supported by readelf, objdump, and
309 gold, but not currently by Gnu ld.
310
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311Changes in 2.20:
312
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313* Added support for v850e2 and v850e2v3.
314
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315* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
316 pseudo op. It marks the symbol as being globally unique in the entire
317 process.
318
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319* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
320 in binary rather than text.
6e33da12 321
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322* Add support for common symbol alignment to PE formats.
323
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324* Add support for the new discriminator column in the DWARF line table,
325 with a discriminator operand for the .loc directive.
326
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327* Add support for Sunplus score architecture.
328
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329* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
330 indicate that if the symbol is the target of a relocation, its value should
331 not be use. Instead the function should be invoked and its result used as
332 the value.
fa94de6b 333
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334* Add support for Lattice Mico32 (lm32) architecture.
335
fa94de6b 336* Add support for Xilinx MicroBlaze architecture.
caa03924 337
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338Changes in 2.19:
339
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340* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
341 tables without runtime relocation.
342
a05a5b64 343* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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344 adds compatibility with H'00 style hex constants.
345
a05a5b64 346* New command-line option, -msse-check=[none|error|warning], for x86
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347 targets.
348
a05a5b64 349* New sub-option added to the assembler's -a command-line switch to
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350 generate a listing output. The 'g' sub-option will insert into the listing
351 various information about the assembly, such as assembler version, the
a05a5b64 352 command-line options used, and a time stamp.
83f10cb2 353
a05a5b64 354* New command-line option -msse2avx for x86 target to encode SSE
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355 instructions with VEX prefix.
356
f1f8f695 357* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 358
a05a5b64 359* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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360 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
361 -mnaked-reg and -mold-gcc, for x86 targets.
362
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363* Support for generating wide character strings has been added via the new
364 pseudo ops: .string16, .string32 and .string64.
365
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366* Support for SSE5 has been added to the i386 port.
367
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368Changes in 2.18:
369
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370* The GAS sources are now released under the GPLv3.
371
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NC
372* Support for the National Semiconductor CR16 target has been added.
373
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AM
374* Added gas .reloc pseudo. This is a low-level interface for creating
375 relocations.
376
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377* Add support for x86_64 PE+ target.
378
1c0d3aa6 379* Add support for Score target.
83518699 380
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381Changes in 2.17:
382
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383* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
384
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385* Support for ms2 architecture has been added.
386
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387* Support for the Z80 processor family has been added.
388
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MM
389* Add support for the "@<file>" syntax to the command line, so that extra
390 switches can be read from <file>.
391
a05a5b64 392* The SH target supports a new command-line switch --enable-reg-prefix which,
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393 if enabled, will allow register names to be optionally prefixed with a $
394 character. This allows register names to be distinguished from label names.
fa94de6b 395
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396* Macros with a variable number of arguments are now supported. See the
397 documentation for how this works.
398
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NC
399* Added --reduce-memory-overheads switch to reduce the size of the hash
400 tables used, at the expense of longer assembly times, and
401 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
402
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403* Macro names and macro parameter names can now be any identifier that would
404 also be legal as a symbol elsewhere. For macro parameter names, this is
405 known to cause problems in certain sources when the respective target uses
406 characters inconsistently, and thus macro parameter references may no longer
407 be recognized as such (see the documentation for details).
fa94de6b 408
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NC
409* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
410 for the VAX target in order to be more compatible with the VAX MACRO
411 assembler.
412
a05a5b64 413* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 414
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NC
415Changes in 2.16:
416
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417* Redefinition of macros now results in an error.
418
a05a5b64 419* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 420
a05a5b64 421* New command-line option -munwind-check=[warning|error] for IA64
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422 targets.
423
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424* The IA64 port now uses automatic dependency violation removal as its default
425 mode.
426
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427* Port to MAXQ processor contributed by HCL Tech.
428
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429* Added support for generating unwind tables for ARM ELF targets.
430
a05a5b64 431* Add a -g command-line option to generate debug information in the target's
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432 preferred debug format.
433
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434* Support for the crx-elf target added.
435
1a320fbb 436* Support for the sh-symbianelf target added.
1fe1f39c 437
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438* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
439 on pe[i]-i386; required for this target's DWARF 2 support.
440
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441* Support for Motorola MCF521x/5249/547x/548x added.
442
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NC
443* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
444 instrucitons.
445
a05a5b64 446* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 447
a05a5b64 448* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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449 added to enter (and leave) alternate macro syntax mode.
450
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NC
451Changes in 2.15:
452
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CD
453* The MIPS -membedded-pic option (Embedded-PIC code generation) is
454 deprecated and will be removed in a future release.
455
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456* Added PIC m32r Linux (ELF) and support to M32R assembler.
457
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458* Added support for ARM V6.
459
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460* Added support for sh4a and variants.
461
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462* Support for Renesas M32R2 added.
463
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464* Limited support for Mapping Symbols as specified in the ARM ELF
465 specification has been added to the arm assembler.
ed769ec1 466
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467* On ARM architectures, added a new gas directive ".unreq" that undoes
468 definitions created by ".req".
469
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470* Support for Motorola ColdFire MCF528x added.
471
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472* Added --gstabs+ switch to enable the generation of STABS debug format
473 information with GNU extensions.
fa94de6b 474
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CD
475* Added support for MIPS64 Release 2.
476
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NC
477* Added support for v850e1.
478
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479* Added -n switch for x86 assembler. By default, x86 GAS replaces
480 multiple nop instructions used for alignment within code sections
481 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
482 switch disables the optimization.
483
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484* Removed -n option from MIPS assembler. It was not useful, and confused the
485 existing -non_shared option.
486
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CD
487Changes in 2.14:
488
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489* Added support for MIPS32 Release 2.
490
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NC
491* Added support for Xtensa architecture.
492
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NC
493* Support for Intel's iWMMXt processor (an ARM variant) added.
494
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NC
495* An assembler test generator has been contributed and an example file that
496 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 497
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NC
498* Support for SH2E added.
499
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500* GASP has now been removed.
501
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502* Support for Texas Instruments TMS320C4x and TMS320C3x series of
503 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 504
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NC
505* Support for the Ubicom IP2xxx microcontroller added.
506
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NC
507Changes in 2.13:
508
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509* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
510 and FR500 included.
0ebb9a87 511
a40cbfa3 512* Support for DLX processor added.
52216602 513
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NC
514* GASP has now been deprecated and will be removed in a future release. Use
515 the macro facilities in GAS instead.
3f965e60 516
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NC
517* GASP now correctly parses floating point numbers. Unless the base is
518 explicitly specified, they are interpreted as decimal numbers regardless of
519 the currently specified base.
1ac57253 520
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NC
521Changes in 2.12:
522
a40cbfa3 523* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 524
a40cbfa3 525* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 526
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527* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
528 specifying the target instruction set. The old method of specifying the
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529 target processor has been deprecated, but is still accepted for
530 compatibility.
03b1477f 531
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532* Support for the VFP floating-point instruction set has been added to
533 the ARM assembler.
252b5132 534
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535* New psuedo op: .incbin to include a set of binary data at a given point
536 in the assembly. Contributed by Anders Norlander.
7e005732 537
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538* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
539 but still works for compatability.
ec68c924 540
fa94de6b 541* The MIPS assembler no longer issues a warning by default when it
a05a5b64 542 generates a nop instruction from a macro. The new command-line option
a40cbfa3 543 -n will turn on the warning.
63486801 544
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545Changes in 2.11:
546
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547* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
548
a40cbfa3 549* x86 gas now supports the full Pentium4 instruction set.
a167610d 550
a40cbfa3 551* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 552
a40cbfa3 553* Support for Motorola 68HC11 and 68HC12.
df86943d 554
a40cbfa3 555* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 556
a40cbfa3 557* Support for IA-64.
2dac7317 558
a40cbfa3 559* Support for i860, by Jason Eckhardt.
22b36938 560
a40cbfa3 561* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 562
a40cbfa3 563* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 564
a05a5b64 565* x86 gas -q command-line option quietens warnings about register size changes
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566 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
567 translating various deprecated floating point instructions.
a38cf1db 568
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569Changes in 2.10:
570
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571* Support for the ARM msr instruction was changed to only allow an immediate
572 operand when altering the flags field.
d14442f4 573
a40cbfa3 574* Support for ATMEL AVR.
adde6300 575
a40cbfa3 576* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 577
a40cbfa3 578* Support for numbers with suffixes.
3fd9f047 579
a40cbfa3 580* Added support for breaking to the end of repeat loops.
6a6987a9 581
a40cbfa3 582* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 583
a40cbfa3 584* New .elseif pseudo-op added.
3fd9f047 585
a40cbfa3 586* New --fatal-warnings option.
1f776aa5 587
a40cbfa3 588* picoJava architecture support added.
252b5132 589
a40cbfa3 590* Motorola MCore 210 processor support added.
041dd5a9 591
fa94de6b 592* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 593 assembly programs with intel syntax.
252b5132 594
a40cbfa3 595* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 596
a40cbfa3 597* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 598
a40cbfa3 599* Full 16-bit mode support for i386.
252b5132 600
fa94de6b 601* Greatly improved instruction operand checking for i386. This change will
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602 produce errors or warnings on incorrect assembly code that previous versions
603 of gas accepted. If you get unexpected messages from code that worked with
604 older versions of gas, please double check the code before reporting a bug.
252b5132 605
a40cbfa3 606* Weak symbol support added for COFF targets.
252b5132 607
a40cbfa3 608* Mitsubishi D30V support added.
252b5132 609
a40cbfa3 610* Texas Instruments c80 (tms320c80) support added.
252b5132 611
a40cbfa3 612* i960 ELF support added.
bedf545c 613
a40cbfa3 614* ARM ELF support added.
a057431b 615
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616Changes in 2.9:
617
a40cbfa3 618* Texas Instruments c30 (tms320c30) support added.
252b5132 619
fa94de6b 620* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 621 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 622
a40cbfa3 623* Added --gstabs option to generate stabs debugging information.
252b5132 624
fa94de6b 625* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 626 listing.
252b5132 627
a40cbfa3 628* Added -MD option to print dependencies.
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629
630Changes in 2.8:
631
a40cbfa3 632* BeOS support added.
252b5132 633
a40cbfa3 634* MIPS16 support added.
252b5132 635
a40cbfa3 636* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 637
a40cbfa3 638* Alpha/VMS support added.
252b5132 639
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640* m68k options --base-size-default-16, --base-size-default-32,
641 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 642
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643* The alignment directives now take an optional third argument, which is the
644 maximum number of bytes to skip. If doing the alignment would require
645 skipping more than the given number of bytes, the alignment is not done at
646 all.
252b5132 647
a40cbfa3 648* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 649
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650* The -a option takes a new suboption, c (e.g., -alc), to skip false
651 conditionals in listings.
252b5132 652
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653* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
654 the symbol is already defined.
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655
656Changes in 2.7:
657
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658* The PowerPC assembler now allows the use of symbolic register names (r0,
659 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
660 can be used any time. PowerPC 860 move to/from SPR instructions have been
661 added.
252b5132 662
a40cbfa3 663* Alpha Linux (ELF) support added.
252b5132 664
a40cbfa3 665* PowerPC ELF support added.
252b5132 666
a40cbfa3 667* m68k Linux (ELF) support added.
252b5132 668
a40cbfa3 669* i960 Hx/Jx support added.
252b5132 670
a40cbfa3 671* i386/PowerPC gnu-win32 support added.
252b5132 672
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673* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
674 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 675 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 676 target=i386-unknown-sco3.2v5elf.
252b5132 677
a40cbfa3 678* m88k-motorola-sysv3* support added.
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679
680Changes in 2.6:
681
a40cbfa3 682* Gas now directly supports macros, without requiring GASP.
252b5132 683
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684* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
685 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
686 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 687
a40cbfa3 688* Added --defsym SYM=VALUE option.
252b5132 689
a40cbfa3 690* Added -mips4 support to MIPS assembler.
252b5132 691
a40cbfa3 692* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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693
694Changes in 2.4:
695
a40cbfa3 696* Converted this directory to use an autoconf-generated configure script.
252b5132 697
a40cbfa3 698* ARM support, from Richard Earnshaw.
252b5132 699
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700* Updated VMS support, from Pat Rankin, including considerably improved
701 debugging support.
252b5132 702
a40cbfa3 703* Support for the control registers in the 68060.
252b5132 704
a40cbfa3 705* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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706 provide for possible future gcc changes, for targets where gas provides some
707 features not available in the native assembler. If the native assembler is
a40cbfa3 708 used, it should become obvious pretty quickly what the problem is.
252b5132 709
a40cbfa3 710* Usage message is available with "--help".
252b5132 711
fa94de6b 712* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 713 also, but didn't get into the NEWS file.)
252b5132 714
a40cbfa3 715* Weak symbol support for a.out.
252b5132 716
fa94de6b 717* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 718 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 719
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720* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
721 Paul Kranenburg.
252b5132 722
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723* Improved Alpha support. Immediate constants can have a much larger range
724 now. Support for the 21164 has been contributed by Digital.
252b5132 725
a40cbfa3 726* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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727
728Changes in 2.3:
729
a40cbfa3 730* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 731
a40cbfa3 732* RS/6000 and PowerPC support by Ian Taylor.
252b5132 733
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734* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
735 based on mail received from various people. The `-h#' option should work
736 again too.
252b5132 737
a40cbfa3 738* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 739 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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740 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
741 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
742 in the "dist" directory.
252b5132 743
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744* Vax support in gas fixed for BSD, so it builds and seems to run a couple
745 simple tests okay. I haven't put it through extensive testing. (GNU make is
746 currently required for BSD 4.3 builds.)
252b5132 747
fa94de6b 748* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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749 based on code donated by CMU, which used an a.out-based format. I'm afraid
750 the alpha-a.out support is pretty badly mangled, and much of it removed;
751 making it work will require rewriting it as BFD support for the format anyways.
252b5132 752
a40cbfa3 753* Irix 5 support.
252b5132 754
fa94de6b 755* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 756 couple different versions of expect and dejagnu.
252b5132 757
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758* Symbols' values are now handled internally as expressions, permitting more
759 flexibility in evaluating them in some cases. Some details of relocation
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760 handling have also changed, and simple constant pool management has been
761 added, to make the Alpha port easier.
252b5132 762
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763* New option "--statistics" for printing out program run times. This is
764 intended to be used with the gcc "-Q" option, which prints out times spent in
765 various phases of compilation. (You should be able to get all of them
766 printed out with "gcc -Q -Wa,--statistics", I think.)
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767
768Changes in 2.2:
769
a40cbfa3 770* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 771
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772* Configurations that are still in development (and therefore are convenient to
773 have listed in configure.in) still get rejected without a minor change to
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774 gas/Makefile.in, so people not doing development work shouldn't get the
775 impression that support for such configurations is actually believed to be
776 reliable.
252b5132 777
fa94de6b 778* The program name (usually "as") is printed when a fatal error message is
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779 displayed. This should prevent some confusion about the source of occasional
780 messages about "internal errors".
252b5132 781
fa94de6b 782* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 783 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 784
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785* Symbol values are maintained as expressions instead of being immediately
786 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
787 more complex calculations involving symbols whose values are not alreadey
788 known.
252b5132 789
a40cbfa3 790* DBX-style debugging info ("stabs") is now supported for COFF formats.
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791 If any stabs directives are seen in the source, GAS will create two new
792 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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793 section is nearly identical to the a.out symbol format, and .stabstr is
794 its string table. For this to be useful, you must have configured GCC
795 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
796 that can use the stab sections (4.11 or later).
252b5132 797
fa94de6b 798* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 799 support is in progress.
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800
801Changes in 2.1:
802
fa94de6b 803* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 804 incorporated, but not well tested yet.
252b5132 805
fa94de6b 806* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 807 with gcc now.
252b5132 808
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809* Some minor adjustments to add (Convergent Technologies') Miniframe support,
810 suggested by Ronald Cole.
252b5132 811
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812* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
813 includes improved ELF support, which I've started adapting for SPARC Solaris
814 2.x. Integration isn't completely, so it probably won't work.
252b5132 815
a40cbfa3 816* HP9000/300 support, donated by HP, has been merged in.
252b5132 817
a40cbfa3 818* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 819
a40cbfa3 820* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 821
a40cbfa3 822* Test suite framework is starting to become reasonable.
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823
824Changes in 2.0:
825
a40cbfa3 826* Mostly bug fixes.
252b5132 827
a40cbfa3 828* Some more merging of BFD and ELF code, but ELF still doesn't work.
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829
830Changes in 1.94:
831
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832* BFD merge is partly done. Adventurous souls may try giving configure the
833 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
834 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
835 or "solaris". (ELF isn't really supported yet. It needs work. I've got
836 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
837 fully merged yet.)
252b5132 838
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839* The 68K opcode table has been split in half. It should now compile under gcc
840 without consuming ridiculous amounts of memory.
252b5132 841
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842* A couple data structures have been reduced in size. This should result in
843 saving a little bit of space at runtime.
252b5132 844
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845* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
846 code provided ROSE format support, which I haven't merged in yet. (I can
847 make it available, if anyone wants to try it out.) Ralph's code, for BSD
848 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
849 coming.
252b5132 850
a40cbfa3 851* Support for the Hitachi H8/500 has been added.
252b5132 852
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853* VMS host and target support should be working now, thanks chiefly to Eric
854 Youngdale.
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855
856Changes in 1.93.01:
857
a40cbfa3 858* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 859
a40cbfa3 860* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 861
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862* For m68k, "%" is now accepted before register names. For COFF format, which
863 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
864 can be distinguished from the register.
252b5132 865
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866* Last public release was 1.38. Lots of configuration changes since then, lots
867 of new CPUs and formats, lots of bugs fixed.
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868
869\f
b3adc24a 870Copyright (C) 2012-2020 Free Software Foundation, Inc.
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871
872Copying and distribution of this file, with or without modification,
873are permitted in any medium without royalty provided the copyright
874notice and this notice are preserved.
875
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876Local variables:
877fill-column: 79
878End:
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