gdb/infrun: disable pagination in fetch_inferior_event
[deliverable/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
6d96a594 2
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L
3* Add support for Intel AVX VNNI instructions.
4
c1fa250a
LC
5* Add support for Intel HRESET instruction.
6
f64c42a9
LC
7* Add support for Intel UINTR instructions.
8
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C
9* Support non-absolute segment values for i386 lcall and ljmp.
10
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NC
11* When setting the link order attribute of ELF sections, it is now possible to
12 use a numeric section index instead of symbol name.
42c36b73 13
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NC
14* Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
15 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 16
b71702f1 17* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
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PW
18 Extension), TRBE (Trace Buffer Extension), CSRE (Call Stack Recorder
19 Extension) and BRBE (Branch Record Buffer Extension) system registers for
20 AArch64.
c81946ef 21
8926e54e 22* Add support for Armv8-R and Armv8.7-A AArch64.
c81946ef 23
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24* Add support for DSB memory nXS barrier and WFET instruction for Armv8.7
25 AArch64.
fd195909 26
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27* Add support for +csre feature for -march. Add CSR PDEC instruction for CSRE
28 feature.
29
81d54bb7 30* Add support for Intel TDX instructions.
96a84ea3 31
c4694f17
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32* Add support for Intel Key Locker instructions.
33
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34* Added a .nop directive to generate a single no-op instruction in a target
35 neutral manner. This instruction does have an effect on DWARF line number
36 generation, if that is active.
37
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ML
38* Removed --reduce-memory-overheads and --hash-size as gas now
39 uses hash tables that can be expand and shrink automatically.
40
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L
41* Add {disp16} pseudo prefix to x86 assembler.
42
260cd341
LC
43* Add support for Intel AMX instructions.
44
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45* Configure with --enable-x86-used-note by default for Linux/x86.
46
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NC
47Changes in 2.35:
48
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L
49* X86 NaCl target support is removed.
50
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L
51* Extend .symver directive to update visibility of the original symbol
52 and assign one original symbol to different versioned symbols.
53
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L
54* Add support for Intel SERIALIZE and TSXLDTRK instructions.
55
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L
56* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
57 -mlfence-before-ret= options to x86 assembler to help mitigate
58 CVE-2020-0551.
59
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60* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
61 (if such output is being generated). Added the ability to generate
62 version 5 .debug_line sections.
63
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TC
64* Add -mbig-obj support to i386 MingW targets.
65
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NC
66Changes in 2.34:
67
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68* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
69 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
70 options to x86 assembler to align branches within a fixed boundary
71 with segment prefixes or NOPs.
72
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73* Add support for Zilog eZ80 and Zilog Z180 CPUs.
74
75* Add support for z80-elf target.
76
77* Add support for relocation of each byte or word of multibyte value to Z80
78 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
79 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
80
81* Add SDCC support for Z80 targets.
82
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83Changes in 2.33:
84
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85* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
86 instructions.
87
88* Add support for the Arm Transactional Memory Extension (TME)
89 instructions.
90
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91* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
92 instructions.
93
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94* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
95 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
96 time option to set the default behavior. Set the default if the configure
97 option is not used to "no".
6f2117ba 98
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99* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
100 processors.
101
102* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
103 Cortex-A76AE, and Cortex-A77 processors.
104
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105* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
106 floating point literals. Add .float16_format directive and
107 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
108 encoding.
109
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110* Add --gdwarf-cie-version command line flag. This allows control over which
111 version of DWARF CIE the assembler creates.
112
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113Changes in 2.32:
114
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115* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
116 VEX.W-ignored (WIG) VEX instructions.
117
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118* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
119 notes. Add a --enable-x86-used-note configure time option to set the
120 default behavior. Set the default if the configure option is not used
121 to "no".
122
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123* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
124
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125* Add support for the MIPS Loongson EXTensions (EXT) instructions.
126
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127* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
128
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129* Add support for the C-SKY processor series.
130
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131* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
132 ASE.
133
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NC
134Changes in 2.31:
135
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136* The ADR and ADRL pseudo-instructions supported by the ARM assembler
137 now only set the bottom bit of the address of thumb function symbols
138 if the -mthumb-interwork command line option is active.
139
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140* Add support for the MIPS Global INValidate (GINV) ASE.
141
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SE
142* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
143
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144* Add support for the Freescale S12Z architecture.
145
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NC
146* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
147 Build Attribute notes if none are present in the input sources. Add a
148 --enable-generate-build-notes=[yes|no] configure time option to set the
149 default behaviour. Set the default if the configure option is not used
150 to "no".
151
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152* Remove -mold-gcc command-line option for x86 targets.
153
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L
154* Add -O[2|s] command-line options to x86 assembler to enable alternate
155 shorter instruction encoding.
156
8f065d3b 157* Add support for .nops directive. It is currently supported only for
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158 x86 targets.
159
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NC
160Changes in 2.30:
161
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162* Add support for loaction views in DWARF debug line information.
163
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164Changes in 2.29:
165
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166* Add support for ELF SHF_GNU_MBIND.
167
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168* Add support for the WebAssembly file format and wasm32 ELF conversion.
169
7e0de605 170* PowerPC gas now checks that the correct register class is used in
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171 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
172 that the registers are invalid.
7e0de605 173
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174* Add support for the Texas Instruments PRU processor.
175
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TP
176* Support for the ARMv8-R architecture and Cortex-R52 processor has been
177 added to the ARM port.
ced40572 178
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TG
179Changes in 2.28:
180
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181* Add support for the RISC-V architecture.
182
b19ea8d2 183* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 184
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TG
185Changes in 2.27:
186
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187* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
188
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189* Add --no-pad-sections to stop the assembler from padding the end of output
190 sections up to their alignment boundary.
191
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TP
192* Support for the ARMv8-M architecture has been added to the ARM port. Support
193 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
194 port.
195
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196* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
197 .extCoreRegister pseudo-ops that allow an user to define custom
198 instructions, conditional codes, auxiliary and core registers.
199
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200* Add a configure option --enable-elf-stt-common to decide whether ELF
201 assembler should generate common symbols with the STT_COMMON type by
202 default. Default to no.
203
a05a5b64 204* New command-line option --elf-stt-common= for ELF targets to control
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205 whether to generate common symbols with the STT_COMMON type.
206
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207* Add ability to set section flags and types via numeric values for ELF
208 based targets.
81c23f82 209
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210* Add a configure option --enable-x86-relax-relocations to decide whether
211 x86 assembler should generate relax relocations by default. Default to
212 yes, except for x86 Solaris targets older than Solaris 12.
213
a05a5b64 214* New command-line option -mrelax-relocations= for x86 target to control
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215 whether to generate relax relocations.
216
a05a5b64 217* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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218 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
219
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220* Add assembly-time relaxation option for ARC cpus.
221
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222* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
223 cpu type to be adjusted at configure time.
224
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225Changes in 2.26:
226
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227* Add a configure option --enable-compressed-debug-sections={all,gas} to
228 decide whether DWARF debug sections should be compressed by default.
e12fe555 229
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230* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
231 assembler support for Argonaut RISC architectures.
232
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NC
233* Symbol and label names can now be enclosed in double quotes (") which allows
234 them to contain characters that are not part of valid symbol names in high
235 level languages.
236
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237* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
238 previous spelling, -march=armv6zk, is still accepted.
239
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240* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
241 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
242 extensions has also been added to the Aarch64 port.
243
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244* Support for the ARMv8.1 architecture has been added to the ARM port. Support
245 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
246 been added to the ARM port.
247
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L
248* Extend --compress-debug-sections option to support
249 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
250 targets.
251
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252* --compress-debug-sections is turned on for Linux/x86 by default.
253
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TG
254Changes in 2.25:
255
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256* Add support for the AVR Tiny microcontrollers.
257
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CS
258* Replace support for openrisc and or32 with support for or1k.
259
2e6976a8 260* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 261 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 262
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263* Add support for the Andes NDS32.
264
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TG
265Changes in 2.24:
266
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267* Add support for the Texas Instruments MSP430X processor.
268
a05a5b64 269* Add -gdwarf-sections command-line option to enable per-code-section
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270 generation of DWARF .debug_line sections.
271
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272* Add support for Altera Nios II.
273
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NC
274* Add support for the Imagination Technologies Meta processor.
275
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NC
276* Add support for the v850e3v5.
277
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278* Remove assembler support for MIPS ECOFF targets.
279
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280Changes in 2.23:
281
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NC
282* Add support for the 64-bit ARM architecture: AArch64.
283
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NC
284* Add support for S12X processor.
285
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JL
286* Add support for the VLE extension to the PowerPC architecture.
287
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288* Add support for the Freescale XGATE architecture.
289
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290* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
291 directives. These are currently available only for x86 and ARM targets.
292
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293* Add support for the Renesas RL78 architecture.
294
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NC
295* Add support for the Adapteva EPIPHANY architecture.
296
fe13e45b 297* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 298
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299Changes in 2.22:
300
69f56ae1 301* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 302
90b3661c 303Changes in 2.21:
44f45767 304
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305* Gas no longer requires doubling of ampersands in macros.
306
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JM
307* Add support for the TMS320C6000 (TI C6X) processor family.
308
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309* GAS now understands an extended syntax in the .section directive flags
310 for COFF targets that allows the section's alignment to be specified. This
311 feature has also been backported to the 2.20 release series, starting with
312 2.20.1.
313
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314* Add support for the Renesas RX processor.
315
a05a5b64 316* New command-line option, --compress-debug-sections, which requests
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317 compression of DWARF debug information sections in the relocatable output
318 file. Compressed debug sections are supported by readelf, objdump, and
319 gold, but not currently by Gnu ld.
320
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321Changes in 2.20:
322
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323* Added support for v850e2 and v850e2v3.
324
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NC
325* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
326 pseudo op. It marks the symbol as being globally unique in the entire
327 process.
328
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329* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
330 in binary rather than text.
6e33da12 331
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332* Add support for common symbol alignment to PE formats.
333
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334* Add support for the new discriminator column in the DWARF line table,
335 with a discriminator operand for the .loc directive.
336
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NC
337* Add support for Sunplus score architecture.
338
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NC
339* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
340 indicate that if the symbol is the target of a relocation, its value should
341 not be use. Instead the function should be invoked and its result used as
342 the value.
fa94de6b 343
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344* Add support for Lattice Mico32 (lm32) architecture.
345
fa94de6b 346* Add support for Xilinx MicroBlaze architecture.
caa03924 347
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TG
348Changes in 2.19:
349
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350* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
351 tables without runtime relocation.
352
a05a5b64 353* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
354 adds compatibility with H'00 style hex constants.
355
a05a5b64 356* New command-line option, -msse-check=[none|error|warning], for x86
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357 targets.
358
a05a5b64 359* New sub-option added to the assembler's -a command-line switch to
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NC
360 generate a listing output. The 'g' sub-option will insert into the listing
361 various information about the assembly, such as assembler version, the
a05a5b64 362 command-line options used, and a time stamp.
83f10cb2 363
a05a5b64 364* New command-line option -msse2avx for x86 target to encode SSE
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365 instructions with VEX prefix.
366
f1f8f695 367* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 368
a05a5b64 369* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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370 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
371 -mnaked-reg and -mold-gcc, for x86 targets.
372
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NC
373* Support for generating wide character strings has been added via the new
374 pseudo ops: .string16, .string32 and .string64.
375
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MM
376* Support for SSE5 has been added to the i386 port.
377
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NC
378Changes in 2.18:
379
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380* The GAS sources are now released under the GPLv3.
381
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NC
382* Support for the National Semiconductor CR16 target has been added.
383
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AM
384* Added gas .reloc pseudo. This is a low-level interface for creating
385 relocations.
386
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NC
387* Add support for x86_64 PE+ target.
388
1c0d3aa6 389* Add support for Score target.
83518699 390
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NC
391Changes in 2.17:
392
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393* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
394
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NS
395* Support for ms2 architecture has been added.
396
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NC
397* Support for the Z80 processor family has been added.
398
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MM
399* Add support for the "@<file>" syntax to the command line, so that extra
400 switches can be read from <file>.
401
a05a5b64 402* The SH target supports a new command-line switch --enable-reg-prefix which,
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403 if enabled, will allow register names to be optionally prefixed with a $
404 character. This allows register names to be distinguished from label names.
fa94de6b 405
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406* Macros with a variable number of arguments are now supported. See the
407 documentation for how this works.
408
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NC
409* Added --reduce-memory-overheads switch to reduce the size of the hash
410 tables used, at the expense of longer assembly times, and
411 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
412
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413* Macro names and macro parameter names can now be any identifier that would
414 also be legal as a symbol elsewhere. For macro parameter names, this is
415 known to cause problems in certain sources when the respective target uses
416 characters inconsistently, and thus macro parameter references may no longer
417 be recognized as such (see the documentation for details).
fa94de6b 418
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NC
419* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
420 for the VAX target in order to be more compatible with the VAX MACRO
421 assembler.
422
a05a5b64 423* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 424
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NC
425Changes in 2.16:
426
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427* Redefinition of macros now results in an error.
428
a05a5b64 429* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 430
a05a5b64 431* New command-line option -munwind-check=[warning|error] for IA64
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432 targets.
433
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434* The IA64 port now uses automatic dependency violation removal as its default
435 mode.
436
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437* Port to MAXQ processor contributed by HCL Tech.
438
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NC
439* Added support for generating unwind tables for ARM ELF targets.
440
a05a5b64 441* Add a -g command-line option to generate debug information in the target's
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442 preferred debug format.
443
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444* Support for the crx-elf target added.
445
1a320fbb 446* Support for the sh-symbianelf target added.
1fe1f39c 447
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448* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
449 on pe[i]-i386; required for this target's DWARF 2 support.
450
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NC
451* Support for Motorola MCF521x/5249/547x/548x added.
452
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NC
453* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
454 instrucitons.
455
a05a5b64 456* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 457
a05a5b64 458* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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NC
459 added to enter (and leave) alternate macro syntax mode.
460
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NC
461Changes in 2.15:
462
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CD
463* The MIPS -membedded-pic option (Embedded-PIC code generation) is
464 deprecated and will be removed in a future release.
465
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NC
466* Added PIC m32r Linux (ELF) and support to M32R assembler.
467
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MM
468* Added support for ARM V6.
469
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470* Added support for sh4a and variants.
471
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NC
472* Support for Renesas M32R2 added.
473
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474* Limited support for Mapping Symbols as specified in the ARM ELF
475 specification has been added to the arm assembler.
ed769ec1 476
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NC
477* On ARM architectures, added a new gas directive ".unreq" that undoes
478 definitions created by ".req".
479
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NC
480* Support for Motorola ColdFire MCF528x added.
481
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NC
482* Added --gstabs+ switch to enable the generation of STABS debug format
483 information with GNU extensions.
fa94de6b 484
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CD
485* Added support for MIPS64 Release 2.
486
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NC
487* Added support for v850e1.
488
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L
489* Added -n switch for x86 assembler. By default, x86 GAS replaces
490 multiple nop instructions used for alignment within code sections
491 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
492 switch disables the optimization.
493
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494* Removed -n option from MIPS assembler. It was not useful, and confused the
495 existing -non_shared option.
496
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CD
497Changes in 2.14:
498
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CD
499* Added support for MIPS32 Release 2.
500
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NC
501* Added support for Xtensa architecture.
502
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NC
503* Support for Intel's iWMMXt processor (an ARM variant) added.
504
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NC
505* An assembler test generator has been contributed and an example file that
506 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 507
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NC
508* Support for SH2E added.
509
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510* GASP has now been removed.
511
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NC
512* Support for Texas Instruments TMS320C4x and TMS320C3x series of
513 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 514
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NC
515* Support for the Ubicom IP2xxx microcontroller added.
516
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517Changes in 2.13:
518
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519* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
520 and FR500 included.
0ebb9a87 521
a40cbfa3 522* Support for DLX processor added.
52216602 523
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524* GASP has now been deprecated and will be removed in a future release. Use
525 the macro facilities in GAS instead.
3f965e60 526
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527* GASP now correctly parses floating point numbers. Unless the base is
528 explicitly specified, they are interpreted as decimal numbers regardless of
529 the currently specified base.
1ac57253 530
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531Changes in 2.12:
532
a40cbfa3 533* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 534
a40cbfa3 535* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 536
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537* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
538 specifying the target instruction set. The old method of specifying the
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539 target processor has been deprecated, but is still accepted for
540 compatibility.
03b1477f 541
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542* Support for the VFP floating-point instruction set has been added to
543 the ARM assembler.
252b5132 544
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545* New psuedo op: .incbin to include a set of binary data at a given point
546 in the assembly. Contributed by Anders Norlander.
7e005732 547
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548* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
549 but still works for compatability.
ec68c924 550
fa94de6b 551* The MIPS assembler no longer issues a warning by default when it
a05a5b64 552 generates a nop instruction from a macro. The new command-line option
a40cbfa3 553 -n will turn on the warning.
63486801 554
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555Changes in 2.11:
556
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557* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
558
a40cbfa3 559* x86 gas now supports the full Pentium4 instruction set.
a167610d 560
a40cbfa3 561* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 562
a40cbfa3 563* Support for Motorola 68HC11 and 68HC12.
df86943d 564
a40cbfa3 565* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 566
a40cbfa3 567* Support for IA-64.
2dac7317 568
a40cbfa3 569* Support for i860, by Jason Eckhardt.
22b36938 570
a40cbfa3 571* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 572
a40cbfa3 573* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 574
a05a5b64 575* x86 gas -q command-line option quietens warnings about register size changes
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576 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
577 translating various deprecated floating point instructions.
a38cf1db 578
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579Changes in 2.10:
580
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581* Support for the ARM msr instruction was changed to only allow an immediate
582 operand when altering the flags field.
d14442f4 583
a40cbfa3 584* Support for ATMEL AVR.
adde6300 585
a40cbfa3 586* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 587
a40cbfa3 588* Support for numbers with suffixes.
3fd9f047 589
a40cbfa3 590* Added support for breaking to the end of repeat loops.
6a6987a9 591
a40cbfa3 592* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 593
a40cbfa3 594* New .elseif pseudo-op added.
3fd9f047 595
a40cbfa3 596* New --fatal-warnings option.
1f776aa5 597
a40cbfa3 598* picoJava architecture support added.
252b5132 599
a40cbfa3 600* Motorola MCore 210 processor support added.
041dd5a9 601
fa94de6b 602* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 603 assembly programs with intel syntax.
252b5132 604
a40cbfa3 605* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 606
a40cbfa3 607* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 608
a40cbfa3 609* Full 16-bit mode support for i386.
252b5132 610
fa94de6b 611* Greatly improved instruction operand checking for i386. This change will
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612 produce errors or warnings on incorrect assembly code that previous versions
613 of gas accepted. If you get unexpected messages from code that worked with
614 older versions of gas, please double check the code before reporting a bug.
252b5132 615
a40cbfa3 616* Weak symbol support added for COFF targets.
252b5132 617
a40cbfa3 618* Mitsubishi D30V support added.
252b5132 619
a40cbfa3 620* Texas Instruments c80 (tms320c80) support added.
252b5132 621
a40cbfa3 622* i960 ELF support added.
bedf545c 623
a40cbfa3 624* ARM ELF support added.
a057431b 625
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626Changes in 2.9:
627
a40cbfa3 628* Texas Instruments c30 (tms320c30) support added.
252b5132 629
fa94de6b 630* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 631 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 632
a40cbfa3 633* Added --gstabs option to generate stabs debugging information.
252b5132 634
fa94de6b 635* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 636 listing.
252b5132 637
a40cbfa3 638* Added -MD option to print dependencies.
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639
640Changes in 2.8:
641
a40cbfa3 642* BeOS support added.
252b5132 643
a40cbfa3 644* MIPS16 support added.
252b5132 645
a40cbfa3 646* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 647
a40cbfa3 648* Alpha/VMS support added.
252b5132 649
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650* m68k options --base-size-default-16, --base-size-default-32,
651 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 652
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653* The alignment directives now take an optional third argument, which is the
654 maximum number of bytes to skip. If doing the alignment would require
655 skipping more than the given number of bytes, the alignment is not done at
656 all.
252b5132 657
a40cbfa3 658* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 659
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660* The -a option takes a new suboption, c (e.g., -alc), to skip false
661 conditionals in listings.
252b5132 662
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663* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
664 the symbol is already defined.
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665
666Changes in 2.7:
667
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668* The PowerPC assembler now allows the use of symbolic register names (r0,
669 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
670 can be used any time. PowerPC 860 move to/from SPR instructions have been
671 added.
252b5132 672
a40cbfa3 673* Alpha Linux (ELF) support added.
252b5132 674
a40cbfa3 675* PowerPC ELF support added.
252b5132 676
a40cbfa3 677* m68k Linux (ELF) support added.
252b5132 678
a40cbfa3 679* i960 Hx/Jx support added.
252b5132 680
a40cbfa3 681* i386/PowerPC gnu-win32 support added.
252b5132 682
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683* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
684 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 685 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 686 target=i386-unknown-sco3.2v5elf.
252b5132 687
a40cbfa3 688* m88k-motorola-sysv3* support added.
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689
690Changes in 2.6:
691
a40cbfa3 692* Gas now directly supports macros, without requiring GASP.
252b5132 693
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694* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
695 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
696 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 697
a40cbfa3 698* Added --defsym SYM=VALUE option.
252b5132 699
a40cbfa3 700* Added -mips4 support to MIPS assembler.
252b5132 701
a40cbfa3 702* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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703
704Changes in 2.4:
705
a40cbfa3 706* Converted this directory to use an autoconf-generated configure script.
252b5132 707
a40cbfa3 708* ARM support, from Richard Earnshaw.
252b5132 709
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710* Updated VMS support, from Pat Rankin, including considerably improved
711 debugging support.
252b5132 712
a40cbfa3 713* Support for the control registers in the 68060.
252b5132 714
a40cbfa3 715* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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716 provide for possible future gcc changes, for targets where gas provides some
717 features not available in the native assembler. If the native assembler is
a40cbfa3 718 used, it should become obvious pretty quickly what the problem is.
252b5132 719
a40cbfa3 720* Usage message is available with "--help".
252b5132 721
fa94de6b 722* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 723 also, but didn't get into the NEWS file.)
252b5132 724
a40cbfa3 725* Weak symbol support for a.out.
252b5132 726
fa94de6b 727* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 728 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 729
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730* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
731 Paul Kranenburg.
252b5132 732
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733* Improved Alpha support. Immediate constants can have a much larger range
734 now. Support for the 21164 has been contributed by Digital.
252b5132 735
a40cbfa3 736* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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737
738Changes in 2.3:
739
a40cbfa3 740* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 741
a40cbfa3 742* RS/6000 and PowerPC support by Ian Taylor.
252b5132 743
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744* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
745 based on mail received from various people. The `-h#' option should work
746 again too.
252b5132 747
a40cbfa3 748* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 749 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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750 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
751 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
752 in the "dist" directory.
252b5132 753
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754* Vax support in gas fixed for BSD, so it builds and seems to run a couple
755 simple tests okay. I haven't put it through extensive testing. (GNU make is
756 currently required for BSD 4.3 builds.)
252b5132 757
fa94de6b 758* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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759 based on code donated by CMU, which used an a.out-based format. I'm afraid
760 the alpha-a.out support is pretty badly mangled, and much of it removed;
761 making it work will require rewriting it as BFD support for the format anyways.
252b5132 762
a40cbfa3 763* Irix 5 support.
252b5132 764
fa94de6b 765* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 766 couple different versions of expect and dejagnu.
252b5132 767
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768* Symbols' values are now handled internally as expressions, permitting more
769 flexibility in evaluating them in some cases. Some details of relocation
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770 handling have also changed, and simple constant pool management has been
771 added, to make the Alpha port easier.
252b5132 772
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773* New option "--statistics" for printing out program run times. This is
774 intended to be used with the gcc "-Q" option, which prints out times spent in
775 various phases of compilation. (You should be able to get all of them
776 printed out with "gcc -Q -Wa,--statistics", I think.)
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777
778Changes in 2.2:
779
a40cbfa3 780* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 781
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782* Configurations that are still in development (and therefore are convenient to
783 have listed in configure.in) still get rejected without a minor change to
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784 gas/Makefile.in, so people not doing development work shouldn't get the
785 impression that support for such configurations is actually believed to be
786 reliable.
252b5132 787
fa94de6b 788* The program name (usually "as") is printed when a fatal error message is
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789 displayed. This should prevent some confusion about the source of occasional
790 messages about "internal errors".
252b5132 791
fa94de6b 792* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 793 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 794
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795* Symbol values are maintained as expressions instead of being immediately
796 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
797 more complex calculations involving symbols whose values are not alreadey
798 known.
252b5132 799
a40cbfa3 800* DBX-style debugging info ("stabs") is now supported for COFF formats.
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801 If any stabs directives are seen in the source, GAS will create two new
802 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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803 section is nearly identical to the a.out symbol format, and .stabstr is
804 its string table. For this to be useful, you must have configured GCC
805 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
806 that can use the stab sections (4.11 or later).
252b5132 807
fa94de6b 808* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 809 support is in progress.
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810
811Changes in 2.1:
812
fa94de6b 813* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 814 incorporated, but not well tested yet.
252b5132 815
fa94de6b 816* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 817 with gcc now.
252b5132 818
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819* Some minor adjustments to add (Convergent Technologies') Miniframe support,
820 suggested by Ronald Cole.
252b5132 821
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822* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
823 includes improved ELF support, which I've started adapting for SPARC Solaris
824 2.x. Integration isn't completely, so it probably won't work.
252b5132 825
a40cbfa3 826* HP9000/300 support, donated by HP, has been merged in.
252b5132 827
a40cbfa3 828* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 829
a40cbfa3 830* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 831
a40cbfa3 832* Test suite framework is starting to become reasonable.
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833
834Changes in 2.0:
835
a40cbfa3 836* Mostly bug fixes.
252b5132 837
a40cbfa3 838* Some more merging of BFD and ELF code, but ELF still doesn't work.
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839
840Changes in 1.94:
841
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842* BFD merge is partly done. Adventurous souls may try giving configure the
843 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
844 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
845 or "solaris". (ELF isn't really supported yet. It needs work. I've got
846 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
847 fully merged yet.)
252b5132 848
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849* The 68K opcode table has been split in half. It should now compile under gcc
850 without consuming ridiculous amounts of memory.
252b5132 851
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852* A couple data structures have been reduced in size. This should result in
853 saving a little bit of space at runtime.
252b5132 854
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855* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
856 code provided ROSE format support, which I haven't merged in yet. (I can
857 make it available, if anyone wants to try it out.) Ralph's code, for BSD
858 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
859 coming.
252b5132 860
a40cbfa3 861* Support for the Hitachi H8/500 has been added.
252b5132 862
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863* VMS host and target support should be working now, thanks chiefly to Eric
864 Youngdale.
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865
866Changes in 1.93.01:
867
a40cbfa3 868* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 869
a40cbfa3 870* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 871
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872* For m68k, "%" is now accepted before register names. For COFF format, which
873 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
874 can be distinguished from the register.
252b5132 875
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876* Last public release was 1.38. Lots of configuration changes since then, lots
877 of new CPUs and formats, lots of bugs fixed.
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878
879\f
b3adc24a 880Copyright (C) 2012-2020 Free Software Foundation, Inc.
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881
882Copying and distribution of this file, with or without modification,
883are permitted in any medium without royalty provided the copyright
884notice and this notice are preserved.
885
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886Local variables:
887fill-column: 79
888End:
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