[gdb/testsuite] Fix printf regexp in gdb.server/sysroot.exp
[deliverable/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
96a84ea3 2
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NC
3* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
4 (if such output is being generated). Added the ability to generate
5 version 5 .debug_line sections.
6
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NC
7Changes in 2.34:
8
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L
9* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
10 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
11 options to x86 assembler to align branches within a fixed boundary
12 with segment prefixes or NOPs.
13
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SB
14* Add support for Zilog eZ80 and Zilog Z180 CPUs.
15
16* Add support for z80-elf target.
17
18* Add support for relocation of each byte or word of multibyte value to Z80
19 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
20 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
21
22* Add SDCC support for Z80 targets.
23
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24Changes in 2.33:
25
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26* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
27 instructions.
28
29* Add support for the Arm Transactional Memory Extension (TME)
30 instructions.
31
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32* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
33 instructions.
34
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BW
35* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
36 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
37 time option to set the default behavior. Set the default if the configure
38 option is not used to "no".
6f2117ba 39
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DZ
40* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
41 processors.
42
43* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
44 Cortex-A76AE, and Cortex-A77 processors.
45
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BW
46* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
47 floating point literals. Add .float16_format directive and
48 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
49 encoding.
50
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AB
51* Add --gdwarf-cie-version command line flag. This allows control over which
52 version of DWARF CIE the assembler creates.
53
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NC
54Changes in 2.32:
55
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56* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
57 VEX.W-ignored (WIG) VEX instructions.
58
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L
59* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
60 notes. Add a --enable-x86-used-note configure time option to set the
61 default behavior. Set the default if the configure option is not used
62 to "no".
63
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CX
64* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
65
bdc6c06e
CX
66* Add support for the MIPS Loongson EXTensions (EXT) instructions.
67
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CX
68* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
69
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AJ
70* Add support for the C-SKY processor series.
71
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CX
72* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
73 ASE.
74
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NC
75Changes in 2.31:
76
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77* The ADR and ADRL pseudo-instructions supported by the ARM assembler
78 now only set the bottom bit of the address of thumb function symbols
79 if the -mthumb-interwork command line option is active.
80
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FS
81* Add support for the MIPS Global INValidate (GINV) ASE.
82
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SE
83* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
84
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JD
85* Add support for the Freescale S12Z architecture.
86
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NC
87* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
88 Build Attribute notes if none are present in the input sources. Add a
89 --enable-generate-build-notes=[yes|no] configure time option to set the
90 default behaviour. Set the default if the configure option is not used
91 to "no".
92
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L
93* Remove -mold-gcc command-line option for x86 targets.
94
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L
95* Add -O[2|s] command-line options to x86 assembler to enable alternate
96 shorter instruction encoding.
97
8f065d3b 98* Add support for .nops directive. It is currently supported only for
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99 x86 targets.
100
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NC
101Changes in 2.30:
102
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AO
103* Add support for loaction views in DWARF debug line information.
104
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TG
105Changes in 2.29:
106
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L
107* Add support for ELF SHF_GNU_MBIND.
108
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109* Add support for the WebAssembly file format and wasm32 ELF conversion.
110
7e0de605 111* PowerPC gas now checks that the correct register class is used in
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112 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
113 that the registers are invalid.
7e0de605 114
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DD
115* Add support for the Texas Instruments PRU processor.
116
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TP
117* Support for the ARMv8-R architecture and Cortex-R52 processor has been
118 added to the ARM port.
ced40572 119
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TG
120Changes in 2.28:
121
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NC
122* Add support for the RISC-V architecture.
123
b19ea8d2 124* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 125
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TG
126Changes in 2.27:
127
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128* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
129
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130* Add --no-pad-sections to stop the assembler from padding the end of output
131 sections up to their alignment boundary.
132
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TP
133* Support for the ARMv8-M architecture has been added to the ARM port. Support
134 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
135 port.
136
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CZ
137* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
138 .extCoreRegister pseudo-ops that allow an user to define custom
139 instructions, conditional codes, auxiliary and core registers.
140
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L
141* Add a configure option --enable-elf-stt-common to decide whether ELF
142 assembler should generate common symbols with the STT_COMMON type by
143 default. Default to no.
144
a05a5b64 145* New command-line option --elf-stt-common= for ELF targets to control
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146 whether to generate common symbols with the STT_COMMON type.
147
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148* Add ability to set section flags and types via numeric values for ELF
149 based targets.
81c23f82 150
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L
151* Add a configure option --enable-x86-relax-relocations to decide whether
152 x86 assembler should generate relax relocations by default. Default to
153 yes, except for x86 Solaris targets older than Solaris 12.
154
a05a5b64 155* New command-line option -mrelax-relocations= for x86 target to control
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156 whether to generate relax relocations.
157
a05a5b64 158* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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159 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
160
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CZ
161* Add assembly-time relaxation option for ARC cpus.
162
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163* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
164 cpu type to be adjusted at configure time.
165
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166Changes in 2.26:
167
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168* Add a configure option --enable-compressed-debug-sections={all,gas} to
169 decide whether DWARF debug sections should be compressed by default.
e12fe555 170
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171* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
172 assembler support for Argonaut RISC architectures.
173
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NC
174* Symbol and label names can now be enclosed in double quotes (") which allows
175 them to contain characters that are not part of valid symbol names in high
176 level languages.
177
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178* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
179 previous spelling, -march=armv6zk, is still accepted.
180
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181* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
182 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
183 extensions has also been added to the Aarch64 port.
184
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185* Support for the ARMv8.1 architecture has been added to the ARM port. Support
186 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
187 been added to the ARM port.
188
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189* Extend --compress-debug-sections option to support
190 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
191 targets.
192
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193* --compress-debug-sections is turned on for Linux/x86 by default.
194
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195Changes in 2.25:
196
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197* Add support for the AVR Tiny microcontrollers.
198
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199* Replace support for openrisc and or32 with support for or1k.
200
2e6976a8 201* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 202 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 203
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204* Add support for the Andes NDS32.
205
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TG
206Changes in 2.24:
207
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208* Add support for the Texas Instruments MSP430X processor.
209
a05a5b64 210* Add -gdwarf-sections command-line option to enable per-code-section
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211 generation of DWARF .debug_line sections.
212
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213* Add support for Altera Nios II.
214
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NC
215* Add support for the Imagination Technologies Meta processor.
216
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NC
217* Add support for the v850e3v5.
218
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RS
219* Remove assembler support for MIPS ECOFF targets.
220
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TG
221Changes in 2.23:
222
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NC
223* Add support for the 64-bit ARM architecture: AArch64.
224
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NC
225* Add support for S12X processor.
226
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JL
227* Add support for the VLE extension to the PowerPC architecture.
228
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229* Add support for the Freescale XGATE architecture.
230
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RM
231* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
232 directives. These are currently available only for x86 and ARM targets.
233
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DD
234* Add support for the Renesas RL78 architecture.
235
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NC
236* Add support for the Adapteva EPIPHANY architecture.
237
fe13e45b 238* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 239
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240Changes in 2.22:
241
69f56ae1 242* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 243
90b3661c 244Changes in 2.21:
44f45767 245
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246* Gas no longer requires doubling of ampersands in macros.
247
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248* Add support for the TMS320C6000 (TI C6X) processor family.
249
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DK
250* GAS now understands an extended syntax in the .section directive flags
251 for COFF targets that allows the section's alignment to be specified. This
252 feature has also been backported to the 2.20 release series, starting with
253 2.20.1.
254
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255* Add support for the Renesas RX processor.
256
a05a5b64 257* New command-line option, --compress-debug-sections, which requests
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258 compression of DWARF debug information sections in the relocatable output
259 file. Compressed debug sections are supported by readelf, objdump, and
260 gold, but not currently by Gnu ld.
261
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262Changes in 2.20:
263
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264* Added support for v850e2 and v850e2v3.
265
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266* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
267 pseudo op. It marks the symbol as being globally unique in the entire
268 process.
269
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270* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
271 in binary rather than text.
6e33da12 272
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273* Add support for common symbol alignment to PE formats.
274
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275* Add support for the new discriminator column in the DWARF line table,
276 with a discriminator operand for the .loc directive.
277
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278* Add support for Sunplus score architecture.
279
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280* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
281 indicate that if the symbol is the target of a relocation, its value should
282 not be use. Instead the function should be invoked and its result used as
283 the value.
fa94de6b 284
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285* Add support for Lattice Mico32 (lm32) architecture.
286
fa94de6b 287* Add support for Xilinx MicroBlaze architecture.
caa03924 288
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TG
289Changes in 2.19:
290
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291* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
292 tables without runtime relocation.
293
a05a5b64 294* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
295 adds compatibility with H'00 style hex constants.
296
a05a5b64 297* New command-line option, -msse-check=[none|error|warning], for x86
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298 targets.
299
a05a5b64 300* New sub-option added to the assembler's -a command-line switch to
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301 generate a listing output. The 'g' sub-option will insert into the listing
302 various information about the assembly, such as assembler version, the
a05a5b64 303 command-line options used, and a time stamp.
83f10cb2 304
a05a5b64 305* New command-line option -msse2avx for x86 target to encode SSE
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306 instructions with VEX prefix.
307
f1f8f695 308* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 309
a05a5b64 310* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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311 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
312 -mnaked-reg and -mold-gcc, for x86 targets.
313
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314* Support for generating wide character strings has been added via the new
315 pseudo ops: .string16, .string32 and .string64.
316
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317* Support for SSE5 has been added to the i386 port.
318
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319Changes in 2.18:
320
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321* The GAS sources are now released under the GPLv3.
322
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323* Support for the National Semiconductor CR16 target has been added.
324
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AM
325* Added gas .reloc pseudo. This is a low-level interface for creating
326 relocations.
327
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328* Add support for x86_64 PE+ target.
329
1c0d3aa6 330* Add support for Score target.
83518699 331
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332Changes in 2.17:
333
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334* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
335
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NS
336* Support for ms2 architecture has been added.
337
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338* Support for the Z80 processor family has been added.
339
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340* Add support for the "@<file>" syntax to the command line, so that extra
341 switches can be read from <file>.
342
a05a5b64 343* The SH target supports a new command-line switch --enable-reg-prefix which,
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344 if enabled, will allow register names to be optionally prefixed with a $
345 character. This allows register names to be distinguished from label names.
fa94de6b 346
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347* Macros with a variable number of arguments are now supported. See the
348 documentation for how this works.
349
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350* Added --reduce-memory-overheads switch to reduce the size of the hash
351 tables used, at the expense of longer assembly times, and
352 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
353
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354* Macro names and macro parameter names can now be any identifier that would
355 also be legal as a symbol elsewhere. For macro parameter names, this is
356 known to cause problems in certain sources when the respective target uses
357 characters inconsistently, and thus macro parameter references may no longer
358 be recognized as such (see the documentation for details).
fa94de6b 359
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NC
360* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
361 for the VAX target in order to be more compatible with the VAX MACRO
362 assembler.
363
a05a5b64 364* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 365
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NC
366Changes in 2.16:
367
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368* Redefinition of macros now results in an error.
369
a05a5b64 370* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 371
a05a5b64 372* New command-line option -munwind-check=[warning|error] for IA64
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373 targets.
374
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375* The IA64 port now uses automatic dependency violation removal as its default
376 mode.
377
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378* Port to MAXQ processor contributed by HCL Tech.
379
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380* Added support for generating unwind tables for ARM ELF targets.
381
a05a5b64 382* Add a -g command-line option to generate debug information in the target's
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383 preferred debug format.
384
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385* Support for the crx-elf target added.
386
1a320fbb 387* Support for the sh-symbianelf target added.
1fe1f39c 388
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BF
389* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
390 on pe[i]-i386; required for this target's DWARF 2 support.
391
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NC
392* Support for Motorola MCF521x/5249/547x/548x added.
393
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NC
394* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
395 instrucitons.
396
a05a5b64 397* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 398
a05a5b64 399* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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400 added to enter (and leave) alternate macro syntax mode.
401
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NC
402Changes in 2.15:
403
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CD
404* The MIPS -membedded-pic option (Embedded-PIC code generation) is
405 deprecated and will be removed in a future release.
406
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NC
407* Added PIC m32r Linux (ELF) and support to M32R assembler.
408
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MM
409* Added support for ARM V6.
410
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MS
411* Added support for sh4a and variants.
412
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NC
413* Support for Renesas M32R2 added.
414
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415* Limited support for Mapping Symbols as specified in the ARM ELF
416 specification has been added to the arm assembler.
ed769ec1 417
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NC
418* On ARM architectures, added a new gas directive ".unreq" that undoes
419 definitions created by ".req".
420
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NC
421* Support for Motorola ColdFire MCF528x added.
422
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NC
423* Added --gstabs+ switch to enable the generation of STABS debug format
424 information with GNU extensions.
fa94de6b 425
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CD
426* Added support for MIPS64 Release 2.
427
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NC
428* Added support for v850e1.
429
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L
430* Added -n switch for x86 assembler. By default, x86 GAS replaces
431 multiple nop instructions used for alignment within code sections
432 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
433 switch disables the optimization.
434
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435* Removed -n option from MIPS assembler. It was not useful, and confused the
436 existing -non_shared option.
437
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CD
438Changes in 2.14:
439
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CD
440* Added support for MIPS32 Release 2.
441
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NC
442* Added support for Xtensa architecture.
443
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NC
444* Support for Intel's iWMMXt processor (an ARM variant) added.
445
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NC
446* An assembler test generator has been contributed and an example file that
447 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 448
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NC
449* Support for SH2E added.
450
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NC
451* GASP has now been removed.
452
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NC
453* Support for Texas Instruments TMS320C4x and TMS320C3x series of
454 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 455
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NC
456* Support for the Ubicom IP2xxx microcontroller added.
457
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NC
458Changes in 2.13:
459
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NC
460* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
461 and FR500 included.
0ebb9a87 462
a40cbfa3 463* Support for DLX processor added.
52216602 464
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NC
465* GASP has now been deprecated and will be removed in a future release. Use
466 the macro facilities in GAS instead.
3f965e60 467
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NC
468* GASP now correctly parses floating point numbers. Unless the base is
469 explicitly specified, they are interpreted as decimal numbers regardless of
470 the currently specified base.
1ac57253 471
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NC
472Changes in 2.12:
473
a40cbfa3 474* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 475
a40cbfa3 476* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 477
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RM
478* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
479 specifying the target instruction set. The old method of specifying the
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NC
480 target processor has been deprecated, but is still accepted for
481 compatibility.
03b1477f 482
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NC
483* Support for the VFP floating-point instruction set has been added to
484 the ARM assembler.
252b5132 485
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NC
486* New psuedo op: .incbin to include a set of binary data at a given point
487 in the assembly. Contributed by Anders Norlander.
7e005732 488
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NC
489* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
490 but still works for compatability.
ec68c924 491
fa94de6b 492* The MIPS assembler no longer issues a warning by default when it
a05a5b64 493 generates a nop instruction from a macro. The new command-line option
a40cbfa3 494 -n will turn on the warning.
63486801 495
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JW
496Changes in 2.11:
497
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NC
498* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
499
a40cbfa3 500* x86 gas now supports the full Pentium4 instruction set.
a167610d 501
a40cbfa3 502* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 503
a40cbfa3 504* Support for Motorola 68HC11 and 68HC12.
df86943d 505
a40cbfa3 506* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 507
a40cbfa3 508* Support for IA-64.
2dac7317 509
a40cbfa3 510* Support for i860, by Jason Eckhardt.
22b36938 511
a40cbfa3 512* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 513
a40cbfa3 514* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 515
a05a5b64 516* x86 gas -q command-line option quietens warnings about register size changes
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517 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
518 translating various deprecated floating point instructions.
a38cf1db 519
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520Changes in 2.10:
521
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522* Support for the ARM msr instruction was changed to only allow an immediate
523 operand when altering the flags field.
d14442f4 524
a40cbfa3 525* Support for ATMEL AVR.
adde6300 526
a40cbfa3 527* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 528
a40cbfa3 529* Support for numbers with suffixes.
3fd9f047 530
a40cbfa3 531* Added support for breaking to the end of repeat loops.
6a6987a9 532
a40cbfa3 533* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 534
a40cbfa3 535* New .elseif pseudo-op added.
3fd9f047 536
a40cbfa3 537* New --fatal-warnings option.
1f776aa5 538
a40cbfa3 539* picoJava architecture support added.
252b5132 540
a40cbfa3 541* Motorola MCore 210 processor support added.
041dd5a9 542
fa94de6b 543* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 544 assembly programs with intel syntax.
252b5132 545
a40cbfa3 546* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 547
a40cbfa3 548* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 549
a40cbfa3 550* Full 16-bit mode support for i386.
252b5132 551
fa94de6b 552* Greatly improved instruction operand checking for i386. This change will
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553 produce errors or warnings on incorrect assembly code that previous versions
554 of gas accepted. If you get unexpected messages from code that worked with
555 older versions of gas, please double check the code before reporting a bug.
252b5132 556
a40cbfa3 557* Weak symbol support added for COFF targets.
252b5132 558
a40cbfa3 559* Mitsubishi D30V support added.
252b5132 560
a40cbfa3 561* Texas Instruments c80 (tms320c80) support added.
252b5132 562
a40cbfa3 563* i960 ELF support added.
bedf545c 564
a40cbfa3 565* ARM ELF support added.
a057431b 566
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567Changes in 2.9:
568
a40cbfa3 569* Texas Instruments c30 (tms320c30) support added.
252b5132 570
fa94de6b 571* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 572 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 573
a40cbfa3 574* Added --gstabs option to generate stabs debugging information.
252b5132 575
fa94de6b 576* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 577 listing.
252b5132 578
a40cbfa3 579* Added -MD option to print dependencies.
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580
581Changes in 2.8:
582
a40cbfa3 583* BeOS support added.
252b5132 584
a40cbfa3 585* MIPS16 support added.
252b5132 586
a40cbfa3 587* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 588
a40cbfa3 589* Alpha/VMS support added.
252b5132 590
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591* m68k options --base-size-default-16, --base-size-default-32,
592 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 593
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594* The alignment directives now take an optional third argument, which is the
595 maximum number of bytes to skip. If doing the alignment would require
596 skipping more than the given number of bytes, the alignment is not done at
597 all.
252b5132 598
a40cbfa3 599* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 600
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601* The -a option takes a new suboption, c (e.g., -alc), to skip false
602 conditionals in listings.
252b5132 603
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604* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
605 the symbol is already defined.
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606
607Changes in 2.7:
608
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609* The PowerPC assembler now allows the use of symbolic register names (r0,
610 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
611 can be used any time. PowerPC 860 move to/from SPR instructions have been
612 added.
252b5132 613
a40cbfa3 614* Alpha Linux (ELF) support added.
252b5132 615
a40cbfa3 616* PowerPC ELF support added.
252b5132 617
a40cbfa3 618* m68k Linux (ELF) support added.
252b5132 619
a40cbfa3 620* i960 Hx/Jx support added.
252b5132 621
a40cbfa3 622* i386/PowerPC gnu-win32 support added.
252b5132 623
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624* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
625 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 626 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 627 target=i386-unknown-sco3.2v5elf.
252b5132 628
a40cbfa3 629* m88k-motorola-sysv3* support added.
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630
631Changes in 2.6:
632
a40cbfa3 633* Gas now directly supports macros, without requiring GASP.
252b5132 634
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635* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
636 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
637 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 638
a40cbfa3 639* Added --defsym SYM=VALUE option.
252b5132 640
a40cbfa3 641* Added -mips4 support to MIPS assembler.
252b5132 642
a40cbfa3 643* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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644
645Changes in 2.4:
646
a40cbfa3 647* Converted this directory to use an autoconf-generated configure script.
252b5132 648
a40cbfa3 649* ARM support, from Richard Earnshaw.
252b5132 650
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651* Updated VMS support, from Pat Rankin, including considerably improved
652 debugging support.
252b5132 653
a40cbfa3 654* Support for the control registers in the 68060.
252b5132 655
a40cbfa3 656* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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657 provide for possible future gcc changes, for targets where gas provides some
658 features not available in the native assembler. If the native assembler is
a40cbfa3 659 used, it should become obvious pretty quickly what the problem is.
252b5132 660
a40cbfa3 661* Usage message is available with "--help".
252b5132 662
fa94de6b 663* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 664 also, but didn't get into the NEWS file.)
252b5132 665
a40cbfa3 666* Weak symbol support for a.out.
252b5132 667
fa94de6b 668* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 669 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 670
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671* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
672 Paul Kranenburg.
252b5132 673
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674* Improved Alpha support. Immediate constants can have a much larger range
675 now. Support for the 21164 has been contributed by Digital.
252b5132 676
a40cbfa3 677* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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678
679Changes in 2.3:
680
a40cbfa3 681* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 682
a40cbfa3 683* RS/6000 and PowerPC support by Ian Taylor.
252b5132 684
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685* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
686 based on mail received from various people. The `-h#' option should work
687 again too.
252b5132 688
a40cbfa3 689* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 690 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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691 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
692 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
693 in the "dist" directory.
252b5132 694
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695* Vax support in gas fixed for BSD, so it builds and seems to run a couple
696 simple tests okay. I haven't put it through extensive testing. (GNU make is
697 currently required for BSD 4.3 builds.)
252b5132 698
fa94de6b 699* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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700 based on code donated by CMU, which used an a.out-based format. I'm afraid
701 the alpha-a.out support is pretty badly mangled, and much of it removed;
702 making it work will require rewriting it as BFD support for the format anyways.
252b5132 703
a40cbfa3 704* Irix 5 support.
252b5132 705
fa94de6b 706* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 707 couple different versions of expect and dejagnu.
252b5132 708
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709* Symbols' values are now handled internally as expressions, permitting more
710 flexibility in evaluating them in some cases. Some details of relocation
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711 handling have also changed, and simple constant pool management has been
712 added, to make the Alpha port easier.
252b5132 713
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714* New option "--statistics" for printing out program run times. This is
715 intended to be used with the gcc "-Q" option, which prints out times spent in
716 various phases of compilation. (You should be able to get all of them
717 printed out with "gcc -Q -Wa,--statistics", I think.)
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718
719Changes in 2.2:
720
a40cbfa3 721* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 722
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723* Configurations that are still in development (and therefore are convenient to
724 have listed in configure.in) still get rejected without a minor change to
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725 gas/Makefile.in, so people not doing development work shouldn't get the
726 impression that support for such configurations is actually believed to be
727 reliable.
252b5132 728
fa94de6b 729* The program name (usually "as") is printed when a fatal error message is
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730 displayed. This should prevent some confusion about the source of occasional
731 messages about "internal errors".
252b5132 732
fa94de6b 733* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 734 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 735
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736* Symbol values are maintained as expressions instead of being immediately
737 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
738 more complex calculations involving symbols whose values are not alreadey
739 known.
252b5132 740
a40cbfa3 741* DBX-style debugging info ("stabs") is now supported for COFF formats.
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742 If any stabs directives are seen in the source, GAS will create two new
743 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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744 section is nearly identical to the a.out symbol format, and .stabstr is
745 its string table. For this to be useful, you must have configured GCC
746 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
747 that can use the stab sections (4.11 or later).
252b5132 748
fa94de6b 749* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 750 support is in progress.
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751
752Changes in 2.1:
753
fa94de6b 754* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 755 incorporated, but not well tested yet.
252b5132 756
fa94de6b 757* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 758 with gcc now.
252b5132 759
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760* Some minor adjustments to add (Convergent Technologies') Miniframe support,
761 suggested by Ronald Cole.
252b5132 762
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763* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
764 includes improved ELF support, which I've started adapting for SPARC Solaris
765 2.x. Integration isn't completely, so it probably won't work.
252b5132 766
a40cbfa3 767* HP9000/300 support, donated by HP, has been merged in.
252b5132 768
a40cbfa3 769* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 770
a40cbfa3 771* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 772
a40cbfa3 773* Test suite framework is starting to become reasonable.
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774
775Changes in 2.0:
776
a40cbfa3 777* Mostly bug fixes.
252b5132 778
a40cbfa3 779* Some more merging of BFD and ELF code, but ELF still doesn't work.
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780
781Changes in 1.94:
782
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783* BFD merge is partly done. Adventurous souls may try giving configure the
784 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
785 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
786 or "solaris". (ELF isn't really supported yet. It needs work. I've got
787 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
788 fully merged yet.)
252b5132 789
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790* The 68K opcode table has been split in half. It should now compile under gcc
791 without consuming ridiculous amounts of memory.
252b5132 792
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793* A couple data structures have been reduced in size. This should result in
794 saving a little bit of space at runtime.
252b5132 795
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796* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
797 code provided ROSE format support, which I haven't merged in yet. (I can
798 make it available, if anyone wants to try it out.) Ralph's code, for BSD
799 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
800 coming.
252b5132 801
a40cbfa3 802* Support for the Hitachi H8/500 has been added.
252b5132 803
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804* VMS host and target support should be working now, thanks chiefly to Eric
805 Youngdale.
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806
807Changes in 1.93.01:
808
a40cbfa3 809* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 810
a40cbfa3 811* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 812
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813* For m68k, "%" is now accepted before register names. For COFF format, which
814 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
815 can be distinguished from the register.
252b5132 816
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817* Last public release was 1.38. Lots of configuration changes since then, lots
818 of new CPUs and formats, lots of bugs fixed.
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819
820\f
b3adc24a 821Copyright (C) 2012-2020 Free Software Foundation, Inc.
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822
823Copying and distribution of this file, with or without modification,
824are permitted in any medium without royalty provided the copyright
825notice and this notice are preserved.
826
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827Local variables:
828fill-column: 79
829End:
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