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252b5132 | 1 | /* GAS interface for targets using CGEN: Cpu tools GENerator. |
f7e42eb4 NC |
2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free Software | |
542d6675 | 19 | Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
252b5132 RH |
20 | |
21 | #include <setjmp.h> | |
22 | #include "ansidecl.h" | |
23 | #include "libiberty.h" | |
24 | #include "bfd.h" | |
25 | #include "symcat.h" | |
26 | #include "cgen-desc.h" | |
27 | #include "as.h" | |
28 | #include "subsegs.h" | |
29 | #include "cgen.h" | |
272d76e0 | 30 | #include "dwarf2dbg.h" |
252b5132 RH |
31 | |
32 | /* Opcode table descriptor, must be set by md_begin. */ | |
33 | ||
34 | CGEN_CPU_DESC gas_cgen_cpu_desc; | |
35 | ||
36 | /* Callback to insert a register into the symbol table. | |
37 | A target may choose to let GAS parse the registers. | |
38 | ??? Not currently used. */ | |
39 | ||
40 | void | |
41 | cgen_asm_record_register (name, number) | |
542d6675 | 42 | char *name; |
252b5132 RH |
43 | int number; |
44 | { | |
45 | /* Use symbol_create here instead of symbol_new so we don't try to | |
46 | output registers into the object file's symbol table. */ | |
47 | symbol_table_insert (symbol_create (name, reg_section, | |
542d6675 | 48 | number, &zero_address_frag)); |
252b5132 RH |
49 | } |
50 | ||
51 | /* We need to keep a list of fixups. We can't simply generate them as | |
52 | we go, because that would require us to first create the frag, and | |
53 | that would screw up references to ``.''. | |
54 | ||
55 | This is used by cpu's with simple operands. It keeps knowledge of what | |
56 | an `expressionS' is and what a `fixup' is out of CGEN which for the time | |
57 | being is preferable. | |
58 | ||
59 | OPINDEX is the index in the operand table. | |
60 | OPINFO is something the caller chooses to help in reloc determination. */ | |
61 | ||
30a2b4ef | 62 | struct fixup { |
252b5132 RH |
63 | int opindex; |
64 | int opinfo; | |
65 | expressionS exp; | |
66 | }; | |
67 | ||
542d6675 | 68 | static struct fixup fixups[GAS_CGEN_MAX_FIXUPS]; |
252b5132 RH |
69 | static int num_fixups; |
70 | ||
71 | /* Prepare to parse an instruction. | |
72 | ??? May wish to make this static and delete calls in md_assemble. */ | |
73 | ||
74 | void | |
75 | gas_cgen_init_parse () | |
76 | { | |
77 | num_fixups = 0; | |
78 | } | |
79 | ||
80 | /* Queue a fixup. */ | |
81 | ||
82 | static void | |
83 | queue_fixup (opindex, opinfo, expP) | |
84 | int opindex; | |
eabed1c0 | 85 | int opinfo; |
252b5132 RH |
86 | expressionS * expP; |
87 | { | |
88 | /* We need to generate a fixup for this expression. */ | |
89 | if (num_fixups >= GAS_CGEN_MAX_FIXUPS) | |
90 | as_fatal (_("too many fixups")); | |
30a2b4ef | 91 | fixups[num_fixups].exp = *expP; |
252b5132 RH |
92 | fixups[num_fixups].opindex = opindex; |
93 | fixups[num_fixups].opinfo = opinfo; | |
94 | ++ num_fixups; | |
95 | } | |
96 | ||
97 | /* The following three functions allow a backup of the fixup chain to be made, | |
98 | and to have this backup be swapped with the current chain. This allows | |
99 | certain ports, eg the m32r, to swap two instructions and swap their fixups | |
100 | at the same time. */ | |
101 | /* ??? I think with cgen_asm_finish_insn (or something else) there is no | |
102 | more need for this. */ | |
103 | ||
542d6675 | 104 | static struct fixup saved_fixups[GAS_CGEN_MAX_FIXUPS]; |
252b5132 RH |
105 | static int saved_num_fixups; |
106 | ||
107 | void | |
108 | gas_cgen_save_fixups () | |
109 | { | |
110 | saved_num_fixups = num_fixups; | |
542d6675 | 111 | |
252b5132 RH |
112 | memcpy (saved_fixups, fixups, sizeof (fixups[0]) * num_fixups); |
113 | ||
114 | num_fixups = 0; | |
115 | } | |
116 | ||
117 | void | |
118 | gas_cgen_restore_fixups () | |
119 | { | |
120 | num_fixups = saved_num_fixups; | |
542d6675 | 121 | |
252b5132 RH |
122 | memcpy (fixups, saved_fixups, sizeof (fixups[0]) * num_fixups); |
123 | ||
124 | saved_num_fixups = 0; | |
125 | } | |
126 | ||
127 | void | |
128 | gas_cgen_swap_fixups () | |
129 | { | |
130 | int tmp; | |
131 | struct fixup tmp_fixup; | |
132 | ||
133 | if (num_fixups == 0) | |
134 | { | |
135 | gas_cgen_restore_fixups (); | |
136 | } | |
137 | else if (saved_num_fixups == 0) | |
138 | { | |
139 | gas_cgen_save_fixups (); | |
140 | } | |
141 | else | |
142 | { | |
143 | tmp = saved_num_fixups; | |
144 | saved_num_fixups = num_fixups; | |
145 | num_fixups = tmp; | |
542d6675 | 146 | |
252b5132 RH |
147 | for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;) |
148 | { | |
149 | tmp_fixup = saved_fixups [tmp]; | |
150 | saved_fixups [tmp] = fixups [tmp]; | |
151 | fixups [tmp] = tmp_fixup; | |
152 | } | |
153 | } | |
154 | } | |
155 | ||
156 | /* Default routine to record a fixup. | |
157 | This is a cover function to fix_new. | |
158 | It exists because we record INSN with the fixup. | |
159 | ||
160 | FRAG and WHERE are their respective arguments to fix_new_exp. | |
161 | LENGTH is in bits. | |
162 | OPINFO is something the caller chooses to help in reloc determination. | |
163 | ||
164 | At this point we do not use a bfd_reloc_code_real_type for | |
165 | operands residing in the insn, but instead just use the | |
166 | operand index. This lets us easily handle fixups for any | |
167 | operand type. We pick a BFD reloc type in md_apply_fix. */ | |
168 | ||
169 | fixS * | |
170 | gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset) | |
171 | fragS * frag; | |
172 | int where; | |
173 | const CGEN_INSN * insn; | |
174 | int length; | |
175 | const CGEN_OPERAND * operand; | |
176 | int opinfo; | |
177 | symbolS * symbol; | |
178 | offsetT offset; | |
179 | { | |
542d6675 | 180 | fixS *fixP; |
252b5132 RH |
181 | |
182 | /* It may seem strange to use operand->attrs and not insn->attrs here, | |
183 | but it is the operand that has a pc relative relocation. */ | |
184 | ||
185 | fixP = fix_new (frag, where, length / 8, symbol, offset, | |
186 | CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR), | |
187 | (bfd_reloc_code_real_type) | |
188 | ((int) BFD_RELOC_UNUSED | |
189 | + (int) operand->type)); | |
190 | fixP->fx_cgen.insn = insn; | |
191 | fixP->fx_cgen.opinfo = opinfo; | |
192 | ||
193 | return fixP; | |
194 | } | |
195 | ||
196 | /* Default routine to record a fixup given an expression. | |
197 | This is a cover function to fix_new_exp. | |
198 | It exists because we record INSN with the fixup. | |
199 | ||
200 | FRAG and WHERE are their respective arguments to fix_new_exp. | |
201 | LENGTH is in bits. | |
202 | OPINFO is something the caller chooses to help in reloc determination. | |
203 | ||
204 | At this point we do not use a bfd_reloc_code_real_type for | |
205 | operands residing in the insn, but instead just use the | |
206 | operand index. This lets us easily handle fixups for any | |
207 | operand type. We pick a BFD reloc type in md_apply_fix. */ | |
208 | ||
209 | fixS * | |
210 | gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) | |
211 | fragS * frag; | |
212 | int where; | |
213 | const CGEN_INSN * insn; | |
214 | int length; | |
215 | const CGEN_OPERAND * operand; | |
216 | int opinfo; | |
217 | expressionS * exp; | |
218 | { | |
542d6675 | 219 | fixS *fixP; |
252b5132 RH |
220 | |
221 | /* It may seem strange to use operand->attrs and not insn->attrs here, | |
222 | but it is the operand that has a pc relative relocation. */ | |
223 | ||
224 | fixP = fix_new_exp (frag, where, length / 8, exp, | |
225 | CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR), | |
226 | (bfd_reloc_code_real_type) | |
227 | ((int) BFD_RELOC_UNUSED | |
228 | + (int) operand->type)); | |
229 | fixP->fx_cgen.insn = insn; | |
230 | fixP->fx_cgen.opinfo = opinfo; | |
231 | ||
232 | return fixP; | |
233 | } | |
234 | ||
235 | /* Used for communication between the next two procedures. */ | |
236 | static jmp_buf expr_jmp_buf; | |
680d2857 | 237 | static int expr_jmp_buf_p; |
252b5132 RH |
238 | |
239 | /* Callback for cgen interface. Parse the expression at *STRP. | |
240 | The result is an error message or NULL for success (in which case | |
241 | *STRP is advanced past the parsed text). | |
242 | WANT is an indication of what the caller is looking for. | |
243 | If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match | |
244 | a table entry with the insn, reset the queued fixups counter. | |
245 | An enum cgen_parse_operand_result is stored in RESULTP. | |
246 | OPINDEX is the operand's table entry index. | |
247 | OPINFO is something the caller chooses to help in reloc determination. | |
248 | The resulting value is stored in VALUEP. */ | |
249 | ||
250 | const char * | |
251 | gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP) | |
eabed1c0 | 252 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
252b5132 | 253 | enum cgen_parse_operand_type want; |
542d6675 | 254 | const char **strP; |
252b5132 RH |
255 | int opindex; |
256 | int opinfo; | |
542d6675 KH |
257 | enum cgen_parse_operand_result *resultP; |
258 | bfd_vma *valueP; | |
252b5132 RH |
259 | { |
260 | #ifdef __STDC__ | |
261 | /* These are volatile to survive the setjmp. */ | |
262 | char * volatile hold; | |
263 | enum cgen_parse_operand_result * volatile resultP_1; | |
264 | #else | |
542d6675 KH |
265 | static char *hold; |
266 | static enum cgen_parse_operand_result *resultP_1; | |
252b5132 | 267 | #endif |
542d6675 | 268 | const char *errmsg = NULL; |
252b5132 RH |
269 | expressionS exp; |
270 | ||
271 | if (want == CGEN_PARSE_OPERAND_INIT) | |
272 | { | |
273 | gas_cgen_init_parse (); | |
274 | return NULL; | |
275 | } | |
276 | ||
277 | resultP_1 = resultP; | |
278 | hold = input_line_pointer; | |
542d6675 | 279 | input_line_pointer = (char *) *strP; |
252b5132 RH |
280 | |
281 | /* We rely on md_operand to longjmp back to us. | |
282 | This is done via gas_cgen_md_operand. */ | |
283 | if (setjmp (expr_jmp_buf) != 0) | |
284 | { | |
680d2857 | 285 | expr_jmp_buf_p = 0; |
252b5132 | 286 | input_line_pointer = (char *) hold; |
542d6675 | 287 | *resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR; |
252b5132 RH |
288 | return "illegal operand"; |
289 | } | |
290 | ||
680d2857 | 291 | expr_jmp_buf_p = 1; |
542d6675 | 292 | expression (&exp); |
680d2857 | 293 | expr_jmp_buf_p = 0; |
252b5132 | 294 | |
542d6675 | 295 | *strP = input_line_pointer; |
252b5132 RH |
296 | input_line_pointer = hold; |
297 | ||
298 | /* FIXME: Need to check `want'. */ | |
299 | ||
300 | switch (exp.X_op) | |
301 | { | |
542d6675 | 302 | case O_illegal: |
252b5132 | 303 | errmsg = _("illegal operand"); |
542d6675 | 304 | *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; |
252b5132 | 305 | break; |
542d6675 | 306 | case O_absent: |
252b5132 | 307 | errmsg = _("missing operand"); |
542d6675 | 308 | *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; |
252b5132 | 309 | break; |
542d6675 KH |
310 | case O_constant: |
311 | *valueP = exp.X_add_number; | |
312 | *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; | |
252b5132 | 313 | break; |
542d6675 KH |
314 | case O_register: |
315 | *valueP = exp.X_add_number; | |
316 | *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; | |
252b5132 | 317 | break; |
542d6675 | 318 | default: |
30a2b4ef | 319 | queue_fixup (opindex, opinfo, &exp); |
542d6675 KH |
320 | *valueP = 0; |
321 | *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; | |
252b5132 RH |
322 | break; |
323 | } | |
324 | ||
325 | return errmsg; | |
326 | } | |
327 | ||
328 | /* md_operand handler to catch unrecognized expressions and halt the | |
329 | parsing process so the next entry can be tried. | |
330 | ||
331 | ??? This could be done differently by adding code to `expression'. */ | |
332 | ||
333 | void | |
334 | gas_cgen_md_operand (expressionP) | |
542d6675 | 335 | expressionS *expressionP ATTRIBUTE_UNUSED; |
252b5132 | 336 | { |
680d2857 FCE |
337 | /* Don't longjmp if we're not called from within cgen_parse_operand(). */ |
338 | if (expr_jmp_buf_p) | |
339 | longjmp (expr_jmp_buf, 1); | |
252b5132 RH |
340 | } |
341 | ||
342 | /* Finish assembling instruction INSN. | |
343 | BUF contains what we've built up so far. | |
344 | LENGTH is the size of the insn in bits. | |
345 | RELAX_P is non-zero if relaxable insns should be emitted as such. | |
346 | Otherwise they're emitted in non-relaxable forms. | |
347 | The "result" is stored in RESULT if non-NULL. */ | |
348 | ||
349 | void | |
350 | gas_cgen_finish_insn (insn, buf, length, relax_p, result) | |
542d6675 | 351 | const CGEN_INSN *insn; |
252b5132 RH |
352 | CGEN_INSN_BYTES_PTR buf; |
353 | unsigned int length; | |
354 | int relax_p; | |
542d6675 | 355 | finished_insnS *result; |
252b5132 RH |
356 | { |
357 | int i; | |
358 | int relax_operand; | |
542d6675 | 359 | char *f; |
252b5132 RH |
360 | unsigned int byte_len = length / 8; |
361 | ||
362 | /* ??? Target foo issues various warnings here, so one might want to provide | |
363 | a hook here. However, our caller is defined in tc-foo.c so there | |
364 | shouldn't be a need for a hook. */ | |
365 | ||
366 | /* Write out the instruction. | |
367 | It is important to fetch enough space in one call to `frag_more'. | |
368 | We use (f - frag_now->fr_literal) to compute where we are and we | |
369 | don't want frag_now to change between calls. | |
370 | ||
371 | Relaxable instructions: We need to ensure we allocate enough | |
372 | space for the largest insn. */ | |
373 | ||
374 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) | |
542d6675 KH |
375 | /* These currently shouldn't get here. */ |
376 | abort (); | |
252b5132 RH |
377 | |
378 | /* Is there a relaxable insn with the relaxable operand needing a fixup? */ | |
379 | ||
380 | relax_operand = -1; | |
381 | if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE)) | |
382 | { | |
383 | /* Scan the fixups for the operand affected by relaxing | |
384 | (i.e. the branch address). */ | |
385 | ||
542d6675 | 386 | for (i = 0; i < num_fixups; ++i) |
252b5132 RH |
387 | { |
388 | if (CGEN_OPERAND_ATTR_VALUE (cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex), | |
389 | CGEN_OPERAND_RELAX)) | |
390 | { | |
391 | relax_operand = i; | |
392 | break; | |
393 | } | |
394 | } | |
395 | } | |
396 | ||
397 | if (relax_operand != -1) | |
398 | { | |
399 | int max_len; | |
542d6675 | 400 | fragS *old_frag; |
252b5132 RH |
401 | |
402 | #ifdef TC_CGEN_MAX_RELAX | |
403 | max_len = TC_CGEN_MAX_RELAX (insn, byte_len); | |
404 | #else | |
405 | max_len = CGEN_MAX_INSN_SIZE; | |
406 | #endif | |
407 | /* Ensure variable part and fixed part are in same fragment. */ | |
408 | /* FIXME: Having to do this seems like a hack. */ | |
409 | frag_grow (max_len); | |
410 | ||
411 | /* Allocate space for the fixed part. */ | |
412 | f = frag_more (byte_len); | |
413 | ||
414 | /* Create a relaxable fragment for this instruction. */ | |
415 | old_frag = frag_now; | |
416 | ||
417 | frag_var (rs_machine_dependent, | |
418 | max_len - byte_len /* max chars */, | |
419 | 0 /* variable part already allocated */, | |
420 | /* FIXME: When we machine generate the relax table, | |
421 | machine generate a macro to compute subtype. */ | |
422 | 1 /* subtype */, | |
423 | fixups[relax_operand].exp.X_add_symbol, | |
424 | fixups[relax_operand].exp.X_add_number, | |
425 | f); | |
426 | ||
427 | /* Record the operand number with the fragment so md_convert_frag | |
428 | can use gas_cgen_md_record_fixup to record the appropriate reloc. */ | |
429 | old_frag->fr_cgen.insn = insn; | |
430 | old_frag->fr_cgen.opindex = fixups[relax_operand].opindex; | |
431 | old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo; | |
432 | if (result) | |
433 | result->frag = old_frag; | |
434 | } | |
435 | else | |
436 | { | |
437 | f = frag_more (byte_len); | |
438 | if (result) | |
439 | result->frag = frag_now; | |
440 | } | |
441 | ||
442 | /* If we're recording insns as numbers (rather than a string of bytes), | |
443 | target byte order handling is deferred until now. */ | |
444 | #if CGEN_INT_INSN_P | |
445 | cgen_put_insn_value (gas_cgen_cpu_desc, f, length, *buf); | |
446 | #else | |
447 | memcpy (f, buf, byte_len); | |
448 | #endif | |
449 | ||
272d76e0 FCE |
450 | /* Emit DWARF2 debugging information. */ |
451 | dwarf2_emit_insn (byte_len); | |
452 | ||
252b5132 RH |
453 | /* Create any fixups. */ |
454 | for (i = 0; i < num_fixups; ++i) | |
455 | { | |
456 | fixS *fixP; | |
457 | const CGEN_OPERAND *operand = | |
458 | cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex); | |
459 | ||
460 | /* Don't create fixups for these. That's done during relaxation. | |
461 | We don't need to test for CGEN_INSN_RELAX as they can't get here | |
462 | (see above). */ | |
463 | if (relax_p | |
464 | && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE) | |
465 | && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_RELAX)) | |
466 | continue; | |
467 | ||
468 | #ifndef md_cgen_record_fixup_exp | |
469 | #define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp | |
470 | #endif | |
471 | ||
542d6675 KH |
472 | fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal, |
473 | insn, length, operand, | |
474 | fixups[i].opinfo, | |
475 | &fixups[i].exp); | |
476 | if (result) | |
477 | result->fixups[i] = fixP; | |
252b5132 RH |
478 | } |
479 | ||
480 | if (result) | |
481 | { | |
482 | result->num_fixups = num_fixups; | |
483 | result->addr = f; | |
484 | } | |
485 | } | |
486 | ||
487 | /* Apply a fixup to the object code. This is called for all the | |
488 | fixups we generated by the call to fix_new_exp, above. In the call | |
489 | above we used a reloc code which was the largest legal reloc code | |
490 | plus the operand index. Here we undo that to recover the operand | |
491 | index. At this point all symbol values should be fully resolved, | |
492 | and we attempt to completely resolve the reloc. If we can not do | |
493 | that, we determine the correct reloc code and put it back in the fixup. */ | |
494 | ||
495 | /* FIXME: This function handles some of the fixups and bfd_install_relocation | |
496 | handles the rest. bfd_install_relocation (or some other bfd function) | |
497 | should handle them all. */ | |
498 | ||
499 | int | |
500 | gas_cgen_md_apply_fix3 (fixP, valueP, seg) | |
501 | fixS * fixP; | |
502 | valueT * valueP; | |
eabed1c0 | 503 | segT seg ATTRIBUTE_UNUSED; |
252b5132 | 504 | { |
542d6675 | 505 | char *where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 | 506 | valueT value; |
542d6675 | 507 | /* Canonical name, since used a lot. */ |
252b5132 | 508 | CGEN_CPU_DESC cd = gas_cgen_cpu_desc; |
542d6675 | 509 | |
252b5132 RH |
510 | /* FIXME FIXME FIXME: The value we are passed in *valuep includes |
511 | the symbol values. Since we are using BFD_ASSEMBLER, if we are | |
512 | doing this relocation the code in write.c is going to call | |
513 | bfd_install_relocation, which is also going to use the symbol | |
514 | value. That means that if the reloc is fully resolved we want to | |
515 | use *valuep since bfd_install_relocation is not being used. | |
516 | However, if the reloc is not fully resolved we do not want to use | |
517 | *valuep, and must use fx_offset instead. However, if the reloc | |
518 | is PC relative, we do want to use *valuep since it includes the | |
519 | result of md_pcrel_from. This is confusing. */ | |
520 | ||
521 | if (fixP->fx_addsy == (symbolS *) NULL) | |
522 | { | |
542d6675 | 523 | value = *valueP; |
252b5132 RH |
524 | fixP->fx_done = 1; |
525 | } | |
526 | else if (fixP->fx_pcrel) | |
542d6675 | 527 | value = *valueP; |
252b5132 RH |
528 | else |
529 | { | |
530 | value = fixP->fx_offset; | |
531 | if (fixP->fx_subsy != (symbolS *) NULL) | |
532 | { | |
533 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) | |
534 | value -= S_GET_VALUE (fixP->fx_subsy); | |
535 | else | |
536 | { | |
537 | /* We don't actually support subtracting a symbol. */ | |
542d6675 | 538 | as_bad_where (fixP->fx_file, fixP->fx_line, |
252b5132 RH |
539 | _("expression too complex")); |
540 | } | |
541 | } | |
542 | } | |
543 | ||
544 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) | |
545 | { | |
546 | int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; | |
547 | const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex); | |
548 | const char *errmsg; | |
549 | bfd_reloc_code_real_type reloc_type; | |
550 | CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd)); | |
551 | const CGEN_INSN *insn = fixP->fx_cgen.insn; | |
552 | ||
553 | /* If the reloc has been fully resolved finish the operand here. */ | |
554 | /* FIXME: This duplicates the capabilities of code in BFD. */ | |
555 | if (fixP->fx_done | |
556 | /* FIXME: If partial_inplace isn't set bfd_install_relocation won't | |
557 | finish the job. Testing for pcrel is a temporary hack. */ | |
558 | || fixP->fx_pcrel) | |
559 | { | |
560 | CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn)); | |
561 | CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value); | |
562 | ||
563 | #if CGEN_INT_INSN_P | |
564 | { | |
565 | CGEN_INSN_INT insn_value = | |
566 | cgen_get_insn_value (cd, where, CGEN_INSN_BITSIZE (insn)); | |
567 | ||
542d6675 | 568 | /* ??? 0 is passed for `pc'. */ |
252b5132 RH |
569 | errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, |
570 | &insn_value, (bfd_vma) 0); | |
571 | cgen_put_insn_value (cd, where, CGEN_INSN_BITSIZE (insn), | |
572 | insn_value); | |
573 | } | |
574 | #else | |
542d6675 KH |
575 | /* ??? 0 is passed for `pc'. */ |
576 | errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, where, | |
577 | (bfd_vma) 0); | |
252b5132 RH |
578 | #endif |
579 | if (errmsg) | |
580 | as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg); | |
581 | } | |
582 | ||
583 | if (fixP->fx_done) | |
584 | return 1; | |
585 | ||
586 | /* The operand isn't fully resolved. Determine a BFD reloc value | |
587 | based on the operand information and leave it to | |
588 | bfd_install_relocation. Note that this doesn't work when | |
589 | partial_inplace == false. */ | |
590 | ||
591 | reloc_type = md_cgen_lookup_reloc (insn, operand, fixP); | |
592 | if (reloc_type != BFD_RELOC_NONE) | |
593 | { | |
594 | fixP->fx_r_type = reloc_type; | |
595 | } | |
596 | else | |
597 | { | |
598 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
599 | _("unresolved expression that must be resolved")); | |
600 | fixP->fx_done = 1; | |
601 | return 1; | |
602 | } | |
603 | } | |
604 | else if (fixP->fx_done) | |
605 | { | |
606 | /* We're finished with this fixup. Install it because | |
607 | bfd_install_relocation won't be called to do it. */ | |
608 | switch (fixP->fx_r_type) | |
609 | { | |
610 | case BFD_RELOC_8: | |
611 | md_number_to_chars (where, value, 1); | |
612 | break; | |
613 | case BFD_RELOC_16: | |
614 | md_number_to_chars (where, value, 2); | |
615 | break; | |
616 | case BFD_RELOC_32: | |
617 | md_number_to_chars (where, value, 4); | |
618 | break; | |
363c574f MG |
619 | case BFD_RELOC_64: |
620 | md_number_to_chars (where, value, 8); | |
621 | break; | |
252b5132 RH |
622 | default: |
623 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
624 | _("internal error: can't install fix for reloc type %d (`%s')"), | |
625 | fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); | |
626 | break; | |
627 | } | |
628 | } | |
629 | else | |
630 | { | |
631 | /* bfd_install_relocation will be called to finish things up. */ | |
632 | } | |
633 | ||
634 | /* Tuck `value' away for use by tc_gen_reloc. | |
635 | See the comment describing fx_addnumber in write.h. | |
636 | This field is misnamed (or misused :-). */ | |
637 | fixP->fx_addnumber = value; | |
638 | ||
639 | return 1; | |
640 | } | |
641 | ||
642 | /* Translate internal representation of relocation info to BFD target format. | |
643 | ||
644 | FIXME: To what extent can we get all relevant targets to use this? */ | |
645 | ||
646 | arelent * | |
647 | gas_cgen_tc_gen_reloc (section, fixP) | |
eabed1c0 | 648 | asection * section ATTRIBUTE_UNUSED; |
252b5132 RH |
649 | fixS * fixP; |
650 | { | |
542d6675 | 651 | arelent *reloc; |
252b5132 RH |
652 | |
653 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
654 | ||
655 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
656 | if (reloc->howto == (reloc_howto_type *) NULL) | |
657 | { | |
658 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
659 | _("internal error: can't export reloc type %d (`%s')"), | |
660 | fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); | |
661 | return NULL; | |
662 | } | |
663 | ||
664 | assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); | |
665 | ||
080e41e6 ILT |
666 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
667 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); | |
252b5132 | 668 | |
542d6675 KH |
669 | /* Use fx_offset for these cases. */ |
670 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY | |
252b5132 | 671 | || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) |
542d6675 | 672 | reloc->addend = fixP->fx_offset; |
252b5132 | 673 | else |
542d6675 | 674 | reloc->addend = fixP->fx_addnumber; |
252b5132 RH |
675 | |
676 | reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; | |
677 | return reloc; | |
678 | } |