* config/m68k-parse.y: New file: bison grammar for m68k operands,
[deliverable/binutils-gdb.git] / gas / config / m68k-parse.h
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1/* m68k-parse.h -- header file for m68k assembler
2 Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
20
21#ifndef M68K_PARSE_H
22#define M68K_PARSE_H
23
24/* This header file defines things which are shared between the
25 operand parser in m68k.y and the m68k assembler proper in
26 tc-m68k.c. */
27
28/* The various m68k registers. */
29
30/* DATA and ADDR have to be contiguous, so that reg-DATA gives
31 0-7==data reg, 8-15==addr reg for operands that take both types.
32
33 We don't use forms like "ADDR0 = ADDR" here because this file is
34 likely to be used on an Apollo, and the broken Apollo compiler
35 gives an `undefined variable' error if we do that, according to
36 troy@cbme.unsw.edu.au. */
37
38#define DATA DATA0
39#define ADDR ADDR0
40#define SP ADDR7
41#define COPNUM COP0
42#define BAD BAD0
43#define BAC BAC0
44
45enum m68k_register
46{
47 DATA0 = 1, /* 1- 8 == data registers 0-7 */
48 DATA1,
49 DATA2,
50 DATA3,
51 DATA4,
52 DATA5,
53 DATA6,
54 DATA7,
55
56 ADDR0,
57 ADDR1,
58 ADDR2,
59 ADDR3,
60 ADDR4,
61 ADDR5,
62 ADDR6,
63 ADDR7,
64
65 FP0, /* Eight FP registers */
66 FP1,
67 FP2,
68 FP3,
69 FP4,
70 FP5,
71 FP6,
72 FP7,
73
74 /* Note that COP0==processor #1 -- COP0+7==#8, which stores as 000 */
75 /* I think. . . */
76
77 COP0, /* Co-processor #1-#8 */
78 COP1,
79 COP2,
80 COP3,
81 COP4,
82 COP5,
83 COP6,
84 COP7,
85
86 PC, /* Program counter */
87 ZPC, /* Hack for Program space, but 0 addressing */
88 SR, /* Status Reg */
89 CCR, /* Condition code Reg */
90
91 /* These have to be grouped together for the movec instruction to work. */
92 USP, /* User Stack Pointer */
93 ISP, /* Interrupt stack pointer */
94 SFC,
95 DFC,
96 CACR,
97 VBR,
98 CAAR,
99 MSP,
100 ITT0,
101 ITT1,
102 DTT0,
103 DTT1,
104 MMUSR,
105 TC,
106 SRP,
107 URP,
108 BUSCR, /* 68060 added these */
109 PCR,
110#define last_movec_reg PCR
111 /* end of movec ordering constraints */
112
113 FPI,
114 FPS,
115 FPC,
116
117 DRP, /* 68851 or 68030 MMU regs */
118 CRP,
119 CAL,
120 VAL,
121 SCC,
122 AC,
123 BAD0,
124 BAD1,
125 BAD2,
126 BAD3,
127 BAD4,
128 BAD5,
129 BAD6,
130 BAD7,
131 BAC0,
132 BAC1,
133 BAC2,
134 BAC3,
135 BAC4,
136 BAC5,
137 BAC6,
138 BAC7,
139 PSR, /* aka MMUSR on 68030 (but not MMUSR on 68040)
140 and ACUSR on 68ec030 */
141 PCSR,
142
143 IC, /* instruction cache token */
144 DC, /* data cache token */
145 NC, /* no cache token */
146 BC, /* both caches token */
147
148 TT0, /* 68030 access control unit regs */
149 TT1,
150
151 ZDATA0, /* suppressed data registers. */
152 ZDATA1,
153 ZDATA2,
154 ZDATA3,
155 ZDATA4,
156 ZDATA5,
157 ZDATA6,
158 ZDATA7,
159
160 ZADDR0, /* suppressed address registers. */
161 ZADDR1,
162 ZADDR2,
163 ZADDR3,
164 ZADDR4,
165 ZADDR5,
166 ZADDR6,
167 ZADDR7,
168};
169
170/* Size information. */
171
172enum m68k_size
173{
174 /* Unspecified. */
175 SIZE_UNSPEC,
176
177 /* Byte. */
178 SIZE_BYTE,
179
180 /* Word (2 bytes). */
181 SIZE_WORD,
182
183 /* Longword (4 bytes). */
184 SIZE_LONG
185};
186
187/* The structure used to hold information about an index register. */
188
189struct m68k_indexreg
190{
191 /* The index register itself. */
192 enum m68k_register reg;
193
194 /* The size to use. */
195 enum m68k_size size;
196
197 /* The value to scale by. */
198 int scale;
199};
200
201/* The structure used to hold information about an expression. */
202
203struct m68k_exp
204{
205 /* The size to use. */
206 enum m68k_size size;
207
208 /* The expression itself. */
209 expressionS exp;
210};
211
212/* See whether an expression is a signed eight bit value. */
213
214#define expr8(ex) \
215 ((ex)->exp.X_op == O_constant \
216 && (ex)->exp.X_add_number >= -0x80 \
217 && (ex)->exp.X_add_number < 0x80)
218
219/* See whether an expression is a signed sixteen bit value. */
220
221#define expr16(ex) \
222 ((ex)->exp.X_op == O_constant \
223 && (ex)->exp.X_add_number >= -0x8000 \
224 && (ex)->exp.X_add_number < 0x8000)
225
226/* The operand modes. */
227
228enum m68k_operand_type
229{
230 IMMED = 1,
231 ABSL,
232 DREG,
233 AREG,
234 FPREG,
235 CONTROL,
236 AINDR,
237 AINC,
238 ADEC,
239 DISP,
240 BASE,
241 POST,
242 PRE,
243 REGLST
244};
245
246/* The structure used to hold a parsed operand. */
247
248struct m68k_op
249{
250 /* The type of operand. */
251 enum m68k_operand_type mode;
252
253 /* The main register. */
254 enum m68k_register reg;
255
256 /* The register mask for mode REGLST. */
257 unsigned long mask;
258
259 /* An error message. */
260 const char *error;
261
262 /* The index register. */
263 struct m68k_indexreg index;
264
265 /* The displacement. */
266 struct m68k_exp disp;
267
268 /* The outer displacement. */
269 struct m68k_exp odisp;
270};
271
272#endif /* ! defined (M68K_PARSE_H) */
273
274/* The parsing function. */
275
276extern int m68k_ip_op PARAMS ((char *, struct m68k_op *));
277
278/* Whether register prefixes are optional. */
279extern int flag_reg_prefix_optional;
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