Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
f17c130b AM |
2 | Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000, 2001, |
3 | 2002, 2005 | |
252b5132 RH |
4 | Free Software Foundation, Inc. |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
20 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
21 | 02110-1301, USA. */ | |
252b5132 RH |
22 | |
23 | /* John Gilmore has reorganized this module somewhat, to make it easier | |
24 | to convert it to new machines' assemblers as desired. There was too | |
25 | much bloody rewriting required before. There still probably is. */ | |
26 | ||
252b5132 | 27 | #include "as.h" |
3882b010 | 28 | #include "safe-ctype.h" |
252b5132 RH |
29 | |
30 | #include "opcode/a29k.h" | |
31 | ||
32 | /* Make it easier to clone this machine desc into another one. */ | |
33 | #define machine_opcode a29k_opcode | |
34 | #define machine_opcodes a29k_opcodes | |
35 | #define machine_ip a29k_ip | |
36 | #define machine_it a29k_it | |
37 | ||
ea1562b3 NC |
38 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate. */ |
39 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute. */ | |
40 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD. */ | |
41 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT. */ | |
252b5132 | 42 | |
ea1562b3 | 43 | /* handle of the OPCODE hash table. */ |
252b5132 RH |
44 | static struct hash_control *op_hash = NULL; |
45 | ||
46 | struct machine_it | |
252b5132 | 47 | { |
ea1562b3 NC |
48 | char *error; |
49 | unsigned long opcode; | |
50 | struct nlist *nlistp; | |
51 | expressionS exp; | |
52 | int pcrel; | |
53 | int reloc_offset; /* Offset of reloc within insn. */ | |
54 | int reloc; | |
55 | } | |
56 | the_insn; | |
252b5132 RH |
57 | |
58 | #if defined(BFD_HEADERS) | |
59 | #ifdef RELSZ | |
ea1562b3 | 60 | const int md_reloc_size = RELSZ; /* Coff headers. */ |
252b5132 | 61 | #else |
ea1562b3 | 62 | const int md_reloc_size = 12; /* Something else headers. */ |
252b5132 RH |
63 | #endif |
64 | #else | |
ea1562b3 | 65 | const int md_reloc_size = 12; /* Not bfdized. */ |
252b5132 RH |
66 | #endif |
67 | ||
68 | /* This array holds the chars that always start a comment. If the | |
ea1562b3 | 69 | pre-processor is disabled, these aren't very useful. */ |
252b5132 RH |
70 | const char comment_chars[] = ";"; |
71 | ||
72 | /* This array holds the chars that only start a comment at the beginning of | |
73 | a line. If the line seems to have the form '# 123 filename' | |
ea1562b3 | 74 | .line and .file directives will appear in the pre-processed output. */ |
252b5132 RH |
75 | /* Note that input_file.c hand checks for '#' at the beginning of the |
76 | first line of the input file. This is because the compiler outputs | |
1dab94dd | 77 | #NO_APP at the beginning of its output. */ |
ea1562b3 | 78 | /* Also note that comments like this one will always work. */ |
252b5132 RH |
79 | const char line_comment_chars[] = "#"; |
80 | ||
81 | /* We needed an unused char for line separation to work around the | |
82 | lack of macros, using sed and such. */ | |
83 | const char line_separator_chars[] = "@"; | |
84 | ||
ea1562b3 | 85 | /* Chars that can be used to separate mant from exp in floating point nums. */ |
252b5132 RH |
86 | const char EXP_CHARS[] = "eE"; |
87 | ||
ea1562b3 NC |
88 | /* Chars that mean this number is a floating point constant. |
89 | As in 0f12.456 | |
90 | or 0d1.2345e12. */ | |
252b5132 RH |
91 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
92 | ||
93 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
94 | changed in read.c. Ideally it shouldn't have to know about it at | |
95 | all, but nothing is ideal around here. */ | |
96 | ||
ea1562b3 | 97 | /* anull bit - causes the branch delay slot instructions to not be executed. */ |
252b5132 RH |
98 | #define ANNUL (1 << 29) |
99 | ||
100 | #ifndef OBJ_COFF | |
101 | ||
102 | static void | |
ea1562b3 | 103 | s_use (int ignore) |
252b5132 RH |
104 | { |
105 | if (strncmp (input_line_pointer, ".text", 5) == 0) | |
106 | { | |
107 | input_line_pointer += 5; | |
108 | s_text (0); | |
109 | return; | |
110 | } | |
111 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
112 | { | |
113 | input_line_pointer += 5; | |
114 | s_data (0); | |
115 | return; | |
116 | } | |
117 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
118 | { | |
119 | input_line_pointer += 6; | |
120 | s_data1 (); | |
121 | return; | |
122 | } | |
123 | /* Literals can't go in the text segment because you can't read from | |
1dab94dd | 124 | instruction memory on some 29k's. So, into initialized data. */ |
252b5132 RH |
125 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
126 | { | |
127 | input_line_pointer += 4; | |
128 | subseg_set (SEG_DATA, 200); | |
129 | demand_empty_rest_of_line (); | |
130 | return; | |
131 | } | |
132 | ||
133 | as_bad (_("Unknown segment type")); | |
134 | demand_empty_rest_of_line (); | |
135 | } | |
136 | ||
137 | static void | |
ea1562b3 | 138 | s_data1 (void) |
252b5132 RH |
139 | { |
140 | subseg_set (SEG_DATA, 1); | |
141 | demand_empty_rest_of_line (); | |
142 | } | |
143 | ||
144 | #endif /* OBJ_COFF */ | |
145 | ||
146 | /* Install symbol definition that maps REGNAME to REGNO. | |
147 | FIXME-SOON: These are not recognized in mixed case. */ | |
148 | ||
149 | static void | |
ea1562b3 | 150 | insert_sreg (char *regname, int regnum) |
252b5132 RH |
151 | { |
152 | /* FIXME-SOON, put something in these syms so they won't be output | |
153 | to the symbol table of the resulting object file. */ | |
154 | ||
155 | /* Must be large enough to hold the names of the special registers. */ | |
156 | char buf[80]; | |
157 | int i; | |
158 | ||
159 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum, | |
160 | &zero_address_frag)); | |
161 | for (i = 0; regname[i]; i++) | |
3882b010 | 162 | buf[i] = TOUPPER (regname[i]); |
252b5132 RH |
163 | buf[i] = '\0'; |
164 | ||
165 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum, | |
166 | &zero_address_frag)); | |
167 | } | |
168 | ||
169 | /* Install symbol definitions for assorted special registers. | |
170 | See ASM29K Ref page 2-9. */ | |
171 | ||
bfc866a6 | 172 | static void |
ea1562b3 | 173 | define_some_regs (void) |
252b5132 RH |
174 | { |
175 | #define SREG 256 | |
176 | ||
ea1562b3 | 177 | /* Protected special-purpose register names. */ |
252b5132 RH |
178 | insert_sreg ("vab", SREG + 0); |
179 | insert_sreg ("ops", SREG + 1); | |
180 | insert_sreg ("cps", SREG + 2); | |
181 | insert_sreg ("cfg", SREG + 3); | |
182 | insert_sreg ("cha", SREG + 4); | |
183 | insert_sreg ("chd", SREG + 5); | |
184 | insert_sreg ("chc", SREG + 6); | |
185 | insert_sreg ("rbp", SREG + 7); | |
186 | insert_sreg ("tmc", SREG + 8); | |
187 | insert_sreg ("tmr", SREG + 9); | |
188 | insert_sreg ("pc0", SREG + 10); | |
189 | insert_sreg ("pc1", SREG + 11); | |
190 | insert_sreg ("pc2", SREG + 12); | |
191 | insert_sreg ("mmu", SREG + 13); | |
192 | insert_sreg ("lru", SREG + 14); | |
193 | ||
ea1562b3 | 194 | /* Additional protected special-purpose registers for the 29050. */ |
252b5132 RH |
195 | insert_sreg ("rsn", SREG + 15); |
196 | insert_sreg ("rma0", SREG + 16); | |
197 | insert_sreg ("rmc0", SREG + 17); | |
198 | insert_sreg ("rma1", SREG + 18); | |
199 | insert_sreg ("rmc1", SREG + 19); | |
200 | insert_sreg ("spc0", SREG + 20); | |
201 | insert_sreg ("spc1", SREG + 21); | |
202 | insert_sreg ("spc2", SREG + 22); | |
203 | insert_sreg ("iba0", SREG + 23); | |
204 | insert_sreg ("ibc0", SREG + 24); | |
205 | insert_sreg ("iba1", SREG + 25); | |
206 | insert_sreg ("ibc1", SREG + 26); | |
207 | ||
208 | /* Additional registers for the 29040. */ | |
209 | insert_sreg ("dba", SREG + 27); | |
210 | insert_sreg ("dbc", SREG + 28); | |
211 | insert_sreg ("cir", SREG + 29); | |
212 | insert_sreg ("cdr", SREG + 30); | |
213 | ||
ea1562b3 | 214 | /* Unprotected special-purpose register names. */ |
252b5132 RH |
215 | insert_sreg ("ipc", SREG + 128); |
216 | insert_sreg ("ipa", SREG + 129); | |
217 | insert_sreg ("ipb", SREG + 130); | |
218 | insert_sreg ("q", SREG + 131); | |
219 | insert_sreg ("alu", SREG + 132); | |
220 | insert_sreg ("bp", SREG + 133); | |
221 | insert_sreg ("fc", SREG + 134); | |
222 | insert_sreg ("cr", SREG + 135); | |
223 | insert_sreg ("fpe", SREG + 160); | |
224 | insert_sreg ("inte", SREG + 161); | |
225 | insert_sreg ("fps", SREG + 162); | |
226 | /* "", SREG+163); Reserved */ | |
227 | insert_sreg ("exop", SREG + 164); | |
228 | } | |
229 | ||
230 | /* This function is called once, at assembler startup time. It should | |
231 | set up all the tables, etc., that the MD part of the assembler will | |
232 | need. */ | |
ea1562b3 | 233 | |
252b5132 | 234 | void |
ea1562b3 | 235 | md_begin (void) |
252b5132 | 236 | { |
ea1562b3 | 237 | const char *retval = NULL; |
252b5132 | 238 | int lose = 0; |
ea1562b3 NC |
239 | int skipnext = 0; |
240 | unsigned int i; | |
241 | char *strend, *strend2; | |
252b5132 RH |
242 | |
243 | /* Hash up all the opcodes for fast use later. */ | |
244 | ||
245 | op_hash = hash_new (); | |
246 | ||
247 | for (i = 0; i < num_opcodes; i++) | |
248 | { | |
249 | const char *name = machine_opcodes[i].name; | |
250 | ||
251 | if (skipnext) | |
252 | { | |
253 | skipnext = 0; | |
254 | continue; | |
255 | } | |
256 | ||
257 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
1dab94dd | 258 | variations (b/i field and P/A field) and handle them. */ |
252b5132 RH |
259 | if (!strcmp (name, machine_opcodes[i + 1].name)) |
260 | { | |
261 | if ((machine_opcodes[i].opcode & 0x01000000) != 0 | |
262 | || (machine_opcodes[i + 1].opcode & 0x01000000) == 0 | |
263 | || ((machine_opcodes[i].opcode | 0x01000000) | |
264 | != machine_opcodes[i + 1].opcode)) | |
265 | goto bad_table; | |
ea1562b3 | 266 | |
252b5132 RH |
267 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; |
268 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
ea1562b3 | 269 | |
252b5132 RH |
270 | switch (*strend) |
271 | { | |
272 | case 'b': | |
273 | if (*strend2 != 'i') | |
274 | goto bad_table; | |
275 | break; | |
ea1562b3 | 276 | |
252b5132 RH |
277 | case 'P': |
278 | if (*strend2 != 'A') | |
279 | goto bad_table; | |
280 | break; | |
ea1562b3 | 281 | |
252b5132 RH |
282 | default: |
283 | bad_table: | |
284 | fprintf (stderr, "internal error: can't handle opcode %s\n", | |
285 | name); | |
286 | lose = 1; | |
287 | } | |
288 | ||
289 | /* OK, this is an i/b or A/P pair. We skip the | |
290 | higher-valued one, and let the code for operand checking | |
291 | handle OR-ing in the bit. */ | |
292 | skipnext = 1; | |
293 | } | |
294 | ||
ea1562b3 | 295 | retval = hash_insert (op_hash, name, (void *) &machine_opcodes[i]); |
252b5132 RH |
296 | if (retval != NULL) |
297 | { | |
298 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
299 | machine_opcodes[i].name, retval); | |
300 | lose = 1; | |
301 | } | |
302 | } | |
303 | ||
304 | if (lose) | |
305 | as_fatal (_("Broken assembler. No assembly attempted.")); | |
306 | ||
307 | define_some_regs (); | |
308 | } | |
309 | ||
bfc866a6 | 310 | static char * |
ea1562b3 | 311 | parse_operand (char *s, expressionS *operandp, int opt) |
252b5132 RH |
312 | { |
313 | char *save = input_line_pointer; | |
314 | char *new; | |
315 | ||
316 | input_line_pointer = s; | |
317 | expression (operandp); | |
318 | if (operandp->X_op == O_absent && ! opt) | |
319 | as_bad (_("missing operand")); | |
320 | new = input_line_pointer; | |
321 | input_line_pointer = save; | |
322 | return new; | |
323 | } | |
324 | ||
325 | /* Instruction parsing. Takes a string containing the opcode. | |
326 | Operands are at input_line_pointer. Output is in the_insn. | |
327 | Warnings or errors are generated. */ | |
328 | ||
329 | static void | |
ea1562b3 | 330 | machine_ip (char *str) |
252b5132 RH |
331 | { |
332 | char *s; | |
333 | const char *args; | |
334 | struct machine_opcode *insn; | |
335 | char *argsStart; | |
336 | unsigned long opcode; | |
337 | expressionS the_operand; | |
338 | expressionS *operand = &the_operand; | |
339 | unsigned int reg; | |
340 | ||
341 | /* Must handle `div0' opcode. */ | |
342 | s = str; | |
3882b010 L |
343 | if (ISALPHA (*s)) |
344 | for (; ISALNUM (*s); ++s) | |
345 | *s = TOLOWER (*s); | |
252b5132 RH |
346 | |
347 | switch (*s) | |
348 | { | |
349 | case '\0': | |
350 | break; | |
351 | ||
ea1562b3 | 352 | case ' ': /* FIXME-SOMEDAY more whitespace. */ |
252b5132 RH |
353 | *s++ = '\0'; |
354 | break; | |
355 | ||
356 | default: | |
357 | as_bad (_("Unknown opcode: `%s'"), str); | |
358 | return; | |
359 | } | |
360 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
361 | { | |
362 | as_bad (_("Unknown opcode `%s'."), str); | |
363 | return; | |
364 | } | |
365 | argsStart = s; | |
366 | opcode = insn->opcode; | |
367 | memset (&the_insn, '\0', sizeof (the_insn)); | |
368 | the_insn.reloc = NO_RELOC; | |
369 | ||
370 | /* Build the opcode, checking as we go to make sure that the | |
371 | operands match. | |
1dab94dd | 372 | |
252b5132 RH |
373 | If an operand matches, we modify the_insn or opcode appropriately, |
374 | and do a "continue". If an operand fails to match, we "break". */ | |
252b5132 | 375 | if (insn->args[0] != '\0') |
ea1562b3 NC |
376 | /* Prime the pump. */ |
377 | s = parse_operand (s, operand, insn->args[0] == 'I'); | |
252b5132 RH |
378 | |
379 | for (args = insn->args;; ++args) | |
380 | { | |
381 | switch (*args) | |
382 | { | |
ea1562b3 | 383 | case '\0': |
252b5132 RH |
384 | if (*s == '\0') |
385 | { | |
1dab94dd | 386 | /* We are truly done. */ |
252b5132 RH |
387 | the_insn.opcode = opcode; |
388 | return; | |
389 | } | |
390 | as_bad (_("Too many operands: %s"), s); | |
391 | break; | |
392 | ||
ea1562b3 | 393 | case ',': |
252b5132 RH |
394 | if (*s++ == ',') |
395 | { | |
396 | /* Parse next operand. */ | |
397 | s = parse_operand (s, operand, args[1] == 'I'); | |
398 | continue; | |
399 | } | |
400 | break; | |
401 | ||
ea1562b3 NC |
402 | case 'v': |
403 | /* Trap numbers (immediate field). */ | |
252b5132 RH |
404 | if (operand->X_op == O_constant) |
405 | { | |
406 | if (operand->X_add_number < 256) | |
ea1562b3 | 407 | opcode |= (operand->X_add_number << 16); |
252b5132 | 408 | else |
ea1562b3 NC |
409 | as_bad (_("Immediate value of %ld is too large"), |
410 | (long) operand->X_add_number); | |
411 | continue; | |
252b5132 RH |
412 | } |
413 | the_insn.reloc = RELOC_8; | |
ea1562b3 NC |
414 | /* BIG-ENDIAN Byte 1 of insn. */ |
415 | the_insn.reloc_offset = 1; | |
252b5132 RH |
416 | the_insn.exp = *operand; |
417 | continue; | |
418 | ||
ea1562b3 | 419 | case 'b': /* A general register or 8-bit immediate. */ |
252b5132 RH |
420 | case 'i': |
421 | /* We treat the two cases identically since we mashed | |
422 | them together in the opcode table. */ | |
423 | if (operand->X_op == O_register) | |
424 | goto general_reg; | |
425 | ||
426 | /* Make sure the 'i' case really exists. */ | |
427 | if ((insn->opcode | IMMEDIATE_BIT) != (insn + 1)->opcode) | |
428 | break; | |
429 | ||
430 | opcode |= IMMEDIATE_BIT; | |
431 | if (operand->X_op == O_constant) | |
432 | { | |
433 | if (operand->X_add_number < 256) | |
ea1562b3 | 434 | opcode |= operand->X_add_number; |
252b5132 | 435 | else |
ea1562b3 NC |
436 | as_bad (_("Immediate value of %ld is too large"), |
437 | (long) operand->X_add_number); | |
438 | continue; | |
252b5132 RH |
439 | } |
440 | the_insn.reloc = RELOC_8; | |
ea1562b3 | 441 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn. */ |
252b5132 RH |
442 | the_insn.exp = *operand; |
443 | continue; | |
444 | ||
ea1562b3 | 445 | case 'a': /* Next operand must be a register. */ |
252b5132 RH |
446 | case 'c': |
447 | general_reg: | |
ea1562b3 | 448 | /* lrNNN or grNNN or %%expr or a user-def register name. */ |
252b5132 | 449 | if (operand->X_op != O_register) |
ea1562b3 | 450 | break; |
252b5132 RH |
451 | know (operand->X_add_symbol == 0); |
452 | know (operand->X_op_symbol == 0); | |
453 | reg = operand->X_add_number; | |
454 | if (reg >= SREG) | |
ea1562b3 | 455 | break; |
252b5132 RH |
456 | |
457 | /* Got the register, now figure out where it goes in the | |
458 | opcode. */ | |
459 | switch (*args) | |
460 | { | |
461 | case 'a': | |
462 | opcode |= reg << 8; | |
463 | continue; | |
464 | ||
465 | case 'b': | |
466 | case 'i': | |
467 | opcode |= reg; | |
468 | continue; | |
469 | ||
470 | case 'c': | |
471 | opcode |= reg << 16; | |
472 | continue; | |
473 | } | |
474 | as_fatal (_("failed sanity check.")); | |
475 | break; | |
476 | ||
ea1562b3 NC |
477 | case 'x': /* 16 bit constant, zero-extended. */ |
478 | case 'X': /* 16 bit constant, one-extended. */ | |
252b5132 RH |
479 | if (operand->X_op == O_constant) |
480 | { | |
ea1562b3 NC |
481 | opcode |= (operand->X_add_number & 0xFF) << 0 |
482 | | ((operand->X_add_number & 0xFF00) << 8); | |
252b5132 RH |
483 | continue; |
484 | } | |
485 | the_insn.reloc = RELOC_CONST; | |
486 | the_insn.exp = *operand; | |
487 | continue; | |
488 | ||
489 | case 'h': | |
490 | if (operand->X_op == O_constant) | |
491 | { | |
ea1562b3 NC |
492 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
493 | | (((unsigned long) operand->X_add_number | |
494 | /* Avoid sign ext. */ & 0xFF000000) >> 8); | |
252b5132 RH |
495 | continue; |
496 | } | |
497 | the_insn.reloc = RELOC_CONSTH; | |
498 | the_insn.exp = *operand; | |
499 | continue; | |
500 | ||
ea1562b3 NC |
501 | case 'P': /* PC-relative jump address. */ |
502 | case 'A': /* Absolute jump address. */ | |
252b5132 RH |
503 | /* These two are treated together since we folded the |
504 | opcode table entries together. */ | |
505 | if (operand->X_op == O_constant) | |
506 | { | |
507 | /* Make sure the 'A' case really exists. */ | |
508 | if ((insn->opcode | ABSOLUTE_BIT) != (insn + 1)->opcode) | |
509 | break; | |
ea1562b3 | 510 | |
252b5132 RH |
511 | { |
512 | bfd_vma v, mask; | |
ea1562b3 | 513 | |
252b5132 RH |
514 | mask = 0x1ffff; |
515 | v = operand->X_add_number & ~ mask; | |
516 | if (v) | |
517 | as_bad ("call/jmp target out of range"); | |
518 | } | |
ea1562b3 NC |
519 | |
520 | opcode |= ABSOLUTE_BIT | |
521 | | (operand->X_add_number & 0x0003FC00) << 6 | |
522 | | ((operand->X_add_number & 0x000003FC) >> 2); | |
252b5132 RH |
523 | continue; |
524 | } | |
ea1562b3 | 525 | |
252b5132 RH |
526 | the_insn.reloc = RELOC_JUMPTARG; |
527 | the_insn.exp = *operand; | |
ea1562b3 | 528 | the_insn.pcrel = 1; /* Assume PC-relative jump. */ |
252b5132 | 529 | /* FIXME-SOON, Do we figure out whether abs later, after |
ea1562b3 | 530 | know sym val? */ |
252b5132 RH |
531 | continue; |
532 | ||
ea1562b3 | 533 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn. */ |
252b5132 RH |
534 | if (operand->X_op == O_constant) |
535 | { | |
536 | if (operand->X_add_number == 0) | |
537 | continue; | |
538 | if (operand->X_add_number == 1) | |
539 | { | |
540 | opcode |= CE_BIT; | |
541 | continue; | |
542 | } | |
543 | } | |
544 | break; | |
545 | ||
ea1562b3 NC |
546 | case 'n': /* Control bits for LOAD/STORE instructions. */ |
547 | if (operand->X_op == O_constant | |
548 | && operand->X_add_number < 128) | |
252b5132 RH |
549 | { |
550 | opcode |= (operand->X_add_number << 16); | |
551 | continue; | |
552 | } | |
553 | break; | |
554 | ||
ea1562b3 | 555 | case 's': /* Special register number. */ |
252b5132 | 556 | if (operand->X_op != O_register) |
ea1562b3 | 557 | break; |
252b5132 | 558 | if (operand->X_add_number < SREG) |
ea1562b3 | 559 | break; |
252b5132 RH |
560 | opcode |= (operand->X_add_number & 0xFF) << 8; |
561 | continue; | |
562 | ||
ea1562b3 | 563 | case 'u': /* UI bit of CONVERT. */ |
252b5132 RH |
564 | if (operand->X_op == O_constant) |
565 | { | |
566 | if (operand->X_add_number == 0) | |
567 | continue; | |
568 | if (operand->X_add_number == 1) | |
569 | { | |
570 | opcode |= UI_BIT; | |
571 | continue; | |
572 | } | |
573 | } | |
574 | break; | |
575 | ||
ea1562b3 NC |
576 | case 'r': /* RND bits of CONVERT. */ |
577 | if (operand->X_op == O_constant | |
578 | && operand->X_add_number < 8) | |
252b5132 RH |
579 | { |
580 | opcode |= operand->X_add_number << 4; | |
581 | continue; | |
582 | } | |
583 | break; | |
584 | ||
ea1562b3 | 585 | case 'I': /* ID bits of INV and IRETINV. */ |
252b5132 RH |
586 | /* This operand is optional. */ |
587 | if (operand->X_op == O_absent) | |
588 | continue; | |
589 | else if (operand->X_op == O_constant | |
590 | && operand->X_add_number < 4) | |
591 | { | |
592 | opcode |= operand->X_add_number << 16; | |
593 | continue; | |
594 | } | |
595 | break; | |
596 | ||
ea1562b3 NC |
597 | case 'd': /* FD bits of CONVERT. */ |
598 | if (operand->X_op == O_constant | |
599 | && operand->X_add_number < 4) | |
252b5132 RH |
600 | { |
601 | opcode |= operand->X_add_number << 2; | |
602 | continue; | |
603 | } | |
604 | break; | |
605 | ||
ea1562b3 NC |
606 | case 'f': /* FS bits of CONVERT. */ |
607 | if (operand->X_op == O_constant | |
608 | && operand->X_add_number < 4) | |
252b5132 RH |
609 | { |
610 | opcode |= operand->X_add_number << 0; | |
611 | continue; | |
612 | } | |
613 | break; | |
614 | ||
615 | case 'C': | |
ea1562b3 NC |
616 | if (operand->X_op == O_constant |
617 | && operand->X_add_number < 4) | |
252b5132 RH |
618 | { |
619 | opcode |= operand->X_add_number << 16; | |
620 | continue; | |
621 | } | |
622 | break; | |
623 | ||
624 | case 'F': | |
ea1562b3 NC |
625 | if (operand->X_op == O_constant |
626 | && operand->X_add_number < 16) | |
252b5132 RH |
627 | { |
628 | opcode |= operand->X_add_number << 18; | |
629 | continue; | |
630 | } | |
631 | break; | |
632 | ||
633 | default: | |
634 | BAD_CASE (*args); | |
635 | } | |
636 | /* Types or values of args don't match. */ | |
637 | as_bad ("Invalid operands"); | |
638 | return; | |
639 | } | |
640 | } | |
641 | ||
ea1562b3 NC |
642 | /* Assemble a single instruction. Its label has already been handled |
643 | by the generic front end. We just parse opcode and operands, and | |
644 | produce the bytes of data and relocation. */ | |
645 | ||
646 | void | |
647 | md_assemble (char *str) | |
648 | { | |
649 | char *toP; | |
650 | ||
651 | know (str); | |
652 | machine_ip (str); | |
653 | toP = frag_more (4); | |
654 | /* Put out the opcode. */ | |
655 | md_number_to_chars (toP, the_insn.opcode, 4); | |
656 | ||
657 | /* Put out the symbol-dependent stuff. */ | |
658 | if (the_insn.reloc != NO_RELOC) | |
659 | fix_new_exp (frag_now, | |
660 | (toP - frag_now->fr_literal + the_insn.reloc_offset), | |
661 | 4, & the_insn.exp, the_insn.pcrel, the_insn.reloc); | |
662 | } | |
663 | ||
252b5132 RH |
664 | /* This is identical to the md_atof in m68k.c. I think this is right, |
665 | but I'm not sure. | |
666 | ||
667 | Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
668 | of type TYPE, and store the appropriate bytes in *LITP. The number |
669 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
252b5132 RH |
670 | returned, or NULL on OK. */ |
671 | ||
672 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
673 | #define MAX_LITTLENUMS 6 | |
674 | ||
675 | char * | |
ea1562b3 | 676 | md_atof (int type, char *litP, int *sizeP) |
252b5132 RH |
677 | { |
678 | int prec; | |
679 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
680 | LITTLENUM_TYPE *wordP; | |
681 | char *t; | |
682 | ||
683 | switch (type) | |
684 | { | |
685 | ||
686 | case 'f': | |
687 | case 'F': | |
688 | case 's': | |
689 | case 'S': | |
690 | prec = 2; | |
691 | break; | |
692 | ||
693 | case 'd': | |
694 | case 'D': | |
695 | case 'r': | |
696 | case 'R': | |
697 | prec = 4; | |
698 | break; | |
699 | ||
700 | case 'x': | |
701 | case 'X': | |
702 | prec = 6; | |
703 | break; | |
704 | ||
705 | case 'p': | |
706 | case 'P': | |
707 | prec = 6; | |
708 | break; | |
709 | ||
710 | default: | |
711 | *sizeP = 0; | |
712 | return "Bad call to MD_ATOF()"; | |
713 | } | |
714 | t = atof_ieee (input_line_pointer, type, words); | |
715 | if (t) | |
716 | input_line_pointer = t; | |
717 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
718 | for (wordP = words; prec--;) | |
719 | { | |
720 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
721 | litP += sizeof (LITTLENUM_TYPE); | |
722 | } | |
723 | return 0; | |
724 | } | |
725 | ||
ea1562b3 NC |
726 | /* Write out big-endian. */ |
727 | ||
252b5132 | 728 | void |
ea1562b3 | 729 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
730 | { |
731 | number_to_chars_bigendian (buf, val, n); | |
732 | } | |
733 | ||
734 | void | |
55cf6793 | 735 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 736 | { |
f17c130b | 737 | valueT val = *valP; |
252b5132 RH |
738 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
739 | ||
94f592af | 740 | fixP->fx_addnumber = val; /* Remember value for emit_reloc. */ |
252b5132 | 741 | |
252b5132 RH |
742 | know (fixP->fx_size == 4); |
743 | know (fixP->fx_r_type < NO_RELOC); | |
744 | ||
745 | /* This is a hack. There should be a better way to handle this. */ | |
746 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) | |
94f592af | 747 | val += fixP->fx_where + fixP->fx_frag->fr_address; |
252b5132 RH |
748 | |
749 | switch (fixP->fx_r_type) | |
750 | { | |
252b5132 RH |
751 | case RELOC_32: |
752 | buf[0] = val >> 24; | |
753 | buf[1] = val >> 16; | |
754 | buf[2] = val >> 8; | |
755 | buf[3] = val; | |
756 | break; | |
757 | ||
758 | case RELOC_8: | |
759 | buf[0] = val; | |
760 | break; | |
761 | ||
762 | case RELOC_WDISP30: | |
bfc866a6 | 763 | val = (val >> 2) + 1; |
252b5132 RH |
764 | buf[0] |= (val >> 24) & 0x3f; |
765 | buf[1] = (val >> 16); | |
766 | buf[2] = val >> 8; | |
767 | buf[3] = val; | |
768 | break; | |
769 | ||
770 | case RELOC_HI22: | |
771 | buf[1] |= (val >> 26) & 0x3f; | |
772 | buf[2] = val >> 18; | |
773 | buf[3] = val >> 10; | |
774 | break; | |
775 | ||
776 | case RELOC_LO10: | |
777 | buf[2] |= (val >> 8) & 0x03; | |
778 | buf[3] = val; | |
779 | break; | |
780 | ||
781 | case RELOC_BASE13: | |
782 | buf[2] |= (val >> 8) & 0x1f; | |
783 | buf[3] = val; | |
784 | break; | |
785 | ||
786 | case RELOC_WDISP22: | |
bfc866a6 | 787 | val = (val >> 2) + 1; |
252b5132 RH |
788 | /* FALLTHROUGH */ |
789 | case RELOC_BASE22: | |
790 | buf[1] |= (val >> 16) & 0x3f; | |
791 | buf[2] = val >> 8; | |
792 | buf[3] = val; | |
793 | break; | |
794 | ||
ea1562b3 | 795 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word. */ |
252b5132 RH |
796 | if (!fixP->fx_done) |
797 | { | |
798 | /* The linker tries to support both AMD and old GNU style | |
799 | R_IREL relocs. That means that if the addend is exactly | |
800 | the negative of the address within the section, the | |
801 | linker will not handle it correctly. */ | |
802 | if (fixP->fx_pcrel | |
803 | && val != 0 | |
804 | && val == - (fixP->fx_frag->fr_address + fixP->fx_where)) | |
805 | as_bad_where | |
806 | (fixP->fx_file, fixP->fx_line, | |
807 | "the linker will not handle this relocation correctly"); | |
808 | } | |
809 | else if (fixP->fx_pcrel) | |
810 | { | |
f17c130b | 811 | if (val + 0x20000 > 0x3ffff) |
252b5132 RH |
812 | as_bad_where (fixP->fx_file, fixP->fx_line, |
813 | "call/jmp target out of range"); | |
814 | } | |
815 | else | |
94f592af | 816 | /* This case was supposed to be handled in machine_ip. */ |
252b5132 | 817 | abort (); |
ea1562b3 NC |
818 | |
819 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address. */ | |
252b5132 RH |
820 | buf[3] = val >> 2; |
821 | break; | |
822 | ||
ea1562b3 NC |
823 | case RELOC_CONST: /* 00XX00XX pattern in a word. */ |
824 | buf[1] = val >> 8; /* Holds bits 0000XXXX. */ | |
252b5132 RH |
825 | buf[3] = val; |
826 | break; | |
827 | ||
ea1562b3 NC |
828 | case RELOC_CONSTH: /* 00XX00XX pattern in a word. */ |
829 | buf[1] = val >> 24; /* Holds bits XXXX0000. */ | |
252b5132 RH |
830 | buf[3] = val >> 16; |
831 | break; | |
832 | ||
833 | case NO_RELOC: | |
834 | default: | |
835 | as_bad (_("bad relocation type: 0x%02x"), fixP->fx_r_type); | |
836 | break; | |
837 | } | |
94f592af NC |
838 | |
839 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) | |
840 | fixP->fx_done = 1; | |
252b5132 RH |
841 | } |
842 | ||
843 | #ifdef OBJ_COFF | |
844 | short | |
ea1562b3 | 845 | tc_coff_fix2rtype (fixS *fixP) |
252b5132 | 846 | { |
252b5132 RH |
847 | switch (fixP->fx_r_type) |
848 | { | |
ea1562b3 NC |
849 | case RELOC_32: return R_WORD; |
850 | case RELOC_8: return R_BYTE; | |
851 | case RELOC_CONST: return R_ILOHALF; | |
852 | case RELOC_CONSTH: return R_IHIHALF; | |
853 | case RELOC_JUMPTARG: return R_IREL; | |
252b5132 RH |
854 | default: |
855 | printf (_("need %o3\n"), fixP->fx_r_type); | |
856 | abort (); | |
ea1562b3 | 857 | } |
252b5132 | 858 | |
ea1562b3 | 859 | return 0; |
252b5132 RH |
860 | } |
861 | ||
862 | #endif /* OBJ_COFF */ | |
863 | ||
ea1562b3 NC |
864 | /* Should never be called for 29k. */ |
865 | ||
252b5132 | 866 | void |
ea1562b3 NC |
867 | md_convert_frag (object_headers *headers ATTRIBUTE_UNUSED, |
868 | segT seg ATTRIBUTE_UNUSED, | |
869 | fragS *fragP ATTRIBUTE_UNUSED) | |
252b5132 RH |
870 | { |
871 | as_fatal (_("a29k_convert_frag\n")); | |
872 | } | |
873 | ||
ea1562b3 NC |
874 | /* Should never be called for a29k. */ |
875 | ||
252b5132 | 876 | int |
ea1562b3 NC |
877 | md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED, |
878 | segT segtype ATTRIBUTE_UNUSED) | |
252b5132 RH |
879 | { |
880 | as_fatal (_("a29k_estimate_size_before_relax\n")); | |
881 | return 0; | |
882 | } | |
883 | ||
252b5132 RH |
884 | /* Translate internal representation of relocation info to target format. |
885 | ||
886 | On sparc/29k: first 4 bytes are normal unsigned long address, next three | |
887 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
888 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1dab94dd | 889 | five bits as relocation type. Next 4 bytes are long addend. */ |
ea1562b3 NC |
890 | |
891 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com. */ | |
252b5132 RH |
892 | |
893 | #ifdef OBJ_AOUT | |
894 | ||
895 | void | |
ea1562b3 NC |
896 | tc_aout_fix_to_chars (char *where, |
897 | fixS *fixP, | |
898 | relax_addressT segment_address_in_file) | |
252b5132 RH |
899 | { |
900 | long r_symbolnum; | |
901 | ||
902 | know (fixP->fx_r_type < NO_RELOC); | |
903 | know (fixP->fx_addsy != NULL); | |
904 | ||
905 | md_number_to_chars (where, | |
906 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
907 | 4); | |
908 | ||
909 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
910 | ? S_GET_TYPE (fixP->fx_addsy) | |
911 | : fixP->fx_addsy->sy_number); | |
912 | ||
913 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
914 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
915 | where[6] = r_symbolnum & 0x0ff; | |
916 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
ea1562b3 NC |
917 | |
918 | /* Also easy. */ | |
252b5132 RH |
919 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); |
920 | } | |
921 | ||
922 | #endif /* OBJ_AOUT */ | |
923 | \f | |
5a38dc70 | 924 | const char *md_shortopts = ""; |
ea1562b3 NC |
925 | |
926 | struct option md_longopts[] = | |
927 | { | |
252b5132 RH |
928 | {NULL, no_argument, NULL, 0} |
929 | }; | |
ea1562b3 | 930 | |
bc805888 | 931 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
932 | |
933 | int | |
ea1562b3 | 934 | md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
935 | { |
936 | return 0; | |
937 | } | |
938 | ||
939 | void | |
ea1562b3 | 940 | md_show_usage (FILE *stream ATTRIBUTE_UNUSED) |
252b5132 RH |
941 | { |
942 | } | |
943 | \f | |
944 | /* This is called when a line is unrecognized. This is used to handle | |
945 | definitions of a29k style local labels. */ | |
946 | ||
947 | int | |
ea1562b3 | 948 | a29k_unrecognized_line (int c) |
252b5132 RH |
949 | { |
950 | int lab; | |
951 | char *s; | |
952 | ||
953 | if (c != '$' | |
3882b010 | 954 | || ! ISDIGIT (input_line_pointer[0])) |
252b5132 RH |
955 | return 0; |
956 | ||
957 | s = input_line_pointer; | |
958 | ||
959 | lab = 0; | |
3882b010 | 960 | while (ISDIGIT (*s)) |
252b5132 RH |
961 | { |
962 | lab = lab * 10 + *s - '0'; | |
963 | ++s; | |
964 | } | |
965 | ||
966 | if (*s != ':') | |
967 | { | |
968 | /* Not a label definition. */ | |
969 | return 0; | |
970 | } | |
971 | ||
972 | if (dollar_label_defined (lab)) | |
973 | { | |
974 | as_bad (_("label \"$%d\" redefined"), lab); | |
975 | return 0; | |
976 | } | |
977 | ||
978 | define_dollar_label (lab); | |
979 | colon (dollar_label_name (lab, 0)); | |
980 | input_line_pointer = s + 1; | |
981 | ||
982 | return 1; | |
983 | } | |
984 | ||
985 | /* Default the values of symbols known that should be "predefined". We | |
986 | don't bother to predefine them unless you actually use one, since there | |
987 | are a lot of them. */ | |
988 | ||
989 | symbolS * | |
ea1562b3 | 990 | md_undefined_symbol (char *name) |
252b5132 RH |
991 | { |
992 | long regnum; | |
993 | char testbuf[5 + /*SLOP*/ 5]; | |
994 | ||
995 | if (name[0] == 'g' || name[0] == 'G' | |
996 | || name[0] == 'l' || name[0] == 'L' | |
997 | || name[0] == 's' || name[0] == 'S') | |
998 | { | |
ea1562b3 | 999 | /* Perhaps a global or local register name. */ |
252b5132 RH |
1000 | if (name[1] == 'r' || name[1] == 'R') |
1001 | { | |
1002 | long maxreg; | |
1003 | ||
1004 | /* Parse the number, make sure it has no extra zeroes or | |
1dab94dd | 1005 | trailing chars. */ |
252b5132 RH |
1006 | regnum = atol (&name[2]); |
1007 | ||
1008 | if (name[0] == 's' || name[0] == 'S') | |
1009 | maxreg = 255; | |
1010 | else | |
1011 | maxreg = 127; | |
1012 | if (regnum > maxreg) | |
1013 | return NULL; | |
1014 | ||
1015 | sprintf (testbuf, "%ld", regnum); | |
1016 | if (strcmp (testbuf, &name[2]) != 0) | |
ea1562b3 | 1017 | return NULL; /* gr007 or lr7foo or whatever. */ |
252b5132 RH |
1018 | |
1019 | /* We have a wiener! Define and return a new symbol for it. */ | |
1020 | if (name[0] == 'l' || name[0] == 'L') | |
1021 | regnum += 128; | |
1022 | else if (name[0] == 's' || name[0] == 'S') | |
1023 | regnum += SREG; | |
1024 | return (symbol_new (name, SEG_REGISTER, (valueT) regnum, | |
1025 | &zero_address_frag)); | |
1026 | } | |
1027 | } | |
1028 | ||
1029 | return NULL; | |
1030 | } | |
1031 | ||
1032 | /* Parse an operand that is machine-specific. */ | |
1033 | ||
1034 | void | |
ea1562b3 | 1035 | md_operand (expressionS *expressionP) |
252b5132 | 1036 | { |
252b5132 RH |
1037 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') |
1038 | { | |
1039 | /* We have a numeric register expression. No biggy. */ | |
1040 | input_line_pointer += 2; /* Skip %% */ | |
1041 | (void) expression (expressionP); | |
1042 | if (expressionP->X_op != O_constant | |
1043 | || expressionP->X_add_number > 255) | |
1044 | as_bad (_("Invalid expression after %%%%\n")); | |
1045 | expressionP->X_op = O_register; | |
1046 | } | |
1047 | else if (input_line_pointer[0] == '&') | |
1048 | { | |
1049 | /* We are taking the 'address' of a register...this one is not | |
1050 | in the manual, but it *is* in traps/fpsymbol.h! What they | |
1051 | seem to want is the register number, as an absolute number. */ | |
1052 | input_line_pointer++; /* Skip & */ | |
1053 | (void) expression (expressionP); | |
1054 | if (expressionP->X_op != O_register) | |
1055 | as_bad (_("Invalid register in & expression")); | |
1056 | else | |
1057 | expressionP->X_op = O_constant; | |
1058 | } | |
1059 | else if (input_line_pointer[0] == '$' | |
3882b010 | 1060 | && ISDIGIT (input_line_pointer[1])) |
252b5132 RH |
1061 | { |
1062 | long lab; | |
1063 | char *name; | |
1064 | symbolS *sym; | |
1065 | ||
1066 | /* This is a local label. */ | |
1067 | ++input_line_pointer; | |
1068 | lab = (long) get_absolute_expression (); | |
1069 | if (dollar_label_defined (lab)) | |
1070 | { | |
1071 | name = dollar_label_name (lab, 0); | |
1072 | sym = symbol_find (name); | |
1073 | } | |
1074 | else | |
1075 | { | |
1076 | name = dollar_label_name (lab, 1); | |
1077 | sym = symbol_find_or_make (name); | |
1078 | } | |
1079 | ||
1080 | expressionP->X_op = O_symbol; | |
1081 | expressionP->X_add_symbol = sym; | |
1082 | expressionP->X_add_number = 0; | |
1083 | } | |
1084 | else if (input_line_pointer[0] == '$') | |
1085 | { | |
1086 | char *s; | |
1087 | char type; | |
1088 | int fieldnum, fieldlimit; | |
1089 | LITTLENUM_TYPE floatbuf[8]; | |
1090 | ||
1091 | /* $float(), $doubleN(), or $extendN() convert floating values | |
1092 | to integers. */ | |
1093 | ||
1094 | s = input_line_pointer; | |
1095 | ||
1096 | ++s; | |
1097 | ||
1098 | fieldnum = 0; | |
1099 | if (strncmp (s, "double", sizeof "double" - 1) == 0) | |
1100 | { | |
1101 | s += sizeof "double" - 1; | |
1102 | type = 'd'; | |
1103 | fieldlimit = 2; | |
1104 | } | |
1105 | else if (strncmp (s, "float", sizeof "float" - 1) == 0) | |
1106 | { | |
1107 | s += sizeof "float" - 1; | |
1108 | type = 'f'; | |
1109 | fieldlimit = 1; | |
1110 | } | |
1111 | else if (strncmp (s, "extend", sizeof "extend" - 1) == 0) | |
1112 | { | |
1113 | s += sizeof "extend" - 1; | |
1114 | type = 'x'; | |
1115 | fieldlimit = 4; | |
1116 | } | |
1dab94dd | 1117 | else |
ea1562b3 | 1118 | return; |
252b5132 | 1119 | |
3882b010 | 1120 | if (ISDIGIT (*s)) |
252b5132 RH |
1121 | { |
1122 | fieldnum = *s - '0'; | |
1123 | ++s; | |
1124 | } | |
ea1562b3 | 1125 | |
252b5132 RH |
1126 | if (fieldnum >= fieldlimit) |
1127 | return; | |
1128 | ||
1129 | SKIP_WHITESPACE (); | |
1130 | if (*s != '(') | |
1131 | return; | |
1132 | ++s; | |
1133 | SKIP_WHITESPACE (); | |
1134 | ||
1135 | s = atof_ieee (s, type, floatbuf); | |
1136 | if (s == NULL) | |
1137 | return; | |
1138 | s = s; | |
1139 | ||
1140 | SKIP_WHITESPACE (); | |
1141 | if (*s != ')') | |
1142 | return; | |
1143 | ++s; | |
1144 | SKIP_WHITESPACE (); | |
1145 | ||
1146 | input_line_pointer = s; | |
1dab94dd | 1147 | expressionP->X_op = O_constant; |
252b5132 RH |
1148 | expressionP->X_unsigned = 1; |
1149 | expressionP->X_add_number = ((floatbuf[fieldnum * 2] | |
1150 | << LITTLENUM_NUMBER_OF_BITS) | |
1151 | + floatbuf[fieldnum * 2 + 1]); | |
1152 | } | |
1153 | } | |
1154 | ||
1155 | /* Round up a section size to the appropriate boundary. */ | |
ea1562b3 | 1156 | |
252b5132 | 1157 | valueT |
ea1562b3 | 1158 | md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size) |
252b5132 | 1159 | { |
ea1562b3 | 1160 | return size; /* Byte alignment is fine. */ |
252b5132 RH |
1161 | } |
1162 | ||
1163 | /* Exactly what point is a PC-relative offset relative TO? | |
1164 | On the 29000, they're relative to the address of the instruction, | |
1165 | which we have set up as the address of the fixup too. */ | |
ea1562b3 | 1166 | |
252b5132 | 1167 | long |
ea1562b3 | 1168 | md_pcrel_from (fixS *fixP) |
252b5132 RH |
1169 | { |
1170 | return fixP->fx_where + fixP->fx_frag->fr_address; | |
1171 | } | |
ea1562b3 NC |
1172 | |
1173 | const pseudo_typeS | |
1174 | md_pseudo_table[] = | |
1175 | { | |
1176 | {"align", s_align_bytes, 4}, | |
1177 | {"block", s_space, 0}, | |
1178 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050. */ | |
1179 | {"reg", s_lsym, 0}, /* Register equate, same as equ. */ | |
1180 | {"space", s_ignore, 0}, /* Listing control. */ | |
1181 | {"sect", s_ignore, 0}, /* Creation of coff sections. */ | |
1182 | #ifndef OBJ_COFF | |
1183 | {"use", s_use, 0}, /* We can do this right with coff. */ | |
1184 | #endif | |
1185 | {"word", cons, 4}, | |
1186 | {NULL, 0, 0}, | |
1187 | }; |