Remove trailing spaces in gas
[deliverable/binutils-gdb.git] / gas / config / tc-alpha.c
CommitLineData
252b5132 1/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
b90efa5b 2 Copyright (C) 1989-2015 Free Software Foundation, Inc.
252b5132
RH
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
9de8d8f1 7 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
252b5132
RH
8
9 This file is part of GAS, the GNU Assembler.
10
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
ec2655a6 13 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
14 any later version.
15
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
23 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
24 02110-1301, USA. */
252b5132 25
ea1562b3
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26/* Mach Operating System
27 Copyright (c) 1993 Carnegie Mellon University
28 All Rights Reserved.
29
30 Permission to use, copy, modify and distribute this software and its
31 documentation is hereby granted, provided that both the copyright
32 notice and this permission notice appear in all copies of the
33 software, derivative works or modified versions, and any portions
34 thereof, and that both notices appear in supporting documentation.
35
36 CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
37 CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39
40 Carnegie Mellon requests users of this software to return to
41
42 Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 School of Computer Science
44 Carnegie Mellon University
45 Pittsburgh PA 15213-3890
46
47 any improvements or extensions that they make and grant Carnegie the
48 rights to redistribute these changes. */
252b5132
RH
49
50#include "as.h"
51#include "subsegs.h"
43b4c25e 52#include "struc-symbol.h"
252b5132
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53#include "ecoff.h"
54
55#include "opcode/alpha.h"
56
57#ifdef OBJ_ELF
58#include "elf/alpha.h"
59#endif
60
198f1251
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61#ifdef OBJ_EVAX
62#include "vms.h"
d8703844 63#include "vms/egps.h"
198f1251
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64#endif
65
66#include "dwarf2dbg.h"
ea1562b3 67#include "dw2gencfi.h"
3882b010 68#include "safe-ctype.h"
252b5132 69\f
11f45fb5 70/* Local types. */
252b5132 71
ea1562b3
NC
72#define TOKENIZE_ERROR -1
73#define TOKENIZE_ERROR_REPORT -2
74#define MAX_INSN_FIXUPS 2
75#define MAX_INSN_ARGS 5
252b5132 76
21d799b5
NC
77/* Used since new relocation types are introduced in this
78 file (DUMMY_RELOC_LITUSE_*) */
79typedef int extended_bfd_reloc_code_real_type;
80
11f45fb5
NC
81struct alpha_fixup
82{
252b5132 83 expressionS exp;
21d799b5
NC
84 /* bfd_reloc_code_real_type reloc; */
85 extended_bfd_reloc_code_real_type reloc;
198f1251 86#ifdef OBJ_EVAX
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87 /* The symbol of the item in the linkage section. */
88 symbolS *xtrasym;
89
90 /* The symbol of the procedure descriptor. */
91 symbolS *procsym;
198f1251 92#endif
252b5132
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93};
94
11f45fb5
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95struct alpha_insn
96{
252b5132
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97 unsigned insn;
98 int nfixups;
99 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
19f78583 100 long sequence;
252b5132
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101};
102
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103enum alpha_macro_arg
104 {
105 MACRO_EOA = 1,
106 MACRO_IR,
107 MACRO_PIR,
108 MACRO_OPIR,
109 MACRO_CPIR,
110 MACRO_FPR,
198f1251 111 MACRO_EXP
11f45fb5 112 };
252b5132 113
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114struct alpha_macro
115{
252b5132 116 const char *name;
ea1562b3
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117 void (*emit) (const expressionS *, int, const void *);
118 const void * arg;
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119 enum alpha_macro_arg argsets[16];
120};
121
1dab94dd 122/* Extra expression types. */
252b5132 123
ea1562b3
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124#define O_pregister O_md1 /* O_register, in parentheses. */
125#define O_cpregister O_md2 /* + a leading comma. */
252b5132 126
3765b1be 127/* The alpha_reloc_op table below depends on the ordering of these. */
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128#define O_literal O_md3 /* !literal relocation. */
129#define O_lituse_addr O_md4 /* !lituse_addr relocation. */
130#define O_lituse_base O_md5 /* !lituse_base relocation. */
131#define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */
132#define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */
133#define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */
134#define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */
135#define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */
136#define O_gpdisp O_md11 /* !gpdisp relocation. */
137#define O_gprelhigh O_md12 /* !gprelhigh relocation. */
138#define O_gprellow O_md13 /* !gprellow relocation. */
139#define O_gprel O_md14 /* !gprel relocation. */
140#define O_samegp O_md15 /* !samegp relocation. */
141#define O_tlsgd O_md16 /* !tlsgd relocation. */
142#define O_tlsldm O_md17 /* !tlsldm relocation. */
143#define O_gotdtprel O_md18 /* !gotdtprel relocation. */
144#define O_dtprelhi O_md19 /* !dtprelhi relocation. */
145#define O_dtprello O_md20 /* !dtprello relocation. */
146#define O_dtprel O_md21 /* !dtprel relocation. */
147#define O_gottprel O_md22 /* !gottprel relocation. */
148#define O_tprelhi O_md23 /* !tprelhi relocation. */
149#define O_tprello O_md24 /* !tprello relocation. */
150#define O_tprel O_md25 /* !tprel relocation. */
19f78583
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151
152#define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
153#define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
154#define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
155#define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
3765b1be
RH
156#define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
157#define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
04fe8f58 158#define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7)
19f78583 159
3765b1be 160#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
43b4c25e 161
11f45fb5 162/* Macros for extracting the type and number of encoded register tokens. */
252b5132
RH
163
164#define is_ir_num(x) (((x) & 32) == 0)
165#define is_fpr_num(x) (((x) & 32) != 0)
166#define regno(x) ((x) & 31)
167
11f45fb5 168/* Something odd inherited from the old assembler. */
252b5132
RH
169
170#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
171#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
172
173/* Predicates for 16- and 32-bit ranges */
174/* XXX: The non-shift version appears to trigger a compiler bug when
175 cross-assembling from x86 w/ gcc 2.7.2. */
176
177#if 1
178#define range_signed_16(x) \
bc805888 179 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
252b5132 180#define range_signed_32(x) \
bc805888 181 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
252b5132 182#else
32ff5c2e
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183#define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
184 (offsetT) (x) <= (offsetT) 0x7FFF)
185#define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
186 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
252b5132
RH
187#endif
188
189/* Macros for sign extending from 16- and 32-bits. */
190/* XXX: The cast macros will work on all the systems that I care about,
191 but really a predicate should be found to use the non-cast forms. */
192
193#if 1
bc805888
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194#define sign_extend_16(x) ((short) (x))
195#define sign_extend_32(x) ((int) (x))
252b5132 196#else
bc805888
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197#define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
198#define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
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RH
199 ^ 0x80000000) - 0x80000000)
200#endif
201
11f45fb5 202/* Macros to build tokens. */
252b5132 203
32ff5c2e 204#define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
252b5132
RH
205 (t).X_op = O_register, \
206 (t).X_add_number = (r))
32ff5c2e 207#define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
252b5132
RH
208 (t).X_op = O_pregister, \
209 (t).X_add_number = (r))
32ff5c2e 210#define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
252b5132
RH
211 (t).X_op = O_cpregister, \
212 (t).X_add_number = (r))
32ff5c2e 213#define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
252b5132 214 (t).X_op = O_register, \
66498417 215 (t).X_add_number = (r) + 32)
32ff5c2e 216#define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
252b5132
RH
217 (t).X_op = O_symbol, \
218 (t).X_add_symbol = (s), \
219 (t).X_add_number = (a))
32ff5c2e 220#define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
252b5132
RH
221 (t).X_op = O_constant, \
222 (t).X_add_number = (n))
252b5132 223\f
252b5132
RH
224/* Generic assembler global variables which must be defined by all
225 targets. */
226
227/* Characters which always start a comment. */
228const char comment_chars[] = "#";
229
230/* Characters which start a comment at the beginning of a line. */
231const char line_comment_chars[] = "#";
232
233/* Characters which may be used to separate multiple commands on a
234 single line. */
235const char line_separator_chars[] = ";";
236
237/* Characters which are used to indicate an exponent in a floating
238 point number. */
239const char EXP_CHARS[] = "eE";
240
241/* Characters which mean that a number is a floating point constant,
242 as in 0d1.0. */
252b5132
RH
243/* XXX: Do all of these really get used on the alpha?? */
244char FLT_CHARS[] = "rRsSfFdDxXpP";
252b5132
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245
246#ifdef OBJ_EVAX
247const char *md_shortopts = "Fm:g+1h:HG:";
248#else
249const char *md_shortopts = "Fm:gG:";
250#endif
251
11f45fb5
NC
252struct option md_longopts[] =
253 {
252b5132 254#define OPTION_32ADDR (OPTION_MD_BASE)
11f45fb5 255 { "32addr", no_argument, NULL, OPTION_32ADDR },
66498417 256#define OPTION_RELAX (OPTION_32ADDR + 1)
11f45fb5 257 { "relax", no_argument, NULL, OPTION_RELAX },
252b5132 258#ifdef OBJ_ELF
66498417
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259#define OPTION_MDEBUG (OPTION_RELAX + 1)
260#define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
11f45fb5
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261 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
262 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
198f1251
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263#endif
264#ifdef OBJ_EVAX
265#define OPTION_REPLACE (OPTION_RELAX + 1)
266#define OPTION_NOREPLACE (OPTION_REPLACE+1)
267 { "replace", no_argument, NULL, OPTION_REPLACE },
3739860c 268 { "noreplace", no_argument, NULL, OPTION_NOREPLACE },
252b5132 269#endif
11f45fb5
NC
270 { NULL, no_argument, NULL, 0 }
271 };
252b5132 272
bc805888 273size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
274\f
275#ifdef OBJ_EVAX
276#define AXP_REG_R0 0
277#define AXP_REG_R16 16
278#define AXP_REG_R17 17
279#undef AXP_REG_T9
280#define AXP_REG_T9 22
281#undef AXP_REG_T10
282#define AXP_REG_T10 23
283#undef AXP_REG_T11
284#define AXP_REG_T11 24
285#undef AXP_REG_T12
286#define AXP_REG_T12 25
287#define AXP_REG_AI 25
288#undef AXP_REG_FP
289#define AXP_REG_FP 29
290
291#undef AXP_REG_GP
292#define AXP_REG_GP AXP_REG_PV
198f1251 293
252b5132
RH
294#endif /* OBJ_EVAX */
295
11f45fb5 296/* The cpu for which we are generating code. */
252b5132
RH
297static unsigned alpha_target = AXP_OPCODE_BASE;
298static const char *alpha_target_name = "<all>";
299
11f45fb5 300/* The hash table of instruction opcodes. */
252b5132
RH
301static struct hash_control *alpha_opcode_hash;
302
11f45fb5 303/* The hash table of macro opcodes. */
252b5132
RH
304static struct hash_control *alpha_macro_hash;
305
306#ifdef OBJ_ECOFF
11f45fb5 307/* The $gp relocation symbol. */
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RH
308static symbolS *alpha_gp_symbol;
309
310/* XXX: what is this, and why is it exported? */
311valueT alpha_gp_value;
312#endif
313
11f45fb5 314/* The current $gp register. */
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RH
315static int alpha_gp_register = AXP_REG_GP;
316
11f45fb5 317/* A table of the register symbols. */
252b5132
RH
318static symbolS *alpha_register_table[64];
319
11f45fb5 320/* Constant sections, or sections of constants. */
252b5132
RH
321#ifdef OBJ_ECOFF
322static segT alpha_lita_section;
252b5132
RH
323#endif
324#ifdef OBJ_EVAX
198f1251 325segT alpha_link_section;
252b5132 326#endif
198f1251 327#ifndef OBJ_EVAX
252b5132 328static segT alpha_lit8_section;
198f1251 329#endif
252b5132 330
1dab94dd 331/* Symbols referring to said sections. */
252b5132
RH
332#ifdef OBJ_ECOFF
333static symbolS *alpha_lita_symbol;
252b5132
RH
334#endif
335#ifdef OBJ_EVAX
336static symbolS *alpha_link_symbol;
252b5132 337#endif
198f1251 338#ifndef OBJ_EVAX
252b5132 339static symbolS *alpha_lit8_symbol;
198f1251 340#endif
252b5132 341
11f45fb5 342/* Literal for .litX+0x8000 within .lita. */
252b5132 343#ifdef OBJ_ECOFF
252b5132
RH
344static offsetT alpha_lit8_literal;
345#endif
346
11f45fb5 347/* Is the assembler not allowed to use $at? */
252b5132
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348static int alpha_noat_on = 0;
349
11f45fb5 350/* Are macros enabled? */
252b5132
RH
351static int alpha_macros_on = 1;
352
11f45fb5 353/* Are floats disabled? */
252b5132
RH
354static int alpha_nofloats_on = 0;
355
11f45fb5 356/* Are addresses 32 bit? */
252b5132
RH
357static int alpha_addr32_on = 0;
358
359/* Symbol labelling the current insn. When the Alpha gas sees
360 foo:
361 .quad 0
362 and the section happens to not be on an eight byte boundary, it
363 will align both the symbol and the .quad to an eight byte boundary. */
364static symbolS *alpha_insn_label;
eb979bfb 365#if defined(OBJ_ELF) || defined (OBJ_EVAX)
198f1251 366static symbolS *alpha_prologue_label;
d9319cec 367#endif
198f1251
TG
368
369#ifdef OBJ_EVAX
370/* Symbol associate with the current jsr instruction. */
371static symbolS *alpha_linkage_symbol;
372#endif
252b5132
RH
373
374/* Whether we should automatically align data generation pseudo-ops.
375 .align 0 will turn this off. */
376static int alpha_auto_align_on = 1;
377
378/* The known current alignment of the current section. */
379static int alpha_current_align;
380
381/* These are exported to ECOFF code. */
382unsigned long alpha_gprmask, alpha_fprmask;
383
384/* Whether the debugging option was seen. */
385static int alpha_debug;
386
387#ifdef OBJ_ELF
388/* Whether we are emitting an mdebug section. */
a8316fe2 389int alpha_flag_mdebug = -1;
252b5132
RH
390#endif
391
198f1251
TG
392#ifdef OBJ_EVAX
393/* Whether to perform the VMS procedure call optimization. */
394int alpha_flag_replace = 1;
395#endif
396
252b5132
RH
397/* Don't fully resolve relocations, allowing code movement in the linker. */
398static int alpha_flag_relax;
399
400/* What value to give to bfd_set_gp_size. */
401static int g_switch_value = 8;
402
403#ifdef OBJ_EVAX
404/* Collect information about current procedure here. */
198f1251 405struct alpha_evax_procs
ea1562b3
NC
406{
407 symbolS *symbol; /* Proc pdesc symbol. */
252b5132 408 int pdsckind;
ea1562b3
NC
409 int framereg; /* Register for frame pointer. */
410 int framesize; /* Size of frame. */
252b5132
RH
411 int rsa_offset;
412 int ra_save;
413 int fp_save;
414 long imask;
415 long fmask;
416 int type;
417 int prologue;
198f1251
TG
418 symbolS *handler;
419 int handler_data;
420};
421
51794af8 422/* Linked list of .linkage fixups. */
198f1251
TG
423struct alpha_linkage_fixups *alpha_linkage_fixup_root;
424static struct alpha_linkage_fixups *alpha_linkage_fixup_tail;
425
51794af8 426/* Current procedure descriptor. */
198f1251 427static struct alpha_evax_procs *alpha_evax_proc;
4b1c4d2b 428static struct alpha_evax_procs alpha_evax_proc_data;
252b5132
RH
429
430static int alpha_flag_hash_long_names = 0; /* -+ */
431static int alpha_flag_show_after_trunc = 0; /* -H */
432
433/* If the -+ switch is given, then a hash is appended to any name that is
11f45fb5 434 longer than 64 characters, else longer symbol names are truncated. */
252b5132 435
43b4c25e
MM
436#endif
437\f
438#ifdef RELOC_OP_P
439/* A table to map the spelling of a relocation operand into an appropriate
440 bfd_reloc_code_real_type type. The table is assumed to be ordered such
441 that op-O_literal indexes into it. */
442
443#define ALPHA_RELOC_TABLE(op) \
19f78583 444(&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
43b4c25e 445 ? (abort (), 0) \
19f78583 446 : (int) (op) - (int) O_literal) ])
43b4c25e 447
ec8fcf4a
RH
448#define DEF(NAME, RELOC, REQ, ALLOW) \
449 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
43b4c25e 450
11f45fb5
NC
451static const struct alpha_reloc_op_tag
452{
ea1562b3
NC
453 const char *name; /* String to lookup. */
454 size_t length; /* Size of the string. */
455 operatorT op; /* Which operator to use. */
21d799b5 456 extended_bfd_reloc_code_real_type reloc;
ea1562b3
NC
457 unsigned int require_seq : 1; /* Require a sequence number. */
458 unsigned int allow_seq : 1; /* Allow a sequence number. */
11f45fb5
NC
459}
460alpha_reloc_op[] =
461{
ea1562b3
NC
462 DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
463 DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
464 DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
465 DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
466 DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
467 DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
468 DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
04fe8f58 469 DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1),
ea1562b3
NC
470 DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
471 DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
472 DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
473 DEF (gprel, BFD_RELOC_GPREL16, 0, 0),
474 DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
475 DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
476 DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
477 DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
478 DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
479 DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
480 DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
481 DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
482 DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
483 DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
484 DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
43b4c25e
MM
485};
486
19f78583
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487#undef DEF
488
43b4c25e 489static const int alpha_num_reloc_op
bc805888 490 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
19f78583 491#endif /* RELOC_OP_P */
43b4c25e 492
ea1562b3 493/* Maximum # digits needed to hold the largest sequence #. */
43b4c25e
MM
494#define ALPHA_RELOC_DIGITS 25
495
2d2255b5 496/* Structure to hold explicit sequence information. */
19f78583 497struct alpha_reloc_tag
43b4c25e 498{
ea1562b3 499 fixS *master; /* The literal reloc. */
198f1251 500#ifdef OBJ_EVAX
51794af8
TG
501 struct symbol *sym; /* Linkage section item symbol. */
502 struct symbol *psym; /* Pdesc symbol. */
198f1251 503#endif
ea1562b3
NC
504 fixS *slaves; /* Head of linked list of lituses. */
505 segT segment; /* Segment relocs are in or undefined_section. */
506 long sequence; /* Sequence #. */
507 unsigned n_master; /* # of literals. */
508 unsigned n_slaves; /* # of lituses. */
509 unsigned saw_tlsgd : 1; /* True if ... */
3765b1be
RH
510 unsigned saw_tlsldm : 1;
511 unsigned saw_lu_tlsgd : 1;
512 unsigned saw_lu_tlsldm : 1;
ea1562b3
NC
513 unsigned multi_section_p : 1; /* True if more than one section was used. */
514 char string[1]; /* Printable form of sequence to hash with. */
43b4c25e
MM
515};
516
ea1562b3 517/* Hash table to link up literals with the appropriate lituse. */
43b4c25e 518static struct hash_control *alpha_literal_hash;
19f78583
RH
519
520/* Sequence numbers for internal use by macros. */
521static long next_sequence_num = -1;
252b5132
RH
522\f
523/* A table of CPU names and opcode sets. */
524
11f45fb5
NC
525static const struct cpu_type
526{
252b5132
RH
527 const char *name;
528 unsigned flags;
11f45fb5
NC
529}
530cpu_types[] =
531{
252b5132 532 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
1dab94dd 533 This supports usage under DU 4.0b that does ".arch ev4", and
252b5132
RH
534 usage in MILO that does -m21064. Probably something more
535 specific like -m21064-pal should be used, but oh well. */
536
537 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
538 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
539 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
540 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
541 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
542 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
543 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
544 |AXP_OPCODE_MAX) },
545 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
546 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
dbac4f5b
RH
547 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
548 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
549 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
550 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
252b5132
RH
551
552 { "ev4", AXP_OPCODE_BASE },
553 { "ev45", AXP_OPCODE_BASE },
554 { "lca45", AXP_OPCODE_BASE },
555 { "ev5", AXP_OPCODE_BASE },
556 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
557 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
558 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
dbac4f5b
RH
559 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
560 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
252b5132
RH
561
562 { "all", AXP_OPCODE_BASE },
446a06c9 563 { 0, 0 }
252b5132
RH
564};
565
ea1562b3
NC
566/* Some instruction sets indexed by lg(size). */
567static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
568static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
569static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
570static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
571static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
572static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
573static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
574static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
575static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
252b5132 576
21d799b5 577static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type);
ea1562b3
NC
578static void emit_insn (struct alpha_insn *);
579static void assemble_tokens (const char *, const expressionS *, int, int);
198f1251
TG
580#ifdef OBJ_EVAX
581static char *s_alpha_section_name (void);
8aacb050 582static symbolS *add_to_link_pool (symbolS *, offsetT);
198f1251 583#endif
ea1562b3
NC
584\f
585static struct alpha_reloc_tag *
586get_alpha_reloc_tag (long sequence)
11f45fb5 587{
ea1562b3
NC
588 char buffer[ALPHA_RELOC_DIGITS];
589 struct alpha_reloc_tag *info;
252b5132 590
ea1562b3 591 sprintf (buffer, "!%ld", sequence);
252b5132 592
ea1562b3
NC
593 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
594 if (! info)
595 {
596 size_t len = strlen (buffer);
597 const char *errmsg;
252b5132 598
21d799b5
NC
599 info = (struct alpha_reloc_tag *)
600 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
252b5132 601
ea1562b3
NC
602 info->segment = now_seg;
603 info->sequence = sequence;
604 strcpy (info->string, buffer);
605 errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info);
606 if (errmsg)
20203fb9 607 as_fatal ("%s", errmsg);
198f1251
TG
608#ifdef OBJ_EVAX
609 info->sym = 0;
610 info->psym = 0;
611#endif
ea1562b3 612 }
252b5132 613
ea1562b3
NC
614 return info;
615}
252b5132 616
198f1251
TG
617#ifndef OBJ_EVAX
618
ea1562b3
NC
619static void
620alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED,
621 asection *sec,
622 void * ptr ATTRIBUTE_UNUSED)
623{
624 segment_info_type *seginfo = seg_info (sec);
625 fixS **prevP;
626 fixS *fixp;
627 fixS *next;
628 fixS *slave;
252b5132 629
ea1562b3
NC
630 /* If seginfo is NULL, we did not create this section; don't do
631 anything with it. By using a pointer to a pointer, we can update
632 the links in place. */
633 if (seginfo == NULL)
634 return;
252b5132 635
ea1562b3
NC
636 /* If there are no relocations, skip the section. */
637 if (! seginfo->fix_root)
638 return;
252b5132 639
ea1562b3
NC
640 /* First rebuild the fixup chain without the explicit lituse and
641 gpdisp_lo16 relocs. */
642 prevP = &seginfo->fix_root;
643 for (fixp = seginfo->fix_root; fixp; fixp = next)
644 {
645 next = fixp->fx_next;
646 fixp->fx_next = (fixS *) 0;
252b5132 647
ea1562b3
NC
648 switch (fixp->fx_r_type)
649 {
650 case BFD_RELOC_ALPHA_LITUSE:
651 if (fixp->tc_fix_data.info->n_master == 0)
652 as_bad_where (fixp->fx_file, fixp->fx_line,
653 _("No !literal!%ld was found"),
654 fixp->tc_fix_data.info->sequence);
655#ifdef RELOC_OP_P
656 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
657 {
658 if (! fixp->tc_fix_data.info->saw_tlsgd)
659 as_bad_where (fixp->fx_file, fixp->fx_line,
660 _("No !tlsgd!%ld was found"),
661 fixp->tc_fix_data.info->sequence);
662 }
663 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
664 {
665 if (! fixp->tc_fix_data.info->saw_tlsldm)
666 as_bad_where (fixp->fx_file, fixp->fx_line,
667 _("No !tlsldm!%ld was found"),
668 fixp->tc_fix_data.info->sequence);
669 }
670#endif
671 break;
252b5132 672
ea1562b3
NC
673 case BFD_RELOC_ALPHA_GPDISP_LO16:
674 if (fixp->tc_fix_data.info->n_master == 0)
675 as_bad_where (fixp->fx_file, fixp->fx_line,
676 _("No ldah !gpdisp!%ld was found"),
677 fixp->tc_fix_data.info->sequence);
678 break;
252b5132 679
ea1562b3
NC
680 case BFD_RELOC_ALPHA_ELF_LITERAL:
681 if (fixp->tc_fix_data.info
682 && (fixp->tc_fix_data.info->saw_tlsgd
683 || fixp->tc_fix_data.info->saw_tlsldm))
684 break;
685 /* FALLTHRU */
252b5132 686
ea1562b3
NC
687 default:
688 *prevP = fixp;
689 prevP = &fixp->fx_next;
690 break;
252b5132 691 }
252b5132
RH
692 }
693
ea1562b3
NC
694 /* Go back and re-chain dependent relocations. They are currently
695 linked through the next_reloc field in reverse order, so as we
696 go through the next_reloc chain, we effectively reverse the chain
697 once again.
252b5132 698
ea1562b3
NC
699 Except if there is more than one !literal for a given sequence
700 number. In that case, the programmer and/or compiler is not sure
701 how control flows from literal to lituse, and we can't be sure to
702 get the relaxation correct.
252b5132 703
ea1562b3
NC
704 ??? Well, actually we could, if there are enough lituses such that
705 we can make each literal have at least one of each lituse type
706 present. Not implemented.
252b5132 707
ea1562b3
NC
708 Also suppress the optimization if the !literals/!lituses are spread
709 in different segments. This can happen with "intersting" uses of
710 inline assembly; examples are present in the Linux kernel semaphores. */
11f45fb5 711
ea1562b3 712 for (fixp = seginfo->fix_root; fixp; fixp = next)
252b5132 713 {
ea1562b3
NC
714 next = fixp->fx_next;
715 switch (fixp->fx_r_type)
716 {
717 case BFD_RELOC_ALPHA_TLSGD:
718 case BFD_RELOC_ALPHA_TLSLDM:
719 if (!fixp->tc_fix_data.info)
720 break;
721 if (fixp->tc_fix_data.info->n_master == 0)
722 break;
723 else if (fixp->tc_fix_data.info->n_master > 1)
724 {
725 as_bad_where (fixp->fx_file, fixp->fx_line,
726 _("too many !literal!%ld for %s"),
727 fixp->tc_fix_data.info->sequence,
728 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
729 ? "!tlsgd" : "!tlsldm"));
730 break;
731 }
252b5132 732
ea1562b3
NC
733 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
734 fixp->fx_next = fixp->tc_fix_data.info->master;
735 fixp = fixp->fx_next;
736 /* Fall through. */
252b5132 737
ea1562b3
NC
738 case BFD_RELOC_ALPHA_ELF_LITERAL:
739 if (fixp->tc_fix_data.info
740 && fixp->tc_fix_data.info->n_master == 1
741 && ! fixp->tc_fix_data.info->multi_section_p)
742 {
743 for (slave = fixp->tc_fix_data.info->slaves;
744 slave != (fixS *) 0;
745 slave = slave->tc_fix_data.next_reloc)
746 {
747 slave->fx_next = fixp->fx_next;
748 fixp->fx_next = slave;
749 }
750 }
751 break;
252b5132 752
ea1562b3
NC
753 case BFD_RELOC_ALPHA_GPDISP_HI16:
754 if (fixp->tc_fix_data.info->n_slaves == 0)
755 as_bad_where (fixp->fx_file, fixp->fx_line,
756 _("No lda !gpdisp!%ld was found"),
757 fixp->tc_fix_data.info->sequence);
758 else
759 {
760 slave = fixp->tc_fix_data.info->slaves;
761 slave->fx_next = next;
762 fixp->fx_next = slave;
763 }
764 break;
252b5132 765
ea1562b3
NC
766 default:
767 break;
768 }
252b5132 769 }
252b5132
RH
770}
771
ea1562b3
NC
772/* Before the relocations are written, reorder them, so that user
773 supplied !lituse relocations follow the appropriate !literal
774 relocations, and similarly for !gpdisp relocations. */
252b5132
RH
775
776void
ea1562b3 777alpha_before_fix (void)
252b5132 778{
ea1562b3
NC
779 if (alpha_literal_hash)
780 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
252b5132 781}
198f1251
TG
782
783#endif
ea1562b3
NC
784\f
785#ifdef DEBUG_ALPHA
786static void
787debug_exp (expressionS tok[], int ntok)
252b5132 788{
ea1562b3 789 int i;
252b5132 790
ea1562b3
NC
791 fprintf (stderr, "debug_exp: %d tokens", ntok);
792 for (i = 0; i < ntok; i++)
252b5132 793 {
ea1562b3
NC
794 expressionS *t = &tok[i];
795 const char *name;
252b5132 796
ea1562b3
NC
797 switch (t->X_op)
798 {
799 default: name = "unknown"; break;
800 case O_illegal: name = "O_illegal"; break;
801 case O_absent: name = "O_absent"; break;
802 case O_constant: name = "O_constant"; break;
803 case O_symbol: name = "O_symbol"; break;
804 case O_symbol_rva: name = "O_symbol_rva"; break;
805 case O_register: name = "O_register"; break;
806 case O_big: name = "O_big"; break;
807 case O_uminus: name = "O_uminus"; break;
808 case O_bit_not: name = "O_bit_not"; break;
809 case O_logical_not: name = "O_logical_not"; break;
810 case O_multiply: name = "O_multiply"; break;
811 case O_divide: name = "O_divide"; break;
812 case O_modulus: name = "O_modulus"; break;
813 case O_left_shift: name = "O_left_shift"; break;
814 case O_right_shift: name = "O_right_shift"; break;
815 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
816 case O_bit_or_not: name = "O_bit_or_not"; break;
817 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
818 case O_bit_and: name = "O_bit_and"; break;
819 case O_add: name = "O_add"; break;
820 case O_subtract: name = "O_subtract"; break;
821 case O_eq: name = "O_eq"; break;
822 case O_ne: name = "O_ne"; break;
823 case O_lt: name = "O_lt"; break;
824 case O_le: name = "O_le"; break;
825 case O_ge: name = "O_ge"; break;
826 case O_gt: name = "O_gt"; break;
827 case O_logical_and: name = "O_logical_and"; break;
828 case O_logical_or: name = "O_logical_or"; break;
829 case O_index: name = "O_index"; break;
830 case O_pregister: name = "O_pregister"; break;
831 case O_cpregister: name = "O_cpregister"; break;
832 case O_literal: name = "O_literal"; break;
833 case O_lituse_addr: name = "O_lituse_addr"; break;
834 case O_lituse_base: name = "O_lituse_base"; break;
835 case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
836 case O_lituse_jsr: name = "O_lituse_jsr"; break;
837 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
838 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
04fe8f58 839 case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break;
ea1562b3
NC
840 case O_gpdisp: name = "O_gpdisp"; break;
841 case O_gprelhigh: name = "O_gprelhigh"; break;
842 case O_gprellow: name = "O_gprellow"; break;
843 case O_gprel: name = "O_gprel"; break;
844 case O_samegp: name = "O_samegp"; break;
845 case O_tlsgd: name = "O_tlsgd"; break;
846 case O_tlsldm: name = "O_tlsldm"; break;
847 case O_gotdtprel: name = "O_gotdtprel"; break;
848 case O_dtprelhi: name = "O_dtprelhi"; break;
849 case O_dtprello: name = "O_dtprello"; break;
850 case O_dtprel: name = "O_dtprel"; break;
851 case O_gottprel: name = "O_gottprel"; break;
852 case O_tprelhi: name = "O_tprelhi"; break;
853 case O_tprello: name = "O_tprello"; break;
854 case O_tprel: name = "O_tprel"; break;
855 }
252b5132 856
ea1562b3
NC
857 fprintf (stderr, ", %s(%s, %s, %d)", name,
858 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
859 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
860 (int) t->X_add_number);
252b5132 861 }
ea1562b3
NC
862 fprintf (stderr, "\n");
863 fflush (stderr);
252b5132 864}
ea1562b3 865#endif
252b5132 866
ea1562b3 867/* Parse the arguments to an opcode. */
252b5132 868
ea1562b3
NC
869static int
870tokenize_arguments (char *str,
871 expressionS tok[],
872 int ntok)
252b5132 873{
ea1562b3
NC
874 expressionS *end_tok = tok + ntok;
875 char *old_input_line_pointer;
876 int saw_comma = 0, saw_arg = 0;
877#ifdef DEBUG_ALPHA
878 expressionS *orig_tok = tok;
879#endif
880#ifdef RELOC_OP_P
881 char *p;
882 const struct alpha_reloc_op_tag *r;
883 int c, i;
884 size_t len;
885 int reloc_found_p = 0;
886#endif
252b5132 887
ea1562b3 888 memset (tok, 0, sizeof (*tok) * ntok);
252b5132 889
ea1562b3
NC
890 /* Save and restore input_line_pointer around this function. */
891 old_input_line_pointer = input_line_pointer;
892 input_line_pointer = str;
252b5132 893
ea1562b3
NC
894#ifdef RELOC_OP_P
895 /* ??? Wrest control of ! away from the regular expression parser. */
896 is_end_of_line[(unsigned char) '!'] = 1;
897#endif
252b5132 898
ea1562b3
NC
899 while (tok < end_tok && *input_line_pointer)
900 {
901 SKIP_WHITESPACE ();
902 switch (*input_line_pointer)
903 {
904 case '\0':
905 goto fini;
906
907#ifdef RELOC_OP_P
908 case '!':
909 /* A relocation operand can be placed after the normal operand on an
910 assembly language statement, and has the following form:
911 !relocation_type!sequence_number. */
912 if (reloc_found_p)
252b5132 913 {
ea1562b3
NC
914 /* Only support one relocation op per insn. */
915 as_bad (_("More than one relocation op per insn"));
916 goto err_report;
252b5132 917 }
252b5132 918
ea1562b3
NC
919 if (!saw_arg)
920 goto err;
252b5132 921
ea1562b3
NC
922 ++input_line_pointer;
923 SKIP_WHITESPACE ();
924 p = input_line_pointer;
925 c = get_symbol_end ();
252b5132 926
ea1562b3
NC
927 /* Parse !relocation_type. */
928 len = input_line_pointer - p;
929 if (len == 0)
930 {
931 as_bad (_("No relocation operand"));
932 goto err_report;
933 }
252b5132 934
ea1562b3
NC
935 r = &alpha_reloc_op[0];
936 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
937 if (len == r->length && memcmp (p, r->name, len) == 0)
938 break;
939 if (i < 0)
940 {
941 as_bad (_("Unknown relocation operand: !%s"), p);
942 goto err_report;
943 }
252b5132 944
ea1562b3
NC
945 *input_line_pointer = c;
946 SKIP_WHITESPACE ();
947 if (*input_line_pointer != '!')
948 {
949 if (r->require_seq)
950 {
951 as_bad (_("no sequence number after !%s"), p);
952 goto err_report;
953 }
252b5132 954
ea1562b3
NC
955 tok->X_add_number = 0;
956 }
957 else
958 {
959 if (! r->allow_seq)
960 {
961 as_bad (_("!%s does not use a sequence number"), p);
962 goto err_report;
963 }
252b5132 964
ea1562b3 965 input_line_pointer++;
252b5132 966
ea1562b3
NC
967 /* Parse !sequence_number. */
968 expression (tok);
969 if (tok->X_op != O_constant || tok->X_add_number <= 0)
970 {
971 as_bad (_("Bad sequence number: !%s!%s"),
972 r->name, input_line_pointer);
973 goto err_report;
974 }
975 }
252b5132 976
ea1562b3
NC
977 tok->X_op = r->op;
978 reloc_found_p = 1;
979 ++tok;
980 break;
981#endif /* RELOC_OP_P */
252b5132 982
ea1562b3
NC
983 case ',':
984 ++input_line_pointer;
985 if (saw_comma || !saw_arg)
986 goto err;
987 saw_comma = 1;
988 break;
252b5132 989
ea1562b3
NC
990 case '(':
991 {
992 char *hold = input_line_pointer++;
252b5132 993
ea1562b3
NC
994 /* First try for parenthesized register ... */
995 expression (tok);
996 if (*input_line_pointer == ')' && tok->X_op == O_register)
997 {
998 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
999 saw_comma = 0;
1000 saw_arg = 1;
1001 ++input_line_pointer;
1002 ++tok;
1003 break;
1004 }
252b5132 1005
ea1562b3
NC
1006 /* ... then fall through to plain expression. */
1007 input_line_pointer = hold;
1008 }
252b5132 1009
ea1562b3
NC
1010 default:
1011 if (saw_arg && !saw_comma)
1012 goto err;
252b5132 1013
ea1562b3
NC
1014 expression (tok);
1015 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1016 goto err;
252b5132 1017
ea1562b3
NC
1018 saw_comma = 0;
1019 saw_arg = 1;
1020 ++tok;
1021 break;
1022 }
1023 }
252b5132 1024
ea1562b3
NC
1025fini:
1026 if (saw_comma)
1027 goto err;
1028 input_line_pointer = old_input_line_pointer;
252b5132 1029
ea1562b3
NC
1030#ifdef DEBUG_ALPHA
1031 debug_exp (orig_tok, ntok - (end_tok - tok));
252b5132 1032#endif
ea1562b3
NC
1033#ifdef RELOC_OP_P
1034 is_end_of_line[(unsigned char) '!'] = 0;
252b5132 1035#endif
252b5132 1036
ea1562b3 1037 return ntok - (end_tok - tok);
00f7efb6 1038
ea1562b3
NC
1039err:
1040#ifdef RELOC_OP_P
1041 is_end_of_line[(unsigned char) '!'] = 0;
543833df 1042#endif
ea1562b3
NC
1043 input_line_pointer = old_input_line_pointer;
1044 return TOKENIZE_ERROR;
543833df 1045
ea1562b3
NC
1046#ifdef RELOC_OP_P
1047err_report:
1048 is_end_of_line[(unsigned char) '!'] = 0;
252b5132 1049#endif
ea1562b3
NC
1050 input_line_pointer = old_input_line_pointer;
1051 return TOKENIZE_ERROR_REPORT;
1052}
252b5132 1053
ea1562b3
NC
1054/* Search forward through all variants of an opcode looking for a
1055 syntax match. */
252b5132 1056
ea1562b3
NC
1057static const struct alpha_opcode *
1058find_opcode_match (const struct alpha_opcode *first_opcode,
1059 const expressionS *tok,
1060 int *pntok,
1061 int *pcpumatch)
1062{
1063 const struct alpha_opcode *opcode = first_opcode;
1064 int ntok = *pntok;
1065 int got_cpu_match = 0;
252b5132 1066
ea1562b3 1067 do
252b5132 1068 {
ea1562b3
NC
1069 const unsigned char *opidx;
1070 int tokidx = 0;
252b5132 1071
ea1562b3
NC
1072 /* Don't match opcodes that don't exist on this architecture. */
1073 if (!(opcode->flags & alpha_target))
1074 goto match_failed;
252b5132 1075
ea1562b3 1076 got_cpu_match = 1;
252b5132 1077
ea1562b3 1078 for (opidx = opcode->operands; *opidx; ++opidx)
252b5132 1079 {
ea1562b3 1080 const struct alpha_operand *operand = &alpha_operands[*opidx];
252b5132 1081
ea1562b3
NC
1082 /* Only take input from real operands. */
1083 if (operand->flags & AXP_OPERAND_FAKE)
1084 continue;
252b5132 1085
ea1562b3
NC
1086 /* When we expect input, make sure we have it. */
1087 if (tokidx >= ntok)
252b5132 1088 {
ea1562b3
NC
1089 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
1090 goto match_failed;
1091 continue;
252b5132 1092 }
252b5132 1093
ea1562b3
NC
1094 /* Match operand type with expression type. */
1095 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
252b5132 1096 {
ea1562b3
NC
1097 case AXP_OPERAND_IR:
1098 if (tok[tokidx].X_op != O_register
1099 || !is_ir_num (tok[tokidx].X_add_number))
1100 goto match_failed;
1101 break;
1102 case AXP_OPERAND_FPR:
1103 if (tok[tokidx].X_op != O_register
1104 || !is_fpr_num (tok[tokidx].X_add_number))
1105 goto match_failed;
1106 break;
1107 case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
1108 if (tok[tokidx].X_op != O_pregister
1109 || !is_ir_num (tok[tokidx].X_add_number))
1110 goto match_failed;
1111 break;
1112 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
1113 if (tok[tokidx].X_op != O_cpregister
1114 || !is_ir_num (tok[tokidx].X_add_number))
1115 goto match_failed;
1116 break;
252b5132 1117
ea1562b3
NC
1118 case AXP_OPERAND_RELATIVE:
1119 case AXP_OPERAND_SIGNED:
1120 case AXP_OPERAND_UNSIGNED:
1121 switch (tok[tokidx].X_op)
1122 {
1123 case O_illegal:
1124 case O_absent:
1125 case O_register:
1126 case O_pregister:
1127 case O_cpregister:
1128 goto match_failed;
252b5132 1129
ea1562b3
NC
1130 default:
1131 break;
1132 }
1133 break;
1134
1135 default:
1136 /* Everything else should have been fake. */
1137 abort ();
1138 }
1139 ++tokidx;
252b5132 1140 }
ea1562b3
NC
1141
1142 /* Possible match -- did we use all of our input? */
1143 if (tokidx == ntok)
1144 {
1145 *pntok = ntok;
1146 return opcode;
1147 }
1148
1149 match_failed:;
252b5132 1150 }
ea1562b3
NC
1151 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
1152 && !strcmp (opcode->name, first_opcode->name));
252b5132 1153
ea1562b3
NC
1154 if (*pcpumatch)
1155 *pcpumatch = got_cpu_match;
252b5132 1156
ea1562b3 1157 return NULL;
252b5132 1158}
252b5132 1159
ea1562b3
NC
1160/* Given an opcode name and a pre-tokenized set of arguments, assemble
1161 the insn, but do not emit it.
252b5132 1162
ea1562b3
NC
1163 Note that this implies no macros allowed, since we can't store more
1164 than one insn in an insn structure. */
1165
1166static void
1167assemble_tokens_to_insn (const char *opname,
1168 const expressionS *tok,
1169 int ntok,
1170 struct alpha_insn *insn)
252b5132 1171{
ea1562b3
NC
1172 const struct alpha_opcode *opcode;
1173
1174 /* Search opcodes. */
1175 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
1176 if (opcode)
1177 {
1178 int cpumatch;
1179 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
1180 if (opcode)
1181 {
1182 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
1183 return;
1184 }
1185 else if (cpumatch)
1186 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
1187 else
1188 as_bad (_("opcode `%s' not supported for target %s"), opname,
1189 alpha_target_name);
1190 }
1191 else
1192 as_bad (_("unknown opcode `%s'"), opname);
252b5132
RH
1193}
1194
ea1562b3
NC
1195/* Build a BFD section with its flags set appropriately for the .lita,
1196 .lit8, or .lit4 sections. */
252b5132 1197
ea1562b3
NC
1198static void
1199create_literal_section (const char *name,
1200 segT *secp,
1201 symbolS **symp)
252b5132 1202{
ea1562b3
NC
1203 segT current_section = now_seg;
1204 int current_subsec = now_subseg;
1205 segT new_sec;
252b5132 1206
ea1562b3
NC
1207 *secp = new_sec = subseg_new (name, 0);
1208 subseg_set (current_section, current_subsec);
1209 bfd_set_section_alignment (stdoutput, new_sec, 4);
1210 bfd_set_section_flags (stdoutput, new_sec,
1211 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
1212 | SEC_DATA);
a161fe53 1213
ea1562b3 1214 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
252b5132
RH
1215}
1216
ea1562b3 1217/* Load a (partial) expression into a target register.
252b5132 1218
ea1562b3
NC
1219 If poffset is not null, after the call it will either contain
1220 O_constant 0, or a 16-bit offset appropriate for any MEM format
1221 instruction. In addition, pbasereg will be modified to point to
1222 the base register to use in that MEM format instruction.
252b5132 1223
ea1562b3
NC
1224 In any case, *pbasereg should contain a base register to add to the
1225 expression. This will normally be either AXP_REG_ZERO or
1226 alpha_gp_register. Symbol addresses will always be loaded via $gp,
1227 so "foo($0)" is interpreted as adding the address of foo to $0;
1228 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
1229 but this is what OSF/1 does.
252b5132 1230
ea1562b3
NC
1231 If explicit relocations of the form !literal!<number> are allowed,
1232 and used, then explicit_reloc with be an expression pointer.
252b5132 1233
ea1562b3
NC
1234 Finally, the return value is nonzero if the calling macro may emit
1235 a LITUSE reloc if otherwise appropriate; the return value is the
1236 sequence number to use. */
252b5132 1237
ea1562b3
NC
1238static long
1239load_expression (int targreg,
1240 const expressionS *exp,
1241 int *pbasereg,
198f1251
TG
1242 expressionS *poffset,
1243 const char *opname)
ea1562b3
NC
1244{
1245 long emit_lituse = 0;
1246 offsetT addend = exp->X_add_number;
1247 int basereg = *pbasereg;
1248 struct alpha_insn insn;
1249 expressionS newtok[3];
3765b1be 1250
ea1562b3
NC
1251 switch (exp->X_op)
1252 {
1253 case O_symbol:
66ba4c77 1254 {
ea1562b3
NC
1255#ifdef OBJ_ECOFF
1256 offsetT lit;
66ba4c77 1257
ea1562b3
NC
1258 /* Attempt to reduce .lit load by splitting the offset from
1259 its symbol when possible, but don't create a situation in
1260 which we'd fail. */
1261 if (!range_signed_32 (addend) &&
1262 (alpha_noat_on || targreg == AXP_REG_AT))
66ba4c77 1263 {
ea1562b3
NC
1264 lit = add_to_literal_pool (exp->X_add_symbol, addend,
1265 alpha_lita_section, 8);
1266 addend = 0;
66ba4c77 1267 }
ea1562b3
NC
1268 else
1269 lit = add_to_literal_pool (exp->X_add_symbol, 0,
1270 alpha_lita_section, 8);
252b5132 1271
ea1562b3
NC
1272 if (lit >= 0x8000)
1273 as_fatal (_("overflow in literal (.lita) table"));
252b5132 1274
ea1562b3 1275 /* Emit "ldq r, lit(gp)". */
252b5132 1276
ea1562b3
NC
1277 if (basereg != alpha_gp_register && targreg == basereg)
1278 {
1279 if (alpha_noat_on)
1280 as_bad (_("macro requires $at register while noat in effect"));
1281 if (targreg == AXP_REG_AT)
1282 as_bad (_("macro requires $at while $at in use"));
252b5132 1283
ea1562b3
NC
1284 set_tok_reg (newtok[0], AXP_REG_AT);
1285 }
1286 else
1287 set_tok_reg (newtok[0], targreg);
252b5132 1288
ea1562b3
NC
1289 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
1290 set_tok_preg (newtok[2], alpha_gp_register);
252b5132 1291
ea1562b3 1292 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
252b5132 1293
9c2799c2 1294 gas_assert (insn.nfixups == 1);
ea1562b3
NC
1295 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
1296 insn.sequence = emit_lituse = next_sequence_num--;
1297#endif /* OBJ_ECOFF */
252b5132 1298#ifdef OBJ_ELF
ea1562b3 1299 /* Emit "ldq r, gotoff(gp)". */
252b5132 1300
ea1562b3
NC
1301 if (basereg != alpha_gp_register && targreg == basereg)
1302 {
1303 if (alpha_noat_on)
1304 as_bad (_("macro requires $at register while noat in effect"));
1305 if (targreg == AXP_REG_AT)
1306 as_bad (_("macro requires $at while $at in use"));
252b5132 1307
ea1562b3
NC
1308 set_tok_reg (newtok[0], AXP_REG_AT);
1309 }
1310 else
1311 set_tok_reg (newtok[0], targreg);
252b5132 1312
ea1562b3
NC
1313 /* XXX: Disable this .got minimizing optimization so that we can get
1314 better instruction offset knowledge in the compiler. This happens
1315 very infrequently anyway. */
1316 if (1
1317 || (!range_signed_32 (addend)
1318 && (alpha_noat_on || targreg == AXP_REG_AT)))
1319 {
1320 newtok[1] = *exp;
1321 addend = 0;
1322 }
1323 else
1324 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
252b5132 1325
ea1562b3 1326 set_tok_preg (newtok[2], alpha_gp_register);
252b5132 1327
ea1562b3 1328 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
252b5132 1329
9c2799c2 1330 gas_assert (insn.nfixups == 1);
ea1562b3
NC
1331 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
1332 insn.sequence = emit_lituse = next_sequence_num--;
1333#endif /* OBJ_ELF */
1334#ifdef OBJ_EVAX
ea1562b3 1335 /* Find symbol or symbol pointer in link section. */
252b5132 1336
198f1251 1337 if (exp->X_add_symbol == alpha_evax_proc->symbol)
ea1562b3 1338 {
51794af8
TG
1339 /* Linkage-relative expression. */
1340 set_tok_reg (newtok[0], targreg);
1341
ea1562b3
NC
1342 if (range_signed_16 (addend))
1343 {
ea1562b3 1344 set_tok_const (newtok[1], addend);
ea1562b3
NC
1345 addend = 0;
1346 }
1347 else
1348 {
ea1562b3 1349 set_tok_const (newtok[1], 0);
ea1562b3 1350 }
51794af8
TG
1351 set_tok_preg (newtok[2], basereg);
1352 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
ea1562b3
NC
1353 }
1354 else
1355 {
198f1251
TG
1356 const char *symname = S_GET_NAME (exp->X_add_symbol);
1357 const char *ptr1, *ptr2;
1358 int symlen = strlen (symname);
1359
1360 if ((symlen > 4 &&
1361 strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0))
ea1562b3 1362 {
51794af8
TG
1363 /* Access to an item whose address is stored in the linkage
1364 section. Just read the address. */
198f1251
TG
1365 set_tok_reg (newtok[0], targreg);
1366
1367 newtok[1] = *exp;
1368 newtok[1].X_op = O_subtract;
1369 newtok[1].X_op_symbol = alpha_evax_proc->symbol;
1370
1371 set_tok_preg (newtok[2], basereg);
1372 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1373 alpha_linkage_symbol = exp->X_add_symbol;
1374
1375 if (poffset)
1376 set_tok_const (*poffset, 0);
1377
1378 if (alpha_flag_replace && targreg == 26)
1379 {
51794af8 1380 /* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */
198f1251
TG
1381 char *ensymname;
1382 symbolS *ensym;
198f1251 1383
51794af8 1384 /* Build the entry name as 'NAME..en'. */
198f1251
TG
1385 ptr1 = strstr (symname, "..") + 2;
1386 if (ptr1 > ptr2)
1387 ptr1 = symname;
e1f4d6bd 1388 ensymname = (char *) alloca (ptr2 - ptr1 + 5);
198f1251
TG
1389 memcpy (ensymname, ptr1, ptr2 - ptr1);
1390 memcpy (ensymname + (ptr2 - ptr1), "..en", 5);
1391
9c2799c2 1392 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS);
198f1251
TG
1393 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP;
1394 ensym = symbol_find_or_make (ensymname);
f8e24652 1395 symbol_mark_used (ensym);
198f1251
TG
1396 /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH
1397 case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker
1398 Utility Manual. */
1399 insn.fixups[insn.nfixups].exp.X_op = O_symbol;
1400 insn.fixups[insn.nfixups].exp.X_add_symbol = ensym;
1401 insn.fixups[insn.nfixups].exp.X_add_number = 0;
1402 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol;
1403 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol;
1404 insn.nfixups++;
1405
1406 /* ??? Force bsym to be instantiated now, as it will be
1407 too late to do so in tc_gen_reloc. */
87975d2a 1408 symbol_get_bfdsym (exp->X_add_symbol);
198f1251
TG
1409 }
1410 else if (alpha_flag_replace && targreg == 27)
1411 {
51794af8 1412 /* Add a lda fixup for 'ldX $27,YYY.NAME..lk+8'. */
198f1251
TG
1413 char *psymname;
1414 symbolS *psym;
1415
51794af8 1416 /* Extract NAME. */
198f1251
TG
1417 ptr1 = strstr (symname, "..") + 2;
1418 if (ptr1 > ptr2)
1419 ptr1 = symname;
e1f4d6bd 1420 psymname = (char *) alloca (ptr2 - ptr1 + 1);
198f1251
TG
1421 memcpy (psymname, ptr1, ptr2 - ptr1);
1422 psymname [ptr2 - ptr1] = 0;
51794af8 1423
9c2799c2 1424 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS);
198f1251
TG
1425 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA;
1426 psym = symbol_find_or_make (psymname);
f8e24652 1427 symbol_mark_used (psym);
198f1251
TG
1428 insn.fixups[insn.nfixups].exp.X_op = O_subtract;
1429 insn.fixups[insn.nfixups].exp.X_add_symbol = psym;
1430 insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol;
1431 insn.fixups[insn.nfixups].exp.X_add_number = 0;
1432 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol;
1433 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol;
1434 insn.nfixups++;
1435 }
1436
51794af8 1437 emit_insn (&insn);
198f1251 1438 return 0;
ea1562b3
NC
1439 }
1440 else
198f1251 1441 {
51794af8
TG
1442 /* Not in the linkage section. Put the value into the linkage
1443 section. */
198f1251 1444 symbolS *linkexp;
252b5132 1445
198f1251
TG
1446 if (!range_signed_32 (addend))
1447 addend = sign_extend_32 (addend);
8aacb050 1448 linkexp = add_to_link_pool (exp->X_add_symbol, 0);
198f1251
TG
1449 set_tok_reg (newtok[0], targreg);
1450 set_tok_sym (newtok[1], linkexp, 0);
1451 set_tok_preg (newtok[2], basereg);
1452 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1453 }
ea1562b3
NC
1454 }
1455#endif /* OBJ_EVAX */
252b5132 1456
ea1562b3 1457 emit_insn (&insn);
19f78583 1458
ea1562b3
NC
1459#ifndef OBJ_EVAX
1460 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
1461 {
1462 /* Emit "addq r, base, r". */
19f78583 1463
ea1562b3
NC
1464 set_tok_reg (newtok[1], basereg);
1465 set_tok_reg (newtok[2], targreg);
1466 assemble_tokens ("addq", newtok, 3, 0);
1467 }
1468#endif
1469 basereg = targreg;
1470 }
1471 break;
19f78583 1472
ea1562b3
NC
1473 case O_constant:
1474 break;
19f78583 1475
ea1562b3
NC
1476 case O_subtract:
1477 /* Assume that this difference expression will be resolved to an
1478 absolute value and that that value will fit in 16 bits. */
19f78583 1479
ea1562b3
NC
1480 set_tok_reg (newtok[0], targreg);
1481 newtok[1] = *exp;
1482 set_tok_preg (newtok[2], basereg);
198f1251 1483 assemble_tokens (opname, newtok, 3, 0);
43b4c25e 1484
ea1562b3
NC
1485 if (poffset)
1486 set_tok_const (*poffset, 0);
1487 return 0;
43b4c25e 1488
ea1562b3
NC
1489 case O_big:
1490 if (exp->X_add_number > 0)
1491 as_bad (_("bignum invalid; zero assumed"));
1492 else
1493 as_bad (_("floating point number invalid; zero assumed"));
1494 addend = 0;
1495 break;
43b4c25e 1496
ea1562b3
NC
1497 default:
1498 as_bad (_("can't handle expression"));
1499 addend = 0;
1500 break;
1501 }
43b4c25e 1502
ea1562b3 1503 if (!range_signed_32 (addend))
43b4c25e 1504 {
198f1251
TG
1505#ifdef OBJ_EVAX
1506 symbolS *litexp;
1507#else
ea1562b3
NC
1508 offsetT lit;
1509 long seq_num = next_sequence_num--;
198f1251 1510#endif
43b4c25e 1511
ea1562b3
NC
1512 /* For 64-bit addends, just put it in the literal pool. */
1513#ifdef OBJ_EVAX
1514 /* Emit "ldq targreg, lit(basereg)". */
8aacb050 1515 litexp = add_to_link_pool (section_symbol (absolute_section), addend);
ea1562b3 1516 set_tok_reg (newtok[0], targreg);
198f1251 1517 set_tok_sym (newtok[1], litexp, 0);
ea1562b3
NC
1518 set_tok_preg (newtok[2], alpha_gp_register);
1519 assemble_tokens ("ldq", newtok, 3, 0);
1520#else
1521
1522 if (alpha_lit8_section == NULL)
43b4c25e 1523 {
ea1562b3
NC
1524 create_literal_section (".lit8",
1525 &alpha_lit8_section,
1526 &alpha_lit8_symbol);
1527
1528#ifdef OBJ_ECOFF
1529 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
1530 alpha_lita_section, 8);
1531 if (alpha_lit8_literal >= 0x8000)
1532 as_fatal (_("overflow in literal (.lita) table"));
11f45fb5 1533#endif
ea1562b3 1534 }
43b4c25e 1535
ea1562b3
NC
1536 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
1537 if (lit >= 0x8000)
1538 as_fatal (_("overflow in literal (.lit8) table"));
19f78583 1539
ea1562b3 1540 /* Emit "lda litreg, .lit8+0x8000". */
3765b1be 1541
ea1562b3
NC
1542 if (targreg == basereg)
1543 {
1544 if (alpha_noat_on)
1545 as_bad (_("macro requires $at register while noat in effect"));
1546 if (targreg == AXP_REG_AT)
1547 as_bad (_("macro requires $at while $at in use"));
1548
1549 set_tok_reg (newtok[0], AXP_REG_AT);
43b4c25e 1550 }
ea1562b3
NC
1551 else
1552 set_tok_reg (newtok[0], targreg);
1553#ifdef OBJ_ECOFF
1554 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
1555#endif
1556#ifdef OBJ_ELF
1557 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
1558#endif
1559 set_tok_preg (newtok[2], alpha_gp_register);
43b4c25e 1560
ea1562b3 1561 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
19f78583 1562
9c2799c2 1563 gas_assert (insn.nfixups == 1);
ea1562b3
NC
1564#ifdef OBJ_ECOFF
1565 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
1566#endif
1567#ifdef OBJ_ELF
1568 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
1569#endif
1570 insn.sequence = seq_num;
19f78583 1571
ea1562b3 1572 emit_insn (&insn);
19f78583 1573
ea1562b3 1574 /* Emit "ldq litreg, lit(litreg)". */
19f78583 1575
ea1562b3
NC
1576 set_tok_const (newtok[1], lit);
1577 set_tok_preg (newtok[2], newtok[0].X_add_number);
1578
1579 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
1580
9c2799c2 1581 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
1582 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
1583 insn.fixups[insn.nfixups].exp.X_op = O_absent;
1584 insn.nfixups++;
1585 insn.sequence = seq_num;
1586 emit_lituse = 0;
1587
1588 emit_insn (&insn);
1589
1590 /* Emit "addq litreg, base, target". */
1591
1592 if (basereg != AXP_REG_ZERO)
1593 {
1594 set_tok_reg (newtok[1], basereg);
1595 set_tok_reg (newtok[2], targreg);
1596 assemble_tokens ("addq", newtok, 3, 0);
1597 }
1598#endif /* !OBJ_EVAX */
1599
1600 if (poffset)
1601 set_tok_const (*poffset, 0);
1602 *pbasereg = targreg;
1603 }
1604 else
43b4c25e 1605 {
ea1562b3
NC
1606 offsetT low, high, extra, tmp;
1607
1608 /* For 32-bit operands, break up the addend. */
1609
1610 low = sign_extend_16 (addend);
1611 tmp = addend - low;
1612 high = sign_extend_16 (tmp >> 16);
1613
1614 if (tmp - (high << 16))
43b4c25e 1615 {
ea1562b3
NC
1616 extra = 0x4000;
1617 tmp -= 0x40000000;
1618 high = sign_extend_16 (tmp >> 16);
1619 }
1620 else
1621 extra = 0;
3765b1be 1622
ea1562b3
NC
1623 set_tok_reg (newtok[0], targreg);
1624 set_tok_preg (newtok[2], basereg);
3765b1be 1625
ea1562b3
NC
1626 if (extra)
1627 {
1628 /* Emit "ldah r, extra(r). */
1629 set_tok_const (newtok[1], extra);
1630 assemble_tokens ("ldah", newtok, 3, 0);
1631 set_tok_preg (newtok[2], basereg = targreg);
1632 }
43b4c25e 1633
ea1562b3
NC
1634 if (high)
1635 {
1636 /* Emit "ldah r, high(r). */
1637 set_tok_const (newtok[1], high);
1638 assemble_tokens ("ldah", newtok, 3, 0);
1639 basereg = targreg;
1640 set_tok_preg (newtok[2], basereg);
1641 }
19f78583 1642
ea1562b3
NC
1643 if ((low && !poffset) || (!poffset && basereg != targreg))
1644 {
1645 /* Emit "lda r, low(base)". */
1646 set_tok_const (newtok[1], low);
1647 assemble_tokens ("lda", newtok, 3, 0);
1648 basereg = targreg;
1649 low = 0;
43b4c25e 1650 }
ea1562b3
NC
1651
1652 if (poffset)
1653 set_tok_const (*poffset, low);
1654 *pbasereg = basereg;
43b4c25e 1655 }
ea1562b3
NC
1656
1657 return emit_lituse;
43b4c25e 1658}
43b4c25e 1659
ea1562b3
NC
1660/* The lda macro differs from the lda instruction in that it handles
1661 most simple expressions, particularly symbol address loads and
1662 large constants. */
11f45fb5 1663
ea1562b3
NC
1664static void
1665emit_lda (const expressionS *tok,
1666 int ntok,
1667 const void * unused ATTRIBUTE_UNUSED)
1668{
1669 int basereg;
43b4c25e 1670
ea1562b3
NC
1671 if (ntok == 2)
1672 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
1673 else
1674 basereg = tok[2].X_add_number;
1675
198f1251 1676 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda");
43b4c25e 1677}
43b4c25e 1678
ea1562b3
NC
1679/* The ldah macro differs from the ldah instruction in that it has $31
1680 as an implied base register. */
252b5132 1681
ea1562b3
NC
1682static void
1683emit_ldah (const expressionS *tok,
1684 int ntok ATTRIBUTE_UNUSED,
1685 const void * unused ATTRIBUTE_UNUSED)
252b5132 1686{
ea1562b3 1687 expressionS newtok[3];
252b5132 1688
ea1562b3
NC
1689 newtok[0] = tok[0];
1690 newtok[1] = tok[1];
1691 set_tok_preg (newtok[2], AXP_REG_ZERO);
252b5132 1692
ea1562b3
NC
1693 assemble_tokens ("ldah", newtok, 3, 0);
1694}
19f78583 1695
ea1562b3
NC
1696/* Called internally to handle all alignment needs. This takes care
1697 of eliding calls to frag_align if'n the cached current alignment
1698 says we've already got it, as well as taking care of the auto-align
1699 feature wrt labels. */
252b5132 1700
ea1562b3
NC
1701static void
1702alpha_align (int n,
1703 char *pfill,
1704 symbolS *label,
1705 int force ATTRIBUTE_UNUSED)
1706{
1707 if (alpha_current_align >= n)
1708 return;
43b4c25e 1709
ea1562b3
NC
1710 if (pfill == NULL)
1711 {
1712 if (subseg_text_p (now_seg))
1713 frag_align_code (n, 0);
1714 else
1715 frag_align (n, 0, 0);
1716 }
1717 else
1718 frag_align (n, *pfill, 0);
43b4c25e 1719
ea1562b3 1720 alpha_current_align = n;
43b4c25e 1721
ea1562b3
NC
1722 if (label != NULL && S_GET_SEGMENT (label) == now_seg)
1723 {
1724 symbol_set_frag (label, frag_now);
1725 S_SET_VALUE (label, (valueT) frag_now_fix ());
1726 }
43b4c25e 1727
ea1562b3 1728 record_alignment (now_seg, n);
43b4c25e 1729
ea1562b3
NC
1730 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
1731 in a reloc for the linker to see. */
1732}
19f78583 1733
ea1562b3 1734/* Actually output an instruction with its fixup. */
19f78583 1735
ea1562b3
NC
1736static void
1737emit_insn (struct alpha_insn *insn)
1738{
1739 char *f;
1740 int i;
43b4c25e 1741
ea1562b3
NC
1742 /* Take care of alignment duties. */
1743 if (alpha_auto_align_on && alpha_current_align < 2)
1744 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
1745 if (alpha_current_align > 2)
1746 alpha_current_align = 2;
1747 alpha_insn_label = NULL;
43b4c25e 1748
ea1562b3
NC
1749 /* Write out the instruction. */
1750 f = frag_more (4);
1751 md_number_to_chars (f, insn->insn, 4);
43b4c25e 1752
ea1562b3
NC
1753#ifdef OBJ_ELF
1754 dwarf2_emit_insn (4);
1755#endif
252b5132 1756
ea1562b3
NC
1757 /* Apply the fixups in order. */
1758 for (i = 0; i < insn->nfixups; ++i)
1759 {
1760 const struct alpha_operand *operand = (const struct alpha_operand *) 0;
1761 struct alpha_fixup *fixup = &insn->fixups[i];
1762 struct alpha_reloc_tag *info = NULL;
1763 int size, pcrel;
1764 fixS *fixP;
252b5132 1765
ea1562b3
NC
1766 /* Some fixups are only used internally and so have no howto. */
1767 if ((int) fixup->reloc < 0)
1768 {
1769 operand = &alpha_operands[-(int) fixup->reloc];
1770 size = 4;
1771 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
1772 }
1773 else if (fixup->reloc > BFD_RELOC_UNUSED
1774 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
1775 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
1776 {
1777 size = 2;
1778 pcrel = 0;
1779 }
1780 else
1781 {
21d799b5
NC
1782 reloc_howto_type *reloc_howto =
1783 bfd_reloc_type_lookup (stdoutput,
1784 (bfd_reloc_code_real_type) fixup->reloc);
9c2799c2 1785 gas_assert (reloc_howto);
252b5132 1786
ea1562b3 1787 size = bfd_get_reloc_size (reloc_howto);
252b5132 1788
198f1251
TG
1789 switch (fixup->reloc)
1790 {
1791#ifdef OBJ_EVAX
1792 case BFD_RELOC_ALPHA_NOP:
1793 case BFD_RELOC_ALPHA_BSR:
1794 case BFD_RELOC_ALPHA_LDA:
1795 case BFD_RELOC_ALPHA_BOH:
1796 break;
1797#endif
1798 default:
9c2799c2 1799 gas_assert (size >= 1 && size <= 4);
198f1251 1800 }
3739860c 1801
ea1562b3
NC
1802 pcrel = reloc_howto->pc_relative;
1803 }
43b4c25e 1804
ea1562b3 1805 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
21d799b5 1806 &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc);
252b5132 1807
ea1562b3
NC
1808 /* Turn off complaints that the addend is too large for some fixups,
1809 and copy in the sequence number for the explicit relocations. */
1810 switch (fixup->reloc)
1811 {
1812 case BFD_RELOC_ALPHA_HINT:
1813 case BFD_RELOC_GPREL32:
1814 case BFD_RELOC_GPREL16:
1815 case BFD_RELOC_ALPHA_GPREL_HI16:
1816 case BFD_RELOC_ALPHA_GPREL_LO16:
1817 case BFD_RELOC_ALPHA_GOTDTPREL16:
1818 case BFD_RELOC_ALPHA_DTPREL_HI16:
1819 case BFD_RELOC_ALPHA_DTPREL_LO16:
1820 case BFD_RELOC_ALPHA_DTPREL16:
1821 case BFD_RELOC_ALPHA_GOTTPREL16:
1822 case BFD_RELOC_ALPHA_TPREL_HI16:
1823 case BFD_RELOC_ALPHA_TPREL_LO16:
1824 case BFD_RELOC_ALPHA_TPREL16:
1825 fixP->fx_no_overflow = 1;
252b5132 1826 break;
252b5132 1827
ea1562b3
NC
1828 case BFD_RELOC_ALPHA_GPDISP_HI16:
1829 fixP->fx_no_overflow = 1;
1830 fixP->fx_addsy = section_symbol (now_seg);
1831 fixP->fx_offset = 0;
43b4c25e 1832
ea1562b3
NC
1833 info = get_alpha_reloc_tag (insn->sequence);
1834 if (++info->n_master > 1)
1835 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
1836 if (info->segment != now_seg)
1837 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
1838 insn->sequence);
1839 fixP->tc_fix_data.info = info;
1840 break;
43b4c25e 1841
ea1562b3
NC
1842 case BFD_RELOC_ALPHA_GPDISP_LO16:
1843 fixP->fx_no_overflow = 1;
252b5132 1844
ea1562b3
NC
1845 info = get_alpha_reloc_tag (insn->sequence);
1846 if (++info->n_slaves > 1)
1847 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
1848 if (info->segment != now_seg)
1849 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
1850 insn->sequence);
1851 fixP->tc_fix_data.info = info;
1852 info->slaves = fixP;
1853 break;
1854
1855 case BFD_RELOC_ALPHA_LITERAL:
1856 case BFD_RELOC_ALPHA_ELF_LITERAL:
1857 fixP->fx_no_overflow = 1;
1858
1859 if (insn->sequence == 0)
1860 break;
1861 info = get_alpha_reloc_tag (insn->sequence);
1862 info->master = fixP;
1863 info->n_master++;
1864 if (info->segment != now_seg)
1865 info->multi_section_p = 1;
1866 fixP->tc_fix_data.info = info;
1867 break;
43b4c25e 1868
19f78583 1869#ifdef RELOC_OP_P
ea1562b3
NC
1870 case DUMMY_RELOC_LITUSE_ADDR:
1871 fixP->fx_offset = LITUSE_ALPHA_ADDR;
1872 goto do_lituse;
1873 case DUMMY_RELOC_LITUSE_BASE:
1874 fixP->fx_offset = LITUSE_ALPHA_BASE;
1875 goto do_lituse;
1876 case DUMMY_RELOC_LITUSE_BYTOFF:
1877 fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
1878 goto do_lituse;
1879 case DUMMY_RELOC_LITUSE_JSR:
1880 fixP->fx_offset = LITUSE_ALPHA_JSR;
1881 goto do_lituse;
1882 case DUMMY_RELOC_LITUSE_TLSGD:
1883 fixP->fx_offset = LITUSE_ALPHA_TLSGD;
1884 goto do_lituse;
1885 case DUMMY_RELOC_LITUSE_TLSLDM:
1886 fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
1887 goto do_lituse;
04fe8f58
RH
1888 case DUMMY_RELOC_LITUSE_JSRDIRECT:
1889 fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT;
1890 goto do_lituse;
ea1562b3
NC
1891 do_lituse:
1892 fixP->fx_addsy = section_symbol (now_seg);
1893 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
1894
1895 info = get_alpha_reloc_tag (insn->sequence);
1896 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
1897 info->saw_lu_tlsgd = 1;
1898 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
1899 info->saw_lu_tlsldm = 1;
1900 if (++info->n_slaves > 1)
1901 {
1902 if (info->saw_lu_tlsgd)
1903 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
1904 insn->sequence);
1905 else if (info->saw_lu_tlsldm)
1906 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
1907 insn->sequence);
1908 }
1909 fixP->tc_fix_data.info = info;
1910 fixP->tc_fix_data.next_reloc = info->slaves;
1911 info->slaves = fixP;
1912 if (info->segment != now_seg)
1913 info->multi_section_p = 1;
1914 break;
1915
1916 case BFD_RELOC_ALPHA_TLSGD:
1917 fixP->fx_no_overflow = 1;
1918
1919 if (insn->sequence == 0)
1920 break;
1921 info = get_alpha_reloc_tag (insn->sequence);
1922 if (info->saw_tlsgd)
1923 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
1924 else if (info->saw_tlsldm)
1925 as_bad (_("sequence number in use for !tlsldm!%ld"),
1926 insn->sequence);
1927 else
1928 info->saw_tlsgd = 1;
1929 fixP->tc_fix_data.info = info;
1930 break;
1931
1932 case BFD_RELOC_ALPHA_TLSLDM:
1933 fixP->fx_no_overflow = 1;
1934
1935 if (insn->sequence == 0)
1936 break;
1937 info = get_alpha_reloc_tag (insn->sequence);
1938 if (info->saw_tlsldm)
1939 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
1940 else if (info->saw_tlsgd)
1941 as_bad (_("sequence number in use for !tlsgd!%ld"),
1942 insn->sequence);
1943 else
1944 info->saw_tlsldm = 1;
1945 fixP->tc_fix_data.info = info;
1946 break;
19f78583 1947#endif
198f1251
TG
1948#ifdef OBJ_EVAX
1949 case BFD_RELOC_ALPHA_NOP:
1950 case BFD_RELOC_ALPHA_LDA:
1951 case BFD_RELOC_ALPHA_BSR:
1952 case BFD_RELOC_ALPHA_BOH:
1953 info = get_alpha_reloc_tag (next_sequence_num--);
1954 fixP->tc_fix_data.info = info;
1955 fixP->tc_fix_data.info->sym = fixup->xtrasym;
1956 fixP->tc_fix_data.info->psym = fixup->procsym;
1957 break;
1958#endif
1959
ea1562b3
NC
1960 default:
1961 if ((int) fixup->reloc < 0)
1962 {
1963 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
1964 fixP->fx_no_overflow = 1;
1965 }
1966 break;
1967 }
1968 }
252b5132
RH
1969}
1970
ea1562b3 1971/* Insert an operand value into an instruction. */
252b5132 1972
ea1562b3
NC
1973static unsigned
1974insert_operand (unsigned insn,
1975 const struct alpha_operand *operand,
1976 offsetT val,
1977 char *file,
1978 unsigned line)
252b5132 1979{
ea1562b3 1980 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
252b5132 1981 {
ea1562b3 1982 offsetT min, max;
252b5132 1983
ea1562b3 1984 if (operand->flags & AXP_OPERAND_SIGNED)
252b5132 1985 {
ea1562b3
NC
1986 max = (1 << (operand->bits - 1)) - 1;
1987 min = -(1 << (operand->bits - 1));
1988 }
1989 else
1990 {
1991 max = (1 << operand->bits) - 1;
1992 min = 0;
1993 }
252b5132 1994
ea1562b3 1995 if (val < min || val > max)
a06413e3 1996 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
ea1562b3 1997 }
252b5132 1998
ea1562b3
NC
1999 if (operand->insert)
2000 {
2001 const char *errmsg = NULL;
252b5132
RH
2002
2003 insn = (*operand->insert) (insn, val, &errmsg);
2004 if (errmsg)
20203fb9 2005 as_warn ("%s", errmsg);
252b5132
RH
2006 }
2007 else
2008 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
2009
2010 return insn;
2011}
2012
11f45fb5
NC
2013/* Turn an opcode description and a set of arguments into
2014 an instruction and a fixup. */
252b5132
RH
2015
2016static void
ea1562b3
NC
2017assemble_insn (const struct alpha_opcode *opcode,
2018 const expressionS *tok,
2019 int ntok,
2020 struct alpha_insn *insn,
21d799b5 2021 extended_bfd_reloc_code_real_type reloc)
252b5132 2022{
19f78583
RH
2023 const struct alpha_operand *reloc_operand = NULL;
2024 const expressionS *reloc_exp = NULL;
252b5132
RH
2025 const unsigned char *argidx;
2026 unsigned image;
2027 int tokidx = 0;
2028
2029 memset (insn, 0, sizeof (*insn));
2030 image = opcode->opcode;
2031
2032 for (argidx = opcode->operands; *argidx; ++argidx)
2033 {
2034 const struct alpha_operand *operand = &alpha_operands[*argidx];
32ff5c2e 2035 const expressionS *t = (const expressionS *) 0;
252b5132
RH
2036
2037 if (operand->flags & AXP_OPERAND_FAKE)
2038 {
ea1562b3 2039 /* Fake operands take no value and generate no fixup. */
32ff5c2e 2040 image = insert_operand (image, operand, 0, NULL, 0);
252b5132
RH
2041 continue;
2042 }
2043
2044 if (tokidx >= ntok)
2045 {
2046 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
2047 {
2048 case AXP_OPERAND_DEFAULT_FIRST:
2049 t = &tok[0];
2050 break;
2051 case AXP_OPERAND_DEFAULT_SECOND:
2052 t = &tok[1];
2053 break;
2054 case AXP_OPERAND_DEFAULT_ZERO:
2055 {
446a06c9 2056 static expressionS zero_exp;
252b5132 2057 t = &zero_exp;
446a06c9
MM
2058 zero_exp.X_op = O_constant;
2059 zero_exp.X_unsigned = 1;
252b5132
RH
2060 }
2061 break;
2062 default:
bc805888 2063 abort ();
252b5132
RH
2064 }
2065 }
2066 else
2067 t = &tok[tokidx++];
2068
2069 switch (t->X_op)
2070 {
2071 case O_register:
2072 case O_pregister:
2073 case O_cpregister:
32ff5c2e
KH
2074 image = insert_operand (image, operand, regno (t->X_add_number),
2075 NULL, 0);
252b5132
RH
2076 break;
2077
2078 case O_constant:
32ff5c2e 2079 image = insert_operand (image, operand, t->X_add_number, NULL, 0);
9c2799c2 2080 gas_assert (reloc_operand == NULL);
19f78583
RH
2081 reloc_operand = operand;
2082 reloc_exp = t;
252b5132
RH
2083 break;
2084
2085 default:
19f78583
RH
2086 /* This is only 0 for fields that should contain registers,
2087 which means this pattern shouldn't have matched. */
2088 if (operand->default_reloc == 0)
2089 abort ();
252b5132 2090
19f78583 2091 /* There is one special case for which an insn receives two
cc8a6dd0 2092 relocations, and thus the user-supplied reloc does not
19f78583
RH
2093 override the operand reloc. */
2094 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
2095 {
2096 struct alpha_fixup *fixup;
252b5132 2097
19f78583
RH
2098 if (insn->nfixups >= MAX_INSN_FIXUPS)
2099 as_fatal (_("too many fixups"));
252b5132 2100
19f78583
RH
2101 fixup = &insn->fixups[insn->nfixups++];
2102 fixup->exp = *t;
2103 fixup->reloc = BFD_RELOC_ALPHA_HINT;
2104 }
2105 else
2106 {
2107 if (reloc == BFD_RELOC_UNUSED)
2108 reloc = operand->default_reloc;
2109
9c2799c2 2110 gas_assert (reloc_operand == NULL);
19f78583
RH
2111 reloc_operand = operand;
2112 reloc_exp = t;
2113 }
252b5132
RH
2114 break;
2115 }
2116 }
2117
19f78583
RH
2118 if (reloc != BFD_RELOC_UNUSED)
2119 {
2120 struct alpha_fixup *fixup;
2121
2122 if (insn->nfixups >= MAX_INSN_FIXUPS)
2123 as_fatal (_("too many fixups"));
2124
2125 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2126 relocation tag for both ldah and lda with gpdisp. Choose the
2127 correct internal relocation based on the opcode. */
2128 if (reloc == BFD_RELOC_ALPHA_GPDISP)
2129 {
2130 if (strcmp (opcode->name, "ldah") == 0)
2131 reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2132 else if (strcmp (opcode->name, "lda") == 0)
2133 reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2134 else
2135 as_bad (_("invalid relocation for instruction"));
2136 }
2137
2138 /* If this is a real relocation (as opposed to a lituse hint), then
198f1251 2139 the relocation width should match the operand width.
3739860c 2140 Take care of -MDISP in operand table. */
198f1251 2141 else if (reloc < BFD_RELOC_UNUSED && reloc > 0)
19f78583
RH
2142 {
2143 reloc_howto_type *reloc_howto
21d799b5
NC
2144 = bfd_reloc_type_lookup (stdoutput,
2145 (bfd_reloc_code_real_type) reloc);
ee21dcab
AM
2146 if (reloc_operand == NULL
2147 || reloc_howto->bitsize != reloc_operand->bits)
19f78583
RH
2148 {
2149 as_bad (_("invalid relocation for field"));
2150 return;
2151 }
2152 }
2153
2154 fixup = &insn->fixups[insn->nfixups++];
2155 if (reloc_exp)
2156 fixup->exp = *reloc_exp;
2157 else
2158 fixup->exp.X_op = O_absent;
2159 fixup->reloc = reloc;
2160 }
2161
252b5132
RH
2162 insn->insn = image;
2163}
2164
ea1562b3
NC
2165/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2166 etc. They differ from the real instructions in that they do simple
2167 expressions like the lda macro. */
252b5132
RH
2168
2169static void
ea1562b3
NC
2170emit_ir_load (const expressionS *tok,
2171 int ntok,
2172 const void * opname)
252b5132 2173{
ea1562b3
NC
2174 int basereg;
2175 long lituse;
2176 expressionS newtok[3];
2177 struct alpha_insn insn;
198f1251
TG
2178 const char *symname
2179 = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): "";
2180 int symlen = strlen (symname);
252b5132 2181
ea1562b3
NC
2182 if (ntok == 2)
2183 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2184 else
2185 basereg = tok[2].X_add_number;
252b5132 2186
198f1251 2187 lituse = load_expression (tok[0].X_add_number, &tok[1],
21d799b5 2188 &basereg, &newtok[1], (const char *) opname);
252b5132 2189
198f1251
TG
2190 if (basereg == alpha_gp_register &&
2191 (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0))
2192 return;
3739860c 2193
ea1562b3
NC
2194 newtok[0] = tok[0];
2195 set_tok_preg (newtok[2], basereg);
4dc7ead9 2196
ea1562b3
NC
2197 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
2198
2199 if (lituse)
252b5132 2200 {
9c2799c2 2201 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2202 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2203 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2204 insn.nfixups++;
2205 insn.sequence = lituse;
2206 }
252b5132 2207
ea1562b3
NC
2208 emit_insn (&insn);
2209}
252b5132 2210
ea1562b3
NC
2211/* Handle fp register loads, and both integer and fp register stores.
2212 Again, we handle simple expressions. */
43b4c25e 2213
ea1562b3
NC
2214static void
2215emit_loadstore (const expressionS *tok,
2216 int ntok,
2217 const void * opname)
2218{
2219 int basereg;
2220 long lituse;
2221 expressionS newtok[3];
2222 struct alpha_insn insn;
252b5132 2223
ea1562b3
NC
2224 if (ntok == 2)
2225 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2226 else
2227 basereg = tok[2].X_add_number;
252b5132 2228
ea1562b3
NC
2229 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
2230 {
2231 if (alpha_noat_on)
2232 as_bad (_("macro requires $at register while noat in effect"));
252b5132 2233
3739860c 2234 lituse = load_expression (AXP_REG_AT, &tok[1],
21d799b5 2235 &basereg, &newtok[1], (const char *) opname);
ea1562b3
NC
2236 }
2237 else
2238 {
2239 newtok[1] = tok[1];
2240 lituse = 0;
2241 }
43b4c25e 2242
ea1562b3
NC
2243 newtok[0] = tok[0];
2244 set_tok_preg (newtok[2], basereg);
43b4c25e 2245
ea1562b3 2246 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
43b4c25e 2247
ea1562b3
NC
2248 if (lituse)
2249 {
9c2799c2 2250 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2251 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2252 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2253 insn.nfixups++;
2254 insn.sequence = lituse;
2255 }
43b4c25e 2256
ea1562b3
NC
2257 emit_insn (&insn);
2258}
43b4c25e 2259
ea1562b3 2260/* Load a half-word or byte as an unsigned value. */
43b4c25e 2261
ea1562b3
NC
2262static void
2263emit_ldXu (const expressionS *tok,
2264 int ntok,
2265 const void * vlgsize)
2266{
2267 if (alpha_target & AXP_OPCODE_BWX)
2268 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
2269 else
2270 {
2271 expressionS newtok[3];
2272 struct alpha_insn insn;
2273 int basereg;
2274 long lituse;
19f78583 2275
ea1562b3
NC
2276 if (alpha_noat_on)
2277 as_bad (_("macro requires $at register while noat in effect"));
43b4c25e 2278
ea1562b3
NC
2279 if (ntok == 2)
2280 basereg = (tok[1].X_op == O_constant
2281 ? AXP_REG_ZERO : alpha_gp_register);
2282 else
2283 basereg = tok[2].X_add_number;
3765b1be 2284
ea1562b3 2285 /* Emit "lda $at, exp". */
198f1251 2286 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda");
3765b1be 2287
ea1562b3
NC
2288 /* Emit "ldq_u targ, 0($at)". */
2289 newtok[0] = tok[0];
2290 set_tok_const (newtok[1], 0);
2291 set_tok_preg (newtok[2], basereg);
2292 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3765b1be 2293
ea1562b3
NC
2294 if (lituse)
2295 {
9c2799c2 2296 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2297 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2298 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2299 insn.nfixups++;
2300 insn.sequence = lituse;
252b5132 2301 }
252b5132 2302
ea1562b3 2303 emit_insn (&insn);
252b5132 2304
ea1562b3
NC
2305 /* Emit "extXl targ, $at, targ". */
2306 set_tok_reg (newtok[1], basereg);
2307 newtok[2] = newtok[0];
2308 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
252b5132 2309
ea1562b3 2310 if (lituse)
252b5132 2311 {
9c2799c2 2312 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2313 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
2314 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2315 insn.nfixups++;
2316 insn.sequence = lituse;
252b5132 2317 }
ea1562b3
NC
2318
2319 emit_insn (&insn);
252b5132 2320 }
252b5132
RH
2321}
2322
ea1562b3 2323/* Load a half-word or byte as a signed value. */
252b5132
RH
2324
2325static void
ea1562b3
NC
2326emit_ldX (const expressionS *tok,
2327 int ntok,
2328 const void * vlgsize)
252b5132 2329{
ea1562b3
NC
2330 emit_ldXu (tok, ntok, vlgsize);
2331 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
2332}
252b5132 2333
ea1562b3
NC
2334/* Load an integral value from an unaligned address as an unsigned
2335 value. */
252b5132
RH
2336
2337static void
ea1562b3
NC
2338emit_uldXu (const expressionS *tok,
2339 int ntok,
2340 const void * vlgsize)
252b5132 2341{
ea1562b3 2342 long lgsize = (long) vlgsize;
252b5132 2343 expressionS newtok[3];
252b5132 2344
ea1562b3
NC
2345 if (alpha_noat_on)
2346 as_bad (_("macro requires $at register while noat in effect"));
252b5132 2347
ea1562b3
NC
2348 /* Emit "lda $at, exp". */
2349 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2350 newtok[0].X_add_number = AXP_REG_AT;
2351 assemble_tokens ("lda", newtok, ntok, 1);
2352
2353 /* Emit "ldq_u $t9, 0($at)". */
2354 set_tok_reg (newtok[0], AXP_REG_T9);
252b5132 2355 set_tok_const (newtok[1], 0);
ea1562b3
NC
2356 set_tok_preg (newtok[2], AXP_REG_AT);
2357 assemble_tokens ("ldq_u", newtok, 3, 1);
252b5132 2358
ea1562b3
NC
2359 /* Emit "ldq_u $t10, size-1($at)". */
2360 set_tok_reg (newtok[0], AXP_REG_T10);
2361 set_tok_const (newtok[1], (1 << lgsize) - 1);
2362 assemble_tokens ("ldq_u", newtok, 3, 1);
252b5132 2363
ea1562b3
NC
2364 /* Emit "extXl $t9, $at, $t9". */
2365 set_tok_reg (newtok[0], AXP_REG_T9);
2366 set_tok_reg (newtok[1], AXP_REG_AT);
2367 set_tok_reg (newtok[2], AXP_REG_T9);
2368 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
252b5132 2369
ea1562b3
NC
2370 /* Emit "extXh $t10, $at, $t10". */
2371 set_tok_reg (newtok[0], AXP_REG_T10);
2372 set_tok_reg (newtok[2], AXP_REG_T10);
2373 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
252b5132 2374
ea1562b3
NC
2375 /* Emit "or $t9, $t10, targ". */
2376 set_tok_reg (newtok[0], AXP_REG_T9);
2377 set_tok_reg (newtok[1], AXP_REG_T10);
2378 newtok[2] = tok[0];
2379 assemble_tokens ("or", newtok, 3, 1);
2380}
252b5132 2381
ea1562b3
NC
2382/* Load an integral value from an unaligned address as a signed value.
2383 Note that quads should get funneled to the unsigned load since we
2384 don't have to do the sign extension. */
252b5132 2385
ea1562b3
NC
2386static void
2387emit_uldX (const expressionS *tok,
2388 int ntok,
2389 const void * vlgsize)
2390{
2391 emit_uldXu (tok, ntok, vlgsize);
2392 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
2393}
252b5132 2394
ea1562b3 2395/* Implement the ldil macro. */
252b5132 2396
ea1562b3
NC
2397static void
2398emit_ldil (const expressionS *tok,
2399 int ntok,
2400 const void * unused ATTRIBUTE_UNUSED)
2401{
2402 expressionS newtok[2];
252b5132 2403
ea1562b3
NC
2404 memcpy (newtok, tok, sizeof (newtok));
2405 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
252b5132 2406
ea1562b3 2407 assemble_tokens ("lda", newtok, ntok, 1);
252b5132
RH
2408}
2409
ea1562b3 2410/* Store a half-word or byte. */
252b5132 2411
ea1562b3
NC
2412static void
2413emit_stX (const expressionS *tok,
2414 int ntok,
2415 const void * vlgsize)
252b5132 2416{
ea1562b3 2417 int lgsize = (int) (long) vlgsize;
252b5132 2418
ea1562b3
NC
2419 if (alpha_target & AXP_OPCODE_BWX)
2420 emit_loadstore (tok, ntok, stX_op[lgsize]);
2421 else
2422 {
2423 expressionS newtok[3];
2424 struct alpha_insn insn;
2425 int basereg;
2426 long lituse;
252b5132 2427
ea1562b3
NC
2428 if (alpha_noat_on)
2429 as_bad (_("macro requires $at register while noat in effect"));
252b5132 2430
ea1562b3
NC
2431 if (ntok == 2)
2432 basereg = (tok[1].X_op == O_constant
2433 ? AXP_REG_ZERO : alpha_gp_register);
2434 else
2435 basereg = tok[2].X_add_number;
252b5132 2436
ea1562b3 2437 /* Emit "lda $at, exp". */
198f1251 2438 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda");
252b5132 2439
ea1562b3
NC
2440 /* Emit "ldq_u $t9, 0($at)". */
2441 set_tok_reg (newtok[0], AXP_REG_T9);
2442 set_tok_const (newtok[1], 0);
2443 set_tok_preg (newtok[2], basereg);
2444 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
252b5132 2445
ea1562b3
NC
2446 if (lituse)
2447 {
9c2799c2 2448 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2449 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2450 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2451 insn.nfixups++;
2452 insn.sequence = lituse;
2453 }
252b5132 2454
ea1562b3 2455 emit_insn (&insn);
252b5132 2456
ea1562b3
NC
2457 /* Emit "insXl src, $at, $t10". */
2458 newtok[0] = tok[0];
2459 set_tok_reg (newtok[1], basereg);
2460 set_tok_reg (newtok[2], AXP_REG_T10);
2461 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
252b5132 2462
ea1562b3
NC
2463 if (lituse)
2464 {
9c2799c2 2465 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2466 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
2467 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2468 insn.nfixups++;
2469 insn.sequence = lituse;
2470 }
252b5132 2471
ea1562b3 2472 emit_insn (&insn);
252b5132 2473
ea1562b3
NC
2474 /* Emit "mskXl $t9, $at, $t9". */
2475 set_tok_reg (newtok[0], AXP_REG_T9);
2476 newtok[2] = newtok[0];
2477 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
43b4c25e 2478
ea1562b3
NC
2479 if (lituse)
2480 {
9c2799c2 2481 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2482 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
2483 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2484 insn.nfixups++;
2485 insn.sequence = lituse;
2486 }
252b5132 2487
ea1562b3 2488 emit_insn (&insn);
252b5132 2489
ea1562b3
NC
2490 /* Emit "or $t9, $t10, $t9". */
2491 set_tok_reg (newtok[1], AXP_REG_T10);
2492 assemble_tokens ("or", newtok, 3, 1);
252b5132 2493
ea1562b3
NC
2494 /* Emit "stq_u $t9, 0($at). */
2495 set_tok_const(newtok[1], 0);
2496 set_tok_preg (newtok[2], AXP_REG_AT);
2497 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
252b5132 2498
ea1562b3
NC
2499 if (lituse)
2500 {
9c2799c2 2501 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3
NC
2502 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
2503 insn.fixups[insn.nfixups].exp.X_op = O_absent;
2504 insn.nfixups++;
2505 insn.sequence = lituse;
2506 }
252b5132 2507
ea1562b3
NC
2508 emit_insn (&insn);
2509 }
2510}
252b5132 2511
ea1562b3 2512/* Store an integer to an unaligned address. */
252b5132 2513
ea1562b3
NC
2514static void
2515emit_ustX (const expressionS *tok,
2516 int ntok,
2517 const void * vlgsize)
2518{
2519 int lgsize = (int) (long) vlgsize;
2520 expressionS newtok[3];
252b5132 2521
ea1562b3
NC
2522 /* Emit "lda $at, exp". */
2523 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2524 newtok[0].X_add_number = AXP_REG_AT;
2525 assemble_tokens ("lda", newtok, ntok, 1);
252b5132 2526
ea1562b3
NC
2527 /* Emit "ldq_u $9, 0($at)". */
2528 set_tok_reg (newtok[0], AXP_REG_T9);
2529 set_tok_const (newtok[1], 0);
2530 set_tok_preg (newtok[2], AXP_REG_AT);
2531 assemble_tokens ("ldq_u", newtok, 3, 1);
252b5132 2532
ea1562b3
NC
2533 /* Emit "ldq_u $10, size-1($at)". */
2534 set_tok_reg (newtok[0], AXP_REG_T10);
2535 set_tok_const (newtok[1], (1 << lgsize) - 1);
2536 assemble_tokens ("ldq_u", newtok, 3, 1);
252b5132 2537
ea1562b3
NC
2538 /* Emit "insXl src, $at, $t11". */
2539 newtok[0] = tok[0];
2540 set_tok_reg (newtok[1], AXP_REG_AT);
2541 set_tok_reg (newtok[2], AXP_REG_T11);
2542 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
252b5132 2543
ea1562b3
NC
2544 /* Emit "insXh src, $at, $t12". */
2545 set_tok_reg (newtok[2], AXP_REG_T12);
2546 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
252b5132 2547
ea1562b3
NC
2548 /* Emit "mskXl $t9, $at, $t9". */
2549 set_tok_reg (newtok[0], AXP_REG_T9);
2550 newtok[2] = newtok[0];
2551 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
252b5132 2552
ea1562b3
NC
2553 /* Emit "mskXh $t10, $at, $t10". */
2554 set_tok_reg (newtok[0], AXP_REG_T10);
2555 newtok[2] = newtok[0];
2556 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
252b5132 2557
ea1562b3
NC
2558 /* Emit "or $t9, $t11, $t9". */
2559 set_tok_reg (newtok[0], AXP_REG_T9);
2560 set_tok_reg (newtok[1], AXP_REG_T11);
2561 newtok[2] = newtok[0];
2562 assemble_tokens ("or", newtok, 3, 1);
252b5132 2563
ea1562b3
NC
2564 /* Emit "or $t10, $t12, $t10". */
2565 set_tok_reg (newtok[0], AXP_REG_T10);
2566 set_tok_reg (newtok[1], AXP_REG_T12);
2567 newtok[2] = newtok[0];
2568 assemble_tokens ("or", newtok, 3, 1);
252b5132 2569
ea1562b3
NC
2570 /* Emit "stq_u $t10, size-1($at)". */
2571 set_tok_reg (newtok[0], AXP_REG_T10);
2572 set_tok_const (newtok[1], (1 << lgsize) - 1);
af1c1010
NC
2573 set_tok_preg (newtok[2], AXP_REG_AT);
2574 assemble_tokens ("stq_u", newtok, 3, 1);
2575
2576 /* Emit "stq_u $t9, 0($at)". */
2577 set_tok_reg (newtok[0], AXP_REG_T9);
2578 set_tok_const (newtok[1], 0);
ea1562b3
NC
2579 assemble_tokens ("stq_u", newtok, 3, 1);
2580}
252b5132 2581
ea1562b3
NC
2582/* Sign extend a half-word or byte. The 32-bit sign extend is
2583 implemented as "addl $31, $r, $t" in the opcode table. */
252b5132 2584
ea1562b3
NC
2585static void
2586emit_sextX (const expressionS *tok,
2587 int ntok,
2588 const void * vlgsize)
2589{
2590 long lgsize = (long) vlgsize;
252b5132 2591
ea1562b3
NC
2592 if (alpha_target & AXP_OPCODE_BWX)
2593 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
2594 else
2595 {
2596 int bitshift = 64 - 8 * (1 << lgsize);
2597 expressionS newtok[3];
252b5132 2598
ea1562b3
NC
2599 /* Emit "sll src,bits,dst". */
2600 newtok[0] = tok[0];
2601 set_tok_const (newtok[1], bitshift);
2602 newtok[2] = tok[ntok - 1];
2603 assemble_tokens ("sll", newtok, 3, 1);
252b5132 2604
ea1562b3
NC
2605 /* Emit "sra dst,bits,dst". */
2606 newtok[0] = newtok[2];
2607 assemble_tokens ("sra", newtok, 3, 1);
252b5132 2608 }
ea1562b3 2609}
252b5132 2610
ea1562b3 2611/* Implement the division and modulus macros. */
252b5132
RH
2612
2613#ifdef OBJ_EVAX
252b5132 2614
ea1562b3
NC
2615/* Make register usage like in normal procedure call.
2616 Don't clobber PV and RA. */
252b5132 2617
ea1562b3
NC
2618static void
2619emit_division (const expressionS *tok,
2620 int ntok,
2621 const void * symname)
2622{
2623 /* DIVISION and MODULUS. Yech.
252b5132 2624
ea1562b3
NC
2625 Convert
2626 OP x,y,result
2627 to
2628 mov x,R16 # if x != R16
2629 mov y,R17 # if y != R17
2630 lda AT,__OP
2631 jsr AT,(AT),0
2632 mov R0,result
252b5132 2633
ea1562b3
NC
2634 with appropriate optimizations if R0,R16,R17 are the registers
2635 specified by the compiler. */
252b5132 2636
ea1562b3
NC
2637 int xr, yr, rr;
2638 symbolS *sym;
2639 expressionS newtok[3];
252b5132 2640
ea1562b3
NC
2641 xr = regno (tok[0].X_add_number);
2642 yr = regno (tok[1].X_add_number);
252b5132 2643
ea1562b3
NC
2644 if (ntok < 3)
2645 rr = xr;
2646 else
2647 rr = regno (tok[2].X_add_number);
252b5132 2648
ea1562b3
NC
2649 /* Move the operands into the right place. */
2650 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
2651 {
2652 /* They are in exactly the wrong order -- swap through AT. */
2653 if (alpha_noat_on)
2654 as_bad (_("macro requires $at register while noat in effect"));
252b5132 2655
ea1562b3
NC
2656 set_tok_reg (newtok[0], AXP_REG_R16);
2657 set_tok_reg (newtok[1], AXP_REG_AT);
2658 assemble_tokens ("mov", newtok, 2, 1);
252b5132 2659
ea1562b3
NC
2660 set_tok_reg (newtok[0], AXP_REG_R17);
2661 set_tok_reg (newtok[1], AXP_REG_R16);
2662 assemble_tokens ("mov", newtok, 2, 1);
252b5132 2663
ea1562b3
NC
2664 set_tok_reg (newtok[0], AXP_REG_AT);
2665 set_tok_reg (newtok[1], AXP_REG_R17);
2666 assemble_tokens ("mov", newtok, 2, 1);
252b5132
RH
2667 }
2668 else
2669 {
ea1562b3 2670 if (yr == AXP_REG_R16)
252b5132 2671 {
ea1562b3
NC
2672 set_tok_reg (newtok[0], AXP_REG_R16);
2673 set_tok_reg (newtok[1], AXP_REG_R17);
2674 assemble_tokens ("mov", newtok, 2, 1);
252b5132
RH
2675 }
2676
ea1562b3 2677 if (xr != AXP_REG_R16)
252b5132 2678 {
ea1562b3
NC
2679 set_tok_reg (newtok[0], xr);
2680 set_tok_reg (newtok[1], AXP_REG_R16);
2681 assemble_tokens ("mov", newtok, 2, 1);
252b5132
RH
2682 }
2683
ea1562b3 2684 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
252b5132 2685 {
ea1562b3
NC
2686 set_tok_reg (newtok[0], yr);
2687 set_tok_reg (newtok[1], AXP_REG_R17);
2688 assemble_tokens ("mov", newtok, 2, 1);
252b5132 2689 }
252b5132
RH
2690 }
2691
ea1562b3 2692 sym = symbol_find_or_make ((const char *) symname);
252b5132 2693
ea1562b3
NC
2694 set_tok_reg (newtok[0], AXP_REG_AT);
2695 set_tok_sym (newtok[1], sym, 0);
2696 assemble_tokens ("lda", newtok, 2, 1);
252b5132 2697
ea1562b3
NC
2698 /* Call the division routine. */
2699 set_tok_reg (newtok[0], AXP_REG_AT);
2700 set_tok_cpreg (newtok[1], AXP_REG_AT);
2701 set_tok_const (newtok[2], 0);
2702 assemble_tokens ("jsr", newtok, 3, 1);
252b5132 2703
ea1562b3
NC
2704 /* Move the result to the right place. */
2705 if (rr != AXP_REG_R0)
2706 {
2707 set_tok_reg (newtok[0], AXP_REG_R0);
2708 set_tok_reg (newtok[1], rr);
2709 assemble_tokens ("mov", newtok, 2, 1);
2710 }
252b5132
RH
2711}
2712
ea1562b3 2713#else /* !OBJ_EVAX */
252b5132
RH
2714
2715static void
ea1562b3
NC
2716emit_division (const expressionS *tok,
2717 int ntok,
2718 const void * symname)
252b5132 2719{
ea1562b3
NC
2720 /* DIVISION and MODULUS. Yech.
2721 Convert
2722 OP x,y,result
2723 to
2724 lda pv,__OP
2725 mov x,t10
2726 mov y,t11
2727 jsr t9,(pv),__OP
2728 mov t12,result
252b5132 2729
ea1562b3
NC
2730 with appropriate optimizations if t10,t11,t12 are the registers
2731 specified by the compiler. */
252b5132 2732
ea1562b3
NC
2733 int xr, yr, rr;
2734 symbolS *sym;
252b5132 2735 expressionS newtok[3];
252b5132 2736
ea1562b3
NC
2737 xr = regno (tok[0].X_add_number);
2738 yr = regno (tok[1].X_add_number);
252b5132 2739
ea1562b3
NC
2740 if (ntok < 3)
2741 rr = xr;
2742 else
2743 rr = regno (tok[2].X_add_number);
252b5132 2744
ea1562b3 2745 sym = symbol_find_or_make ((const char *) symname);
252b5132 2746
ea1562b3
NC
2747 /* Move the operands into the right place. */
2748 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
252b5132 2749 {
ea1562b3
NC
2750 /* They are in exactly the wrong order -- swap through AT. */
2751 if (alpha_noat_on)
2752 as_bad (_("macro requires $at register while noat in effect"));
252b5132 2753
ea1562b3
NC
2754 set_tok_reg (newtok[0], AXP_REG_T10);
2755 set_tok_reg (newtok[1], AXP_REG_AT);
2756 assemble_tokens ("mov", newtok, 2, 1);
252b5132 2757
ea1562b3
NC
2758 set_tok_reg (newtok[0], AXP_REG_T11);
2759 set_tok_reg (newtok[1], AXP_REG_T10);
2760 assemble_tokens ("mov", newtok, 2, 1);
252b5132 2761
ea1562b3
NC
2762 set_tok_reg (newtok[0], AXP_REG_AT);
2763 set_tok_reg (newtok[1], AXP_REG_T11);
2764 assemble_tokens ("mov", newtok, 2, 1);
2765 }
2766 else
2767 {
2768 if (yr == AXP_REG_T10)
2769 {
2770 set_tok_reg (newtok[0], AXP_REG_T10);
2771 set_tok_reg (newtok[1], AXP_REG_T11);
2772 assemble_tokens ("mov", newtok, 2, 1);
2773 }
2774
2775 if (xr != AXP_REG_T10)
2776 {
2777 set_tok_reg (newtok[0], xr);
2778 set_tok_reg (newtok[1], AXP_REG_T10);
2779 assemble_tokens ("mov", newtok, 2, 1);
2780 }
2781
2782 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
2783 {
2784 set_tok_reg (newtok[0], yr);
2785 set_tok_reg (newtok[1], AXP_REG_T11);
2786 assemble_tokens ("mov", newtok, 2, 1);
2787 }
2788 }
2789
2790 /* Call the division routine. */
2791 set_tok_reg (newtok[0], AXP_REG_T9);
2792 set_tok_sym (newtok[1], sym, 0);
2793 assemble_tokens ("jsr", newtok, 2, 1);
2794
2795 /* Reload the GP register. */
2796#ifdef OBJ_AOUT
2797FIXME
2798#endif
2799#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2800 set_tok_reg (newtok[0], alpha_gp_register);
2801 set_tok_const (newtok[1], 0);
2802 set_tok_preg (newtok[2], AXP_REG_T9);
2803 assemble_tokens ("ldgp", newtok, 3, 1);
2804#endif
2805
2806 /* Move the result to the right place. */
2807 if (rr != AXP_REG_T12)
2808 {
2809 set_tok_reg (newtok[0], AXP_REG_T12);
2810 set_tok_reg (newtok[1], rr);
2811 assemble_tokens ("mov", newtok, 2, 1);
2812 }
2813}
2814
2815#endif /* !OBJ_EVAX */
2816
2817/* The jsr and jmp macros differ from their instruction counterparts
2818 in that they can load the target address and default most
2819 everything. */
2820
2821static void
2822emit_jsrjmp (const expressionS *tok,
2823 int ntok,
2824 const void * vopname)
252b5132 2825{
ea1562b3 2826 const char *opname = (const char *) vopname;
252b5132 2827 struct alpha_insn insn;
ea1562b3
NC
2828 expressionS newtok[3];
2829 int r, tokidx = 0;
2830 long lituse = 0;
252b5132 2831
ea1562b3
NC
2832 if (tokidx < ntok && tok[tokidx].X_op == O_register)
2833 r = regno (tok[tokidx++].X_add_number);
252b5132 2834 else
ea1562b3 2835 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
252b5132 2836
ea1562b3 2837 set_tok_reg (newtok[0], r);
252b5132 2838
ea1562b3
NC
2839 if (tokidx < ntok &&
2840 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
2841 r = regno (tok[tokidx++].X_add_number);
2842#ifdef OBJ_EVAX
2843 /* Keep register if jsr $n.<sym>. */
2844#else
252b5132
RH
2845 else
2846 {
ea1562b3 2847 int basereg = alpha_gp_register;
198f1251
TG
2848 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx],
2849 &basereg, NULL, opname);
252b5132 2850 }
ea1562b3 2851#endif
252b5132 2852
ea1562b3 2853 set_tok_cpreg (newtok[1], r);
252b5132 2854
198f1251 2855#ifndef OBJ_EVAX
ea1562b3
NC
2856 if (tokidx < ntok)
2857 newtok[2] = tok[tokidx];
2858 else
2859#endif
2860 set_tok_const (newtok[2], 0);
2861
2862 assemble_tokens_to_insn (opname, newtok, 3, &insn);
252b5132
RH
2863
2864 if (lituse)
2865 {
9c2799c2 2866 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
ea1562b3 2867 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
19f78583 2868 insn.fixups[insn.nfixups].exp.X_op = O_absent;
252b5132 2869 insn.nfixups++;
19f78583 2870 insn.sequence = lituse;
252b5132
RH
2871 }
2872
198f1251
TG
2873#ifdef OBJ_EVAX
2874 if (alpha_flag_replace
2875 && r == AXP_REG_RA
2876 && tok[tokidx].X_add_symbol
2877 && alpha_linkage_symbol)
2878 {
51794af8 2879 /* Create a BOH reloc for 'jsr $27,NAME'. */
198f1251
TG
2880 const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol);
2881 int symlen = strlen (symname);
2882 char *ensymname;
2883
51794af8 2884 /* Build the entry name as 'NAME..en'. */
e1f4d6bd 2885 ensymname = (char *) alloca (symlen + 5);
198f1251
TG
2886 memcpy (ensymname, symname, symlen);
2887 memcpy (ensymname + symlen, "..en", 5);
2888
9c2799c2 2889 gas_assert (insn.nfixups < MAX_INSN_FIXUPS);
198f1251
TG
2890 if (insn.nfixups > 0)
2891 {
2892 memmove (&insn.fixups[1], &insn.fixups[0],
2893 sizeof(struct alpha_fixup) * insn.nfixups);
2894 }
2895
2896 /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP
2897 case in load_expression. See B.4.5.2 of the OpenVMS
2898 Linker Utility Manual. */
2899 insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH;
2900 insn.fixups[0].exp.X_op = O_symbol;
2901 insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname);
2902 insn.fixups[0].exp.X_add_number = 0;
2903 insn.fixups[0].xtrasym = alpha_linkage_symbol;
2904 insn.fixups[0].procsym = alpha_evax_proc->symbol;
2905 insn.nfixups++;
2906 alpha_linkage_symbol = 0;
2907 }
2908#endif
2909
252b5132
RH
2910 emit_insn (&insn);
2911}
2912
ea1562b3
NC
2913/* The ret and jcr instructions differ from their instruction
2914 counterparts in that everything can be defaulted. */
252b5132
RH
2915
2916static void
ea1562b3
NC
2917emit_retjcr (const expressionS *tok,
2918 int ntok,
2919 const void * vopname)
252b5132 2920{
ea1562b3
NC
2921 const char *opname = (const char *) vopname;
2922 expressionS newtok[3];
2923 int r, tokidx = 0;
252b5132 2924
ea1562b3
NC
2925 if (tokidx < ntok && tok[tokidx].X_op == O_register)
2926 r = regno (tok[tokidx++].X_add_number);
2927 else
2928 r = AXP_REG_ZERO;
252b5132 2929
ea1562b3 2930 set_tok_reg (newtok[0], r);
19f78583 2931
ea1562b3
NC
2932 if (tokidx < ntok &&
2933 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
2934 r = regno (tok[tokidx++].X_add_number);
2935 else
2936 r = AXP_REG_RA;
19f78583 2937
ea1562b3 2938 set_tok_cpreg (newtok[1], r);
252b5132 2939
ea1562b3
NC
2940 if (tokidx < ntok)
2941 newtok[2] = tok[tokidx];
2942 else
2943 set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
252b5132 2944
ea1562b3 2945 assemble_tokens (opname, newtok, 3, 0);
252b5132
RH
2946}
2947
ea1562b3 2948/* Implement the ldgp macro. */
252b5132
RH
2949
2950static void
87975d2a 2951emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED,
ea1562b3
NC
2952 int ntok ATTRIBUTE_UNUSED,
2953 const void * unused ATTRIBUTE_UNUSED)
252b5132 2954{
ea1562b3
NC
2955#ifdef OBJ_AOUT
2956FIXME
2957#endif
2958#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2959 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2960 with appropriate constants and relocations. */
2961 struct alpha_insn insn;
252b5132 2962 expressionS newtok[3];
ea1562b3 2963 expressionS addend;
252b5132 2964
ea1562b3
NC
2965#ifdef OBJ_ECOFF
2966 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2967 ecoff_set_gp_prolog_size (0);
2968#endif
252b5132 2969
ea1562b3
NC
2970 newtok[0] = tok[0];
2971 set_tok_const (newtok[1], 0);
2972 newtok[2] = tok[2];
252b5132 2973
ea1562b3 2974 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
252b5132 2975
ea1562b3 2976 addend = tok[1];
252b5132 2977
ea1562b3
NC
2978#ifdef OBJ_ECOFF
2979 if (addend.X_op != O_constant)
2980 as_bad (_("can not resolve expression"));
2981 addend.X_op = O_symbol;
2982 addend.X_add_symbol = alpha_gp_symbol;
2983#endif
252b5132 2984
ea1562b3
NC
2985 insn.nfixups = 1;
2986 insn.fixups[0].exp = addend;
2987 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2988 insn.sequence = next_sequence_num;
252b5132 2989
ea1562b3 2990 emit_insn (&insn);
252b5132 2991
ea1562b3 2992 set_tok_preg (newtok[2], tok[0].X_add_number);
252b5132 2993
ea1562b3 2994 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
252b5132 2995
ea1562b3
NC
2996#ifdef OBJ_ECOFF
2997 addend.X_add_number += 4;
2998#endif
252b5132 2999
ea1562b3
NC
3000 insn.nfixups = 1;
3001 insn.fixups[0].exp = addend;
3002 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
3003 insn.sequence = next_sequence_num--;
252b5132 3004
ea1562b3 3005 emit_insn (&insn);
87975d2a 3006#endif /* OBJ_ECOFF || OBJ_ELF */
252b5132
RH
3007}
3008
ea1562b3 3009/* The macro table. */
252b5132 3010
ea1562b3 3011static const struct alpha_macro alpha_macros[] =
252b5132 3012{
ea1562b3
NC
3013/* Load/Store macros. */
3014 { "lda", emit_lda, NULL,
3015 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3016 { "ldah", emit_ldah, NULL,
3017 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
252b5132 3018
ea1562b3
NC
3019 { "ldl", emit_ir_load, "ldl",
3020 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3021 { "ldl_l", emit_ir_load, "ldl_l",
3022 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3023 { "ldq", emit_ir_load, "ldq",
3024 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3025 { "ldq_l", emit_ir_load, "ldq_l",
3026 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3027 { "ldq_u", emit_ir_load, "ldq_u",
3028 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3029 { "ldf", emit_loadstore, "ldf",
3030 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3031 { "ldg", emit_loadstore, "ldg",
3032 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3033 { "lds", emit_loadstore, "lds",
3034 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3035 { "ldt", emit_loadstore, "ldt",
3036 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
252b5132 3037
ea1562b3
NC
3038 { "ldb", emit_ldX, (void *) 0,
3039 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3040 { "ldbu", emit_ldXu, (void *) 0,
3041 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3042 { "ldw", emit_ldX, (void *) 1,
3043 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3044 { "ldwu", emit_ldXu, (void *) 1,
3045 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
252b5132 3046
ea1562b3
NC
3047 { "uldw", emit_uldX, (void *) 1,
3048 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3049 { "uldwu", emit_uldXu, (void *) 1,
3050 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3051 { "uldl", emit_uldX, (void *) 2,
3052 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3053 { "uldlu", emit_uldXu, (void *) 2,
3054 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3055 { "uldq", emit_uldXu, (void *) 3,
3056 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
252b5132 3057
ea1562b3
NC
3058 { "ldgp", emit_ldgp, NULL,
3059 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
252b5132 3060
ea1562b3
NC
3061 { "ldi", emit_lda, NULL,
3062 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
3063 { "ldil", emit_ldil, NULL,
3064 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
3065 { "ldiq", emit_lda, NULL,
3066 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
252b5132 3067
ea1562b3
NC
3068 { "stl", emit_loadstore, "stl",
3069 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3070 { "stl_c", emit_loadstore, "stl_c",
3071 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3072 { "stq", emit_loadstore, "stq",
3073 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3074 { "stq_c", emit_loadstore, "stq_c",
3075 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3076 { "stq_u", emit_loadstore, "stq_u",
3077 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3078 { "stf", emit_loadstore, "stf",
3079 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3080 { "stg", emit_loadstore, "stg",
3081 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3082 { "sts", emit_loadstore, "sts",
3083 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3084 { "stt", emit_loadstore, "stt",
3085 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
252b5132 3086
ea1562b3
NC
3087 { "stb", emit_stX, (void *) 0,
3088 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3089 { "stw", emit_stX, (void *) 1,
3090 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3091 { "ustw", emit_ustX, (void *) 1,
3092 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3093 { "ustl", emit_ustX, (void *) 2,
3094 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
3095 { "ustq", emit_ustX, (void *) 3,
3096 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
252b5132 3097
ea1562b3 3098/* Arithmetic macros. */
19f78583 3099
ea1562b3
NC
3100 { "sextb", emit_sextX, (void *) 0,
3101 { MACRO_IR, MACRO_IR, MACRO_EOA,
3102 MACRO_IR, MACRO_EOA,
3103 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
3104 { "sextw", emit_sextX, (void *) 1,
3105 { MACRO_IR, MACRO_IR, MACRO_EOA,
3106 MACRO_IR, MACRO_EOA,
3107 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
252b5132 3108
ea1562b3
NC
3109 { "divl", emit_division, "__divl",
3110 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3111 MACRO_IR, MACRO_IR, MACRO_EOA,
3112 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3113 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3114 { "divlu", emit_division, "__divlu",
3115 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3116 MACRO_IR, MACRO_IR, MACRO_EOA,
3117 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3118 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3119 { "divq", emit_division, "__divq",
3120 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3121 MACRO_IR, MACRO_IR, MACRO_EOA,
3122 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3123 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3124 { "divqu", emit_division, "__divqu",
3125 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3126 MACRO_IR, MACRO_IR, MACRO_EOA,
3127 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3128 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3129 { "reml", emit_division, "__reml",
3130 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3131 MACRO_IR, MACRO_IR, MACRO_EOA,
3132 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3133 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3134 { "remlu", emit_division, "__remlu",
3135 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3136 MACRO_IR, MACRO_IR, MACRO_EOA,
3137 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3138 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3139 { "remq", emit_division, "__remq",
3140 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3141 MACRO_IR, MACRO_IR, MACRO_EOA,
3142 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3143 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
3144 { "remqu", emit_division, "__remqu",
3145 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
3146 MACRO_IR, MACRO_IR, MACRO_EOA,
3147 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
3148 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
252b5132 3149
ea1562b3
NC
3150 { "jsr", emit_jsrjmp, "jsr",
3151 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
3152 MACRO_PIR, MACRO_EOA,
3153 MACRO_IR, MACRO_EXP, MACRO_EOA,
3154 MACRO_EXP, MACRO_EOA } },
3155 { "jmp", emit_jsrjmp, "jmp",
3156 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
3157 MACRO_PIR, MACRO_EOA,
3158 MACRO_IR, MACRO_EXP, MACRO_EOA,
3159 MACRO_EXP, MACRO_EOA } },
3160 { "ret", emit_retjcr, "ret",
3161 { MACRO_IR, MACRO_EXP, MACRO_EOA,
3162 MACRO_IR, MACRO_EOA,
3163 MACRO_PIR, MACRO_EXP, MACRO_EOA,
3164 MACRO_PIR, MACRO_EOA,
3165 MACRO_EXP, MACRO_EOA,
3166 MACRO_EOA } },
3167 { "jcr", emit_retjcr, "jcr",
3168 { MACRO_IR, MACRO_EXP, MACRO_EOA,
3169 MACRO_IR, MACRO_EOA,
3170 MACRO_PIR, MACRO_EXP, MACRO_EOA,
3171 MACRO_PIR, MACRO_EOA,
3172 MACRO_EXP, MACRO_EOA,
3173 MACRO_EOA } },
3174 { "jsr_coroutine", emit_retjcr, "jcr",
3175 { MACRO_IR, MACRO_EXP, MACRO_EOA,
3176 MACRO_IR, MACRO_EOA,
3177 MACRO_PIR, MACRO_EXP, MACRO_EOA,
3178 MACRO_PIR, MACRO_EOA,
3179 MACRO_EXP, MACRO_EOA,
3180 MACRO_EOA } },
3181};
252b5132 3182
ea1562b3
NC
3183static const unsigned int alpha_num_macros
3184 = sizeof (alpha_macros) / sizeof (*alpha_macros);
19f78583 3185
ea1562b3
NC
3186/* Search forward through all variants of a macro looking for a syntax
3187 match. */
19f78583 3188
ea1562b3
NC
3189static const struct alpha_macro *
3190find_macro_match (const struct alpha_macro *first_macro,
3191 const expressionS *tok,
3192 int *pntok)
252b5132 3193
ea1562b3
NC
3194{
3195 const struct alpha_macro *macro = first_macro;
3196 int ntok = *pntok;
252b5132 3197
ea1562b3
NC
3198 do
3199 {
3200 const enum alpha_macro_arg *arg = macro->argsets;
3201 int tokidx = 0;
19f78583 3202
ea1562b3 3203 while (*arg)
19f78583 3204 {
ea1562b3
NC
3205 switch (*arg)
3206 {
3207 case MACRO_EOA:
3208 if (tokidx == ntok)
3209 return macro;
3210 else
3211 tokidx = 0;
3212 break;
252b5132 3213
ea1562b3
NC
3214 /* Index register. */
3215 case MACRO_IR:
3216 if (tokidx >= ntok || tok[tokidx].X_op != O_register
3217 || !is_ir_num (tok[tokidx].X_add_number))
3218 goto match_failed;
3219 ++tokidx;
3220 break;
19f78583 3221
ea1562b3
NC
3222 /* Parenthesized index register. */
3223 case MACRO_PIR:
3224 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
3225 || !is_ir_num (tok[tokidx].X_add_number))
3226 goto match_failed;
3227 ++tokidx;
3228 break;
19f78583 3229
ea1562b3
NC
3230 /* Optional parenthesized index register. */
3231 case MACRO_OPIR:
3232 if (tokidx < ntok && tok[tokidx].X_op == O_pregister
3233 && is_ir_num (tok[tokidx].X_add_number))
3234 ++tokidx;
3235 break;
252b5132 3236
ea1562b3
NC
3237 /* Leading comma with a parenthesized index register. */
3238 case MACRO_CPIR:
3239 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
3240 || !is_ir_num (tok[tokidx].X_add_number))
3241 goto match_failed;
3242 ++tokidx;
3243 break;
252b5132 3244
ea1562b3
NC
3245 /* Floating point register. */
3246 case MACRO_FPR:
3247 if (tokidx >= ntok || tok[tokidx].X_op != O_register
3248 || !is_fpr_num (tok[tokidx].X_add_number))
3249 goto match_failed;
3250 ++tokidx;
3251 break;
252b5132 3252
ea1562b3
NC
3253 /* Normal expression. */
3254 case MACRO_EXP:
3255 if (tokidx >= ntok)
3256 goto match_failed;
3257 switch (tok[tokidx].X_op)
3258 {
3259 case O_illegal:
3260 case O_absent:
3261 case O_register:
3262 case O_pregister:
3263 case O_cpregister:
3264 case O_literal:
3265 case O_lituse_base:
3266 case O_lituse_bytoff:
3267 case O_lituse_jsr:
3268 case O_gpdisp:
3269 case O_gprelhigh:
3270 case O_gprellow:
3271 case O_gprel:
3272 case O_samegp:
3273 goto match_failed;
252b5132 3274
ea1562b3
NC
3275 default:
3276 break;
3277 }
3278 ++tokidx;
3279 break;
19f78583 3280
ea1562b3
NC
3281 match_failed:
3282 while (*arg != MACRO_EOA)
3283 ++arg;
3284 tokidx = 0;
3285 break;
3286 }
3287 ++arg;
19f78583 3288 }
252b5132 3289 }
ea1562b3
NC
3290 while (++macro - alpha_macros < (int) alpha_num_macros
3291 && !strcmp (macro->name, first_macro->name));
3292
3293 return NULL;
252b5132
RH
3294}
3295
ea1562b3
NC
3296/* Given an opcode name and a pre-tokenized set of arguments, take the
3297 opcode all the way through emission. */
252b5132
RH
3298
3299static void
ea1562b3
NC
3300assemble_tokens (const char *opname,
3301 const expressionS *tok,
3302 int ntok,
3303 int local_macros_on)
252b5132 3304{
ea1562b3
NC
3305 int found_something = 0;
3306 const struct alpha_opcode *opcode;
3307 const struct alpha_macro *macro;
3308 int cpumatch = 1;
21d799b5 3309 extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
252b5132 3310
ea1562b3
NC
3311#ifdef RELOC_OP_P
3312 /* If a user-specified relocation is present, this is not a macro. */
3313 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
3314 {
3315 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
3316 ntok--;
3317 }
3318 else
3319#endif
3320 if (local_macros_on)
3321 {
3322 macro = ((const struct alpha_macro *)
3323 hash_find (alpha_macro_hash, opname));
3324 if (macro)
3325 {
3326 found_something = 1;
3327 macro = find_macro_match (macro, tok, &ntok);
3328 if (macro)
3329 {
3330 (*macro->emit) (tok, ntok, macro->arg);
3331 return;
3332 }
3333 }
3334 }
252b5132 3335
ea1562b3
NC
3336 /* Search opcodes. */
3337 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
3338 if (opcode)
3339 {
3340 found_something = 1;
3341 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
3342 if (opcode)
3343 {
3344 struct alpha_insn insn;
3345 assemble_insn (opcode, tok, ntok, &insn, reloc);
252b5132 3346
ea1562b3
NC
3347 /* Copy the sequence number for the reloc from the reloc token. */
3348 if (reloc != BFD_RELOC_UNUSED)
3349 insn.sequence = tok[ntok].X_add_number;
252b5132 3350
ea1562b3
NC
3351 emit_insn (&insn);
3352 return;
3353 }
3354 }
252b5132 3355
ea1562b3
NC
3356 if (found_something)
3357 {
3358 if (cpumatch)
3359 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
3360 else
3361 as_bad (_("opcode `%s' not supported for target %s"), opname,
3362 alpha_target_name);
3363 }
3364 else
3365 as_bad (_("unknown opcode `%s'"), opname);
3366}
3367\f
3368#ifdef OBJ_EVAX
252b5132 3369
576d3307 3370/* Add sym+addend to link pool.
8aacb050 3371 Return offset from curent procedure value (pv) to entry in link pool.
252b5132 3372
ea1562b3 3373 Add new fixup only if offset isn't 16bit. */
252b5132 3374
198f1251 3375static symbolS *
8aacb050 3376add_to_link_pool (symbolS *sym, offsetT addend)
ea1562b3 3377{
8aacb050 3378 symbolS *basesym;
ea1562b3
NC
3379 segT current_section = now_seg;
3380 int current_subsec = now_subseg;
ea1562b3
NC
3381 char *p;
3382 segment_info_type *seginfo = seg_info (alpha_link_section);
3383 fixS *fixp;
198f1251
TG
3384 symbolS *linksym, *expsym;
3385 expressionS e;
3739860c 3386
8aacb050
TG
3387 basesym = alpha_evax_proc->symbol;
3388
ea1562b3
NC
3389 /* @@ This assumes all entries in a given section will be of the same
3390 size... Probably correct, but unwise to rely on. */
3391 /* This must always be called with the same subsegment. */
252b5132 3392
ea1562b3
NC
3393 if (seginfo->frchainP)
3394 for (fixp = seginfo->frchainP->fix_root;
3395 fixp != (fixS *) NULL;
198f1251 3396 fixp = fixp->fx_next)
ea1562b3 3397 {
198f1251
TG
3398 if (fixp->fx_addsy == sym
3399 && fixp->fx_offset == (valueT)addend
3400 && fixp->tc_fix_data.info
3401 && fixp->tc_fix_data.info->sym
3402 && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym)
3403 return fixp->tc_fix_data.info->sym;
ea1562b3 3404 }
252b5132 3405
8aacb050 3406 /* Not found, add a new entry. */
ea1562b3 3407 subseg_set (alpha_link_section, 0);
198f1251
TG
3408 linksym = symbol_new
3409 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
ea1562b3
NC
3410 p = frag_more (8);
3411 memset (p, 0, 8);
252b5132 3412
0189c2eb 3413 /* Create a symbol for 'basesym - linksym' (offset of the added entry). */
198f1251
TG
3414 e.X_op = O_subtract;
3415 e.X_add_symbol = linksym;
3416 e.X_op_symbol = basesym;
3417 e.X_add_number = 0;
3418 expsym = make_expr_symbol (&e);
3419
0189c2eb 3420 /* Create a fixup for the entry. */
198f1251 3421 fixp = fix_new
576d3307 3422 (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64);
198f1251
TG
3423 fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--);
3424 fixp->tc_fix_data.info->sym = expsym;
252b5132 3425
ea1562b3 3426 subseg_set (current_section, current_subsec);
0189c2eb
TG
3427
3428 /* Return the symbol. */
198f1251 3429 return expsym;
ea1562b3 3430}
ea1562b3
NC
3431#endif /* OBJ_EVAX */
3432\f
3433/* Assembler directives. */
252b5132 3434
ea1562b3
NC
3435/* Handle the .text pseudo-op. This is like the usual one, but it
3436 clears alpha_insn_label and restores auto alignment. */
252b5132 3437
ea1562b3
NC
3438static void
3439s_alpha_text (int i)
ea1562b3
NC
3440{
3441#ifdef OBJ_ELF
3442 obj_elf_text (i);
3443#else
3444 s_text (i);
198f1251
TG
3445#endif
3446#ifdef OBJ_EVAX
3447 {
3448 symbolS * symbolP;
3449
3450 symbolP = symbol_find (".text");
3451 if (symbolP == NULL)
3452 {
3453 symbolP = symbol_make (".text");
3454 S_SET_SEGMENT (symbolP, text_section);
3455 symbol_table_insert (symbolP);
3456 }
3457 }
ea1562b3
NC
3458#endif
3459 alpha_insn_label = NULL;
3460 alpha_auto_align_on = 1;
3461 alpha_current_align = 0;
252b5132
RH
3462}
3463
ea1562b3
NC
3464/* Handle the .data pseudo-op. This is like the usual one, but it
3465 clears alpha_insn_label and restores auto alignment. */
252b5132
RH
3466
3467static void
ea1562b3 3468s_alpha_data (int i)
252b5132 3469{
ea1562b3
NC
3470#ifdef OBJ_ELF
3471 obj_elf_data (i);
3472#else
3473 s_data (i);
3474#endif
3475 alpha_insn_label = NULL;
3476 alpha_auto_align_on = 1;
3477 alpha_current_align = 0;
252b5132
RH
3478}
3479
ea1562b3 3480#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
252b5132 3481
198f1251 3482/* Handle the OSF/1 and openVMS .comm pseudo quirks. */
252b5132
RH
3483
3484static void
ea1562b3 3485s_alpha_comm (int ignore ATTRIBUTE_UNUSED)
252b5132 3486{
ea1562b3
NC
3487 char *name;
3488 char c;
3489 char *p;
d9319cec 3490 offsetT size;
ea1562b3 3491 symbolS *symbolP;
d9319cec
NC
3492#ifdef OBJ_EVAX
3493 offsetT temp;
198f1251 3494 int log_align = 0;
d9319cec 3495#endif
252b5132 3496
ea1562b3
NC
3497 name = input_line_pointer;
3498 c = get_symbol_end ();
252b5132 3499
ea1562b3
NC
3500 /* Just after name is now '\0'. */
3501 p = input_line_pointer;
3502 *p = c;
252b5132 3503
ea1562b3 3504 SKIP_WHITESPACE ();
252b5132 3505
ea1562b3
NC
3506 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3507 if (*input_line_pointer == ',')
252b5132 3508 {
ea1562b3
NC
3509 input_line_pointer++;
3510 SKIP_WHITESPACE ();
3511 }
198f1251 3512 if ((size = get_absolute_expression ()) < 0)
ea1562b3 3513 {
198f1251 3514 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
ea1562b3
NC
3515 ignore_rest_of_line ();
3516 return;
3517 }
252b5132 3518
ea1562b3
NC
3519 *p = 0;
3520 symbolP = symbol_find_or_make (name);
ea1562b3 3521 *p = c;
252b5132 3522
ea1562b3
NC
3523 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
3524 {
3525 as_bad (_("Ignoring attempt to re-define symbol"));
3526 ignore_rest_of_line ();
3527 return;
3528 }
3529
3530#ifdef OBJ_EVAX
198f1251
TG
3531 if (*input_line_pointer != ',')
3532 temp = 8; /* Default alignment. */
3533 else
ea1562b3 3534 {
198f1251
TG
3535 input_line_pointer++;
3536 SKIP_WHITESPACE ();
3537 temp = get_absolute_expression ();
ea1562b3 3538 }
198f1251
TG
3539
3540 /* ??? Unlike on OSF/1, the alignment factor is not in log units. */
3541 while ((temp >>= 1) != 0)
3542 ++log_align;
3543
3544 if (*input_line_pointer == ',')
ea1562b3 3545 {
198f1251
TG
3546 /* Extended form of the directive
3547
3548 .comm symbol, size, alignment, section
3549
3550 where the "common" semantics is transferred to the section.
3551 The symbol is effectively an alias for the section name. */
3552
3553 segT sec;
3554 char *sec_name;
3555 symbolS *sec_symbol;
3556 segT current_seg = now_seg;
3557 subsegT current_subseg = now_subseg;
3558 int cur_size;
3739860c 3559
198f1251
TG
3560 input_line_pointer++;
3561 SKIP_WHITESPACE ();
3562 sec_name = s_alpha_section_name ();
3563 sec_symbol = symbol_find_or_make (sec_name);
3564 sec = subseg_new (sec_name, 0);
3565 S_SET_SEGMENT (sec_symbol, sec);
3566 symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM;
d8703844
TG
3567 bfd_vms_set_section_flags (stdoutput, sec, 0,
3568 EGPS__V_OVR | EGPS__V_GBL | EGPS__V_NOMOD);
198f1251
TG
3569 record_alignment (sec, log_align);
3570
3571 /* Reuse stab_string_size to store the size of the section. */
3572 cur_size = seg_info (sec)->stabu.stab_string_size;
3573 if ((int) size > cur_size)
3574 {
3575 char *pfrag
3576 = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL,
3577 (valueT)size - (valueT)cur_size, NULL);
3578 *pfrag = 0;
3579 seg_info (sec)->stabu.stab_string_size = (int)size;
3580 }
3581
3582 S_SET_SEGMENT (symbolP, sec);
3583
3584 subseg_set (current_seg, current_subseg);
3585 }
3586 else
3587 {
3588 /* Regular form of the directive
3589
3590 .comm symbol, size, alignment
3591
3592 where the "common" semantics in on the symbol.
3593 These symbols are assembled in the .bss section. */
3594
3595 char *pfrag;
3596 segT current_seg = now_seg;
3597 subsegT current_subseg = now_subseg;
3598
3599 subseg_set (bss_section, 1);
3600 frag_align (log_align, 0, 0);
3601 record_alignment (bss_section, log_align);
3602
f8e24652 3603 symbol_set_frag (symbolP, frag_now);
198f1251
TG
3604 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
3605 size, NULL);
3606 *pfrag = 0;
3607
3608 S_SET_SEGMENT (symbolP, bss_section);
3609
3610 subseg_set (current_seg, current_subseg);
252b5132 3611 }
ea1562b3 3612#endif
3739860c 3613
198f1251
TG
3614 if (S_GET_VALUE (symbolP))
3615 {
3616 if (S_GET_VALUE (symbolP) != (valueT) size)
20203fb9 3617 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
198f1251
TG
3618 S_GET_NAME (symbolP),
3619 (long) S_GET_VALUE (symbolP),
3620 (long) size);
3621 }
252b5132
RH
3622 else
3623 {
198f1251
TG
3624#ifndef OBJ_EVAX
3625 S_SET_VALUE (symbolP, (valueT) size);
ea1562b3
NC
3626#endif
3627 S_SET_EXTERNAL (symbolP);
3628 }
3739860c 3629
198f1251
TG
3630#ifndef OBJ_EVAX
3631 know (symbolP->sy_frag == &zero_address_frag);
ea1562b3 3632#endif
ea1562b3
NC
3633 demand_empty_rest_of_line ();
3634}
252b5132 3635
ea1562b3 3636#endif /* ! OBJ_ELF */
252b5132 3637
ea1562b3 3638#ifdef OBJ_ECOFF
252b5132 3639
ea1562b3
NC
3640/* Handle the .rdata pseudo-op. This is like the usual one, but it
3641 clears alpha_insn_label and restores auto alignment. */
3642
3643static void
3644s_alpha_rdata (int ignore ATTRIBUTE_UNUSED)
3645{
87975d2a 3646 get_absolute_expression ();
ea1562b3
NC
3647 subseg_new (".rdata", 0);
3648 demand_empty_rest_of_line ();
3649 alpha_insn_label = NULL;
3650 alpha_auto_align_on = 1;
3651 alpha_current_align = 0;
252b5132
RH
3652}
3653
ea1562b3
NC
3654#endif
3655
3656#ifdef OBJ_ECOFF
3657
3658/* Handle the .sdata pseudo-op. This is like the usual one, but it
3659 clears alpha_insn_label and restores auto alignment. */
252b5132
RH
3660
3661static void
ea1562b3 3662s_alpha_sdata (int ignore ATTRIBUTE_UNUSED)
252b5132 3663{
87975d2a 3664 get_absolute_expression ();
ea1562b3
NC
3665 subseg_new (".sdata", 0);
3666 demand_empty_rest_of_line ();
3667 alpha_insn_label = NULL;
3668 alpha_auto_align_on = 1;
3669 alpha_current_align = 0;
3670}
3671#endif
252b5132 3672
ea1562b3
NC
3673#ifdef OBJ_ELF
3674struct alpha_elf_frame_data
3675{
3676 symbolS *func_sym;
3677 symbolS *func_end_sym;
3678 symbolS *prologue_sym;
3679 unsigned int mask;
3680 unsigned int fmask;
3681 int fp_regno;
3682 int ra_regno;
3683 offsetT frame_size;
3684 offsetT mask_offset;
3685 offsetT fmask_offset;
252b5132 3686
ea1562b3
NC
3687 struct alpha_elf_frame_data *next;
3688};
252b5132 3689
ea1562b3
NC
3690static struct alpha_elf_frame_data *all_frame_data;
3691static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data;
3692static struct alpha_elf_frame_data *cur_frame_data;
252b5132 3693
2f0c68f2
CM
3694extern int all_cfi_sections;
3695
ea1562b3
NC
3696/* Handle the .section pseudo-op. This is like the usual one, but it
3697 clears alpha_insn_label and restores auto alignment. */
252b5132 3698
ea1562b3
NC
3699static void
3700s_alpha_section (int ignore ATTRIBUTE_UNUSED)
3701{
3702 obj_elf_section (ignore);
252b5132 3703
ea1562b3
NC
3704 alpha_insn_label = NULL;
3705 alpha_auto_align_on = 1;
3706 alpha_current_align = 0;
3707}
252b5132 3708
ea1562b3
NC
3709static void
3710s_alpha_ent (int dummy ATTRIBUTE_UNUSED)
3711{
3712 if (ECOFF_DEBUGGING)
3713 ecoff_directive_ent (0);
252b5132
RH
3714 else
3715 {
ea1562b3
NC
3716 char *name, name_end;
3717 name = input_line_pointer;
3718 name_end = get_symbol_end ();
2f0c68f2
CM
3719 /* CFI_EMIT_eh_frame is the default. */
3720 all_cfi_sections = CFI_EMIT_eh_frame;
252b5132 3721
ea1562b3 3722 if (! is_name_beginner (*name))
252b5132 3723 {
ea1562b3
NC
3724 as_warn (_(".ent directive has no name"));
3725 *input_line_pointer = name_end;
252b5132 3726 }
ea1562b3 3727 else
252b5132 3728 {
ea1562b3 3729 symbolS *sym;
252b5132 3730
ea1562b3
NC
3731 if (cur_frame_data)
3732 as_warn (_("nested .ent directives"));
252b5132 3733
ea1562b3
NC
3734 sym = symbol_find_or_make (name);
3735 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
252b5132 3736
21d799b5
NC
3737 cur_frame_data = (struct alpha_elf_frame_data *)
3738 calloc (1, sizeof (*cur_frame_data));
ea1562b3 3739 cur_frame_data->func_sym = sym;
252b5132 3740
ea1562b3
NC
3741 /* Provide sensible defaults. */
3742 cur_frame_data->fp_regno = 30; /* sp */
3743 cur_frame_data->ra_regno = 26; /* ra */
252b5132 3744
ea1562b3
NC
3745 *plast_frame_data = cur_frame_data;
3746 plast_frame_data = &cur_frame_data->next;
3747
3748 /* The .ent directive is sometimes followed by a number. Not sure
3749 what it really means, but ignore it. */
3750 *input_line_pointer = name_end;
3751 SKIP_WHITESPACE ();
3752 if (*input_line_pointer == ',')
3753 {
3754 input_line_pointer++;
3755 SKIP_WHITESPACE ();
3756 }
3757 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
3758 (void) get_absolute_expression ();
3759 }
3760 demand_empty_rest_of_line ();
3761 }
3762}
252b5132
RH
3763
3764static void
ea1562b3 3765s_alpha_end (int dummy ATTRIBUTE_UNUSED)
252b5132 3766{
ea1562b3
NC
3767 if (ECOFF_DEBUGGING)
3768 ecoff_directive_end (0);
252b5132 3769 else
ea1562b3
NC
3770 {
3771 char *name, name_end;
3772 name = input_line_pointer;
3773 name_end = get_symbol_end ();
252b5132 3774
ea1562b3
NC
3775 if (! is_name_beginner (*name))
3776 {
3777 as_warn (_(".end directive has no name"));
3778 *input_line_pointer = name_end;
3779 }
3780 else
3781 {
3782 symbolS *sym;
252b5132 3783
ea1562b3
NC
3784 sym = symbol_find (name);
3785 if (!cur_frame_data)
3786 as_warn (_(".end directive without matching .ent"));
3787 else if (sym != cur_frame_data->func_sym)
3788 as_warn (_(".end directive names different symbol than .ent"));
252b5132 3789
ea1562b3
NC
3790 /* Create an expression to calculate the size of the function. */
3791 if (sym && cur_frame_data)
3792 {
3793 OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym);
21d799b5 3794 expressionS *exp = (expressionS *) xmalloc (sizeof (expressionS));
252b5132 3795
ea1562b3
NC
3796 obj->size = exp;
3797 exp->X_op = O_subtract;
3798 exp->X_add_symbol = symbol_temp_new_now ();
3799 exp->X_op_symbol = sym;
3800 exp->X_add_number = 0;
252b5132 3801
ea1562b3
NC
3802 cur_frame_data->func_end_sym = exp->X_add_symbol;
3803 }
252b5132 3804
ea1562b3 3805 cur_frame_data = NULL;
252b5132 3806
ea1562b3
NC
3807 *input_line_pointer = name_end;
3808 }
3809 demand_empty_rest_of_line ();
3810 }
252b5132
RH
3811}
3812
252b5132 3813static void
ea1562b3 3814s_alpha_mask (int fp)
252b5132 3815{
ea1562b3
NC
3816 if (ECOFF_DEBUGGING)
3817 {
3818 if (fp)
3819 ecoff_directive_fmask (0);
3820 else
3821 ecoff_directive_mask (0);
3822 }
252b5132 3823 else
ea1562b3
NC
3824 {
3825 long val;
3826 offsetT offset;
252b5132 3827
ea1562b3
NC
3828 if (!cur_frame_data)
3829 {
3830 if (fp)
3831 as_warn (_(".fmask outside of .ent"));
3832 else
3833 as_warn (_(".mask outside of .ent"));
3834 discard_rest_of_line ();
3835 return;
3836 }
252b5132 3837
ea1562b3
NC
3838 if (get_absolute_expression_and_terminator (&val) != ',')
3839 {
3840 if (fp)
3841 as_warn (_("bad .fmask directive"));
3842 else
3843 as_warn (_("bad .mask directive"));
3844 --input_line_pointer;
3845 discard_rest_of_line ();
3846 return;
3847 }
252b5132 3848
ea1562b3
NC
3849 offset = get_absolute_expression ();
3850 demand_empty_rest_of_line ();
252b5132 3851
ea1562b3
NC
3852 if (fp)
3853 {
3854 cur_frame_data->fmask = val;
3855 cur_frame_data->fmask_offset = offset;
3856 }
3857 else
3858 {
3859 cur_frame_data->mask = val;
3860 cur_frame_data->mask_offset = offset;
3861 }
3862 }
252b5132 3863}
252b5132
RH
3864
3865static void
ea1562b3 3866s_alpha_frame (int dummy ATTRIBUTE_UNUSED)
252b5132 3867{
ea1562b3
NC
3868 if (ECOFF_DEBUGGING)
3869 ecoff_directive_frame (0);
3870 else
3871 {
3872 long val;
252b5132 3873
ea1562b3
NC
3874 if (!cur_frame_data)
3875 {
3876 as_warn (_(".frame outside of .ent"));
3877 discard_rest_of_line ();
3878 return;
3879 }
252b5132 3880
ea1562b3 3881 cur_frame_data->fp_regno = tc_get_register (1);
252b5132 3882
ea1562b3
NC
3883 SKIP_WHITESPACE ();
3884 if (*input_line_pointer++ != ','
3885 || get_absolute_expression_and_terminator (&val) != ',')
3886 {
3887 as_warn (_("bad .frame directive"));
3888 --input_line_pointer;
3889 discard_rest_of_line ();
3890 return;
3891 }
3892 cur_frame_data->frame_size = val;
252b5132 3893
ea1562b3
NC
3894 cur_frame_data->ra_regno = tc_get_register (0);
3895
3896 /* Next comes the "offset of saved $a0 from $sp". In gcc terms
3897 this is current_function_pretend_args_size. There's no place
3898 to put this value, so ignore it. */
3899 s_ignore (42);
3900 }
3901}
252b5132
RH
3902
3903static void
ea1562b3 3904s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
252b5132 3905{
ea1562b3
NC
3906 symbolS *sym;
3907 int arg;
252b5132 3908
ea1562b3
NC
3909 arg = get_absolute_expression ();
3910 demand_empty_rest_of_line ();
198f1251
TG
3911 alpha_prologue_label = symbol_new
3912 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
252b5132 3913
ea1562b3
NC
3914 if (ECOFF_DEBUGGING)
3915 sym = ecoff_get_cur_proc_sym ();
3916 else
3917 sym = cur_frame_data ? cur_frame_data->func_sym : NULL;
252b5132 3918
ea1562b3 3919 if (sym == NULL)
252b5132 3920 {
ea1562b3 3921 as_bad (_(".prologue directive without a preceding .ent directive"));
252b5132
RH
3922 return;
3923 }
3924
ea1562b3 3925 switch (arg)
252b5132 3926 {
ea1562b3
NC
3927 case 0: /* No PV required. */
3928 S_SET_OTHER (sym, STO_ALPHA_NOPV
3929 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
3930 break;
3931 case 1: /* Std GP load. */
3932 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
3933 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
3934 break;
3935 case 2: /* Non-std use of PV. */
3936 break;
252b5132 3937
ea1562b3
NC
3938 default:
3939 as_bad (_("Invalid argument %d to .prologue."), arg);
3940 break;
252b5132
RH
3941 }
3942
ea1562b3
NC
3943 if (cur_frame_data)
3944 cur_frame_data->prologue_sym = symbol_temp_new_now ();
252b5132
RH
3945}
3946
ea1562b3 3947static char *first_file_directive;
252b5132
RH
3948
3949static void
ea1562b3 3950s_alpha_file (int ignore ATTRIBUTE_UNUSED)
252b5132 3951{
ea1562b3
NC
3952 /* Save the first .file directive we see, so that we can change our
3953 minds about whether ecoff debugging should or shouldn't be enabled. */
3954 if (alpha_flag_mdebug < 0 && ! first_file_directive)
3955 {
3956 char *start = input_line_pointer;
3957 size_t len;
252b5132 3958
ea1562b3 3959 discard_rest_of_line ();
252b5132 3960
ea1562b3 3961 len = input_line_pointer - start;
21d799b5 3962 first_file_directive = (char *) xmalloc (len + 1);
ea1562b3
NC
3963 memcpy (first_file_directive, start, len);
3964 first_file_directive[len] = '\0';
252b5132 3965
ea1562b3
NC
3966 input_line_pointer = start;
3967 }
252b5132 3968
ea1562b3
NC
3969 if (ECOFF_DEBUGGING)
3970 ecoff_directive_file (0);
3971 else
3972 dwarf2_directive_file (0);
3973}
252b5132
RH
3974
3975static void
ea1562b3 3976s_alpha_loc (int ignore ATTRIBUTE_UNUSED)
252b5132 3977{
ea1562b3
NC
3978 if (ECOFF_DEBUGGING)
3979 ecoff_directive_loc (0);
3980 else
3981 dwarf2_directive_loc (0);
252b5132 3982}
252b5132 3983
ea1562b3
NC
3984static void
3985s_alpha_stab (int n)
f37f01cf 3986{
ea1562b3
NC
3987 /* If we've been undecided about mdebug, make up our minds in favour. */
3988 if (alpha_flag_mdebug < 0)
3989 {
3990 segT sec = subseg_new (".mdebug", 0);
3991 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
3992 bfd_set_section_alignment (stdoutput, sec, 3);
f37f01cf 3993
ea1562b3 3994 ecoff_read_begin_hook ();
f37f01cf 3995
ea1562b3
NC
3996 if (first_file_directive)
3997 {
3998 char *save_ilp = input_line_pointer;
3999 input_line_pointer = first_file_directive;
4000 ecoff_directive_file (0);
4001 input_line_pointer = save_ilp;
4002 free (first_file_directive);
4003 }
252b5132 4004
ea1562b3
NC
4005 alpha_flag_mdebug = 1;
4006 }
4007 s_stab (n);
4008}
252b5132
RH
4009
4010static void
ea1562b3 4011s_alpha_coff_wrapper (int which)
252b5132 4012{
5a49b8ac 4013 static void (* const fns[]) (int) = {
ea1562b3
NC
4014 ecoff_directive_begin,
4015 ecoff_directive_bend,
4016 ecoff_directive_def,
4017 ecoff_directive_dim,
4018 ecoff_directive_endef,
4019 ecoff_directive_scl,
4020 ecoff_directive_tag,
4021 ecoff_directive_val,
4022 };
252b5132 4023
9c2799c2 4024 gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
252b5132 4025
252b5132 4026 if (ECOFF_DEBUGGING)
ea1562b3 4027 (*fns[which]) (0);
252b5132
RH
4028 else
4029 {
ea1562b3
NC
4030 as_bad (_("ECOFF debugging is disabled."));
4031 ignore_rest_of_line ();
4032 }
4033}
252b5132 4034
ea1562b3
NC
4035/* Called at the end of assembly. Here we emit unwind info for frames
4036 unless the compiler has done it for us. */
252b5132 4037
ea1562b3
NC
4038void
4039alpha_elf_md_end (void)
4040{
4041 struct alpha_elf_frame_data *p;
f37f01cf 4042
ea1562b3
NC
4043 if (cur_frame_data)
4044 as_warn (_(".ent directive without matching .end"));
f37f01cf 4045
ea1562b3
NC
4046 /* If someone has generated the unwind info themselves, great. */
4047 if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL)
4048 return;
f37f01cf 4049
af385746
RH
4050 /* ??? In theory we could look for functions for which we have
4051 generated unwind info via CFI directives, and those we have not.
4052 Those we have not could still get their unwind info from here.
4053 For now, do nothing if we've seen any CFI directives. Note that
4054 the above test will not trigger, as we've not emitted data yet. */
4055 if (all_fde_data != NULL)
4056 return;
4057
ea1562b3
NC
4058 /* Generate .eh_frame data for the unwind directives specified. */
4059 for (p = all_frame_data; p ; p = p->next)
4060 if (p->prologue_sym)
4061 {
4062 /* Create a temporary symbol at the same location as our
4063 function symbol. This prevents problems with globals. */
4064 cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym),
4065 S_GET_VALUE (p->func_sym),
4066 symbol_get_frag (p->func_sym)));
252b5132 4067
2f0c68f2 4068 cfi_set_sections ();
ea1562b3
NC
4069 cfi_set_return_column (p->ra_regno);
4070 cfi_add_CFA_def_cfa_register (30);
4071 if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size)
4072 {
4073 unsigned int mask;
4074 offsetT offset;
252b5132 4075
ea1562b3 4076 cfi_add_advance_loc (p->prologue_sym);
252b5132 4077
ea1562b3
NC
4078 if (p->fp_regno != 30)
4079 if (p->frame_size != 0)
4080 cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size);
4081 else
4082 cfi_add_CFA_def_cfa_register (p->fp_regno);
4083 else if (p->frame_size != 0)
4084 cfi_add_CFA_def_cfa_offset (p->frame_size);
252b5132 4085
ea1562b3
NC
4086 mask = p->mask;
4087 offset = p->mask_offset;
252b5132 4088
ea1562b3
NC
4089 /* Recall that $26 is special-cased and stored first. */
4090 if ((mask >> 26) & 1)
4091 {
4092 cfi_add_CFA_offset (26, offset);
4093 offset += 8;
4094 mask &= ~(1 << 26);
4095 }
4096 while (mask)
4097 {
4098 unsigned int i;
4099 i = mask & -mask;
4100 mask ^= i;
4101 i = ffs (i) - 1;
f37f01cf 4102
ea1562b3
NC
4103 cfi_add_CFA_offset (i, offset);
4104 offset += 8;
4105 }
f37f01cf 4106
ea1562b3
NC
4107 mask = p->fmask;
4108 offset = p->fmask_offset;
4109 while (mask)
4110 {
4111 unsigned int i;
4112 i = mask & -mask;
4113 mask ^= i;
4114 i = ffs (i) - 1;
252b5132 4115
ea1562b3
NC
4116 cfi_add_CFA_offset (i + 32, offset);
4117 offset += 8;
4118 }
4119 }
252b5132 4120
ea1562b3
NC
4121 cfi_end_fde (p->func_end_sym);
4122 }
252b5132
RH
4123}
4124
4125static void
ea1562b3 4126s_alpha_usepv (int unused ATTRIBUTE_UNUSED)
252b5132 4127{
ea1562b3
NC
4128 char *name, name_end;
4129 char *which, which_end;
4130 symbolS *sym;
4131 int other;
f37f01cf 4132
ea1562b3
NC
4133 name = input_line_pointer;
4134 name_end = get_symbol_end ();
f37f01cf 4135
ea1562b3
NC
4136 if (! is_name_beginner (*name))
4137 {
4138 as_bad (_(".usepv directive has no name"));
4139 *input_line_pointer = name_end;
4140 ignore_rest_of_line ();
4141 return;
4142 }
f37f01cf 4143
ea1562b3
NC
4144 sym = symbol_find_or_make (name);
4145 *input_line_pointer++ = name_end;
f37f01cf 4146
ea1562b3
NC
4147 if (name_end != ',')
4148 {
4149 as_bad (_(".usepv directive has no type"));
4150 ignore_rest_of_line ();
4151 return;
f37f01cf 4152 }
252b5132 4153
ea1562b3
NC
4154 SKIP_WHITESPACE ();
4155 which = input_line_pointer;
4156 which_end = get_symbol_end ();
4157
4158 if (strcmp (which, "no") == 0)
4159 other = STO_ALPHA_NOPV;
4160 else if (strcmp (which, "std") == 0)
4161 other = STO_ALPHA_STD_GPLOAD;
252b5132 4162 else
f37f01cf 4163 {
ea1562b3
NC
4164 as_bad (_("unknown argument for .usepv"));
4165 other = 0;
4166 }
f37f01cf 4167
ea1562b3
NC
4168 *input_line_pointer = which_end;
4169 demand_empty_rest_of_line ();
f37f01cf 4170
ea1562b3
NC
4171 S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4172}
4173#endif /* OBJ_ELF */
f37f01cf 4174
ea1562b3 4175/* Standard calling conventions leaves the CFA at $30 on entry. */
f37f01cf 4176
ea1562b3
NC
4177void
4178alpha_cfi_frame_initial_instructions (void)
4179{
4180 cfi_add_CFA_def_cfa_register (30);
252b5132
RH
4181}
4182
ea1562b3
NC
4183#ifdef OBJ_EVAX
4184
198f1251
TG
4185/* Get name of section. */
4186static char *
4187s_alpha_section_name (void)
4188{
4189 char *name;
4190
4191 SKIP_WHITESPACE ();
4192 if (*input_line_pointer == '"')
4193 {
4194 int dummy;
4195
4196 name = demand_copy_C_string (&dummy);
4197 if (name == NULL)
4198 {
4199 ignore_rest_of_line ();
4200 return NULL;
4201 }
4202 }
4203 else
4204 {
4205 char *end = input_line_pointer;
4206
4207 while (0 == strchr ("\n\t,; ", *end))
4208 end++;
4209 if (end == input_line_pointer)
4210 {
4211 as_warn (_("missing name"));
4212 ignore_rest_of_line ();
4213 return NULL;
4214 }
4215
4216 name = xmalloc (end - input_line_pointer + 1);
4217 memcpy (name, input_line_pointer, end - input_line_pointer);
4218 name[end - input_line_pointer] = '\0';
4219 input_line_pointer = end;
4220 }
4221 SKIP_WHITESPACE ();
4222 return name;
4223}
4224
d8703844
TG
4225/* Put clear/set flags in one flagword. The LSBs are flags to be set,
4226 the MSBs are the flags to be cleared. */
4227
4228#define EGPS__V_NO_SHIFT 16
4229#define EGPS__V_MASK 0xffff
4230
4231/* Parse one VMS section flag. */
4232
198f1251
TG
4233static flagword
4234s_alpha_section_word (char *str, size_t len)
4235{
4236 int no = 0;
4237 flagword flag = 0;
4238
4239 if (len == 5 && strncmp (str, "NO", 2) == 0)
4240 {
4241 no = 1;
4242 str += 2;
3739860c 4243 len -= 2;
198f1251
TG
4244 }
4245
4246 if (len == 3)
4247 {
4248 if (strncmp (str, "PIC", 3) == 0)
d8703844 4249 flag = EGPS__V_PIC;
198f1251 4250 else if (strncmp (str, "LIB", 3) == 0)
d8703844 4251 flag = EGPS__V_LIB;
198f1251 4252 else if (strncmp (str, "OVR", 3) == 0)
d8703844 4253 flag = EGPS__V_OVR;
198f1251 4254 else if (strncmp (str, "REL", 3) == 0)
d8703844 4255 flag = EGPS__V_REL;
198f1251 4256 else if (strncmp (str, "GBL", 3) == 0)
d8703844 4257 flag = EGPS__V_GBL;
198f1251 4258 else if (strncmp (str, "SHR", 3) == 0)
d8703844 4259 flag = EGPS__V_SHR;
198f1251 4260 else if (strncmp (str, "EXE", 3) == 0)
d8703844 4261 flag = EGPS__V_EXE;
198f1251 4262 else if (strncmp (str, "WRT", 3) == 0)
d8703844 4263 flag = EGPS__V_WRT;
198f1251 4264 else if (strncmp (str, "VEC", 3) == 0)
d8703844 4265 flag = EGPS__V_VEC;
198f1251
TG
4266 else if (strncmp (str, "MOD", 3) == 0)
4267 {
d8703844 4268 flag = no ? EGPS__V_NOMOD : EGPS__V_NOMOD << EGPS__V_NO_SHIFT;
198f1251
TG
4269 no = 0;
4270 }
4271 else if (strncmp (str, "COM", 3) == 0)
d8703844 4272 flag = EGPS__V_COM;
198f1251
TG
4273 }
4274
4275 if (flag == 0)
4276 {
4277 char c = str[len];
4278 str[len] = 0;
4279 as_warn (_("unknown section attribute %s"), str);
4280 str[len] = c;
4281 return 0;
4282 }
4283
4284 if (no)
d8703844 4285 return flag << EGPS__V_NO_SHIFT;
198f1251
TG
4286 else
4287 return flag;
4288}
4289
ea1562b3
NC
4290/* Handle the section specific pseudo-op. */
4291
198f1251
TG
4292#define EVAX_SECTION_COUNT 5
4293
4294static char *section_name[EVAX_SECTION_COUNT + 1] =
4295 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4296
252b5132 4297static void
ea1562b3 4298s_alpha_section (int secid)
252b5132 4299{
198f1251
TG
4300 char *name, *beg;
4301 segT sec;
4302 flagword vms_flags = 0;
4303 symbolS *symbol;
252b5132 4304
198f1251 4305 if (secid == 0)
81283cde 4306 {
198f1251
TG
4307 name = s_alpha_section_name ();
4308 if (name == NULL)
4309 return;
4310 sec = subseg_new (name, 0);
4311 if (*input_line_pointer == ',')
4312 {
4313 /* Skip the comma. */
4314 ++input_line_pointer;
4315 SKIP_WHITESPACE ();
4316
4317 do
4318 {
4319 char c;
4320
4321 SKIP_WHITESPACE ();
4322 beg = input_line_pointer;
4323 c = get_symbol_end ();
4324 *input_line_pointer = c;
4325
4326 vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg);
4327
4328 SKIP_WHITESPACE ();
4329 }
4330 while (*input_line_pointer++ == ',');
4331 --input_line_pointer;
4332 }
4333
4334 symbol = symbol_find_or_make (name);
4335 S_SET_SEGMENT (symbol, sec);
4336 symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM;
d8703844
TG
4337 bfd_vms_set_section_flags
4338 (stdoutput, sec,
4339 (vms_flags >> EGPS__V_NO_SHIFT) & EGPS__V_MASK,
4340 vms_flags & EGPS__V_MASK);
81283cde 4341 }
198f1251
TG
4342 else
4343 {
87975d2a 4344 get_absolute_expression ();
198f1251
TG
4345 subseg_new (section_name[secid], 0);
4346 }
4347
4348 demand_empty_rest_of_line ();
4349 alpha_insn_label = NULL;
4350 alpha_auto_align_on = 1;
4351 alpha_current_align = 0;
4352}
4353
4354static void
4355s_alpha_literals (int ignore ATTRIBUTE_UNUSED)
4356{
4357 subseg_new (".literals", 0);
ea1562b3
NC
4358 demand_empty_rest_of_line ();
4359 alpha_insn_label = NULL;
4360 alpha_auto_align_on = 1;
4361 alpha_current_align = 0;
252b5132
RH
4362}
4363
ea1562b3 4364/* Parse .ent directives. */
a8316fe2 4365
4dc7ead9 4366static void
ea1562b3 4367s_alpha_ent (int ignore ATTRIBUTE_UNUSED)
4dc7ead9 4368{
ea1562b3
NC
4369 symbolS *symbol;
4370 expressionS symexpr;
a8316fe2 4371
4b1c4d2b
TG
4372 if (alpha_evax_proc != NULL)
4373 as_bad (_("previous .ent not closed by a .end"));
4374
4375 alpha_evax_proc = &alpha_evax_proc_data;
198f1251
TG
4376
4377 alpha_evax_proc->pdsckind = 0;
4378 alpha_evax_proc->framereg = -1;
4379 alpha_evax_proc->framesize = 0;
4380 alpha_evax_proc->rsa_offset = 0;
4381 alpha_evax_proc->ra_save = AXP_REG_RA;
4382 alpha_evax_proc->fp_save = -1;
4383 alpha_evax_proc->imask = 0;
4384 alpha_evax_proc->fmask = 0;
4385 alpha_evax_proc->prologue = 0;
4386 alpha_evax_proc->type = 0;
4387 alpha_evax_proc->handler = 0;
4388 alpha_evax_proc->handler_data = 0;
a8316fe2 4389
ea1562b3 4390 expression (&symexpr);
a8316fe2 4391
ea1562b3
NC
4392 if (symexpr.X_op != O_symbol)
4393 {
4394 as_fatal (_(".ent directive has no symbol"));
4395 demand_empty_rest_of_line ();
4396 return;
a8316fe2
RH
4397 }
4398
ea1562b3
NC
4399 symbol = make_expr_symbol (&symexpr);
4400 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
198f1251
TG
4401 alpha_evax_proc->symbol = symbol;
4402
ea1562b3 4403 demand_empty_rest_of_line ();
4dc7ead9
RH
4404}
4405
198f1251
TG
4406static void
4407s_alpha_handler (int is_data)
4408{
4409 if (is_data)
4410 alpha_evax_proc->handler_data = get_absolute_expression ();
4411 else
4412 {
4413 char *name, name_end;
4414 name = input_line_pointer;
4415 name_end = get_symbol_end ();
4416
4417 if (! is_name_beginner (*name))
4418 {
4419 as_warn (_(".handler directive has no name"));
4420 *input_line_pointer = name_end;
4421 }
4422 else
4423 {
4424 symbolS *sym;
4425
4426 sym = symbol_find_or_make (name);
4427 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4428 alpha_evax_proc->handler = sym;
4429 *input_line_pointer = name_end;
4430 }
4431 }
4432 demand_empty_rest_of_line ();
4433}
4434
ea1562b3
NC
4435/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4436
a8316fe2 4437static void
ea1562b3 4438s_alpha_frame (int ignore ATTRIBUTE_UNUSED)
a8316fe2 4439{
ea1562b3 4440 long val;
467b607e 4441 int ra;
a8316fe2 4442
198f1251 4443 alpha_evax_proc->framereg = tc_get_register (1);
a8316fe2 4444
ea1562b3
NC
4445 SKIP_WHITESPACE ();
4446 if (*input_line_pointer++ != ','
4447 || get_absolute_expression_and_terminator (&val) != ',')
4448 {
4449 as_warn (_("Bad .frame directive 1./2. param"));
4450 --input_line_pointer;
4451 demand_empty_rest_of_line ();
4452 return;
4453 }
a8316fe2 4454
198f1251 4455 alpha_evax_proc->framesize = val;
ea1562b3 4456
467b607e
TG
4457 ra = tc_get_register (1);
4458 if (ra != AXP_REG_RA)
4459 as_warn (_("Bad RA (%d) register for .frame"), ra);
4460
ea1562b3
NC
4461 SKIP_WHITESPACE ();
4462 if (*input_line_pointer++ != ',')
4463 {
4464 as_warn (_("Bad .frame directive 3./4. param"));
4465 --input_line_pointer;
4466 demand_empty_rest_of_line ();
4467 return;
a8316fe2 4468 }
198f1251
TG
4469 alpha_evax_proc->rsa_offset = get_absolute_expression ();
4470}
4471
51794af8
TG
4472/* Parse .prologue. */
4473
198f1251
TG
4474static void
4475s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
4476{
198f1251
TG
4477 demand_empty_rest_of_line ();
4478 alpha_prologue_label = symbol_new
4479 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
a8316fe2
RH
4480}
4481
467b607e 4482/* Parse .pdesc <entry_name>,{null|stack|reg}
51794af8
TG
4483 Insert a procedure descriptor. */
4484
252b5132 4485static void
ea1562b3 4486s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED)
252b5132 4487{
ea1562b3
NC
4488 char *name;
4489 char name_end;
ed9e98c2 4490 char *p;
ea1562b3
NC
4491 expressionS exp;
4492 symbolS *entry_sym;
198f1251 4493 const char *entry_sym_name;
4b1c4d2b
TG
4494 const char *pdesc_sym_name;
4495 fixS *fixp;
4496 size_t len;
252b5132 4497
ea1562b3
NC
4498 if (now_seg != alpha_link_section)
4499 {
4500 as_bad (_(".pdesc directive not in link (.link) section"));
ea1562b3
NC
4501 return;
4502 }
252b5132 4503
198f1251
TG
4504 expression (&exp);
4505 if (exp.X_op != O_symbol)
252b5132 4506 {
4b1c4d2b 4507 as_bad (_(".pdesc directive has no entry symbol"));
ea1562b3 4508 return;
252b5132 4509 }
3739860c 4510
198f1251 4511 entry_sym = make_expr_symbol (&exp);
4b1c4d2b 4512 entry_sym_name = S_GET_NAME (entry_sym);
3739860c 4513
8aacb050 4514 /* Strip "..en". */
198f1251 4515 len = strlen (entry_sym_name);
4b1c4d2b 4516 if (len < 4 || strcmp (entry_sym_name + len - 4, "..en") != 0)
ea1562b3 4517 {
4b1c4d2b
TG
4518 as_bad (_(".pdesc has a bad entry symbol"));
4519 return;
4520 }
4521 len -= 4;
4522 pdesc_sym_name = S_GET_NAME (alpha_evax_proc->symbol);
4523
4524 if (!alpha_evax_proc
4525 || !S_IS_DEFINED (alpha_evax_proc->symbol)
4526 || strlen (pdesc_sym_name) != len
4527 || memcmp (entry_sym_name, pdesc_sym_name, len) != 0)
4528 {
4529 as_fatal (_(".pdesc doesn't match with last .ent"));
ea1562b3
NC
4530 return;
4531 }
f37f01cf 4532
8aacb050 4533 /* Define pdesc symbol. */
4b1c4d2b 4534 symbol_set_value_now (alpha_evax_proc->symbol);
3739860c 4535
198f1251
TG
4536 /* Save bfd symbol of proc entry in function symbol. */
4537 ((struct evax_private_udata_struct *)
4538 symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym
4539 = symbol_get_bfdsym (entry_sym);
3739860c 4540
ea1562b3
NC
4541 SKIP_WHITESPACE ();
4542 if (*input_line_pointer++ != ',')
4543 {
4544 as_warn (_("No comma after .pdesc <entryname>"));
4545 demand_empty_rest_of_line ();
4546 return;
4547 }
f37f01cf 4548
ea1562b3
NC
4549 SKIP_WHITESPACE ();
4550 name = input_line_pointer;
4551 name_end = get_symbol_end ();
f37f01cf 4552
ea1562b3 4553 if (strncmp (name, "stack", 5) == 0)
198f1251 4554 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK;
f37f01cf 4555
ea1562b3 4556 else if (strncmp (name, "reg", 3) == 0)
198f1251 4557 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER;
f37f01cf 4558
ea1562b3 4559 else if (strncmp (name, "null", 4) == 0)
198f1251 4560 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL;
f37f01cf 4561
ea1562b3
NC
4562 else
4563 {
4564 as_fatal (_("unknown procedure kind"));
4565 demand_empty_rest_of_line ();
4566 return;
4567 }
f37f01cf 4568
ea1562b3
NC
4569 *input_line_pointer = name_end;
4570 demand_empty_rest_of_line ();
f37f01cf 4571
ea1562b3
NC
4572#ifdef md_flush_pending_output
4573 md_flush_pending_output ();
4574#endif
252b5132
RH
4575
4576 frag_align (3, 0, 0);
4577 p = frag_more (16);
4578 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4579 fixp->fx_done = 1;
252b5132 4580
198f1251
TG
4581 *p = alpha_evax_proc->pdsckind
4582 | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0)
4583 | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0)
4584 | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0);
66498417 4585 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
252b5132 4586
198f1251 4587 switch (alpha_evax_proc->pdsckind)
252b5132 4588 {
1aad8cf8 4589 case PDSC_S_K_KIND_NULL:
66498417
KH
4590 *(p + 2) = 0;
4591 *(p + 3) = 0;
1aad8cf8
KH
4592 break;
4593 case PDSC_S_K_KIND_FP_REGISTER:
198f1251
TG
4594 *(p + 2) = alpha_evax_proc->fp_save;
4595 *(p + 3) = alpha_evax_proc->ra_save;
1aad8cf8
KH
4596 break;
4597 case PDSC_S_K_KIND_FP_STACK:
198f1251 4598 md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2);
1aad8cf8
KH
4599 break;
4600 default: /* impossible */
4601 break;
252b5132
RH
4602 }
4603
66498417 4604 *(p + 4) = 0;
198f1251 4605 *(p + 5) = alpha_evax_proc->type & 0x0f;
252b5132
RH
4606
4607 /* Signature offset. */
66498417 4608 md_number_to_chars (p + 6, (valueT) 0, 2);
252b5132 4609
af24f60c
TG
4610 fix_new_exp (frag_now, p - frag_now->fr_literal + 8,
4611 8, &exp, 0, BFD_RELOC_64);
252b5132 4612
198f1251 4613 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL)
252b5132
RH
4614 return;
4615
252b5132 4616 /* pdesc+16: Size. */
af24f60c 4617 p = frag_more (6);
198f1251 4618 md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4);
66498417 4619 md_number_to_chars (p + 4, (valueT) 0, 2);
252b5132
RH
4620
4621 /* Entry length. */
198f1251
TG
4622 exp.X_op = O_subtract;
4623 exp.X_add_symbol = alpha_prologue_label;
4624 exp.X_op_symbol = entry_sym;
4625 emit_expr (&exp, 2);
252b5132 4626
198f1251 4627 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER)
252b5132
RH
4628 return;
4629
252b5132 4630 /* pdesc+24: register masks. */
af24f60c 4631 p = frag_more (8);
198f1251
TG
4632 md_number_to_chars (p, alpha_evax_proc->imask, 4);
4633 md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4);
4634
4635 if (alpha_evax_proc->handler)
4636 {
4637 p = frag_more (8);
4638 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8,
4639 alpha_evax_proc->handler, 0, 0, BFD_RELOC_64);
4640 }
4641
4642 if (alpha_evax_proc->handler_data)
4643 {
198f1251 4644 p = frag_more (8);
198f1251
TG
4645 md_number_to_chars (p, alpha_evax_proc->handler_data, 8);
4646 }
252b5132
RH
4647}
4648
252b5132
RH
4649/* Support for crash debug on vms. */
4650
4651static void
ea1562b3 4652s_alpha_name (int ignore ATTRIBUTE_UNUSED)
252b5132 4653{
ea1562b3 4654 char *p;
252b5132 4655 expressionS exp;
252b5132
RH
4656
4657 if (now_seg != alpha_link_section)
4658 {
4659 as_bad (_(".name directive not in link (.link) section"));
4660 demand_empty_rest_of_line ();
4661 return;
4662 }
4663
4664 expression (&exp);
4665 if (exp.X_op != O_symbol)
4666 {
4667 as_warn (_(".name directive has no symbol"));
4668 demand_empty_rest_of_line ();
4669 return;
4670 }
4671
4672 demand_empty_rest_of_line ();
4673
4674#ifdef md_flush_pending_output
4675 md_flush_pending_output ();
4676#endif
4677
4678 frag_align (3, 0, 0);
4679 p = frag_more (8);
252b5132 4680
66498417 4681 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
252b5132
RH
4682}
4683
51794af8
TG
4684/* Parse .linkage <symbol>.
4685 Create a linkage pair relocation. */
4686
252b5132 4687static void
ea1562b3 4688s_alpha_linkage (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4689{
4690 expressionS exp;
4691 char *p;
198f1251 4692 fixS *fixp;
252b5132
RH
4693
4694#ifdef md_flush_pending_output
4695 md_flush_pending_output ();
4696#endif
4697
4698 expression (&exp);
4699 if (exp.X_op != O_symbol)
4700 {
4701 as_fatal (_("No symbol after .linkage"));
4702 }
4703 else
4704 {
198f1251 4705 struct alpha_linkage_fixups *linkage_fixup;
3739860c 4706
252b5132
RH
4707 p = frag_more (LKP_S_K_SIZE);
4708 memset (p, 0, LKP_S_K_SIZE);
198f1251 4709 fixp = fix_new_exp
0ac5db19 4710 (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,
198f1251
TG
4711 BFD_RELOC_ALPHA_LINKAGE);
4712
0ac5db19
TG
4713 if (alpha_insn_label == NULL)
4714 alpha_insn_label = symbol_new
4715 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
4716
4717 /* Create a linkage element. */
198f1251
TG
4718 linkage_fixup = (struct alpha_linkage_fixups *)
4719 xmalloc (sizeof (struct alpha_linkage_fixups));
198f1251 4720 linkage_fixup->fixp = fixp;
0ac5db19 4721 linkage_fixup->next = NULL;
198f1251
TG
4722 linkage_fixup->label = alpha_insn_label;
4723
0ac5db19
TG
4724 /* Append it to the list. */
4725 if (alpha_linkage_fixup_root == NULL)
4726 alpha_linkage_fixup_root = linkage_fixup;
198f1251 4727 else
0ac5db19
TG
4728 alpha_linkage_fixup_tail->next = linkage_fixup;
4729 alpha_linkage_fixup_tail = linkage_fixup;
252b5132
RH
4730 }
4731 demand_empty_rest_of_line ();
252b5132
RH
4732}
4733
51794af8
TG
4734/* Parse .code_address <symbol>.
4735 Create a code address relocation. */
4736
252b5132 4737static void
ea1562b3 4738s_alpha_code_address (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4739{
4740 expressionS exp;
4741 char *p;
4742
4743#ifdef md_flush_pending_output
4744 md_flush_pending_output ();
4745#endif
4746
4747 expression (&exp);
4748 if (exp.X_op != O_symbol)
ea1562b3 4749 as_fatal (_("No symbol after .code_address"));
252b5132
RH
4750 else
4751 {
4752 p = frag_more (8);
4753 memset (p, 0, 8);
4754 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
4755 BFD_RELOC_ALPHA_CODEADDR);
4756 }
4757 demand_empty_rest_of_line ();
252b5132
RH
4758}
4759
252b5132 4760static void
ea1562b3 4761s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED)
252b5132 4762{
198f1251 4763 alpha_evax_proc->fp_save = tc_get_register (1);
252b5132
RH
4764
4765 demand_empty_rest_of_line ();
252b5132
RH
4766}
4767
252b5132 4768static void
ea1562b3 4769s_alpha_mask (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4770{
4771 long val;
4772
4773 if (get_absolute_expression_and_terminator (&val) != ',')
4774 {
4775 as_warn (_("Bad .mask directive"));
4776 --input_line_pointer;
4777 }
4778 else
4779 {
198f1251 4780 alpha_evax_proc->imask = val;
32ff5c2e 4781 (void) get_absolute_expression ();
252b5132
RH
4782 }
4783 demand_empty_rest_of_line ();
252b5132
RH
4784}
4785
252b5132 4786static void
ea1562b3 4787s_alpha_fmask (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4788{
4789 long val;
4790
4791 if (get_absolute_expression_and_terminator (&val) != ',')
4792 {
4793 as_warn (_("Bad .fmask directive"));
4794 --input_line_pointer;
4795 }
4796 else
4797 {
198f1251 4798 alpha_evax_proc->fmask = val;
252b5132
RH
4799 (void) get_absolute_expression ();
4800 }
4801 demand_empty_rest_of_line ();
252b5132
RH
4802}
4803
4804static void
ea1562b3 4805s_alpha_end (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4806{
4807 char c;
4808
4809 c = get_symbol_end ();
4810 *input_line_pointer = c;
4811 demand_empty_rest_of_line ();
8aacb050 4812 alpha_evax_proc = NULL;
252b5132
RH
4813}
4814
252b5132 4815static void
ea1562b3 4816s_alpha_file (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4817{
4818 symbolS *s;
4819 int length;
4820 static char case_hack[32];
4821
252b5132 4822 sprintf (case_hack, "<CASE:%01d%01d>",
9de8d8f1 4823 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
252b5132
RH
4824
4825 s = symbol_find_or_make (case_hack);
9de8d8f1 4826 symbol_get_bfdsym (s)->flags |= BSF_FILE;
252b5132
RH
4827
4828 get_absolute_expression ();
4829 s = symbol_find_or_make (demand_copy_string (&length));
9de8d8f1 4830 symbol_get_bfdsym (s)->flags |= BSF_FILE;
252b5132 4831 demand_empty_rest_of_line ();
252b5132
RH
4832}
4833#endif /* OBJ_EVAX */
4834
4835/* Handle the .gprel32 pseudo op. */
4836
4837static void
ea1562b3 4838s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
4839{
4840 expressionS e;
4841 char *p;
4842
4843 SKIP_WHITESPACE ();
4844 expression (&e);
4845
4846#ifdef OBJ_ELF
4847 switch (e.X_op)
4848 {
4849 case O_constant:
32ff5c2e 4850 e.X_add_symbol = section_symbol (absolute_section);
252b5132
RH
4851 e.X_op = O_symbol;
4852 /* FALLTHRU */
4853 case O_symbol:
4854 break;
4855 default:
bc805888 4856 abort ();
252b5132
RH
4857 }
4858#else
4859#ifdef OBJ_ECOFF
4860 switch (e.X_op)
4861 {
4862 case O_constant:
4863 e.X_add_symbol = section_symbol (absolute_section);
4864 /* fall through */
4865 case O_symbol:
4866 e.X_op = O_subtract;
4867 e.X_op_symbol = alpha_gp_symbol;
4868 break;
4869 default:
4870 abort ();
4871 }
4872#endif
4873#endif
4874
4875 if (alpha_auto_align_on && alpha_current_align < 2)
4876 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
4877 if (alpha_current_align > 2)
4878 alpha_current_align = 2;
4879 alpha_insn_label = NULL;
4880
4881 p = frag_more (4);
4882 memset (p, 0, 4);
66498417 4883 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
252b5132
RH
4884 &e, 0, BFD_RELOC_GPREL32);
4885}
4886
4887/* Handle floating point allocation pseudo-ops. This is like the
4888 generic vresion, but it makes sure the current label, if any, is
4889 correctly aligned. */
4890
4891static void
ea1562b3 4892s_alpha_float_cons (int type)
252b5132
RH
4893{
4894 int log_size;
4895
4896 switch (type)
4897 {
4898 default:
4899 case 'f':
4900 case 'F':
4901 log_size = 2;
4902 break;
4903
4904 case 'd':
4905 case 'D':
4906 case 'G':
4907 log_size = 3;
4908 break;
4909
4910 case 'x':
4911 case 'X':
4912 case 'p':
4913 case 'P':
4914 log_size = 4;
4915 break;
4916 }
4917
4918 if (alpha_auto_align_on && alpha_current_align < log_size)
4919 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4920 if (alpha_current_align > log_size)
4921 alpha_current_align = log_size;
4922 alpha_insn_label = NULL;
4923
4924 float_cons (type);
4925}
4926
4927/* Handle the .proc pseudo op. We don't really do much with it except
4928 parse it. */
4929
4930static void
ea1562b3 4931s_alpha_proc (int is_static ATTRIBUTE_UNUSED)
252b5132
RH
4932{
4933 char *name;
4934 char c;
4935 char *p;
4936 symbolS *symbolP;
4937 int temp;
4938
ea1562b3 4939 /* Takes ".proc name,nargs". */
252b5132
RH
4940 SKIP_WHITESPACE ();
4941 name = input_line_pointer;
4942 c = get_symbol_end ();
4943 p = input_line_pointer;
4944 symbolP = symbol_find_or_make (name);
4945 *p = c;
4946 SKIP_WHITESPACE ();
4947 if (*input_line_pointer != ',')
4948 {
4949 *p = 0;
4950 as_warn (_("Expected comma after name \"%s\""), name);
4951 *p = c;
4952 temp = 0;
4953 ignore_rest_of_line ();
4954 }
4955 else
4956 {
4957 input_line_pointer++;
4958 temp = get_absolute_expression ();
4959 }
7dcc9865 4960 /* *symbol_get_obj (symbolP) = (signed char) temp; */
87975d2a 4961 (void) symbolP;
252b5132
RH
4962 as_warn (_("unhandled: .proc %s,%d"), name, temp);
4963 demand_empty_rest_of_line ();
4964}
4965
4966/* Handle the .set pseudo op. This is used to turn on and off most of
4967 the assembler features. */
4968
4969static void
ea1562b3 4970s_alpha_set (int x ATTRIBUTE_UNUSED)
252b5132
RH
4971{
4972 char *name, ch, *s;
4973 int yesno = 1;
4974
4975 SKIP_WHITESPACE ();
4976 name = input_line_pointer;
4977 ch = get_symbol_end ();
4978
4979 s = name;
4980 if (s[0] == 'n' && s[1] == 'o')
4981 {
4982 yesno = 0;
4983 s += 2;
4984 }
4985 if (!strcmp ("reorder", s))
4986 /* ignore */ ;
4987 else if (!strcmp ("at", s))
4988 alpha_noat_on = !yesno;
4989 else if (!strcmp ("macro", s))
4990 alpha_macros_on = yesno;
4991 else if (!strcmp ("move", s))
4992 /* ignore */ ;
4993 else if (!strcmp ("volatile", s))
4994 /* ignore */ ;
4995 else
4996 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
4997
4998 *input_line_pointer = ch;
4999 demand_empty_rest_of_line ();
5000}
5001
5002/* Handle the .base pseudo op. This changes the assembler's notion of
5003 the $gp register. */
5004
5005static void
ea1562b3 5006s_alpha_base (int ignore ATTRIBUTE_UNUSED)
252b5132 5007{
252b5132 5008 SKIP_WHITESPACE ();
ea1562b3 5009
252b5132 5010 if (*input_line_pointer == '$')
ea1562b3
NC
5011 {
5012 /* $rNN form. */
252b5132
RH
5013 input_line_pointer++;
5014 if (*input_line_pointer == 'r')
5015 input_line_pointer++;
5016 }
5017
5018 alpha_gp_register = get_absolute_expression ();
5019 if (alpha_gp_register < 0 || alpha_gp_register > 31)
5020 {
5021 alpha_gp_register = AXP_REG_GP;
5022 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
5023 }
5024
5025 demand_empty_rest_of_line ();
5026}
5027
5028/* Handle the .align pseudo-op. This aligns to a power of two. It
5029 also adjusts any current instruction label. We treat this the same
5030 way the MIPS port does: .align 0 turns off auto alignment. */
5031
5032static void
ea1562b3 5033s_alpha_align (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
5034{
5035 int align;
5036 char fill, *pfill;
198f1251 5037 long max_alignment = 16;
252b5132
RH
5038
5039 align = get_absolute_expression ();
5040 if (align > max_alignment)
5041 {
5042 align = max_alignment;
5043 as_bad (_("Alignment too large: %d. assumed"), align);
5044 }
5045 else if (align < 0)
5046 {
5047 as_warn (_("Alignment negative: 0 assumed"));
5048 align = 0;
5049 }
5050
5051 if (*input_line_pointer == ',')
5052 {
5053 input_line_pointer++;
5054 fill = get_absolute_expression ();
5055 pfill = &fill;
5056 }
5057 else
5058 pfill = NULL;
5059
5060 if (align != 0)
5061 {
5062 alpha_auto_align_on = 1;
af3ecb4a 5063 alpha_align (align, pfill, NULL, 1);
252b5132
RH
5064 }
5065 else
5066 {
5067 alpha_auto_align_on = 0;
5068 }
af3ecb4a 5069 alpha_insn_label = NULL;
252b5132
RH
5070
5071 demand_empty_rest_of_line ();
5072}
5073
5074/* Hook the normal string processor to reset known alignment. */
5075
5076static void
ea1562b3 5077s_alpha_stringer (int terminate)
252b5132
RH
5078{
5079 alpha_current_align = 0;
5080 alpha_insn_label = NULL;
38a57ae7 5081 stringer (8 + terminate);
252b5132
RH
5082}
5083
5084/* Hook the normal space processing to reset known alignment. */
5085
5086static void
ea1562b3 5087s_alpha_space (int ignore)
252b5132
RH
5088{
5089 alpha_current_align = 0;
5090 alpha_insn_label = NULL;
5091 s_space (ignore);
5092}
5093
5094/* Hook into cons for auto-alignment. */
5095
5096void
ea1562b3 5097alpha_cons_align (int size)
252b5132
RH
5098{
5099 int log_size;
5100
5101 log_size = 0;
5102 while ((size >>= 1) != 0)
5103 ++log_size;
5104
5105 if (alpha_auto_align_on && alpha_current_align < log_size)
5106 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5107 if (alpha_current_align > log_size)
5108 alpha_current_align = log_size;
5109 alpha_insn_label = NULL;
5110}
5111
5112/* Here come the .uword, .ulong, and .uquad explicitly unaligned
5113 pseudos. We just turn off auto-alignment and call down to cons. */
5114
5115static void
ea1562b3 5116s_alpha_ucons (int bytes)
252b5132
RH
5117{
5118 int hold = alpha_auto_align_on;
5119 alpha_auto_align_on = 0;
5120 cons (bytes);
5121 alpha_auto_align_on = hold;
5122}
5123
5124/* Switch the working cpu type. */
5125
5126static void
ea1562b3 5127s_alpha_arch (int ignored ATTRIBUTE_UNUSED)
252b5132
RH
5128{
5129 char *name, ch;
5130 const struct cpu_type *p;
5131
5132 SKIP_WHITESPACE ();
5133 name = input_line_pointer;
5134 ch = get_symbol_end ();
5135
5136 for (p = cpu_types; p->name; ++p)
32ff5c2e 5137 if (strcmp (name, p->name) == 0)
252b5132 5138 {
1aad8cf8 5139 alpha_target_name = p->name, alpha_target = p->flags;
252b5132
RH
5140 goto found;
5141 }
20203fb9 5142 as_warn (_("Unknown CPU identifier `%s'"), name);
252b5132
RH
5143
5144found:
5145 *input_line_pointer = ch;
5146 demand_empty_rest_of_line ();
5147}
252b5132 5148\f
252b5132
RH
5149#ifdef DEBUG1
5150/* print token expression with alpha specific extension. */
5151
5152static void
ea1562b3 5153alpha_print_token (FILE *f, const expressionS *exp)
252b5132
RH
5154{
5155 switch (exp->X_op)
5156 {
1aad8cf8
KH
5157 case O_cpregister:
5158 putc (',', f);
5159 /* FALLTHRU */
5160 case O_pregister:
5161 putc ('(', f);
5162 {
5163 expressionS nexp = *exp;
5164 nexp.X_op = O_register;
198f1251 5165 print_expr_1 (f, &nexp);
1aad8cf8
KH
5166 }
5167 putc (')', f);
5168 break;
5169 default:
198f1251 5170 print_expr_1 (f, exp);
1aad8cf8 5171 break;
252b5132 5172 }
252b5132
RH
5173}
5174#endif
5175\f
5176/* The target specific pseudo-ops which we support. */
5177
ea1562b3
NC
5178const pseudo_typeS md_pseudo_table[] =
5179{
252b5132 5180#ifdef OBJ_ECOFF
ea1562b3 5181 {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */
252b5132
RH
5182 {"rdata", s_alpha_rdata, 0},
5183#endif
5184 {"text", s_alpha_text, 0},
5185 {"data", s_alpha_data, 0},
5186#ifdef OBJ_ECOFF
5187 {"sdata", s_alpha_sdata, 0},
5188#endif
5189#ifdef OBJ_ELF
5190 {"section", s_alpha_section, 0},
5191 {"section.s", s_alpha_section, 0},
5192 {"sect", s_alpha_section, 0},
5193 {"sect.s", s_alpha_section, 0},
5194#endif
5195#ifdef OBJ_EVAX
198f1251
TG
5196 {"section", s_alpha_section, 0},
5197 {"literals", s_alpha_literals, 0},
5198 {"pdesc", s_alpha_pdesc, 0},
5199 {"name", s_alpha_name, 0},
5200 {"linkage", s_alpha_linkage, 0},
5201 {"code_address", s_alpha_code_address, 0},
5202 {"ent", s_alpha_ent, 0},
5203 {"frame", s_alpha_frame, 0},
5204 {"fp_save", s_alpha_fp_save, 0},
5205 {"mask", s_alpha_mask, 0},
5206 {"fmask", s_alpha_fmask, 0},
5207 {"end", s_alpha_end, 0},
5208 {"file", s_alpha_file, 0},
5209 {"rdata", s_alpha_section, 1},
5210 {"comm", s_alpha_comm, 0},
5211 {"link", s_alpha_section, 3},
5212 {"ctors", s_alpha_section, 4},
5213 {"dtors", s_alpha_section, 5},
5214 {"handler", s_alpha_handler, 0},
5215 {"handler_data", s_alpha_handler, 1},
252b5132
RH
5216#endif
5217#ifdef OBJ_ELF
5218 /* Frame related pseudos. */
5219 {"ent", s_alpha_ent, 0},
5220 {"end", s_alpha_end, 0},
5221 {"mask", s_alpha_mask, 0},
5222 {"fmask", s_alpha_mask, 1},
5223 {"frame", s_alpha_frame, 0},
5224 {"prologue", s_alpha_prologue, 0},
4dc7ead9
RH
5225 {"file", s_alpha_file, 5},
5226 {"loc", s_alpha_loc, 9},
a8316fe2
RH
5227 {"stabs", s_alpha_stab, 's'},
5228 {"stabn", s_alpha_stab, 'n'},
f4b97536 5229 {"usepv", s_alpha_usepv, 0},
252b5132
RH
5230 /* COFF debugging related pseudos. */
5231 {"begin", s_alpha_coff_wrapper, 0},
5232 {"bend", s_alpha_coff_wrapper, 1},
5233 {"def", s_alpha_coff_wrapper, 2},
5234 {"dim", s_alpha_coff_wrapper, 3},
5235 {"endef", s_alpha_coff_wrapper, 4},
4dc7ead9
RH
5236 {"scl", s_alpha_coff_wrapper, 5},
5237 {"tag", s_alpha_coff_wrapper, 6},
5238 {"val", s_alpha_coff_wrapper, 7},
198f1251
TG
5239#else
5240#ifdef OBJ_EVAX
5241 {"prologue", s_alpha_prologue, 0},
252b5132
RH
5242#else
5243 {"prologue", s_ignore, 0},
198f1251 5244#endif
252b5132
RH
5245#endif
5246 {"gprel32", s_alpha_gprel32, 0},
5247 {"t_floating", s_alpha_float_cons, 'd'},
5248 {"s_floating", s_alpha_float_cons, 'f'},
5249 {"f_floating", s_alpha_float_cons, 'F'},
5250 {"g_floating", s_alpha_float_cons, 'G'},
5251 {"d_floating", s_alpha_float_cons, 'D'},
5252
5253 {"proc", s_alpha_proc, 0},
5254 {"aproc", s_alpha_proc, 1},
5255 {"set", s_alpha_set, 0},
5256 {"reguse", s_ignore, 0},
5257 {"livereg", s_ignore, 0},
5258 {"base", s_alpha_base, 0}, /*??*/
5259 {"option", s_ignore, 0},
5260 {"aent", s_ignore, 0},
5261 {"ugen", s_ignore, 0},
5262 {"eflag", s_ignore, 0},
5263
5264 {"align", s_alpha_align, 0},
5265 {"double", s_alpha_float_cons, 'd'},
5266 {"float", s_alpha_float_cons, 'f'},
5267 {"single", s_alpha_float_cons, 'f'},
5268 {"ascii", s_alpha_stringer, 0},
5269 {"asciz", s_alpha_stringer, 1},
5270 {"string", s_alpha_stringer, 1},
5271 {"space", s_alpha_space, 0},
5272 {"skip", s_alpha_space, 0},
5273 {"zero", s_alpha_space, 0},
5274
5275/* Unaligned data pseudos. */
5276 {"uword", s_alpha_ucons, 2},
5277 {"ulong", s_alpha_ucons, 4},
5278 {"uquad", s_alpha_ucons, 8},
5279
5280#ifdef OBJ_ELF
5281/* Dwarf wants these versions of unaligned. */
5282 {"2byte", s_alpha_ucons, 2},
5283 {"4byte", s_alpha_ucons, 4},
5284 {"8byte", s_alpha_ucons, 8},
5285#endif
5286
5287/* We don't do any optimizing, so we can safely ignore these. */
5288 {"noalias", s_ignore, 0},
5289 {"alias", s_ignore, 0},
5290
5291 {"arch", s_alpha_arch, 0},
5292
5293 {NULL, 0, 0},
5294};
252b5132 5295\f
ea1562b3 5296#ifdef OBJ_ECOFF
252b5132 5297
ea1562b3
NC
5298/* @@@ GP selection voodoo. All of this seems overly complicated and
5299 unnecessary; which is the primary reason it's for ECOFF only. */
ea1562b3
NC
5300
5301static inline void
5302maybe_set_gp (asection *sec)
252b5132 5303{
ea1562b3
NC
5304 bfd_vma vma;
5305
5306 if (!sec)
5307 return;
a0f49396 5308 vma = bfd_get_section_vma (sec->owner, sec);
ea1562b3
NC
5309 if (vma && vma < alpha_gp_value)
5310 alpha_gp_value = vma;
5311}
5312
5313static void
5314select_gp_value (void)
5315{
9c2799c2 5316 gas_assert (alpha_gp_value == 0);
ea1562b3
NC
5317
5318 /* Get minus-one in whatever width... */
5319 alpha_gp_value = 0;
5320 alpha_gp_value--;
5321
5322 /* Select the smallest VMA of these existing sections. */
5323 maybe_set_gp (alpha_lita_section);
5324
5325/* @@ Will a simple 0x8000 work here? If not, why not? */
5326#define GP_ADJUSTMENT (0x8000 - 0x10)
5327
5328 alpha_gp_value += GP_ADJUSTMENT;
5329
5330 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
5331
5332#ifdef DEBUG1
5333 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
5334#endif
5335}
5336#endif /* OBJ_ECOFF */
5337
5338#ifdef OBJ_ELF
5339/* Map 's' to SHF_ALPHA_GPREL. */
5340
01e1a5bc 5341bfd_vma
ea1562b3
NC
5342alpha_elf_section_letter (int letter, char **ptr_msg)
5343{
5344 if (letter == 's')
5345 return SHF_ALPHA_GPREL;
5346
8f3bae45 5347 *ptr_msg = _("bad .section directive: want a,s,w,x,M,S,G,T in string");
ea1562b3
NC
5348 return -1;
5349}
5350
5351/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5352
5353flagword
01e1a5bc 5354alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED)
ea1562b3
NC
5355{
5356 if (attr & SHF_ALPHA_GPREL)
5357 flags |= SEC_SMALL_DATA;
5358 return flags;
5359}
5360#endif /* OBJ_ELF */
5361
5362/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5363 of an rs_align_code fragment. */
5364
5365void
5366alpha_handle_align (fragS *fragp)
5367{
5368 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
5369 static char const nopunop[8] =
5370 {
5371 0x1f, 0x04, 0xff, 0x47,
5372 0x00, 0x00, 0xfe, 0x2f
5373 };
5374
5375 int bytes, fix;
5376 char *p;
5377
5378 if (fragp->fr_type != rs_align_code)
5379 return;
5380
5381 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
5382 p = fragp->fr_literal + fragp->fr_fix;
5383 fix = 0;
5384
5385 if (bytes & 3)
5386 {
5387 fix = bytes & 3;
5388 memset (p, 0, fix);
5389 p += fix;
5390 bytes -= fix;
5391 }
5392
5393 if (bytes & 4)
5394 {
5395 memcpy (p, unop, 4);
5396 p += 4;
5397 bytes -= 4;
5398 fix += 4;
5399 }
5400
5401 memcpy (p, nopunop, 8);
5402
5403 fragp->fr_fix += fix;
5404 fragp->fr_var = 8;
5405}
5406\f
5407/* Public interface functions. */
5408
5409/* This function is called once, at assembler startup time. It sets
5410 up all the tables, etc. that the MD part of the assembler will
5411 need, that can be determined before arguments are parsed. */
5412
5413void
5414md_begin (void)
5415{
5416 unsigned int i;
5417
5418 /* Verify that X_op field is wide enough. */
5419 {
5420 expressionS e;
5421
5422 e.X_op = O_max;
9c2799c2 5423 gas_assert (e.X_op == O_max);
ea1562b3
NC
5424 }
5425
5426 /* Create the opcode hash table. */
5427 alpha_opcode_hash = hash_new ();
5428
5429 for (i = 0; i < alpha_num_opcodes;)
5430 {
5431 const char *name, *retval, *slash;
5432
5433 name = alpha_opcodes[i].name;
5434 retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]);
5435 if (retval)
5436 as_fatal (_("internal error: can't hash opcode `%s': %s"),
5437 name, retval);
5438
5439 /* Some opcodes include modifiers of various sorts with a "/mod"
5440 syntax, like the architecture manual suggests. However, for
5441 use with gcc at least, we also need access to those same opcodes
5442 without the "/". */
5443
5444 if ((slash = strchr (name, '/')) != NULL)
5445 {
21d799b5 5446 char *p = (char *) xmalloc (strlen (name));
ea1562b3
NC
5447
5448 memcpy (p, name, slash - name);
5449 strcpy (p + (slash - name), slash + 1);
5450
5451 (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]);
5452 /* Ignore failures -- the opcode table does duplicate some
5453 variants in different forms, like "hw_stq" and "hw_st/q". */
5454 }
5455
5456 while (++i < alpha_num_opcodes
5457 && (alpha_opcodes[i].name == name
5458 || !strcmp (alpha_opcodes[i].name, name)))
5459 continue;
5460 }
5461
5462 /* Create the macro hash table. */
5463 alpha_macro_hash = hash_new ();
5464
5465 for (i = 0; i < alpha_num_macros;)
5466 {
5467 const char *name, *retval;
5468
5469 name = alpha_macros[i].name;
5470 retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]);
5471 if (retval)
5472 as_fatal (_("internal error: can't hash macro `%s': %s"),
5473 name, retval);
5474
5475 while (++i < alpha_num_macros
5476 && (alpha_macros[i].name == name
5477 || !strcmp (alpha_macros[i].name, name)))
5478 continue;
5479 }
5480
5481 /* Construct symbols for each of the registers. */
5482 for (i = 0; i < 32; ++i)
5483 {
5484 char name[4];
5485
5486 sprintf (name, "$%d", i);
5487 alpha_register_table[i] = symbol_create (name, reg_section, i,
5488 &zero_address_frag);
5489 }
5490
5491 for (; i < 64; ++i)
5492 {
5493 char name[5];
5494
5495 sprintf (name, "$f%d", i - 32);
5496 alpha_register_table[i] = symbol_create (name, reg_section, i,
5497 &zero_address_frag);
5498 }
5499
5500 /* Create the special symbols and sections we'll be using. */
5501
5502 /* So .sbss will get used for tiny objects. */
5503 bfd_set_gp_size (stdoutput, g_switch_value);
5504
5505#ifdef OBJ_ECOFF
5506 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
5507
5508 /* For handling the GP, create a symbol that won't be output in the
5509 symbol table. We'll edit it out of relocs later. */
5510 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
5511 &zero_address_frag);
5512#endif
5513
5514#ifdef OBJ_EVAX
5515 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
5516#endif
5517
5518#ifdef OBJ_ELF
5519 if (ECOFF_DEBUGGING)
5520 {
5521 segT sec = subseg_new (".mdebug", (subsegT) 0);
5522 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
5523 bfd_set_section_alignment (stdoutput, sec, 3);
5524 }
5525#endif
5526
5527 /* Create literal lookup hash table. */
5528 alpha_literal_hash = hash_new ();
5529
5530 subseg_set (text_section, 0);
5531}
5532
5533/* The public interface to the instruction assembler. */
5534
5535void
5536md_assemble (char *str)
5537{
5538 /* Current maximum is 13. */
5539 char opname[32];
5540 expressionS tok[MAX_INSN_ARGS];
5541 int ntok, trunclen;
5542 size_t opnamelen;
5543
5544 /* Split off the opcode. */
5545 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
5546 trunclen = (opnamelen < sizeof (opname) - 1
5547 ? opnamelen
5548 : sizeof (opname) - 1);
5549 memcpy (opname, str, trunclen);
5550 opname[trunclen] = '\0';
5551
5552 /* Tokenize the rest of the line. */
5553 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
5554 {
5555 if (ntok != TOKENIZE_ERROR_REPORT)
5556 as_bad (_("syntax error"));
5557
5558 return;
5559 }
5560
5561 /* Finish it off. */
5562 assemble_tokens (opname, tok, ntok, alpha_macros_on);
5563}
5564
5565/* Round up a section's size to the appropriate boundary. */
5566
5567valueT
5568md_section_align (segT seg, valueT size)
5569{
5570 int align = bfd_get_section_alignment (stdoutput, seg);
5571 valueT mask = ((valueT) 1 << align) - 1;
5572
5573 return (size + mask) & ~mask;
5574}
5575
5576/* Turn a string in input_line_pointer into a floating point constant
5577 of type TYPE, and store the appropriate bytes in *LITP. The number
5578 of LITTLENUMS emitted is stored in *SIZEP. An error message is
5579 returned, or NULL on OK. */
5580
ea1562b3
NC
5581char *
5582md_atof (int type, char *litP, int *sizeP)
5583{
499ac353 5584 extern char *vax_md_atof (int, char *, int *);
ea1562b3
NC
5585
5586 switch (type)
5587 {
5588 /* VAX floats. */
5589 case 'G':
499ac353 5590 /* vax_md_atof() doesn't like "G" for some reason. */
ea1562b3
NC
5591 type = 'g';
5592 case 'F':
5593 case 'D':
5594 return vax_md_atof (type, litP, sizeP);
5595
ea1562b3 5596 default:
499ac353 5597 return ieee_md_atof (type, litP, sizeP, FALSE);
ea1562b3 5598 }
ea1562b3
NC
5599}
5600
5601/* Take care of the target-specific command-line options. */
5602
5603int
5604md_parse_option (int c, char *arg)
5605{
5606 switch (c)
5607 {
5608 case 'F':
5609 alpha_nofloats_on = 1;
5610 break;
5611
5612 case OPTION_32ADDR:
5613 alpha_addr32_on = 1;
5614 break;
5615
5616 case 'g':
5617 alpha_debug = 1;
5618 break;
5619
5620 case 'G':
5621 g_switch_value = atoi (arg);
5622 break;
5623
5624 case 'm':
5625 {
5626 const struct cpu_type *p;
5627
5628 for (p = cpu_types; p->name; ++p)
5629 if (strcmp (arg, p->name) == 0)
5630 {
5631 alpha_target_name = p->name, alpha_target = p->flags;
5632 goto found;
5633 }
5634 as_warn (_("Unknown CPU identifier `%s'"), arg);
5635 found:;
5636 }
5637 break;
5638
5639#ifdef OBJ_EVAX
5640 case '+': /* For g++. Hash any name > 63 chars long. */
5641 alpha_flag_hash_long_names = 1;
5642 break;
5643
5644 case 'H': /* Show new symbol after hash truncation. */
5645 alpha_flag_show_after_trunc = 1;
5646 break;
5647
5648 case 'h': /* For gnu-c/vax compatibility. */
5649 break;
198f1251
TG
5650
5651 case OPTION_REPLACE:
5652 alpha_flag_replace = 1;
5653 break;
5654
5655 case OPTION_NOREPLACE:
5656 alpha_flag_replace = 0;
5657 break;
ea1562b3
NC
5658#endif
5659
5660 case OPTION_RELAX:
5661 alpha_flag_relax = 1;
5662 break;
5663
5664#ifdef OBJ_ELF
5665 case OPTION_MDEBUG:
5666 alpha_flag_mdebug = 1;
5667 break;
5668 case OPTION_NO_MDEBUG:
5669 alpha_flag_mdebug = 0;
5670 break;
5671#endif
5672
5673 default:
5674 return 0;
5675 }
5676
5677 return 1;
5678}
5679
5680/* Print a description of the command-line options that we accept. */
5681
5682void
5683md_show_usage (FILE *stream)
5684{
5685 fputs (_("\
5686Alpha options:\n\
5687-32addr treat addresses as 32-bit values\n\
5688-F lack floating point instructions support\n\
5689-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
5690 specify variant of Alpha architecture\n\
5691-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
5692 these variants include PALcode opcodes\n"),
5693 stream);
5694#ifdef OBJ_EVAX
5695 fputs (_("\
5696VMS options:\n\
198f1251
TG
5697-+ encode (don't truncate) names longer than 64 characters\n\
5698-H show new symbol after hash truncation\n\
5699-replace/-noreplace enable or disable the optimization of procedure calls\n"),
ea1562b3
NC
5700 stream);
5701#endif
5702}
5703
5704/* Decide from what point a pc-relative relocation is relative to,
5705 relative to the pc-relative fixup. Er, relatively speaking. */
5706
5707long
5708md_pcrel_from (fixS *fixP)
5709{
5710 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
5711
5712 switch (fixP->fx_r_type)
5713 {
5714 case BFD_RELOC_23_PCREL_S2:
5715 case BFD_RELOC_ALPHA_HINT:
5716 case BFD_RELOC_ALPHA_BRSGP:
5717 return addr + 4;
5718 default:
5719 return addr;
5720 }
5721}
5722
5723/* Attempt to simplify or even eliminate a fixup. The return value is
5724 ignored; perhaps it was once meaningful, but now it is historical.
5725 To indicate that a fixup has been eliminated, set fixP->fx_done.
5726
5727 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
5728 internally into the GPDISP reloc used externally. We had to do
5729 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
5730 the distance to the "lda" instruction for setting the addend to
5731 GPDISP. */
5732
5733void
55cf6793 5734md_apply_fix (fixS *fixP, valueT * valP, segT seg)
ea1562b3
NC
5735{
5736 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5737 valueT value = * valP;
5738 unsigned image, size;
5739
5740 switch (fixP->fx_r_type)
5741 {
5742 /* The GPDISP relocations are processed internally with a symbol
5743 referring to the current function's section; we need to drop
5744 in a value which, when added to the address of the start of
5745 the function, gives the desired GP. */
5746 case BFD_RELOC_ALPHA_GPDISP_HI16:
5747 {
5748 fixS *next = fixP->fx_next;
5749
5750 /* With user-specified !gpdisp relocations, we can be missing
5751 the matching LO16 reloc. We will have already issued an
5752 error message. */
5753 if (next)
5754 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
5755 - fixP->fx_frag->fr_address - fixP->fx_where);
5756
5757 value = (value - sign_extend_16 (value)) >> 16;
5758 }
5759#ifdef OBJ_ELF
5760 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
5761#endif
5762 goto do_reloc_gp;
5763
5764 case BFD_RELOC_ALPHA_GPDISP_LO16:
5765 value = sign_extend_16 (value);
5766 fixP->fx_offset = 0;
5767#ifdef OBJ_ELF
5768 fixP->fx_done = 1;
5769#endif
5770
5771 do_reloc_gp:
5772 fixP->fx_addsy = section_symbol (seg);
5773 md_number_to_chars (fixpos, value, 2);
5774 break;
5775
5776 case BFD_RELOC_16:
5777 if (fixP->fx_pcrel)
5778 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5779 size = 2;
5780 goto do_reloc_xx;
5781
5782 case BFD_RELOC_32:
5783 if (fixP->fx_pcrel)
5784 fixP->fx_r_type = BFD_RELOC_32_PCREL;
5785 size = 4;
5786 goto do_reloc_xx;
5787
5788 case BFD_RELOC_64:
5789 if (fixP->fx_pcrel)
5790 fixP->fx_r_type = BFD_RELOC_64_PCREL;
5791 size = 8;
5792
5793 do_reloc_xx:
5794 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5795 {
5796 md_number_to_chars (fixpos, value, size);
5797 goto done;
5798 }
5799 return;
5800
5801#ifdef OBJ_ECOFF
5802 case BFD_RELOC_GPREL32:
9c2799c2 5803 gas_assert (fixP->fx_subsy == alpha_gp_symbol);
ea1562b3
NC
5804 fixP->fx_subsy = 0;
5805 /* FIXME: inherited this obliviousness of `value' -- why? */
5806 md_number_to_chars (fixpos, -alpha_gp_value, 4);
5807 break;
5808#else
5809 case BFD_RELOC_GPREL32:
5810#endif
5811 case BFD_RELOC_GPREL16:
5812 case BFD_RELOC_ALPHA_GPREL_HI16:
5813 case BFD_RELOC_ALPHA_GPREL_LO16:
5814 return;
5815
5816 case BFD_RELOC_23_PCREL_S2:
5817 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5818 {
5819 image = bfd_getl32 (fixpos);
5820 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
5821 goto write_done;
5822 }
5823 return;
5824
5825 case BFD_RELOC_ALPHA_HINT:
5826 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5827 {
5828 image = bfd_getl32 (fixpos);
5829 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
5830 goto write_done;
5831 }
5832 return;
5833
5834#ifdef OBJ_ELF
5835 case BFD_RELOC_ALPHA_BRSGP:
5836 return;
5837
5838 case BFD_RELOC_ALPHA_TLSGD:
5839 case BFD_RELOC_ALPHA_TLSLDM:
5840 case BFD_RELOC_ALPHA_GOTDTPREL16:
5841 case BFD_RELOC_ALPHA_DTPREL_HI16:
5842 case BFD_RELOC_ALPHA_DTPREL_LO16:
5843 case BFD_RELOC_ALPHA_DTPREL16:
5844 case BFD_RELOC_ALPHA_GOTTPREL16:
5845 case BFD_RELOC_ALPHA_TPREL_HI16:
5846 case BFD_RELOC_ALPHA_TPREL_LO16:
5847 case BFD_RELOC_ALPHA_TPREL16:
5848 if (fixP->fx_addsy)
5849 S_SET_THREAD_LOCAL (fixP->fx_addsy);
5850 return;
5851#endif
5852
5853#ifdef OBJ_ECOFF
5854 case BFD_RELOC_ALPHA_LITERAL:
5855 md_number_to_chars (fixpos, value, 2);
5856 return;
5857#endif
5858 case BFD_RELOC_ALPHA_ELF_LITERAL:
5859 case BFD_RELOC_ALPHA_LITUSE:
5860 case BFD_RELOC_ALPHA_LINKAGE:
5861 case BFD_RELOC_ALPHA_CODEADDR:
5862 return;
5863
198f1251
TG
5864#ifdef OBJ_EVAX
5865 case BFD_RELOC_ALPHA_NOP:
5866 value -= (8 + 4); /* PC-relative, base is jsr+4. */
5867
5868 /* From B.4.5.2 of the OpenVMS Linker Utility Manual:
5869 "Finally, the ETIR$C_STC_BSR command passes the same address
5870 as ETIR$C_STC_NOP (so that they will fail or succeed together),
5871 and the same test is done again." */
5872 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
5873 {
5874 fixP->fx_addnumber = -value;
5875 return;
5876 }
5877
5878 if ((abs (value) >> 2) & ~0xfffff)
5879 goto done;
5880 else
5881 {
5882 /* Change to a nop. */
5883 image = 0x47FF041F;
5884 goto write_done;
5885 }
5886
5887 case BFD_RELOC_ALPHA_LDA:
5888 /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute
5889 the value for an O_subtract. */
5890 if (fixP->fx_addsy
5891 && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
5892 {
5893 fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value;
5894 return;
5895 }
5896
5897 if ((abs (value)) & ~0x7fff)
5898 goto done;
5899 else
5900 {
5901 /* Change to an lda. */
5902 image = 0x237B0000 | (value & 0xFFFF);
5903 goto write_done;
5904 }
5905
5906 case BFD_RELOC_ALPHA_BSR:
5907 case BFD_RELOC_ALPHA_BOH:
5908 value -= 4; /* PC-relative, base is jsr+4. */
5909
5910 /* See comment in the BFD_RELOC_ALPHA_NOP case above. */
5911 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section)
5912 {
5913 fixP->fx_addnumber = -value;
5914 return;
5915 }
5916
5917 if ((abs (value) >> 2) & ~0xfffff)
5918 {
5919 /* Out of range. */
5920 if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH)
5921 {
5922 /* Add a hint. */
5923 image = bfd_getl32(fixpos);
5924 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
5925 goto write_done;
5926 }
5927 goto done;
5928 }
5929 else
5930 {
5931 /* Change to a branch. */
5932 image = 0xD3400000 | ((value >> 2) & 0x1FFFFF);
5933 goto write_done;
5934 }
5935#endif
5936
ea1562b3
NC
5937 case BFD_RELOC_VTABLE_INHERIT:
5938 case BFD_RELOC_VTABLE_ENTRY:
5939 return;
5940
5941 default:
5942 {
5943 const struct alpha_operand *operand;
5944
5945 if ((int) fixP->fx_r_type >= 0)
5946 as_fatal (_("unhandled relocation type %s"),
5947 bfd_get_reloc_code_name (fixP->fx_r_type));
5948
9c2799c2 5949 gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
ea1562b3
NC
5950 operand = &alpha_operands[-(int) fixP->fx_r_type];
5951
5952 /* The rest of these fixups only exist internally during symbol
5953 resolution and have no representation in the object file.
5954 Therefore they must be completely resolved as constants. */
5955
5956 if (fixP->fx_addsy != 0
5957 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
5958 as_bad_where (fixP->fx_file, fixP->fx_line,
5959 _("non-absolute expression in constant field"));
5960
5961 image = bfd_getl32 (fixpos);
5962 image = insert_operand (image, operand, (offsetT) value,
5963 fixP->fx_file, fixP->fx_line);
5964 }
5965 goto write_done;
5966 }
5967
5968 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
5969 return;
5970 else
5971 {
5972 as_warn_where (fixP->fx_file, fixP->fx_line,
5973 _("type %d reloc done?\n"), (int) fixP->fx_r_type);
5974 goto done;
5975 }
5976
5977write_done:
5978 md_number_to_chars (fixpos, image, 4);
5979
5980done:
5981 fixP->fx_done = 1;
5982}
5983
5984/* Look for a register name in the given symbol. */
5985
5986symbolS *
5987md_undefined_symbol (char *name)
5988{
5989 if (*name == '$')
5990 {
5991 int is_float = 0, num;
5992
5993 switch (*++name)
5994 {
5995 case 'f':
5996 if (name[1] == 'p' && name[2] == '\0')
5997 return alpha_register_table[AXP_REG_FP];
5998 is_float = 32;
5999 /* Fall through. */
6000
6001 case 'r':
6002 if (!ISDIGIT (*++name))
6003 break;
6004 /* Fall through. */
6005
6006 case '0': case '1': case '2': case '3': case '4':
6007 case '5': case '6': case '7': case '8': case '9':
6008 if (name[1] == '\0')
6009 num = name[0] - '0';
6010 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
6011 {
6012 num = (name[0] - '0') * 10 + name[1] - '0';
6013 if (num >= 32)
6014 break;
6015 }
6016 else
6017 break;
6018
6019 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
6020 as_warn (_("Used $at without \".set noat\""));
6021 return alpha_register_table[num + is_float];
6022
6023 case 'a':
6024 if (name[1] == 't' && name[2] == '\0')
6025 {
6026 if (!alpha_noat_on)
6027 as_warn (_("Used $at without \".set noat\""));
6028 return alpha_register_table[AXP_REG_AT];
6029 }
6030 break;
6031
6032 case 'g':
6033 if (name[1] == 'p' && name[2] == '\0')
6034 return alpha_register_table[alpha_gp_register];
6035 break;
6036
6037 case 's':
6038 if (name[1] == 'p' && name[2] == '\0')
6039 return alpha_register_table[AXP_REG_SP];
6040 break;
6041 }
6042 }
6043 return NULL;
6044}
6045
6046#ifdef OBJ_ECOFF
6047/* @@@ Magic ECOFF bits. */
6048
6049void
6050alpha_frob_ecoff_data (void)
6051{
6052 select_gp_value ();
6053 /* $zero and $f31 are read-only. */
6054 alpha_gprmask &= ~1;
6055 alpha_fprmask &= ~1;
6056}
6057#endif
6058
6059/* Hook to remember a recently defined label so that the auto-align
6060 code can adjust the symbol after we know what alignment will be
6061 required. */
6062
6063void
6064alpha_define_label (symbolS *sym)
6065{
6066 alpha_insn_label = sym;
07a53e5c
RH
6067#ifdef OBJ_ELF
6068 dwarf2_emit_label (sym);
6069#endif
ea1562b3
NC
6070}
6071
6072/* Return true if we must always emit a reloc for a type and false if
6073 there is some hope of resolving it at assembly time. */
6074
6075int
6076alpha_force_relocation (fixS *f)
6077{
6078 if (alpha_flag_relax)
6079 return 1;
6080
6081 switch (f->fx_r_type)
6082 {
6083 case BFD_RELOC_ALPHA_GPDISP_HI16:
6084 case BFD_RELOC_ALPHA_GPDISP_LO16:
6085 case BFD_RELOC_ALPHA_GPDISP:
6086 case BFD_RELOC_ALPHA_LITERAL:
6087 case BFD_RELOC_ALPHA_ELF_LITERAL:
6088 case BFD_RELOC_ALPHA_LITUSE:
6089 case BFD_RELOC_GPREL16:
6090 case BFD_RELOC_GPREL32:
6091 case BFD_RELOC_ALPHA_GPREL_HI16:
6092 case BFD_RELOC_ALPHA_GPREL_LO16:
6093 case BFD_RELOC_ALPHA_LINKAGE:
6094 case BFD_RELOC_ALPHA_CODEADDR:
6095 case BFD_RELOC_ALPHA_BRSGP:
6096 case BFD_RELOC_ALPHA_TLSGD:
6097 case BFD_RELOC_ALPHA_TLSLDM:
6098 case BFD_RELOC_ALPHA_GOTDTPREL16:
6099 case BFD_RELOC_ALPHA_DTPREL_HI16:
6100 case BFD_RELOC_ALPHA_DTPREL_LO16:
6101 case BFD_RELOC_ALPHA_DTPREL16:
6102 case BFD_RELOC_ALPHA_GOTTPREL16:
6103 case BFD_RELOC_ALPHA_TPREL_HI16:
6104 case BFD_RELOC_ALPHA_TPREL_LO16:
6105 case BFD_RELOC_ALPHA_TPREL16:
198f1251
TG
6106#ifdef OBJ_EVAX
6107 case BFD_RELOC_ALPHA_NOP:
6108 case BFD_RELOC_ALPHA_BSR:
6109 case BFD_RELOC_ALPHA_LDA:
6110 case BFD_RELOC_ALPHA_BOH:
6111#endif
ea1562b3 6112 return 1;
252b5132 6113
ea1562b3
NC
6114 default:
6115 break;
6116 }
252b5132 6117
ea1562b3 6118 return generic_force_reloc (f);
252b5132
RH
6119}
6120
ea1562b3 6121/* Return true if we can partially resolve a relocation now. */
252b5132 6122
ea1562b3
NC
6123int
6124alpha_fix_adjustable (fixS *f)
252b5132 6125{
ea1562b3
NC
6126 /* Are there any relocation types for which we must generate a
6127 reloc but we can adjust the values contained within it? */
6128 switch (f->fx_r_type)
6129 {
6130 case BFD_RELOC_ALPHA_GPDISP_HI16:
6131 case BFD_RELOC_ALPHA_GPDISP_LO16:
6132 case BFD_RELOC_ALPHA_GPDISP:
6133 return 0;
252b5132 6134
ea1562b3
NC
6135 case BFD_RELOC_ALPHA_LITERAL:
6136 case BFD_RELOC_ALPHA_ELF_LITERAL:
6137 case BFD_RELOC_ALPHA_LITUSE:
6138 case BFD_RELOC_ALPHA_LINKAGE:
6139 case BFD_RELOC_ALPHA_CODEADDR:
6140 return 1;
252b5132 6141
ea1562b3
NC
6142 case BFD_RELOC_VTABLE_ENTRY:
6143 case BFD_RELOC_VTABLE_INHERIT:
6144 return 0;
252b5132 6145
ea1562b3
NC
6146 case BFD_RELOC_GPREL16:
6147 case BFD_RELOC_GPREL32:
6148 case BFD_RELOC_ALPHA_GPREL_HI16:
6149 case BFD_RELOC_ALPHA_GPREL_LO16:
6150 case BFD_RELOC_23_PCREL_S2:
198f1251 6151 case BFD_RELOC_16:
ea1562b3
NC
6152 case BFD_RELOC_32:
6153 case BFD_RELOC_64:
6154 case BFD_RELOC_ALPHA_HINT:
6155 return 1;
252b5132 6156
ea1562b3
NC
6157 case BFD_RELOC_ALPHA_TLSGD:
6158 case BFD_RELOC_ALPHA_TLSLDM:
6159 case BFD_RELOC_ALPHA_GOTDTPREL16:
6160 case BFD_RELOC_ALPHA_DTPREL_HI16:
6161 case BFD_RELOC_ALPHA_DTPREL_LO16:
6162 case BFD_RELOC_ALPHA_DTPREL16:
6163 case BFD_RELOC_ALPHA_GOTTPREL16:
6164 case BFD_RELOC_ALPHA_TPREL_HI16:
6165 case BFD_RELOC_ALPHA_TPREL_LO16:
6166 case BFD_RELOC_ALPHA_TPREL16:
6167 /* ??? No idea why we can't return a reference to .tbss+10, but
6168 we're preventing this in the other assemblers. Follow for now. */
6169 return 0;
252b5132 6170
ea1562b3
NC
6171#ifdef OBJ_ELF
6172 case BFD_RELOC_ALPHA_BRSGP:
6173 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
6174 let it get resolved at assembly time. */
6175 {
6176 symbolS *sym = f->fx_addsy;
6177 const char *name;
6178 int offset = 0;
252b5132 6179
ea1562b3
NC
6180 if (generic_force_reloc (f))
6181 return 0;
252b5132 6182
ea1562b3
NC
6183 switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD)
6184 {
6185 case STO_ALPHA_NOPV:
6186 break;
6187 case STO_ALPHA_STD_GPLOAD:
6188 offset = 8;
6189 break;
6190 default:
6191 if (S_IS_LOCAL (sym))
6192 name = "<local>";
6193 else
6194 name = S_GET_NAME (sym);
6195 as_bad_where (f->fx_file, f->fx_line,
6196 _("!samegp reloc against symbol without .prologue: %s"),
6197 name);
6198 break;
6199 }
6200 f->fx_r_type = BFD_RELOC_23_PCREL_S2;
6201 f->fx_offset += offset;
6202 return 1;
6203 }
252b5132 6204#endif
198f1251
TG
6205#ifdef OBJ_EVAX
6206 case BFD_RELOC_ALPHA_NOP:
6207 case BFD_RELOC_ALPHA_BSR:
6208 case BFD_RELOC_ALPHA_LDA:
6209 case BFD_RELOC_ALPHA_BOH:
6210 return 1;
6211#endif
d61a78a7 6212
ea1562b3
NC
6213 default:
6214 return 1;
6215 }
d61a78a7
RH
6216}
6217
ea1562b3
NC
6218/* Generate the BFD reloc to be stuck in the object file from the
6219 fixup used internally in the assembler. */
d61a78a7 6220
ea1562b3
NC
6221arelent *
6222tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED,
6223 fixS *fixp)
d61a78a7 6224{
ea1562b3 6225 arelent *reloc;
d61a78a7 6226
21d799b5
NC
6227 reloc = (arelent *) xmalloc (sizeof (* reloc));
6228 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
ea1562b3
NC
6229 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6230 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
252b5132 6231
ea1562b3
NC
6232 /* Make sure none of our internal relocations make it this far.
6233 They'd better have been fully resolved by this point. */
9c2799c2 6234 gas_assert ((int) fixp->fx_r_type > 0);
252b5132 6235
ea1562b3
NC
6236 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6237 if (reloc->howto == NULL)
252b5132 6238 {
ea1562b3
NC
6239 as_bad_where (fixp->fx_file, fixp->fx_line,
6240 _("cannot represent `%s' relocation in object file"),
6241 bfd_get_reloc_code_name (fixp->fx_r_type));
6242 return NULL;
252b5132 6243 }
252b5132 6244
ea1562b3
NC
6245 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
6246 as_fatal (_("internal error? cannot generate `%s' relocation"),
6247 bfd_get_reloc_code_name (fixp->fx_r_type));
252b5132 6248
9c2799c2 6249 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
ea1562b3 6250
bc1bc43f
RH
6251 reloc->addend = fixp->fx_offset;
6252
ea1562b3 6253#ifdef OBJ_ECOFF
bc1bc43f
RH
6254 /* Fake out bfd_perform_relocation. sigh. */
6255 /* ??? Better would be to use the special_function hook. */
ea1562b3 6256 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
ea1562b3 6257 reloc->addend = -alpha_gp_value;
ea1562b3 6258#endif
252b5132 6259
198f1251
TG
6260#ifdef OBJ_EVAX
6261 switch (fixp->fx_r_type)
6262 {
6263 struct evax_private_udata_struct *udata;
6264 const char *pname;
6265 int pname_len;
6266
6267 case BFD_RELOC_ALPHA_LINKAGE:
51794af8 6268 /* Copy the linkage index. */
198f1251
TG
6269 reloc->addend = fixp->fx_addnumber;
6270 break;
6271
6272 case BFD_RELOC_ALPHA_NOP:
6273 case BFD_RELOC_ALPHA_BSR:
6274 case BFD_RELOC_ALPHA_LDA:
6275 case BFD_RELOC_ALPHA_BOH:
6276 pname = symbol_get_bfdsym (fixp->fx_addsy)->name;
6277
6278 /* We need the non-suffixed name of the procedure. Beware that
6279 the main symbol might be equated so look it up and take its name. */
6280 pname_len = strlen (pname);
6281 if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0)
6282 {
6283 symbolS *sym;
e1f4d6bd
TG
6284 char *my_pname = (char *) alloca (pname_len - 4 + 1);
6285
6286 memcpy (my_pname, pname, pname_len - 4);
198f1251
TG
6287 my_pname [pname_len - 4] = 0;
6288 sym = symbol_find (my_pname);
6289 if (sym == NULL)
6290 abort ();
e1f4d6bd 6291
198f1251
TG
6292 while (symbol_equated_reloc_p (sym))
6293 {
6294 symbolS *n = symbol_get_value_expression (sym)->X_add_symbol;
6295
6296 /* We must avoid looping, as that can occur with a badly
6297 written program. */
6298 if (n == sym)
6299 break;
6300 sym = n;
6301 }
6302 pname = symbol_get_bfdsym (sym)->name;
6303 }
6304
6305 udata = (struct evax_private_udata_struct *)
6306 xmalloc (sizeof (struct evax_private_udata_struct));
6307 udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy);
6308 udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym);
6309 udata->origname = (char *)pname;
6310 udata->lkindex = ((struct evax_private_udata_struct *)
6311 symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex;
6312 reloc->sym_ptr_ptr = (void *)udata;
6313 reloc->addend = fixp->fx_addnumber;
6314
6315 default:
6316 break;
6317 }
6318#endif
6319
ea1562b3 6320 return reloc;
252b5132
RH
6321}
6322
ea1562b3
NC
6323/* Parse a register name off of the input_line and return a register
6324 number. Gets md_undefined_symbol above to do the register name
6325 matching for us.
0a9ef439 6326
ea1562b3 6327 Only called as a part of processing the ECOFF .frame directive. */
0a9ef439 6328
ea1562b3
NC
6329int
6330tc_get_register (int frame ATTRIBUTE_UNUSED)
6331{
6332 int framereg = AXP_REG_SP;
0a9ef439 6333
ea1562b3
NC
6334 SKIP_WHITESPACE ();
6335 if (*input_line_pointer == '$')
0a9ef439 6336 {
ea1562b3
NC
6337 char *s = input_line_pointer;
6338 char c = get_symbol_end ();
6339 symbolS *sym = md_undefined_symbol (s);
0a9ef439 6340
ea1562b3
NC
6341 *strchr (s, '\0') = c;
6342 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
6343 goto found;
0a9ef439 6344 }
ea1562b3 6345 as_warn (_("frame reg expected, using $%d."), framereg);
0a9ef439 6346
ea1562b3
NC
6347found:
6348 note_gpreg (framereg);
6349 return framereg;
6350}
0a9ef439 6351
ea1562b3
NC
6352/* This is called before the symbol table is processed. In order to
6353 work with gcc when using mips-tfile, we must keep all local labels.
6354 However, in other cases, we want to discard them. If we were
6355 called with -g, but we didn't see any debugging information, it may
6356 mean that gcc is smuggling debugging information through to
6357 mips-tfile, in which case we must generate all local labels. */
6358
6359#ifdef OBJ_ECOFF
6360
6361void
6362alpha_frob_file_before_adjust (void)
6363{
6364 if (alpha_debug != 0
6365 && ! ecoff_debugging_seen)
6366 flag_keep_locals = 1;
0a9ef439
RH
6367}
6368
ea1562b3
NC
6369#endif /* OBJ_ECOFF */
6370
252b5132
RH
6371/* The Alpha has support for some VAX floating point types, as well as for
6372 IEEE floating point. We consider IEEE to be the primary floating point
6373 format, and sneak in the VAX floating point support here. */
252b5132 6374#include "config/atof-vax.c"
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