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49af8f35 | 1 | /* tc-arc.c -- Assembler for the ARC |
31add5f0 | 2 | Copyright (C) 1994, 1995 Free Software Foundation, Inc. |
49af8f35 DE |
3 | Contributed by Doug Evans (dje@cygnus.com). |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
2356dab3 | 19 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
49af8f35 DE |
20 | |
21 | #include <stdio.h> | |
22 | #include <ctype.h> | |
23 | #include "as.h" | |
24 | #include "subsegs.h" | |
25 | #include "opcode/arc.h" | |
31add5f0 | 26 | #include "elf/arc.h" |
49af8f35 | 27 | |
31add5f0 | 28 | extern int arc_get_mach PARAMS ((char *)); |
49af8f35 | 29 | |
5acf432d DE |
30 | static arc_insn arc_insert_operand PARAMS ((arc_insn, |
31 | const struct arc_operand *, int, | |
32 | const struct arc_operand_value *, | |
33 | offsetT, char *, unsigned int)); | |
31add5f0 DE |
34 | static void arc_common PARAMS ((int)); |
35 | static void arc_cpu PARAMS ((int)); | |
36 | /*static void arc_rename PARAMS ((int));*/ | |
5acf432d DE |
37 | static int get_arc_exp_reloc_type PARAMS ((int, int, expressionS *, |
38 | expressionS *)); | |
49af8f35 DE |
39 | |
40 | const pseudo_typeS md_pseudo_table[] = | |
41 | { | |
31add5f0 DE |
42 | { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0) */ |
43 | { "common", arc_common, 0 }, | |
44 | /*{ "hword", cons, 2 }, - already exists */ | |
45 | { "word", cons, 4 }, | |
5acf432d | 46 | /*{ "xword", cons, 8 },*/ |
31add5f0 DE |
47 | { "cpu", arc_cpu, 0 }, |
48 | /*{ "rename", arc_rename, 0 },*/ | |
49 | { NULL, 0, 0 }, | |
49af8f35 DE |
50 | }; |
51 | ||
49af8f35 DE |
52 | /* This array holds the chars that always start a comment. If the |
53 | pre-processor is disabled, these aren't very useful */ | |
31add5f0 | 54 | const char comment_chars[] = "#;"; |
49af8f35 DE |
55 | |
56 | /* This array holds the chars that only start a comment at the beginning of | |
57 | a line. If the line seems to have the form '# 123 filename' | |
58 | .line and .file directives will appear in the pre-processed output */ | |
59 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
60 | first line of the input file. This is because the compiler outputs | |
61 | #NO_APP at the beginning of its output. */ | |
62 | /* Also note that comments started like this one will always | |
63 | work if '/' isn't otherwise defined. */ | |
64 | const char line_comment_chars[] = "#"; | |
65 | ||
66 | const char line_separator_chars[] = ""; | |
67 | ||
68 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
69 | const char EXP_CHARS[] = "eE"; | |
70 | ||
71 | /* Chars that mean this number is a floating point constant */ | |
72 | /* As in 0f12.456 */ | |
73 | /* or 0d1.2345e12 */ | |
5acf432d DE |
74 | const char FLT_CHARS[] = "rRsSfFdD"; |
75 | ||
76 | /* Byte order. */ | |
77 | extern int target_big_endian; | |
78 | const char *arc_target_format = DEFAULT_TARGET_FORMAT; | |
2356dab3 | 79 | static int byte_order = DEFAULT_BYTE_ORDER; |
49af8f35 | 80 | |
31add5f0 DE |
81 | /* One of bfd_mach_arc_xxx. */ |
82 | static int arc_mach_type = bfd_mach_arc_base; | |
83 | ||
5acf432d DE |
84 | /* Non-zero if the cpu type has been explicitly specified. */ |
85 | static int mach_type_specified_p = 0; | |
31add5f0 DE |
86 | |
87 | /* Non-zero if opcode tables have been initialized. | |
88 | A .cpu command must appear before any instructions. */ | |
89 | static int cpu_tables_init_p = 0; | |
90 | ||
49af8f35 | 91 | static struct hash_control *arc_suffix_hash = NULL; |
49af8f35 | 92 | \f |
5acf432d | 93 | const char *md_shortopts = ""; |
31add5f0 DE |
94 | struct option md_longopts[] = |
95 | { | |
5acf432d DE |
96 | #define OPTION_EB (OPTION_MD_BASE + 0) |
97 | {"EB", no_argument, NULL, OPTION_EB}, | |
98 | #define OPTION_EL (OPTION_MD_BASE + 1) | |
99 | {"EL", no_argument, NULL, OPTION_EL}, | |
31add5f0 | 100 | { NULL, no_argument, NULL, 0 } |
49af8f35 | 101 | }; |
31add5f0 | 102 | size_t md_longopts_size = sizeof (md_longopts); |
49af8f35 DE |
103 | |
104 | /* | |
105 | * md_parse_option | |
106 | * | |
107 | * Invocation line includes a switch not recognized by the base assembler. | |
108 | * See if it's a processor-specific option. | |
109 | */ | |
110 | ||
111 | int | |
112 | md_parse_option (c, arg) | |
113 | int c; | |
114 | char *arg; | |
115 | { | |
116 | switch (c) | |
117 | { | |
5acf432d DE |
118 | case OPTION_EB: |
119 | byte_order = BIG_ENDIAN; | |
120 | arc_target_format = "elf32-bigarc"; | |
121 | break; | |
122 | case OPTION_EL: | |
123 | byte_order = LITTLE_ENDIAN; | |
124 | arc_target_format = "elf32-littlearc"; | |
125 | break; | |
49af8f35 DE |
126 | default: |
127 | return 0; | |
128 | } | |
5acf432d | 129 | return 1; |
49af8f35 DE |
130 | } |
131 | ||
132 | void | |
133 | md_show_usage (stream) | |
134 | FILE *stream; | |
135 | { | |
136 | fprintf (stream, "\ | |
137 | ARC options:\n\ | |
5acf432d DE |
138 | -EB generate big endian output\n\ |
139 | -EL generate little endian output\n"); | |
49af8f35 DE |
140 | } |
141 | ||
142 | /* This function is called once, at assembler startup time. It should | |
31add5f0 DE |
143 | set up all the tables, etc. that the MD part of the assembler will need. |
144 | Opcode selection is defered until later because we might see a .cpu | |
145 | command. */ | |
146 | ||
49af8f35 DE |
147 | void |
148 | md_begin () | |
149 | { | |
5acf432d DE |
150 | /* The endianness can be chosen "at the factory". */ |
151 | target_big_endian = byte_order == BIG_ENDIAN; | |
49af8f35 | 152 | |
31add5f0 DE |
153 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, arc_mach_type)) |
154 | as_warn ("could not set architecture and machine"); | |
5acf432d DE |
155 | |
156 | /* Assume the base cpu. This call is necessary because we need to | |
157 | initialize `arc_operand_map' which may be needed before we see the | |
158 | first insn. */ | |
159 | arc_opcode_init_tables (arc_get_opcode_mach (bfd_mach_arc_base, | |
160 | target_big_endian)); | |
31add5f0 DE |
161 | } |
162 | ||
163 | /* Initialize the various opcode and operand tables. | |
164 | MACH is one of bfd_mach_arc_xxx. */ | |
165 | ||
166 | static void | |
167 | init_opcode_tables (mach) | |
168 | int mach; | |
169 | { | |
170 | register unsigned int i; | |
171 | char *last; | |
49af8f35 | 172 | |
5acf432d DE |
173 | if ((arc_suffix_hash = hash_new ()) == NULL) |
174 | as_fatal ("virtual memory exhausted"); | |
49af8f35 | 175 | |
31add5f0 DE |
176 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) |
177 | as_warn ("could not set architecture and machine"); | |
178 | ||
179 | /* This initializes a few things in arc-opc.c that we need. | |
180 | This must be called before the various arc_xxx_supported fns. */ | |
5acf432d | 181 | arc_opcode_init_tables (arc_get_opcode_mach (mach, target_big_endian)); |
49af8f35 DE |
182 | |
183 | /* Only put the first entry of each equivalently named suffix in the | |
184 | table. */ | |
185 | last = ""; | |
186 | for (i = 0; i < arc_suffixes_count; i++) | |
187 | { | |
31add5f0 DE |
188 | if (! arc_opval_supported (&arc_suffixes[i])) |
189 | continue; | |
49af8f35 DE |
190 | if (strcmp (arc_suffixes[i].name, last) != 0) |
191 | hash_insert (arc_suffix_hash, arc_suffixes[i].name, (PTR) (arc_suffixes + i)); | |
192 | last = arc_suffixes[i].name; | |
193 | } | |
194 | ||
5acf432d DE |
195 | /* Since registers don't have a prefix, we put them in the symbol table so |
196 | they can't be used as symbols. This also simplifies argument parsing as | |
197 | we can let gas parse registers for us. The recorded register number is | |
198 | the index in `arc_reg_names'. */ | |
49af8f35 | 199 | for (i = 0; i < arc_reg_names_count; i++) |
31add5f0 DE |
200 | { |
201 | if (! arc_opval_supported (&arc_reg_names[i])) | |
202 | continue; | |
5acf432d DE |
203 | /* Use symbol_create here instead of symbol_new so we don't try to |
204 | output registers into the object file's symbol table. */ | |
205 | symbol_table_insert (symbol_create (arc_reg_names[i].name, reg_section, | |
206 | i, &zero_address_frag)); | |
31add5f0 | 207 | } |
49af8f35 | 208 | |
31add5f0 DE |
209 | /* Tell `s_cpu' it's too late. */ |
210 | cpu_tables_init_p = 1; | |
49af8f35 DE |
211 | } |
212 | \f | |
213 | /* Insert an operand value into an instruction. | |
214 | If REG is non-NULL, it is a register number and ignore VAL. */ | |
215 | ||
216 | static arc_insn | |
217 | arc_insert_operand (insn, operand, mods, reg, val, file, line) | |
218 | arc_insn insn; | |
219 | const struct arc_operand *operand; | |
220 | int mods; | |
221 | const struct arc_operand_value *reg; | |
222 | offsetT val; | |
223 | char *file; | |
224 | unsigned int line; | |
225 | { | |
226 | if (operand->bits != 32) | |
227 | { | |
228 | long min, max; | |
229 | offsetT test; | |
230 | ||
231 | if ((operand->flags & ARC_OPERAND_SIGNED) != 0) | |
232 | { | |
233 | if ((operand->flags & ARC_OPERAND_SIGNOPT) != 0) | |
234 | max = (1 << operand->bits) - 1; | |
235 | else | |
236 | max = (1 << (operand->bits - 1)) - 1; | |
237 | min = - (1 << (operand->bits - 1)); | |
238 | } | |
239 | else | |
240 | { | |
241 | max = (1 << operand->bits) - 1; | |
242 | min = 0; | |
243 | } | |
244 | ||
245 | if ((operand->flags & ARC_OPERAND_NEGATIVE) != 0) | |
246 | test = - val; | |
247 | else | |
248 | test = val; | |
249 | ||
250 | if (test < (offsetT) min || test > (offsetT) max) | |
251 | { | |
252 | const char *err = | |
253 | "operand out of range (%s not between %ld and %ld)"; | |
254 | char buf[100]; | |
255 | ||
256 | sprint_value (buf, test); | |
257 | if (file == (char *) NULL) | |
258 | as_warn (err, buf, min, max); | |
259 | else | |
260 | as_warn_where (file, line, err, buf, min, max); | |
261 | } | |
262 | } | |
263 | ||
264 | if (operand->insert) | |
265 | { | |
266 | const char *errmsg; | |
267 | ||
268 | errmsg = NULL; | |
269 | insn = (*operand->insert) (insn, operand, mods, reg, (long) val, &errmsg); | |
270 | if (errmsg != (const char *) NULL) | |
271 | as_warn (errmsg); | |
272 | } | |
273 | else | |
274 | insn |= (((long) val & ((1 << operand->bits) - 1)) | |
275 | << operand->shift); | |
276 | ||
277 | return insn; | |
278 | } | |
279 | ||
280 | /* We need to keep a list of fixups. We can't simply generate them as | |
281 | we go, because that would require us to first create the frag, and | |
282 | that would screw up references to ``.''. */ | |
283 | ||
284 | struct arc_fixup | |
285 | { | |
49af8f35 DE |
286 | /* index into `arc_operands' */ |
287 | int opindex; | |
5acf432d | 288 | expressionS exp; |
49af8f35 DE |
289 | }; |
290 | ||
2356dab3 DE |
291 | #define MAX_FIXUPS 5 |
292 | ||
293 | #define MAX_SUFFIXES 5 | |
49af8f35 DE |
294 | |
295 | /* This routine is called for each instruction to be assembled. */ | |
296 | ||
297 | void | |
298 | md_assemble (str) | |
299 | char *str; | |
300 | { | |
fa7a56f8 | 301 | const struct arc_opcode *opcode; |
49af8f35 DE |
302 | char *start; |
303 | arc_insn insn; | |
31add5f0 DE |
304 | static int init_tables_p = 0; |
305 | ||
306 | /* Opcode table initialization is deferred until here because we have to | |
307 | wait for a possible .cpu command. */ | |
308 | if (!init_tables_p) | |
309 | { | |
310 | init_opcode_tables (arc_mach_type); | |
311 | init_tables_p = 1; | |
312 | } | |
49af8f35 DE |
313 | |
314 | /* Skip leading white space. */ | |
315 | while (isspace (*str)) | |
316 | str++; | |
317 | ||
fa7a56f8 DE |
318 | /* The instructions are stored in lists hashed by the first letter (though |
319 | we needn't care how they're hashed). Get the first in the list. */ | |
320 | ||
2356dab3 | 321 | opcode = arc_opcode_lookup_asm (str); |
49af8f35 | 322 | |
fa7a56f8 | 323 | /* Keep looking until we find a match. */ |
31add5f0 | 324 | |
49af8f35 | 325 | start = str; |
fa7a56f8 | 326 | for ( ; opcode != NULL; opcode = ARC_OPCODE_NEXT_ASM (opcode)) |
49af8f35 | 327 | { |
2356dab3 | 328 | int past_opcode_p, fc, num_suffixes; |
49af8f35 | 329 | char *syn; |
2356dab3 DE |
330 | struct arc_fixup fixups[MAX_FIXUPS]; |
331 | /* Used as a sanity check. If we need a limm reloc, make sure we ask | |
332 | for an extra 4 bytes from frag_more. */ | |
333 | int limm_reloc_p; | |
334 | const struct arc_operand_value *insn_suffixes[MAX_SUFFIXES]; | |
49af8f35 | 335 | |
31add5f0 DE |
336 | /* Is this opcode supported by the selected cpu? */ |
337 | if (! arc_opcode_supported (opcode)) | |
338 | continue; | |
339 | ||
49af8f35 DE |
340 | /* Scan the syntax string. If it doesn't match, try the next one. */ |
341 | ||
342 | arc_opcode_init_insert (); | |
343 | insn = opcode->value; | |
49af8f35 DE |
344 | fc = 0; |
345 | past_opcode_p = 0; | |
2356dab3 | 346 | num_suffixes = 0; |
49af8f35 DE |
347 | limm_reloc_p = 0; |
348 | ||
349 | /* We don't check for (*str != '\0') here because we want to parse | |
350 | any trailing fake arguments in the syntax string. */ | |
351 | for (str = start, syn = opcode->syntax; *syn != '\0'; ) | |
352 | { | |
353 | int mods; | |
354 | const struct arc_operand *operand; | |
355 | ||
356 | /* Non operand chars must match exactly. */ | |
357 | if (*syn != '%' || *++syn == '%') | |
358 | { | |
359 | /* Handle '+' specially as we want to allow "ld r0,[sp-4]". */ | |
5acf432d DE |
360 | /* ??? The syntax has changed to [sp,-4]. */ |
361 | if (0 && *syn == '+' && *str == '-') | |
49af8f35 DE |
362 | { |
363 | /* Skip over syn's +, but leave str's - alone. | |
364 | That makes the case identical to "ld r0,[sp+-4]". */ | |
365 | ++syn; | |
366 | } | |
5acf432d | 367 | else if (*str == *syn) |
49af8f35 DE |
368 | { |
369 | if (*syn == ' ') | |
370 | past_opcode_p = 1; | |
371 | ++syn; | |
372 | ++str; | |
373 | } | |
5acf432d DE |
374 | else |
375 | break; | |
49af8f35 DE |
376 | continue; |
377 | } | |
378 | ||
379 | /* We have an operand. Pick out any modifiers. */ | |
380 | mods = 0; | |
381 | while (ARC_MOD_P (arc_operands[arc_operand_map[*syn]].flags)) | |
382 | { | |
383 | mods |= arc_operands[arc_operand_map[*syn]].flags & ARC_MOD_BITS; | |
384 | ++syn; | |
385 | } | |
386 | operand = arc_operands + arc_operand_map[*syn]; | |
387 | if (operand->fmt == 0) | |
388 | as_fatal ("unknown syntax format character `%c'", *syn); | |
389 | ||
390 | if (operand->flags & ARC_OPERAND_FAKE) | |
391 | { | |
392 | const char *errmsg = NULL; | |
393 | if (operand->insert) | |
394 | { | |
395 | insn = (*operand->insert) (insn, operand, mods, NULL, 0, &errmsg); | |
396 | /* If we get an error, go on to try the next insn. */ | |
397 | if (errmsg) | |
398 | break; | |
399 | } | |
400 | ++syn; | |
401 | } | |
402 | /* Are we finished with suffixes? */ | |
403 | else if (!past_opcode_p) | |
404 | { | |
405 | int found; | |
406 | char c; | |
407 | char *s,*t; | |
408 | const struct arc_operand_value *suf,*suffix,*suffix_end; | |
409 | ||
410 | if (!(operand->flags & ARC_OPERAND_SUFFIX)) | |
411 | abort (); | |
412 | ||
413 | /* If we're at a space in the input string, we want to skip the | |
414 | remaining suffixes. There may be some fake ones though, so | |
415 | just go on to try the next one. */ | |
416 | if (*str == ' ') | |
417 | { | |
418 | ++syn; | |
419 | continue; | |
420 | } | |
421 | ||
422 | s = str; | |
423 | if (mods & ARC_MOD_DOT) | |
424 | { | |
425 | if (*s != '.') | |
426 | break; | |
427 | ++s; | |
428 | } | |
429 | else | |
430 | { | |
431 | /* This can happen in "b.nd foo" and we're currently looking | |
432 | for "%q" (ie: a condition code suffix). */ | |
433 | if (*s == '.') | |
434 | { | |
435 | ++syn; | |
436 | continue; | |
437 | } | |
438 | } | |
439 | ||
440 | /* Pick the suffix out and look it up via the hash table. */ | |
441 | for (t = s; *t && isalpha (*t); ++t) | |
442 | continue; | |
443 | c = *t; | |
444 | *t = '\0'; | |
445 | suf = hash_find (arc_suffix_hash, s); | |
446 | *t = c; | |
447 | if (!suf) | |
448 | { | |
449 | /* This can happen in "blle foo" and we're currently using | |
450 | the template "b%q%.n %j". The "bl" insn occurs later in | |
451 | the table so "lle" isn't an illegal suffix. */ | |
452 | break; | |
453 | } | |
454 | ||
455 | /* Is it the right type? Note that the same character is used | |
456 | several times, so we have to examine all of them. This is | |
457 | relatively efficient as equivalent entries are kept | |
458 | together. If it's not the right type, don't increment `str' | |
459 | so we try the next one in the series. */ | |
460 | found = 0; | |
461 | suffix_end = arc_suffixes + arc_suffixes_count; | |
462 | for (suffix = suf; | |
463 | suffix < suffix_end && strcmp (suffix->name, suf->name) == 0; | |
2356dab3 | 464 | ++suffix) |
49af8f35 DE |
465 | { |
466 | if (arc_operands[suffix->type].fmt == *syn) | |
467 | { | |
468 | /* Insert the suffix's value into the insn. */ | |
469 | if (operand->insert) | |
470 | insn = (*operand->insert) (insn, operand, | |
471 | mods, NULL, suffix->value, | |
472 | NULL); | |
473 | else | |
474 | insn |= suffix->value << operand->shift; | |
475 | ||
476 | str = t; | |
477 | found = 1; | |
478 | break; | |
479 | } | |
480 | } | |
481 | ++syn; | |
482 | if (!found) | |
2356dab3 DE |
483 | ; /* Wrong type. Just go on to try next insn entry. */ |
484 | else | |
485 | { | |
486 | if (num_suffixes == MAX_SUFFIXES) | |
487 | as_bad ("too many suffixes"); | |
488 | else | |
489 | insn_suffixes[num_suffixes++] = suffix; | |
490 | } | |
49af8f35 DE |
491 | } |
492 | else | |
493 | /* This is either a register or an expression of some kind. */ | |
494 | { | |
495 | char c; | |
496 | char *hold; | |
5acf432d DE |
497 | const struct arc_operand_value *reg = NULL; |
498 | long value = 0; | |
499 | expressionS exp; | |
49af8f35 DE |
500 | |
501 | if (operand->flags & ARC_OPERAND_SUFFIX) | |
502 | abort (); | |
503 | ||
504 | /* Is there anything left to parse? | |
505 | We don't check for this at the top because we want to parse | |
506 | any trailing fake arguments in the syntax string. */ | |
507 | if (*str == '\0') | |
508 | break; | |
5acf432d | 509 | #if 0 |
49af8f35 DE |
510 | /* Is this a syntax character? Eg: is there a '[' present when |
511 | there shouldn't be? */ | |
512 | if (!isalnum (*str) | |
513 | /* '.' as in ".LLC0" */ | |
514 | && *str != '.' | |
515 | /* '_' as in "_print" */ | |
516 | && *str != '_' | |
5acf432d DE |
517 | /* '-' as in "[fp,-4]" */ |
518 | && *str != '-' | |
519 | /* '%' as in "%ia(_func)" */ | |
520 | && *str != '%') | |
49af8f35 | 521 | break; |
5acf432d | 522 | #endif |
49af8f35 | 523 | |
5acf432d DE |
524 | /* Parse the operand. */ |
525 | hold = input_line_pointer; | |
526 | input_line_pointer = str; | |
527 | expression (&exp); | |
528 | str = input_line_pointer; | |
529 | input_line_pointer = hold; | |
530 | ||
531 | if (exp.X_op == O_illegal) | |
532 | as_bad ("illegal operand"); | |
533 | else if (exp.X_op == O_absent) | |
534 | as_bad ("missing operand"); | |
535 | else if (exp.X_op == O_constant) | |
49af8f35 | 536 | { |
5acf432d DE |
537 | value = exp.X_add_number; |
538 | } | |
539 | else if (exp.X_op == O_register) | |
540 | { | |
541 | reg = arc_reg_names + exp.X_add_number; | |
542 | } | |
543 | else | |
544 | { | |
545 | /* We need to generate a fixup for this expression. */ | |
2356dab3 | 546 | if (fc >= MAX_FIXUPS) |
5acf432d DE |
547 | as_fatal ("too many fixups"); |
548 | fixups[fc].exp = exp; | |
549 | ||
550 | /* If this is a register constant (IE: one whose | |
551 | register value gets stored as 61-63) then this | |
552 | must be a limm. We don't support shimm relocs. */ | |
553 | /* ??? This bit could use some cleaning up. | |
554 | Referencing the format chars like this goes | |
555 | against style. */ | |
556 | #define IS_REG_OPERAND(o) ((o) == 'a' || (o) == 'b' || (o) == 'c') | |
557 | if (IS_REG_OPERAND (*syn)) | |
49af8f35 | 558 | { |
5acf432d DE |
559 | const char *junk; |
560 | ||
561 | fixups[fc].opindex = arc_operand_map['L']; | |
562 | limm_reloc_p = 1; | |
563 | /* Tell insert_reg we need a limm. This is | |
564 | needed because the value at this point is | |
565 | zero, a shimm. */ | |
566 | /* ??? We need a cleaner interface than this. */ | |
567 | (*arc_operands[arc_operand_map['Q']].insert) | |
568 | (insn, operand, mods, reg, 0L, &junk); | |
49af8f35 DE |
569 | } |
570 | else | |
5acf432d DE |
571 | fixups[fc].opindex = arc_operand_map[*syn]; |
572 | ++fc; | |
573 | value = 0; | |
49af8f35 DE |
574 | } |
575 | ||
576 | /* Insert the register or expression into the instruction. */ | |
577 | if (operand->insert) | |
578 | { | |
579 | const char *errmsg = NULL; | |
580 | insn = (*operand->insert) (insn, operand, mods, | |
581 | reg, (long) value, &errmsg); | |
582 | #if 0 | |
583 | if (errmsg != (const char *) NULL) | |
584 | as_warn (errmsg); | |
585 | #endif | |
586 | /* FIXME: We want to try shimm insns for limm ones. But if | |
587 | the constant won't fit, we must go on to try the next | |
588 | possibility. Where do we issue warnings for constants | |
589 | that are too big then? At present, we'll flag the insn | |
590 | as unrecognizable! Maybe have the "bad instruction" | |
591 | error message include our `errmsg'? */ | |
592 | if (errmsg != (const char *) NULL) | |
593 | break; | |
594 | } | |
595 | else | |
596 | insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; | |
597 | ||
598 | ++syn; | |
599 | } | |
600 | } | |
601 | ||
5acf432d | 602 | /* If we're at the end of the syntax string, we're done. */ |
2356dab3 | 603 | /* FIXME: try to move this to a separate function. */ |
49af8f35 DE |
604 | if (*syn == '\0') |
605 | { | |
606 | int i; | |
607 | char *f; | |
fa7a56f8 | 608 | long limm, limm_p; |
49af8f35 | 609 | |
fa7a56f8 | 610 | /* For the moment we assume a valid `str' can only contain blanks |
49af8f35 | 611 | now. IE: We needn't try again with a longer version of the |
fa7a56f8 DE |
612 | insn and it is assumed that longer versions of insns appear |
613 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
49af8f35 DE |
614 | |
615 | while (isspace (*str)) | |
616 | ++str; | |
617 | ||
618 | if (*str != '\0') | |
619 | as_bad ("junk at end of line: `%s'", str); | |
620 | ||
fa7a56f8 DE |
621 | /* Is there a limm value? */ |
622 | limm_p = arc_opcode_limm_p (&limm); | |
623 | ||
2356dab3 DE |
624 | /* Perform various error and warning tests. */ |
625 | ||
fa7a56f8 DE |
626 | { |
627 | static int in_delay_slot_p = 0; | |
2356dab3 DE |
628 | static int prev_insn_needs_cc_nop_p = 0; |
629 | /* delay slot type seen */ | |
630 | int delay_slot_type = ARC_DELAY_NONE; | |
631 | /* conditional execution flag seen */ | |
632 | int conditional = 0; | |
633 | /* 1 if condition codes are being set */ | |
634 | int cc_set_p = 0; | |
635 | /* 1 if conditional branch, including `b' "branch always" */ | |
636 | int cond_branch_p = opcode->flags & ARC_OPCODE_COND_BRANCH; | |
637 | int need_cc_nop_p = 0; | |
638 | ||
639 | for (i = 0; i < num_suffixes; ++i) | |
640 | { | |
641 | switch (arc_operands[insn_suffixes[i]->type].fmt) | |
642 | { | |
643 | case 'n' : | |
644 | delay_slot_type = insn_suffixes[i]->value; | |
645 | break; | |
646 | case 'q' : | |
647 | conditional = insn_suffixes[i]->value; | |
648 | break; | |
649 | case 'f' : | |
650 | cc_set_p = 1; | |
651 | break; | |
652 | } | |
653 | } | |
fa7a56f8 | 654 | |
2356dab3 DE |
655 | /* Putting an insn with a limm value in a delay slot is supposed to |
656 | be legal, but let's warn the user anyway. Ditto for 8 byte | |
657 | jumps with delay slots. */ | |
fa7a56f8 DE |
658 | if (in_delay_slot_p && limm_p) |
659 | as_warn ("8 byte instruction in delay slot"); | |
2356dab3 | 660 | if (delay_slot_type != ARC_DELAY_NONE && limm_p) |
fa7a56f8 | 661 | as_warn ("8 byte jump instruction with delay slot"); |
2356dab3 DE |
662 | in_delay_slot_p = (delay_slot_type != ARC_DELAY_NONE) && !limm_p; |
663 | ||
664 | /* Warn when a conditional branch immediately follows a set of | |
665 | the condition codes. Note that this needn't be done if the | |
666 | insn that sets the condition codes uses a limm. */ | |
667 | if (cond_branch_p && conditional != 0 /* 0 = "always" */ | |
668 | && prev_insn_needs_cc_nop_p) | |
669 | as_warn ("conditional branch follows set of flags"); | |
670 | prev_insn_needs_cc_nop_p = cc_set_p && !limm_p; | |
fa7a56f8 DE |
671 | } |
672 | ||
31add5f0 DE |
673 | /* Write out the instruction. |
674 | It is important to fetch enough space in one call to `frag_more'. | |
675 | We use (f - frag_now->fr_literal) to compute where we are and we | |
676 | don't want frag_now to change between calls. */ | |
fa7a56f8 | 677 | if (limm_p) |
49af8f35 | 678 | { |
31add5f0 DE |
679 | f = frag_more (8); |
680 | md_number_to_chars (f, insn, 4); | |
681 | md_number_to_chars (f + 4, limm, 4); | |
49af8f35 DE |
682 | } |
683 | else if (limm_reloc_p) | |
31add5f0 DE |
684 | { |
685 | /* We need a limm reloc, but the tables think we don't. */ | |
686 | abort (); | |
687 | } | |
688 | else | |
689 | { | |
690 | f = frag_more (4); | |
691 | md_number_to_chars (f, insn, 4); | |
692 | } | |
49af8f35 | 693 | |
5acf432d DE |
694 | /* Create any fixups. */ |
695 | for (i = 0; i < fc; ++i) | |
49af8f35 | 696 | { |
5acf432d DE |
697 | int op_type, reloc_type; |
698 | expressionS exptmp; | |
49af8f35 DE |
699 | const struct arc_operand *operand; |
700 | ||
5acf432d DE |
701 | /* Create a fixup for this operand. |
702 | At this point we do not use a bfd_reloc_code_real_type for | |
703 | operands residing in the insn, but instead just use the | |
704 | operand index. This lets us easily handle fixups for any | |
705 | operand type, although that is admittedly not a very exciting | |
706 | feature. We pick a BFD reloc type in md_apply_fix. | |
707 | ||
708 | Limm values (4 byte immediate "constants") must be treated | |
709 | normally because they're not part of the actual insn word | |
710 | and thus the insertion routines don't handle them. */ | |
711 | ||
712 | if (arc_operands[fixups[i].opindex].flags & ARC_OPERAND_LIMM) | |
713 | { | |
714 | op_type = fixups[i].opindex; | |
715 | /* FIXME: can we add this data to the operand table? */ | |
716 | if (op_type == arc_operand_map['L']) | |
717 | reloc_type = BFD_RELOC_32; | |
718 | else if (op_type == arc_operand_map['J']) | |
719 | reloc_type = BFD_RELOC_ARC_B26; | |
720 | else | |
721 | abort (); | |
722 | reloc_type = get_arc_exp_reloc_type (1, reloc_type, | |
723 | &fixups[i].exp, | |
724 | &exptmp); | |
725 | } | |
726 | else | |
727 | { | |
728 | op_type = get_arc_exp_reloc_type (0, fixups[i].opindex, | |
729 | &fixups[i].exp, &exptmp); | |
730 | reloc_type = op_type + (int) BFD_RELOC_UNUSED; | |
731 | } | |
732 | operand = &arc_operands[op_type]; | |
49af8f35 DE |
733 | fix_new_exp (frag_now, |
734 | ((f - frag_now->fr_literal) | |
5acf432d DE |
735 | + (operand->flags & ARC_OPERAND_LIMM ? 4 : 0)), 4, |
736 | &exptmp, | |
737 | (operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0, | |
738 | (bfd_reloc_code_real_type) reloc_type); | |
49af8f35 DE |
739 | } |
740 | ||
741 | /* All done. */ | |
742 | return; | |
743 | } | |
744 | ||
745 | /* Try the next entry. */ | |
746 | } | |
747 | ||
748 | as_bad ("bad instruction `%s'", start); | |
749 | } | |
750 | \f | |
5acf432d DE |
751 | /* ??? This was copied from tc-sparc.c, I think. Is it necessary? */ |
752 | ||
49af8f35 | 753 | static void |
31add5f0 | 754 | arc_common (ignore) |
49af8f35 DE |
755 | int ignore; |
756 | { | |
757 | char *name; | |
758 | char c; | |
759 | char *p; | |
760 | int temp, size; | |
761 | symbolS *symbolP; | |
762 | ||
763 | name = input_line_pointer; | |
764 | c = get_symbol_end (); | |
765 | /* just after name is now '\0' */ | |
766 | p = input_line_pointer; | |
767 | *p = c; | |
768 | SKIP_WHITESPACE (); | |
769 | if (*input_line_pointer != ',') | |
770 | { | |
31add5f0 | 771 | as_bad ("expected comma after symbol-name"); |
49af8f35 DE |
772 | ignore_rest_of_line (); |
773 | return; | |
774 | } | |
775 | input_line_pointer++; /* skip ',' */ | |
776 | if ((temp = get_absolute_expression ()) < 0) | |
777 | { | |
778 | as_bad (".COMMon length (%d.) <0! Ignored.", temp); | |
779 | ignore_rest_of_line (); | |
780 | return; | |
781 | } | |
782 | size = temp; | |
783 | *p = 0; | |
784 | symbolP = symbol_find_or_make (name); | |
785 | *p = c; | |
786 | if (S_IS_DEFINED (symbolP)) | |
787 | { | |
31add5f0 | 788 | as_bad ("ignoring attempt to re-define symbol"); |
49af8f35 DE |
789 | ignore_rest_of_line (); |
790 | return; | |
791 | } | |
792 | if (S_GET_VALUE (symbolP) != 0) | |
793 | { | |
794 | if (S_GET_VALUE (symbolP) != size) | |
795 | { | |
796 | as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.", | |
797 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
798 | } | |
799 | } | |
49af8f35 DE |
800 | assert (symbolP->sy_frag == &zero_address_frag); |
801 | if (*input_line_pointer != ',') | |
802 | { | |
31add5f0 | 803 | as_bad ("expected comma after common length"); |
49af8f35 DE |
804 | ignore_rest_of_line (); |
805 | return; | |
806 | } | |
807 | input_line_pointer++; | |
808 | SKIP_WHITESPACE (); | |
809 | if (*input_line_pointer != '"') | |
810 | { | |
811 | temp = get_absolute_expression (); | |
49af8f35 DE |
812 | if (temp < 0) |
813 | { | |
814 | temp = 0; | |
815 | as_warn ("Common alignment negative; 0 assumed"); | |
816 | } | |
49af8f35 DE |
817 | if (symbolP->local) |
818 | { | |
819 | segT old_sec; | |
820 | int old_subsec; | |
821 | char *p; | |
822 | int align; | |
823 | ||
824 | allocate_bss: | |
825 | old_sec = now_seg; | |
826 | old_subsec = now_subseg; | |
827 | align = temp; | |
828 | record_alignment (bss_section, align); | |
829 | subseg_set (bss_section, 0); | |
830 | if (align) | |
831 | frag_align (align, 0); | |
832 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
833 | symbolP->sy_frag->fr_symbol = 0; | |
834 | symbolP->sy_frag = frag_now; | |
835 | p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, | |
836 | (char *) 0); | |
837 | *p = 0; | |
838 | S_SET_SEGMENT (symbolP, bss_section); | |
839 | S_CLEAR_EXTERNAL (symbolP); | |
840 | subseg_set (old_sec, old_subsec); | |
841 | } | |
842 | else | |
49af8f35 DE |
843 | { |
844 | allocate_common: | |
845 | S_SET_VALUE (symbolP, (valueT) size); | |
49af8f35 | 846 | S_SET_ALIGN (symbolP, temp); |
49af8f35 DE |
847 | S_SET_EXTERNAL (symbolP); |
848 | /* should be common, but this is how gas does it for now */ | |
849 | S_SET_SEGMENT (symbolP, bfd_und_section_ptr); | |
850 | } | |
851 | } | |
852 | else | |
853 | { | |
854 | input_line_pointer++; | |
5acf432d DE |
855 | /* ??? Some say data, some say bss. */ |
856 | if (strncmp (input_line_pointer, ".bss\"", 5) | |
857 | && strncmp (input_line_pointer, ".data\"", 6)) | |
49af8f35 | 858 | { |
49af8f35 DE |
859 | input_line_pointer--; |
860 | goto bad_common_segment; | |
861 | } | |
862 | while (*input_line_pointer++ != '"') | |
863 | ; | |
864 | goto allocate_common; | |
865 | } | |
866 | demand_empty_rest_of_line (); | |
867 | return; | |
868 | ||
869 | { | |
870 | bad_common_segment: | |
871 | p = input_line_pointer; | |
872 | while (*p && *p != '\n') | |
873 | p++; | |
874 | c = *p; | |
875 | *p = '\0'; | |
876 | as_bad ("bad .common segment %s", input_line_pointer + 1); | |
877 | *p = c; | |
878 | input_line_pointer = p; | |
879 | ignore_rest_of_line (); | |
880 | return; | |
881 | } | |
882 | } | |
883 | ||
31add5f0 DE |
884 | /* Select the cpu we're assembling for. */ |
885 | ||
49af8f35 | 886 | static void |
31add5f0 | 887 | arc_cpu (ignore) |
49af8f35 DE |
888 | int ignore; |
889 | { | |
31add5f0 DE |
890 | int mach; |
891 | char c; | |
892 | char *cpu; | |
31add5f0 DE |
893 | |
894 | /* If an instruction has already been seen, it's too late. */ | |
895 | if (cpu_tables_init_p) | |
49af8f35 | 896 | { |
31add5f0 DE |
897 | as_bad (".cpu command must appear before any instructions"); |
898 | ignore_rest_of_line (); | |
49af8f35 DE |
899 | return; |
900 | } | |
31add5f0 DE |
901 | |
902 | cpu = input_line_pointer; | |
903 | c = get_symbol_end (); | |
904 | mach = arc_get_mach (cpu); | |
905 | *input_line_pointer = c; | |
906 | if (mach == -1) | |
907 | goto bad_cpu; | |
908 | ||
31add5f0 DE |
909 | demand_empty_rest_of_line (); |
910 | ||
911 | /* The cpu may have been selected on the command line. | |
912 | The choices must match. */ | |
5acf432d DE |
913 | /* ??? This was a command line option early on. It's gone now, but |
914 | leave this in. */ | |
915 | if (mach_type_specified_p && mach != arc_mach_type) | |
916 | as_bad (".cpu conflicts with previous value"); | |
31add5f0 | 917 | else |
49af8f35 | 918 | { |
31add5f0 | 919 | arc_mach_type = mach; |
5acf432d | 920 | mach_type_specified_p = 1; |
31add5f0 DE |
921 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) |
922 | as_warn ("could not set architecture and machine"); | |
49af8f35 | 923 | } |
31add5f0 | 924 | return; |
49af8f35 | 925 | |
31add5f0 DE |
926 | bad_cpu: |
927 | as_bad ("bad .cpu op"); | |
928 | ignore_rest_of_line (); | |
49af8f35 DE |
929 | } |
930 | ||
31add5f0 DE |
931 | #if 0 |
932 | /* The .rename pseudo-op. This is used by gcc to implement | |
933 | -mmangle-cpu-libgcc. */ | |
934 | ||
49af8f35 | 935 | static void |
31add5f0 | 936 | arc_rename (ignore) |
49af8f35 DE |
937 | int ignore; |
938 | { | |
31add5f0 DE |
939 | char *name,*new; |
940 | char c; | |
941 | symbolS *sym; | |
942 | int len; | |
943 | ||
944 | name = input_line_pointer; | |
945 | c = get_symbol_end (); | |
946 | sym = symbol_find_or_make (name); | |
947 | *input_line_pointer = c; | |
948 | ||
949 | if (*input_line_pointer != ',') | |
49af8f35 | 950 | { |
31add5f0 DE |
951 | as_bad ("missing rename string"); |
952 | ignore_rest_of_line (); | |
953 | return; | |
49af8f35 DE |
954 | } |
955 | ++input_line_pointer; | |
31add5f0 DE |
956 | SKIP_WHITESPACE (); |
957 | ||
958 | name = input_line_pointer; | |
959 | c = get_symbol_end (); | |
960 | if (*name == '\0') | |
961 | { | |
962 | *input_line_pointer = c; | |
963 | as_bad ("invalid symbol to rename to"); | |
964 | ignore_rest_of_line (); | |
965 | return; | |
966 | } | |
967 | new = (char *) xmalloc (strlen (name) + 1); | |
968 | strcpy (new, name); | |
969 | *input_line_pointer = c; | |
970 | sym->sy_tc.real_name = new; | |
971 | ||
972 | demand_empty_rest_of_line (); | |
49af8f35 | 973 | } |
31add5f0 | 974 | #endif |
49af8f35 DE |
975 | \f |
976 | /* Turn a string in input_line_pointer into a floating point constant of type | |
977 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
978 | emitted is stored in *sizeP. | |
979 | An error message is returned, or NULL on OK. */ | |
980 | ||
981 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
982 | #define MAX_LITTLENUMS 6 | |
983 | ||
984 | char * | |
985 | md_atof (type, litP, sizeP) | |
986 | char type; | |
987 | char *litP; | |
988 | int *sizeP; | |
989 | { | |
990 | int prec; | |
991 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
992 | LITTLENUM_TYPE *wordP; | |
993 | char *t; | |
994 | char *atof_ieee (); | |
995 | ||
996 | switch (type) | |
997 | { | |
998 | case 'f': | |
999 | case 'F': | |
1000 | prec = 2; | |
1001 | break; | |
1002 | ||
1003 | case 'd': | |
1004 | case 'D': | |
1005 | prec = 4; | |
1006 | break; | |
1007 | ||
1008 | default: | |
1009 | *sizeP = 0; | |
1010 | return "bad call to md_atof"; | |
1011 | } | |
1012 | ||
1013 | t = atof_ieee (input_line_pointer, type, words); | |
1014 | if (t) | |
1015 | input_line_pointer = t; | |
1016 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1017 | for (wordP = words; prec--;) | |
1018 | { | |
1019 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
1020 | litP += sizeof (LITTLENUM_TYPE); | |
1021 | } | |
1022 | ||
1023 | return NULL; | |
1024 | } | |
1025 | ||
1026 | /* Write a value out to the object file, using the appropriate | |
1027 | endianness. */ | |
1028 | ||
1029 | void | |
1030 | md_number_to_chars (buf, val, n) | |
1031 | char *buf; | |
1032 | valueT val; | |
1033 | int n; | |
1034 | { | |
31add5f0 DE |
1035 | if (target_big_endian) |
1036 | number_to_chars_bigendian (buf, val, n); | |
1037 | else | |
1038 | number_to_chars_littleendian (buf, val, n); | |
49af8f35 DE |
1039 | } |
1040 | ||
1041 | /* Round up a section size to the appropriate boundary. */ | |
1042 | ||
1043 | valueT | |
1044 | md_section_align (segment, size) | |
1045 | segT segment; | |
1046 | valueT size; | |
1047 | { | |
1048 | int align = bfd_get_section_alignment (stdoutput, segment); | |
1049 | ||
1050 | return ((size + (1 << align) - 1) & (-1 << align)); | |
1051 | } | |
1052 | ||
1053 | /* We don't have any form of relaxing. */ | |
1054 | ||
1055 | int | |
1056 | md_estimate_size_before_relax (fragp, seg) | |
1057 | fragS *fragp; | |
1058 | asection *seg; | |
1059 | { | |
1060 | abort (); | |
1061 | } | |
1062 | ||
49af8f35 DE |
1063 | /* Convert a machine dependent frag. We never generate these. */ |
1064 | ||
1065 | void | |
1066 | md_convert_frag (abfd, sec, fragp) | |
1067 | bfd *abfd; | |
1068 | asection *sec; | |
1069 | fragS *fragp; | |
1070 | { | |
1071 | abort (); | |
1072 | } | |
1073 | ||
1074 | /* Parse an operand that is machine-specific. | |
49af8f35 | 1075 | |
5acf432d DE |
1076 | The ARC has a special %-op to adjust addresses so they're usable in |
1077 | branches. The "st" is short for the STatus register. | |
1078 | ??? Later expand this to take a flags value too. | |
1079 | ||
1080 | ??? We can't create new expression types so we map the %-op's onto the | |
1081 | existing syntax. This means that the user could use the chosen syntax | |
1082 | to achieve the same effect. Perhaps put a special cookie in X_add_number | |
1083 | to mark the expression as special. */ | |
1084 | ||
49af8f35 DE |
1085 | void |
1086 | md_operand (expressionP) | |
1087 | expressionS *expressionP; | |
1088 | { | |
5acf432d DE |
1089 | char *p = input_line_pointer; |
1090 | ||
1091 | if (*p == '%' && strncmp (p, "%st(", 4) == 0) | |
1092 | { | |
5acf432d DE |
1093 | input_line_pointer += 4; |
1094 | expression (expressionP); | |
1095 | if (*input_line_pointer != ')') | |
1096 | { | |
1097 | as_bad ("missing ')' in %-op"); | |
1098 | return; | |
1099 | } | |
1100 | ++input_line_pointer; | |
fa7a56f8 DE |
1101 | if (expressionP->X_op == O_symbol |
1102 | && expressionP->X_add_number == 0 | |
1103 | /* I think this test is unnecessary but just as a sanity check... */ | |
1104 | && expressionP->X_op_symbol == NULL) | |
5acf432d | 1105 | { |
fa7a56f8 DE |
1106 | expressionS two; |
1107 | ||
1108 | expressionP->X_op = O_right_shift; | |
1109 | two.X_op = O_constant; | |
1110 | two.X_add_symbol = two.X_op_symbol = NULL; | |
1111 | two.X_add_number = 2; | |
1112 | expressionP->X_op_symbol = make_expr_symbol (&two); | |
1113 | } | |
1114 | /* allow %st(sym1-sym2) */ | |
1115 | else if (expressionP->X_op == O_subtract | |
1116 | && expressionP->X_add_symbol != NULL | |
1117 | && expressionP->X_op_symbol != NULL | |
1118 | && expressionP->X_add_number == 0) | |
1119 | { | |
1120 | expressionS two; | |
1121 | ||
1122 | expressionP->X_add_symbol = make_expr_symbol (expressionP); | |
1123 | expressionP->X_op = O_right_shift; | |
1124 | two.X_op = O_constant; | |
1125 | two.X_add_symbol = two.X_op_symbol = NULL; | |
1126 | two.X_add_number = 2; | |
1127 | expressionP->X_op_symbol = make_expr_symbol (&two); | |
1128 | } | |
1129 | else | |
1130 | { | |
1131 | as_bad ("expression too complex for %%st"); | |
5acf432d DE |
1132 | return; |
1133 | } | |
5acf432d | 1134 | } |
49af8f35 DE |
1135 | } |
1136 | ||
5acf432d DE |
1137 | /* We have no need to default values of symbols. |
1138 | We could catch register names here, but that is handled by inserting | |
1139 | them all in the symbol table to begin with. */ | |
49af8f35 | 1140 | |
49af8f35 DE |
1141 | symbolS * |
1142 | md_undefined_symbol (name) | |
1143 | char *name; | |
1144 | { | |
1145 | return 0; | |
5acf432d DE |
1146 | } |
1147 | \f | |
1148 | /* Functions concerning expressions. */ | |
1149 | ||
1150 | /* Parse a .byte, .word, etc. expression. | |
1151 | ||
1152 | Values for the status register are specified with %st(label). | |
1153 | `label' will be right shifted by 2. */ | |
1154 | ||
1155 | void | |
1156 | arc_parse_cons_expression (exp, nbytes) | |
1157 | expressionS *exp; | |
1158 | int nbytes; | |
1159 | { | |
1160 | expr (0, exp); | |
1161 | } | |
1162 | ||
1163 | /* Record a fixup for a cons expression. */ | |
1164 | ||
1165 | void | |
1166 | arc_cons_fix_new (frag, where, nbytes, exp) | |
1167 | fragS *frag; | |
1168 | int where; | |
1169 | int nbytes; | |
1170 | expressionS *exp; | |
1171 | { | |
1172 | if (nbytes == 4) | |
1173 | { | |
1174 | int reloc_type; | |
1175 | expressionS exptmp; | |
1176 | ||
1177 | /* This may be a special ARC reloc (eg: %st()). */ | |
1178 | reloc_type = get_arc_exp_reloc_type (1, BFD_RELOC_32, exp, &exptmp); | |
1179 | fix_new_exp (frag, where, nbytes, &exptmp, 0, reloc_type); | |
1180 | } | |
1181 | else | |
1182 | { | |
1183 | fix_new_exp (frag, where, nbytes, exp, 0, | |
1184 | nbytes == 2 ? BFD_RELOC_16 | |
1185 | : nbytes == 8 ? BFD_RELOC_64 | |
1186 | : BFD_RELOC_32); | |
1187 | } | |
1188 | } | |
49af8f35 DE |
1189 | \f |
1190 | /* Functions concerning relocs. */ | |
1191 | ||
1192 | /* The location from which a PC relative jump should be calculated, | |
1193 | given a PC relative reloc. */ | |
1194 | ||
1195 | long | |
1196 | md_pcrel_from (fixP) | |
1197 | fixS *fixP; | |
1198 | { | |
1199 | if (fixP->fx_addsy != (symbolS *) NULL | |
1200 | && ! S_IS_DEFINED (fixP->fx_addsy)) | |
2356dab3 DE |
1201 | { |
1202 | /* The symbol is undefined. Let the linker figure it out. */ | |
1203 | return 0; | |
1204 | } | |
49af8f35 DE |
1205 | |
1206 | /* Return the address of the delay slot. */ | |
1207 | return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size; | |
1208 | } | |
1209 | ||
5acf432d DE |
1210 | /* Compute the reloc type of an expression. |
1211 | The possibly modified expression is stored in EXPNEW. | |
1212 | ||
1213 | This is used to convert the expressions generated by the %-op's into | |
1214 | the appropriate operand type. It is called for both data in instructions | |
1215 | (operands) and data outside instructions (variables, debugging info, etc.). | |
1216 | ||
1217 | Currently supported %-ops: | |
1218 | ||
1219 | %st(symbol): represented as "symbol >> 2" | |
1220 | "st" is short for STatus as in the status register (pc) | |
1221 | ||
1222 | DEFAULT_TYPE is the type to use if no special processing is required. | |
1223 | ||
1224 | DATA_P is non-zero for data or limm values, zero for insn operands. | |
1225 | Remember that the opcode "insertion fns" cannot be used on data, they're | |
1226 | only for inserting operands into insns. They also can't be used for limm | |
1227 | values as the insertion routines don't handle limm values. When called for | |
1228 | insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When | |
1229 | called for data or limm values we use real reloc types. */ | |
1230 | ||
1231 | static int | |
1232 | get_arc_exp_reloc_type (data_p, default_type, exp, expnew) | |
1233 | int data_p; | |
1234 | int default_type; | |
1235 | expressionS *exp; | |
1236 | expressionS *expnew; | |
1237 | { | |
1238 | /* If the expression is "symbol >> 2" we must change it to just "symbol", | |
fa7a56f8 DE |
1239 | as fix_new_exp can't handle it. Similarily for (symbol - symbol) >> 2. |
1240 | That's ok though. What's really going on here is that we're using | |
1241 | ">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */ | |
1242 | ||
1243 | if (exp->X_op == O_right_shift | |
1244 | && exp->X_op_symbol != NULL | |
1245 | && exp->X_op_symbol->sy_value.X_op == O_constant | |
1246 | && exp->X_op_symbol->sy_value.X_add_number == 2 | |
1247 | && exp->X_add_number == 0) | |
5acf432d DE |
1248 | { |
1249 | if (exp->X_add_symbol != NULL | |
1250 | && (exp->X_add_symbol->sy_value.X_op == O_constant | |
fa7a56f8 | 1251 | || exp->X_add_symbol->sy_value.X_op == O_symbol)) |
5acf432d DE |
1252 | { |
1253 | *expnew = *exp; | |
1254 | expnew->X_op = O_symbol; | |
1255 | expnew->X_op_symbol = NULL; | |
1256 | return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; | |
1257 | } | |
fa7a56f8 DE |
1258 | else if (exp->X_add_symbol != NULL |
1259 | && exp->X_add_symbol->sy_value.X_op == O_subtract) | |
1260 | { | |
1261 | *expnew = exp->X_add_symbol->sy_value; | |
1262 | return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; | |
1263 | } | |
5acf432d DE |
1264 | } |
1265 | ||
1266 | *expnew = *exp; | |
1267 | return default_type; | |
1268 | } | |
1269 | ||
49af8f35 DE |
1270 | /* Apply a fixup to the object code. This is called for all the |
1271 | fixups we generated by the call to fix_new_exp, above. In the call | |
1272 | above we used a reloc code which was the largest legal reloc code | |
1273 | plus the operand index. Here we undo that to recover the operand | |
1274 | index. At this point all symbol values should be fully resolved, | |
1275 | and we attempt to completely resolve the reloc. If we can not do | |
5acf432d | 1276 | that, we determine the correct reloc code and put it back in the fixup. */ |
49af8f35 DE |
1277 | |
1278 | int | |
2356dab3 | 1279 | md_apply_fix3 (fixP, valueP, seg) |
49af8f35 DE |
1280 | fixS *fixP; |
1281 | valueT *valueP; | |
2356dab3 | 1282 | segT seg; |
49af8f35 DE |
1283 | { |
1284 | /*char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;*/ | |
1285 | valueT value; | |
1286 | ||
1287 | /* FIXME FIXME FIXME: The value we are passed in *valueP includes | |
1288 | the symbol values. Since we are using BFD_ASSEMBLER, if we are | |
1289 | doing this relocation the code in write.c is going to call | |
1290 | bfd_perform_relocation, which is also going to use the symbol | |
1291 | value. That means that if the reloc is fully resolved we want to | |
1292 | use *valueP since bfd_perform_relocation is not being used. | |
1293 | However, if the reloc is not fully resolved we do not want to use | |
1294 | *valueP, and must use fx_offset instead. However, if the reloc | |
1295 | is PC relative, we do want to use *valueP since it includes the | |
1296 | result of md_pcrel_from. This is confusing. */ | |
1297 | ||
1298 | if (fixP->fx_addsy == (symbolS *) NULL) | |
1299 | { | |
1300 | value = *valueP; | |
1301 | fixP->fx_done = 1; | |
1302 | } | |
1303 | else if (fixP->fx_pcrel) | |
2356dab3 DE |
1304 | { |
1305 | value = *valueP; | |
1306 | /* ELF relocations are against symbols. | |
1307 | If this symbol is in a different section then we need to leave it for | |
1308 | the linker to deal with. Unfortunately, md_pcrel_from can't tell, | |
1309 | so we have to undo it's effects here. */ | |
1310 | if (S_IS_DEFINED (fixP->fx_addsy) | |
1311 | && S_GET_SEGMENT (fixP->fx_addsy) != seg) | |
1312 | value += md_pcrel_from (fixP); | |
1313 | } | |
49af8f35 DE |
1314 | else |
1315 | { | |
1316 | value = fixP->fx_offset; | |
1317 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1318 | { | |
1319 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) | |
1320 | value -= S_GET_VALUE (fixP->fx_subsy); | |
1321 | else | |
1322 | { | |
1323 | /* We can't actually support subtracting a symbol. */ | |
1324 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1325 | "expression too complex"); | |
1326 | } | |
1327 | } | |
1328 | } | |
1329 | ||
1330 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) | |
1331 | { | |
1332 | int opindex; | |
1333 | const struct arc_operand *operand; | |
1334 | char *where; | |
1335 | arc_insn insn; | |
1336 | ||
1337 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; | |
1338 | ||
1339 | operand = &arc_operands[opindex]; | |
1340 | ||
1341 | /* Fetch the instruction, insert the fully resolved operand | |
1342 | value, and stuff the instruction back again. */ | |
1343 | where = fixP->fx_frag->fr_literal + fixP->fx_where; | |
31add5f0 DE |
1344 | if (target_big_endian) |
1345 | insn = bfd_getb32 ((unsigned char *) where); | |
1346 | else | |
1347 | insn = bfd_getl32 ((unsigned char *) where); | |
49af8f35 DE |
1348 | insn = arc_insert_operand (insn, operand, -1, NULL, (offsetT) value, |
1349 | fixP->fx_file, fixP->fx_line); | |
31add5f0 DE |
1350 | if (target_big_endian) |
1351 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
1352 | else | |
1353 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
49af8f35 DE |
1354 | |
1355 | if (fixP->fx_done) | |
1356 | { | |
1357 | /* Nothing else to do here. */ | |
1358 | return 1; | |
1359 | } | |
1360 | ||
1361 | /* Determine a BFD reloc value based on the operand information. | |
1362 | We are only prepared to turn a few of the operands into relocs. | |
5acf432d DE |
1363 | !!! Note that we can't handle limm values here. Since we're using |
1364 | implicit addends the addend must be inserted into the instruction, | |
1365 | however, the opcode insertion routines currently do nothing with | |
1366 | limm values. */ | |
1367 | if (operand->fmt == 'B') | |
1368 | { | |
1369 | assert ((operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0 | |
1370 | && operand->bits == 20 | |
1371 | && operand->shift == 7); | |
1372 | fixP->fx_r_type = BFD_RELOC_ARC_B22_PCREL; | |
1373 | } | |
1374 | else if (0 && operand->fmt == 'J') | |
1375 | { | |
1376 | assert ((operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) != 0 | |
1377 | && operand->bits == 24 | |
1378 | && operand->shift == 32); | |
1379 | fixP->fx_r_type = BFD_RELOC_ARC_B26; | |
1380 | } | |
1381 | else if (0 && operand->fmt == 'L') | |
1382 | { | |
1383 | assert ((operand->flags & ARC_OPERAND_LIMM) != 0 | |
1384 | && operand->bits == 32 | |
1385 | && operand->shift == 32); | |
1386 | fixP->fx_r_type = BFD_RELOC_32; | |
1387 | } | |
49af8f35 DE |
1388 | else |
1389 | { | |
1390 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1391 | "unresolved expression that must be resolved"); | |
1392 | fixP->fx_done = 1; | |
1393 | return 1; | |
1394 | } | |
1395 | } | |
1396 | else | |
1397 | { | |
1398 | switch (fixP->fx_r_type) | |
1399 | { | |
5acf432d | 1400 | case BFD_RELOC_8: |
49af8f35 | 1401 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
5acf432d | 1402 | value, 1); |
49af8f35 DE |
1403 | break; |
1404 | case BFD_RELOC_16: | |
1405 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1406 | value, 2); | |
1407 | break; | |
5acf432d | 1408 | case BFD_RELOC_32: |
49af8f35 | 1409 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
5acf432d DE |
1410 | value, 4); |
1411 | break; | |
1412 | #if 0 | |
1413 | case BFD_RELOC_64: | |
1414 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1415 | value, 8); | |
49af8f35 | 1416 | break; |
5acf432d | 1417 | #endif |
fa7a56f8 DE |
1418 | case BFD_RELOC_ARC_B26: |
1419 | /* If !fixP->fx_done then `value' is an implicit addend. | |
1420 | We must shift it right by 2 in this case as well because the | |
1421 | linker performs the relocation and then adds this in (as opposed | |
1422 | to adding this in and then shifting right by 2). */ | |
1423 | value >>= 2; | |
1424 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
1425 | value, 4); | |
1426 | break; | |
49af8f35 DE |
1427 | default: |
1428 | abort (); | |
1429 | } | |
1430 | } | |
1431 | ||
49af8f35 | 1432 | fixP->fx_addnumber = value; |
49af8f35 DE |
1433 | |
1434 | return 1; | |
1435 | } | |
1436 | ||
1437 | /* Translate internal representation of relocation info to BFD target | |
1438 | format. */ | |
1439 | ||
1440 | arelent * | |
1441 | tc_gen_reloc (section, fixP) | |
1442 | asection *section; | |
1443 | fixS *fixP; | |
1444 | { | |
1445 | arelent *reloc; | |
1446 | ||
1447 | reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent)); | |
1448 | ||
1449 | reloc->sym_ptr_ptr = &fixP->fx_addsy->bsym; | |
1450 | reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; | |
1451 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
1452 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1453 | { | |
1454 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1455 | "internal error: can't export reloc type %d (`%s')", | |
1456 | fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); | |
1457 | return NULL; | |
1458 | } | |
49af8f35 DE |
1459 | |
1460 | assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); | |
1461 | ||
2356dab3 DE |
1462 | reloc->addend = fixP->fx_addnumber; |
1463 | ||
49af8f35 DE |
1464 | return reloc; |
1465 | } | |
31add5f0 DE |
1466 | \f |
1467 | /* Frobbers. */ | |
1468 | ||
1469 | #if 0 | |
1470 | /* Set the real name if the .rename pseudo-op was used. | |
1471 | Return 1 if the symbol should not be included in the symbol table. */ | |
1472 | ||
1473 | int | |
1474 | arc_frob_symbol (sym) | |
1475 | symbolS *sym; | |
1476 | { | |
1477 | if (sym->sy_tc.real_name != (char *) NULL) | |
1478 | S_SET_NAME (sym, sym->sy_tc.real_name); | |
1479 | ||
1480 | return 0; | |
1481 | } | |
1482 | #endif |