Remove duplicate definitions of the md_atof() function
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
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1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
ec2655a6 3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007
2132e3a3 4 Free Software Foundation, Inc.
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5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
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12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
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21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
adde6300 23
adde6300 24#include "as.h"
3882b010 25#include "safe-ctype.h"
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26#include "subsegs.h"
27
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28struct avr_opcodes_s
29{
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30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
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35};
36
37#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38{#NAME, CONSTR, SIZE, ISA, BIN},
39
40struct avr_opcodes_s avr_opcodes[] =
41{
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44};
45
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46const char comment_chars[] = ";";
47const char line_comment_chars[] = "#";
48const char line_separator_chars[] = "$";
49
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50const char *md_shortopts = "m:";
51struct mcu_type_s
52{
53 char *name;
54 int isa;
55 int mach;
56};
57
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58/* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
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62static struct mcu_type_s mcu_types[] =
63{
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64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
72 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
83 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
85 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
89 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
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100 {"attiny43u", AVR_ISA_TINY2, bfd_mach_avr2},
101 {"attiny48", AVR_ISA_TINY2, bfd_mach_avr2},
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102 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
103 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
104 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
105 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
106 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
107 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
108 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
109 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
110 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
111 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
112 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
113 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
8eb2af8e 114 {"atmega8hva", AVR_ISA_PWMx, bfd_mach_avr4},
7b60f473 115 {"at90pwm1", AVR_ISA_PWMx, bfd_mach_avr4},
28c9d252 116 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
7337fc21 117 {"at90pwm2b", AVR_ISA_PWMx, bfd_mach_avr4},
28c9d252 118 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
7337fc21 119 {"at90pwm3b", AVR_ISA_PWMx, bfd_mach_avr4},
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120 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
121 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
122 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
123 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
026dcbd7 124 {"atmega164p", AVR_ISA_M323, bfd_mach_avr5},
28c9d252 125 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
026dcbd7 126 {"atmega165p", AVR_ISA_M323, bfd_mach_avr5},
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127 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
026dcbd7 129 {"atmega169p", AVR_ISA_M323, bfd_mach_avr5},
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130 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
026dcbd7 132 {"atmega324p", AVR_ISA_M323, bfd_mach_avr5},
28c9d252 133 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
7b60f473 134 {"atmega325p", AVR_ISA_M323, bfd_mach_avr5},
28c9d252 135 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
7b60f473 136 {"atmega329p", AVR_ISA_M323, bfd_mach_avr5},
28c9d252 137 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
7b60f473 138 {"atmega3250p",AVR_ISA_M323, bfd_mach_avr5},
28c9d252 139 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
7b60f473 140 {"atmega3290p",AVR_ISA_M323, bfd_mach_avr5},
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141 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
142 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
143 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
144 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
026dcbd7 145 {"atmega644p", AVR_ISA_M323, bfd_mach_avr5},
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146 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
147 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
148 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
149 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
150 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
151 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
152 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
8eb2af8e 153 {"atmega16hva",AVR_ISA_M323, bfd_mach_avr5},
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154 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
155 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
156 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
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157 {"at90pwm216", AVR_ISA_M323, bfd_mach_avr5},
158 {"at90pwm316", AVR_ISA_M323, bfd_mach_avr5},
8eb2af8e 159 {"at90usb82", AVR_ISA_M323, bfd_mach_avr5},
7b60f473 160 {"at90usb162", AVR_ISA_M323, bfd_mach_avr5},
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161 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
162 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
163 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
164 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
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165 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
166 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
167 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
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168 {NULL, 0, 0}
169};
170
adde6300 171/* Current MCU type. */
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172static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
173static struct mcu_type_s * avr_mcu = & default_mcu;
adde6300 174
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175/* AVR target-specific switches. */
176struct avr_opt_s
177{
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178 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
179 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
180 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
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181};
182
183static struct avr_opt_s avr_opt = { 0, 0, 0 };
184
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185const char EXP_CHARS[] = "eE";
186const char FLT_CHARS[] = "dD";
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187
188static void avr_set_arch (int);
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189
190/* The target specific pseudo-ops which we support. */
191const pseudo_typeS md_pseudo_table[] =
192{
193 {"arch", avr_set_arch, 0},
194 { NULL, NULL, 0}
195};
196
197#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 198
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199#define EXP_MOD_NAME(i) exp_mod[i].name
200#define EXP_MOD_RELOC(i) exp_mod[i].reloc
201#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
202#define HAVE_PM_P(i) exp_mod[i].have_pm
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203
204struct exp_mod_s
205{
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206 char * name;
207 bfd_reloc_code_real_type reloc;
208 bfd_reloc_code_real_type neg_reloc;
209 int have_pm;
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210};
211
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212static struct exp_mod_s exp_mod[] =
213{
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214 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
215 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
216 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
217 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
218 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
219 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
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220 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
221 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
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222};
223
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224/* A union used to store indicies into the exp_mod[] array
225 in a hash table which expects void * data types. */
226typedef union
227{
228 void * ptr;
229 int index;
230} mod_index;
231
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232/* Opcode hash table. */
233static struct hash_control *avr_hash;
234
235/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
236static struct hash_control *avr_mod_hash;
237
00d2865b 238#define OPTION_MMCU 'm'
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239enum options
240{
241 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
242 OPTION_NO_SKIP_BUG,
243 OPTION_NO_WRAP
244};
adde6300 245
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246struct option md_longopts[] =
247{
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248 { "mmcu", required_argument, NULL, OPTION_MMCU },
249 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
250 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
251 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
252 { NULL, no_argument, NULL, 0 }
adde6300 253};
adde6300 254
c6a7ab1f 255size_t md_longopts_size = sizeof (md_longopts);
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256
257/* Display nicely formatted list of known MCU names. */
c6a7ab1f 258
00d2865b 259static void
dc191a8f 260show_mcu_list (FILE *stream)
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261{
262 int i, x;
263
264 fprintf (stream, _("Known MCU names:"));
265 x = 1000;
1dab94dd 266
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267 for (i = 0; mcu_types[i].name; i++)
268 {
269 int len = strlen (mcu_types[i].name);
1dab94dd 270
00d2865b 271 x += len + 1;
1dab94dd 272
00d2865b 273 if (x < 75)
c6a7ab1f 274 fprintf (stream, " %s", mcu_types[i].name);
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275 else
276 {
277 fprintf (stream, "\n %s", mcu_types[i].name);
278 x = len + 2;
279 }
280 }
1dab94dd 281
c6a7ab1f 282 fprintf (stream, "\n");
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283}
284
adde6300 285static inline char *
dc191a8f 286skip_space (char *s)
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287{
288 while (*s == ' ' || *s == '\t')
289 ++s;
290 return s;
291}
292
293/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 294
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295static char *
296extract_word (char *from, char *to, int limit)
297{
298 char *op_start;
299 char *op_end;
300 int size = 0;
301
302 /* Drop leading whitespace. */
303 from = skip_space (from);
304 *to = 0;
c6a7ab1f 305
adde6300 306 /* Find the op code end. */
c6a7ab1f 307 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
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308 {
309 to[size++] = *op_end++;
310 if (size + 1 >= limit)
311 break;
312 }
1dab94dd 313
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314 to[size] = 0;
315 return op_end;
316}
317
318int
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319md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
320 asection *seg ATTRIBUTE_UNUSED)
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321{
322 abort ();
323 return 0;
324}
325
326void
dc191a8f 327md_show_usage (FILE *stream)
adde6300 328{
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329 fprintf (stream,
330 _("AVR options:\n"
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331 " -mmcu=[avr-name] select microcontroller variant\n"
332 " [avr-name] can be:\n"
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333 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
334 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
335 " avr3 - ATmega103, ATmega603\n"
336 " avr4 - ATmega83, ATmega85\n"
337 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 338 " or immediate microcontroller name.\n"));
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339 fprintf (stream,
340 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
341 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
342 " (default for avr4, avr5)\n"
343 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
344 " (default for avr3, avr5)\n"));
345 show_mcu_list (stream);
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346}
347
348static void
dc191a8f 349avr_set_arch (int dummy ATTRIBUTE_UNUSED)
adde6300 350{
dc191a8f 351 char str[20];
1dab94dd 352
adde6300 353 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 354 md_parse_option (OPTION_MMCU, str);
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355 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
356}
357
358int
dc191a8f 359md_parse_option (int c, char *arg)
adde6300 360{
00d2865b 361 switch (c)
adde6300 362 {
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363 case OPTION_MMCU:
364 {
365 int i;
366 char *s = alloca (strlen (arg) + 1);
adde6300 367
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368 {
369 char *t = s;
370 char *arg1 = arg;
371
372 do
3882b010 373 *t = TOLOWER (*arg1++);
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374 while (*t++);
375 }
376
377 for (i = 0; mcu_types[i].name; ++i)
378 if (strcmp (mcu_types[i].name, s) == 0)
379 break;
adde6300 380
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381 if (!mcu_types[i].name)
382 {
383 show_mcu_list (stderr);
384 as_fatal (_("unknown MCU: %s\n"), arg);
385 }
65aa24b6 386
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387 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
388 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
389 as .arch ... in the asm output at the same time. */
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390 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
391 avr_mcu = &mcu_types[i];
392 else
393 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
394 avr_mcu->name, mcu_types[i].name);
395 return 1;
396 }
397 case OPTION_ALL_OPCODES:
398 avr_opt.all_opcodes = 1;
399 return 1;
400 case OPTION_NO_SKIP_BUG:
401 avr_opt.no_skip_bug = 1;
402 return 1;
403 case OPTION_NO_WRAP:
404 avr_opt.no_wrap = 1;
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405 return 1;
406 }
1dab94dd 407
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408 return 0;
409}
410
411symbolS *
dc191a8f 412md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
adde6300 413{
dc191a8f 414 return NULL;
adde6300
AM
415}
416
adde6300 417char *
dc191a8f 418md_atof (int type, char *litP, int *sizeP)
adde6300 419{
499ac353 420 return ieee_md_atof (type, litP, sizeP, FALSE);
adde6300
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421}
422
423void
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424md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
425 asection *sec ATTRIBUTE_UNUSED,
426 fragS *fragP ATTRIBUTE_UNUSED)
adde6300
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427{
428 abort ();
429}
430
adde6300 431void
dc191a8f 432md_begin (void)
adde6300 433{
df136245 434 unsigned int i;
adde6300 435 struct avr_opcodes_s *opcode;
dc191a8f 436
c6a7ab1f 437 avr_hash = hash_new ();
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438
439 /* Insert unique names into hash table. This hash table then provides a
440 quick index to the first opcode with a particular name in the opcode
441 table. */
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442 for (opcode = avr_opcodes; opcode->name; opcode++)
443 hash_insert (avr_hash, opcode->name, (char *) opcode);
444
445 avr_mod_hash = hash_new ();
446
dc191a8f 447 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
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448 {
449 mod_index m;
450
451 m.index = i + 10;
452 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
453 }
c6a7ab1f 454
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455 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
456}
457
df136245 458/* Resolve STR as a constant expression and return the result.
c6a7ab1f 459 If result greater than MAX then error. */
df136245
DC
460
461static unsigned int
dc191a8f 462avr_get_constant (char *str, int max)
df136245
DC
463{
464 expressionS ex;
dc191a8f 465
df136245
DC
466 str = skip_space (str);
467 input_line_pointer = str;
dc191a8f 468 expression (& ex);
df136245
DC
469
470 if (ex.X_op != O_constant)
471 as_bad (_("constant value required"));
472
473 if (ex.X_add_number > max || ex.X_add_number < 0)
73f4d86e 474 as_bad (_("number must be positive and less than %d"), max + 1);
1dab94dd 475
df136245
DC
476 return ex.X_add_number;
477}
478
dc191a8f 479/* Parse for ldd/std offset. */
df136245 480
dc191a8f
NC
481static void
482avr_offset_expression (expressionS *exp)
adde6300 483{
dc191a8f
NC
484 char *str = input_line_pointer;
485 char *tmp;
486 char op[8];
adde6300 487
dc191a8f
NC
488 tmp = str;
489 str = extract_word (str, op, sizeof (op));
490
491 input_line_pointer = tmp;
492 expression (exp);
493
494 /* Warn about expressions that fail to use lo8 (). */
495 if (exp->X_op == O_constant)
adde6300 496 {
dc191a8f 497 int x = exp->X_add_number;
28c9d252 498
dc191a8f
NC
499 if (x < -255 || x > 255)
500 as_warn (_("constant out of 8-bit range: %d"), x);
501 }
502}
adde6300 503
dc191a8f 504/* Parse ordinary expression. */
adde6300 505
dc191a8f
NC
506static char *
507parse_exp (char *s, expressionS *op)
508{
509 input_line_pointer = s;
510 expression (op);
511 if (op->X_op == O_absent)
512 as_bad (_("missing operand"));
513 return input_line_pointer;
514}
1dab94dd 515
dc191a8f
NC
516/* Parse special expressions (needed for LDI command):
517 xx8 (address)
518 xx8 (-address)
519 pm_xx8 (address)
520 pm_xx8 (-address)
521 where xx is: hh, hi, lo. */
adde6300 522
dc191a8f
NC
523static bfd_reloc_code_real_type
524avr_ldi_expression (expressionS *exp)
525{
526 char *str = input_line_pointer;
527 char *tmp;
528 char op[8];
529 int mod;
28c9d252
NC
530 int linker_stubs_should_be_generated = 0;
531
dc191a8f 532 tmp = str;
adde6300 533
dc191a8f 534 str = extract_word (str, op, sizeof (op));
adde6300 535
dc191a8f
NC
536 if (op[0])
537 {
8ad7c533 538 mod_index m;
28c9d252 539
8ad7c533
NC
540 m.ptr = hash_find (avr_mod_hash, op);
541 mod = m.index;
1dab94dd 542
dc191a8f
NC
543 if (mod)
544 {
545 int closes = 0;
b170af93 546
dc191a8f
NC
547 mod -= 10;
548 str = skip_space (str);
00d2865b 549
dc191a8f
NC
550 if (*str == '(')
551 {
28c9d252 552 bfd_reloc_code_real_type reloc_to_return;
dc191a8f 553 int neg_p = 0;
00d2865b 554
dc191a8f 555 ++str;
00d2865b 556
dc191a8f 557 if (strncmp ("pm(", str, 3) == 0
28c9d252
NC
558 || strncmp ("gs(",str,3) == 0
559 || strncmp ("-(gs(",str,5) == 0
dc191a8f
NC
560 || strncmp ("-(pm(", str, 5) == 0)
561 {
562 if (HAVE_PM_P (mod))
563 {
564 ++mod;
565 ++closes;
566 }
567 else
568 as_bad (_("illegal expression"));
b170af93 569
28c9d252
NC
570 if (str[0] == 'g' || str[2] == 'g')
571 linker_stubs_should_be_generated = 1;
572
dc191a8f
NC
573 if (*str == '-')
574 {
575 neg_p = 1;
576 ++closes;
577 str += 5;
578 }
579 else
580 str += 3;
581 }
adde6300 582
dc191a8f
NC
583 if (*str == '-' && *(str + 1) == '(')
584 {
585 neg_p ^= 1;
586 ++closes;
587 str += 2;
588 }
750bce0e 589
dc191a8f
NC
590 input_line_pointer = str;
591 expression (exp);
750bce0e 592
dc191a8f
NC
593 do
594 {
595 if (*input_line_pointer != ')')
596 {
597 as_bad (_("`)' required"));
598 break;
599 }
600 input_line_pointer++;
601 }
602 while (closes--);
603
28c9d252
NC
604 reloc_to_return =
605 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
606 if (linker_stubs_should_be_generated)
607 {
608 switch (reloc_to_return)
609 {
610 case BFD_RELOC_AVR_LO8_LDI_PM:
611 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
612 break;
613 case BFD_RELOC_AVR_HI8_LDI_PM:
614 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
615 break;
616
617 default:
618 as_warn (_("expression dangerous with linker stubs"));
619 }
620 }
621 return reloc_to_return;
dc191a8f
NC
622 }
623 }
624 }
750bce0e
NC
625
626 input_line_pointer = tmp;
627 expression (exp);
628
629 /* Warn about expressions that fail to use lo8 (). */
630 if (exp->X_op == O_constant)
631 {
632 int x = exp->X_add_number;
dc191a8f 633
750bce0e
NC
634 if (x < -255 || x > 255)
635 as_warn (_("constant out of 8-bit range: %d"), x);
636 }
dc191a8f
NC
637
638 return BFD_RELOC_AVR_LDI;
750bce0e
NC
639}
640
df136245 641/* Parse one instruction operand.
c6a7ab1f
NC
642 Return operand bitmask. Also fixups can be generated. */
643
adde6300 644static unsigned int
dc191a8f
NC
645avr_operand (struct avr_opcodes_s *opcode,
646 int where,
647 char *op,
648 char **line)
adde6300 649{
adde6300 650 expressionS op_expr;
df136245
DC
651 unsigned int op_mask = 0;
652 char *str = skip_space (*line);
adde6300 653
adde6300
AM
654 switch (*op)
655 {
656 /* Any register operand. */
657 case 'w':
658 case 'd':
659 case 'r':
b170af93
DC
660 case 'a':
661 case 'v':
c6a7ab1f
NC
662 if (*str == 'r' || *str == 'R')
663 {
664 char r_name[20];
1dab94dd 665
c6a7ab1f 666 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 667 op_mask = 0xff;
3882b010 668 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
669 {
670 if (r_name[2] == '\0')
671 op_mask = r_name[1] - '0';
672 else if (r_name[1] != '0'
3882b010 673 && ISDIGIT (r_name[2])
c6a7ab1f
NC
674 && r_name[3] == '\0')
675 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
676 }
677 }
678 else
679 {
680 op_mask = avr_get_constant (str, 31);
681 str = input_line_pointer;
682 }
1dab94dd 683
c6a7ab1f
NC
684 if (op_mask <= 31)
685 {
686 switch (*op)
687 {
688 case 'a':
689 if (op_mask < 16 || op_mask > 23)
690 as_bad (_("register r16-r23 required"));
691 op_mask -= 16;
692 break;
1dab94dd 693
c6a7ab1f
NC
694 case 'd':
695 if (op_mask < 16)
696 as_bad (_("register number above 15 required"));
697 op_mask -= 16;
698 break;
1dab94dd 699
c6a7ab1f
NC
700 case 'v':
701 if (op_mask & 1)
702 as_bad (_("even register number required"));
703 op_mask >>= 1;
704 break;
1dab94dd 705
c6a7ab1f 706 case 'w':
65b1d096 707 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 708 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 709 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
710 break;
711 }
712 break;
713 }
714 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
715 break;
716
717 case 'e':
718 {
719 char c;
1dab94dd 720
adde6300
AM
721 if (*str == '-')
722 {
c6a7ab1f 723 str = skip_space (str + 1);
adde6300
AM
724 op_mask = 0x1002;
725 }
3882b010 726 c = TOLOWER (*str);
adde6300
AM
727 if (c == 'x')
728 op_mask |= 0x100c;
729 else if (c == 'y')
730 op_mask |= 0x8;
731 else if (c != 'z')
00d2865b 732 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 733
c6a7ab1f 734 str = skip_space (str + 1);
adde6300
AM
735 if (*str == '+')
736 {
737 ++str;
738 if (op_mask & 2)
00d2865b 739 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
740 op_mask |= 0x1001;
741 }
e38c9cc2 742
1188e082 743 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 744 registers, no predecrement, no postincrement. */
00d2865b
NC
745 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
746 && !(avr_mcu->isa & AVR_ISA_SRAM))
747 as_bad (_("addressing mode not supported"));
adde6300
AM
748 }
749 break;
750
b170af93 751 case 'z':
c6a7ab1f
NC
752 if (*str == '-')
753 as_bad (_("can't predecrement"));
1dab94dd 754
c6a7ab1f
NC
755 if (! (*str == 'z' || *str == 'Z'))
756 as_bad (_("pointer register Z required"));
1dab94dd 757
c6a7ab1f
NC
758 str = skip_space (str + 1);
759
760 if (*str == '+')
761 {
762 ++str;
763 op_mask |= 1;
764 }
b170af93
DC
765 break;
766
adde6300
AM
767 case 'b':
768 {
3882b010 769 char c = TOLOWER (*str++);
1dab94dd 770
adde6300
AM
771 if (c == 'y')
772 op_mask |= 0x8;
773 else if (c != 'z')
00d2865b 774 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
775 str = skip_space (str);
776 if (*str++ == '+')
777 {
750bce0e
NC
778 input_line_pointer = str;
779 avr_offset_expression (& op_expr);
adde6300 780 str = input_line_pointer;
750bce0e
NC
781 fix_new_exp (frag_now, where, 3,
782 &op_expr, FALSE, BFD_RELOC_AVR_6);
adde6300
AM
783 }
784 }
785 break;
786
787 case 'h':
c6a7ab1f
NC
788 str = parse_exp (str, &op_expr);
789 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 790 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
adde6300
AM
791 break;
792
793 case 'L':
c6a7ab1f
NC
794 str = parse_exp (str, &op_expr);
795 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 796 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
797 break;
798
799 case 'l':
c6a7ab1f
NC
800 str = parse_exp (str, &op_expr);
801 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 802 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
803 break;
804
805 case 'i':
c6a7ab1f
NC
806 str = parse_exp (str, &op_expr);
807 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
b34976b6 808 &op_expr, FALSE, BFD_RELOC_16);
adde6300
AM
809 break;
810
811 case 'M':
812 {
813 bfd_reloc_code_real_type r_type;
1dab94dd 814
c6a7ab1f
NC
815 input_line_pointer = str;
816 r_type = avr_ldi_expression (&op_expr);
817 str = input_line_pointer;
adde6300 818 fix_new_exp (frag_now, where, 3,
b34976b6 819 &op_expr, FALSE, r_type);
adde6300
AM
820 }
821 break;
822
823 case 'n':
824 {
825 unsigned int x;
1dab94dd 826
adde6300
AM
827 x = ~avr_get_constant (str, 255);
828 str = input_line_pointer;
829 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
830 }
831 break;
832
833 case 'K':
750bce0e
NC
834 input_line_pointer = str;
835 avr_offset_expression (& op_expr);
836 str = input_line_pointer;
837 fix_new_exp (frag_now, where, 3,
838 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
adde6300
AM
839 break;
840
841 case 'S':
842 case 's':
843 {
844 unsigned int x;
1dab94dd 845
adde6300
AM
846 x = avr_get_constant (str, 7);
847 str = input_line_pointer;
848 if (*op == 'S')
849 x <<= 4;
850 op_mask |= x;
851 }
852 break;
853
854 case 'P':
855 {
856 unsigned int x;
1dab94dd 857
adde6300
AM
858 x = avr_get_constant (str, 63);
859 str = input_line_pointer;
860 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
861 }
862 break;
863
864 case 'p':
865 {
866 unsigned int x;
1dab94dd 867
adde6300
AM
868 x = avr_get_constant (str, 31);
869 str = input_line_pointer;
870 op_mask |= x << 3;
871 }
872 break;
1dab94dd 873
1188e082
DC
874 case '?':
875 break;
1dab94dd 876
adde6300 877 default:
00d2865b 878 as_bad (_("unknown constraint `%c'"), *op);
adde6300 879 }
1dab94dd 880
adde6300
AM
881 *line = str;
882 return op_mask;
883}
884
dc191a8f
NC
885/* Parse instruction operands.
886 Return binary opcode. */
887
888static unsigned int
889avr_operands (struct avr_opcodes_s *opcode, char **line)
890{
891 char *op = opcode->constraints;
892 unsigned int bin = opcode->bin_opcode;
893 char *frag = frag_more (opcode->insn_size * 2);
894 char *str = *line;
895 int where = frag - frag_now->fr_literal;
896 static unsigned int prev = 0; /* Previous opcode. */
897
898 /* Opcode have operands. */
899 if (*op)
900 {
901 unsigned int reg1 = 0;
902 unsigned int reg2 = 0;
903 int reg1_present = 0;
904 int reg2_present = 0;
905
906 /* Parse first operand. */
907 if (REGISTER_P (*op))
908 reg1_present = 1;
909 reg1 = avr_operand (opcode, where, op, &str);
910 ++op;
911
912 /* Parse second operand. */
913 if (*op)
914 {
915 if (*op == ',')
916 ++op;
917
918 if (*op == '=')
919 {
920 reg2 = reg1;
921 reg2_present = 1;
922 }
923 else
924 {
925 if (REGISTER_P (*op))
926 reg2_present = 1;
927
928 str = skip_space (str);
929 if (*str++ != ',')
930 as_bad (_("`,' required"));
931 str = skip_space (str);
932
933 reg2 = avr_operand (opcode, where, op, &str);
934 }
935
936 if (reg1_present && reg2_present)
937 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
938 else if (reg2_present)
939 reg2 <<= 4;
940 }
941 if (reg1_present)
942 reg1 <<= 4;
943 bin |= reg1 | reg2;
944 }
945
946 /* Detect undefined combinations (like ld r31,Z+). */
947 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
948 as_warn (_("undefined combination of operands"));
949
950 if (opcode->insn_size == 2)
951 {
952 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
953 (AVR core bug, fixed in the newer devices). */
954 if (!(avr_opt.no_skip_bug ||
955 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
956 && AVR_SKIP_P (prev))
957 as_warn (_("skipping two-word instruction"));
958
959 bfd_putl32 ((bfd_vma) bin, frag);
960 }
961 else
962 bfd_putl16 ((bfd_vma) bin, frag);
963
964 prev = bin;
965 *line = str;
966 return bin;
967}
968
adde6300
AM
969/* GAS will call this function for each section at the end of the assembly,
970 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 971
adde6300 972valueT
dc191a8f 973md_section_align (asection *seg, valueT addr)
adde6300
AM
974{
975 int align = bfd_get_section_alignment (stdoutput, seg);
976 return ((addr + (1 << align) - 1) & (-1 << align));
977}
978
979/* If you define this macro, it should return the offset between the
980 address of a PC relative fixup and the position from which the PC
981 relative adjustment should be made. On many processors, the base
982 of a PC relative instruction is the next instruction, so this
983 macro would return the length of an instruction. */
c6a7ab1f 984
adde6300 985long
dc191a8f 986md_pcrel_from_section (fixS *fixp, segT sec)
adde6300 987{
c6a7ab1f 988 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
989 && (!S_IS_DEFINED (fixp->fx_addsy)
990 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
991 return 0;
1dab94dd 992
adde6300
AM
993 return fixp->fx_frag->fr_address + fixp->fx_where;
994}
995
996/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
997 value in the object file. */
998
94f592af 999void
dc191a8f 1000md_apply_fix (fixS *fixP, valueT * valP, segT seg)
adde6300
AM
1001{
1002 unsigned char *where;
1003 unsigned long insn;
a161fe53 1004 long value = *valP;
adde6300 1005
94f592af
NC
1006 if (fixP->fx_addsy == (symbolS *) NULL)
1007 fixP->fx_done = 1;
1008
87733541
AM
1009 else if (fixP->fx_pcrel)
1010 {
1011 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1012
1013 if (s == seg || s == absolute_section)
1014 {
1015 value += S_GET_VALUE (fixP->fx_addsy);
1016 fixP->fx_done = 1;
1017 }
1018 }
1019
a161fe53
AM
1020 /* We don't actually support subtracting a symbol. */
1021 if (fixP->fx_subsy != (symbolS *) NULL)
1022 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1dab94dd 1023
94f592af 1024 switch (fixP->fx_r_type)
adde6300
AM
1025 {
1026 default:
94f592af 1027 fixP->fx_no_overflow = 1;
adde6300
AM
1028 break;
1029 case BFD_RELOC_AVR_7_PCREL:
1030 case BFD_RELOC_AVR_13_PCREL:
1031 case BFD_RELOC_32:
1032 case BFD_RELOC_16:
1033 case BFD_RELOC_AVR_CALL:
1034 break;
1035 }
1036
94f592af 1037 if (fixP->fx_done)
adde6300
AM
1038 {
1039 /* Fetch the instruction, insert the fully resolved operand
1040 value, and stuff the instruction back again. */
2132e3a3 1041 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
adde6300
AM
1042 insn = bfd_getl16 (where);
1043
94f592af 1044 switch (fixP->fx_r_type)
adde6300
AM
1045 {
1046 case BFD_RELOC_AVR_7_PCREL:
1047 if (value & 1)
94f592af 1048 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1049 _("odd address operand: %ld"), value);
1dab94dd 1050
adde6300
AM
1051 /* Instruction addresses are always right-shifted by 1. */
1052 value >>= 1;
1053 --value; /* Correct PC. */
1dab94dd 1054
adde6300 1055 if (value < -64 || value > 63)
94f592af 1056 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1057 _("operand out of range: %ld"), value);
1058 value = (value << 3) & 0x3f8;
1059 bfd_putl16 ((bfd_vma) (value | insn), where);
1060 break;
1061
1062 case BFD_RELOC_AVR_13_PCREL:
1063 if (value & 1)
94f592af 1064 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1065 _("odd address operand: %ld"), value);
1dab94dd 1066
adde6300
AM
1067 /* Instruction addresses are always right-shifted by 1. */
1068 value >>= 1;
1069 --value; /* Correct PC. */
adde6300
AM
1070
1071 if (value < -2048 || value > 2047)
1072 {
65aa24b6 1073 /* No wrap for devices with >8K of program memory. */
00d2865b 1074 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
94f592af 1075 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1076 _("operand out of range: %ld"), value);
1077 }
1078
1079 value &= 0xfff;
1080 bfd_putl16 ((bfd_vma) (value | insn), where);
1081 break;
1082
1083 case BFD_RELOC_32:
1084 bfd_putl16 ((bfd_vma) value, where);
1085 break;
1086
1087 case BFD_RELOC_16:
1088 bfd_putl16 ((bfd_vma) value, where);
1089 break;
1090
1091 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 1092 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
1093 break;
1094
750bce0e
NC
1095 case BFD_RELOC_AVR_LDI:
1096 if (value > 255)
1097 as_bad_where (fixP->fx_file, fixP->fx_line,
1098 _("operand out of range: %ld"), value);
1099 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1100 break;
1101
1102 case BFD_RELOC_AVR_6:
1103 if ((value > 63) || (value < 0))
1104 as_bad_where (fixP->fx_file, fixP->fx_line,
1105 _("operand out of range: %ld"), value);
1106 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1107 break;
1108
1109 case BFD_RELOC_AVR_6_ADIW:
1110 if ((value > 63) || (value < 0))
1111 as_bad_where (fixP->fx_file, fixP->fx_line,
1112 _("operand out of range: %ld"), value);
1113 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1114 break;
1115
adde6300
AM
1116 case BFD_RELOC_AVR_LO8_LDI:
1117 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1118 break;
1119
adde6300
AM
1120 case BFD_RELOC_AVR_HI8_LDI:
1121 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1122 break;
1123
df406460 1124 case BFD_RELOC_AVR_MS8_LDI:
adde6300
AM
1125 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1126 break;
1127
1128 case BFD_RELOC_AVR_HH8_LDI:
1129 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1130 break;
1131
1132 case BFD_RELOC_AVR_LO8_LDI_NEG:
1133 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1134 break;
1135
adde6300
AM
1136 case BFD_RELOC_AVR_HI8_LDI_NEG:
1137 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1138 break;
1139
df406460 1140 case BFD_RELOC_AVR_MS8_LDI_NEG:
adde6300
AM
1141 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1142 break;
1143
1144 case BFD_RELOC_AVR_HH8_LDI_NEG:
1145 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1146 break;
1147
1148 case BFD_RELOC_AVR_LO8_LDI_PM:
1149 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1150 break;
1151
1152 case BFD_RELOC_AVR_HI8_LDI_PM:
1153 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1154 break;
1155
1156 case BFD_RELOC_AVR_HH8_LDI_PM:
1157 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1158 break;
1159
1160 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1161 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1162 break;
1163
1164 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1165 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1166 break;
1167
1168 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1169 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1170 break;
1171
1172 case BFD_RELOC_AVR_CALL:
1173 {
1174 unsigned long x;
1dab94dd 1175
adde6300
AM
1176 x = bfd_getl16 (where);
1177 if (value & 1)
94f592af 1178 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1179 _("odd address operand: %ld"), value);
1180 value >>= 1;
1181 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1182 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 1183 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
1184 }
1185 break;
1186
1187 default:
c6a7ab1f 1188 as_fatal (_("line %d: unknown relocation type: 0x%x"),
94f592af 1189 fixP->fx_line, fixP->fx_r_type);
adde6300
AM
1190 break;
1191 }
1192 }
1193 else
1194 {
94f592af 1195 switch (fixP->fx_r_type)
adde6300
AM
1196 {
1197 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1198 case -BFD_RELOC_AVR_HI8_LDI:
1199 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1200 case -BFD_RELOC_AVR_LO8_LDI:
94f592af 1201 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1202 _("only constant expression allowed"));
94f592af 1203 fixP->fx_done = 1;
adde6300
AM
1204 break;
1205 default:
1206 break;
1207 }
adde6300 1208 }
adde6300
AM
1209}
1210
7be1c489
AM
1211/* GAS will call this to generate a reloc, passing the resulting reloc
1212 to `bfd_install_relocation'. This currently works poorly, as
1213 `bfd_install_relocation' often does the wrong thing, and instances of
1214 `tc_gen_reloc' have been written to work around the problems, which
1215 in turns makes it difficult to fix `bfd_install_relocation'. */
adde6300
AM
1216
1217/* If while processing a fixup, a reloc really needs to be created
1218 then it is done here. */
1219
1220arelent *
dc191a8f
NC
1221tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1222 fixS *fixp)
adde6300
AM
1223{
1224 arelent *reloc;
1225
df406460
NC
1226 if (fixp->fx_addsy && fixp->fx_subsy)
1227 {
1228 long value = 0;
1229
1230 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1231 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1232 {
1233 as_bad_where (fixp->fx_file, fixp->fx_line,
1234 "Difference of symbols in different sections is not supported");
1235 return NULL;
1236 }
1237
28c9d252 1238 /* We are dealing with two symbols defined in the same section.
df406460
NC
1239 Let us fix-up them here. */
1240 value += S_GET_VALUE (fixp->fx_addsy);
1241 value -= S_GET_VALUE (fixp->fx_subsy);
1242
1243 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1244 only takes it's second operands for the fixup value. */
1245 fixp->fx_addsy = NULL;
1246 fixp->fx_subsy = NULL;
1247 md_apply_fix (fixp, (valueT *) &value, NULL);
1248
1249 return NULL;
1250 }
1251
dc191a8f 1252 reloc = xmalloc (sizeof (arelent));
adde6300 1253
dc191a8f 1254 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
adde6300
AM
1255 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1256
1257 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1258 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1259 if (reloc->howto == (reloc_howto_type *) NULL)
1260 {
1261 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1262 _("reloc %d not supported by object file format"),
1263 (int) fixp->fx_r_type);
adde6300
AM
1264 return NULL;
1265 }
1266
1267 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1268 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1269 reloc->address = fixp->fx_offset;
1270
1271 reloc->addend = fixp->fx_offset;
1272
1273 return reloc;
1274}
1275
adde6300 1276void
dc191a8f 1277md_assemble (char *str)
adde6300 1278{
c6a7ab1f 1279 struct avr_opcodes_s *opcode;
adde6300
AM
1280 char op[11];
1281
c6a7ab1f 1282 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1283
1284 if (!op[0])
00d2865b 1285 as_bad (_("can't find opcode "));
adde6300
AM
1286
1287 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1288
1289 if (opcode == NULL)
1290 {
00d2865b 1291 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1292 return;
1293 }
1294
b170af93 1295 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1296 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1297
1188e082
DC
1298 if (*str && *opcode->constraints == '?')
1299 ++opcode;
b170af93 1300
00d2865b
NC
1301 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1302 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1303
1304 /* We used to set input_line_pointer to the result of get_operands,
1305 but that is wrong. Our caller assumes we don't change it. */
1306 {
1307 char *t = input_line_pointer;
dc191a8f 1308
adde6300 1309 avr_operands (opcode, &str);
b170af93 1310 if (*skip_space (str))
00d2865b 1311 as_bad (_("garbage at end of line"));
adde6300
AM
1312 input_line_pointer = t;
1313 }
1314}
1315
adde6300 1316/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1317 `avr_cons_fix_new'. */
adde6300
AM
1318static int exp_mod_pm = 0;
1319
1320/* Parse special CONS expression: pm (expression)
28c9d252
NC
1321 or alternatively: gs (expression).
1322 These are used for addressing program memory.
c6a7ab1f
NC
1323 Relocation: BFD_RELOC_AVR_16_PM. */
1324
adde6300 1325void
dc191a8f 1326avr_parse_cons_expression (expressionS *exp, int nbytes)
adde6300 1327{
c6a7ab1f 1328 char *tmp;
adde6300
AM
1329
1330 exp_mod_pm = 0;
1331
1332 tmp = input_line_pointer = skip_space (input_line_pointer);
1333
1334 if (nbytes == 2)
1335 {
28c9d252
NC
1336 char *pm_name1 = "pm";
1337 char *pm_name2 = "gs";
1338 int len = strlen (pm_name1);
1339 /* len must be the same for both pm identifiers. */
1dab94dd 1340
28c9d252
NC
1341 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1342 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
adde6300
AM
1343 {
1344 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1345
adde6300
AM
1346 if (*input_line_pointer == '(')
1347 {
1348 input_line_pointer = skip_space (input_line_pointer + 1);
1349 exp_mod_pm = 1;
1350 expression (exp);
1dab94dd 1351
adde6300
AM
1352 if (*input_line_pointer == ')')
1353 ++input_line_pointer;
1354 else
1355 {
00d2865b 1356 as_bad (_("`)' required"));
adde6300
AM
1357 exp_mod_pm = 0;
1358 }
1dab94dd 1359
adde6300
AM
1360 return;
1361 }
1dab94dd 1362
adde6300
AM
1363 input_line_pointer = tmp;
1364 }
1365 }
1dab94dd 1366
adde6300
AM
1367 expression (exp);
1368}
1369
1370void
dc191a8f
NC
1371avr_cons_fix_new (fragS *frag,
1372 int where,
1373 int nbytes,
1374 expressionS *exp)
adde6300
AM
1375{
1376 if (exp_mod_pm == 0)
1377 {
1378 if (nbytes == 2)
b34976b6 1379 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
adde6300 1380 else if (nbytes == 4)
b34976b6 1381 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
adde6300 1382 else
00d2865b 1383 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
adde6300
AM
1384 }
1385 else
1386 {
1387 if (nbytes == 2)
b34976b6 1388 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
adde6300 1389 else
00d2865b 1390 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
adde6300
AM
1391 exp_mod_pm = 0;
1392 }
1393}
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