Commit | Line | Data |
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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
4b95cf5c | 3 | Copyright (C) 1999-2014 Free Software Foundation, Inc. |
adde6300 AM |
4 | Contributed by Denis Chertykov <denisc@overta.ru> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 22 | |
adde6300 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
adde6300 | 25 | #include "subsegs.h" |
fb5b7503 | 26 | #include "dwarf2dbg.h" |
af3ecb4a RH |
27 | #include "dw2gencfi.h" |
28 | ||
adde6300 | 29 | |
1188e082 DC |
30 | struct avr_opcodes_s |
31 | { | |
dc191a8f NC |
32 | char * name; |
33 | char * constraints; | |
8cc66334 | 34 | char * opcode; |
dc191a8f NC |
35 | int insn_size; /* In words. */ |
36 | int isa; | |
37 | unsigned int bin_opcode; | |
1188e082 DC |
38 | }; |
39 | ||
40 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
8cc66334 | 41 | {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, |
1188e082 DC |
42 | |
43 | struct avr_opcodes_s avr_opcodes[] = | |
44 | { | |
45 | #include "opcode/avr.h" | |
8cc66334 | 46 | {NULL, NULL, NULL, 0, 0, 0} |
1188e082 DC |
47 | }; |
48 | ||
adde6300 AM |
49 | const char comment_chars[] = ";"; |
50 | const char line_comment_chars[] = "#"; | |
51 | const char line_separator_chars[] = "$"; | |
52 | ||
adde6300 AM |
53 | const char *md_shortopts = "m:"; |
54 | struct mcu_type_s | |
55 | { | |
56 | char *name; | |
57 | int isa; | |
58 | int mach; | |
59 | }; | |
60 | ||
1f8ae5e6 | 61 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 62 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 63 | |
adde6300 AM |
64 | static struct mcu_type_s mcu_types[] = |
65 | { | |
7b21ac3f EW |
66 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
67 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
99700d6f NC |
68 | but set to AVR_ISA_AVR25 for some following version |
69 | of GCC (from 4.3) for backward compatibility. */ | |
7b21ac3f EW |
70 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, |
71 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
99700d6f NC |
72 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, |
73 | but set to AVR_ISA_AVR3_ALL for some following version | |
7b21ac3f EW |
74 | of GCC (from 4.3) for backward compatibility. */ |
75 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
76 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
77 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
78 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
99700d6f NC |
79 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, |
80 | but set to AVR_ISA_AVR51 for some following version | |
7b21ac3f EW |
81 | of GCC (from 4.3) for backward compatibility. */ |
82 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
83 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
84 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
85 | {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1}, |
86 | {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
87 | {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3}, | |
88 | {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
89 | {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
90 | {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
91 | {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
f36e8886 | 92 | {"avrtiny", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, |
28c9d252 | 93 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
94 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
95 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
96 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
97 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
98 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
100 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
101 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
102 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 103 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
104 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
105 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
106 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
107 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
108 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
109 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
255d9eec | 110 | {"ata5272", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
111 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, |
112 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
113 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 114 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 115 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
116 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
117 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 118 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 119 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 120 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 121 | {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
122 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, |
123 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
124 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
125 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 126 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 127 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 128 | {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 129 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 130 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 131 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
132 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
133 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
134 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
255d9eec | 135 | {"attiny828", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
136 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, |
137 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, | |
138 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
139 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
140 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
141 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
142 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, | |
143 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
255d9eec | 144 | {"ata5505", AVR_ISA_AVR35, bfd_mach_avr35}, |
11908008 EW |
145 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
146 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
147 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
255d9eec | 148 | {"attiny1634", AVR_ISA_AVR35, bfd_mach_avr35}, |
28c9d252 | 149 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
8be59acb | 150 | {"ata6289", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec DC |
151 | {"atmega8a", AVR_ISA_M8, bfd_mach_avr4}, |
152 | {"ata6285", AVR_ISA_AVR4, bfd_mach_avr4}, | |
153 | {"ata6286", AVR_ISA_AVR4, bfd_mach_avr4}, | |
7b21ac3f | 154 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 155 | {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec | 156 | {"atmega48pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f EW |
157 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, |
158 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
e760a81b | 159 | {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 160 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 161 | {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
28c9d252 NC |
162 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
163 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f EW |
164 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
165 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
166 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
167 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
168 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
169 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 170 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec DC |
171 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
172 | {"ata5790", AVR_ISA_AVR5, bfd_mach_avr5}, | |
173 | {"ata5795", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 174 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 175 | {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 176 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 177 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 178 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
e760a81b | 179 | {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 180 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 181 | {"atmega164pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 182 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 183 | {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 184 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 185 | {"atmega165pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 186 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 187 | {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 188 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 189 | {"atmega168pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 190 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 191 | {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 192 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 193 | {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 194 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 195 | {"atmega32a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 196 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 197 | {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 198 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 199 | {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 200 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 201 | {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 202 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 203 | {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 204 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 205 | {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 206 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 207 | {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 208 | {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
209 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, |
210 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 211 | {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 212 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 213 | {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 214 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 215 | {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 216 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 217 | {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 218 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec DC |
219 | {"atmega64rfr2", AVR_ISA_AVR5, bfd_mach_avr5}, |
220 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 221 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 222 | {"atmega64a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
223 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, |
224 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 225 | {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 226 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, |
8453da2e | 227 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 228 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
229 | {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5}, |
230 | {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 231 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
232 | {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5}, |
233 | {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 234 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
235 | {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5}, |
236 | {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 237 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
238 | {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5}, |
239 | {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
4d13caa0 NC |
240 | {"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, |
241 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 242 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 243 | {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 244 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 245 | {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
2b02f87c | 246 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 247 | {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
e760a81b | 248 | {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
249 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
250 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
b8c610a7 | 251 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
252 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, |
253 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
254 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
255 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
256 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 257 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
258 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
259 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 260 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 261 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
262 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
263 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 264 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 265 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
e760a81b | 266 | {"m3000", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 267 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
255d9eec | 268 | {"atmega128a", AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
269 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, |
270 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
255d9eec | 271 | {"atmega1284", AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f | 272 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, |
17f4880d | 273 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
4d13caa0 NC |
274 | {"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, |
275 | {"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, | |
7b21ac3f EW |
276 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
277 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
278 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
279 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, | |
280 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
4d13caa0 NC |
281 | {"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, |
282 | {"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 | 283 | {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
255d9eec DC |
284 | {"atxmega16a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, |
285 | {"atxmega16c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, | |
8cc66334 EW |
286 | {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
287 | {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
255d9eec DC |
288 | {"atxmega32a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, |
289 | {"atxmega32c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, | |
8cc66334 | 290 | {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
255d9eec DC |
291 | {"atxmega32e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
292 | {"atxmega16e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
293 | {"atxmega8e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 294 | {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 | 295 | {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
255d9eec DC |
296 | {"atxmega64a3u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, |
297 | {"atxmega64a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
298 | {"atxmega64b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
299 | {"atxmega64b3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
300 | {"atxmega64c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
8cc66334 | 301 | {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
255d9eec | 302 | {"atxmega64d4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
8cc66334 | 303 | {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, |
7bab7634 | 304 | {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5}, |
8cc66334 | 305 | {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec | 306 | {"atxmega128a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
7bab7634 | 307 | {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
255d9eec DC |
308 | {"atxmega128b3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
309 | {"atxmega128c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, | |
8cc66334 | 310 | {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec | 311 | {"atxmega128d4", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
8cc66334 | 312 | {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec DC |
313 | {"atxmega192a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
314 | {"atxmega192c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, | |
8cc66334 EW |
315 | {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
316 | {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
255d9eec | 317 | {"atxmega256a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
8cc66334 | 318 | {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
7bab7634 | 319 | {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
255d9eec | 320 | {"atxmega256c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
8cc66334 | 321 | {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec DC |
322 | {"atxmega384c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
323 | {"atxmega384d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
8cc66334 | 324 | {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, |
7bab7634 | 325 | {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
255d9eec | 326 | {"atxmega128a4u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
f36e8886 BS |
327 | {"attiny4", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, |
328 | {"attiny5", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
329 | {"attiny9", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
330 | {"attiny10", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
331 | {"attiny20", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
332 | {"attiny40", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
adde6300 AM |
333 | {NULL, 0, 0} |
334 | }; | |
335 | ||
af910977 | 336 | |
adde6300 | 337 | /* Current MCU type. */ |
7b21ac3f | 338 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
af910977 | 339 | static struct mcu_type_s specified_mcu; |
dc191a8f | 340 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 341 | |
00d2865b NC |
342 | /* AVR target-specific switches. */ |
343 | struct avr_opt_s | |
344 | { | |
dc191a8f NC |
345 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
346 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
347 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
75f58085 BS |
348 | int link_relax; /* -mlink-relax: generate relocations for linker |
349 | relaxation. */ | |
00d2865b NC |
350 | }; |
351 | ||
e4ef1b6c | 352 | static struct avr_opt_s avr_opt = { 0, 0, 0, 0 }; |
00d2865b | 353 | |
adde6300 AM |
354 | const char EXP_CHARS[] = "eE"; |
355 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
356 | |
357 | static void avr_set_arch (int); | |
adde6300 AM |
358 | |
359 | /* The target specific pseudo-ops which we support. */ | |
360 | const pseudo_typeS md_pseudo_table[] = | |
361 | { | |
362 | {"arch", avr_set_arch, 0}, | |
363 | { NULL, NULL, 0} | |
364 | }; | |
365 | ||
366 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 367 | |
dc191a8f NC |
368 | #define EXP_MOD_NAME(i) exp_mod[i].name |
369 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
370 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
371 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
372 | |
373 | struct exp_mod_s | |
374 | { | |
dc191a8f NC |
375 | char * name; |
376 | bfd_reloc_code_real_type reloc; | |
377 | bfd_reloc_code_real_type neg_reloc; | |
378 | int have_pm; | |
adde6300 AM |
379 | }; |
380 | ||
c6a7ab1f NC |
381 | static struct exp_mod_s exp_mod[] = |
382 | { | |
adde6300 AM |
383 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
384 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
385 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
386 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
387 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
388 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 | 389 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
e4efb665 | 390 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, |
adde6300 AM |
391 | }; |
392 | ||
8ad7c533 NC |
393 | /* A union used to store indicies into the exp_mod[] array |
394 | in a hash table which expects void * data types. */ | |
395 | typedef union | |
396 | { | |
397 | void * ptr; | |
398 | int index; | |
399 | } mod_index; | |
400 | ||
adde6300 AM |
401 | /* Opcode hash table. */ |
402 | static struct hash_control *avr_hash; | |
403 | ||
404 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
405 | static struct hash_control *avr_mod_hash; | |
406 | ||
00d2865b | 407 | #define OPTION_MMCU 'm' |
dc191a8f NC |
408 | enum options |
409 | { | |
410 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
411 | OPTION_NO_SKIP_BUG, | |
af910977 | 412 | OPTION_NO_WRAP, |
e4ef1b6c DC |
413 | OPTION_ISA_RMW, |
414 | OPTION_LINK_RELAX | |
dc191a8f | 415 | }; |
adde6300 | 416 | |
c6a7ab1f NC |
417 | struct option md_longopts[] = |
418 | { | |
00d2865b NC |
419 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
420 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
421 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
422 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
af910977 | 423 | { "mrmw", no_argument, NULL, OPTION_ISA_RMW }, |
e4ef1b6c | 424 | { "mlink-relax", no_argument, NULL, OPTION_LINK_RELAX }, |
00d2865b | 425 | { NULL, no_argument, NULL, 0 } |
adde6300 | 426 | }; |
adde6300 | 427 | |
c6a7ab1f | 428 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
429 | |
430 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 431 | |
00d2865b | 432 | static void |
dc191a8f | 433 | show_mcu_list (FILE *stream) |
00d2865b NC |
434 | { |
435 | int i, x; | |
436 | ||
437 | fprintf (stream, _("Known MCU names:")); | |
438 | x = 1000; | |
1dab94dd | 439 | |
00d2865b NC |
440 | for (i = 0; mcu_types[i].name; i++) |
441 | { | |
442 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 443 | |
00d2865b | 444 | x += len + 1; |
1dab94dd | 445 | |
00d2865b | 446 | if (x < 75) |
c6a7ab1f | 447 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
448 | else |
449 | { | |
450 | fprintf (stream, "\n %s", mcu_types[i].name); | |
451 | x = len + 2; | |
452 | } | |
453 | } | |
1dab94dd | 454 | |
c6a7ab1f | 455 | fprintf (stream, "\n"); |
00d2865b NC |
456 | } |
457 | ||
adde6300 | 458 | static inline char * |
dc191a8f | 459 | skip_space (char *s) |
adde6300 AM |
460 | { |
461 | while (*s == ' ' || *s == '\t') | |
462 | ++s; | |
463 | return s; | |
464 | } | |
465 | ||
466 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 467 | |
adde6300 AM |
468 | static char * |
469 | extract_word (char *from, char *to, int limit) | |
470 | { | |
adde6300 AM |
471 | char *op_end; |
472 | int size = 0; | |
473 | ||
474 | /* Drop leading whitespace. */ | |
475 | from = skip_space (from); | |
476 | *to = 0; | |
c6a7ab1f | 477 | |
adde6300 | 478 | /* Find the op code end. */ |
87975d2a | 479 | for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
480 | { |
481 | to[size++] = *op_end++; | |
482 | if (size + 1 >= limit) | |
483 | break; | |
484 | } | |
1dab94dd | 485 | |
adde6300 AM |
486 | to[size] = 0; |
487 | return op_end; | |
488 | } | |
489 | ||
490 | int | |
dc191a8f NC |
491 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
492 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
493 | { |
494 | abort (); | |
495 | return 0; | |
496 | } | |
497 | ||
498 | void | |
dc191a8f | 499 | md_show_usage (FILE *stream) |
adde6300 | 500 | { |
00d2865b | 501 | fprintf (stream, |
4fb8d1c6 | 502 | _("AVR Assembler options:\n" |
adde6300 AM |
503 | " -mmcu=[avr-name] select microcontroller variant\n" |
504 | " [avr-name] can be:\n" | |
7b21ac3f EW |
505 | " avr1 - classic AVR core without data RAM\n" |
506 | " avr2 - classic AVR core with up to 8K program memory\n" | |
507 | " avr25 - classic AVR core with up to 8K program memory\n" | |
508 | " plus the MOVW instruction\n" | |
509 | " avr3 - classic AVR core with up to 64K program memory\n" | |
510 | " avr31 - classic AVR core with up to 128K program memory\n" | |
511 | " avr35 - classic AVR core with up to 64K program memory\n" | |
512 | " plus the MOVW instruction\n" | |
513 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
514 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
515 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
516 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
8c997c27 | 517 | " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n" |
8cc66334 EW |
518 | " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n" |
519 | " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n" | |
520 | " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n" | |
521 | " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n" | |
522 | " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n" | |
f36e8886 | 523 | " avrtiny - AVR Tiny core with 16 gp registers\n")); |
00d2865b NC |
524 | fprintf (stream, |
525 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
526 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
527 | " (default for avr4, avr5)\n" | |
528 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
af910977 DC |
529 | " (default for avr3, avr5)\n" |
530 | " -mrmw accept Read-Modify-Write instructions\n" | |
e4ef1b6c | 531 | " -mlink-relax generate relocations for linker relaxation\n" |
af910977 | 532 | )); |
00d2865b | 533 | show_mcu_list (stream); |
adde6300 AM |
534 | } |
535 | ||
536 | static void | |
dc191a8f | 537 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 538 | { |
dc191a8f | 539 | char str[20]; |
1dab94dd | 540 | |
adde6300 | 541 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 542 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
543 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
544 | } | |
545 | ||
546 | int | |
dc191a8f | 547 | md_parse_option (int c, char *arg) |
adde6300 | 548 | { |
00d2865b | 549 | switch (c) |
adde6300 | 550 | { |
00d2865b NC |
551 | case OPTION_MMCU: |
552 | { | |
553 | int i; | |
554 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 555 | |
00d2865b NC |
556 | { |
557 | char *t = s; | |
558 | char *arg1 = arg; | |
559 | ||
560 | do | |
3882b010 | 561 | *t = TOLOWER (*arg1++); |
00d2865b NC |
562 | while (*t++); |
563 | } | |
564 | ||
565 | for (i = 0; mcu_types[i].name; ++i) | |
566 | if (strcmp (mcu_types[i].name, s) == 0) | |
567 | break; | |
adde6300 | 568 | |
00d2865b NC |
569 | if (!mcu_types[i].name) |
570 | { | |
571 | show_mcu_list (stderr); | |
572 | as_fatal (_("unknown MCU: %s\n"), arg); | |
573 | } | |
65aa24b6 | 574 | |
00d2865b NC |
575 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
576 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
577 | as .arch ... in the asm output at the same time. */ | |
00d2865b | 578 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
af910977 DC |
579 | { |
580 | specified_mcu.name = mcu_types[i].name; | |
581 | specified_mcu.isa |= mcu_types[i].isa; | |
582 | specified_mcu.mach = mcu_types[i].mach; | |
583 | avr_mcu = &specified_mcu; | |
584 | } | |
00d2865b NC |
585 | else |
586 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
587 | avr_mcu->name, mcu_types[i].name); | |
588 | return 1; | |
589 | } | |
590 | case OPTION_ALL_OPCODES: | |
591 | avr_opt.all_opcodes = 1; | |
592 | return 1; | |
593 | case OPTION_NO_SKIP_BUG: | |
594 | avr_opt.no_skip_bug = 1; | |
595 | return 1; | |
596 | case OPTION_NO_WRAP: | |
597 | avr_opt.no_wrap = 1; | |
adde6300 | 598 | return 1; |
af910977 DC |
599 | case OPTION_ISA_RMW: |
600 | specified_mcu.isa |= AVR_ISA_RMW; | |
601 | return 1; | |
e4ef1b6c DC |
602 | case OPTION_LINK_RELAX: |
603 | avr_opt.link_relax = 1; | |
604 | return 1; | |
adde6300 | 605 | } |
1dab94dd | 606 | |
adde6300 AM |
607 | return 0; |
608 | } | |
609 | ||
610 | symbolS * | |
dc191a8f | 611 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 612 | { |
dc191a8f | 613 | return NULL; |
adde6300 AM |
614 | } |
615 | ||
adde6300 | 616 | char * |
dc191a8f | 617 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 618 | { |
499ac353 | 619 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
620 | } |
621 | ||
622 | void | |
dc191a8f NC |
623 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
624 | asection *sec ATTRIBUTE_UNUSED, | |
625 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
626 | { |
627 | abort (); | |
628 | } | |
629 | ||
adde6300 | 630 | void |
dc191a8f | 631 | md_begin (void) |
adde6300 | 632 | { |
df136245 | 633 | unsigned int i; |
adde6300 | 634 | struct avr_opcodes_s *opcode; |
dc191a8f | 635 | |
c6a7ab1f | 636 | avr_hash = hash_new (); |
adde6300 AM |
637 | |
638 | /* Insert unique names into hash table. This hash table then provides a | |
639 | quick index to the first opcode with a particular name in the opcode | |
640 | table. */ | |
adde6300 AM |
641 | for (opcode = avr_opcodes; opcode->name; opcode++) |
642 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
643 | ||
644 | avr_mod_hash = hash_new (); | |
645 | ||
dc191a8f | 646 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
647 | { |
648 | mod_index m; | |
649 | ||
650 | m.index = i + 10; | |
651 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
652 | } | |
c6a7ab1f | 653 | |
adde6300 | 654 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
e4ef1b6c | 655 | linkrelax = avr_opt.link_relax; |
adde6300 AM |
656 | } |
657 | ||
df136245 | 658 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 659 | If result greater than MAX then error. */ |
df136245 DC |
660 | |
661 | static unsigned int | |
dc191a8f | 662 | avr_get_constant (char *str, int max) |
df136245 DC |
663 | { |
664 | expressionS ex; | |
dc191a8f | 665 | |
df136245 DC |
666 | str = skip_space (str); |
667 | input_line_pointer = str; | |
dc191a8f | 668 | expression (& ex); |
df136245 DC |
669 | |
670 | if (ex.X_op != O_constant) | |
671 | as_bad (_("constant value required")); | |
672 | ||
673 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 674 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 675 | |
df136245 DC |
676 | return ex.X_add_number; |
677 | } | |
678 | ||
dc191a8f | 679 | /* Parse for ldd/std offset. */ |
df136245 | 680 | |
dc191a8f NC |
681 | static void |
682 | avr_offset_expression (expressionS *exp) | |
adde6300 | 683 | { |
dc191a8f NC |
684 | char *str = input_line_pointer; |
685 | char *tmp; | |
686 | char op[8]; | |
adde6300 | 687 | |
dc191a8f NC |
688 | tmp = str; |
689 | str = extract_word (str, op, sizeof (op)); | |
690 | ||
691 | input_line_pointer = tmp; | |
692 | expression (exp); | |
693 | ||
694 | /* Warn about expressions that fail to use lo8 (). */ | |
695 | if (exp->X_op == O_constant) | |
adde6300 | 696 | { |
dc191a8f | 697 | int x = exp->X_add_number; |
28c9d252 | 698 | |
dc191a8f NC |
699 | if (x < -255 || x > 255) |
700 | as_warn (_("constant out of 8-bit range: %d"), x); | |
701 | } | |
702 | } | |
adde6300 | 703 | |
dc191a8f | 704 | /* Parse ordinary expression. */ |
adde6300 | 705 | |
dc191a8f NC |
706 | static char * |
707 | parse_exp (char *s, expressionS *op) | |
708 | { | |
709 | input_line_pointer = s; | |
710 | expression (op); | |
711 | if (op->X_op == O_absent) | |
712 | as_bad (_("missing operand")); | |
713 | return input_line_pointer; | |
714 | } | |
1dab94dd | 715 | |
dc191a8f NC |
716 | /* Parse special expressions (needed for LDI command): |
717 | xx8 (address) | |
718 | xx8 (-address) | |
719 | pm_xx8 (address) | |
720 | pm_xx8 (-address) | |
721 | where xx is: hh, hi, lo. */ | |
adde6300 | 722 | |
dc191a8f NC |
723 | static bfd_reloc_code_real_type |
724 | avr_ldi_expression (expressionS *exp) | |
725 | { | |
726 | char *str = input_line_pointer; | |
727 | char *tmp; | |
728 | char op[8]; | |
729 | int mod; | |
28c9d252 NC |
730 | int linker_stubs_should_be_generated = 0; |
731 | ||
dc191a8f | 732 | tmp = str; |
adde6300 | 733 | |
dc191a8f | 734 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 735 | |
dc191a8f NC |
736 | if (op[0]) |
737 | { | |
8ad7c533 | 738 | mod_index m; |
28c9d252 | 739 | |
8ad7c533 NC |
740 | m.ptr = hash_find (avr_mod_hash, op); |
741 | mod = m.index; | |
1dab94dd | 742 | |
dc191a8f NC |
743 | if (mod) |
744 | { | |
745 | int closes = 0; | |
b170af93 | 746 | |
dc191a8f NC |
747 | mod -= 10; |
748 | str = skip_space (str); | |
00d2865b | 749 | |
dc191a8f NC |
750 | if (*str == '(') |
751 | { | |
28c9d252 | 752 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 753 | int neg_p = 0; |
00d2865b | 754 | |
dc191a8f | 755 | ++str; |
00d2865b | 756 | |
dc191a8f | 757 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
758 | || strncmp ("gs(",str,3) == 0 |
759 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
760 | || strncmp ("-(pm(", str, 5) == 0) |
761 | { | |
762 | if (HAVE_PM_P (mod)) | |
763 | { | |
764 | ++mod; | |
765 | ++closes; | |
766 | } | |
767 | else | |
768 | as_bad (_("illegal expression")); | |
b170af93 | 769 | |
28c9d252 NC |
770 | if (str[0] == 'g' || str[2] == 'g') |
771 | linker_stubs_should_be_generated = 1; | |
772 | ||
dc191a8f NC |
773 | if (*str == '-') |
774 | { | |
775 | neg_p = 1; | |
776 | ++closes; | |
777 | str += 5; | |
778 | } | |
779 | else | |
780 | str += 3; | |
781 | } | |
adde6300 | 782 | |
dc191a8f NC |
783 | if (*str == '-' && *(str + 1) == '(') |
784 | { | |
785 | neg_p ^= 1; | |
786 | ++closes; | |
787 | str += 2; | |
788 | } | |
750bce0e | 789 | |
dc191a8f NC |
790 | input_line_pointer = str; |
791 | expression (exp); | |
750bce0e | 792 | |
dc191a8f NC |
793 | do |
794 | { | |
795 | if (*input_line_pointer != ')') | |
796 | { | |
797 | as_bad (_("`)' required")); | |
798 | break; | |
799 | } | |
800 | input_line_pointer++; | |
801 | } | |
802 | while (closes--); | |
803 | ||
28c9d252 NC |
804 | reloc_to_return = |
805 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
806 | if (linker_stubs_should_be_generated) | |
807 | { | |
808 | switch (reloc_to_return) | |
809 | { | |
810 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
811 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
812 | break; | |
813 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
814 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
815 | break; | |
816 | ||
817 | default: | |
0a903bab NC |
818 | /* PR 5523: Do not generate a warning here, |
819 | legitimate code can trigger this case. */ | |
820 | break; | |
28c9d252 NC |
821 | } |
822 | } | |
823 | return reloc_to_return; | |
dc191a8f NC |
824 | } |
825 | } | |
826 | } | |
750bce0e NC |
827 | |
828 | input_line_pointer = tmp; | |
829 | expression (exp); | |
830 | ||
831 | /* Warn about expressions that fail to use lo8 (). */ | |
832 | if (exp->X_op == O_constant) | |
833 | { | |
834 | int x = exp->X_add_number; | |
dc191a8f | 835 | |
750bce0e NC |
836 | if (x < -255 || x > 255) |
837 | as_warn (_("constant out of 8-bit range: %d"), x); | |
838 | } | |
dc191a8f NC |
839 | |
840 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
841 | } |
842 | ||
df136245 | 843 | /* Parse one instruction operand. |
c6a7ab1f NC |
844 | Return operand bitmask. Also fixups can be generated. */ |
845 | ||
adde6300 | 846 | static unsigned int |
dc191a8f NC |
847 | avr_operand (struct avr_opcodes_s *opcode, |
848 | int where, | |
849 | char *op, | |
850 | char **line) | |
adde6300 | 851 | { |
adde6300 | 852 | expressionS op_expr; |
df136245 DC |
853 | unsigned int op_mask = 0; |
854 | char *str = skip_space (*line); | |
adde6300 | 855 | |
adde6300 AM |
856 | switch (*op) |
857 | { | |
858 | /* Any register operand. */ | |
859 | case 'w': | |
860 | case 'd': | |
861 | case 'r': | |
b170af93 DC |
862 | case 'a': |
863 | case 'v': | |
75f58085 BS |
864 | { |
865 | char * old_str = str; | |
866 | char *lower; | |
867 | char r_name[20]; | |
1dab94dd | 868 | |
75f58085 BS |
869 | str = extract_word (str, r_name, sizeof (r_name)); |
870 | for (lower = r_name; *lower; ++lower) | |
871 | { | |
872 | if (*lower >= 'A' && *lower <= 'Z') | |
873 | *lower += 'a' - 'A'; | |
874 | } | |
875 | ||
876 | if (r_name[0] == 'r' && ISDIGIT (r_name[1]) && r_name[2] == 0) | |
877 | /* Single-digit register number, ie r0-r9. */ | |
878 | op_mask = r_name[1] - '0'; | |
879 | else if (r_name[0] == 'r' && ISDIGIT (r_name[1]) | |
880 | && ISDIGIT (r_name[2]) && r_name[3] == 0) | |
881 | /* Double-digit register number, ie r10 - r32. */ | |
882 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
883 | else if (r_name[0] >= 'x' && r_name[0] <= 'z' | |
884 | && (r_name[1] == 'l' || r_name[1] == 'h') && r_name[2] == 0) | |
885 | /* Registers r26-r31 referred to by name, ie xl, xh, yl, yh, zl, zh. */ | |
886 | op_mask = (r_name[0] - 'x') * 2 + (r_name[1] == 'h') + 26; | |
887 | else if ((*op == 'v' || *op == 'w') | |
888 | && r_name[0] >= 'x' && r_name[0] <= 'z' && r_name[1] == 0) | |
889 | /* For the movw and addiw instructions, refer to registers x, y and z by name. */ | |
890 | op_mask = (r_name[0] - 'x') * 2 + 26; | |
891 | else | |
892 | { | |
893 | /* Numeric or symbolic constant register number. */ | |
894 | op_mask = avr_get_constant (old_str, 31); | |
895 | str = input_line_pointer; | |
896 | } | |
897 | } | |
f36e8886 BS |
898 | |
899 | if (avr_mcu->mach == bfd_mach_avrtiny) | |
900 | { | |
901 | if (op_mask < 16 || op_mask > 31) | |
902 | { | |
903 | as_bad (_("register name or number from 16 to 31 required")); | |
904 | break; | |
905 | } | |
906 | } | |
907 | else if (op_mask > 31) | |
908 | { | |
909 | as_bad (_("register name or number from 0 to 31 required")); | |
910 | break; | |
911 | } | |
1dab94dd | 912 | |
c6a7ab1f NC |
913 | switch (*op) |
914 | { | |
915 | case 'a': | |
916 | if (op_mask < 16 || op_mask > 23) | |
917 | as_bad (_("register r16-r23 required")); | |
918 | op_mask -= 16; | |
919 | break; | |
1dab94dd | 920 | |
c6a7ab1f NC |
921 | case 'd': |
922 | if (op_mask < 16) | |
923 | as_bad (_("register number above 15 required")); | |
924 | op_mask -= 16; | |
925 | break; | |
1dab94dd | 926 | |
c6a7ab1f NC |
927 | case 'v': |
928 | if (op_mask & 1) | |
929 | as_bad (_("even register number required")); | |
930 | op_mask >>= 1; | |
931 | break; | |
1dab94dd | 932 | |
c6a7ab1f | 933 | case 'w': |
65b1d096 | 934 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 935 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 936 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
937 | break; |
938 | } | |
939 | break; | |
adde6300 AM |
940 | |
941 | case 'e': | |
942 | { | |
943 | char c; | |
1dab94dd | 944 | |
adde6300 AM |
945 | if (*str == '-') |
946 | { | |
c6a7ab1f | 947 | str = skip_space (str + 1); |
adde6300 AM |
948 | op_mask = 0x1002; |
949 | } | |
3882b010 | 950 | c = TOLOWER (*str); |
adde6300 AM |
951 | if (c == 'x') |
952 | op_mask |= 0x100c; | |
953 | else if (c == 'y') | |
954 | op_mask |= 0x8; | |
955 | else if (c != 'z') | |
00d2865b | 956 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 957 | |
c6a7ab1f | 958 | str = skip_space (str + 1); |
adde6300 AM |
959 | if (*str == '+') |
960 | { | |
961 | ++str; | |
962 | if (op_mask & 2) | |
00d2865b | 963 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
964 | op_mask |= 0x1001; |
965 | } | |
e38c9cc2 | 966 | |
1188e082 | 967 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 968 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
969 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
970 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
971 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
972 | } |
973 | break; | |
974 | ||
b170af93 | 975 | case 'z': |
c6a7ab1f NC |
976 | if (*str == '-') |
977 | as_bad (_("can't predecrement")); | |
1dab94dd | 978 | |
c6a7ab1f NC |
979 | if (! (*str == 'z' || *str == 'Z')) |
980 | as_bad (_("pointer register Z required")); | |
1dab94dd | 981 | |
c6a7ab1f NC |
982 | str = skip_space (str + 1); |
983 | ||
984 | if (*str == '+') | |
985 | { | |
986 | ++str; | |
8cc66334 EW |
987 | char *s; |
988 | for (s = opcode->opcode; *s; ++s) | |
989 | { | |
990 | if (*s == '+') | |
991 | op_mask |= (1 << (15 - (s - opcode->opcode))); | |
992 | } | |
c6a7ab1f | 993 | } |
d669d37f NC |
994 | |
995 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
996 | if (!avr_opt.all_opcodes | |
997 | && (op_mask & 0x0001) | |
998 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
999 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
1000 | break; |
1001 | ||
adde6300 AM |
1002 | case 'b': |
1003 | { | |
3882b010 | 1004 | char c = TOLOWER (*str++); |
1dab94dd | 1005 | |
adde6300 AM |
1006 | if (c == 'y') |
1007 | op_mask |= 0x8; | |
1008 | else if (c != 'z') | |
00d2865b | 1009 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
1010 | str = skip_space (str); |
1011 | if (*str++ == '+') | |
1012 | { | |
750bce0e NC |
1013 | input_line_pointer = str; |
1014 | avr_offset_expression (& op_expr); | |
adde6300 | 1015 | str = input_line_pointer; |
750bce0e NC |
1016 | fix_new_exp (frag_now, where, 3, |
1017 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
1018 | } |
1019 | } | |
1020 | break; | |
1021 | ||
1022 | case 'h': | |
c6a7ab1f NC |
1023 | str = parse_exp (str, &op_expr); |
1024 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 1025 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
1026 | break; |
1027 | ||
1028 | case 'L': | |
c6a7ab1f NC |
1029 | str = parse_exp (str, &op_expr); |
1030 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 1031 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
1032 | break; |
1033 | ||
1034 | case 'l': | |
c6a7ab1f NC |
1035 | str = parse_exp (str, &op_expr); |
1036 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 1037 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
1038 | break; |
1039 | ||
1040 | case 'i': | |
c6a7ab1f NC |
1041 | str = parse_exp (str, &op_expr); |
1042 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 1043 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
1044 | break; |
1045 | ||
f36e8886 BS |
1046 | case 'j': |
1047 | str = parse_exp (str, &op_expr); | |
1048 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
1049 | &op_expr, FALSE, BFD_RELOC_AVR_LDS_STS_16); | |
1050 | break; | |
1051 | ||
adde6300 AM |
1052 | case 'M': |
1053 | { | |
1054 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 1055 | |
c6a7ab1f NC |
1056 | input_line_pointer = str; |
1057 | r_type = avr_ldi_expression (&op_expr); | |
1058 | str = input_line_pointer; | |
adde6300 | 1059 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 1060 | &op_expr, FALSE, r_type); |
adde6300 AM |
1061 | } |
1062 | break; | |
1063 | ||
1064 | case 'n': | |
1065 | { | |
1066 | unsigned int x; | |
1dab94dd | 1067 | |
adde6300 AM |
1068 | x = ~avr_get_constant (str, 255); |
1069 | str = input_line_pointer; | |
1070 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
1071 | } | |
1072 | break; | |
1073 | ||
1074 | case 'K': | |
750bce0e NC |
1075 | input_line_pointer = str; |
1076 | avr_offset_expression (& op_expr); | |
1077 | str = input_line_pointer; | |
1078 | fix_new_exp (frag_now, where, 3, | |
1079 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
1080 | break; |
1081 | ||
1082 | case 'S': | |
1083 | case 's': | |
1084 | { | |
1085 | unsigned int x; | |
1dab94dd | 1086 | |
adde6300 AM |
1087 | x = avr_get_constant (str, 7); |
1088 | str = input_line_pointer; | |
1089 | if (*op == 'S') | |
1090 | x <<= 4; | |
1091 | op_mask |= x; | |
1092 | } | |
1093 | break; | |
1094 | ||
1095 | case 'P': | |
75f58085 BS |
1096 | str = parse_exp (str, &op_expr); |
1097 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
1098 | &op_expr, FALSE, BFD_RELOC_AVR_PORT6); | |
adde6300 AM |
1099 | break; |
1100 | ||
1101 | case 'p': | |
75f58085 BS |
1102 | str = parse_exp (str, &op_expr); |
1103 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
1104 | &op_expr, FALSE, BFD_RELOC_AVR_PORT5); | |
adde6300 | 1105 | break; |
1dab94dd | 1106 | |
8cc66334 EW |
1107 | case 'E': |
1108 | { | |
1109 | unsigned int x; | |
1110 | ||
1111 | x = avr_get_constant (str, 15); | |
1112 | str = input_line_pointer; | |
1113 | op_mask |= (x << 4); | |
1114 | } | |
1115 | break; | |
99700d6f | 1116 | |
1188e082 DC |
1117 | case '?': |
1118 | break; | |
1dab94dd | 1119 | |
adde6300 | 1120 | default: |
00d2865b | 1121 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 1122 | } |
1dab94dd | 1123 | |
adde6300 AM |
1124 | *line = str; |
1125 | return op_mask; | |
1126 | } | |
1127 | ||
dc191a8f NC |
1128 | /* Parse instruction operands. |
1129 | Return binary opcode. */ | |
1130 | ||
1131 | static unsigned int | |
1132 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
1133 | { | |
1134 | char *op = opcode->constraints; | |
1135 | unsigned int bin = opcode->bin_opcode; | |
1136 | char *frag = frag_more (opcode->insn_size * 2); | |
1137 | char *str = *line; | |
1138 | int where = frag - frag_now->fr_literal; | |
1139 | static unsigned int prev = 0; /* Previous opcode. */ | |
1140 | ||
1141 | /* Opcode have operands. */ | |
1142 | if (*op) | |
1143 | { | |
1144 | unsigned int reg1 = 0; | |
1145 | unsigned int reg2 = 0; | |
1146 | int reg1_present = 0; | |
1147 | int reg2_present = 0; | |
1148 | ||
1149 | /* Parse first operand. */ | |
1150 | if (REGISTER_P (*op)) | |
1151 | reg1_present = 1; | |
1152 | reg1 = avr_operand (opcode, where, op, &str); | |
1153 | ++op; | |
1154 | ||
1155 | /* Parse second operand. */ | |
1156 | if (*op) | |
1157 | { | |
1158 | if (*op == ',') | |
1159 | ++op; | |
1160 | ||
1161 | if (*op == '=') | |
1162 | { | |
1163 | reg2 = reg1; | |
1164 | reg2_present = 1; | |
1165 | } | |
1166 | else | |
1167 | { | |
1168 | if (REGISTER_P (*op)) | |
1169 | reg2_present = 1; | |
1170 | ||
1171 | str = skip_space (str); | |
1172 | if (*str++ != ',') | |
1173 | as_bad (_("`,' required")); | |
1174 | str = skip_space (str); | |
1175 | ||
1176 | reg2 = avr_operand (opcode, where, op, &str); | |
1177 | } | |
1178 | ||
1179 | if (reg1_present && reg2_present) | |
1180 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1181 | else if (reg2_present) | |
1182 | reg2 <<= 4; | |
1183 | } | |
1184 | if (reg1_present) | |
1185 | reg1 <<= 4; | |
1186 | bin |= reg1 | reg2; | |
1187 | } | |
1188 | ||
1189 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1190 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1191 | as_warn (_("undefined combination of operands")); | |
1192 | ||
1193 | if (opcode->insn_size == 2) | |
1194 | { | |
1195 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1196 | (AVR core bug, fixed in the newer devices). */ | |
1197 | if (!(avr_opt.no_skip_bug || | |
1198 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1199 | && AVR_SKIP_P (prev)) | |
1200 | as_warn (_("skipping two-word instruction")); | |
1201 | ||
1202 | bfd_putl32 ((bfd_vma) bin, frag); | |
1203 | } | |
1204 | else | |
1205 | bfd_putl16 ((bfd_vma) bin, frag); | |
1206 | ||
1207 | prev = bin; | |
1208 | *line = str; | |
1209 | return bin; | |
1210 | } | |
1211 | ||
adde6300 AM |
1212 | /* GAS will call this function for each section at the end of the assembly, |
1213 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1214 | |
adde6300 | 1215 | valueT |
dc191a8f | 1216 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1217 | { |
1218 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1219 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1220 | } | |
1221 | ||
1222 | /* If you define this macro, it should return the offset between the | |
1223 | address of a PC relative fixup and the position from which the PC | |
1224 | relative adjustment should be made. On many processors, the base | |
1225 | of a PC relative instruction is the next instruction, so this | |
1226 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1227 | |
adde6300 | 1228 | long |
dc191a8f | 1229 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1230 | { |
c6a7ab1f | 1231 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1232 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1233 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1234 | return 0; | |
1dab94dd | 1235 | |
adde6300 AM |
1236 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1237 | } | |
1238 | ||
e4ef1b6c DC |
1239 | static bfd_boolean |
1240 | relaxable_section (asection *sec) | |
1241 | { | |
1242 | return (sec->flags & SEC_DEBUGGING) == 0; | |
1243 | } | |
1244 | ||
75f58085 | 1245 | /* Does whatever the xtensa port does. */ |
e4ef1b6c DC |
1246 | int |
1247 | avr_validate_fix_sub (fixS *fix) | |
1248 | { | |
1249 | segT add_symbol_segment, sub_symbol_segment; | |
1250 | ||
1251 | /* The difference of two symbols should be resolved by the assembler when | |
1252 | linkrelax is not set. If the linker may relax the section containing | |
1253 | the symbols, then an Xtensa DIFF relocation must be generated so that | |
1254 | the linker knows to adjust the difference value. */ | |
1255 | if (!linkrelax || fix->fx_addsy == NULL) | |
1256 | return 0; | |
1257 | ||
1258 | /* Make sure both symbols are in the same segment, and that segment is | |
1259 | "normal" and relaxable. If the segment is not "normal", then the | |
1260 | fix is not valid. If the segment is not "relaxable", then the fix | |
1261 | should have been handled earlier. */ | |
1262 | add_symbol_segment = S_GET_SEGMENT (fix->fx_addsy); | |
1263 | if (! SEG_NORMAL (add_symbol_segment) || | |
1264 | ! relaxable_section (add_symbol_segment)) | |
1265 | return 0; | |
1266 | ||
1267 | sub_symbol_segment = S_GET_SEGMENT (fix->fx_subsy); | |
1268 | return (sub_symbol_segment == add_symbol_segment); | |
1269 | } | |
1270 | ||
1271 | /* TC_FORCE_RELOCATION hook */ | |
1272 | ||
1273 | /* If linkrelax is turned on, and the symbol to relocate | |
1274 | against is in a relaxable segment, don't compute the value - | |
75f58085 | 1275 | generate a relocation instead. */ |
e4ef1b6c DC |
1276 | int |
1277 | avr_force_relocation (fixS *fix) | |
1278 | { | |
1279 | if (linkrelax && fix->fx_addsy | |
1280 | && relaxable_section (S_GET_SEGMENT (fix->fx_addsy))) | |
1281 | return 1; | |
1282 | ||
1283 | return generic_force_reloc (fix); | |
1284 | } | |
1285 | ||
adde6300 | 1286 | /* GAS will call this for each fixup. It should store the correct |
c6a7ab1f NC |
1287 | value in the object file. */ |
1288 | ||
94f592af | 1289 | void |
dc191a8f | 1290 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1291 | { |
1292 | unsigned char *where; | |
1293 | unsigned long insn; | |
a161fe53 | 1294 | long value = *valP; |
adde6300 | 1295 | |
94f592af NC |
1296 | if (fixP->fx_addsy == (symbolS *) NULL) |
1297 | fixP->fx_done = 1; | |
1298 | ||
87733541 AM |
1299 | else if (fixP->fx_pcrel) |
1300 | { | |
1301 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1302 | ||
1303 | if (s == seg || s == absolute_section) | |
1304 | { | |
1305 | value += S_GET_VALUE (fixP->fx_addsy); | |
1306 | fixP->fx_done = 1; | |
1307 | } | |
1308 | } | |
e4ef1b6c DC |
1309 | else if (linkrelax && fixP->fx_subsy) |
1310 | { | |
1311 | /* For a subtraction relocation expression, generate one | |
1312 | of the DIFF relocs, with the value being the difference. | |
1313 | Note that a sym1 - sym2 expression is adjusted into a | |
1314 | section_start_sym + sym4_offset_from_section_start - sym1 | |
1315 | expression. fixP->fx_addsy holds the section start symbol, | |
1316 | fixP->fx_offset holds sym2's offset, and fixP->fx_subsy | |
1317 | holds sym1. Calculate the current difference and write value, | |
75f58085 BS |
1318 | but leave fx_offset as is - during relaxation, |
1319 | fx_offset - value gives sym1's value. */ | |
e4ef1b6c DC |
1320 | |
1321 | switch (fixP->fx_r_type) | |
1322 | { | |
1323 | case BFD_RELOC_8: | |
1324 | fixP->fx_r_type = BFD_RELOC_AVR_DIFF8; | |
1325 | break; | |
1326 | case BFD_RELOC_16: | |
1327 | fixP->fx_r_type = BFD_RELOC_AVR_DIFF16; | |
1328 | break; | |
1329 | case BFD_RELOC_32: | |
1330 | fixP->fx_r_type = BFD_RELOC_AVR_DIFF32; | |
1331 | break; | |
1332 | default: | |
1333 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1334 | break; | |
1335 | } | |
1336 | ||
1337 | value = S_GET_VALUE (fixP->fx_addsy) + | |
1338 | fixP->fx_offset - S_GET_VALUE (fixP->fx_subsy); | |
1339 | ||
1340 | fixP->fx_subsy = NULL; | |
1341 | } | |
a161fe53 AM |
1342 | /* We don't actually support subtracting a symbol. */ |
1343 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1344 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1345 | |
e4ef1b6c DC |
1346 | /* For the DIFF relocs, write the value into the object file while still |
1347 | keeping fx_done FALSE, as both the difference (recorded in the object file) | |
75f58085 | 1348 | and the sym offset (part of fixP) are needed at link relax time. */ |
e4ef1b6c | 1349 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
94f592af | 1350 | switch (fixP->fx_r_type) |
adde6300 AM |
1351 | { |
1352 | default: | |
94f592af | 1353 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1354 | break; |
1355 | case BFD_RELOC_AVR_7_PCREL: | |
1356 | case BFD_RELOC_AVR_13_PCREL: | |
1357 | case BFD_RELOC_32: | |
1358 | case BFD_RELOC_16: | |
e4ef1b6c DC |
1359 | break; |
1360 | case BFD_RELOC_AVR_DIFF8: | |
1361 | *where = value; | |
1362 | break; | |
1363 | case BFD_RELOC_AVR_DIFF16: | |
1364 | bfd_putl16 ((bfd_vma) value, where); | |
1365 | break; | |
1366 | case BFD_RELOC_AVR_DIFF32: | |
1367 | bfd_putl32 ((bfd_vma) value, where); | |
1368 | break; | |
adde6300 AM |
1369 | case BFD_RELOC_AVR_CALL: |
1370 | break; | |
1371 | } | |
1372 | ||
94f592af | 1373 | if (fixP->fx_done) |
adde6300 AM |
1374 | { |
1375 | /* Fetch the instruction, insert the fully resolved operand | |
1376 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1377 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1378 | insn = bfd_getl16 (where); |
1379 | ||
94f592af | 1380 | switch (fixP->fx_r_type) |
adde6300 AM |
1381 | { |
1382 | case BFD_RELOC_AVR_7_PCREL: | |
1383 | if (value & 1) | |
94f592af | 1384 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1385 | _("odd address operand: %ld"), value); |
1dab94dd | 1386 | |
adde6300 AM |
1387 | /* Instruction addresses are always right-shifted by 1. */ |
1388 | value >>= 1; | |
1389 | --value; /* Correct PC. */ | |
1dab94dd | 1390 | |
adde6300 | 1391 | if (value < -64 || value > 63) |
94f592af | 1392 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1393 | _("operand out of range: %ld"), value); |
1394 | value = (value << 3) & 0x3f8; | |
1395 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1396 | break; | |
1397 | ||
1398 | case BFD_RELOC_AVR_13_PCREL: | |
1399 | if (value & 1) | |
94f592af | 1400 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1401 | _("odd address operand: %ld"), value); |
1dab94dd | 1402 | |
adde6300 AM |
1403 | /* Instruction addresses are always right-shifted by 1. */ |
1404 | value >>= 1; | |
1405 | --value; /* Correct PC. */ | |
adde6300 AM |
1406 | |
1407 | if (value < -2048 || value > 2047) | |
1408 | { | |
65aa24b6 | 1409 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1410 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1411 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1412 | _("operand out of range: %ld"), value); |
1413 | } | |
1414 | ||
1415 | value &= 0xfff; | |
1416 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1417 | break; | |
1418 | ||
1419 | case BFD_RELOC_32: | |
0b649256 | 1420 | bfd_putl32 ((bfd_vma) value, where); |
adde6300 AM |
1421 | break; |
1422 | ||
1423 | case BFD_RELOC_16: | |
1424 | bfd_putl16 ((bfd_vma) value, where); | |
1425 | break; | |
1426 | ||
17e57237 NC |
1427 | case BFD_RELOC_8: |
1428 | if (value > 255 || value < -128) | |
1429 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1430 | _("operand out of range: %ld"), value); | |
1431 | *where = value; | |
1432 | break; | |
1433 | ||
adde6300 | 1434 | case BFD_RELOC_AVR_16_PM: |
c6a7ab1f | 1435 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1436 | break; |
1437 | ||
750bce0e NC |
1438 | case BFD_RELOC_AVR_LDI: |
1439 | if (value > 255) | |
1440 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1441 | _("operand out of range: %ld"), value); | |
1442 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1443 | break; | |
1444 | ||
f36e8886 BS |
1445 | case BFD_RELOC_AVR_LDS_STS_16: |
1446 | if ((value < 0x40) || (value > 0xBF)) | |
1447 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1448 | _("operand out of range: 0x%lx"), | |
1449 | (unsigned long)value); | |
1450 | insn |= ((value & 0xF) | ((value & 0x30) << 5) | ((value & 0x40) << 2)); | |
1451 | bfd_putl16 ((bfd_vma) insn, where); | |
1452 | break; | |
1453 | ||
750bce0e NC |
1454 | case BFD_RELOC_AVR_6: |
1455 | if ((value > 63) || (value < 0)) | |
1456 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1457 | _("operand out of range: %ld"), value); | |
f36e8886 BS |
1458 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) |
1459 | | ((value & (1 << 5)) << 8)), where); | |
750bce0e NC |
1460 | break; |
1461 | ||
1462 | case BFD_RELOC_AVR_6_ADIW: | |
1463 | if ((value > 63) || (value < 0)) | |
1464 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1465 | _("operand out of range: %ld"), value); | |
1466 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1467 | break; | |
1468 | ||
adde6300 AM |
1469 | case BFD_RELOC_AVR_LO8_LDI: |
1470 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1471 | break; | |
1472 | ||
adde6300 AM |
1473 | case BFD_RELOC_AVR_HI8_LDI: |
1474 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1475 | break; | |
1476 | ||
df406460 | 1477 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1478 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1479 | break; | |
1480 | ||
1481 | case BFD_RELOC_AVR_HH8_LDI: | |
1482 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1483 | break; | |
1484 | ||
1485 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1486 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1487 | break; | |
1488 | ||
adde6300 AM |
1489 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1490 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1491 | break; | |
1492 | ||
df406460 | 1493 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1494 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1495 | break; | |
1496 | ||
1497 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1498 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1499 | break; | |
1500 | ||
1501 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1502 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1503 | break; | |
1504 | ||
1505 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1506 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1507 | break; | |
1508 | ||
1509 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1510 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1511 | break; | |
1512 | ||
1513 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1514 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1515 | break; | |
1516 | ||
1517 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1518 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1519 | break; | |
1520 | ||
1521 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1522 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1523 | break; | |
1524 | ||
1525 | case BFD_RELOC_AVR_CALL: | |
1526 | { | |
1527 | unsigned long x; | |
1dab94dd | 1528 | |
adde6300 AM |
1529 | x = bfd_getl16 (where); |
1530 | if (value & 1) | |
94f592af | 1531 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1532 | _("odd address operand: %ld"), value); |
1533 | value >>= 1; | |
1534 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1535 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1536 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1537 | } |
1538 | break; | |
1539 | ||
99700d6f NC |
1540 | case BFD_RELOC_AVR_8_LO: |
1541 | *where = 0xff & value; | |
1542 | break; | |
1543 | ||
1544 | case BFD_RELOC_AVR_8_HI: | |
1545 | *where = 0xff & (value >> 8); | |
1546 | break; | |
1547 | ||
40551fb8 | 1548 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1549 | *where = 0xff & (value >> 16); |
1550 | break; | |
1551 | ||
1552 | default: | |
c6a7ab1f | 1553 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1554 | fixP->fx_line, fixP->fx_r_type); |
adde6300 | 1555 | break; |
75f58085 BS |
1556 | |
1557 | case BFD_RELOC_AVR_PORT6: | |
1558 | if (value > 63) | |
1559 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1560 | _("operand out of range: %ld"), value); | |
1561 | bfd_putl16 ((bfd_vma) insn | ((value & 0x30) << 5) | (value & 0x0f), where); | |
1562 | break; | |
1563 | ||
1564 | case BFD_RELOC_AVR_PORT5: | |
1565 | if (value > 31) | |
1566 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1567 | _("operand out of range: %ld"), value); | |
1568 | bfd_putl16 ((bfd_vma) insn | ((value & 0x1f) << 3), where); | |
1569 | break; | |
adde6300 AM |
1570 | } |
1571 | } | |
1572 | else | |
1573 | { | |
a61a9fbc | 1574 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1575 | { |
1576 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1577 | case -BFD_RELOC_AVR_HI8_LDI: | |
1578 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1579 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1580 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1581 | _("only constant expression allowed")); |
94f592af | 1582 | fixP->fx_done = 1; |
adde6300 AM |
1583 | break; |
1584 | default: | |
1585 | break; | |
1586 | } | |
adde6300 | 1587 | } |
adde6300 AM |
1588 | } |
1589 | ||
7be1c489 AM |
1590 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1591 | to `bfd_install_relocation'. This currently works poorly, as | |
1592 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1593 | `tc_gen_reloc' have been written to work around the problems, which | |
1594 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1595 | |
1596 | /* If while processing a fixup, a reloc really needs to be created | |
1597 | then it is done here. */ | |
1598 | ||
1599 | arelent * | |
dc191a8f NC |
1600 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1601 | fixS *fixp) | |
adde6300 AM |
1602 | { |
1603 | arelent *reloc; | |
1604 | ||
94d4433a | 1605 | if (fixp->fx_subsy != NULL) |
df406460 | 1606 | { |
94d4433a | 1607 | as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex")); |
df406460 NC |
1608 | return NULL; |
1609 | } | |
1610 | ||
dc191a8f | 1611 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1612 | |
dc191a8f | 1613 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1614 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1615 | ||
1616 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1617 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1618 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1619 | { | |
1620 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1621 | _("reloc %d not supported by object file format"), |
1622 | (int) fixp->fx_r_type); | |
adde6300 AM |
1623 | return NULL; |
1624 | } | |
1625 | ||
1626 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1627 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1628 | reloc->address = fixp->fx_offset; | |
1629 | ||
1630 | reloc->addend = fixp->fx_offset; | |
1631 | ||
1632 | return reloc; | |
1633 | } | |
1634 | ||
adde6300 | 1635 | void |
dc191a8f | 1636 | md_assemble (char *str) |
adde6300 | 1637 | { |
c6a7ab1f | 1638 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1639 | char op[11]; |
1640 | ||
c6a7ab1f | 1641 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1642 | |
1643 | if (!op[0]) | |
00d2865b | 1644 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1645 | |
1646 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1647 | ||
f36e8886 BS |
1648 | if (opcode && !avr_opt.all_opcodes) |
1649 | { | |
75f58085 | 1650 | /* Check if the instruction's ISA bit is ON in the ISA bits of the part |
f36e8886 | 1651 | specified by the user. If not look for other instructions |
75f58085 | 1652 | specifications with same mnemonic who's ISA bits matches. |
f36e8886 BS |
1653 | |
1654 | This requires include/opcode/avr.h to have the instructions with | |
1655 | same mnenomic to be specified in sequence. */ | |
1656 | ||
1657 | while ((opcode->isa & avr_mcu->isa) != opcode->isa) | |
1658 | { | |
1659 | opcode++; | |
75f58085 | 1660 | |
f36e8886 BS |
1661 | if (opcode->name && strcmp(op, opcode->name)) |
1662 | { | |
75f58085 | 1663 | as_bad (_("illegal opcode %s for mcu %s"), |
f36e8886 BS |
1664 | opcode->name, avr_mcu->name); |
1665 | return; | |
1666 | } | |
1667 | } | |
75f58085 | 1668 | } |
f36e8886 | 1669 | |
adde6300 AM |
1670 | if (opcode == NULL) |
1671 | { | |
00d2865b | 1672 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1673 | return; |
1674 | } | |
1675 | ||
b170af93 | 1676 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1677 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1678 | |
1188e082 DC |
1679 | if (*str && *opcode->constraints == '?') |
1680 | ++opcode; | |
b170af93 | 1681 | |
d4f4f3fb AM |
1682 | dwarf2_emit_insn (0); |
1683 | ||
adde6300 AM |
1684 | /* We used to set input_line_pointer to the result of get_operands, |
1685 | but that is wrong. Our caller assumes we don't change it. */ | |
1686 | { | |
1687 | char *t = input_line_pointer; | |
dc191a8f | 1688 | |
adde6300 | 1689 | avr_operands (opcode, &str); |
b170af93 | 1690 | if (*skip_space (str)) |
00d2865b | 1691 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1692 | input_line_pointer = t; |
1693 | } | |
1694 | } | |
1695 | ||
62ebcb5c | 1696 | const exp_mod_data_t exp_mod_data[] = |
99700d6f NC |
1697 | { |
1698 | /* Default, must be first. */ | |
1699 | { "", 0, BFD_RELOC_16, "" }, | |
1700 | /* Divides by 2 to get word address. Generate Stub. */ | |
1701 | { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " }, | |
1702 | { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " }, | |
1703 | /* The following are used together with avr-gcc's __memx address space | |
1704 | in order to initialize a 24-bit pointer variable with a 24-bit address. | |
40551fb8 NC |
1705 | For address in flash, hlo8 will contain the flash segment if the |
1706 | symbol is located in flash. If the symbol is located in RAM; hlo8 | |
99700d6f NC |
1707 | will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash |
1708 | addresses linearize address space. */ | |
1709 | { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " }, | |
1710 | { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " }, | |
40551fb8 NC |
1711 | { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " }, |
1712 | { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " }, | |
99700d6f NC |
1713 | /* End of list. */ |
1714 | { NULL, 0, 0, NULL } | |
1715 | }; | |
1716 | ||
99700d6f NC |
1717 | /* Parse special CONS expression: pm (expression) or alternatively |
1718 | gs (expression). These are used for addressing program memory. Moreover, | |
40551fb8 | 1719 | define lo8 (expression), hi8 (expression) and hlo8 (expression). */ |
c6a7ab1f | 1720 | |
62ebcb5c | 1721 | const exp_mod_data_t * |
dc191a8f | 1722 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1723 | { |
99700d6f | 1724 | const exp_mod_data_t *pexp = &exp_mod_data[0]; |
c6a7ab1f | 1725 | char *tmp; |
adde6300 | 1726 | |
adde6300 AM |
1727 | tmp = input_line_pointer = skip_space (input_line_pointer); |
1728 | ||
99700d6f NC |
1729 | /* The first entry of exp_mod_data[] contains an entry if no |
1730 | expression modifier is present. Skip it. */ | |
1731 | ||
1732 | for (pexp++; pexp->name; pexp++) | |
adde6300 | 1733 | { |
99700d6f | 1734 | int len = strlen (pexp->name); |
1dab94dd | 1735 | |
99700d6f NC |
1736 | if (nbytes == pexp->nbytes |
1737 | && strncasecmp (input_line_pointer, pexp->name, len) == 0) | |
adde6300 AM |
1738 | { |
1739 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1740 | |
adde6300 AM |
1741 | if (*input_line_pointer == '(') |
1742 | { | |
1743 | input_line_pointer = skip_space (input_line_pointer + 1); | |
adde6300 | 1744 | expression (exp); |
1dab94dd | 1745 | |
adde6300 | 1746 | if (*input_line_pointer == ')') |
62ebcb5c AM |
1747 | { |
1748 | ++input_line_pointer; | |
1749 | return pexp; | |
1750 | } | |
adde6300 AM |
1751 | else |
1752 | { | |
00d2865b | 1753 | as_bad (_("`)' required")); |
62ebcb5c | 1754 | return &exp_mod_data[0]; |
adde6300 | 1755 | } |
adde6300 | 1756 | } |
1dab94dd | 1757 | |
adde6300 | 1758 | input_line_pointer = tmp; |
99700d6f NC |
1759 | |
1760 | break; | |
adde6300 AM |
1761 | } |
1762 | } | |
1dab94dd | 1763 | |
adde6300 | 1764 | expression (exp); |
62ebcb5c | 1765 | return &exp_mod_data[0]; |
adde6300 AM |
1766 | } |
1767 | ||
1768 | void | |
dc191a8f NC |
1769 | avr_cons_fix_new (fragS *frag, |
1770 | int where, | |
1771 | int nbytes, | |
62ebcb5c AM |
1772 | expressionS *exp, |
1773 | const exp_mod_data_t *pexp_mod_data) | |
adde6300 | 1774 | { |
99700d6f NC |
1775 | int bad = 0; |
1776 | ||
1777 | switch (pexp_mod_data->reloc) | |
adde6300 | 1778 | { |
99700d6f | 1779 | default: |
17e57237 NC |
1780 | if (nbytes == 1) |
1781 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8); | |
1782 | else if (nbytes == 2) | |
b34976b6 | 1783 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1784 | else if (nbytes == 4) |
b34976b6 | 1785 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1786 | else |
99700d6f NC |
1787 | bad = 1; |
1788 | break; | |
1789 | ||
1790 | case BFD_RELOC_AVR_16_PM: | |
1791 | case BFD_RELOC_AVR_8_LO: | |
1792 | case BFD_RELOC_AVR_8_HI: | |
40551fb8 | 1793 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1794 | if (nbytes == pexp_mod_data->nbytes) |
1795 | fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc); | |
adde6300 | 1796 | else |
99700d6f NC |
1797 | bad = 1; |
1798 | break; | |
adde6300 | 1799 | } |
99700d6f NC |
1800 | |
1801 | if (bad) | |
1802 | as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes); | |
adde6300 | 1803 | } |
af3ecb4a | 1804 | |
71863e73 NC |
1805 | static bfd_boolean |
1806 | mcu_has_3_byte_pc (void) | |
1807 | { | |
75f58085 | 1808 | int mach = avr_mcu->mach; |
71863e73 | 1809 | |
75f58085 BS |
1810 | return mach == bfd_mach_avr6 |
1811 | || mach == bfd_mach_avrxmega6 | |
71863e73 NC |
1812 | || mach == bfd_mach_avrxmega7; |
1813 | } | |
1814 | ||
af3ecb4a RH |
1815 | void |
1816 | tc_cfi_frame_initial_instructions (void) | |
1817 | { | |
1818 | /* AVR6 pushes 3 bytes for calls. */ | |
71863e73 | 1819 | int return_size = (mcu_has_3_byte_pc () ? 3 : 2); |
af3ecb4a RH |
1820 | |
1821 | /* The CFA is the caller's stack location before the call insn. */ | |
1822 | /* Note that the stack pointer is dwarf register number 32. */ | |
1823 | cfi_add_CFA_def_cfa (32, return_size); | |
1824 | ||
1825 | /* Note that AVR consistently uses post-decrement, which means that things | |
1826 | do not line up the same way as for targers that use pre-decrement. */ | |
1827 | cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size); | |
1828 | } | |
e4ef1b6c DC |
1829 | |
1830 | bfd_boolean | |
1831 | avr_allow_local_subtract (expressionS * left, | |
1832 | expressionS * right, | |
1833 | segT section) | |
1834 | { | |
75f58085 | 1835 | /* If we are not in relaxation mode, subtraction is OK. */ |
e4ef1b6c DC |
1836 | if (!linkrelax) |
1837 | return TRUE; | |
1838 | ||
1839 | /* If the symbols are not in a code section then they are OK. */ | |
1840 | if ((section->flags & SEC_CODE) == 0) | |
1841 | return TRUE; | |
1842 | ||
1843 | if (left->X_add_symbol == right->X_add_symbol) | |
1844 | return TRUE; | |
1845 | ||
1846 | /* We have to assume that there may be instructions between the | |
1847 | two symbols and that relaxation may increase the distance between | |
1848 | them. */ | |
1849 | return FALSE; | |
1850 | } |