* remote.c (struct packet_reg): Declare.
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
adde6300
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1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
3882b010 3 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
adde6300
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4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include <stdio.h>
adde6300 24#include "as.h"
3882b010 25#include "safe-ctype.h"
adde6300
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26#include "subsegs.h"
27
1188e082
DC
28struct avr_opcodes_s
29{
30 char *name;
31 char *constraints;
c6a7ab1f 32 int insn_size; /* In words. */
1188e082
DC
33 int isa;
34 unsigned int bin_opcode;
35};
36
37#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38{#NAME, CONSTR, SIZE, ISA, BIN},
39
40struct avr_opcodes_s avr_opcodes[] =
41{
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44};
45
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46const char comment_chars[] = ";";
47const char line_comment_chars[] = "#";
48const char line_separator_chars[] = "$";
49
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50const char *md_shortopts = "m:";
51struct mcu_type_s
52{
53 char *name;
54 int isa;
55 int mach;
56};
57
1f8ae5e6
DC
58/* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
adde6300
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62static struct mcu_type_s mcu_types[] =
63{
b170af93 64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65aa24b6 65 {"avr2", AVR_ISA_2xxx, bfd_mach_avr2},
b170af93 66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
65aa24b6 68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
adde6300 69 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
1f8ae5e6 70 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
b170af93
DC
71 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
72 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
adde6300
AM
75 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
76 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6 77 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
adde6300
AM
78 {"attiny22" , AVR_ISA_2xxx, bfd_mach_avr2},
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6
DC
81 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
82 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
65aa24b6
NC
83 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
84 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
85 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6 86 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
b170af93 87 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6
DC
88 {"at43usb320",AVR_ISA_M103, bfd_mach_avr3},
89 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
90 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
91 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m163 */
92 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
93 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6
NC
94 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
95 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
1f8ae5e6
DC
96 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
97 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
98 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
99 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
100 {"at43usb355",AVR_ISA_94K, bfd_mach_avr5},
65aa24b6 101 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
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102 {NULL, 0, 0}
103};
104
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105/* Current MCU type. */
106static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
107static struct mcu_type_s *avr_mcu = &default_mcu;
108
00d2865b
NC
109/* AVR target-specific switches. */
110struct avr_opt_s
111{
c6a7ab1f
NC
112 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */
113 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */
114 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */
00d2865b
NC
115};
116
117static struct avr_opt_s avr_opt = { 0, 0, 0 };
118
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119const char EXP_CHARS[] = "eE";
120const char FLT_CHARS[] = "dD";
121static void avr_set_arch (int dummy);
122
123/* The target specific pseudo-ops which we support. */
124const pseudo_typeS md_pseudo_table[] =
125{
126 {"arch", avr_set_arch, 0},
127 { NULL, NULL, 0}
128};
129
130#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 131
65b1d096
DC
132static void show_mcu_list PARAMS ((FILE *));
133static char *skip_space PARAMS ((char *));
134static char *extract_word PARAMS ((char *, char *, int));
135static unsigned int avr_operand PARAMS ((struct avr_opcodes_s *,
136 int, char *, char **));
137static unsigned int avr_operands PARAMS ((struct avr_opcodes_s *, char **));
138static unsigned int avr_get_constant PARAMS ((char *, int));
139static char *parse_exp PARAMS ((char *, expressionS *));
140static bfd_reloc_code_real_type avr_ldi_expression PARAMS ((expressionS *));
adde6300 141
adde6300
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142#define EXP_MOD_NAME(i) exp_mod[i].name
143#define EXP_MOD_RELOC(i) exp_mod[i].reloc
144#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
145#define HAVE_PM_P(i) exp_mod[i].have_pm
146
147struct exp_mod_s
148{
c6a7ab1f 149 char *name;
adde6300
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150 bfd_reloc_code_real_type reloc;
151 bfd_reloc_code_real_type neg_reloc;
152 int have_pm;
153};
154
c6a7ab1f
NC
155static struct exp_mod_s exp_mod[] =
156{
adde6300
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157 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
158 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
159 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
160 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
161 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
162 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
163 {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
164 {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
165};
166
167/* Opcode hash table. */
168static struct hash_control *avr_hash;
169
170/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
171static struct hash_control *avr_mod_hash;
172
00d2865b
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173#define OPTION_MMCU 'm'
174#define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1)
175#define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2)
176#define OPTION_NO_WRAP (OPTION_MD_BASE + 3)
adde6300 177
c6a7ab1f
NC
178struct option md_longopts[] =
179{
00d2865b
NC
180 { "mmcu", required_argument, NULL, OPTION_MMCU },
181 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
182 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
183 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
184 { NULL, no_argument, NULL, 0 }
adde6300 185};
adde6300 186
c6a7ab1f 187size_t md_longopts_size = sizeof (md_longopts);
00d2865b
NC
188
189/* Display nicely formatted list of known MCU names. */
c6a7ab1f 190
00d2865b 191static void
c6a7ab1f
NC
192show_mcu_list (stream)
193 FILE *stream;
00d2865b
NC
194{
195 int i, x;
196
197 fprintf (stream, _("Known MCU names:"));
198 x = 1000;
1dab94dd 199
00d2865b
NC
200 for (i = 0; mcu_types[i].name; i++)
201 {
202 int len = strlen (mcu_types[i].name);
1dab94dd 203
00d2865b 204 x += len + 1;
1dab94dd 205
00d2865b 206 if (x < 75)
c6a7ab1f 207 fprintf (stream, " %s", mcu_types[i].name);
00d2865b
NC
208 else
209 {
210 fprintf (stream, "\n %s", mcu_types[i].name);
211 x = len + 2;
212 }
213 }
1dab94dd 214
c6a7ab1f 215 fprintf (stream, "\n");
00d2865b
NC
216}
217
adde6300
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218static inline char *
219skip_space (s)
c6a7ab1f 220 char *s;
adde6300
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221{
222 while (*s == ' ' || *s == '\t')
223 ++s;
224 return s;
225}
226
227/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 228
adde6300
AM
229static char *
230extract_word (char *from, char *to, int limit)
231{
232 char *op_start;
233 char *op_end;
234 int size = 0;
235
236 /* Drop leading whitespace. */
237 from = skip_space (from);
238 *to = 0;
c6a7ab1f 239
adde6300 240 /* Find the op code end. */
c6a7ab1f 241 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
adde6300
AM
242 {
243 to[size++] = *op_end++;
244 if (size + 1 >= limit)
245 break;
246 }
1dab94dd 247
adde6300
AM
248 to[size] = 0;
249 return op_end;
250}
251
252int
253md_estimate_size_before_relax (fragp, seg)
df136245
DC
254 fragS *fragp ATTRIBUTE_UNUSED;
255 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
256{
257 abort ();
258 return 0;
259}
260
261void
262md_show_usage (stream)
c6a7ab1f 263 FILE *stream;
adde6300 264{
00d2865b
NC
265 fprintf (stream,
266 _("AVR options:\n"
adde6300
AM
267 " -mmcu=[avr-name] select microcontroller variant\n"
268 " [avr-name] can be:\n"
65aa24b6
NC
269 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
270 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
271 " avr3 - ATmega103, ATmega603\n"
272 " avr4 - ATmega83, ATmega85\n"
273 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 274 " or immediate microcontroller name.\n"));
00d2865b
NC
275 fprintf (stream,
276 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
277 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
278 " (default for avr4, avr5)\n"
279 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
280 " (default for avr3, avr5)\n"));
281 show_mcu_list (stream);
adde6300
AM
282}
283
284static void
285avr_set_arch (dummy)
df136245 286 int dummy ATTRIBUTE_UNUSED;
adde6300 287{
c6a7ab1f 288 char *str;
1dab94dd 289
c6a7ab1f 290 str = (char *) alloca (20);
adde6300 291 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 292 md_parse_option (OPTION_MMCU, str);
adde6300
AM
293 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
294}
295
296int
297md_parse_option (c, arg)
298 int c;
299 char *arg;
300{
00d2865b 301 switch (c)
adde6300 302 {
00d2865b
NC
303 case OPTION_MMCU:
304 {
305 int i;
306 char *s = alloca (strlen (arg) + 1);
adde6300 307
00d2865b
NC
308 {
309 char *t = s;
310 char *arg1 = arg;
311
312 do
3882b010 313 *t = TOLOWER (*arg1++);
00d2865b
NC
314 while (*t++);
315 }
316
317 for (i = 0; mcu_types[i].name; ++i)
318 if (strcmp (mcu_types[i].name, s) == 0)
319 break;
adde6300 320
00d2865b
NC
321 if (!mcu_types[i].name)
322 {
323 show_mcu_list (stderr);
324 as_fatal (_("unknown MCU: %s\n"), arg);
325 }
65aa24b6 326
00d2865b
NC
327 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
328 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
329 as .arch ... in the asm output at the same time. */
00d2865b
NC
330 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
331 avr_mcu = &mcu_types[i];
332 else
333 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
334 avr_mcu->name, mcu_types[i].name);
335 return 1;
336 }
337 case OPTION_ALL_OPCODES:
338 avr_opt.all_opcodes = 1;
339 return 1;
340 case OPTION_NO_SKIP_BUG:
341 avr_opt.no_skip_bug = 1;
342 return 1;
343 case OPTION_NO_WRAP:
344 avr_opt.no_wrap = 1;
adde6300
AM
345 return 1;
346 }
1dab94dd 347
adde6300
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348 return 0;
349}
350
351symbolS *
c6a7ab1f 352md_undefined_symbol (name)
df136245 353 char *name ATTRIBUTE_UNUSED;
adde6300
AM
354{
355 return 0;
356}
357
c6a7ab1f
NC
358/* Turn a string in input_line_pointer into a floating point constant
359 of type TYPE, and store the appropriate bytes in *LITP. The number
360 of LITTLENUMS emitted is stored in *SIZEP. An error message is
361 returned, or NULL on OK. */
362
adde6300
AM
363char *
364md_atof (type, litP, sizeP)
365 int type;
366 char *litP;
367 int *sizeP;
368{
369 int prec;
370 LITTLENUM_TYPE words[4];
371 LITTLENUM_TYPE *wordP;
372 char *t;
373
374 switch (type)
375 {
376 case 'f':
377 prec = 2;
378 break;
379 case 'd':
380 prec = 4;
381 break;
382 default:
383 *sizeP = 0;
384 return _("bad call to md_atof");
385 }
386
387 t = atof_ieee (input_line_pointer, type, words);
388 if (t)
389 input_line_pointer = t;
390
391 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1dab94dd 392
adde6300
AM
393 /* This loop outputs the LITTLENUMs in REVERSE order. */
394 for (wordP = words + prec - 1; prec--;)
395 {
396 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
397 litP += sizeof (LITTLENUM_TYPE);
398 }
1dab94dd 399
adde6300
AM
400 return NULL;
401}
402
403void
404md_convert_frag (abfd, sec, fragP)
c6a7ab1f
NC
405 bfd *abfd ATTRIBUTE_UNUSED;
406 asection *sec ATTRIBUTE_UNUSED;
407 fragS *fragP ATTRIBUTE_UNUSED;
adde6300
AM
408{
409 abort ();
410}
411
adde6300
AM
412void
413md_begin ()
414{
df136245 415 unsigned int i;
adde6300 416 struct avr_opcodes_s *opcode;
c6a7ab1f 417 avr_hash = hash_new ();
adde6300
AM
418
419 /* Insert unique names into hash table. This hash table then provides a
420 quick index to the first opcode with a particular name in the opcode
421 table. */
adde6300
AM
422 for (opcode = avr_opcodes; opcode->name; opcode++)
423 hash_insert (avr_hash, opcode->name, (char *) opcode);
424
425 avr_mod_hash = hash_new ();
426
427 for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i)
c6a7ab1f
NC
428 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10));
429
adde6300
AM
430 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
431}
432
df136245 433/* Resolve STR as a constant expression and return the result.
c6a7ab1f 434 If result greater than MAX then error. */
df136245
DC
435
436static unsigned int
437avr_get_constant (str, max)
c6a7ab1f 438 char *str;
df136245
DC
439 int max;
440{
441 expressionS ex;
442 str = skip_space (str);
443 input_line_pointer = str;
444 expression (&ex);
445
446 if (ex.X_op != O_constant)
447 as_bad (_("constant value required"));
448
449 if (ex.X_add_number > max || ex.X_add_number < 0)
c6a7ab1f 450 as_bad (_("number must be less than %d"), max + 1);
1dab94dd 451
df136245
DC
452 return ex.X_add_number;
453}
454
df136245 455/* Parse instruction operands.
c6a7ab1f 456 Return binary opcode. */
df136245 457
adde6300
AM
458static unsigned int
459avr_operands (opcode, line)
460 struct avr_opcodes_s *opcode;
461 char **line;
462{
463 char *op = opcode->constraints;
464 unsigned int bin = opcode->bin_opcode;
465 char *frag = frag_more (opcode->insn_size * 2);
466 char *str = *line;
467 int where = frag - frag_now->fr_literal;
c6a7ab1f 468 static unsigned int prev = 0; /* Previous opcode. */
adde6300
AM
469
470 /* Opcode have operands. */
471 if (*op)
472 {
473 unsigned int reg1 = 0;
474 unsigned int reg2 = 0;
475 int reg1_present = 0;
476 int reg2_present = 0;
477
478 /* Parse first operand. */
479 if (REGISTER_P (*op))
480 reg1_present = 1;
481 reg1 = avr_operand (opcode, where, op, &str);
482 ++op;
483
484 /* Parse second operand. */
485 if (*op)
486 {
487 if (*op == ',')
488 ++op;
1dab94dd 489
adde6300
AM
490 if (*op == '=')
491 {
492 reg2 = reg1;
493 reg2_present = 1;
494 }
495 else
496 {
497 if (REGISTER_P (*op))
498 reg2_present = 1;
499
500 str = skip_space (str);
501 if (*str++ != ',')
00d2865b 502 as_bad (_("`,' required"));
adde6300
AM
503 str = skip_space (str);
504
505 reg2 = avr_operand (opcode, where, op, &str);
506
507 }
1dab94dd 508
adde6300
AM
509 if (reg1_present && reg2_present)
510 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
511 else if (reg2_present)
512 reg2 <<= 4;
513 }
514 if (reg1_present)
515 reg1 <<= 4;
516 bin |= reg1 | reg2;
517 }
b170af93 518
65b1d096
DC
519 /* Detect undefined combinations (like ld r31,Z+). */
520 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
521 as_warn (_("undefined combination of operands"));
00d2865b 522
adde6300
AM
523 if (opcode->insn_size == 2)
524 {
00d2865b
NC
525 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
526 (AVR core bug, fixed in the newer devices). */
527
65b1d096
DC
528 if (!(avr_opt.no_skip_bug || (avr_mcu->isa & AVR_ISA_MUL))
529 && AVR_SKIP_P (prev))
530 as_warn (_("skipping two-word instruction"));
00d2865b 531
c6a7ab1f 532 bfd_putl32 ((bfd_vma) bin, frag);
adde6300
AM
533 }
534 else
c6a7ab1f 535 bfd_putl16 ((bfd_vma) bin, frag);
b170af93
DC
536
537 prev = bin;
adde6300
AM
538 *line = str;
539 return bin;
540}
541
df136245 542/* Parse one instruction operand.
c6a7ab1f
NC
543 Return operand bitmask. Also fixups can be generated. */
544
adde6300
AM
545static unsigned int
546avr_operand (opcode, where, op, line)
547 struct avr_opcodes_s *opcode;
548 int where;
549 char *op;
550 char **line;
551{
adde6300 552 expressionS op_expr;
df136245
DC
553 unsigned int op_mask = 0;
554 char *str = skip_space (*line);
adde6300 555
adde6300
AM
556 switch (*op)
557 {
558 /* Any register operand. */
559 case 'w':
560 case 'd':
561 case 'r':
b170af93
DC
562 case 'a':
563 case 'v':
c6a7ab1f
NC
564 if (*str == 'r' || *str == 'R')
565 {
566 char r_name[20];
1dab94dd 567
c6a7ab1f 568 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 569 op_mask = 0xff;
3882b010 570 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
571 {
572 if (r_name[2] == '\0')
573 op_mask = r_name[1] - '0';
574 else if (r_name[1] != '0'
3882b010 575 && ISDIGIT (r_name[2])
c6a7ab1f
NC
576 && r_name[3] == '\0')
577 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
578 }
579 }
580 else
581 {
582 op_mask = avr_get_constant (str, 31);
583 str = input_line_pointer;
584 }
1dab94dd 585
c6a7ab1f
NC
586 if (op_mask <= 31)
587 {
588 switch (*op)
589 {
590 case 'a':
591 if (op_mask < 16 || op_mask > 23)
592 as_bad (_("register r16-r23 required"));
593 op_mask -= 16;
594 break;
1dab94dd 595
c6a7ab1f
NC
596 case 'd':
597 if (op_mask < 16)
598 as_bad (_("register number above 15 required"));
599 op_mask -= 16;
600 break;
1dab94dd 601
c6a7ab1f
NC
602 case 'v':
603 if (op_mask & 1)
604 as_bad (_("even register number required"));
605 op_mask >>= 1;
606 break;
1dab94dd 607
c6a7ab1f 608 case 'w':
65b1d096 609 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 610 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 611 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
612 break;
613 }
614 break;
615 }
616 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
617 break;
618
619 case 'e':
620 {
621 char c;
1dab94dd 622
adde6300
AM
623 if (*str == '-')
624 {
c6a7ab1f 625 str = skip_space (str + 1);
adde6300
AM
626 op_mask = 0x1002;
627 }
3882b010 628 c = TOLOWER (*str);
adde6300
AM
629 if (c == 'x')
630 op_mask |= 0x100c;
631 else if (c == 'y')
632 op_mask |= 0x8;
633 else if (c != 'z')
00d2865b 634 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 635
c6a7ab1f 636 str = skip_space (str + 1);
adde6300
AM
637 if (*str == '+')
638 {
639 ++str;
640 if (op_mask & 2)
00d2865b 641 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
642 op_mask |= 0x1001;
643 }
e38c9cc2 644
1188e082 645 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 646 registers, no predecrement, no postincrement. */
00d2865b
NC
647 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
648 && !(avr_mcu->isa & AVR_ISA_SRAM))
649 as_bad (_("addressing mode not supported"));
adde6300
AM
650 }
651 break;
652
b170af93 653 case 'z':
c6a7ab1f
NC
654 if (*str == '-')
655 as_bad (_("can't predecrement"));
1dab94dd 656
c6a7ab1f
NC
657 if (! (*str == 'z' || *str == 'Z'))
658 as_bad (_("pointer register Z required"));
1dab94dd 659
c6a7ab1f
NC
660 str = skip_space (str + 1);
661
662 if (*str == '+')
663 {
664 ++str;
665 op_mask |= 1;
666 }
b170af93
DC
667 break;
668
adde6300
AM
669 case 'b':
670 {
3882b010 671 char c = TOLOWER (*str++);
1dab94dd 672
adde6300
AM
673 if (c == 'y')
674 op_mask |= 0x8;
675 else if (c != 'z')
00d2865b 676 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
677 str = skip_space (str);
678 if (*str++ == '+')
679 {
680 unsigned int x;
681 x = avr_get_constant (str, 63);
682 str = input_line_pointer;
683 op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8);
684 }
685 }
686 break;
687
688 case 'h':
c6a7ab1f
NC
689 str = parse_exp (str, &op_expr);
690 fix_new_exp (frag_now, where, opcode->insn_size * 2,
691 &op_expr, false, BFD_RELOC_AVR_CALL);
adde6300
AM
692 break;
693
694 case 'L':
c6a7ab1f
NC
695 str = parse_exp (str, &op_expr);
696 fix_new_exp (frag_now, where, opcode->insn_size * 2,
697 &op_expr, true, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
698 break;
699
700 case 'l':
c6a7ab1f
NC
701 str = parse_exp (str, &op_expr);
702 fix_new_exp (frag_now, where, opcode->insn_size * 2,
703 &op_expr, true, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
704 break;
705
706 case 'i':
c6a7ab1f
NC
707 str = parse_exp (str, &op_expr);
708 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
709 &op_expr, false, BFD_RELOC_16);
adde6300
AM
710 break;
711
712 case 'M':
713 {
714 bfd_reloc_code_real_type r_type;
1dab94dd 715
c6a7ab1f
NC
716 input_line_pointer = str;
717 r_type = avr_ldi_expression (&op_expr);
718 str = input_line_pointer;
adde6300
AM
719 fix_new_exp (frag_now, where, 3,
720 &op_expr, false, r_type);
721 }
722 break;
723
724 case 'n':
725 {
726 unsigned int x;
1dab94dd 727
adde6300
AM
728 x = ~avr_get_constant (str, 255);
729 str = input_line_pointer;
730 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
731 }
732 break;
733
734 case 'K':
735 {
736 unsigned int x;
1dab94dd 737
adde6300
AM
738 x = avr_get_constant (str, 63);
739 str = input_line_pointer;
740 op_mask |= (x & 0xf) | ((x & 0x30) << 2);
741 }
742 break;
743
744 case 'S':
745 case 's':
746 {
747 unsigned int x;
1dab94dd 748
adde6300
AM
749 x = avr_get_constant (str, 7);
750 str = input_line_pointer;
751 if (*op == 'S')
752 x <<= 4;
753 op_mask |= x;
754 }
755 break;
756
757 case 'P':
758 {
759 unsigned int x;
1dab94dd 760
adde6300
AM
761 x = avr_get_constant (str, 63);
762 str = input_line_pointer;
763 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
764 }
765 break;
766
767 case 'p':
768 {
769 unsigned int x;
1dab94dd 770
adde6300
AM
771 x = avr_get_constant (str, 31);
772 str = input_line_pointer;
773 op_mask |= x << 3;
774 }
775 break;
1dab94dd 776
1188e082
DC
777 case '?':
778 break;
1dab94dd 779
adde6300 780 default:
00d2865b 781 as_bad (_("unknown constraint `%c'"), *op);
adde6300 782 }
1dab94dd 783
adde6300
AM
784 *line = str;
785 return op_mask;
786}
787
788/* GAS will call this function for each section at the end of the assembly,
789 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 790
adde6300
AM
791valueT
792md_section_align (seg, addr)
793 asection *seg;
794 valueT addr;
795{
796 int align = bfd_get_section_alignment (stdoutput, seg);
797 return ((addr + (1 << align) - 1) & (-1 << align));
798}
799
800/* If you define this macro, it should return the offset between the
801 address of a PC relative fixup and the position from which the PC
802 relative adjustment should be made. On many processors, the base
803 of a PC relative instruction is the next instruction, so this
804 macro would return the length of an instruction. */
c6a7ab1f 805
adde6300
AM
806long
807md_pcrel_from_section (fixp, sec)
808 fixS *fixp;
809 segT sec;
810{
c6a7ab1f 811 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
812 && (!S_IS_DEFINED (fixp->fx_addsy)
813 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
814 return 0;
1dab94dd 815
adde6300
AM
816 return fixp->fx_frag->fr_address + fixp->fx_where;
817}
818
819/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
820 value in the object file. */
821
adde6300
AM
822int
823md_apply_fix3 (fixp, valuep, seg)
824 fixS *fixp;
825 valueT *valuep;
826 segT seg;
827{
828 unsigned char *where;
829 unsigned long insn;
830 long value;
831
832 if (fixp->fx_addsy == (symbolS *) NULL)
833 {
834 value = *valuep;
835 fixp->fx_done = 1;
836 }
837 else if (fixp->fx_pcrel)
838 {
839 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1dab94dd 840
adde6300
AM
841 if (fixp->fx_addsy && (s == seg || s == absolute_section))
842 {
843 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
844 fixp->fx_done = 1;
845 }
846 else
847 value = *valuep;
848 }
849 else
850 {
851 value = fixp->fx_offset;
1dab94dd 852
adde6300
AM
853 if (fixp->fx_subsy != (symbolS *) NULL)
854 {
855 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
856 {
857 value -= S_GET_VALUE (fixp->fx_subsy);
858 fixp->fx_done = 1;
859 }
860 else
861 {
862 /* We don't actually support subtracting a symbol. */
c6a7ab1f 863 as_bad_where (fixp->fx_file, fixp->fx_line,
00d2865b 864 _("expression too complex"));
adde6300
AM
865 }
866 }
867 }
1dab94dd 868
adde6300
AM
869 switch (fixp->fx_r_type)
870 {
871 default:
872 fixp->fx_no_overflow = 1;
873 break;
874 case BFD_RELOC_AVR_7_PCREL:
875 case BFD_RELOC_AVR_13_PCREL:
876 case BFD_RELOC_32:
877 case BFD_RELOC_16:
878 case BFD_RELOC_AVR_CALL:
879 break;
880 }
881
882 if (fixp->fx_done)
883 {
884 /* Fetch the instruction, insert the fully resolved operand
885 value, and stuff the instruction back again. */
886 where = fixp->fx_frag->fr_literal + fixp->fx_where;
887 insn = bfd_getl16 (where);
888
889 switch (fixp->fx_r_type)
890 {
891 case BFD_RELOC_AVR_7_PCREL:
892 if (value & 1)
893 as_bad_where (fixp->fx_file, fixp->fx_line,
894 _("odd address operand: %ld"), value);
1dab94dd 895
adde6300
AM
896 /* Instruction addresses are always right-shifted by 1. */
897 value >>= 1;
898 --value; /* Correct PC. */
1dab94dd 899
adde6300
AM
900 if (value < -64 || value > 63)
901 as_bad_where (fixp->fx_file, fixp->fx_line,
902 _("operand out of range: %ld"), value);
903 value = (value << 3) & 0x3f8;
904 bfd_putl16 ((bfd_vma) (value | insn), where);
905 break;
906
907 case BFD_RELOC_AVR_13_PCREL:
908 if (value & 1)
909 as_bad_where (fixp->fx_file, fixp->fx_line,
910 _("odd address operand: %ld"), value);
1dab94dd 911
adde6300
AM
912 /* Instruction addresses are always right-shifted by 1. */
913 value >>= 1;
914 --value; /* Correct PC. */
adde6300
AM
915
916 if (value < -2048 || value > 2047)
917 {
65aa24b6 918 /* No wrap for devices with >8K of program memory. */
00d2865b 919 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
adde6300
AM
920 as_bad_where (fixp->fx_file, fixp->fx_line,
921 _("operand out of range: %ld"), value);
922 }
923
924 value &= 0xfff;
925 bfd_putl16 ((bfd_vma) (value | insn), where);
926 break;
927
928 case BFD_RELOC_32:
929 bfd_putl16 ((bfd_vma) value, where);
930 break;
931
932 case BFD_RELOC_16:
933 bfd_putl16 ((bfd_vma) value, where);
934 break;
935
936 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 937 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
938 break;
939
940 case BFD_RELOC_AVR_LO8_LDI:
941 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
942 break;
943
944 case -BFD_RELOC_AVR_LO8_LDI:
945 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
946 break;
947
948 case BFD_RELOC_AVR_HI8_LDI:
949 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
950 break;
951
952 case -BFD_RELOC_AVR_HI8_LDI:
953 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
954 break;
955
956 case BFD_RELOC_AVR_HH8_LDI:
957 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
958 break;
959
960 case BFD_RELOC_AVR_LO8_LDI_NEG:
961 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
962 break;
963
964 case -BFD_RELOC_AVR_LO8_LDI_NEG:
965 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
966 break;
967
968 case BFD_RELOC_AVR_HI8_LDI_NEG:
969 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
970 break;
971
972 case -BFD_RELOC_AVR_HI8_LDI_NEG:
973 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
974 break;
975
976 case BFD_RELOC_AVR_HH8_LDI_NEG:
977 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
978 break;
979
980 case BFD_RELOC_AVR_LO8_LDI_PM:
981 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
982 break;
983
984 case BFD_RELOC_AVR_HI8_LDI_PM:
985 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
986 break;
987
988 case BFD_RELOC_AVR_HH8_LDI_PM:
989 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
990 break;
991
992 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
993 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
994 break;
995
996 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
997 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
998 break;
999
1000 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1001 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1002 break;
1003
1004 case BFD_RELOC_AVR_CALL:
1005 {
1006 unsigned long x;
1dab94dd 1007
adde6300
AM
1008 x = bfd_getl16 (where);
1009 if (value & 1)
1010 as_bad_where (fixp->fx_file, fixp->fx_line,
1011 _("odd address operand: %ld"), value);
1012 value >>= 1;
1013 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1014 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 1015 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
1016 }
1017 break;
1018
1019 default:
c6a7ab1f
NC
1020 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1021 fixp->fx_line, fixp->fx_r_type);
adde6300
AM
1022 break;
1023 }
1024 }
1025 else
1026 {
1027 switch (fixp->fx_r_type)
1028 {
1029 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1030 case -BFD_RELOC_AVR_HI8_LDI:
1031 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1032 case -BFD_RELOC_AVR_LO8_LDI:
1033 as_bad_where (fixp->fx_file, fixp->fx_line,
1034 _("only constant expression allowed"));
1035 fixp->fx_done = 1;
1036 break;
1037 default:
1038 break;
1039 }
1040 fixp->fx_addnumber = value;
1041 }
1042 return 0;
1043}
1044
adde6300
AM
1045/* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1046 will pass the resulting reloc to `bfd_install_relocation'. This
1047 currently works poorly, as `bfd_install_relocation' often does the
1048 wrong thing, and instances of `tc_gen_reloc' have been written to
1049 work around the problems, which in turns makes it difficult to fix
c6a7ab1f 1050 `bfd_install_relocation'. */
adde6300
AM
1051
1052/* If while processing a fixup, a reloc really needs to be created
1053 then it is done here. */
1054
1055arelent *
1056tc_gen_reloc (seg, fixp)
df136245 1057 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
1058 fixS *fixp;
1059{
1060 arelent *reloc;
1061
1062 reloc = (arelent *) xmalloc (sizeof (arelent));
1063
1064 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1065 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1066
1067 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1068 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1069 if (reloc->howto == (reloc_howto_type *) NULL)
1070 {
1071 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1072 _("reloc %d not supported by object file format"),
1073 (int) fixp->fx_r_type);
adde6300
AM
1074 return NULL;
1075 }
1076
1077 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1078 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1079 reloc->address = fixp->fx_offset;
1080
1081 reloc->addend = fixp->fx_offset;
1082
1083 return reloc;
1084}
1085
adde6300
AM
1086void
1087md_assemble (str)
1088 char *str;
1089{
c6a7ab1f 1090 struct avr_opcodes_s *opcode;
adde6300
AM
1091 char op[11];
1092
c6a7ab1f 1093 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1094
1095 if (!op[0])
00d2865b 1096 as_bad (_("can't find opcode "));
adde6300
AM
1097
1098 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1099
1100 if (opcode == NULL)
1101 {
00d2865b 1102 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1103 return;
1104 }
1105
b170af93 1106 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1107 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1108
1188e082
DC
1109 if (*str && *opcode->constraints == '?')
1110 ++opcode;
b170af93 1111
00d2865b
NC
1112 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1113 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1114
1115 /* We used to set input_line_pointer to the result of get_operands,
1116 but that is wrong. Our caller assumes we don't change it. */
1117 {
1118 char *t = input_line_pointer;
1119 avr_operands (opcode, &str);
b170af93 1120 if (*skip_space (str))
00d2865b 1121 as_bad (_("garbage at end of line"));
adde6300
AM
1122 input_line_pointer = t;
1123 }
1124}
1125
1126/* Parse ordinary expression. */
c6a7ab1f 1127
adde6300
AM
1128static char *
1129parse_exp (s, op)
1130 char *s;
c6a7ab1f 1131 expressionS *op;
adde6300
AM
1132{
1133 input_line_pointer = s;
1134 expression (op);
1135 if (op->X_op == O_absent)
1136 as_bad (_("missing operand"));
1137 return input_line_pointer;
1138}
1139
adde6300
AM
1140/* Parse special expressions (needed for LDI command):
1141 xx8 (address)
1142 xx8 (-address)
1143 pm_xx8 (address)
1144 pm_xx8 (-address)
c6a7ab1f
NC
1145 where xx is: hh, hi, lo. */
1146
adde6300
AM
1147static bfd_reloc_code_real_type
1148avr_ldi_expression (exp)
1149 expressionS *exp;
1150{
1151 char *str = input_line_pointer;
1152 char *tmp;
1153 char op[8];
1154 int mod;
1155 tmp = str;
1156
1157 str = extract_word (str, op, sizeof (op));
1dab94dd 1158
adde6300
AM
1159 if (op[0])
1160 {
1161 mod = (int) hash_find (avr_mod_hash, op);
1dab94dd 1162
adde6300
AM
1163 if (mod)
1164 {
1165 int closes = 0;
1dab94dd 1166
adde6300
AM
1167 mod -= 10;
1168 str = skip_space (str);
1dab94dd 1169
adde6300
AM
1170 if (*str == '(')
1171 {
1172 int neg_p = 0;
1dab94dd 1173
adde6300 1174 ++str;
1dab94dd 1175
adde6300
AM
1176 if (strncmp ("pm(", str, 3) == 0
1177 || strncmp ("-(pm(", str, 5) == 0)
1178 {
c6a7ab1f 1179 if (HAVE_PM_P (mod))
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AM
1180 {
1181 ++mod;
1182 ++closes;
1183 }
1184 else
00d2865b 1185 as_bad (_("illegal expression"));
1dab94dd 1186
adde6300
AM
1187 if (*str == '-')
1188 {
1189 neg_p = 1;
1190 ++closes;
1191 str += 5;
1192 }
1193 else
1194 str += 3;
1195 }
1dab94dd 1196
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1197 if (*str == '-' && *(str + 1) == '(')
1198 {
1199 neg_p ^= 1;
1200 ++closes;
1201 str += 2;
1202 }
1dab94dd 1203
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1204 input_line_pointer = str;
1205 expression (exp);
1dab94dd 1206
adde6300
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1207 do
1208 {
1209 if (*input_line_pointer != ')')
1210 {
00d2865b 1211 as_bad (_("`)' required"));
adde6300
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1212 break;
1213 }
1214 input_line_pointer++;
1215 }
1216 while (closes--);
1dab94dd 1217
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1218 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
1219 }
1220 }
1221 }
1dab94dd 1222
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1223 input_line_pointer = tmp;
1224 expression (exp);
00d2865b 1225
c6a7ab1f 1226 /* Warn about expressions that fail to use lo8 (). */
00d2865b
NC
1227 if (exp->X_op == O_constant)
1228 {
1229 int x = exp->X_add_number;
1230 if (x < -255 || x > 255)
1231 as_warn (_("constant out of 8-bit range: %d"), x);
1232 }
1233 else
1234 as_warn (_("expression possibly out of 8-bit range"));
1235
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1236 return BFD_RELOC_AVR_LO8_LDI;
1237}
1238
1239/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1240 `avr_cons_fix_new'. */
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1241static int exp_mod_pm = 0;
1242
1243/* Parse special CONS expression: pm (expression)
1244 which is used for addressing to a program memory.
c6a7ab1f
NC
1245 Relocation: BFD_RELOC_AVR_16_PM. */
1246
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1247void
1248avr_parse_cons_expression (exp, nbytes)
1249 expressionS *exp;
1250 int nbytes;
1251{
c6a7ab1f 1252 char *tmp;
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1253
1254 exp_mod_pm = 0;
1255
1256 tmp = input_line_pointer = skip_space (input_line_pointer);
1257
1258 if (nbytes == 2)
1259 {
c6a7ab1f 1260 char *pm_name = "pm";
adde6300 1261 int len = strlen (pm_name);
1dab94dd 1262
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AM
1263 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1264 {
1265 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1266
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AM
1267 if (*input_line_pointer == '(')
1268 {
1269 input_line_pointer = skip_space (input_line_pointer + 1);
1270 exp_mod_pm = 1;
1271 expression (exp);
1dab94dd 1272
adde6300
AM
1273 if (*input_line_pointer == ')')
1274 ++input_line_pointer;
1275 else
1276 {
00d2865b 1277 as_bad (_("`)' required"));
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1278 exp_mod_pm = 0;
1279 }
1dab94dd 1280
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1281 return;
1282 }
1dab94dd 1283
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AM
1284 input_line_pointer = tmp;
1285 }
1286 }
1dab94dd 1287
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1288 expression (exp);
1289}
1290
1291void
c6a7ab1f 1292avr_cons_fix_new (frag, where, nbytes, exp)
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AM
1293 fragS *frag;
1294 int where;
1295 int nbytes;
1296 expressionS *exp;
1297{
1298 if (exp_mod_pm == 0)
1299 {
1300 if (nbytes == 2)
1301 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16);
1302 else if (nbytes == 4)
1303 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32);
1304 else
00d2865b 1305 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
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AM
1306 }
1307 else
1308 {
1309 if (nbytes == 2)
1310 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM);
1311 else
00d2865b 1312 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
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1313 exp_mod_pm = 0;
1314 }
1315}
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