remove some duplicate #include's.
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
adde6300
AM
1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
8ad7c533 3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
2132e3a3 4 Free Software Foundation, Inc.
adde6300
AM
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
4b4da160
NC
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
adde6300 23
adde6300 24#include "as.h"
3882b010 25#include "safe-ctype.h"
adde6300
AM
26#include "subsegs.h"
27
1188e082
DC
28struct avr_opcodes_s
29{
dc191a8f
NC
30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
1188e082
DC
35};
36
37#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38{#NAME, CONSTR, SIZE, ISA, BIN},
39
40struct avr_opcodes_s avr_opcodes[] =
41{
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44};
45
adde6300
AM
46const char comment_chars[] = ";";
47const char line_comment_chars[] = "#";
48const char line_separator_chars[] = "$";
49
adde6300
AM
50const char *md_shortopts = "m:";
51struct mcu_type_s
52{
53 char *name;
54 int isa;
55 int mach;
56};
57
1f8ae5e6
DC
58/* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
adde6300
AM
62static struct mcu_type_s mcu_types[] =
63{
28c9d252
NC
64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
72 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
83 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
85 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
89 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
101 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
102 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
103 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
104 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
105 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
106 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
107 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
108 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
109 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
110 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
111 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
112 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
113 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
114 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
115 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
116 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
117 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
118 {"atmega164", AVR_ISA_M323, bfd_mach_avr5},
119 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
120 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
121 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
122 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
123 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
124 {"atmega324", AVR_ISA_M323, bfd_mach_avr5},
125 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
126 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
127 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
129 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
132 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
134 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
135 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
136 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
137 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
138 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
139 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
140 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
141 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
142 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
d727e8c2
NC
143 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
144 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
145 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
146 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
28c9d252
NC
147 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
148 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
149 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
adde6300
AM
150 {NULL, 0, 0}
151};
152
adde6300 153/* Current MCU type. */
dc191a8f
NC
154static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
155static struct mcu_type_s * avr_mcu = & default_mcu;
adde6300 156
00d2865b
NC
157/* AVR target-specific switches. */
158struct avr_opt_s
159{
dc191a8f
NC
160 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
161 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
162 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
00d2865b
NC
163};
164
165static struct avr_opt_s avr_opt = { 0, 0, 0 };
166
adde6300
AM
167const char EXP_CHARS[] = "eE";
168const char FLT_CHARS[] = "dD";
dc191a8f
NC
169
170static void avr_set_arch (int);
adde6300
AM
171
172/* The target specific pseudo-ops which we support. */
173const pseudo_typeS md_pseudo_table[] =
174{
175 {"arch", avr_set_arch, 0},
176 { NULL, NULL, 0}
177};
178
179#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 180
dc191a8f
NC
181#define EXP_MOD_NAME(i) exp_mod[i].name
182#define EXP_MOD_RELOC(i) exp_mod[i].reloc
183#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
184#define HAVE_PM_P(i) exp_mod[i].have_pm
adde6300
AM
185
186struct exp_mod_s
187{
dc191a8f
NC
188 char * name;
189 bfd_reloc_code_real_type reloc;
190 bfd_reloc_code_real_type neg_reloc;
191 int have_pm;
adde6300
AM
192};
193
c6a7ab1f
NC
194static struct exp_mod_s exp_mod[] =
195{
adde6300
AM
196 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
197 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
198 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
199 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
200 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
201 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
df406460
NC
202 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
203 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
adde6300
AM
204};
205
8ad7c533
NC
206/* A union used to store indicies into the exp_mod[] array
207 in a hash table which expects void * data types. */
208typedef union
209{
210 void * ptr;
211 int index;
212} mod_index;
213
adde6300
AM
214/* Opcode hash table. */
215static struct hash_control *avr_hash;
216
217/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
218static struct hash_control *avr_mod_hash;
219
00d2865b 220#define OPTION_MMCU 'm'
dc191a8f
NC
221enum options
222{
223 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
224 OPTION_NO_SKIP_BUG,
225 OPTION_NO_WRAP
226};
adde6300 227
c6a7ab1f
NC
228struct option md_longopts[] =
229{
00d2865b
NC
230 { "mmcu", required_argument, NULL, OPTION_MMCU },
231 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
232 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
233 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
234 { NULL, no_argument, NULL, 0 }
adde6300 235};
adde6300 236
c6a7ab1f 237size_t md_longopts_size = sizeof (md_longopts);
00d2865b
NC
238
239/* Display nicely formatted list of known MCU names. */
c6a7ab1f 240
00d2865b 241static void
dc191a8f 242show_mcu_list (FILE *stream)
00d2865b
NC
243{
244 int i, x;
245
246 fprintf (stream, _("Known MCU names:"));
247 x = 1000;
1dab94dd 248
00d2865b
NC
249 for (i = 0; mcu_types[i].name; i++)
250 {
251 int len = strlen (mcu_types[i].name);
1dab94dd 252
00d2865b 253 x += len + 1;
1dab94dd 254
00d2865b 255 if (x < 75)
c6a7ab1f 256 fprintf (stream, " %s", mcu_types[i].name);
00d2865b
NC
257 else
258 {
259 fprintf (stream, "\n %s", mcu_types[i].name);
260 x = len + 2;
261 }
262 }
1dab94dd 263
c6a7ab1f 264 fprintf (stream, "\n");
00d2865b
NC
265}
266
adde6300 267static inline char *
dc191a8f 268skip_space (char *s)
adde6300
AM
269{
270 while (*s == ' ' || *s == '\t')
271 ++s;
272 return s;
273}
274
275/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 276
adde6300
AM
277static char *
278extract_word (char *from, char *to, int limit)
279{
280 char *op_start;
281 char *op_end;
282 int size = 0;
283
284 /* Drop leading whitespace. */
285 from = skip_space (from);
286 *to = 0;
c6a7ab1f 287
adde6300 288 /* Find the op code end. */
c6a7ab1f 289 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
adde6300
AM
290 {
291 to[size++] = *op_end++;
292 if (size + 1 >= limit)
293 break;
294 }
1dab94dd 295
adde6300
AM
296 to[size] = 0;
297 return op_end;
298}
299
300int
dc191a8f
NC
301md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
302 asection *seg ATTRIBUTE_UNUSED)
adde6300
AM
303{
304 abort ();
305 return 0;
306}
307
308void
dc191a8f 309md_show_usage (FILE *stream)
adde6300 310{
00d2865b
NC
311 fprintf (stream,
312 _("AVR options:\n"
adde6300
AM
313 " -mmcu=[avr-name] select microcontroller variant\n"
314 " [avr-name] can be:\n"
65aa24b6
NC
315 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
316 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
317 " avr3 - ATmega103, ATmega603\n"
318 " avr4 - ATmega83, ATmega85\n"
319 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 320 " or immediate microcontroller name.\n"));
00d2865b
NC
321 fprintf (stream,
322 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
323 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
324 " (default for avr4, avr5)\n"
325 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
326 " (default for avr3, avr5)\n"));
327 show_mcu_list (stream);
adde6300
AM
328}
329
330static void
dc191a8f 331avr_set_arch (int dummy ATTRIBUTE_UNUSED)
adde6300 332{
dc191a8f 333 char str[20];
1dab94dd 334
adde6300 335 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 336 md_parse_option (OPTION_MMCU, str);
adde6300
AM
337 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
338}
339
340int
dc191a8f 341md_parse_option (int c, char *arg)
adde6300 342{
00d2865b 343 switch (c)
adde6300 344 {
00d2865b
NC
345 case OPTION_MMCU:
346 {
347 int i;
348 char *s = alloca (strlen (arg) + 1);
adde6300 349
00d2865b
NC
350 {
351 char *t = s;
352 char *arg1 = arg;
353
354 do
3882b010 355 *t = TOLOWER (*arg1++);
00d2865b
NC
356 while (*t++);
357 }
358
359 for (i = 0; mcu_types[i].name; ++i)
360 if (strcmp (mcu_types[i].name, s) == 0)
361 break;
adde6300 362
00d2865b
NC
363 if (!mcu_types[i].name)
364 {
365 show_mcu_list (stderr);
366 as_fatal (_("unknown MCU: %s\n"), arg);
367 }
65aa24b6 368
00d2865b
NC
369 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
370 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
371 as .arch ... in the asm output at the same time. */
00d2865b
NC
372 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
373 avr_mcu = &mcu_types[i];
374 else
375 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
376 avr_mcu->name, mcu_types[i].name);
377 return 1;
378 }
379 case OPTION_ALL_OPCODES:
380 avr_opt.all_opcodes = 1;
381 return 1;
382 case OPTION_NO_SKIP_BUG:
383 avr_opt.no_skip_bug = 1;
384 return 1;
385 case OPTION_NO_WRAP:
386 avr_opt.no_wrap = 1;
adde6300
AM
387 return 1;
388 }
1dab94dd 389
adde6300
AM
390 return 0;
391}
392
393symbolS *
dc191a8f 394md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
adde6300 395{
dc191a8f 396 return NULL;
adde6300
AM
397}
398
c6a7ab1f
NC
399/* Turn a string in input_line_pointer into a floating point constant
400 of type TYPE, and store the appropriate bytes in *LITP. The number
401 of LITTLENUMS emitted is stored in *SIZEP. An error message is
402 returned, or NULL on OK. */
403
adde6300 404char *
dc191a8f 405md_atof (int type, char *litP, int *sizeP)
adde6300
AM
406{
407 int prec;
408 LITTLENUM_TYPE words[4];
409 LITTLENUM_TYPE *wordP;
410 char *t;
411
412 switch (type)
413 {
414 case 'f':
415 prec = 2;
416 break;
417 case 'd':
418 prec = 4;
419 break;
420 default:
421 *sizeP = 0;
422 return _("bad call to md_atof");
423 }
424
425 t = atof_ieee (input_line_pointer, type, words);
426 if (t)
427 input_line_pointer = t;
428
429 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1dab94dd 430
adde6300
AM
431 /* This loop outputs the LITTLENUMs in REVERSE order. */
432 for (wordP = words + prec - 1; prec--;)
433 {
434 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
435 litP += sizeof (LITTLENUM_TYPE);
436 }
1dab94dd 437
adde6300
AM
438 return NULL;
439}
440
441void
dc191a8f
NC
442md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
443 asection *sec ATTRIBUTE_UNUSED,
444 fragS *fragP ATTRIBUTE_UNUSED)
adde6300
AM
445{
446 abort ();
447}
448
adde6300 449void
dc191a8f 450md_begin (void)
adde6300 451{
df136245 452 unsigned int i;
adde6300 453 struct avr_opcodes_s *opcode;
dc191a8f 454
c6a7ab1f 455 avr_hash = hash_new ();
adde6300
AM
456
457 /* Insert unique names into hash table. This hash table then provides a
458 quick index to the first opcode with a particular name in the opcode
459 table. */
adde6300
AM
460 for (opcode = avr_opcodes; opcode->name; opcode++)
461 hash_insert (avr_hash, opcode->name, (char *) opcode);
462
463 avr_mod_hash = hash_new ();
464
dc191a8f 465 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
8ad7c533
NC
466 {
467 mod_index m;
468
469 m.index = i + 10;
470 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
471 }
c6a7ab1f 472
adde6300
AM
473 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
474}
475
df136245 476/* Resolve STR as a constant expression and return the result.
c6a7ab1f 477 If result greater than MAX then error. */
df136245
DC
478
479static unsigned int
dc191a8f 480avr_get_constant (char *str, int max)
df136245
DC
481{
482 expressionS ex;
dc191a8f 483
df136245
DC
484 str = skip_space (str);
485 input_line_pointer = str;
dc191a8f 486 expression (& ex);
df136245
DC
487
488 if (ex.X_op != O_constant)
489 as_bad (_("constant value required"));
490
491 if (ex.X_add_number > max || ex.X_add_number < 0)
c6a7ab1f 492 as_bad (_("number must be less than %d"), max + 1);
1dab94dd 493
df136245
DC
494 return ex.X_add_number;
495}
496
dc191a8f 497/* Parse for ldd/std offset. */
df136245 498
dc191a8f
NC
499static void
500avr_offset_expression (expressionS *exp)
adde6300 501{
dc191a8f
NC
502 char *str = input_line_pointer;
503 char *tmp;
504 char op[8];
adde6300 505
dc191a8f
NC
506 tmp = str;
507 str = extract_word (str, op, sizeof (op));
508
509 input_line_pointer = tmp;
510 expression (exp);
511
512 /* Warn about expressions that fail to use lo8 (). */
513 if (exp->X_op == O_constant)
adde6300 514 {
dc191a8f 515 int x = exp->X_add_number;
28c9d252 516
dc191a8f
NC
517 if (x < -255 || x > 255)
518 as_warn (_("constant out of 8-bit range: %d"), x);
519 }
520}
adde6300 521
dc191a8f 522/* Parse ordinary expression. */
adde6300 523
dc191a8f
NC
524static char *
525parse_exp (char *s, expressionS *op)
526{
527 input_line_pointer = s;
528 expression (op);
529 if (op->X_op == O_absent)
530 as_bad (_("missing operand"));
531 return input_line_pointer;
532}
1dab94dd 533
dc191a8f
NC
534/* Parse special expressions (needed for LDI command):
535 xx8 (address)
536 xx8 (-address)
537 pm_xx8 (address)
538 pm_xx8 (-address)
539 where xx is: hh, hi, lo. */
adde6300 540
dc191a8f
NC
541static bfd_reloc_code_real_type
542avr_ldi_expression (expressionS *exp)
543{
544 char *str = input_line_pointer;
545 char *tmp;
546 char op[8];
547 int mod;
28c9d252
NC
548 int linker_stubs_should_be_generated = 0;
549
dc191a8f 550 tmp = str;
adde6300 551
dc191a8f 552 str = extract_word (str, op, sizeof (op));
adde6300 553
dc191a8f
NC
554 if (op[0])
555 {
8ad7c533 556 mod_index m;
28c9d252 557
8ad7c533
NC
558 m.ptr = hash_find (avr_mod_hash, op);
559 mod = m.index;
1dab94dd 560
dc191a8f
NC
561 if (mod)
562 {
563 int closes = 0;
b170af93 564
dc191a8f
NC
565 mod -= 10;
566 str = skip_space (str);
00d2865b 567
dc191a8f
NC
568 if (*str == '(')
569 {
28c9d252 570 bfd_reloc_code_real_type reloc_to_return;
dc191a8f 571 int neg_p = 0;
00d2865b 572
dc191a8f 573 ++str;
00d2865b 574
dc191a8f 575 if (strncmp ("pm(", str, 3) == 0
28c9d252
NC
576 || strncmp ("gs(",str,3) == 0
577 || strncmp ("-(gs(",str,5) == 0
dc191a8f
NC
578 || strncmp ("-(pm(", str, 5) == 0)
579 {
580 if (HAVE_PM_P (mod))
581 {
582 ++mod;
583 ++closes;
584 }
585 else
586 as_bad (_("illegal expression"));
b170af93 587
28c9d252
NC
588 if (str[0] == 'g' || str[2] == 'g')
589 linker_stubs_should_be_generated = 1;
590
dc191a8f
NC
591 if (*str == '-')
592 {
593 neg_p = 1;
594 ++closes;
595 str += 5;
596 }
597 else
598 str += 3;
599 }
adde6300 600
dc191a8f
NC
601 if (*str == '-' && *(str + 1) == '(')
602 {
603 neg_p ^= 1;
604 ++closes;
605 str += 2;
606 }
750bce0e 607
dc191a8f
NC
608 input_line_pointer = str;
609 expression (exp);
750bce0e 610
dc191a8f
NC
611 do
612 {
613 if (*input_line_pointer != ')')
614 {
615 as_bad (_("`)' required"));
616 break;
617 }
618 input_line_pointer++;
619 }
620 while (closes--);
621
28c9d252
NC
622 reloc_to_return =
623 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
624 if (linker_stubs_should_be_generated)
625 {
626 switch (reloc_to_return)
627 {
628 case BFD_RELOC_AVR_LO8_LDI_PM:
629 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
630 break;
631 case BFD_RELOC_AVR_HI8_LDI_PM:
632 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
633 break;
634
635 default:
636 as_warn (_("expression dangerous with linker stubs"));
637 }
638 }
639 return reloc_to_return;
dc191a8f
NC
640 }
641 }
642 }
750bce0e
NC
643
644 input_line_pointer = tmp;
645 expression (exp);
646
647 /* Warn about expressions that fail to use lo8 (). */
648 if (exp->X_op == O_constant)
649 {
650 int x = exp->X_add_number;
dc191a8f 651
750bce0e
NC
652 if (x < -255 || x > 255)
653 as_warn (_("constant out of 8-bit range: %d"), x);
654 }
dc191a8f
NC
655
656 return BFD_RELOC_AVR_LDI;
750bce0e
NC
657}
658
df136245 659/* Parse one instruction operand.
c6a7ab1f
NC
660 Return operand bitmask. Also fixups can be generated. */
661
adde6300 662static unsigned int
dc191a8f
NC
663avr_operand (struct avr_opcodes_s *opcode,
664 int where,
665 char *op,
666 char **line)
adde6300 667{
adde6300 668 expressionS op_expr;
df136245
DC
669 unsigned int op_mask = 0;
670 char *str = skip_space (*line);
adde6300 671
adde6300
AM
672 switch (*op)
673 {
674 /* Any register operand. */
675 case 'w':
676 case 'd':
677 case 'r':
b170af93
DC
678 case 'a':
679 case 'v':
c6a7ab1f
NC
680 if (*str == 'r' || *str == 'R')
681 {
682 char r_name[20];
1dab94dd 683
c6a7ab1f 684 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 685 op_mask = 0xff;
3882b010 686 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
687 {
688 if (r_name[2] == '\0')
689 op_mask = r_name[1] - '0';
690 else if (r_name[1] != '0'
3882b010 691 && ISDIGIT (r_name[2])
c6a7ab1f
NC
692 && r_name[3] == '\0')
693 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
694 }
695 }
696 else
697 {
698 op_mask = avr_get_constant (str, 31);
699 str = input_line_pointer;
700 }
1dab94dd 701
c6a7ab1f
NC
702 if (op_mask <= 31)
703 {
704 switch (*op)
705 {
706 case 'a':
707 if (op_mask < 16 || op_mask > 23)
708 as_bad (_("register r16-r23 required"));
709 op_mask -= 16;
710 break;
1dab94dd 711
c6a7ab1f
NC
712 case 'd':
713 if (op_mask < 16)
714 as_bad (_("register number above 15 required"));
715 op_mask -= 16;
716 break;
1dab94dd 717
c6a7ab1f
NC
718 case 'v':
719 if (op_mask & 1)
720 as_bad (_("even register number required"));
721 op_mask >>= 1;
722 break;
1dab94dd 723
c6a7ab1f 724 case 'w':
65b1d096 725 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 726 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 727 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
728 break;
729 }
730 break;
731 }
732 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
733 break;
734
735 case 'e':
736 {
737 char c;
1dab94dd 738
adde6300
AM
739 if (*str == '-')
740 {
c6a7ab1f 741 str = skip_space (str + 1);
adde6300
AM
742 op_mask = 0x1002;
743 }
3882b010 744 c = TOLOWER (*str);
adde6300
AM
745 if (c == 'x')
746 op_mask |= 0x100c;
747 else if (c == 'y')
748 op_mask |= 0x8;
749 else if (c != 'z')
00d2865b 750 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 751
c6a7ab1f 752 str = skip_space (str + 1);
adde6300
AM
753 if (*str == '+')
754 {
755 ++str;
756 if (op_mask & 2)
00d2865b 757 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
758 op_mask |= 0x1001;
759 }
e38c9cc2 760
1188e082 761 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 762 registers, no predecrement, no postincrement. */
00d2865b
NC
763 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
764 && !(avr_mcu->isa & AVR_ISA_SRAM))
765 as_bad (_("addressing mode not supported"));
adde6300
AM
766 }
767 break;
768
b170af93 769 case 'z':
c6a7ab1f
NC
770 if (*str == '-')
771 as_bad (_("can't predecrement"));
1dab94dd 772
c6a7ab1f
NC
773 if (! (*str == 'z' || *str == 'Z'))
774 as_bad (_("pointer register Z required"));
1dab94dd 775
c6a7ab1f
NC
776 str = skip_space (str + 1);
777
778 if (*str == '+')
779 {
780 ++str;
781 op_mask |= 1;
782 }
b170af93
DC
783 break;
784
adde6300
AM
785 case 'b':
786 {
3882b010 787 char c = TOLOWER (*str++);
1dab94dd 788
adde6300
AM
789 if (c == 'y')
790 op_mask |= 0x8;
791 else if (c != 'z')
00d2865b 792 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
793 str = skip_space (str);
794 if (*str++ == '+')
795 {
750bce0e
NC
796 input_line_pointer = str;
797 avr_offset_expression (& op_expr);
adde6300 798 str = input_line_pointer;
750bce0e
NC
799 fix_new_exp (frag_now, where, 3,
800 &op_expr, FALSE, BFD_RELOC_AVR_6);
adde6300
AM
801 }
802 }
803 break;
804
805 case 'h':
c6a7ab1f
NC
806 str = parse_exp (str, &op_expr);
807 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 808 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
adde6300
AM
809 break;
810
811 case 'L':
c6a7ab1f
NC
812 str = parse_exp (str, &op_expr);
813 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 814 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
815 break;
816
817 case 'l':
c6a7ab1f
NC
818 str = parse_exp (str, &op_expr);
819 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 820 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
821 break;
822
823 case 'i':
c6a7ab1f
NC
824 str = parse_exp (str, &op_expr);
825 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
b34976b6 826 &op_expr, FALSE, BFD_RELOC_16);
adde6300
AM
827 break;
828
829 case 'M':
830 {
831 bfd_reloc_code_real_type r_type;
1dab94dd 832
c6a7ab1f
NC
833 input_line_pointer = str;
834 r_type = avr_ldi_expression (&op_expr);
835 str = input_line_pointer;
adde6300 836 fix_new_exp (frag_now, where, 3,
b34976b6 837 &op_expr, FALSE, r_type);
adde6300
AM
838 }
839 break;
840
841 case 'n':
842 {
843 unsigned int x;
1dab94dd 844
adde6300
AM
845 x = ~avr_get_constant (str, 255);
846 str = input_line_pointer;
847 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
848 }
849 break;
850
851 case 'K':
750bce0e
NC
852 input_line_pointer = str;
853 avr_offset_expression (& op_expr);
854 str = input_line_pointer;
855 fix_new_exp (frag_now, where, 3,
856 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
adde6300
AM
857 break;
858
859 case 'S':
860 case 's':
861 {
862 unsigned int x;
1dab94dd 863
adde6300
AM
864 x = avr_get_constant (str, 7);
865 str = input_line_pointer;
866 if (*op == 'S')
867 x <<= 4;
868 op_mask |= x;
869 }
870 break;
871
872 case 'P':
873 {
874 unsigned int x;
1dab94dd 875
adde6300
AM
876 x = avr_get_constant (str, 63);
877 str = input_line_pointer;
878 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
879 }
880 break;
881
882 case 'p':
883 {
884 unsigned int x;
1dab94dd 885
adde6300
AM
886 x = avr_get_constant (str, 31);
887 str = input_line_pointer;
888 op_mask |= x << 3;
889 }
890 break;
1dab94dd 891
1188e082
DC
892 case '?':
893 break;
1dab94dd 894
adde6300 895 default:
00d2865b 896 as_bad (_("unknown constraint `%c'"), *op);
adde6300 897 }
1dab94dd 898
adde6300
AM
899 *line = str;
900 return op_mask;
901}
902
dc191a8f
NC
903/* Parse instruction operands.
904 Return binary opcode. */
905
906static unsigned int
907avr_operands (struct avr_opcodes_s *opcode, char **line)
908{
909 char *op = opcode->constraints;
910 unsigned int bin = opcode->bin_opcode;
911 char *frag = frag_more (opcode->insn_size * 2);
912 char *str = *line;
913 int where = frag - frag_now->fr_literal;
914 static unsigned int prev = 0; /* Previous opcode. */
915
916 /* Opcode have operands. */
917 if (*op)
918 {
919 unsigned int reg1 = 0;
920 unsigned int reg2 = 0;
921 int reg1_present = 0;
922 int reg2_present = 0;
923
924 /* Parse first operand. */
925 if (REGISTER_P (*op))
926 reg1_present = 1;
927 reg1 = avr_operand (opcode, where, op, &str);
928 ++op;
929
930 /* Parse second operand. */
931 if (*op)
932 {
933 if (*op == ',')
934 ++op;
935
936 if (*op == '=')
937 {
938 reg2 = reg1;
939 reg2_present = 1;
940 }
941 else
942 {
943 if (REGISTER_P (*op))
944 reg2_present = 1;
945
946 str = skip_space (str);
947 if (*str++ != ',')
948 as_bad (_("`,' required"));
949 str = skip_space (str);
950
951 reg2 = avr_operand (opcode, where, op, &str);
952 }
953
954 if (reg1_present && reg2_present)
955 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
956 else if (reg2_present)
957 reg2 <<= 4;
958 }
959 if (reg1_present)
960 reg1 <<= 4;
961 bin |= reg1 | reg2;
962 }
963
964 /* Detect undefined combinations (like ld r31,Z+). */
965 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
966 as_warn (_("undefined combination of operands"));
967
968 if (opcode->insn_size == 2)
969 {
970 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
971 (AVR core bug, fixed in the newer devices). */
972 if (!(avr_opt.no_skip_bug ||
973 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
974 && AVR_SKIP_P (prev))
975 as_warn (_("skipping two-word instruction"));
976
977 bfd_putl32 ((bfd_vma) bin, frag);
978 }
979 else
980 bfd_putl16 ((bfd_vma) bin, frag);
981
982 prev = bin;
983 *line = str;
984 return bin;
985}
986
adde6300
AM
987/* GAS will call this function for each section at the end of the assembly,
988 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 989
adde6300 990valueT
dc191a8f 991md_section_align (asection *seg, valueT addr)
adde6300
AM
992{
993 int align = bfd_get_section_alignment (stdoutput, seg);
994 return ((addr + (1 << align) - 1) & (-1 << align));
995}
996
997/* If you define this macro, it should return the offset between the
998 address of a PC relative fixup and the position from which the PC
999 relative adjustment should be made. On many processors, the base
1000 of a PC relative instruction is the next instruction, so this
1001 macro would return the length of an instruction. */
c6a7ab1f 1002
adde6300 1003long
dc191a8f 1004md_pcrel_from_section (fixS *fixp, segT sec)
adde6300 1005{
c6a7ab1f 1006 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
1007 && (!S_IS_DEFINED (fixp->fx_addsy)
1008 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1009 return 0;
1dab94dd 1010
adde6300
AM
1011 return fixp->fx_frag->fr_address + fixp->fx_where;
1012}
1013
1014/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
1015 value in the object file. */
1016
94f592af 1017void
dc191a8f 1018md_apply_fix (fixS *fixP, valueT * valP, segT seg)
adde6300
AM
1019{
1020 unsigned char *where;
1021 unsigned long insn;
a161fe53 1022 long value = *valP;
adde6300 1023
94f592af
NC
1024 if (fixP->fx_addsy == (symbolS *) NULL)
1025 fixP->fx_done = 1;
1026
87733541
AM
1027 else if (fixP->fx_pcrel)
1028 {
1029 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1030
1031 if (s == seg || s == absolute_section)
1032 {
1033 value += S_GET_VALUE (fixP->fx_addsy);
1034 fixP->fx_done = 1;
1035 }
1036 }
1037
a161fe53
AM
1038 /* We don't actually support subtracting a symbol. */
1039 if (fixP->fx_subsy != (symbolS *) NULL)
1040 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1dab94dd 1041
94f592af 1042 switch (fixP->fx_r_type)
adde6300
AM
1043 {
1044 default:
94f592af 1045 fixP->fx_no_overflow = 1;
adde6300
AM
1046 break;
1047 case BFD_RELOC_AVR_7_PCREL:
1048 case BFD_RELOC_AVR_13_PCREL:
1049 case BFD_RELOC_32:
1050 case BFD_RELOC_16:
1051 case BFD_RELOC_AVR_CALL:
1052 break;
1053 }
1054
94f592af 1055 if (fixP->fx_done)
adde6300
AM
1056 {
1057 /* Fetch the instruction, insert the fully resolved operand
1058 value, and stuff the instruction back again. */
2132e3a3 1059 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
adde6300
AM
1060 insn = bfd_getl16 (where);
1061
94f592af 1062 switch (fixP->fx_r_type)
adde6300
AM
1063 {
1064 case BFD_RELOC_AVR_7_PCREL:
1065 if (value & 1)
94f592af 1066 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1067 _("odd address operand: %ld"), value);
1dab94dd 1068
adde6300
AM
1069 /* Instruction addresses are always right-shifted by 1. */
1070 value >>= 1;
1071 --value; /* Correct PC. */
1dab94dd 1072
adde6300 1073 if (value < -64 || value > 63)
94f592af 1074 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1075 _("operand out of range: %ld"), value);
1076 value = (value << 3) & 0x3f8;
1077 bfd_putl16 ((bfd_vma) (value | insn), where);
1078 break;
1079
1080 case BFD_RELOC_AVR_13_PCREL:
1081 if (value & 1)
94f592af 1082 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1083 _("odd address operand: %ld"), value);
1dab94dd 1084
adde6300
AM
1085 /* Instruction addresses are always right-shifted by 1. */
1086 value >>= 1;
1087 --value; /* Correct PC. */
adde6300
AM
1088
1089 if (value < -2048 || value > 2047)
1090 {
65aa24b6 1091 /* No wrap for devices with >8K of program memory. */
00d2865b 1092 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
94f592af 1093 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1094 _("operand out of range: %ld"), value);
1095 }
1096
1097 value &= 0xfff;
1098 bfd_putl16 ((bfd_vma) (value | insn), where);
1099 break;
1100
1101 case BFD_RELOC_32:
1102 bfd_putl16 ((bfd_vma) value, where);
1103 break;
1104
1105 case BFD_RELOC_16:
1106 bfd_putl16 ((bfd_vma) value, where);
1107 break;
1108
1109 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 1110 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
1111 break;
1112
750bce0e
NC
1113 case BFD_RELOC_AVR_LDI:
1114 if (value > 255)
1115 as_bad_where (fixP->fx_file, fixP->fx_line,
1116 _("operand out of range: %ld"), value);
1117 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1118 break;
1119
1120 case BFD_RELOC_AVR_6:
1121 if ((value > 63) || (value < 0))
1122 as_bad_where (fixP->fx_file, fixP->fx_line,
1123 _("operand out of range: %ld"), value);
1124 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1125 break;
1126
1127 case BFD_RELOC_AVR_6_ADIW:
1128 if ((value > 63) || (value < 0))
1129 as_bad_where (fixP->fx_file, fixP->fx_line,
1130 _("operand out of range: %ld"), value);
1131 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1132 break;
1133
adde6300
AM
1134 case BFD_RELOC_AVR_LO8_LDI:
1135 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1136 break;
1137
adde6300
AM
1138 case BFD_RELOC_AVR_HI8_LDI:
1139 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1140 break;
1141
df406460 1142 case BFD_RELOC_AVR_MS8_LDI:
adde6300
AM
1143 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1144 break;
1145
1146 case BFD_RELOC_AVR_HH8_LDI:
1147 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1148 break;
1149
1150 case BFD_RELOC_AVR_LO8_LDI_NEG:
1151 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1152 break;
1153
adde6300
AM
1154 case BFD_RELOC_AVR_HI8_LDI_NEG:
1155 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1156 break;
1157
df406460 1158 case BFD_RELOC_AVR_MS8_LDI_NEG:
adde6300
AM
1159 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1160 break;
1161
1162 case BFD_RELOC_AVR_HH8_LDI_NEG:
1163 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1164 break;
1165
1166 case BFD_RELOC_AVR_LO8_LDI_PM:
1167 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1168 break;
1169
1170 case BFD_RELOC_AVR_HI8_LDI_PM:
1171 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1172 break;
1173
1174 case BFD_RELOC_AVR_HH8_LDI_PM:
1175 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1176 break;
1177
1178 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1179 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1180 break;
1181
1182 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1183 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1184 break;
1185
1186 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1187 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1188 break;
1189
1190 case BFD_RELOC_AVR_CALL:
1191 {
1192 unsigned long x;
1dab94dd 1193
adde6300
AM
1194 x = bfd_getl16 (where);
1195 if (value & 1)
94f592af 1196 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1197 _("odd address operand: %ld"), value);
1198 value >>= 1;
1199 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1200 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 1201 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
1202 }
1203 break;
1204
1205 default:
c6a7ab1f 1206 as_fatal (_("line %d: unknown relocation type: 0x%x"),
94f592af 1207 fixP->fx_line, fixP->fx_r_type);
adde6300
AM
1208 break;
1209 }
1210 }
1211 else
1212 {
94f592af 1213 switch (fixP->fx_r_type)
adde6300
AM
1214 {
1215 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1216 case -BFD_RELOC_AVR_HI8_LDI:
1217 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1218 case -BFD_RELOC_AVR_LO8_LDI:
94f592af 1219 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1220 _("only constant expression allowed"));
94f592af 1221 fixP->fx_done = 1;
adde6300
AM
1222 break;
1223 default:
1224 break;
1225 }
adde6300 1226 }
adde6300
AM
1227}
1228
7be1c489
AM
1229/* GAS will call this to generate a reloc, passing the resulting reloc
1230 to `bfd_install_relocation'. This currently works poorly, as
1231 `bfd_install_relocation' often does the wrong thing, and instances of
1232 `tc_gen_reloc' have been written to work around the problems, which
1233 in turns makes it difficult to fix `bfd_install_relocation'. */
adde6300
AM
1234
1235/* If while processing a fixup, a reloc really needs to be created
1236 then it is done here. */
1237
1238arelent *
dc191a8f
NC
1239tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1240 fixS *fixp)
adde6300
AM
1241{
1242 arelent *reloc;
1243
df406460
NC
1244 if (fixp->fx_addsy && fixp->fx_subsy)
1245 {
1246 long value = 0;
1247
1248 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1249 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1250 {
1251 as_bad_where (fixp->fx_file, fixp->fx_line,
1252 "Difference of symbols in different sections is not supported");
1253 return NULL;
1254 }
1255
28c9d252 1256 /* We are dealing with two symbols defined in the same section.
df406460
NC
1257 Let us fix-up them here. */
1258 value += S_GET_VALUE (fixp->fx_addsy);
1259 value -= S_GET_VALUE (fixp->fx_subsy);
1260
1261 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1262 only takes it's second operands for the fixup value. */
1263 fixp->fx_addsy = NULL;
1264 fixp->fx_subsy = NULL;
1265 md_apply_fix (fixp, (valueT *) &value, NULL);
1266
1267 return NULL;
1268 }
1269
dc191a8f 1270 reloc = xmalloc (sizeof (arelent));
adde6300 1271
dc191a8f 1272 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
adde6300
AM
1273 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1274
1275 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1276 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1277 if (reloc->howto == (reloc_howto_type *) NULL)
1278 {
1279 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1280 _("reloc %d not supported by object file format"),
1281 (int) fixp->fx_r_type);
adde6300
AM
1282 return NULL;
1283 }
1284
1285 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1286 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1287 reloc->address = fixp->fx_offset;
1288
1289 reloc->addend = fixp->fx_offset;
1290
1291 return reloc;
1292}
1293
adde6300 1294void
dc191a8f 1295md_assemble (char *str)
adde6300 1296{
c6a7ab1f 1297 struct avr_opcodes_s *opcode;
adde6300
AM
1298 char op[11];
1299
c6a7ab1f 1300 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1301
1302 if (!op[0])
00d2865b 1303 as_bad (_("can't find opcode "));
adde6300
AM
1304
1305 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1306
1307 if (opcode == NULL)
1308 {
00d2865b 1309 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1310 return;
1311 }
1312
b170af93 1313 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1314 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1315
1188e082
DC
1316 if (*str && *opcode->constraints == '?')
1317 ++opcode;
b170af93 1318
00d2865b
NC
1319 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1320 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1321
1322 /* We used to set input_line_pointer to the result of get_operands,
1323 but that is wrong. Our caller assumes we don't change it. */
1324 {
1325 char *t = input_line_pointer;
dc191a8f 1326
adde6300 1327 avr_operands (opcode, &str);
b170af93 1328 if (*skip_space (str))
00d2865b 1329 as_bad (_("garbage at end of line"));
adde6300
AM
1330 input_line_pointer = t;
1331 }
1332}
1333
adde6300 1334/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1335 `avr_cons_fix_new'. */
adde6300
AM
1336static int exp_mod_pm = 0;
1337
1338/* Parse special CONS expression: pm (expression)
28c9d252
NC
1339 or alternatively: gs (expression).
1340 These are used for addressing program memory.
c6a7ab1f
NC
1341 Relocation: BFD_RELOC_AVR_16_PM. */
1342
adde6300 1343void
dc191a8f 1344avr_parse_cons_expression (expressionS *exp, int nbytes)
adde6300 1345{
c6a7ab1f 1346 char *tmp;
adde6300
AM
1347
1348 exp_mod_pm = 0;
1349
1350 tmp = input_line_pointer = skip_space (input_line_pointer);
1351
1352 if (nbytes == 2)
1353 {
28c9d252
NC
1354 char *pm_name1 = "pm";
1355 char *pm_name2 = "gs";
1356 int len = strlen (pm_name1);
1357 /* len must be the same for both pm identifiers. */
1dab94dd 1358
28c9d252
NC
1359 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1360 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
adde6300
AM
1361 {
1362 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1363
adde6300
AM
1364 if (*input_line_pointer == '(')
1365 {
1366 input_line_pointer = skip_space (input_line_pointer + 1);
1367 exp_mod_pm = 1;
1368 expression (exp);
1dab94dd 1369
adde6300
AM
1370 if (*input_line_pointer == ')')
1371 ++input_line_pointer;
1372 else
1373 {
00d2865b 1374 as_bad (_("`)' required"));
adde6300
AM
1375 exp_mod_pm = 0;
1376 }
1dab94dd 1377
adde6300
AM
1378 return;
1379 }
1dab94dd 1380
adde6300
AM
1381 input_line_pointer = tmp;
1382 }
1383 }
1dab94dd 1384
adde6300
AM
1385 expression (exp);
1386}
1387
1388void
dc191a8f
NC
1389avr_cons_fix_new (fragS *frag,
1390 int where,
1391 int nbytes,
1392 expressionS *exp)
adde6300
AM
1393{
1394 if (exp_mod_pm == 0)
1395 {
1396 if (nbytes == 2)
b34976b6 1397 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
adde6300 1398 else if (nbytes == 4)
b34976b6 1399 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
adde6300 1400 else
00d2865b 1401 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
adde6300
AM
1402 }
1403 else
1404 {
1405 if (nbytes == 2)
b34976b6 1406 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
adde6300 1407 else
00d2865b 1408 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
adde6300
AM
1409 exp_mod_pm = 0;
1410 }
1411}
This page took 0.421561 seconds and 4 git commands to generate.