Commit | Line | Data |
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3bcbcc3d | 1 | /* tc-cris.c -- Assembler code for the CRIS CPU core. |
08caf3f8 | 2 | Copyright 2000, 2001 Free Software Foundation, Inc. |
3bcbcc3d HPN |
3 | |
4 | Contributed by Axis Communications AB, Lund, Sweden. | |
5 | Originally written for GAS 1.38.1 by Mikael Asker. | |
08caf3f8 | 6 | Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson. |
3bcbcc3d HPN |
7 | |
8 | This file is part of GAS, the GNU Assembler. | |
9 | ||
10 | GAS is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2, or (at your option) | |
13 | any later version. | |
14 | ||
15 | GAS is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with GAS; see the file COPYING. If not, write to the | |
22 | Free Software Foundation, 59 Temple Place - Suite 330, Boston, | |
47926f60 | 23 | MA 02111-1307, USA. */ |
3bcbcc3d HPN |
24 | |
25 | #include <stdio.h> | |
26 | #include <ctype.h> | |
27 | #include "as.h" | |
28 | #include "subsegs.h" | |
29 | #include "opcode/cris.h" | |
fcdc20a4 | 30 | #include "dwarf2dbg.h" |
3bcbcc3d HPN |
31 | |
32 | /* Conventions used here: | |
33 | Generally speaking, pointers to binutils types such as "fragS" and | |
34 | "expressionS" get parameter and variable names ending in "P", such as | |
35 | "fragP", to harmonize with the rest of the binutils code. Other | |
36 | pointers get a "p" suffix, such as "bufp". Any function or type-name | |
37 | that could clash with a current or future binutils or GAS function get | |
38 | a "cris_" prefix. */ | |
39 | ||
7b15d668 HPN |
40 | #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix" |
41 | #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix" | |
42 | #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore" | |
43 | #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore" | |
44 | #define REGISTER_PREFIX_CHAR '$' | |
45 | ||
08caf3f8 HPN |
46 | /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in |
47 | line_separator_chars for CRIS, so we avoid it. */ | |
48 | #define PIC_SUFFIX_CHAR ':' | |
49 | ||
3bcbcc3d HPN |
50 | /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only. |
51 | Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */ | |
52 | enum cris_insn_kind | |
53 | { | |
54 | CRIS_INSN_NORMAL, CRIS_INSN_NONE, CRIS_INSN_BRANCH | |
55 | }; | |
56 | ||
57 | /* An instruction will have one of these prefixes. | |
58 | Although the same bit-pattern, we handle BDAP with an immediate | |
59 | expression (eventually quick or [pc+]) different from when we only have | |
60 | register expressions. */ | |
61 | enum prefix_kind | |
62 | { | |
63 | PREFIX_NONE, PREFIX_BDAP_IMM, PREFIX_BDAP, PREFIX_BIAP, PREFIX_DIP, | |
64 | PREFIX_PUSH | |
65 | }; | |
66 | ||
67 | /* The prefix for an instruction. */ | |
68 | struct cris_prefix | |
69 | { | |
47926f60 KH |
70 | enum prefix_kind kind; |
71 | int base_reg_number; | |
72 | unsigned int opcode; | |
3bcbcc3d HPN |
73 | |
74 | /* There might be an expression to be evaluated, like I in [rN+I]. */ | |
47926f60 | 75 | expressionS expr; |
3bcbcc3d HPN |
76 | |
77 | /* If there's an expression, we might need a relocation. Here's the | |
78 | type of what relocation to start relaxaton with. | |
79 | The relocation is assumed to start immediately after the prefix insn, | |
80 | so we don't provide an offset. */ | |
81 | enum bfd_reloc_code_real reloc; | |
82 | }; | |
83 | ||
47926f60 | 84 | /* The description of the instruction being assembled. */ |
3bcbcc3d HPN |
85 | struct cris_instruction |
86 | { | |
87 | /* If CRIS_INSN_NONE, then this insn is of zero length. */ | |
47926f60 | 88 | enum cris_insn_kind insn_type; |
3bcbcc3d HPN |
89 | |
90 | /* If a special register was mentioned, this is its description, else | |
47926f60 | 91 | it is NULL. */ |
3bcbcc3d HPN |
92 | const struct cris_spec_reg *spec_reg; |
93 | ||
47926f60 | 94 | unsigned int opcode; |
3bcbcc3d HPN |
95 | |
96 | /* An insn may have at most one expression; theoretically there could be | |
47926f60 KH |
97 | another in its prefix (but I don't see how that could happen). */ |
98 | expressionS expr; | |
3bcbcc3d HPN |
99 | |
100 | /* The expression might need a relocation. Here's one to start | |
101 | relaxation with. */ | |
47926f60 | 102 | enum bfd_reloc_code_real reloc; |
3bcbcc3d | 103 | |
08caf3f8 | 104 | /* The size in bytes of an immediate expression, or zero if |
3bcbcc3d | 105 | nonapplicable. */ |
47926f60 | 106 | int imm_oprnd_size; |
3bcbcc3d HPN |
107 | }; |
108 | ||
109 | static void cris_process_instruction PARAMS ((char *, | |
110 | struct cris_instruction *, | |
111 | struct cris_prefix *)); | |
112 | static int get_bwd_size_modifier PARAMS ((char **, int *)); | |
113 | static int get_bw_size_modifier PARAMS ((char **, int *)); | |
114 | static int get_gen_reg PARAMS ((char **, int *)); | |
115 | static int get_spec_reg PARAMS ((char **, | |
116 | const struct cris_spec_reg **)); | |
117 | static int get_autoinc_prefix_or_indir_op PARAMS ((char **, | |
118 | struct cris_prefix *, | |
119 | int *, int *, int *, | |
120 | expressionS *)); | |
121 | static int get_3op_or_dip_prefix_op PARAMS ((char **, | |
122 | struct cris_prefix *)); | |
123 | static int cris_get_expression PARAMS ((char **, expressionS *)); | |
124 | static int get_flags PARAMS ((char **, int *)); | |
125 | static void gen_bdap PARAMS ((int, expressionS *)); | |
126 | static int branch_disp PARAMS ((int)); | |
127 | static void gen_cond_branch_32 PARAMS ((char *, char *, fragS *, | |
128 | symbolS *, symbolS *, long int)); | |
08caf3f8 | 129 | static void cris_number_to_imm PARAMS ((char *, long, int, fixS *, segT)); |
3bcbcc3d HPN |
130 | static void cris_create_short_jump PARAMS ((char *, addressT, addressT, |
131 | fragS *, symbolS *)); | |
7b15d668 | 132 | static void s_syntax PARAMS ((int)); |
fcdc20a4 HPN |
133 | static void s_cris_file PARAMS ((int)); |
134 | static void s_cris_loc PARAMS ((int)); | |
7b15d668 | 135 | |
08caf3f8 HPN |
136 | /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */ |
137 | static void cris_get_pic_suffix PARAMS ((char **, | |
138 | bfd_reloc_code_real_type *, | |
139 | expressionS *)); | |
140 | static unsigned int cris_get_pic_reloc_size | |
141 | PARAMS ((bfd_reloc_code_real_type)); | |
142 | ||
7b15d668 HPN |
143 | /* All the .syntax functions. */ |
144 | static void cris_force_reg_prefix PARAMS ((void)); | |
145 | static void cris_relax_reg_prefix PARAMS ((void)); | |
146 | static void cris_sym_leading_underscore PARAMS ((void)); | |
147 | static void cris_sym_no_leading_underscore PARAMS ((void)); | |
ed67db7a | 148 | static char *cris_insn_first_word_frag PARAMS ((void)); |
7b15d668 | 149 | |
3bcbcc3d HPN |
150 | /* Handle to the opcode hash table. */ |
151 | static struct hash_control *op_hash = NULL; | |
152 | ||
7b15d668 HPN |
153 | /* Whether we demand that registers have a `$' prefix. Default here. */ |
154 | static boolean demand_register_prefix = false; | |
155 | ||
156 | /* Whether global user symbols have a leading underscore. Default here. */ | |
157 | static boolean symbols_have_leading_underscore = true; | |
158 | ||
08caf3f8 HPN |
159 | /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */ |
160 | static boolean pic = false; | |
161 | ||
3bcbcc3d HPN |
162 | const pseudo_typeS md_pseudo_table[] = |
163 | { | |
164 | {"dword", cons, 4}, | |
7b15d668 | 165 | {"syntax", s_syntax, 0}, |
fcdc20a4 HPN |
166 | {"file", s_cris_file, 0}, |
167 | {"loc", s_cris_loc, 0}, | |
3bcbcc3d HPN |
168 | {NULL, 0, 0} |
169 | }; | |
170 | ||
171 | static int warn_for_branch_expansion = 0; | |
172 | ||
173 | const char cris_comment_chars[] = ";"; | |
174 | ||
175 | /* This array holds the chars that only start a comment at the beginning of | |
176 | a line. If the line seems to have the form '# 123 filename' | |
47926f60 | 177 | .line and .file directives will appear in the pre-processed output. */ |
3bcbcc3d HPN |
178 | /* Note that input_file.c hand-checks for '#' at the beginning of the |
179 | first line of the input file. This is because the compiler outputs | |
47926f60 KH |
180 | #NO_APP at the beginning of its output. */ |
181 | /* Also note that slash-star will always start a comment. */ | |
3bcbcc3d HPN |
182 | const char line_comment_chars[] = "#"; |
183 | const char line_separator_chars[] = "@"; | |
184 | ||
185 | /* Now all floating point support is shut off. See md_atof. */ | |
186 | const char EXP_CHARS[] = ""; | |
187 | const char FLT_CHARS[] = ""; | |
188 | ||
3bcbcc3d HPN |
189 | /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as: |
190 | 2 1 0 | |
191 | ---/ /--+-----------------+-----------------+-----------------+ | |
192 | | what state ? | how long ? | | |
193 | ---/ /--+-----------------+-----------------+-----------------+ | |
194 | ||
195 | The "how long" bits are 00 = byte, 01 = word, 10 = dword (long). | |
196 | This is a Un*x convention. | |
197 | Not all lengths are legit for a given value of (what state). | |
198 | ||
199 | Groups for CRIS address relaxing: | |
200 | ||
201 | 1. Bcc | |
202 | length: byte, word, 10-byte expansion | |
203 | ||
204 | 2. BDAP | |
47926f60 | 205 | length: byte, word, dword */ |
3bcbcc3d HPN |
206 | |
207 | #define STATE_CONDITIONAL_BRANCH (1) | |
208 | #define STATE_BASE_PLUS_DISP_PREFIX (2) | |
209 | ||
210 | #define STATE_LENGTH_MASK (3) | |
211 | #define STATE_BYTE (0) | |
212 | #define STATE_WORD (1) | |
213 | #define STATE_DWORD (2) | |
214 | /* Symbol undefined. */ | |
215 | #define STATE_UNDF (3) | |
216 | #define STATE_MAX_LENGTH (3) | |
217 | ||
3bcbcc3d HPN |
218 | /* These displacements are relative to the adress following the opcode |
219 | word of the instruction. The first letter is Byte, Word. The 2nd | |
220 | letter is Forward, Backward. */ | |
221 | ||
222 | #define BRANCH_BF ( 254) | |
223 | #define BRANCH_BB (-256) | |
47926f60 KH |
224 | #define BRANCH_WF (2 + 32767) |
225 | #define BRANCH_WB (2 + -32768) | |
3bcbcc3d HPN |
226 | |
227 | #define BDAP_BF ( 127) | |
228 | #define BDAP_BB (-128) | |
229 | #define BDAP_WF ( 32767) | |
230 | #define BDAP_WB (-32768) | |
231 | ||
232 | #define ENCODE_RELAX(what, length) (((what) << 2) + (length)) | |
233 | ||
234 | const relax_typeS md_cris_relax_table[] = | |
235 | { | |
236 | /* Error sentinel (0, 0). */ | |
237 | {1, 1, 0, 0}, | |
238 | ||
239 | /* Unused (0, 1). */ | |
240 | {1, 1, 0, 0}, | |
241 | ||
242 | /* Unused (0, 2). */ | |
243 | {1, 1, 0, 0}, | |
244 | ||
245 | /* Unused (0, 3). */ | |
246 | {1, 1, 0, 0}, | |
247 | ||
248 | /* Bcc o (1, 0). */ | |
249 | {BRANCH_BF, BRANCH_BB, 0, ENCODE_RELAX (1, 1)}, | |
250 | ||
47926f60 | 251 | /* Bcc [PC+] (1, 1). */ |
3bcbcc3d HPN |
252 | {BRANCH_WF, BRANCH_WB, 2, ENCODE_RELAX (1, 2)}, |
253 | ||
254 | /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default) | |
255 | (1, 2). */ | |
256 | {0, 0, 10, 0}, | |
257 | ||
258 | /* Unused (1, 3). */ | |
259 | {1, 1, 0, 0}, | |
260 | ||
261 | /* BDAP o (2, 0). */ | |
262 | {BDAP_BF, BDAP_BB, 0, ENCODE_RELAX (2, 1)}, | |
263 | ||
264 | /* BDAP.[bw] [PC+] (2, 1). */ | |
265 | {BDAP_WF, BDAP_WB, 2, ENCODE_RELAX (2, 2)}, | |
266 | ||
267 | /* BDAP.d [PC+] (2, 2). */ | |
268 | {0, 0, 4, 0} | |
269 | }; | |
270 | ||
271 | #undef BRANCH_BF | |
272 | #undef BRANCH_BB | |
273 | #undef BRANCH_WF | |
274 | #undef BRANCH_WB | |
275 | #undef BDAP_BF | |
276 | #undef BDAP_BB | |
277 | #undef BDAP_WF | |
278 | #undef BDAP_WB | |
279 | ||
3bcbcc3d HPN |
280 | /* Target-specific multicharacter options, not const-declared at usage |
281 | in 2.9.1 and CVS of 2000-02-16. */ | |
282 | struct option md_longopts[] = | |
283 | { | |
7b15d668 HPN |
284 | #define OPTION_NO_US (OPTION_MD_BASE + 0) |
285 | {"no-underscore", no_argument, NULL, OPTION_NO_US}, | |
286 | #define OPTION_US (OPTION_MD_BASE + 1) | |
287 | {"underscore", no_argument, NULL, OPTION_US}, | |
08caf3f8 HPN |
288 | #define OPTION_PIC (OPTION_MD_BASE + 2) |
289 | {"pic", no_argument, NULL, OPTION_PIC}, | |
3bcbcc3d HPN |
290 | {NULL, no_argument, NULL, 0} |
291 | }; | |
292 | ||
293 | /* Not const-declared at usage in 2.9.1. */ | |
294 | size_t md_longopts_size = sizeof (md_longopts); | |
295 | const char *md_shortopts = "hHN"; | |
296 | ||
3bcbcc3d HPN |
297 | /* At first glance, this may seems wrong and should be 4 (ba + nop); but |
298 | since a short_jump must skip a *number* of long jumps, it must also be | |
299 | a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop" | |
300 | for the delay slot and hope that the jump table at most needs | |
301 | 32767/4=8191 long-jumps. A branch is better than a jump, since it is | |
302 | relative; we will not have a reloc to fix up somewhere. | |
303 | ||
304 | Note that we can't add relocs, because relaxation uses these fixed | |
305 | numbers, and md_create_short_jump is called after relaxation. */ | |
306 | ||
307 | const int md_short_jump_size = 6; | |
308 | const int md_long_jump_size = 6; | |
309 | ||
7b15d668 | 310 | /* Report output format. Small changes in output format (like elf |
08caf3f8 HPN |
311 | variants below) can happen until all options are parsed, but after |
312 | that, the output format must remain fixed. */ | |
47926f60 | 313 | |
3bcbcc3d HPN |
314 | const char * |
315 | cris_target_format () | |
316 | { | |
317 | switch (OUTPUT_FLAVOR) | |
318 | { | |
319 | case bfd_target_aout_flavour: | |
320 | return "a.out-cris"; | |
321 | ||
322 | case bfd_target_elf_flavour: | |
7b15d668 HPN |
323 | if (symbols_have_leading_underscore) |
324 | return "elf32-us-cris"; | |
3bcbcc3d HPN |
325 | return "elf32-cris"; |
326 | ||
327 | default: | |
328 | abort (); | |
329 | return NULL; | |
330 | } | |
331 | } | |
332 | ||
333 | /* Prepare machine-dependent frags for relaxation. | |
334 | ||
335 | Called just before relaxation starts. Any symbol that is now undefined | |
336 | will not become defined. | |
337 | ||
338 | Return the correct fr_subtype in the frag. | |
339 | ||
340 | Return the initial "guess for fr_var" to caller. The guess for fr_var | |
341 | is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix | |
342 | or fr_var contributes to our returned value. | |
343 | ||
344 | Although it may not be explicit in the frag, pretend | |
47926f60 | 345 | fr_var starts with a value. */ |
3bcbcc3d HPN |
346 | |
347 | int | |
348 | md_estimate_size_before_relax (fragP, segment_type) | |
349 | fragS *fragP; | |
350 | /* The segment is either N_DATA or N_TEXT. */ | |
47926f60 | 351 | segT segment_type; |
3bcbcc3d | 352 | { |
47926f60 | 353 | int old_fr_fix; |
3bcbcc3d HPN |
354 | |
355 | old_fr_fix = fragP->fr_fix; | |
356 | ||
357 | switch (fragP->fr_subtype) | |
358 | { | |
359 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF): | |
360 | if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
c335d394 HPN |
361 | /* The symbol lies in the same segment - a relaxable case. */ |
362 | fragP->fr_subtype | |
363 | = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE); | |
3bcbcc3d | 364 | else |
c335d394 HPN |
365 | /* Unknown or not the same segment, so not relaxable. */ |
366 | fragP->fr_subtype | |
367 | = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD); | |
368 | fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length; | |
3bcbcc3d HPN |
369 | break; |
370 | ||
371 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF): | |
372 | /* Note that we can not do anything sane with relaxing | |
373 | [rX + a_known_symbol_in_text], it will have to be a 32-bit | |
374 | value. | |
375 | ||
376 | We could play tricks with managing a constant pool and make | |
08caf3f8 HPN |
377 | a_known_symbol_in_text a "bdap [pc + offset]" pointing there |
378 | (like the GOT for ELF shared libraries), but that's no use, it | |
379 | would in general be no shorter or faster code, only more | |
380 | complicated. */ | |
3bcbcc3d HPN |
381 | |
382 | if (S_GET_SEGMENT (fragP->fr_symbol) != absolute_section) | |
383 | { | |
384 | /* Go for dword if not absolute or same segment. */ | |
385 | fragP->fr_subtype | |
386 | = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD); | |
c335d394 | 387 | fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length; |
3bcbcc3d HPN |
388 | } |
389 | else | |
390 | { | |
391 | /* Absolute expression. */ | |
392 | long int value; | |
393 | value = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; | |
394 | ||
395 | if (value >= -128 && value <= 127) | |
396 | { | |
397 | /* Byte displacement. */ | |
398 | (fragP->fr_opcode)[0] = value; | |
399 | } | |
400 | else | |
401 | { | |
402 | /* Word or dword displacement. */ | |
403 | int pow2_of_size = 1; | |
404 | char *writep; | |
405 | ||
406 | if (value < -32768 || value > 32767) | |
407 | { | |
408 | /* Outside word range, make it a dword. */ | |
409 | pow2_of_size = 2; | |
410 | } | |
411 | ||
412 | /* Modify the byte-offset BDAP into a word or dword offset | |
413 | BDAP. Or really, a BDAP rX,8bit into a | |
07e90ad5 | 414 | BDAP.[wd] rX,[PC+] followed by a word or dword. */ |
3bcbcc3d HPN |
415 | (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16; |
416 | ||
417 | /* Keep the register number in the highest four bits. */ | |
418 | (fragP->fr_opcode)[1] &= 0xF0; | |
419 | (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH; | |
420 | ||
47926f60 | 421 | /* It grew by two or four bytes. */ |
3bcbcc3d HPN |
422 | fragP->fr_fix += 1 << pow2_of_size; |
423 | writep = fragP->fr_literal + old_fr_fix; | |
424 | md_number_to_chars (writep, value, 1 << pow2_of_size); | |
425 | } | |
426 | frag_wane (fragP); | |
427 | } | |
428 | break; | |
429 | ||
c335d394 HPN |
430 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): |
431 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): | |
432 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD): | |
433 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE): | |
434 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD): | |
93c2a809 AM |
435 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD): |
436 | /* When relaxing a section for the second time, we don't need to | |
c335d394 HPN |
437 | do anything except making sure that fr_var is set right. */ |
438 | fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length; | |
93c2a809 AM |
439 | break; |
440 | ||
3bcbcc3d HPN |
441 | default: |
442 | BAD_CASE (fragP->fr_subtype); | |
443 | } | |
444 | ||
445 | return fragP->fr_var + (fragP->fr_fix - old_fr_fix); | |
446 | } | |
447 | ||
3bcbcc3d HPN |
448 | /* Perform post-processing of machine-dependent frags after relaxation. |
449 | Called after relaxation is finished. | |
450 | In: Address of frag. | |
451 | fr_type == rs_machine_dependent. | |
452 | fr_subtype is what the address relaxed to. | |
453 | ||
454 | Out: Any fixS:s and constants are set up. | |
455 | ||
456 | The caller will turn the frag into a ".space 0". */ | |
457 | ||
458 | void | |
459 | md_convert_frag (abfd, sec, fragP) | |
460 | bfd *abfd ATTRIBUTE_UNUSED; | |
461 | segT sec ATTRIBUTE_UNUSED; | |
462 | fragS *fragP; | |
463 | { | |
47926f60 | 464 | /* Pointer to first byte in variable-sized part of the frag. */ |
3bcbcc3d HPN |
465 | char *var_partp; |
466 | ||
467 | /* Pointer to first opcode byte in frag. */ | |
468 | char *opcodep; | |
469 | ||
470 | /* Used to check integrity of the relaxation. | |
471 | One of 2 = long, 1 = word, or 0 = byte. */ | |
472 | int length_code; | |
473 | ||
474 | /* Size in bytes of variable-sized part of frag. */ | |
475 | int var_part_size = 0; | |
476 | ||
477 | /* This is part of *fragP. It contains all information about addresses | |
478 | and offsets to varying parts. */ | |
479 | symbolS *symbolP; | |
480 | unsigned long var_part_offset; | |
481 | ||
482 | /* Where, in file space, is _var of *fragP? */ | |
483 | unsigned long address_of_var_part = 0; | |
484 | ||
485 | /* Where, in file space, does addr point? */ | |
486 | unsigned long target_address; | |
487 | ||
488 | know (fragP->fr_type == rs_machine_dependent); | |
489 | ||
490 | length_code = fragP->fr_subtype & STATE_LENGTH_MASK; | |
491 | know (length_code >= 0 && length_code < STATE_MAX_LENGTH); | |
492 | ||
493 | var_part_offset = fragP->fr_fix; | |
494 | var_partp = fragP->fr_literal + var_part_offset; | |
495 | opcodep = fragP->fr_opcode; | |
496 | ||
497 | symbolP = fragP->fr_symbol; | |
498 | target_address | |
499 | = (symbolP | |
500 | ? S_GET_VALUE (symbolP) + symbol_get_frag(fragP->fr_symbol)->fr_address | |
501 | : 0 ) + fragP->fr_offset; | |
502 | address_of_var_part = fragP->fr_address + var_part_offset; | |
503 | ||
504 | switch (fragP->fr_subtype) | |
47926f60 KH |
505 | { |
506 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): | |
507 | opcodep[0] = branch_disp ((target_address - address_of_var_part)); | |
508 | var_part_size = 0; | |
509 | break; | |
3bcbcc3d | 510 | |
47926f60 KH |
511 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): |
512 | /* We had a quick immediate branch, now turn it into a word one i.e. a | |
513 | PC autoincrement. */ | |
514 | opcodep[0] = BRANCH_PC_LOW; | |
515 | opcodep[1] &= 0xF0; | |
516 | opcodep[1] |= BRANCH_INCR_HIGH; | |
517 | md_number_to_chars (var_partp, | |
518 | (long) (target_address - (address_of_var_part + 2)), | |
519 | 2); | |
520 | var_part_size = 2; | |
521 | break; | |
522 | ||
523 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD): | |
524 | gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP, | |
525 | fragP->fr_symbol, (symbolS *) NULL, | |
526 | fragP->fr_offset); | |
527 | /* Ten bytes added: a branch, nop and a jump. */ | |
528 | var_part_size = 2 + 2 + 4 + 2; | |
529 | break; | |
3bcbcc3d | 530 | |
47926f60 KH |
531 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE): |
532 | var_partp[0] = target_address - (address_of_var_part + 1); | |
533 | var_part_size = 0; | |
534 | break; | |
535 | ||
536 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD): | |
537 | /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit | |
538 | one that uses PC autoincrement. */ | |
539 | opcodep[0] = BDAP_PC_LOW + (1 << 4); | |
540 | opcodep[1] &= 0xF0; | |
541 | opcodep[1] |= BDAP_INCR_HIGH; | |
542 | md_number_to_chars (var_partp, (long) (target_address), 2); | |
543 | var_part_size = 2; | |
544 | break; | |
545 | ||
546 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD): | |
547 | /* We had a BDAP 16-bit "word", change the offset to a dword. */ | |
548 | opcodep[0] = BDAP_PC_LOW + (2 << 4); | |
549 | opcodep[1] &= 0xF0; | |
550 | opcodep[1] |= BDAP_INCR_HIGH; | |
551 | if (fragP->fr_symbol == NULL) | |
552 | md_number_to_chars (var_partp, fragP->fr_offset, 4); | |
553 | else | |
554 | fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol, | |
555 | fragP->fr_offset, 0, BFD_RELOC_32); | |
556 | var_part_size = 4; | |
557 | break; | |
558 | ||
559 | default: | |
560 | BAD_CASE (fragP->fr_subtype); | |
561 | break; | |
562 | } | |
563 | ||
564 | fragP->fr_fix += var_part_size; | |
3bcbcc3d HPN |
565 | } |
566 | ||
567 | /* Generate a short jump around a secondary jump table. | |
568 | Used by md_create_long_jump. | |
569 | ||
570 | This used to be md_create_short_jump, but is now called from | |
571 | md_create_long_jump instead, when sufficient. | |
572 | since the sizes of the jumps are the same. It used to be brittle, | |
47926f60 | 573 | making possibilities for creating bad code. */ |
3bcbcc3d HPN |
574 | |
575 | static void | |
576 | cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol) | |
577 | char *storep; | |
578 | addressT from_addr; | |
579 | addressT to_addr; | |
580 | fragS *fragP ATTRIBUTE_UNUSED; | |
581 | symbolS *to_symbol ATTRIBUTE_UNUSED; | |
582 | { | |
583 | long int distance; | |
584 | ||
585 | distance = to_addr - from_addr; | |
586 | ||
587 | if (-254 <= distance && distance <= 256) | |
588 | { | |
589 | /* Create a "short" short jump: "BA distance - 2". */ | |
47926f60 | 590 | storep[0] = branch_disp (distance - 2); |
3bcbcc3d HPN |
591 | storep[1] = BA_QUICK_HIGH; |
592 | ||
593 | /* A nop for the delay slot. */ | |
47926f60 | 594 | md_number_to_chars (storep + 2, NOP_OPCODE, 2); |
3bcbcc3d HPN |
595 | |
596 | /* The extra word should be filled with something sane too. Make it | |
597 | a nop to keep disassembly sane. */ | |
47926f60 | 598 | md_number_to_chars (storep + 4, NOP_OPCODE, 2); |
3bcbcc3d HPN |
599 | } |
600 | else | |
601 | { | |
602 | /* Make it a "long" short jump: "BA (PC+)". */ | |
603 | md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2); | |
604 | ||
47926f60 | 605 | /* ".WORD distance - 4". */ |
3bcbcc3d HPN |
606 | md_number_to_chars (storep + 2, (long) (distance - 4), 2); |
607 | ||
608 | /* A nop for the delay slot. */ | |
47926f60 | 609 | md_number_to_chars (storep + 4, NOP_OPCODE, 2); |
3bcbcc3d HPN |
610 | } |
611 | } | |
612 | ||
3bcbcc3d HPN |
613 | /* Generate a long jump in a secondary jump table. |
614 | ||
615 | storep Where to store the jump instruction. | |
616 | from_addr Address of the jump instruction. | |
617 | to_addr Destination address of the jump. | |
618 | fragP Which frag the destination address operand | |
619 | lies in. | |
620 | to_symbol Destination symbol. */ | |
621 | ||
622 | void | |
623 | md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol) | |
624 | char *storep; | |
625 | addressT from_addr; | |
626 | addressT to_addr; | |
627 | fragS *fragP; | |
628 | symbolS *to_symbol; | |
629 | { | |
630 | long int distance; | |
631 | ||
632 | distance = to_addr - from_addr; | |
633 | ||
634 | if (-32763 <= distance && distance <= 32772) | |
635 | { | |
636 | /* Then make it a "short" long jump. */ | |
637 | cris_create_short_jump (storep, from_addr, to_addr, fragP, | |
638 | to_symbol); | |
639 | } | |
640 | else | |
641 | { | |
08caf3f8 HPN |
642 | /* We have a "long" long jump: "JUMP [PC+]". |
643 | Make it an "ADD [PC+],PC" if we're supposed to emit PIC code. */ | |
644 | md_number_to_chars (storep, | |
645 | pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2); | |
3bcbcc3d | 646 | |
08caf3f8 | 647 | /* Follow with a ".DWORD to_addr", PC-relative for PIC. */ |
3bcbcc3d | 648 | fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol, |
08caf3f8 | 649 | 0, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32); |
3bcbcc3d HPN |
650 | } |
651 | } | |
652 | ||
ed67db7a HPN |
653 | /* Allocate space for the first piece of an insn, and mark it as the |
654 | start of the insn for debug-format use. */ | |
655 | ||
656 | static char * | |
657 | cris_insn_first_word_frag () | |
658 | { | |
659 | char *insnp = frag_more (2); | |
660 | ||
661 | /* We need to mark the start of the insn by passing dwarf2_emit_insn | |
662 | the offset from the current fragment position. This must be done | |
663 | after the first fragment is created but before any other fragments | |
664 | (fixed or varying) are created. Note that the offset only | |
665 | corresponds to the "size" of the insn for a fixed-size, | |
666 | non-expanded insn. */ | |
667 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
668 | dwarf2_emit_insn (2); | |
669 | ||
670 | return insnp; | |
671 | } | |
672 | ||
3bcbcc3d | 673 | /* Port-specific assembler initialization. */ |
47926f60 | 674 | |
3bcbcc3d HPN |
675 | void |
676 | md_begin () | |
677 | { | |
678 | const char *hashret = NULL; | |
679 | int i = 0; | |
680 | ||
47926f60 | 681 | /* Set up a hash table for the instructions. */ |
3bcbcc3d HPN |
682 | op_hash = hash_new (); |
683 | if (op_hash == NULL) | |
684 | as_fatal (_("Virtual memory exhausted")); | |
685 | ||
686 | while (cris_opcodes[i].name != NULL) | |
687 | { | |
688 | const char *name = cris_opcodes[i].name; | |
689 | hashret = hash_insert (op_hash, name, (PTR) &cris_opcodes[i]); | |
690 | ||
691 | if (hashret != NULL && *hashret != '\0') | |
692 | as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name, | |
47926f60 | 693 | *hashret == 0 ? _("(unknown reason)") : hashret); |
3bcbcc3d HPN |
694 | do |
695 | { | |
696 | if (cris_opcodes[i].match & cris_opcodes[i].lose) | |
697 | as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes[i].name, | |
698 | cris_opcodes[i].args); | |
699 | ||
700 | ++i; | |
47926f60 KH |
701 | } |
702 | while (cris_opcodes[i].name != NULL | |
703 | && strcmp (cris_opcodes[i].name, name) == 0); | |
3bcbcc3d HPN |
704 | } |
705 | } | |
706 | ||
3bcbcc3d | 707 | /* Assemble a source line. */ |
47926f60 | 708 | |
3bcbcc3d HPN |
709 | void |
710 | md_assemble (str) | |
711 | char *str; | |
712 | { | |
713 | struct cris_instruction output_instruction; | |
714 | struct cris_prefix prefix; | |
715 | char *opcodep; | |
716 | char *p; | |
717 | ||
718 | know (str); | |
719 | ||
720 | /* Do the low-level grunt - assemble to bits and split up into a prefix | |
721 | and ordinary insn. */ | |
722 | cris_process_instruction (str, &output_instruction, &prefix); | |
723 | ||
724 | /* Handle any prefixes to the instruction. */ | |
725 | switch (prefix.kind) | |
726 | { | |
727 | case PREFIX_NONE: | |
728 | break; | |
729 | ||
730 | /* When the expression is unknown for a BDAP, it can need 0, 2 or 4 | |
731 | extra bytes, so we handle it separately. */ | |
732 | case PREFIX_BDAP_IMM: | |
08caf3f8 HPN |
733 | /* We only do it if the relocation is unspecified, i.e. not a PIC |
734 | relocation. */ | |
735 | if (prefix.reloc == BFD_RELOC_NONE) | |
736 | { | |
737 | gen_bdap (prefix.base_reg_number, &prefix.expr); | |
738 | break; | |
739 | } | |
740 | /* Fall through. */ | |
3bcbcc3d HPN |
741 | case PREFIX_BDAP: |
742 | case PREFIX_BIAP: | |
743 | case PREFIX_DIP: | |
ed67db7a | 744 | opcodep = cris_insn_first_word_frag (); |
3bcbcc3d HPN |
745 | |
746 | /* Output the prefix opcode. */ | |
747 | md_number_to_chars (opcodep, (long) prefix.opcode, 2); | |
748 | ||
08caf3f8 HPN |
749 | /* Having a specified reloc only happens for DIP and for BDAP with |
750 | PIC operands, but it is ok to drop through here for the other | |
751 | prefixes as they can have no relocs specified. */ | |
3bcbcc3d HPN |
752 | if (prefix.reloc != BFD_RELOC_NONE) |
753 | { | |
08caf3f8 HPN |
754 | unsigned int relocsize |
755 | = (prefix.kind == PREFIX_DIP | |
756 | ? 4 : cris_get_pic_reloc_size (prefix.reloc)); | |
757 | ||
08caf3f8 HPN |
758 | p = frag_more (relocsize); |
759 | fix_new_exp (frag_now, (p - frag_now->fr_literal), relocsize, | |
3bcbcc3d HPN |
760 | &prefix.expr, 0, prefix.reloc); |
761 | } | |
762 | break; | |
763 | ||
764 | case PREFIX_PUSH: | |
ed67db7a | 765 | opcodep = cris_insn_first_word_frag (); |
3bcbcc3d HPN |
766 | |
767 | /* Output the prefix opcode. Being a "push", we add the negative | |
768 | size of the register to "sp". */ | |
769 | if (output_instruction.spec_reg != NULL) | |
770 | { | |
47926f60 | 771 | /* Special register. */ |
3bcbcc3d HPN |
772 | opcodep[0] = -output_instruction.spec_reg->reg_size; |
773 | } | |
774 | else | |
775 | { | |
47926f60 | 776 | /* General register. */ |
3bcbcc3d HPN |
777 | opcodep[0] = -4; |
778 | } | |
779 | opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8); | |
780 | break; | |
781 | ||
782 | default: | |
783 | BAD_CASE (prefix.kind); | |
784 | } | |
785 | ||
786 | /* If we only had a prefix insn, we're done. */ | |
787 | if (output_instruction.insn_type == CRIS_INSN_NONE) | |
788 | return; | |
789 | ||
790 | /* Done with the prefix. Continue with the main instruction. */ | |
ed67db7a HPN |
791 | if (prefix.kind == PREFIX_NONE) |
792 | opcodep = cris_insn_first_word_frag (); | |
793 | else | |
794 | opcodep = frag_more (2); | |
3bcbcc3d HPN |
795 | |
796 | /* Output the instruction opcode. */ | |
47926f60 | 797 | md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2); |
3bcbcc3d HPN |
798 | |
799 | /* Output the symbol-dependent instruction stuff. */ | |
800 | if (output_instruction.insn_type == CRIS_INSN_BRANCH) | |
801 | { | |
802 | segT to_seg = absolute_section; | |
803 | int is_undefined = 0; | |
804 | int length_code; | |
805 | ||
806 | if (output_instruction.expr.X_op != O_constant) | |
807 | { | |
808 | to_seg = S_GET_SEGMENT (output_instruction.expr.X_add_symbol); | |
809 | ||
810 | if (to_seg == undefined_section) | |
811 | is_undefined = 1; | |
812 | } | |
813 | ||
814 | if (output_instruction.expr.X_op == O_constant | |
815 | || to_seg == now_seg || is_undefined) | |
816 | { | |
08caf3f8 HPN |
817 | /* Handle complex expressions. */ |
818 | valueT addvalue | |
819 | = (output_instruction.expr.X_op_symbol != NULL | |
820 | ? 0 : output_instruction.expr.X_add_number); | |
821 | symbolS *sym | |
822 | = (output_instruction.expr.X_op_symbol != NULL | |
823 | ? make_expr_symbol (&output_instruction.expr) | |
824 | : output_instruction.expr.X_add_symbol); | |
825 | ||
3bcbcc3d | 826 | /* If is_undefined, then the expression may BECOME now_seg. */ |
47926f60 | 827 | length_code = is_undefined ? STATE_UNDF : STATE_BYTE; |
3bcbcc3d HPN |
828 | |
829 | /* Make room for max ten bytes of variable length. */ | |
830 | frag_var (rs_machine_dependent, 10, 0, | |
831 | ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code), | |
08caf3f8 | 832 | sym, addvalue, opcodep); |
3bcbcc3d HPN |
833 | } |
834 | else | |
835 | { | |
836 | /* We have: to_seg != now_seg && to_seg != undefined_section. | |
837 | This means it is a branch to a known symbol in another | |
838 | section. Code in data? Weird but valid. Emit a 32-bit | |
839 | branch. */ | |
08caf3f8 HPN |
840 | char *cond_jump = frag_more (10); |
841 | ||
08caf3f8 | 842 | gen_cond_branch_32 (opcodep, cond_jump, frag_now, |
3bcbcc3d | 843 | output_instruction.expr.X_add_symbol, |
47926f60 | 844 | (symbolS *) NULL, |
3bcbcc3d HPN |
845 | output_instruction.expr.X_add_number); |
846 | } | |
847 | } | |
848 | else | |
849 | { | |
850 | if (output_instruction.imm_oprnd_size > 0) | |
851 | { | |
852 | /* The intruction has an immediate operand. */ | |
08caf3f8 | 853 | enum bfd_reloc_code_real reloc = BFD_RELOC_NONE; |
3bcbcc3d HPN |
854 | |
855 | switch (output_instruction.imm_oprnd_size) | |
856 | { | |
857 | /* Any byte-size immediate constants are treated as | |
858 | word-size. FIXME: Thus overflow check does not work | |
859 | correctly. */ | |
860 | ||
861 | case 2: | |
08caf3f8 HPN |
862 | /* Note that size-check for the explicit reloc has already |
863 | been done when we get here. */ | |
864 | if (output_instruction.reloc != BFD_RELOC_NONE) | |
865 | reloc = output_instruction.reloc; | |
866 | else | |
867 | reloc = BFD_RELOC_16; | |
3bcbcc3d HPN |
868 | break; |
869 | ||
870 | case 4: | |
08caf3f8 HPN |
871 | /* Allow a relocation specified in the operand. */ |
872 | if (output_instruction.reloc != BFD_RELOC_NONE) | |
873 | reloc = output_instruction.reloc; | |
874 | else | |
875 | reloc = BFD_RELOC_32; | |
3bcbcc3d HPN |
876 | break; |
877 | ||
878 | default: | |
879 | BAD_CASE (output_instruction.imm_oprnd_size); | |
880 | } | |
881 | ||
882 | p = frag_more (output_instruction.imm_oprnd_size); | |
883 | fix_new_exp (frag_now, (p - frag_now->fr_literal), | |
884 | output_instruction.imm_oprnd_size, | |
885 | &output_instruction.expr, 0, reloc); | |
886 | } | |
887 | else if (output_instruction.reloc != BFD_RELOC_NONE) | |
888 | { | |
889 | /* An immediate operand that has a relocation and needs to be | |
47926f60 | 890 | processed further. */ |
3bcbcc3d HPN |
891 | |
892 | /* It is important to use fix_new_exp here and everywhere else | |
893 | (and not fix_new), as fix_new_exp can handle "difference | |
894 | expressions" - where the expression contains a difference of | |
895 | two symbols in the same segment. */ | |
896 | fix_new_exp (frag_now, (opcodep - frag_now->fr_literal), 2, | |
897 | &output_instruction.expr, 0, | |
898 | output_instruction.reloc); | |
899 | } | |
900 | } | |
901 | } | |
902 | ||
3bcbcc3d | 903 | /* Low level text-to-bits assembly. */ |
47926f60 | 904 | |
3bcbcc3d HPN |
905 | static void |
906 | cris_process_instruction (insn_text, out_insnp, prefixp) | |
907 | char *insn_text; | |
47926f60 | 908 | struct cris_instruction *out_insnp; |
3bcbcc3d HPN |
909 | struct cris_prefix *prefixp; |
910 | { | |
47926f60 KH |
911 | char *s; |
912 | char modified_char = 0; | |
913 | const char *args; | |
3bcbcc3d | 914 | struct cris_opcode *instruction; |
47926f60 KH |
915 | char *operands; |
916 | int match = 0; | |
917 | int mode; | |
918 | int regno; | |
919 | int size_bits; | |
3bcbcc3d HPN |
920 | |
921 | /* Reset these fields to a harmless state in case we need to return in | |
922 | error. */ | |
923 | prefixp->kind = PREFIX_NONE; | |
924 | prefixp->reloc = BFD_RELOC_NONE; | |
925 | out_insnp->insn_type = CRIS_INSN_NORMAL; | |
926 | out_insnp->imm_oprnd_size = 0; | |
927 | ||
928 | /* Find the end of the opcode mnemonic. We assume (true in 2.9.1) | |
929 | that the caller has translated the opcode to lower-case, up to the | |
47926f60 KH |
930 | first non-letter. */ |
931 | for (operands = insn_text; islower (*operands); ++operands) | |
3bcbcc3d HPN |
932 | ; |
933 | ||
934 | /* Terminate the opcode after letters, but save the character there if | |
935 | it was of significance. */ | |
936 | switch (*operands) | |
937 | { | |
938 | case '\0': | |
939 | break; | |
940 | ||
941 | case '.': | |
47926f60 | 942 | /* Put back the modified character later. */ |
3bcbcc3d | 943 | modified_char = *operands; |
47926f60 | 944 | /* Fall through. */ |
3bcbcc3d HPN |
945 | |
946 | case ' ': | |
47926f60 KH |
947 | /* Consume the character after the mnemonic |
948 | and replace it with '\0'. */ | |
3bcbcc3d HPN |
949 | *operands++ = '\0'; |
950 | break; | |
951 | ||
952 | default: | |
953 | as_bad (_("Unknown opcode: `%s'"), insn_text); | |
954 | return; | |
955 | } | |
956 | ||
957 | /* Find the instruction. */ | |
958 | instruction = (struct cris_opcode *) hash_find (op_hash, insn_text); | |
959 | if (instruction == NULL) | |
960 | { | |
961 | as_bad (_("Unknown opcode: `%s'"), insn_text); | |
962 | return; | |
963 | } | |
964 | ||
965 | /* Put back the modified character. */ | |
966 | switch (modified_char) | |
967 | { | |
968 | case 0: | |
969 | break; | |
970 | ||
971 | default: | |
972 | *--operands = modified_char; | |
973 | } | |
974 | ||
3bcbcc3d | 975 | /* Try to match an opcode table slot. */ |
47926f60 | 976 | for (s = operands;;) |
3bcbcc3d | 977 | { |
47926f60 | 978 | int imm_expr_found; |
3bcbcc3d HPN |
979 | |
980 | /* Initialize *prefixp, perhaps after being modified for a | |
47926f60 | 981 | "near match". */ |
3bcbcc3d HPN |
982 | prefixp->kind = PREFIX_NONE; |
983 | prefixp->reloc = BFD_RELOC_NONE; | |
984 | ||
985 | /* Initialize *out_insnp. */ | |
986 | memset (out_insnp, 0, sizeof (*out_insnp)); | |
987 | out_insnp->opcode = instruction->match; | |
988 | out_insnp->reloc = BFD_RELOC_NONE; | |
989 | out_insnp->insn_type = CRIS_INSN_NORMAL; | |
990 | out_insnp->imm_oprnd_size = 0; | |
991 | ||
992 | imm_expr_found = 0; | |
993 | ||
994 | /* Build the opcode, checking as we go to make sure that the | |
995 | operands match. */ | |
47926f60 | 996 | for (args = instruction->args;; ++args) |
3bcbcc3d HPN |
997 | { |
998 | switch (*args) | |
999 | { | |
1000 | case '\0': | |
1001 | /* If we've come to the end of arguments, we're done. */ | |
1002 | if (*s == '\0') | |
1003 | match = 1; | |
1004 | break; | |
1005 | ||
1006 | case '!': | |
1007 | /* Non-matcher character for disassembly. | |
1008 | Ignore it here. */ | |
1009 | continue; | |
1010 | ||
1011 | case ',': | |
1012 | case ' ': | |
1013 | /* These must match exactly. */ | |
1014 | if (*s++ == *args) | |
1015 | continue; | |
1016 | break; | |
1017 | ||
1018 | case 'B': | |
1019 | /* This is not really an operand, but causes a "BDAP | |
47926f60 | 1020 | -size,SP" prefix to be output, for PUSH instructions. */ |
3bcbcc3d HPN |
1021 | prefixp->kind = PREFIX_PUSH; |
1022 | continue; | |
1023 | ||
1024 | case 'b': | |
1025 | /* This letter marks an operand that should not be matched | |
1026 | in the assembler. It is a branch with 16-bit | |
1027 | displacement. The assembler will create them from the | |
1028 | 8-bit flavor when necessary. The assembler does not | |
1029 | support the [rN+] operand, as the [r15+] that is | |
1030 | generated for 16-bit displacements. */ | |
1031 | break; | |
1032 | ||
1033 | case 'c': | |
1034 | /* A 5-bit unsigned immediate in bits <4:0>. */ | |
1035 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1036 | break; | |
1037 | else | |
1038 | { | |
1039 | if (out_insnp->expr.X_op == O_constant | |
1040 | && (out_insnp->expr.X_add_number < 0 | |
1041 | || out_insnp->expr.X_add_number > 31)) | |
1042 | as_bad (_("Immediate value not in 5 bit unsigned range: %ld"), | |
1043 | out_insnp->expr.X_add_number); | |
1044 | ||
1045 | out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_5; | |
1046 | continue; | |
1047 | } | |
1048 | ||
1049 | case 'C': | |
1050 | /* A 4-bit unsigned immediate in bits <3:0>. */ | |
1051 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1052 | break; | |
1053 | else | |
1054 | { | |
1055 | if (out_insnp->expr.X_op == O_constant | |
1056 | && (out_insnp->expr.X_add_number < 0 | |
1057 | || out_insnp->expr.X_add_number > 15)) | |
1058 | as_bad (_("Immediate value not in 4 bit unsigned range: %ld"), | |
1059 | out_insnp->expr.X_add_number); | |
1060 | ||
1061 | out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_4; | |
1062 | continue; | |
1063 | } | |
1064 | ||
1065 | case 'D': | |
1066 | /* General register in bits <15:12> and <3:0>. */ | |
1067 | if (! get_gen_reg (&s, ®no)) | |
1068 | break; | |
1069 | else | |
1070 | { | |
1071 | out_insnp->opcode |= regno /* << 0 */; | |
1072 | out_insnp->opcode |= regno << 12; | |
1073 | continue; | |
1074 | } | |
1075 | ||
1076 | case 'f': | |
1077 | /* Flags from the condition code register. */ | |
1078 | { | |
1079 | int flags = 0; | |
1080 | ||
1081 | if (! get_flags (&s, &flags)) | |
1082 | break; | |
1083 | ||
47926f60 | 1084 | out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf); |
3bcbcc3d HPN |
1085 | continue; |
1086 | } | |
1087 | ||
1088 | case 'i': | |
1089 | /* A 6-bit signed immediate in bits <5:0>. */ | |
1090 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1091 | break; | |
1092 | else | |
1093 | { | |
1094 | if (out_insnp->expr.X_op == O_constant | |
1095 | && (out_insnp->expr.X_add_number < -32 | |
1096 | || out_insnp->expr.X_add_number > 31)) | |
1097 | as_bad (_("Immediate value not in 6 bit range: %ld"), | |
1098 | out_insnp->expr.X_add_number); | |
1099 | out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_6; | |
1100 | continue; | |
1101 | } | |
1102 | ||
1103 | case 'I': | |
1104 | /* A 6-bit unsigned immediate in bits <5:0>. */ | |
1105 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1106 | break; | |
1107 | else | |
1108 | { | |
1109 | if (out_insnp->expr.X_op == O_constant | |
1110 | && (out_insnp->expr.X_add_number < 0 | |
1111 | || out_insnp->expr.X_add_number > 63)) | |
1112 | as_bad (_("Immediate value not in 6 bit unsigned range: %ld"), | |
1113 | out_insnp->expr.X_add_number); | |
1114 | out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_6; | |
1115 | continue; | |
1116 | } | |
1117 | ||
1118 | case 'M': | |
1119 | /* A size modifier, B, W or D, to be put in a bit position | |
1120 | suitable for CLEAR instructions (i.e. reflecting a zero | |
1121 | register). */ | |
1122 | if (! get_bwd_size_modifier (&s, &size_bits)) | |
1123 | break; | |
1124 | else | |
1125 | { | |
1126 | switch (size_bits) | |
1127 | { | |
1128 | case 0: | |
1129 | out_insnp->opcode |= 0 << 12; | |
1130 | break; | |
1131 | ||
1132 | case 1: | |
1133 | out_insnp->opcode |= 4 << 12; | |
1134 | break; | |
1135 | ||
1136 | case 2: | |
1137 | out_insnp->opcode |= 8 << 12; | |
1138 | break; | |
1139 | } | |
1140 | continue; | |
1141 | } | |
1142 | ||
1143 | case 'm': | |
1144 | /* A size modifier, B, W or D, to be put in bits <5:4>. */ | |
1145 | if (! get_bwd_size_modifier (&s, &size_bits)) | |
1146 | break; | |
1147 | else | |
1148 | { | |
1149 | out_insnp->opcode |= size_bits << 4; | |
1150 | continue; | |
1151 | } | |
1152 | ||
1153 | case 'o': | |
1154 | /* A branch expression. */ | |
1155 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1156 | break; | |
1157 | else | |
1158 | { | |
1159 | out_insnp->insn_type = CRIS_INSN_BRANCH; | |
1160 | continue; | |
1161 | } | |
1162 | ||
1163 | case 'O': | |
1164 | /* A BDAP expression for any size, "expr,r". */ | |
1165 | if (! cris_get_expression (&s, &prefixp->expr)) | |
1166 | break; | |
1167 | else | |
1168 | { | |
1169 | if (*s != ',') | |
1170 | break; | |
1171 | ||
1172 | s++; | |
1173 | ||
1174 | if (!get_gen_reg (&s, &prefixp->base_reg_number)) | |
1175 | break; | |
1176 | ||
1177 | /* Since 'O' is used with an explicit bdap, we have no | |
47926f60 | 1178 | "real" instruction. */ |
3bcbcc3d | 1179 | prefixp->kind = PREFIX_BDAP_IMM; |
08caf3f8 HPN |
1180 | prefixp->opcode |
1181 | = BDAP_QUICK_OPCODE | (prefixp->base_reg_number << 12); | |
1182 | ||
3bcbcc3d HPN |
1183 | out_insnp->insn_type = CRIS_INSN_NONE; |
1184 | continue; | |
1185 | } | |
1186 | ||
1187 | case 'P': | |
1188 | /* Special register in bits <15:12>. */ | |
1189 | if (! get_spec_reg (&s, &out_insnp->spec_reg)) | |
1190 | break; | |
1191 | else | |
1192 | { | |
1193 | /* Use of some special register names come with a | |
1194 | specific warning. Note that we have no ".cpu type" | |
1195 | pseudo yet, so some of this is just unused | |
1196 | framework. */ | |
1197 | if (out_insnp->spec_reg->warning) | |
1198 | as_warn (out_insnp->spec_reg->warning); | |
1199 | else if (out_insnp->spec_reg->applicable_version | |
1200 | == cris_ver_warning) | |
1201 | /* Others have a generic warning. */ | |
1202 | as_warn (_("Unimplemented register `%s' specified"), | |
1203 | out_insnp->spec_reg->name); | |
1204 | ||
1205 | out_insnp->opcode | |
1206 | |= out_insnp->spec_reg->number << 12; | |
1207 | continue; | |
1208 | } | |
1209 | ||
1210 | case 'p': | |
1211 | /* This character is used in the disassembler to | |
1212 | recognize a prefix instruction to fold into the | |
1213 | addressing mode for the next instruction. It is | |
47926f60 | 1214 | ignored here. */ |
3bcbcc3d HPN |
1215 | continue; |
1216 | ||
1217 | case 'R': | |
1218 | /* General register in bits <15:12>. */ | |
1219 | if (! get_gen_reg (&s, ®no)) | |
1220 | break; | |
1221 | else | |
1222 | { | |
1223 | out_insnp->opcode |= regno << 12; | |
1224 | continue; | |
1225 | } | |
1226 | ||
1227 | case 'r': | |
1228 | /* General register in bits <3:0>. */ | |
1229 | if (! get_gen_reg (&s, ®no)) | |
1230 | break; | |
1231 | else | |
1232 | { | |
1233 | out_insnp->opcode |= regno /* << 0 */; | |
1234 | continue; | |
1235 | } | |
1236 | ||
1237 | case 'S': | |
1238 | /* Source operand in bit <10> and a prefix; a 3-operand | |
1239 | prefix. */ | |
1240 | if (! get_3op_or_dip_prefix_op (&s, prefixp)) | |
1241 | break; | |
1242 | else | |
1243 | continue; | |
1244 | ||
1245 | case 's': | |
1246 | /* Source operand in bits <10>, <3:0> and optionally a | |
1247 | prefix; i.e. an indirect operand or an side-effect | |
1248 | prefix. */ | |
1249 | if (! get_autoinc_prefix_or_indir_op (&s, prefixp, &mode, | |
1250 | ®no, | |
1251 | &imm_expr_found, | |
1252 | &out_insnp->expr)) | |
1253 | break; | |
1254 | else | |
1255 | { | |
1256 | if (prefixp->kind != PREFIX_NONE) | |
1257 | { | |
1258 | /* A prefix, so it has the autoincrement bit | |
1259 | set. */ | |
1260 | out_insnp->opcode |= (AUTOINCR_BIT << 8); | |
1261 | } | |
1262 | else | |
08caf3f8 HPN |
1263 | { |
1264 | /* No prefix. The "mode" variable contains bits like | |
1265 | whether or not this is autoincrement mode. */ | |
1266 | out_insnp->opcode |= (mode << 10); | |
1267 | ||
1268 | /* If there was a PIC reloc specifier, then it was | |
1269 | attached to the prefix. Note that we can't check | |
1270 | that the reloc size matches, since we don't have | |
1271 | all the operands yet in all cases. */ | |
1272 | if (prefixp->reloc != BFD_RELOC_NONE) | |
1273 | out_insnp->reloc = prefixp->reloc; | |
1274 | } | |
3bcbcc3d HPN |
1275 | |
1276 | out_insnp->opcode |= regno /* << 0 */ ; | |
1277 | continue; | |
1278 | } | |
1279 | ||
1280 | case 'x': | |
1281 | /* Rs.m in bits <15:12> and <5:4>. */ | |
1282 | if (! get_gen_reg (&s, ®no) | |
1283 | || ! get_bwd_size_modifier (&s, &size_bits)) | |
1284 | break; | |
1285 | else | |
1286 | { | |
47926f60 | 1287 | out_insnp->opcode |= (regno << 12) | (size_bits << 4); |
3bcbcc3d HPN |
1288 | continue; |
1289 | } | |
1290 | ||
1291 | case 'y': | |
1292 | /* Source operand in bits <10>, <3:0> and optionally a | |
1293 | prefix; i.e. an indirect operand or an side-effect | |
1294 | prefix. | |
1295 | ||
1296 | The difference to 's' is that this does not allow an | |
81d4177b | 1297 | "immediate" expression. */ |
3bcbcc3d HPN |
1298 | if (! get_autoinc_prefix_or_indir_op (&s, prefixp, |
1299 | &mode, ®no, | |
1300 | &imm_expr_found, | |
1301 | &out_insnp->expr) | |
1302 | || imm_expr_found) | |
1303 | break; | |
1304 | else | |
1305 | { | |
1306 | if (prefixp->kind != PREFIX_NONE) | |
1307 | { | |
1308 | /* A prefix, and those matched here always have | |
1309 | side-effects (see 's' case). */ | |
1310 | out_insnp->opcode |= (AUTOINCR_BIT << 8); | |
1311 | } | |
1312 | else | |
1313 | { | |
1314 | /* No prefix. The "mode" variable contains bits | |
1315 | like whether or not this is autoincrement | |
1316 | mode. */ | |
1317 | out_insnp->opcode |= (mode << 10); | |
1318 | } | |
1319 | ||
1320 | out_insnp->opcode |= regno /* << 0 */; | |
1321 | continue; | |
1322 | } | |
1323 | ||
1324 | case 'z': | |
1325 | /* Size modifier (B or W) in bit <4>. */ | |
1326 | if (! get_bw_size_modifier (&s, &size_bits)) | |
1327 | break; | |
1328 | else | |
1329 | { | |
1330 | out_insnp->opcode |= size_bits << 4; | |
1331 | continue; | |
1332 | } | |
1333 | ||
1334 | default: | |
1335 | BAD_CASE (*args); | |
1336 | } | |
1337 | ||
1338 | /* We get here when we fail a match above or we found a | |
1339 | complete match. Break out of this loop. */ | |
1340 | break; | |
1341 | } | |
1342 | ||
1343 | /* Was it a match or a miss? */ | |
1344 | if (match == 0) | |
1345 | { | |
1346 | /* If it's just that the args don't match, maybe the next | |
1347 | item in the table is the same opcode but with | |
1348 | matching operands. */ | |
1349 | if (instruction[1].name != NULL | |
1350 | && ! strcmp (instruction->name, instruction[1].name)) | |
1351 | { | |
1352 | /* Yep. Restart and try that one instead. */ | |
1353 | ++instruction; | |
1354 | s = operands; | |
1355 | continue; | |
1356 | } | |
1357 | else | |
1358 | { | |
1359 | /* We've come to the end of instructions with this | |
1360 | opcode, so it must be an error. */ | |
1361 | as_bad (_("Illegal operands")); | |
1362 | return; | |
1363 | } | |
1364 | } | |
1365 | else | |
1366 | { | |
1367 | /* We have a match. Check if there's anything more to do. */ | |
1368 | if (imm_expr_found) | |
1369 | { | |
1370 | /* There was an immediate mode operand, so we must check | |
1371 | that it has an appropriate size. */ | |
3bcbcc3d HPN |
1372 | switch (instruction->imm_oprnd_size) |
1373 | { | |
1374 | default: | |
1375 | case SIZE_NONE: | |
1376 | /* Shouldn't happen; this one does not have immediate | |
1377 | operands with different sizes. */ | |
1378 | BAD_CASE (instruction->imm_oprnd_size); | |
1379 | break; | |
1380 | ||
1381 | case SIZE_FIX_32: | |
1382 | out_insnp->imm_oprnd_size = 4; | |
1383 | break; | |
1384 | ||
1385 | case SIZE_SPEC_REG: | |
1386 | switch (out_insnp->spec_reg->reg_size) | |
1387 | { | |
1388 | case 1: | |
1389 | if (out_insnp->expr.X_op == O_constant | |
1390 | && (out_insnp->expr.X_add_number < -128 | |
1391 | || out_insnp->expr.X_add_number > 255)) | |
1392 | as_bad (_("Immediate value not in 8 bit range: %ld"), | |
1393 | out_insnp->expr.X_add_number); | |
47926f60 | 1394 | /* Fall through. */ |
3bcbcc3d HPN |
1395 | case 2: |
1396 | /* FIXME: We need an indicator in the instruction | |
1397 | table to pass on, to indicate if we need to check | |
1398 | overflow for a signed or unsigned number. */ | |
1399 | if (out_insnp->expr.X_op == O_constant | |
1400 | && (out_insnp->expr.X_add_number < -32768 | |
1401 | || out_insnp->expr.X_add_number > 65535)) | |
1402 | as_bad (_("Immediate value not in 16 bit range: %ld"), | |
1403 | out_insnp->expr.X_add_number); | |
1404 | out_insnp->imm_oprnd_size = 2; | |
1405 | break; | |
1406 | ||
1407 | case 4: | |
1408 | out_insnp->imm_oprnd_size = 4; | |
1409 | break; | |
1410 | ||
1411 | default: | |
1412 | BAD_CASE (out_insnp->spec_reg->reg_size); | |
1413 | } | |
1414 | break; | |
1415 | ||
1416 | case SIZE_FIELD: | |
1417 | switch (size_bits) | |
1418 | { | |
1419 | case 0: | |
1420 | if (out_insnp->expr.X_op == O_constant | |
1421 | && (out_insnp->expr.X_add_number < -128 | |
1422 | || out_insnp->expr.X_add_number > 255)) | |
1423 | as_bad (_("Immediate value not in 8 bit range: %ld"), | |
1424 | out_insnp->expr.X_add_number); | |
47926f60 | 1425 | /* Fall through. */ |
3bcbcc3d HPN |
1426 | case 1: |
1427 | if (out_insnp->expr.X_op == O_constant | |
1428 | && (out_insnp->expr.X_add_number < -32768 | |
1429 | || out_insnp->expr.X_add_number > 65535)) | |
1430 | as_bad (_("Immediate value not in 16 bit range: %ld"), | |
1431 | out_insnp->expr.X_add_number); | |
1432 | out_insnp->imm_oprnd_size = 2; | |
1433 | break; | |
1434 | ||
1435 | case 2: | |
1436 | out_insnp->imm_oprnd_size = 4; | |
1437 | break; | |
1438 | ||
1439 | default: | |
1440 | BAD_CASE (out_insnp->spec_reg->reg_size); | |
1441 | } | |
1442 | } | |
08caf3f8 HPN |
1443 | |
1444 | /* If there was a relocation specified for the immediate | |
1445 | expression (i.e. it had a PIC modifier) check that the | |
1446 | size of the PIC relocation matches the size specified by | |
1447 | the opcode. */ | |
1448 | if (out_insnp->reloc != BFD_RELOC_NONE | |
1449 | && (cris_get_pic_reloc_size (out_insnp->reloc) | |
1450 | != (unsigned int) out_insnp->imm_oprnd_size)) | |
1451 | as_bad (_("PIC relocation size does not match operand size")); | |
3bcbcc3d HPN |
1452 | } |
1453 | } | |
1454 | break; | |
1455 | } | |
1456 | } | |
1457 | ||
3bcbcc3d HPN |
1458 | /* Get a B, W, or D size modifier from the string pointed out by *cPP, |
1459 | which must point to a '.' in front of the modifier. On successful | |
1460 | return, *cPP is advanced to the character following the size | |
1461 | modifier, and is undefined otherwise. | |
1462 | ||
1463 | cPP Pointer to pointer to string starting | |
1464 | with the size modifier. | |
1465 | ||
1466 | size_bitsp Pointer to variable to contain the size bits on | |
1467 | successful return. | |
1468 | ||
1469 | Return 1 iff a correct size modifier is found, else 0. */ | |
1470 | ||
1471 | static int | |
1472 | get_bwd_size_modifier (cPP, size_bitsp) | |
1473 | char **cPP; | |
1474 | int *size_bitsp; | |
1475 | { | |
1476 | if (**cPP != '.') | |
1477 | return 0; | |
1478 | else | |
1479 | { | |
47926f60 | 1480 | /* Consume the '.'. */ |
3bcbcc3d HPN |
1481 | (*cPP)++; |
1482 | ||
1483 | switch (**cPP) | |
1484 | { | |
1485 | case 'B': | |
1486 | case 'b': | |
1487 | *size_bitsp = 0; | |
1488 | break; | |
1489 | ||
1490 | case 'W': | |
1491 | case 'w': | |
1492 | *size_bitsp = 1; | |
1493 | break; | |
1494 | ||
1495 | case 'D': | |
1496 | case 'd': | |
1497 | *size_bitsp = 2; | |
1498 | break; | |
1499 | ||
1500 | default: | |
1501 | return 0; | |
1502 | } | |
1503 | ||
1504 | /* Consume the size letter. */ | |
1505 | (*cPP)++; | |
1506 | return 1; | |
1507 | } | |
1508 | } | |
1509 | ||
3bcbcc3d HPN |
1510 | /* Get a B or W size modifier from the string pointed out by *cPP, |
1511 | which must point to a '.' in front of the modifier. On successful | |
1512 | return, *cPP is advanced to the character following the size | |
1513 | modifier, and is undefined otherwise. | |
1514 | ||
1515 | cPP Pointer to pointer to string starting | |
1516 | with the size modifier. | |
1517 | ||
1518 | size_bitsp Pointer to variable to contain the size bits on | |
1519 | successful return. | |
1520 | ||
1521 | Return 1 iff a correct size modifier is found, else 0. */ | |
1522 | ||
1523 | static int | |
1524 | get_bw_size_modifier (cPP, size_bitsp) | |
1525 | char **cPP; | |
1526 | int *size_bitsp; | |
1527 | { | |
1528 | if (**cPP != '.') | |
1529 | return 0; | |
1530 | else | |
1531 | { | |
47926f60 | 1532 | /* Consume the '.'. */ |
3bcbcc3d HPN |
1533 | (*cPP)++; |
1534 | ||
1535 | switch (**cPP) | |
1536 | { | |
1537 | case 'B': | |
1538 | case 'b': | |
1539 | *size_bitsp = 0; | |
1540 | break; | |
1541 | ||
1542 | case 'W': | |
1543 | case 'w': | |
1544 | *size_bitsp = 1; | |
1545 | break; | |
1546 | ||
1547 | default: | |
1548 | return 0; | |
1549 | } | |
1550 | ||
1551 | /* Consume the size letter. */ | |
1552 | (*cPP)++; | |
1553 | return 1; | |
1554 | } | |
1555 | } | |
1556 | ||
07e90ad5 | 1557 | /* Get a general register from the string pointed out by *cPP. The |
3bcbcc3d HPN |
1558 | variable *cPP is advanced to the character following the general |
1559 | register name on a successful return, and has its initial position | |
1560 | otherwise. | |
1561 | ||
1562 | cPP Pointer to pointer to string, beginning with a general | |
1563 | register name. | |
1564 | ||
1565 | regnop Pointer to int containing the register number. | |
1566 | ||
1567 | Return 1 iff a correct general register designator is found, | |
1568 | else 0. */ | |
1569 | ||
1570 | static int | |
1571 | get_gen_reg (cPP, regnop) | |
1572 | char **cPP; | |
1573 | int *regnop; | |
1574 | { | |
1575 | char *oldp; | |
1576 | oldp = *cPP; | |
1577 | ||
7b15d668 HPN |
1578 | /* Handle a sometimes-mandatory dollar sign as register prefix. */ |
1579 | if (**cPP == REGISTER_PREFIX_CHAR) | |
1580 | (*cPP)++; | |
1581 | else if (demand_register_prefix) | |
1582 | return 0; | |
1583 | ||
3bcbcc3d HPN |
1584 | switch (**cPP) |
1585 | { | |
1586 | case 'P': | |
1587 | case 'p': | |
1588 | /* "P" as in "PC"? Consume the "P". */ | |
1589 | (*cPP)++; | |
1590 | ||
1591 | if ((**cPP == 'C' || **cPP == 'c') | |
1592 | && ! isalnum ((*cPP)[1])) | |
1593 | { | |
1594 | /* It's "PC": consume the "c" and we're done. */ | |
1595 | (*cPP)++; | |
1596 | *regnop = REG_PC; | |
1597 | return 1; | |
1598 | } | |
1599 | break; | |
1600 | ||
1601 | case 'R': | |
1602 | case 'r': | |
47926f60 | 1603 | /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */ |
3bcbcc3d HPN |
1604 | (*cPP)++; |
1605 | ||
1606 | if (isdigit (**cPP)) | |
1607 | { | |
1608 | /* It's r[0-9]. Consume and check the next digit. */ | |
1609 | *regnop = **cPP - '0'; | |
1610 | (*cPP)++; | |
1611 | ||
1612 | if (! isalnum (**cPP)) | |
1613 | { | |
47926f60 | 1614 | /* No more digits, we're done. */ |
3bcbcc3d HPN |
1615 | return 1; |
1616 | } | |
1617 | else | |
1618 | { | |
1619 | /* One more digit. Consume and add. */ | |
47926f60 | 1620 | *regnop = *regnop * 10 + (**cPP - '0'); |
3bcbcc3d HPN |
1621 | |
1622 | /* We need to check for a valid register number; Rn, | |
1623 | 0 <= n <= MAX_REG. */ | |
1624 | if (*regnop <= MAX_REG) | |
1625 | { | |
1626 | /* Consume second digit. */ | |
1627 | (*cPP)++; | |
1628 | return 1; | |
1629 | } | |
1630 | } | |
1631 | } | |
1632 | break; | |
1633 | ||
1634 | case 'S': | |
1635 | case 's': | |
1636 | /* "S" as in "SP"? Consume the "S". */ | |
1637 | (*cPP)++; | |
1638 | if (**cPP == 'P' || **cPP == 'p') | |
1639 | { | |
1640 | /* It's "SP": consume the "p" and we're done. */ | |
1641 | (*cPP)++; | |
1642 | *regnop = REG_SP; | |
1643 | return 1; | |
1644 | } | |
1645 | break; | |
1646 | ||
1647 | default: | |
1648 | /* Just here to silence compilation warnings. */ | |
1649 | ; | |
1650 | } | |
1651 | ||
1652 | /* We get here if we fail. Restore the pointer. */ | |
1653 | *cPP = oldp; | |
1654 | return 0; | |
1655 | } | |
1656 | ||
3bcbcc3d HPN |
1657 | /* Get a special register from the string pointed out by *cPP. The |
1658 | variable *cPP is advanced to the character following the special | |
1659 | register name if one is found, and retains its original position | |
1660 | otherwise. | |
1661 | ||
1662 | cPP Pointer to pointer to string starting with a special register | |
1663 | name. | |
1664 | ||
1665 | sregpp Pointer to Pointer to struct spec_reg, where a pointer to the | |
1666 | register description will be stored. | |
1667 | ||
1668 | Return 1 iff a correct special register name is found. */ | |
1669 | ||
1670 | static int | |
1671 | get_spec_reg (cPP, sregpp) | |
1672 | char **cPP; | |
1673 | const struct cris_spec_reg **sregpp; | |
1674 | { | |
1675 | char *s1; | |
1676 | const char *s2; | |
7b15d668 | 1677 | char *name_begin = *cPP; |
3bcbcc3d HPN |
1678 | |
1679 | const struct cris_spec_reg *sregp; | |
1680 | ||
7b15d668 HPN |
1681 | /* Handle a sometimes-mandatory dollar sign as register prefix. */ |
1682 | if (*name_begin == REGISTER_PREFIX_CHAR) | |
1683 | name_begin++; | |
1684 | else if (demand_register_prefix) | |
1685 | return 0; | |
1686 | ||
3bcbcc3d | 1687 | /* Loop over all special registers. */ |
47926f60 | 1688 | for (sregp = cris_spec_regs; sregp->name != NULL; sregp++) |
3bcbcc3d | 1689 | { |
3bcbcc3d | 1690 | /* Start over from beginning of the supposed name. */ |
7b15d668 | 1691 | s1 = name_begin; |
3bcbcc3d HPN |
1692 | s2 = sregp->name; |
1693 | ||
1694 | while (*s2 != '\0' | |
1695 | && (isupper (*s1) ? tolower (*s1) == *s2 : *s1 == *s2)) | |
1696 | { | |
1697 | s1++; | |
1698 | s2++; | |
1699 | } | |
1700 | ||
1701 | /* For a match, we must have consumed the name in the table, and we | |
1702 | must be outside what could be part of a name. Assume here that a | |
47926f60 | 1703 | test for alphanumerics is sufficient for a name test. */ |
3bcbcc3d HPN |
1704 | if (*s2 == 0 && ! isalnum (*s1)) |
1705 | { | |
47926f60 | 1706 | /* We have a match. Update the pointer and be done. */ |
3bcbcc3d HPN |
1707 | *cPP = s1; |
1708 | *sregpp = sregp; | |
1709 | return 1; | |
1710 | } | |
1711 | } | |
1712 | ||
47926f60 | 1713 | /* If we got here, we did not find any name. */ |
3bcbcc3d HPN |
1714 | return 0; |
1715 | } | |
1716 | ||
3bcbcc3d HPN |
1717 | /* Get an unprefixed or side-effect-prefix operand from the string pointed |
1718 | out by *cPP. The pointer *cPP is advanced to the character following | |
1719 | the indirect operand if we have success, else it contains an undefined | |
1720 | value. | |
1721 | ||
1722 | cPP Pointer to pointer to string beginning with the first | |
1723 | character of the supposed operand. | |
1724 | ||
1725 | prefixp Pointer to structure containing an optional instruction | |
1726 | prefix. | |
1727 | ||
1728 | is_autoincp Pointer to int indicating the indirect or autoincrement | |
1729 | bits. | |
1730 | ||
1731 | src_regnop Pointer to int containing the source register number in | |
1732 | the instruction. | |
1733 | ||
1734 | imm_foundp Pointer to an int indicating if an immediate expression | |
1735 | is found. | |
1736 | ||
1737 | imm_exprP Pointer to a structure containing an immediate | |
1738 | expression, if success and if *imm_foundp is nonzero. | |
1739 | ||
1740 | Return 1 iff a correct indirect operand is found. */ | |
1741 | ||
1742 | static int | |
1743 | get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop, | |
1744 | imm_foundp, imm_exprP) | |
47926f60 KH |
1745 | char **cPP; |
1746 | struct cris_prefix *prefixp; | |
1747 | int *is_autoincp; | |
1748 | int *src_regnop; | |
1749 | int *imm_foundp; | |
1750 | expressionS *imm_exprP; | |
3bcbcc3d HPN |
1751 | { |
1752 | /* Assume there was no immediate mode expression. */ | |
1753 | *imm_foundp = 0; | |
1754 | ||
1755 | if (**cPP == '[') | |
1756 | { | |
1757 | /* So this operand is one of: | |
1758 | Indirect: [rN] | |
1759 | Autoincrement: [rN+] | |
1760 | Indexed with assign: [rN=rM+rO.S] | |
1761 | Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s] | |
1762 | ||
1763 | Either way, consume the '['. */ | |
1764 | (*cPP)++; | |
1765 | ||
1766 | /* Get the rN register. */ | |
1767 | if (! get_gen_reg (cPP, src_regnop)) | |
1768 | /* If there was no register, then this cannot match. */ | |
1769 | return 0; | |
1770 | else | |
1771 | { | |
1772 | /* We got the register, now check the next character. */ | |
1773 | switch (**cPP) | |
1774 | { | |
1775 | case ']': | |
1776 | /* Indirect mode. We're done here. */ | |
1777 | prefixp->kind = PREFIX_NONE; | |
1778 | *is_autoincp = 0; | |
1779 | break; | |
1780 | ||
1781 | case '+': | |
1782 | /* This must be an auto-increment mode, if there's a | |
1783 | match. */ | |
1784 | prefixp->kind = PREFIX_NONE; | |
1785 | *is_autoincp = 1; | |
1786 | ||
1787 | /* We consume this character and break out to check the | |
1788 | closing ']'. */ | |
1789 | (*cPP)++; | |
1790 | break; | |
1791 | ||
1792 | case '=': | |
1793 | /* This must be indexed with assign, or offset with assign | |
1794 | to match. */ | |
1795 | (*cPP)++; | |
1796 | ||
1797 | /* Either way, the next thing must be a register. */ | |
1798 | if (! get_gen_reg (cPP, &prefixp->base_reg_number)) | |
1799 | /* No register, no match. */ | |
1800 | return 0; | |
1801 | else | |
1802 | { | |
1803 | /* We've consumed "[rN=rM", so we must be looking at | |
1804 | "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or | |
1805 | "+[rO+].s]". */ | |
1806 | if (**cPP == '+') | |
1807 | { | |
1808 | int index_reg_number; | |
1809 | (*cPP)++; | |
1810 | ||
1811 | if (**cPP == '[') | |
1812 | { | |
1813 | int size_bits; | |
1814 | /* This must be [rx=ry+[rz].s] or | |
1815 | [rx=ry+[rz+].s] or no match. We must be | |
1816 | looking at rz after consuming the '['. */ | |
1817 | (*cPP)++; | |
1818 | ||
1819 | if (!get_gen_reg (cPP, &index_reg_number)) | |
1820 | return 0; | |
1821 | ||
1822 | prefixp->kind = PREFIX_BDAP; | |
1823 | prefixp->opcode | |
1824 | = (BDAP_INDIR_OPCODE | |
1825 | + (prefixp->base_reg_number << 12) | |
1826 | + index_reg_number); | |
1827 | ||
1828 | if (**cPP == '+') | |
1829 | { | |
1830 | /* We've seen "[rx=ry+[rz+" here, so now we | |
1831 | know that there must be "].s]" left to | |
1832 | check. */ | |
1833 | (*cPP)++; | |
1834 | prefixp->opcode |= AUTOINCR_BIT << 8; | |
1835 | } | |
1836 | ||
1837 | /* If it wasn't autoincrement, we don't need to | |
1838 | add anything. */ | |
1839 | ||
1840 | /* Check the next-to-last ']'. */ | |
1841 | if (**cPP != ']') | |
1842 | return 0; | |
1843 | ||
1844 | (*cPP)++; | |
1845 | ||
1846 | /* Check the ".s" modifier. */ | |
1847 | if (! get_bwd_size_modifier (cPP, &size_bits)) | |
1848 | return 0; | |
1849 | ||
1850 | prefixp->opcode |= size_bits << 4; | |
1851 | ||
1852 | /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s. | |
1853 | We break out to check the final ']'. */ | |
1854 | break; | |
1855 | } | |
ab3e48dc KH |
1856 | /* It wasn't an indirection. Check if it's a |
1857 | register. */ | |
1858 | else if (get_gen_reg (cPP, &index_reg_number)) | |
47926f60 KH |
1859 | { |
1860 | int size_bits; | |
1861 | ||
1862 | /* Indexed with assign mode: "[rN+rM.S]". */ | |
1863 | prefixp->kind = PREFIX_BIAP; | |
1864 | prefixp->opcode | |
1865 | = (BIAP_OPCODE + (index_reg_number << 12) | |
1866 | + prefixp->base_reg_number /* << 0 */); | |
1867 | ||
1868 | if (! get_bwd_size_modifier (cPP, &size_bits)) | |
1869 | /* Size missing, this isn't a match. */ | |
1870 | return 0; | |
1871 | else | |
3bcbcc3d | 1872 | { |
47926f60 | 1873 | /* Size found, break out to check the |
3bcbcc3d | 1874 | final ']'. */ |
47926f60 | 1875 | prefixp->opcode |= size_bits << 4; |
3bcbcc3d HPN |
1876 | break; |
1877 | } | |
47926f60 KH |
1878 | } |
1879 | /* Not a register. Then this must be "[rN+I]". */ | |
1880 | else if (cris_get_expression (cPP, &prefixp->expr)) | |
1881 | { | |
1882 | /* We've got offset with assign mode. Fill | |
1883 | in the blanks and break out to match the | |
1884 | final ']'. */ | |
1885 | prefixp->kind = PREFIX_BDAP_IMM; | |
08caf3f8 HPN |
1886 | |
1887 | /* We tentatively put an opcode corresponding to | |
1888 | a 32-bit operand here, although it may be | |
1889 | relaxed when there's no PIC specifier for the | |
1890 | operand. */ | |
1891 | prefixp->opcode | |
1892 | = (BDAP_INDIR_OPCODE | |
1893 | | (prefixp->base_reg_number << 12) | |
1894 | | (AUTOINCR_BIT << 8) | |
1895 | | (2 << 4) | |
1896 | | REG_PC /* << 0 */); | |
1897 | ||
1898 | /* This can have a PIC suffix, specifying reloc | |
1899 | type to use. */ | |
1900 | if (pic && **cPP == PIC_SUFFIX_CHAR) | |
1901 | { | |
1902 | unsigned int relocsize; | |
1903 | ||
1904 | cris_get_pic_suffix (cPP, &prefixp->reloc, | |
1905 | &prefixp->expr); | |
1906 | ||
1907 | /* Tweak the size of the immediate operand | |
1908 | in the prefix opcode if it isn't what we | |
1909 | set. */ | |
1910 | relocsize | |
1911 | = cris_get_pic_reloc_size (prefixp->reloc); | |
1912 | if (relocsize != 4) | |
1913 | prefixp->opcode | |
1914 | = ((prefixp->opcode & ~(3 << 4)) | |
1915 | | ((relocsize >> 1) << 4)); | |
1916 | } | |
47926f60 KH |
1917 | break; |
1918 | } | |
1919 | else | |
1920 | /* Neither register nor expression found, so | |
1921 | this can't be a match. */ | |
1922 | return 0; | |
3bcbcc3d | 1923 | } |
47926f60 | 1924 | /* Not "[rN+" but perhaps "[rN-"? */ |
ab3e48dc | 1925 | else if (**cPP == '-') |
47926f60 KH |
1926 | { |
1927 | /* We must have an offset with assign mode. */ | |
1928 | if (! cris_get_expression (cPP, &prefixp->expr)) | |
1929 | /* No expression, no match. */ | |
1930 | return 0; | |
1931 | else | |
1932 | { | |
1933 | /* We've got offset with assign mode. Fill | |
1934 | in the blanks and break out to match the | |
08caf3f8 HPN |
1935 | final ']'. |
1936 | ||
1937 | Note that we don't allow a PIC suffix for an | |
1938 | operand with a minus sign. */ | |
47926f60 KH |
1939 | prefixp->kind = PREFIX_BDAP_IMM; |
1940 | break; | |
1941 | } | |
1942 | } | |
1943 | else | |
1944 | /* Neither '+' nor '-' after "[rN=rM". Lose. */ | |
1945 | return 0; | |
3bcbcc3d HPN |
1946 | } |
1947 | default: | |
1948 | /* Neither ']' nor '+' nor '=' after "[rN". Lose. */ | |
1949 | return 0; | |
1950 | } | |
1951 | } | |
1952 | ||
1953 | /* When we get here, we have a match and will just check the closing | |
1954 | ']'. We can still fail though. */ | |
1955 | if (**cPP != ']') | |
1956 | return 0; | |
1957 | else | |
1958 | { | |
1959 | /* Don't forget to consume the final ']'. | |
1960 | Then return in glory. */ | |
1961 | (*cPP)++; | |
1962 | return 1; | |
1963 | } | |
1964 | } | |
47926f60 | 1965 | /* No indirection. Perhaps a constant? */ |
ab3e48dc | 1966 | else if (cris_get_expression (cPP, imm_exprP)) |
47926f60 KH |
1967 | { |
1968 | /* Expression found, this is immediate mode. */ | |
1969 | prefixp->kind = PREFIX_NONE; | |
1970 | *is_autoincp = 1; | |
1971 | *src_regnop = REG_PC; | |
1972 | *imm_foundp = 1; | |
08caf3f8 HPN |
1973 | |
1974 | /* This can have a PIC suffix, specifying reloc type to use. The | |
1975 | caller must check that the reloc size matches the operand size. */ | |
1976 | if (pic && **cPP == PIC_SUFFIX_CHAR) | |
1977 | cris_get_pic_suffix (cPP, &prefixp->reloc, imm_exprP); | |
1978 | ||
47926f60 KH |
1979 | return 1; |
1980 | } | |
3bcbcc3d HPN |
1981 | |
1982 | /* No luck today. */ | |
1983 | return 0; | |
1984 | } | |
1985 | ||
3bcbcc3d HPN |
1986 | /* This function gets an indirect operand in a three-address operand |
1987 | combination from the string pointed out by *cPP. The pointer *cPP is | |
1988 | advanced to the character following the indirect operand on success, or | |
1989 | has an unspecified value on failure. | |
1990 | ||
1991 | cPP Pointer to pointer to string begining | |
1992 | with the operand | |
1993 | ||
1994 | prefixp Pointer to structure containing an | |
1995 | instruction prefix | |
1996 | ||
1997 | Returns 1 iff a correct indirect operand is found. */ | |
1998 | ||
1999 | static int | |
2000 | get_3op_or_dip_prefix_op (cPP, prefixp) | |
2001 | char **cPP; | |
2002 | struct cris_prefix *prefixp; | |
2003 | { | |
ab3e48dc KH |
2004 | int reg_number; |
2005 | ||
3bcbcc3d HPN |
2006 | if (**cPP != '[') |
2007 | /* We must have a '[' or it's a clean failure. */ | |
2008 | return 0; | |
3bcbcc3d | 2009 | |
47926f60 KH |
2010 | /* Eat the first '['. */ |
2011 | (*cPP)++; | |
2012 | ||
2013 | if (**cPP == '[') | |
2014 | { | |
2015 | /* A second '[', so this must be double-indirect mode. */ | |
3bcbcc3d | 2016 | (*cPP)++; |
47926f60 KH |
2017 | prefixp->kind = PREFIX_DIP; |
2018 | prefixp->opcode = DIP_OPCODE; | |
3bcbcc3d | 2019 | |
47926f60 KH |
2020 | /* Get the register or fail entirely. */ |
2021 | if (! get_gen_reg (cPP, ®_number)) | |
2022 | return 0; | |
2023 | else | |
3bcbcc3d | 2024 | { |
47926f60 KH |
2025 | prefixp->opcode |= reg_number /* << 0 */ ; |
2026 | if (**cPP == '+') | |
2027 | { | |
2028 | /* Since we found a '+', this must be double-indirect | |
2029 | autoincrement mode. */ | |
2030 | (*cPP)++; | |
2031 | prefixp->opcode |= AUTOINCR_BIT << 8; | |
2032 | } | |
2033 | ||
2034 | /* There's nothing particular to do, if this was a | |
2035 | double-indirect *without* autoincrement. */ | |
2036 | } | |
2037 | ||
2038 | /* Check the first ']'. The second one is checked at the end. */ | |
2039 | if (**cPP != ']') | |
2040 | return 0; | |
2041 | ||
2042 | /* Eat the first ']', so we'll be looking at a second ']'. */ | |
2043 | (*cPP)++; | |
2044 | } | |
2045 | /* No second '['. Then we should have a register here, making | |
2046 | it "[rN". */ | |
2047 | else if (get_gen_reg (cPP, &prefixp->base_reg_number)) | |
2048 | { | |
2049 | /* This must be indexed or offset mode: "[rN+I]" or | |
2050 | "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */ | |
2051 | if (**cPP == '+') | |
2052 | { | |
47926f60 KH |
2053 | int index_reg_number; |
2054 | ||
3bcbcc3d | 2055 | (*cPP)++; |
3bcbcc3d | 2056 | |
47926f60 | 2057 | if (**cPP == '[') |
3bcbcc3d | 2058 | { |
47926f60 KH |
2059 | /* This is "[rx+["... Expect a register next. */ |
2060 | int size_bits; | |
2061 | (*cPP)++; | |
2062 | ||
2063 | if (!get_gen_reg (cPP, &index_reg_number)) | |
2064 | return 0; | |
2065 | ||
2066 | prefixp->kind = PREFIX_BDAP; | |
2067 | prefixp->opcode | |
2068 | = (BDAP_INDIR_OPCODE | |
2069 | + (prefixp->base_reg_number << 12) | |
2070 | + index_reg_number); | |
2071 | ||
2072 | /* We've seen "[rx+[ry", so check if this is | |
2073 | autoincrement. */ | |
3bcbcc3d HPN |
2074 | if (**cPP == '+') |
2075 | { | |
47926f60 | 2076 | /* Yep, now at "[rx+[ry+". */ |
3bcbcc3d HPN |
2077 | (*cPP)++; |
2078 | prefixp->opcode |= AUTOINCR_BIT << 8; | |
2079 | } | |
47926f60 KH |
2080 | /* If it wasn't autoincrement, we don't need to |
2081 | add anything. */ | |
3bcbcc3d | 2082 | |
47926f60 KH |
2083 | /* Check a first closing ']': "[rx+[ry]" or |
2084 | "[rx+[ry+]". */ | |
2085 | if (**cPP != ']') | |
2086 | return 0; | |
2087 | (*cPP)++; | |
3bcbcc3d | 2088 | |
47926f60 KH |
2089 | /* Now expect a size modifier ".S". */ |
2090 | if (! get_bwd_size_modifier (cPP, &size_bits)) | |
2091 | return 0; | |
3bcbcc3d | 2092 | |
47926f60 KH |
2093 | prefixp->opcode |= size_bits << 4; |
2094 | ||
2095 | /* Ok, all interesting stuff has been seen: | |
2096 | "[rx+[ry+].S" or "[rx+[ry].S". We only need to | |
2097 | expect a final ']', which we'll do in a common | |
2098 | closing session. */ | |
2099 | } | |
2100 | /* Seen "[rN+", but not a '[', so check if we have a | |
2101 | register. */ | |
2102 | else if (get_gen_reg (cPP, &index_reg_number)) | |
2103 | { | |
2104 | /* This is indexed mode: "[rN+rM.S]" or | |
2105 | "[rN+rM.S+]". */ | |
2106 | int size_bits; | |
2107 | prefixp->kind = PREFIX_BIAP; | |
2108 | prefixp->opcode | |
2109 | = (BIAP_OPCODE | |
2110 | | prefixp->base_reg_number /* << 0 */ | |
2111 | | (index_reg_number << 12)); | |
2112 | ||
07e90ad5 | 2113 | /* Consume the ".S". */ |
47926f60 KH |
2114 | if (! get_bwd_size_modifier (cPP, &size_bits)) |
2115 | /* Missing size, so fail. */ | |
2116 | return 0; | |
3bcbcc3d | 2117 | else |
47926f60 KH |
2118 | /* Size found. Add that piece and drop down to |
2119 | the common checking of the closing ']'. */ | |
2120 | prefixp->opcode |= size_bits << 4; | |
2121 | } | |
2122 | /* Seen "[rN+", but not a '[' or a register, so then | |
2123 | it must be a constant "I". */ | |
2124 | else if (cris_get_expression (cPP, &prefixp->expr)) | |
2125 | { | |
2126 | /* Expression found, so fill in the bits of offset | |
2127 | mode and drop down to check the closing ']'. */ | |
2128 | prefixp->kind = PREFIX_BDAP_IMM; | |
08caf3f8 HPN |
2129 | |
2130 | /* We tentatively put an opcode corresponding to a 32-bit | |
2131 | operand here, although it may be relaxed when there's no | |
2132 | PIC specifier for the operand. */ | |
2133 | prefixp->opcode | |
2134 | = (BDAP_INDIR_OPCODE | |
2135 | | (prefixp->base_reg_number << 12) | |
2136 | | (AUTOINCR_BIT << 8) | |
2137 | | (2 << 4) | |
2138 | | REG_PC /* << 0 */); | |
2139 | ||
2140 | /* This can have a PIC suffix, specifying reloc type to use. */ | |
2141 | if (pic && **cPP == PIC_SUFFIX_CHAR) | |
2142 | { | |
2143 | unsigned int relocsize; | |
2144 | ||
2145 | cris_get_pic_suffix (cPP, &prefixp->reloc, &prefixp->expr); | |
2146 | ||
2147 | /* Tweak the size of the immediate operand in the prefix | |
2148 | opcode if it isn't what we set. */ | |
2149 | relocsize = cris_get_pic_reloc_size (prefixp->reloc); | |
2150 | if (relocsize != 4) | |
2151 | prefixp->opcode | |
2152 | = ((prefixp->opcode & ~(3 << 4)) | |
2153 | | ((relocsize >> 1) << 4)); | |
2154 | } | |
47926f60 KH |
2155 | } |
2156 | else | |
2157 | /* Nothing valid here: lose. */ | |
2158 | return 0; | |
2159 | } | |
2160 | /* Seen "[rN" but no '+', so check if it's a '-'. */ | |
2161 | else if (**cPP == '-') | |
2162 | { | |
2163 | /* Yep, we must have offset mode. */ | |
2164 | if (! cris_get_expression (cPP, &prefixp->expr)) | |
2165 | /* No expression, so we lose. */ | |
2166 | return 0; | |
2167 | else | |
2168 | { | |
2169 | /* Expression found to make this offset mode, so | |
2170 | fill those bits and drop down to check the | |
08caf3f8 HPN |
2171 | closing ']'. |
2172 | ||
2173 | Note that we don't allow a PIC suffix for | |
2174 | an operand with a minus sign like this. */ | |
47926f60 KH |
2175 | prefixp->kind = PREFIX_BDAP_IMM; |
2176 | } | |
2177 | } | |
2178 | else | |
2179 | { | |
2180 | /* We've seen "[rN", but not '+' or '-'; rather a ']'. | |
2181 | Hmm. Normally this is a simple indirect mode that we | |
2182 | shouldn't match, but if we expect ']', then we have a | |
2183 | zero offset, so it can be a three-address-operand, | |
2184 | like "[rN],rO,rP", thus offset mode. | |
2185 | ||
2186 | Don't eat the ']', that will be done in the closing | |
2187 | ceremony. */ | |
2188 | prefixp->expr.X_op = O_constant; | |
2189 | prefixp->expr.X_add_number = 0; | |
2190 | prefixp->expr.X_add_symbol = NULL; | |
2191 | prefixp->expr.X_op_symbol = NULL; | |
2192 | prefixp->kind = PREFIX_BDAP_IMM; | |
2193 | } | |
2194 | } | |
2195 | /* A '[', but no second '[', and no register. Check if we | |
2196 | have an expression, making this "[I]" for a double-indirect | |
2197 | prefix. */ | |
2198 | else if (cris_get_expression (cPP, &prefixp->expr)) | |
2199 | { | |
2200 | /* Expression found, the so called absolute mode for a | |
2201 | double-indirect prefix on PC. */ | |
2202 | prefixp->kind = PREFIX_DIP; | |
2203 | prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC; | |
2204 | prefixp->reloc = BFD_RELOC_32; | |
2205 | } | |
2206 | else | |
2207 | /* Neither '[' nor register nor expression. We lose. */ | |
2208 | return 0; | |
3bcbcc3d HPN |
2209 | |
2210 | /* We get here as a closing ceremony to a successful match. We just | |
2211 | need to check the closing ']'. */ | |
2212 | if (**cPP != ']') | |
2213 | /* Oops. Close but no air-polluter. */ | |
2214 | return 0; | |
2215 | ||
2216 | /* Don't forget to consume that ']', before returning in glory. */ | |
2217 | (*cPP)++; | |
2218 | return 1; | |
2219 | } | |
2220 | ||
3bcbcc3d HPN |
2221 | /* Get an expression from the string pointed out by *cPP. |
2222 | The pointer *cPP is advanced to the character following the expression | |
2223 | on a success, or retains its original value otherwise. | |
2224 | ||
2225 | cPP Pointer to pointer to string beginning with the expression. | |
2226 | ||
2227 | exprP Pointer to structure containing the expression. | |
2228 | ||
47926f60 | 2229 | Return 1 iff a correct expression is found. */ |
3bcbcc3d HPN |
2230 | |
2231 | static int | |
2232 | cris_get_expression (cPP, exprP) | |
47926f60 KH |
2233 | char **cPP; |
2234 | expressionS *exprP; | |
3bcbcc3d HPN |
2235 | { |
2236 | char *saved_input_line_pointer; | |
2237 | segT exp; | |
2238 | ||
2239 | /* The "expression" function expects to find an expression at the | |
2240 | global variable input_line_pointer, so we have to save it to give | |
2241 | the impression that we don't fiddle with global variables. */ | |
2242 | saved_input_line_pointer = input_line_pointer; | |
2243 | input_line_pointer = *cPP; | |
2244 | ||
2245 | exp = expression (exprP); | |
2246 | if (exprP->X_op == O_illegal || exprP->X_op == O_absent) | |
2247 | { | |
2248 | input_line_pointer = saved_input_line_pointer; | |
2249 | return 0; | |
2250 | } | |
2251 | ||
2252 | /* Everything seems to be fine, just restore the global | |
2253 | input_line_pointer and say we're successful. */ | |
2254 | *cPP = input_line_pointer; | |
2255 | input_line_pointer = saved_input_line_pointer; | |
2256 | return 1; | |
2257 | } | |
2258 | ||
3bcbcc3d HPN |
2259 | /* Get a sequence of flag characters from *spp. The pointer *cPP is |
2260 | advanced to the character following the expression. The flag | |
2261 | characters are consecutive, no commas or spaces. | |
2262 | ||
2263 | cPP Pointer to pointer to string beginning with the expression. | |
2264 | ||
2265 | flagp Pointer to int to return the flags expression. | |
2266 | ||
2267 | Return 1 iff a correct flags expression is found. */ | |
2268 | ||
2269 | static int | |
2270 | get_flags (cPP, flagsp) | |
2271 | char **cPP; | |
2272 | int *flagsp; | |
2273 | { | |
2274 | for (;;) | |
2275 | { | |
2276 | switch (**cPP) | |
2277 | { | |
2278 | case 'd': | |
2279 | case 'D': | |
2280 | case 'm': | |
2281 | case 'M': | |
2282 | *flagsp |= 0x80; | |
2283 | break; | |
2284 | ||
2285 | case 'e': | |
2286 | case 'E': | |
2287 | case 'b': | |
2288 | case 'B': | |
2289 | *flagsp |= 0x40; | |
2290 | break; | |
2291 | ||
2292 | case 'i': | |
2293 | case 'I': | |
2294 | *flagsp |= 0x20; | |
2295 | break; | |
2296 | ||
2297 | case 'x': | |
2298 | case 'X': | |
2299 | *flagsp |= 0x10; | |
2300 | break; | |
2301 | ||
2302 | case 'n': | |
2303 | case 'N': | |
2304 | *flagsp |= 0x8; | |
2305 | break; | |
2306 | ||
2307 | case 'z': | |
2308 | case 'Z': | |
2309 | *flagsp |= 0x4; | |
2310 | break; | |
2311 | ||
2312 | case 'v': | |
2313 | case 'V': | |
2314 | *flagsp |= 0x2; | |
2315 | break; | |
2316 | ||
2317 | case 'c': | |
2318 | case 'C': | |
2319 | *flagsp |= 1; | |
2320 | break; | |
2321 | ||
2322 | default: | |
2323 | /* We consider this successful if we stop at a comma or | |
47926f60 | 2324 | whitespace. Anything else, and we consider it a failure. */ |
3bcbcc3d HPN |
2325 | if (**cPP != ',' |
2326 | && **cPP != 0 | |
2327 | && ! isspace (**cPP)) | |
2328 | return 0; | |
2329 | else | |
2330 | return 1; | |
2331 | } | |
2332 | ||
2333 | /* Don't forget to consume each flag character. */ | |
2334 | (*cPP)++; | |
2335 | } | |
2336 | } | |
2337 | ||
3bcbcc3d HPN |
2338 | /* Generate code and fixes for a BDAP prefix. |
2339 | ||
2340 | base_regno Int containing the base register number. | |
2341 | ||
2342 | exprP Pointer to structure containing the offset expression. */ | |
2343 | ||
2344 | static void | |
2345 | gen_bdap (base_regno, exprP) | |
47926f60 KH |
2346 | int base_regno; |
2347 | expressionS *exprP; | |
3bcbcc3d HPN |
2348 | { |
2349 | unsigned int opcode; | |
2350 | char *opcodep; | |
2351 | ||
2352 | /* Put out the prefix opcode; assume quick immediate mode at first. */ | |
2353 | opcode = BDAP_QUICK_OPCODE | (base_regno << 12); | |
ed67db7a | 2354 | opcodep = cris_insn_first_word_frag (); |
3bcbcc3d HPN |
2355 | md_number_to_chars (opcodep, opcode, 2); |
2356 | ||
2357 | if (exprP->X_op == O_constant) | |
2358 | { | |
2359 | /* We have an absolute expression that we know the size of right | |
47926f60 | 2360 | now. */ |
3bcbcc3d HPN |
2361 | long int value; |
2362 | int size; | |
2363 | ||
2364 | value = exprP->X_add_number; | |
2365 | if (value < -32768 || value > 32767) | |
2366 | /* Outside range for a "word", make it a dword. */ | |
2367 | size = 2; | |
2368 | else | |
47926f60 | 2369 | /* Assume "word" size. */ |
3bcbcc3d HPN |
2370 | size = 1; |
2371 | ||
2372 | /* If this is a signed-byte value, we can fit it into the prefix | |
2373 | insn itself. */ | |
2374 | if (value >= -128 && value <= 127) | |
2375 | opcodep[0] = value; | |
2376 | else | |
2377 | { | |
2378 | /* This is a word or dword displacement, which will be put in a | |
2379 | word or dword after the prefix. */ | |
2380 | char *p; | |
2381 | ||
2382 | opcodep[0] = BDAP_PC_LOW + (size << 4); | |
2383 | opcodep[1] &= 0xF0; | |
2384 | opcodep[1] |= BDAP_INCR_HIGH; | |
2385 | p = frag_more (1 << size); | |
2386 | md_number_to_chars (p, value, 1 << size); | |
2387 | } | |
2388 | } | |
2389 | else | |
08caf3f8 HPN |
2390 | { |
2391 | /* Handle complex expressions. */ | |
2392 | valueT addvalue | |
2393 | = exprP->X_op_symbol != NULL ? 0 : exprP->X_add_number; | |
2394 | symbolS *sym | |
2395 | = (exprP->X_op_symbol != NULL | |
2396 | ? make_expr_symbol (exprP) : exprP->X_add_symbol); | |
2397 | ||
2398 | /* The expression is not defined yet but may become absolute. We | |
2399 | make it a relocation to be relaxed. */ | |
2400 | frag_var (rs_machine_dependent, 4, 0, | |
2401 | ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF), | |
2402 | sym, addvalue, opcodep); | |
2403 | } | |
3bcbcc3d HPN |
2404 | } |
2405 | ||
3bcbcc3d HPN |
2406 | /* Encode a branch displacement in the range -256..254 into the form used |
2407 | by CRIS conditional branch instructions. | |
2408 | ||
2409 | offset The displacement value in bytes. */ | |
2410 | ||
2411 | static int | |
2412 | branch_disp (offset) | |
2413 | int offset; | |
2414 | { | |
2415 | int disp; | |
2416 | ||
2417 | disp = offset & 0xFE; | |
2418 | ||
2419 | if (offset < 0) | |
2420 | disp |= 1; | |
2421 | ||
2422 | return disp; | |
2423 | } | |
2424 | ||
3bcbcc3d HPN |
2425 | /* Generate code and fixes for a 32-bit conditional branch instruction |
2426 | created by "extending" an existing 8-bit branch instruction. | |
2427 | ||
2428 | opcodep Pointer to the word containing the original 8-bit branch | |
2429 | instruction. | |
2430 | ||
2431 | writep Pointer to "extension area" following the first instruction | |
2432 | word. | |
2433 | ||
2434 | fragP Pointer to the frag containing the instruction. | |
2435 | ||
2436 | add_symP, Parts of the destination address expression. | |
2437 | sub_symP, | |
2438 | add_num. */ | |
2439 | ||
2440 | static void | |
2441 | gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num) | |
2442 | char *opcodep; | |
2443 | char *writep; | |
2444 | fragS *fragP; | |
2445 | symbolS *add_symP; | |
2446 | symbolS *sub_symP; | |
2447 | long int add_num; | |
2448 | { | |
2449 | if (warn_for_branch_expansion) | |
08caf3f8 HPN |
2450 | as_warn_where (fragP->fr_file, fragP->fr_line, |
2451 | _("32-bit conditional branch generated")); | |
3bcbcc3d HPN |
2452 | |
2453 | /* Here, writep points to what will be opcodep + 2. First, we change | |
2454 | the actual branch in opcodep[0] and opcodep[1], so that in the | |
2455 | final insn, it will look like: | |
2456 | opcodep+10: Bcc .-6 | |
2457 | ||
2458 | This means we don't have to worry about changing the opcode or | |
08caf3f8 | 2459 | messing with the delay-slot instruction. So, we move it to last in |
3bcbcc3d HPN |
2460 | the "extended" branch, and just change the displacement. Admittedly, |
2461 | it's not the optimal extended construct, but we should get this | |
2462 | rarely enough that it shouldn't matter. */ | |
2463 | ||
47926f60 | 2464 | writep[8] = branch_disp (-2 - 6); |
3bcbcc3d HPN |
2465 | writep[9] = opcodep[1]; |
2466 | ||
2467 | /* Then, we change the branch to an unconditional branch over the | |
2468 | extended part, to the new location of the Bcc: | |
2469 | opcodep: BA .+10 | |
2470 | opcodep+2: NOP | |
2471 | ||
2472 | Note that these two writes are to currently different locations, | |
2473 | merged later. */ | |
2474 | ||
2475 | md_number_to_chars (opcodep, BA_QUICK_OPCODE + 8, 2); | |
2476 | md_number_to_chars (writep, NOP_OPCODE, 2); | |
2477 | ||
2478 | /* Then the extended thing, the 32-bit jump insn. | |
08caf3f8 HPN |
2479 | opcodep+4: JUMP [PC+] |
2480 | or, in the PIC case, | |
2481 | opcodep+4: ADD [PC+],PC. */ | |
3bcbcc3d | 2482 | |
08caf3f8 HPN |
2483 | md_number_to_chars (writep + 2, |
2484 | pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2); | |
3bcbcc3d HPN |
2485 | |
2486 | /* We have to fill in the actual value too. | |
2487 | opcodep+6: .DWORD | |
2488 | This is most probably an expression, but we can cope with an absolute | |
08caf3f8 | 2489 | value too. FIXME: Testcase needed with and without pic. */ |
3bcbcc3d HPN |
2490 | |
2491 | if (add_symP == NULL && sub_symP == NULL) | |
08caf3f8 HPN |
2492 | { |
2493 | /* An absolute address. */ | |
2494 | if (pic) | |
2495 | fix_new (fragP, writep + 4 - fragP->fr_literal, 4, | |
2496 | section_symbol (absolute_section), | |
2497 | add_num, 1, BFD_RELOC_32_PCREL); | |
2498 | else | |
2499 | md_number_to_chars (writep + 4, add_num, 4); | |
2500 | } | |
3bcbcc3d HPN |
2501 | else |
2502 | { | |
08caf3f8 HPN |
2503 | if (sub_symP != NULL) |
2504 | as_bad_where (fragP->fr_file, fragP->fr_line, | |
2505 | _("Complex expression not supported")); | |
3bcbcc3d | 2506 | |
08caf3f8 | 2507 | /* Not absolute, we have to make it a frag for later evaluation. */ |
3bcbcc3d | 2508 | fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP, |
08caf3f8 | 2509 | add_num, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32); |
3bcbcc3d HPN |
2510 | } |
2511 | } | |
2512 | ||
08caf3f8 HPN |
2513 | /* Get the size of an immediate-reloc in bytes. Only valid for PIC |
2514 | relocs. */ | |
2515 | ||
2516 | static unsigned int | |
2517 | cris_get_pic_reloc_size (reloc) | |
2518 | bfd_reloc_code_real_type reloc; | |
2519 | { | |
2520 | return reloc == BFD_RELOC_CRIS_16_GOTPLT || reloc == BFD_RELOC_CRIS_16_GOT | |
2521 | ? 2 : 4; | |
2522 | } | |
2523 | ||
2524 | /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP. | |
2525 | Adjust *EXPRP with any addend found after the PIC suffix. */ | |
2526 | ||
2527 | static void | |
2528 | cris_get_pic_suffix (cPP, relocp, exprP) | |
2529 | char **cPP; | |
2530 | bfd_reloc_code_real_type *relocp; | |
2531 | expressionS *exprP; | |
2532 | { | |
2533 | char *s = *cPP; | |
2534 | unsigned int i; | |
2535 | expressionS const_expr; | |
2536 | ||
2537 | const struct pic_suffixes_struct | |
2538 | { | |
2539 | const char *const suffix; | |
2540 | unsigned int len; | |
2541 | bfd_reloc_code_real_type reloc; | |
2542 | } pic_suffixes[] = | |
2543 | { | |
2544 | #undef PICMAP | |
2545 | #define PICMAP(s, r) {s, sizeof (s) - 1, r} | |
2546 | /* Keep this in order with longest unambiguous prefix first. */ | |
2547 | PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT), | |
2548 | PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT), | |
2549 | PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL), | |
2550 | PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL), | |
2551 | PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL), | |
2552 | PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT), | |
2553 | PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT) | |
2554 | }; | |
2555 | ||
2556 | /* We've already seen the ':', so consume it. */ | |
2557 | s++; | |
2558 | ||
2559 | for (i = 0; i < sizeof (pic_suffixes)/sizeof (pic_suffixes[0]); i++) | |
2560 | { | |
2561 | if (strncmp (s, pic_suffixes[i].suffix, pic_suffixes[i].len) == 0 | |
2562 | && ! is_part_of_name (s[pic_suffixes[i].len])) | |
2563 | { | |
2564 | /* We have a match. Consume the suffix and set the relocation | |
2565 | type. */ | |
2566 | s += pic_suffixes[i].len; | |
2567 | ||
2568 | /* There can be a constant term appended. If so, we will add it | |
2569 | to *EXPRP. */ | |
2570 | if (*s == '+' || *s == '-') | |
2571 | { | |
2572 | if (! cris_get_expression (&s, &const_expr)) | |
2573 | /* There was some kind of syntax error. Bail out. */ | |
2574 | break; | |
2575 | ||
2576 | /* Allow complex expressions as the constant part. It still | |
2577 | has to be a assembly-time constant or there will be an | |
2578 | error emitting the reloc. This makes the PIC qualifiers | |
d551a338 | 2579 | idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we |
08caf3f8 HPN |
2580 | recognize here; the latter is parsed in the incoming |
2581 | expression. */ | |
2582 | exprP->X_add_symbol = make_expr_symbol (exprP); | |
2583 | exprP->X_op = O_add; | |
2584 | exprP->X_add_number = 0; | |
2585 | exprP->X_op_symbol = make_expr_symbol (&const_expr); | |
2586 | } | |
2587 | ||
2588 | *relocp = pic_suffixes[i].reloc; | |
2589 | *cPP = s; | |
2590 | return; | |
2591 | } | |
2592 | } | |
2593 | ||
2594 | /* No match. Don't consume anything; fall back and there will be a | |
2595 | syntax error. */ | |
2596 | } | |
2597 | ||
3bcbcc3d HPN |
2598 | /* This *could* be: |
2599 | ||
47926f60 KH |
2600 | Turn a string in input_line_pointer into a floating point constant |
2601 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2602 | of LITTLENUMS emitted is stored in *SIZEP. | |
3bcbcc3d HPN |
2603 | |
2604 | type A character from FLTCHARS that describes what kind of | |
2605 | floating-point number is wanted. | |
2606 | ||
2607 | litp A pointer to an array that the result should be stored in. | |
2608 | ||
2609 | sizep A pointer to an integer where the size of the result is stored. | |
2610 | ||
2611 | But we don't support floating point constants in assembly code *at all*, | |
2612 | since it's suboptimal and just opens up bug opportunities. GCC emits | |
2613 | the bit patterns as hex. All we could do here is to emit what GCC | |
2614 | would have done in the first place. *Nobody* writes floating-point | |
2615 | code as assembly code, but if they do, they should be able enough to | |
2616 | find out the correct bit patterns and use them. */ | |
2617 | ||
2618 | char * | |
2619 | md_atof (type, litp, sizep) | |
2620 | char type ATTRIBUTE_UNUSED; | |
2621 | char *litp ATTRIBUTE_UNUSED; | |
47926f60 | 2622 | int *sizep ATTRIBUTE_UNUSED; |
3bcbcc3d HPN |
2623 | { |
2624 | /* FIXME: Is this function mentioned in the internals.texi manual? If | |
2625 | not, add it. */ | |
2626 | return _("Bad call to md_atof () - floating point formats are not supported"); | |
2627 | } | |
2628 | ||
3bcbcc3d HPN |
2629 | /* Turn a number as a fixS * into a series of bytes that represents the |
2630 | number on the target machine. The purpose of this procedure is the | |
2631 | same as that of md_number_to_chars but this procedure is supposed to | |
2632 | handle general bit field fixes and machine-dependent fixups. | |
2633 | ||
2634 | bufp Pointer to an array where the result should be stored. | |
2635 | ||
2636 | val The value to store. | |
2637 | ||
2638 | n The number of bytes in "val" that should be stored. | |
2639 | ||
08caf3f8 HPN |
2640 | fixP The fix to be applied to the bit field starting at bufp. |
2641 | ||
2642 | seg The segment containing this number. */ | |
3bcbcc3d HPN |
2643 | |
2644 | static void | |
08caf3f8 | 2645 | cris_number_to_imm (bufp, val, n, fixP, seg) |
3bcbcc3d HPN |
2646 | char *bufp; |
2647 | long val; | |
2648 | int n; | |
2649 | fixS *fixP; | |
08caf3f8 | 2650 | segT seg; |
3bcbcc3d HPN |
2651 | { |
2652 | segT sym_seg; | |
2653 | ||
2654 | know (n <= 4); | |
2655 | know (fixP); | |
2656 | ||
2657 | /* We put the relative "vma" for the other segment for inter-segment | |
2658 | relocations in the object data to stay binary "compatible" (with an | |
2659 | uninteresting old version) for the relocation. | |
2660 | Maybe delete some day. */ | |
2661 | if (fixP->fx_addsy | |
08caf3f8 | 2662 | && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != seg) |
3bcbcc3d HPN |
2663 | val += sym_seg->vma; |
2664 | ||
08caf3f8 HPN |
2665 | if (fixP->fx_addsy != NULL || fixP->fx_pcrel) |
2666 | switch (fixP->fx_r_type) | |
2667 | { | |
2668 | /* These must be fully resolved when getting here. */ | |
2669 | case BFD_RELOC_32_PCREL: | |
2670 | case BFD_RELOC_16_PCREL: | |
2671 | case BFD_RELOC_8_PCREL: | |
2672 | as_bad_where (fixP->fx_frag->fr_file, fixP->fx_frag->fr_line, | |
2673 | _("PC-relative relocation must be trivially resolved")); | |
2674 | default: | |
2675 | ; | |
2676 | } | |
2677 | ||
3bcbcc3d HPN |
2678 | switch (fixP->fx_r_type) |
2679 | { | |
2680 | /* Ditto here, we put the addend into the object code as | |
2681 | well as the reloc addend. Keep it that way for now, to simplify | |
2682 | regression tests on the object file contents. FIXME: Seems | |
2683 | uninteresting now that we have a test suite. */ | |
2684 | ||
08caf3f8 HPN |
2685 | case BFD_RELOC_CRIS_16_GOT: |
2686 | case BFD_RELOC_CRIS_32_GOT: | |
2687 | case BFD_RELOC_CRIS_32_GOTREL: | |
2688 | case BFD_RELOC_CRIS_16_GOTPLT: | |
2689 | case BFD_RELOC_CRIS_32_GOTPLT: | |
2690 | case BFD_RELOC_CRIS_32_PLT_GOTREL: | |
2691 | case BFD_RELOC_CRIS_32_PLT_PCREL: | |
2692 | /* We don't want to put in any kind of non-zero bits in the data | |
2693 | being relocated for these. */ | |
2694 | break; | |
2695 | ||
3bcbcc3d | 2696 | case BFD_RELOC_32: |
08caf3f8 | 2697 | case BFD_RELOC_32_PCREL: |
3bcbcc3d HPN |
2698 | /* No use having warnings here, since most hosts have a 32-bit type |
2699 | for "long" (which will probably change soon, now that I wrote | |
2700 | this). */ | |
2701 | bufp[3] = (val >> 24) & 0xFF; | |
2702 | bufp[2] = (val >> 16) & 0xFF; | |
2703 | bufp[1] = (val >> 8) & 0xFF; | |
2704 | bufp[0] = val & 0xFF; | |
2705 | break; | |
2706 | ||
2707 | /* FIXME: The 16 and 8-bit cases should have a way to check | |
2708 | whether a signed or unsigned (or any signedness) number is | |
2709 | accepted. | |
2710 | FIXME: Does the as_bad calls find the line number by themselves, | |
2711 | or should we change them into as_bad_where? */ | |
2712 | ||
2713 | case BFD_RELOC_16: | |
08caf3f8 | 2714 | case BFD_RELOC_16_PCREL: |
3bcbcc3d HPN |
2715 | if (val > 0xffff || val < -32768) |
2716 | as_bad (_("Value not in 16 bit range: %ld"), val); | |
2717 | if (! fixP->fx_addsy) | |
2718 | { | |
2719 | bufp[1] = (val >> 8) & 0xFF; | |
2720 | bufp[0] = val & 0xFF; | |
2721 | } | |
2722 | break; | |
2723 | ||
2724 | case BFD_RELOC_8: | |
08caf3f8 | 2725 | case BFD_RELOC_8_PCREL: |
3bcbcc3d HPN |
2726 | if (val > 255 || val < -128) |
2727 | as_bad (_("Value not in 8 bit range: %ld"), val); | |
2728 | if (! fixP->fx_addsy) | |
2729 | bufp[0] = val & 0xFF; | |
2730 | break; | |
2731 | ||
2732 | case BFD_RELOC_CRIS_UNSIGNED_4: | |
2733 | if (val > 15 || val < 0) | |
2734 | as_bad (_("Value not in 4 bit unsigned range: %ld"), val); | |
2735 | if (! fixP->fx_addsy) | |
2736 | bufp[0] |= val & 0x0F; | |
2737 | break; | |
2738 | ||
2739 | case BFD_RELOC_CRIS_UNSIGNED_5: | |
2740 | if (val > 31 || val < 0) | |
2741 | as_bad (_("Value not in 5 bit unsigned range: %ld"), val); | |
2742 | if (! fixP->fx_addsy) | |
2743 | bufp[0] |= val & 0x1F; | |
2744 | break; | |
2745 | ||
2746 | case BFD_RELOC_CRIS_SIGNED_6: | |
2747 | if (val > 31 || val < -32) | |
2748 | as_bad (_("Value not in 6 bit range: %ld"), val); | |
2749 | if (! fixP->fx_addsy) | |
2750 | bufp[0] |= val & 0x3F; | |
2751 | break; | |
2752 | ||
2753 | case BFD_RELOC_CRIS_UNSIGNED_6: | |
2754 | if (val > 63 || val < 0) | |
2755 | as_bad (_("Value not in 6 bit unsigned range: %ld"), val); | |
2756 | if (! fixP->fx_addsy) | |
2757 | bufp[0] |= val & 0x3F; | |
2758 | break; | |
2759 | ||
2760 | case BFD_RELOC_CRIS_BDISP8: | |
2761 | if (! fixP->fx_addsy) | |
2762 | bufp[0] = branch_disp (val); | |
2763 | break; | |
2764 | ||
2765 | case BFD_RELOC_NONE: | |
2766 | /* May actually happen automatically. For example at broken | |
2767 | words, if the word turns out not to be broken. | |
47926f60 | 2768 | FIXME: When? Which testcase? */ |
3bcbcc3d HPN |
2769 | if (! fixP->fx_addsy) |
2770 | md_number_to_chars (bufp, val, n); | |
2771 | break; | |
2772 | ||
2773 | case BFD_RELOC_VTABLE_INHERIT: | |
2774 | /* This borrowed from tc-ppc.c on a whim. */ | |
2775 | if (fixP->fx_addsy | |
2776 | && !S_IS_DEFINED (fixP->fx_addsy) | |
2777 | && !S_IS_WEAK (fixP->fx_addsy)) | |
2778 | S_SET_WEAK (fixP->fx_addsy); | |
7b15d668 HPN |
2779 | /* Fall through. */ |
2780 | ||
3bcbcc3d | 2781 | case BFD_RELOC_VTABLE_ENTRY: |
3bcbcc3d HPN |
2782 | fixP->fx_done = 0; |
2783 | break; | |
2784 | ||
2785 | default: | |
2786 | BAD_CASE (fixP->fx_r_type); | |
2787 | } | |
2788 | } | |
2789 | ||
3bcbcc3d HPN |
2790 | /* Processes machine-dependent command line options. Called once for |
2791 | each option on the command line that the machine-independent part of | |
2792 | GAS does not understand. */ | |
47926f60 | 2793 | |
3bcbcc3d HPN |
2794 | int |
2795 | md_parse_option (arg, argp) | |
2796 | int arg; | |
2797 | char *argp ATTRIBUTE_UNUSED; | |
2798 | { | |
2799 | switch (arg) | |
2800 | { | |
2801 | case 'H': | |
2802 | case 'h': | |
7b15d668 | 2803 | printf (_("Please use --help to see usage and options for this assembler.\n")); |
3bcbcc3d | 2804 | md_show_usage (stdout); |
7b15d668 | 2805 | exit (EXIT_SUCCESS); |
3bcbcc3d HPN |
2806 | |
2807 | case 'N': | |
2808 | warn_for_branch_expansion = 1; | |
2809 | return 1; | |
2810 | ||
7b15d668 HPN |
2811 | case OPTION_NO_US: |
2812 | demand_register_prefix = true; | |
2813 | ||
2814 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour) | |
08caf3f8 | 2815 | as_bad (_("--no-underscore is invalid with a.out format")); |
7b15d668 HPN |
2816 | else |
2817 | symbols_have_leading_underscore = false; | |
2818 | return 1; | |
2819 | ||
2820 | case OPTION_US: | |
2821 | demand_register_prefix = false; | |
2822 | symbols_have_leading_underscore = true; | |
2823 | return 1; | |
2824 | ||
08caf3f8 HPN |
2825 | case OPTION_PIC: |
2826 | pic = true; | |
2827 | return 1; | |
2828 | ||
3bcbcc3d HPN |
2829 | default: |
2830 | return 0; | |
47926f60 | 2831 | } |
3bcbcc3d HPN |
2832 | } |
2833 | ||
2834 | /* Round up a section size to the appropriate boundary. */ | |
2835 | valueT | |
2836 | md_section_align (segment, size) | |
2837 | segT segment; | |
2838 | valueT size; | |
2839 | { | |
2840 | /* Round all sects to multiple of 4, except the bss section, which | |
2841 | we'll round to word-size. | |
2842 | ||
2843 | FIXME: Check if this really matters. All sections should be | |
2844 | rounded up, and all sections should (optionally) be assumed to be | |
2845 | dword-aligned, it's just that there is actual usage of linking to a | |
2846 | multiple of two. */ | |
2847 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour) | |
2848 | { | |
2849 | if (segment == bss_section) | |
2850 | return (size + 1) & ~1; | |
2851 | return (size + 3) & ~3; | |
2852 | } | |
2853 | else | |
2854 | { | |
2855 | /* FIXME: Is this wanted? It matches the testsuite, but that's not | |
2856 | really a valid reason. */ | |
2857 | if (segment == text_section) | |
2858 | return (size + 3) & ~3; | |
2859 | } | |
2860 | ||
2861 | return size; | |
2862 | } | |
2863 | ||
3bcbcc3d HPN |
2864 | /* Generate a machine-dependent relocation. */ |
2865 | arelent * | |
2866 | tc_gen_reloc (section, fixP) | |
2867 | asection *section ATTRIBUTE_UNUSED; | |
2868 | fixS *fixP; | |
2869 | { | |
2870 | arelent *relP; | |
2871 | bfd_reloc_code_real_type code; | |
2872 | ||
2873 | switch (fixP->fx_r_type) | |
2874 | { | |
08caf3f8 HPN |
2875 | case BFD_RELOC_CRIS_16_GOT: |
2876 | case BFD_RELOC_CRIS_32_GOT: | |
2877 | case BFD_RELOC_CRIS_16_GOTPLT: | |
2878 | case BFD_RELOC_CRIS_32_GOTPLT: | |
2879 | case BFD_RELOC_CRIS_32_GOTREL: | |
2880 | case BFD_RELOC_CRIS_32_PLT_GOTREL: | |
2881 | case BFD_RELOC_CRIS_32_PLT_PCREL: | |
3bcbcc3d HPN |
2882 | case BFD_RELOC_32: |
2883 | case BFD_RELOC_16: | |
2884 | case BFD_RELOC_8: | |
2885 | case BFD_RELOC_VTABLE_INHERIT: | |
2886 | case BFD_RELOC_VTABLE_ENTRY: | |
2887 | code = fixP->fx_r_type; | |
2888 | break; | |
2889 | default: | |
2890 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2891 | _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant")); | |
2892 | return 0; | |
2893 | } | |
2894 | ||
2895 | relP = (arelent *) xmalloc (sizeof (arelent)); | |
2896 | assert (relP != 0); | |
2897 | relP->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
2898 | *relP->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); | |
2899 | relP->address = fixP->fx_frag->fr_address + fixP->fx_where; | |
2900 | ||
2901 | if (fixP->fx_pcrel) | |
47926f60 | 2902 | /* FIXME: Is this correct? */ |
3bcbcc3d HPN |
2903 | relP->addend = fixP->fx_addnumber; |
2904 | else | |
47926f60 | 2905 | /* At least *this one* is correct. */ |
3bcbcc3d HPN |
2906 | relP->addend = fixP->fx_offset; |
2907 | ||
2908 | /* This is the standard place for KLUDGEs to work around bugs in | |
2909 | bfd_install_relocation (first such note in the documentation | |
2910 | appears with binutils-2.8). | |
2911 | ||
2912 | That function bfd_install_relocation does the wrong thing with | |
2913 | putting stuff into the addend of a reloc (it should stay out) for a | |
2914 | weak symbol. The really bad thing is that it adds the | |
2915 | "segment-relative offset" of the symbol into the reloc. In this | |
2916 | case, the reloc should instead be relative to the symbol with no | |
2917 | other offset than the assembly code shows; and since the symbol is | |
2918 | weak, any local definition should be ignored until link time (or | |
2919 | thereafter). | |
2920 | To wit: weaksym+42 should be weaksym+42 in the reloc, | |
2921 | not weaksym+(offset_from_segment_of_local_weaksym_definition) | |
2922 | ||
2923 | To "work around" this, we subtract the segment-relative offset of | |
2924 | "known" weak symbols. This evens out the extra offset. | |
2925 | ||
2926 | That happens for a.out but not for ELF, since for ELF, | |
2927 | bfd_install_relocation uses the "special function" field of the | |
2928 | howto, and does not execute the code that needs to be undone. */ | |
2929 | ||
2930 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour | |
2931 | && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy) | |
2932 | && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy))) | |
47926f60 KH |
2933 | { |
2934 | relP->addend -= S_GET_VALUE (fixP->fx_addsy); | |
2935 | } | |
3bcbcc3d HPN |
2936 | |
2937 | relP->howto = bfd_reloc_type_lookup (stdoutput, code); | |
2938 | if (! relP->howto) | |
2939 | { | |
2940 | const char *name; | |
2941 | ||
2942 | name = S_GET_NAME (fixP->fx_addsy); | |
2943 | if (name == NULL) | |
2944 | name = _("<unknown>"); | |
2945 | as_fatal (_("Cannot generate relocation type for symbol %s, code %s"), | |
2946 | name, bfd_get_reloc_code_name (code)); | |
2947 | } | |
2948 | ||
2949 | return relP; | |
2950 | } | |
2951 | ||
3bcbcc3d | 2952 | /* Machine-dependent usage-output. */ |
47926f60 | 2953 | |
3bcbcc3d HPN |
2954 | void |
2955 | md_show_usage (stream) | |
2956 | FILE *stream; | |
2957 | { | |
08caf3f8 | 2958 | /* The messages are formatted to line up with the generic options. */ |
7b15d668 HPN |
2959 | fprintf (stream, _("CRIS-specific options:\n")); |
2960 | fprintf (stream, "%s", | |
2961 | _(" -h, -H Don't execute, print this help text. Deprecated.\n")); | |
2962 | fprintf (stream, "%s", | |
2963 | _(" -N Warn when branches are expanded to jumps.\n")); | |
2964 | fprintf (stream, "%s", | |
2965 | _(" --underscore User symbols are normally prepended with underscore.\n")); | |
2966 | fprintf (stream, "%s", | |
2967 | _(" Registers will not need any prefix.\n")); | |
2968 | fprintf (stream, "%s", | |
2969 | _(" --no-underscore User symbols do not have any prefix.\n")); | |
2970 | fprintf (stream, "%s", | |
2971 | _(" Registers will require a `$'-prefix.\n")); | |
08caf3f8 HPN |
2972 | fprintf (stream, "%s", |
2973 | _(" --pic Enable generation of position-independent code.\n")); | |
3bcbcc3d HPN |
2974 | } |
2975 | ||
3bcbcc3d | 2976 | /* Apply a fixS (fixup of an instruction or data that we didn't have |
47926f60 | 2977 | enough info to complete immediately) to the data in a frag. */ |
3bcbcc3d HPN |
2978 | |
2979 | int | |
08caf3f8 | 2980 | md_apply_fix3 (fixP, valP, seg) |
3bcbcc3d HPN |
2981 | fixS *fixP; |
2982 | valueT *valP; | |
08caf3f8 | 2983 | segT seg; |
3bcbcc3d HPN |
2984 | { |
2985 | long val = *valP; | |
2986 | ||
2987 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2988 | ||
2989 | if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) | |
2990 | fixP->fx_done = 1; | |
2991 | ||
2992 | if (fixP->fx_bit_fixP || fixP->fx_im_disp != 0) | |
2993 | { | |
2994 | as_bad_where (fixP->fx_file, fixP->fx_line, _("Invalid relocation")); | |
2995 | fixP->fx_done = 1; | |
2996 | } | |
2997 | else | |
47926f60 KH |
2998 | { |
2999 | /* I took this from tc-arc.c, since we used to not support | |
3000 | fx_subsy != NULL. I'm not totally sure it's TRT. */ | |
3001 | if (fixP->fx_subsy != (symbolS *) NULL) | |
3002 | { | |
3003 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) | |
3004 | val -= S_GET_VALUE (fixP->fx_subsy); | |
3005 | else | |
3006 | { | |
3007 | /* We can't actually support subtracting a symbol. */ | |
3008 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3009 | _("expression too complex")); | |
3010 | } | |
3011 | } | |
3012 | ||
08caf3f8 | 3013 | cris_number_to_imm (buf, val, fixP->fx_size, fixP, seg); |
47926f60 | 3014 | } |
3bcbcc3d HPN |
3015 | |
3016 | return 1; | |
3017 | } | |
3018 | ||
3bcbcc3d HPN |
3019 | /* All relocations are relative to the location just after the fixup; |
3020 | the address of the fixup plus its size. */ | |
3021 | ||
3022 | long | |
3023 | md_pcrel_from (fixP) | |
3024 | fixS *fixP; | |
3025 | { | |
3026 | valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; | |
3027 | ||
3028 | /* FIXME: We get here only at the end of assembly, when X in ".-X" is | |
08caf3f8 HPN |
3029 | still unknown. Since we don't have pc-relative relocations in a.out, |
3030 | this is invalid. What to do if anything for a.out, is to add | |
3bcbcc3d | 3031 | pc-relative relocations everywhere including the elinux program |
08caf3f8 HPN |
3032 | loader. For ELF, allow straight-forward PC-relative relocations, |
3033 | which are always relative to the location after the relocation. */ | |
3034 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3035 | || (fixP->fx_r_type != BFD_RELOC_8_PCREL | |
3036 | && fixP->fx_r_type != BFD_RELOC_16_PCREL | |
3037 | && fixP->fx_r_type != BFD_RELOC_32_PCREL)) | |
3038 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3039 | _("Invalid pc-relative relocation")); | |
3bcbcc3d HPN |
3040 | return fixP->fx_size + addr; |
3041 | } | |
3042 | ||
47926f60 | 3043 | /* We have no need to give defaults for symbol-values. */ |
3bcbcc3d HPN |
3044 | symbolS * |
3045 | md_undefined_symbol (name) | |
3046 | char *name ATTRIBUTE_UNUSED; | |
3047 | { | |
3048 | return 0; | |
3049 | } | |
3050 | ||
3bcbcc3d HPN |
3051 | /* Definition of TC_FORCE_RELOCATION. |
3052 | FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c | |
3053 | when doing multi-object format with ELF, since it's the only other | |
3054 | multi-object-format target with a.out and ELF. */ | |
3055 | int | |
3056 | md_cris_force_relocation (fixp) | |
3057 | struct fix *fixp; | |
3058 | { | |
08caf3f8 HPN |
3059 | switch (fixp->fx_r_type) |
3060 | { | |
3061 | case BFD_RELOC_VTABLE_INHERIT: | |
3062 | case BFD_RELOC_VTABLE_ENTRY: | |
3063 | case BFD_RELOC_CRIS_16_GOT: | |
3064 | case BFD_RELOC_CRIS_32_GOT: | |
3065 | case BFD_RELOC_CRIS_16_GOTPLT: | |
3066 | case BFD_RELOC_CRIS_32_GOTPLT: | |
3067 | case BFD_RELOC_CRIS_32_GOTREL: | |
3068 | case BFD_RELOC_CRIS_32_PLT_GOTREL: | |
3069 | case BFD_RELOC_CRIS_32_PLT_PCREL: | |
3070 | return 1; | |
3071 | default: | |
3072 | ; | |
3073 | } | |
3074 | ||
3bcbcc3d HPN |
3075 | return 0; |
3076 | } | |
3077 | ||
3078 | /* Check and emit error if broken-word handling has failed to fix up a | |
3079 | case-table. This is called from write.c, after doing everything it | |
3080 | knows about how to handle broken words. */ | |
3081 | ||
3082 | void | |
3083 | tc_cris_check_adjusted_broken_word (new_offset, brokwP) | |
3084 | offsetT new_offset; | |
3085 | struct broken_word *brokwP; | |
3086 | { | |
3087 | if (new_offset > 32767 || new_offset < -32768) | |
47926f60 | 3088 | /* We really want a genuine error, not a warning, so make it one. */ |
3bcbcc3d HPN |
3089 | as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line, |
3090 | _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."), | |
3091 | (long) new_offset); | |
3092 | } | |
3093 | ||
7b15d668 HPN |
3094 | /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */ |
3095 | ||
3096 | static void cris_force_reg_prefix () | |
3097 | { | |
3098 | demand_register_prefix = true; | |
3099 | } | |
3100 | ||
3101 | /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */ | |
3102 | ||
3103 | static void cris_relax_reg_prefix () | |
3104 | { | |
3105 | demand_register_prefix = false; | |
3106 | } | |
3107 | ||
3108 | /* Adjust for having a leading '_' on all user symbols. */ | |
3109 | ||
3110 | static void cris_sym_leading_underscore () | |
3111 | { | |
3112 | /* We can't really do anything more than assert that what the program | |
3113 | thinks symbol starts with agrees with the command-line options, since | |
3114 | the bfd is already created. */ | |
3115 | ||
3116 | if (symbols_have_leading_underscore == false) | |
ed67db7a | 3117 | as_bad (_(".syntax %s requires command-line option `--underscore'"), |
7b15d668 HPN |
3118 | SYNTAX_USER_SYM_LEADING_UNDERSCORE); |
3119 | } | |
3120 | ||
3121 | /* Adjust for not having any particular prefix on user symbols. */ | |
3122 | ||
3123 | static void cris_sym_no_leading_underscore () | |
3124 | { | |
3125 | if (symbols_have_leading_underscore == true) | |
ed67db7a | 3126 | as_bad (_(".syntax %s requires command-line option `--no-underscore'"), |
7b15d668 HPN |
3127 | SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE); |
3128 | } | |
3129 | ||
3130 | /* Handle the .syntax pseudo, which takes an argument that decides what | |
3131 | syntax the assembly code has. */ | |
3132 | ||
3133 | static void | |
3134 | s_syntax (ignore) | |
3135 | int ignore ATTRIBUTE_UNUSED; | |
3136 | { | |
3137 | static const struct syntaxes | |
3138 | { | |
3139 | const char *operand; | |
3140 | void (*fn) PARAMS ((void)); | |
4a1805b1 | 3141 | } syntax_table[] = |
7b15d668 HPN |
3142 | {{SYNTAX_ENFORCE_REG_PREFIX, cris_force_reg_prefix}, |
3143 | {SYNTAX_RELAX_REG_PREFIX, cris_relax_reg_prefix}, | |
3144 | {SYNTAX_USER_SYM_LEADING_UNDERSCORE, cris_sym_leading_underscore}, | |
3145 | {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE, cris_sym_no_leading_underscore}}; | |
3146 | ||
3147 | const struct syntaxes *sp; | |
3148 | ||
3149 | for (sp = syntax_table; | |
3150 | sp < syntax_table + sizeof (syntax_table) / sizeof (syntax_table[0]); | |
3151 | sp++) | |
3152 | { | |
3153 | if (strncmp (input_line_pointer, sp->operand, | |
3154 | strlen (sp->operand)) == 0) | |
3155 | { | |
bc805888 | 3156 | (sp->fn) (); |
7b15d668 HPN |
3157 | |
3158 | input_line_pointer += strlen (sp->operand); | |
3159 | demand_empty_rest_of_line (); | |
3160 | return; | |
3161 | } | |
3162 | } | |
3163 | ||
3164 | as_bad (_("Unknown .syntax operand")); | |
3165 | } | |
3166 | ||
fcdc20a4 HPN |
3167 | /* Wrapper for dwarf2_directive_file to emit error if this is seen when |
3168 | not emitting ELF. */ | |
3169 | ||
3170 | static void | |
3171 | s_cris_file (dummy) | |
3172 | int dummy; | |
3173 | { | |
3174 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour) | |
ed67db7a | 3175 | as_bad (_("Pseudodirective .file is only valid when generating ELF")); |
fcdc20a4 HPN |
3176 | else |
3177 | dwarf2_directive_file (dummy); | |
3178 | } | |
3179 | ||
3180 | /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not | |
3181 | emitting ELF. */ | |
3182 | ||
3183 | static void | |
3184 | s_cris_loc (dummy) | |
3185 | int dummy; | |
3186 | { | |
3187 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour) | |
ed67db7a | 3188 | as_bad (_("Pseudodirective .loc is only valid when generating ELF")); |
fcdc20a4 HPN |
3189 | else |
3190 | dwarf2_directive_loc (dummy); | |
3191 | } | |
3192 | ||
3bcbcc3d HPN |
3193 | /* |
3194 | * Local variables: | |
3195 | * eval: (c-set-style "gnu") | |
3196 | * indent-tabs-mode: t | |
3197 | * End: | |
3198 | */ |