Commit | Line | Data |
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3bcbcc3d | 1 | /* tc-cris.c -- Assembler code for the CRIS CPU core. |
08caf3f8 | 2 | Copyright 2000, 2001 Free Software Foundation, Inc. |
3bcbcc3d HPN |
3 | |
4 | Contributed by Axis Communications AB, Lund, Sweden. | |
5 | Originally written for GAS 1.38.1 by Mikael Asker. | |
08caf3f8 | 6 | Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson. |
3bcbcc3d HPN |
7 | |
8 | This file is part of GAS, the GNU Assembler. | |
9 | ||
10 | GAS is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2, or (at your option) | |
13 | any later version. | |
14 | ||
15 | GAS is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with GAS; see the file COPYING. If not, write to the | |
22 | Free Software Foundation, 59 Temple Place - Suite 330, Boston, | |
47926f60 | 23 | MA 02111-1307, USA. */ |
3bcbcc3d HPN |
24 | |
25 | #include <stdio.h> | |
26 | #include <ctype.h> | |
27 | #include "as.h" | |
28 | #include "subsegs.h" | |
29 | #include "opcode/cris.h" | |
fcdc20a4 | 30 | #include "dwarf2dbg.h" |
3bcbcc3d HPN |
31 | |
32 | /* Conventions used here: | |
33 | Generally speaking, pointers to binutils types such as "fragS" and | |
34 | "expressionS" get parameter and variable names ending in "P", such as | |
35 | "fragP", to harmonize with the rest of the binutils code. Other | |
36 | pointers get a "p" suffix, such as "bufp". Any function or type-name | |
37 | that could clash with a current or future binutils or GAS function get | |
38 | a "cris_" prefix. */ | |
39 | ||
7b15d668 HPN |
40 | #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix" |
41 | #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix" | |
42 | #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore" | |
43 | #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore" | |
44 | #define REGISTER_PREFIX_CHAR '$' | |
45 | ||
08caf3f8 HPN |
46 | /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in |
47 | line_separator_chars for CRIS, so we avoid it. */ | |
48 | #define PIC_SUFFIX_CHAR ':' | |
49 | ||
3bcbcc3d HPN |
50 | /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only. |
51 | Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */ | |
52 | enum cris_insn_kind | |
53 | { | |
54 | CRIS_INSN_NORMAL, CRIS_INSN_NONE, CRIS_INSN_BRANCH | |
55 | }; | |
56 | ||
57 | /* An instruction will have one of these prefixes. | |
58 | Although the same bit-pattern, we handle BDAP with an immediate | |
59 | expression (eventually quick or [pc+]) different from when we only have | |
60 | register expressions. */ | |
61 | enum prefix_kind | |
62 | { | |
63 | PREFIX_NONE, PREFIX_BDAP_IMM, PREFIX_BDAP, PREFIX_BIAP, PREFIX_DIP, | |
64 | PREFIX_PUSH | |
65 | }; | |
66 | ||
67 | /* The prefix for an instruction. */ | |
68 | struct cris_prefix | |
69 | { | |
47926f60 KH |
70 | enum prefix_kind kind; |
71 | int base_reg_number; | |
72 | unsigned int opcode; | |
3bcbcc3d HPN |
73 | |
74 | /* There might be an expression to be evaluated, like I in [rN+I]. */ | |
47926f60 | 75 | expressionS expr; |
3bcbcc3d HPN |
76 | |
77 | /* If there's an expression, we might need a relocation. Here's the | |
78 | type of what relocation to start relaxaton with. | |
79 | The relocation is assumed to start immediately after the prefix insn, | |
80 | so we don't provide an offset. */ | |
81 | enum bfd_reloc_code_real reloc; | |
82 | }; | |
83 | ||
47926f60 | 84 | /* The description of the instruction being assembled. */ |
3bcbcc3d HPN |
85 | struct cris_instruction |
86 | { | |
87 | /* If CRIS_INSN_NONE, then this insn is of zero length. */ | |
47926f60 | 88 | enum cris_insn_kind insn_type; |
3bcbcc3d HPN |
89 | |
90 | /* If a special register was mentioned, this is its description, else | |
47926f60 | 91 | it is NULL. */ |
3bcbcc3d HPN |
92 | const struct cris_spec_reg *spec_reg; |
93 | ||
47926f60 | 94 | unsigned int opcode; |
3bcbcc3d HPN |
95 | |
96 | /* An insn may have at most one expression; theoretically there could be | |
47926f60 KH |
97 | another in its prefix (but I don't see how that could happen). */ |
98 | expressionS expr; | |
3bcbcc3d HPN |
99 | |
100 | /* The expression might need a relocation. Here's one to start | |
101 | relaxation with. */ | |
47926f60 | 102 | enum bfd_reloc_code_real reloc; |
3bcbcc3d | 103 | |
08caf3f8 | 104 | /* The size in bytes of an immediate expression, or zero if |
3bcbcc3d | 105 | nonapplicable. */ |
47926f60 | 106 | int imm_oprnd_size; |
3bcbcc3d HPN |
107 | }; |
108 | ||
109 | static void cris_process_instruction PARAMS ((char *, | |
110 | struct cris_instruction *, | |
111 | struct cris_prefix *)); | |
112 | static int get_bwd_size_modifier PARAMS ((char **, int *)); | |
113 | static int get_bw_size_modifier PARAMS ((char **, int *)); | |
114 | static int get_gen_reg PARAMS ((char **, int *)); | |
115 | static int get_spec_reg PARAMS ((char **, | |
116 | const struct cris_spec_reg **)); | |
117 | static int get_autoinc_prefix_or_indir_op PARAMS ((char **, | |
118 | struct cris_prefix *, | |
119 | int *, int *, int *, | |
120 | expressionS *)); | |
121 | static int get_3op_or_dip_prefix_op PARAMS ((char **, | |
122 | struct cris_prefix *)); | |
123 | static int cris_get_expression PARAMS ((char **, expressionS *)); | |
124 | static int get_flags PARAMS ((char **, int *)); | |
125 | static void gen_bdap PARAMS ((int, expressionS *)); | |
126 | static int branch_disp PARAMS ((int)); | |
127 | static void gen_cond_branch_32 PARAMS ((char *, char *, fragS *, | |
128 | symbolS *, symbolS *, long int)); | |
08caf3f8 | 129 | static void cris_number_to_imm PARAMS ((char *, long, int, fixS *, segT)); |
3bcbcc3d HPN |
130 | static void cris_create_short_jump PARAMS ((char *, addressT, addressT, |
131 | fragS *, symbolS *)); | |
7b15d668 | 132 | static void s_syntax PARAMS ((int)); |
fcdc20a4 HPN |
133 | static void s_cris_file PARAMS ((int)); |
134 | static void s_cris_loc PARAMS ((int)); | |
7b15d668 | 135 | |
08caf3f8 HPN |
136 | /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */ |
137 | static void cris_get_pic_suffix PARAMS ((char **, | |
138 | bfd_reloc_code_real_type *, | |
139 | expressionS *)); | |
140 | static unsigned int cris_get_pic_reloc_size | |
141 | PARAMS ((bfd_reloc_code_real_type)); | |
142 | ||
7b15d668 HPN |
143 | /* All the .syntax functions. */ |
144 | static void cris_force_reg_prefix PARAMS ((void)); | |
145 | static void cris_relax_reg_prefix PARAMS ((void)); | |
146 | static void cris_sym_leading_underscore PARAMS ((void)); | |
147 | static void cris_sym_no_leading_underscore PARAMS ((void)); | |
ed67db7a | 148 | static char *cris_insn_first_word_frag PARAMS ((void)); |
7b15d668 | 149 | |
3bcbcc3d HPN |
150 | /* Handle to the opcode hash table. */ |
151 | static struct hash_control *op_hash = NULL; | |
152 | ||
7b15d668 HPN |
153 | /* Whether we demand that registers have a `$' prefix. Default here. */ |
154 | static boolean demand_register_prefix = false; | |
155 | ||
156 | /* Whether global user symbols have a leading underscore. Default here. */ | |
157 | static boolean symbols_have_leading_underscore = true; | |
158 | ||
08caf3f8 HPN |
159 | /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */ |
160 | static boolean pic = false; | |
161 | ||
3bcbcc3d HPN |
162 | const pseudo_typeS md_pseudo_table[] = |
163 | { | |
164 | {"dword", cons, 4}, | |
7b15d668 | 165 | {"syntax", s_syntax, 0}, |
fcdc20a4 HPN |
166 | {"file", s_cris_file, 0}, |
167 | {"loc", s_cris_loc, 0}, | |
3bcbcc3d HPN |
168 | {NULL, 0, 0} |
169 | }; | |
170 | ||
171 | static int warn_for_branch_expansion = 0; | |
172 | ||
173 | const char cris_comment_chars[] = ";"; | |
174 | ||
175 | /* This array holds the chars that only start a comment at the beginning of | |
176 | a line. If the line seems to have the form '# 123 filename' | |
47926f60 | 177 | .line and .file directives will appear in the pre-processed output. */ |
3bcbcc3d HPN |
178 | /* Note that input_file.c hand-checks for '#' at the beginning of the |
179 | first line of the input file. This is because the compiler outputs | |
47926f60 KH |
180 | #NO_APP at the beginning of its output. */ |
181 | /* Also note that slash-star will always start a comment. */ | |
3bcbcc3d HPN |
182 | const char line_comment_chars[] = "#"; |
183 | const char line_separator_chars[] = "@"; | |
184 | ||
185 | /* Now all floating point support is shut off. See md_atof. */ | |
186 | const char EXP_CHARS[] = ""; | |
187 | const char FLT_CHARS[] = ""; | |
188 | ||
3bcbcc3d HPN |
189 | /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as: |
190 | 2 1 0 | |
191 | ---/ /--+-----------------+-----------------+-----------------+ | |
192 | | what state ? | how long ? | | |
193 | ---/ /--+-----------------+-----------------+-----------------+ | |
194 | ||
195 | The "how long" bits are 00 = byte, 01 = word, 10 = dword (long). | |
196 | This is a Un*x convention. | |
197 | Not all lengths are legit for a given value of (what state). | |
198 | ||
199 | Groups for CRIS address relaxing: | |
200 | ||
201 | 1. Bcc | |
202 | length: byte, word, 10-byte expansion | |
203 | ||
204 | 2. BDAP | |
47926f60 | 205 | length: byte, word, dword */ |
3bcbcc3d HPN |
206 | |
207 | #define STATE_CONDITIONAL_BRANCH (1) | |
208 | #define STATE_BASE_PLUS_DISP_PREFIX (2) | |
209 | ||
210 | #define STATE_LENGTH_MASK (3) | |
211 | #define STATE_BYTE (0) | |
212 | #define STATE_WORD (1) | |
213 | #define STATE_DWORD (2) | |
214 | /* Symbol undefined. */ | |
215 | #define STATE_UNDF (3) | |
216 | #define STATE_MAX_LENGTH (3) | |
217 | ||
3bcbcc3d HPN |
218 | /* These displacements are relative to the adress following the opcode |
219 | word of the instruction. The first letter is Byte, Word. The 2nd | |
220 | letter is Forward, Backward. */ | |
221 | ||
222 | #define BRANCH_BF ( 254) | |
223 | #define BRANCH_BB (-256) | |
47926f60 KH |
224 | #define BRANCH_WF (2 + 32767) |
225 | #define BRANCH_WB (2 + -32768) | |
3bcbcc3d HPN |
226 | |
227 | #define BDAP_BF ( 127) | |
228 | #define BDAP_BB (-128) | |
229 | #define BDAP_WF ( 32767) | |
230 | #define BDAP_WB (-32768) | |
231 | ||
232 | #define ENCODE_RELAX(what, length) (((what) << 2) + (length)) | |
233 | ||
234 | const relax_typeS md_cris_relax_table[] = | |
235 | { | |
236 | /* Error sentinel (0, 0). */ | |
237 | {1, 1, 0, 0}, | |
238 | ||
239 | /* Unused (0, 1). */ | |
240 | {1, 1, 0, 0}, | |
241 | ||
242 | /* Unused (0, 2). */ | |
243 | {1, 1, 0, 0}, | |
244 | ||
245 | /* Unused (0, 3). */ | |
246 | {1, 1, 0, 0}, | |
247 | ||
248 | /* Bcc o (1, 0). */ | |
249 | {BRANCH_BF, BRANCH_BB, 0, ENCODE_RELAX (1, 1)}, | |
250 | ||
47926f60 | 251 | /* Bcc [PC+] (1, 1). */ |
3bcbcc3d HPN |
252 | {BRANCH_WF, BRANCH_WB, 2, ENCODE_RELAX (1, 2)}, |
253 | ||
254 | /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default) | |
255 | (1, 2). */ | |
256 | {0, 0, 10, 0}, | |
257 | ||
258 | /* Unused (1, 3). */ | |
259 | {1, 1, 0, 0}, | |
260 | ||
261 | /* BDAP o (2, 0). */ | |
262 | {BDAP_BF, BDAP_BB, 0, ENCODE_RELAX (2, 1)}, | |
263 | ||
264 | /* BDAP.[bw] [PC+] (2, 1). */ | |
265 | {BDAP_WF, BDAP_WB, 2, ENCODE_RELAX (2, 2)}, | |
266 | ||
267 | /* BDAP.d [PC+] (2, 2). */ | |
268 | {0, 0, 4, 0} | |
269 | }; | |
270 | ||
271 | #undef BRANCH_BF | |
272 | #undef BRANCH_BB | |
273 | #undef BRANCH_WF | |
274 | #undef BRANCH_WB | |
275 | #undef BDAP_BF | |
276 | #undef BDAP_BB | |
277 | #undef BDAP_WF | |
278 | #undef BDAP_WB | |
279 | ||
3bcbcc3d HPN |
280 | /* Target-specific multicharacter options, not const-declared at usage |
281 | in 2.9.1 and CVS of 2000-02-16. */ | |
282 | struct option md_longopts[] = | |
283 | { | |
7b15d668 HPN |
284 | #define OPTION_NO_US (OPTION_MD_BASE + 0) |
285 | {"no-underscore", no_argument, NULL, OPTION_NO_US}, | |
286 | #define OPTION_US (OPTION_MD_BASE + 1) | |
287 | {"underscore", no_argument, NULL, OPTION_US}, | |
08caf3f8 HPN |
288 | #define OPTION_PIC (OPTION_MD_BASE + 2) |
289 | {"pic", no_argument, NULL, OPTION_PIC}, | |
3bcbcc3d HPN |
290 | {NULL, no_argument, NULL, 0} |
291 | }; | |
292 | ||
293 | /* Not const-declared at usage in 2.9.1. */ | |
294 | size_t md_longopts_size = sizeof (md_longopts); | |
295 | const char *md_shortopts = "hHN"; | |
296 | ||
3bcbcc3d HPN |
297 | /* At first glance, this may seems wrong and should be 4 (ba + nop); but |
298 | since a short_jump must skip a *number* of long jumps, it must also be | |
299 | a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop" | |
300 | for the delay slot and hope that the jump table at most needs | |
301 | 32767/4=8191 long-jumps. A branch is better than a jump, since it is | |
302 | relative; we will not have a reloc to fix up somewhere. | |
303 | ||
304 | Note that we can't add relocs, because relaxation uses these fixed | |
305 | numbers, and md_create_short_jump is called after relaxation. */ | |
306 | ||
307 | const int md_short_jump_size = 6; | |
308 | const int md_long_jump_size = 6; | |
309 | ||
7b15d668 | 310 | /* Report output format. Small changes in output format (like elf |
08caf3f8 HPN |
311 | variants below) can happen until all options are parsed, but after |
312 | that, the output format must remain fixed. */ | |
47926f60 | 313 | |
3bcbcc3d HPN |
314 | const char * |
315 | cris_target_format () | |
316 | { | |
317 | switch (OUTPUT_FLAVOR) | |
318 | { | |
319 | case bfd_target_aout_flavour: | |
320 | return "a.out-cris"; | |
321 | ||
322 | case bfd_target_elf_flavour: | |
7b15d668 HPN |
323 | if (symbols_have_leading_underscore) |
324 | return "elf32-us-cris"; | |
3bcbcc3d HPN |
325 | return "elf32-cris"; |
326 | ||
327 | default: | |
328 | abort (); | |
329 | return NULL; | |
330 | } | |
331 | } | |
332 | ||
333 | /* Prepare machine-dependent frags for relaxation. | |
334 | ||
335 | Called just before relaxation starts. Any symbol that is now undefined | |
336 | will not become defined. | |
337 | ||
338 | Return the correct fr_subtype in the frag. | |
339 | ||
340 | Return the initial "guess for fr_var" to caller. The guess for fr_var | |
341 | is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix | |
342 | or fr_var contributes to our returned value. | |
343 | ||
344 | Although it may not be explicit in the frag, pretend | |
47926f60 | 345 | fr_var starts with a value. */ |
3bcbcc3d HPN |
346 | |
347 | int | |
348 | md_estimate_size_before_relax (fragP, segment_type) | |
349 | fragS *fragP; | |
350 | /* The segment is either N_DATA or N_TEXT. */ | |
47926f60 | 351 | segT segment_type; |
3bcbcc3d | 352 | { |
47926f60 | 353 | int old_fr_fix; |
3bcbcc3d HPN |
354 | |
355 | old_fr_fix = fragP->fr_fix; | |
356 | ||
357 | switch (fragP->fr_subtype) | |
358 | { | |
359 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF): | |
360 | if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
c335d394 HPN |
361 | /* The symbol lies in the same segment - a relaxable case. */ |
362 | fragP->fr_subtype | |
363 | = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE); | |
3bcbcc3d | 364 | else |
c335d394 HPN |
365 | /* Unknown or not the same segment, so not relaxable. */ |
366 | fragP->fr_subtype | |
367 | = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD); | |
368 | fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length; | |
3bcbcc3d HPN |
369 | break; |
370 | ||
371 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF): | |
372 | /* Note that we can not do anything sane with relaxing | |
373 | [rX + a_known_symbol_in_text], it will have to be a 32-bit | |
374 | value. | |
375 | ||
376 | We could play tricks with managing a constant pool and make | |
08caf3f8 HPN |
377 | a_known_symbol_in_text a "bdap [pc + offset]" pointing there |
378 | (like the GOT for ELF shared libraries), but that's no use, it | |
379 | would in general be no shorter or faster code, only more | |
380 | complicated. */ | |
3bcbcc3d HPN |
381 | |
382 | if (S_GET_SEGMENT (fragP->fr_symbol) != absolute_section) | |
383 | { | |
384 | /* Go for dword if not absolute or same segment. */ | |
385 | fragP->fr_subtype | |
386 | = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD); | |
c335d394 | 387 | fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length; |
3bcbcc3d HPN |
388 | } |
389 | else | |
390 | { | |
391 | /* Absolute expression. */ | |
392 | long int value; | |
393 | value = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; | |
394 | ||
395 | if (value >= -128 && value <= 127) | |
396 | { | |
397 | /* Byte displacement. */ | |
398 | (fragP->fr_opcode)[0] = value; | |
399 | } | |
400 | else | |
401 | { | |
402 | /* Word or dword displacement. */ | |
403 | int pow2_of_size = 1; | |
404 | char *writep; | |
405 | ||
406 | if (value < -32768 || value > 32767) | |
407 | { | |
408 | /* Outside word range, make it a dword. */ | |
409 | pow2_of_size = 2; | |
410 | } | |
411 | ||
412 | /* Modify the byte-offset BDAP into a word or dword offset | |
413 | BDAP. Or really, a BDAP rX,8bit into a | |
07e90ad5 | 414 | BDAP.[wd] rX,[PC+] followed by a word or dword. */ |
3bcbcc3d HPN |
415 | (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16; |
416 | ||
417 | /* Keep the register number in the highest four bits. */ | |
418 | (fragP->fr_opcode)[1] &= 0xF0; | |
419 | (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH; | |
420 | ||
47926f60 | 421 | /* It grew by two or four bytes. */ |
3bcbcc3d HPN |
422 | fragP->fr_fix += 1 << pow2_of_size; |
423 | writep = fragP->fr_literal + old_fr_fix; | |
424 | md_number_to_chars (writep, value, 1 << pow2_of_size); | |
425 | } | |
426 | frag_wane (fragP); | |
427 | } | |
428 | break; | |
429 | ||
c335d394 HPN |
430 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): |
431 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): | |
432 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD): | |
433 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE): | |
434 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD): | |
93c2a809 AM |
435 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD): |
436 | /* When relaxing a section for the second time, we don't need to | |
c335d394 HPN |
437 | do anything except making sure that fr_var is set right. */ |
438 | fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length; | |
93c2a809 AM |
439 | break; |
440 | ||
3bcbcc3d HPN |
441 | default: |
442 | BAD_CASE (fragP->fr_subtype); | |
443 | } | |
444 | ||
445 | return fragP->fr_var + (fragP->fr_fix - old_fr_fix); | |
446 | } | |
447 | ||
3bcbcc3d HPN |
448 | /* Perform post-processing of machine-dependent frags after relaxation. |
449 | Called after relaxation is finished. | |
450 | In: Address of frag. | |
451 | fr_type == rs_machine_dependent. | |
452 | fr_subtype is what the address relaxed to. | |
453 | ||
454 | Out: Any fixS:s and constants are set up. | |
455 | ||
456 | The caller will turn the frag into a ".space 0". */ | |
457 | ||
458 | void | |
459 | md_convert_frag (abfd, sec, fragP) | |
460 | bfd *abfd ATTRIBUTE_UNUSED; | |
461 | segT sec ATTRIBUTE_UNUSED; | |
462 | fragS *fragP; | |
463 | { | |
47926f60 | 464 | /* Pointer to first byte in variable-sized part of the frag. */ |
3bcbcc3d HPN |
465 | char *var_partp; |
466 | ||
467 | /* Pointer to first opcode byte in frag. */ | |
468 | char *opcodep; | |
469 | ||
470 | /* Used to check integrity of the relaxation. | |
471 | One of 2 = long, 1 = word, or 0 = byte. */ | |
472 | int length_code; | |
473 | ||
474 | /* Size in bytes of variable-sized part of frag. */ | |
475 | int var_part_size = 0; | |
476 | ||
477 | /* This is part of *fragP. It contains all information about addresses | |
478 | and offsets to varying parts. */ | |
479 | symbolS *symbolP; | |
480 | unsigned long var_part_offset; | |
481 | ||
482 | /* Where, in file space, is _var of *fragP? */ | |
483 | unsigned long address_of_var_part = 0; | |
484 | ||
485 | /* Where, in file space, does addr point? */ | |
486 | unsigned long target_address; | |
487 | ||
488 | know (fragP->fr_type == rs_machine_dependent); | |
489 | ||
490 | length_code = fragP->fr_subtype & STATE_LENGTH_MASK; | |
491 | know (length_code >= 0 && length_code < STATE_MAX_LENGTH); | |
492 | ||
493 | var_part_offset = fragP->fr_fix; | |
494 | var_partp = fragP->fr_literal + var_part_offset; | |
495 | opcodep = fragP->fr_opcode; | |
496 | ||
497 | symbolP = fragP->fr_symbol; | |
ac62c346 | 498 | target_address = (symbolP ? S_GET_VALUE (symbolP) : 0) + fragP->fr_offset; |
3bcbcc3d HPN |
499 | address_of_var_part = fragP->fr_address + var_part_offset; |
500 | ||
501 | switch (fragP->fr_subtype) | |
47926f60 KH |
502 | { |
503 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): | |
504 | opcodep[0] = branch_disp ((target_address - address_of_var_part)); | |
505 | var_part_size = 0; | |
506 | break; | |
3bcbcc3d | 507 | |
47926f60 KH |
508 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): |
509 | /* We had a quick immediate branch, now turn it into a word one i.e. a | |
510 | PC autoincrement. */ | |
511 | opcodep[0] = BRANCH_PC_LOW; | |
512 | opcodep[1] &= 0xF0; | |
513 | opcodep[1] |= BRANCH_INCR_HIGH; | |
514 | md_number_to_chars (var_partp, | |
515 | (long) (target_address - (address_of_var_part + 2)), | |
516 | 2); | |
517 | var_part_size = 2; | |
518 | break; | |
519 | ||
520 | case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD): | |
521 | gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP, | |
522 | fragP->fr_symbol, (symbolS *) NULL, | |
523 | fragP->fr_offset); | |
524 | /* Ten bytes added: a branch, nop and a jump. */ | |
525 | var_part_size = 2 + 2 + 4 + 2; | |
526 | break; | |
3bcbcc3d | 527 | |
47926f60 KH |
528 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE): |
529 | var_partp[0] = target_address - (address_of_var_part + 1); | |
530 | var_part_size = 0; | |
531 | break; | |
532 | ||
533 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD): | |
534 | /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit | |
535 | one that uses PC autoincrement. */ | |
536 | opcodep[0] = BDAP_PC_LOW + (1 << 4); | |
537 | opcodep[1] &= 0xF0; | |
538 | opcodep[1] |= BDAP_INCR_HIGH; | |
539 | md_number_to_chars (var_partp, (long) (target_address), 2); | |
540 | var_part_size = 2; | |
541 | break; | |
542 | ||
543 | case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD): | |
544 | /* We had a BDAP 16-bit "word", change the offset to a dword. */ | |
545 | opcodep[0] = BDAP_PC_LOW + (2 << 4); | |
546 | opcodep[1] &= 0xF0; | |
547 | opcodep[1] |= BDAP_INCR_HIGH; | |
548 | if (fragP->fr_symbol == NULL) | |
549 | md_number_to_chars (var_partp, fragP->fr_offset, 4); | |
550 | else | |
551 | fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol, | |
552 | fragP->fr_offset, 0, BFD_RELOC_32); | |
553 | var_part_size = 4; | |
554 | break; | |
555 | ||
556 | default: | |
557 | BAD_CASE (fragP->fr_subtype); | |
558 | break; | |
559 | } | |
560 | ||
561 | fragP->fr_fix += var_part_size; | |
3bcbcc3d HPN |
562 | } |
563 | ||
564 | /* Generate a short jump around a secondary jump table. | |
565 | Used by md_create_long_jump. | |
566 | ||
567 | This used to be md_create_short_jump, but is now called from | |
568 | md_create_long_jump instead, when sufficient. | |
569 | since the sizes of the jumps are the same. It used to be brittle, | |
47926f60 | 570 | making possibilities for creating bad code. */ |
3bcbcc3d HPN |
571 | |
572 | static void | |
573 | cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol) | |
574 | char *storep; | |
575 | addressT from_addr; | |
576 | addressT to_addr; | |
577 | fragS *fragP ATTRIBUTE_UNUSED; | |
578 | symbolS *to_symbol ATTRIBUTE_UNUSED; | |
579 | { | |
580 | long int distance; | |
581 | ||
582 | distance = to_addr - from_addr; | |
583 | ||
584 | if (-254 <= distance && distance <= 256) | |
585 | { | |
586 | /* Create a "short" short jump: "BA distance - 2". */ | |
47926f60 | 587 | storep[0] = branch_disp (distance - 2); |
3bcbcc3d HPN |
588 | storep[1] = BA_QUICK_HIGH; |
589 | ||
590 | /* A nop for the delay slot. */ | |
47926f60 | 591 | md_number_to_chars (storep + 2, NOP_OPCODE, 2); |
3bcbcc3d HPN |
592 | |
593 | /* The extra word should be filled with something sane too. Make it | |
594 | a nop to keep disassembly sane. */ | |
47926f60 | 595 | md_number_to_chars (storep + 4, NOP_OPCODE, 2); |
3bcbcc3d HPN |
596 | } |
597 | else | |
598 | { | |
599 | /* Make it a "long" short jump: "BA (PC+)". */ | |
600 | md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2); | |
601 | ||
47926f60 | 602 | /* ".WORD distance - 4". */ |
3bcbcc3d HPN |
603 | md_number_to_chars (storep + 2, (long) (distance - 4), 2); |
604 | ||
605 | /* A nop for the delay slot. */ | |
47926f60 | 606 | md_number_to_chars (storep + 4, NOP_OPCODE, 2); |
3bcbcc3d HPN |
607 | } |
608 | } | |
609 | ||
3bcbcc3d HPN |
610 | /* Generate a long jump in a secondary jump table. |
611 | ||
612 | storep Where to store the jump instruction. | |
613 | from_addr Address of the jump instruction. | |
614 | to_addr Destination address of the jump. | |
615 | fragP Which frag the destination address operand | |
616 | lies in. | |
617 | to_symbol Destination symbol. */ | |
618 | ||
619 | void | |
620 | md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol) | |
621 | char *storep; | |
622 | addressT from_addr; | |
623 | addressT to_addr; | |
624 | fragS *fragP; | |
625 | symbolS *to_symbol; | |
626 | { | |
627 | long int distance; | |
628 | ||
629 | distance = to_addr - from_addr; | |
630 | ||
631 | if (-32763 <= distance && distance <= 32772) | |
632 | { | |
633 | /* Then make it a "short" long jump. */ | |
634 | cris_create_short_jump (storep, from_addr, to_addr, fragP, | |
635 | to_symbol); | |
636 | } | |
637 | else | |
638 | { | |
08caf3f8 HPN |
639 | /* We have a "long" long jump: "JUMP [PC+]". |
640 | Make it an "ADD [PC+],PC" if we're supposed to emit PIC code. */ | |
641 | md_number_to_chars (storep, | |
642 | pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2); | |
3bcbcc3d | 643 | |
08caf3f8 | 644 | /* Follow with a ".DWORD to_addr", PC-relative for PIC. */ |
3bcbcc3d | 645 | fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol, |
08caf3f8 | 646 | 0, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32); |
3bcbcc3d HPN |
647 | } |
648 | } | |
649 | ||
ed67db7a HPN |
650 | /* Allocate space for the first piece of an insn, and mark it as the |
651 | start of the insn for debug-format use. */ | |
652 | ||
653 | static char * | |
654 | cris_insn_first_word_frag () | |
655 | { | |
656 | char *insnp = frag_more (2); | |
657 | ||
658 | /* We need to mark the start of the insn by passing dwarf2_emit_insn | |
659 | the offset from the current fragment position. This must be done | |
660 | after the first fragment is created but before any other fragments | |
661 | (fixed or varying) are created. Note that the offset only | |
662 | corresponds to the "size" of the insn for a fixed-size, | |
663 | non-expanded insn. */ | |
664 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
665 | dwarf2_emit_insn (2); | |
666 | ||
667 | return insnp; | |
668 | } | |
669 | ||
3bcbcc3d | 670 | /* Port-specific assembler initialization. */ |
47926f60 | 671 | |
3bcbcc3d HPN |
672 | void |
673 | md_begin () | |
674 | { | |
675 | const char *hashret = NULL; | |
676 | int i = 0; | |
677 | ||
47926f60 | 678 | /* Set up a hash table for the instructions. */ |
3bcbcc3d HPN |
679 | op_hash = hash_new (); |
680 | if (op_hash == NULL) | |
681 | as_fatal (_("Virtual memory exhausted")); | |
682 | ||
683 | while (cris_opcodes[i].name != NULL) | |
684 | { | |
685 | const char *name = cris_opcodes[i].name; | |
686 | hashret = hash_insert (op_hash, name, (PTR) &cris_opcodes[i]); | |
687 | ||
688 | if (hashret != NULL && *hashret != '\0') | |
689 | as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name, | |
47926f60 | 690 | *hashret == 0 ? _("(unknown reason)") : hashret); |
3bcbcc3d HPN |
691 | do |
692 | { | |
693 | if (cris_opcodes[i].match & cris_opcodes[i].lose) | |
694 | as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes[i].name, | |
695 | cris_opcodes[i].args); | |
696 | ||
697 | ++i; | |
47926f60 KH |
698 | } |
699 | while (cris_opcodes[i].name != NULL | |
700 | && strcmp (cris_opcodes[i].name, name) == 0); | |
3bcbcc3d HPN |
701 | } |
702 | } | |
703 | ||
3bcbcc3d | 704 | /* Assemble a source line. */ |
47926f60 | 705 | |
3bcbcc3d HPN |
706 | void |
707 | md_assemble (str) | |
708 | char *str; | |
709 | { | |
710 | struct cris_instruction output_instruction; | |
711 | struct cris_prefix prefix; | |
712 | char *opcodep; | |
713 | char *p; | |
714 | ||
715 | know (str); | |
716 | ||
717 | /* Do the low-level grunt - assemble to bits and split up into a prefix | |
718 | and ordinary insn. */ | |
719 | cris_process_instruction (str, &output_instruction, &prefix); | |
720 | ||
721 | /* Handle any prefixes to the instruction. */ | |
722 | switch (prefix.kind) | |
723 | { | |
724 | case PREFIX_NONE: | |
725 | break; | |
726 | ||
727 | /* When the expression is unknown for a BDAP, it can need 0, 2 or 4 | |
728 | extra bytes, so we handle it separately. */ | |
729 | case PREFIX_BDAP_IMM: | |
08caf3f8 HPN |
730 | /* We only do it if the relocation is unspecified, i.e. not a PIC |
731 | relocation. */ | |
732 | if (prefix.reloc == BFD_RELOC_NONE) | |
733 | { | |
734 | gen_bdap (prefix.base_reg_number, &prefix.expr); | |
735 | break; | |
736 | } | |
737 | /* Fall through. */ | |
3bcbcc3d HPN |
738 | case PREFIX_BDAP: |
739 | case PREFIX_BIAP: | |
740 | case PREFIX_DIP: | |
ed67db7a | 741 | opcodep = cris_insn_first_word_frag (); |
3bcbcc3d HPN |
742 | |
743 | /* Output the prefix opcode. */ | |
744 | md_number_to_chars (opcodep, (long) prefix.opcode, 2); | |
745 | ||
08caf3f8 HPN |
746 | /* Having a specified reloc only happens for DIP and for BDAP with |
747 | PIC operands, but it is ok to drop through here for the other | |
748 | prefixes as they can have no relocs specified. */ | |
3bcbcc3d HPN |
749 | if (prefix.reloc != BFD_RELOC_NONE) |
750 | { | |
08caf3f8 HPN |
751 | unsigned int relocsize |
752 | = (prefix.kind == PREFIX_DIP | |
753 | ? 4 : cris_get_pic_reloc_size (prefix.reloc)); | |
754 | ||
08caf3f8 HPN |
755 | p = frag_more (relocsize); |
756 | fix_new_exp (frag_now, (p - frag_now->fr_literal), relocsize, | |
3bcbcc3d HPN |
757 | &prefix.expr, 0, prefix.reloc); |
758 | } | |
759 | break; | |
760 | ||
761 | case PREFIX_PUSH: | |
ed67db7a | 762 | opcodep = cris_insn_first_word_frag (); |
3bcbcc3d HPN |
763 | |
764 | /* Output the prefix opcode. Being a "push", we add the negative | |
765 | size of the register to "sp". */ | |
766 | if (output_instruction.spec_reg != NULL) | |
767 | { | |
47926f60 | 768 | /* Special register. */ |
3bcbcc3d HPN |
769 | opcodep[0] = -output_instruction.spec_reg->reg_size; |
770 | } | |
771 | else | |
772 | { | |
47926f60 | 773 | /* General register. */ |
3bcbcc3d HPN |
774 | opcodep[0] = -4; |
775 | } | |
776 | opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8); | |
777 | break; | |
778 | ||
779 | default: | |
780 | BAD_CASE (prefix.kind); | |
781 | } | |
782 | ||
783 | /* If we only had a prefix insn, we're done. */ | |
784 | if (output_instruction.insn_type == CRIS_INSN_NONE) | |
785 | return; | |
786 | ||
787 | /* Done with the prefix. Continue with the main instruction. */ | |
ed67db7a HPN |
788 | if (prefix.kind == PREFIX_NONE) |
789 | opcodep = cris_insn_first_word_frag (); | |
790 | else | |
791 | opcodep = frag_more (2); | |
3bcbcc3d HPN |
792 | |
793 | /* Output the instruction opcode. */ | |
47926f60 | 794 | md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2); |
3bcbcc3d HPN |
795 | |
796 | /* Output the symbol-dependent instruction stuff. */ | |
797 | if (output_instruction.insn_type == CRIS_INSN_BRANCH) | |
798 | { | |
799 | segT to_seg = absolute_section; | |
800 | int is_undefined = 0; | |
801 | int length_code; | |
802 | ||
803 | if (output_instruction.expr.X_op != O_constant) | |
804 | { | |
805 | to_seg = S_GET_SEGMENT (output_instruction.expr.X_add_symbol); | |
806 | ||
807 | if (to_seg == undefined_section) | |
808 | is_undefined = 1; | |
809 | } | |
810 | ||
811 | if (output_instruction.expr.X_op == O_constant | |
812 | || to_seg == now_seg || is_undefined) | |
813 | { | |
08caf3f8 HPN |
814 | /* Handle complex expressions. */ |
815 | valueT addvalue | |
816 | = (output_instruction.expr.X_op_symbol != NULL | |
817 | ? 0 : output_instruction.expr.X_add_number); | |
818 | symbolS *sym | |
819 | = (output_instruction.expr.X_op_symbol != NULL | |
820 | ? make_expr_symbol (&output_instruction.expr) | |
821 | : output_instruction.expr.X_add_symbol); | |
822 | ||
3bcbcc3d | 823 | /* If is_undefined, then the expression may BECOME now_seg. */ |
47926f60 | 824 | length_code = is_undefined ? STATE_UNDF : STATE_BYTE; |
3bcbcc3d HPN |
825 | |
826 | /* Make room for max ten bytes of variable length. */ | |
827 | frag_var (rs_machine_dependent, 10, 0, | |
828 | ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code), | |
08caf3f8 | 829 | sym, addvalue, opcodep); |
3bcbcc3d HPN |
830 | } |
831 | else | |
832 | { | |
833 | /* We have: to_seg != now_seg && to_seg != undefined_section. | |
834 | This means it is a branch to a known symbol in another | |
835 | section. Code in data? Weird but valid. Emit a 32-bit | |
836 | branch. */ | |
08caf3f8 HPN |
837 | char *cond_jump = frag_more (10); |
838 | ||
08caf3f8 | 839 | gen_cond_branch_32 (opcodep, cond_jump, frag_now, |
3bcbcc3d | 840 | output_instruction.expr.X_add_symbol, |
47926f60 | 841 | (symbolS *) NULL, |
3bcbcc3d HPN |
842 | output_instruction.expr.X_add_number); |
843 | } | |
844 | } | |
845 | else | |
846 | { | |
847 | if (output_instruction.imm_oprnd_size > 0) | |
848 | { | |
849 | /* The intruction has an immediate operand. */ | |
08caf3f8 | 850 | enum bfd_reloc_code_real reloc = BFD_RELOC_NONE; |
3bcbcc3d HPN |
851 | |
852 | switch (output_instruction.imm_oprnd_size) | |
853 | { | |
854 | /* Any byte-size immediate constants are treated as | |
855 | word-size. FIXME: Thus overflow check does not work | |
856 | correctly. */ | |
857 | ||
858 | case 2: | |
08caf3f8 HPN |
859 | /* Note that size-check for the explicit reloc has already |
860 | been done when we get here. */ | |
861 | if (output_instruction.reloc != BFD_RELOC_NONE) | |
862 | reloc = output_instruction.reloc; | |
863 | else | |
864 | reloc = BFD_RELOC_16; | |
3bcbcc3d HPN |
865 | break; |
866 | ||
867 | case 4: | |
08caf3f8 HPN |
868 | /* Allow a relocation specified in the operand. */ |
869 | if (output_instruction.reloc != BFD_RELOC_NONE) | |
870 | reloc = output_instruction.reloc; | |
871 | else | |
872 | reloc = BFD_RELOC_32; | |
3bcbcc3d HPN |
873 | break; |
874 | ||
875 | default: | |
876 | BAD_CASE (output_instruction.imm_oprnd_size); | |
877 | } | |
878 | ||
879 | p = frag_more (output_instruction.imm_oprnd_size); | |
880 | fix_new_exp (frag_now, (p - frag_now->fr_literal), | |
881 | output_instruction.imm_oprnd_size, | |
882 | &output_instruction.expr, 0, reloc); | |
883 | } | |
884 | else if (output_instruction.reloc != BFD_RELOC_NONE) | |
885 | { | |
886 | /* An immediate operand that has a relocation and needs to be | |
47926f60 | 887 | processed further. */ |
3bcbcc3d HPN |
888 | |
889 | /* It is important to use fix_new_exp here and everywhere else | |
890 | (and not fix_new), as fix_new_exp can handle "difference | |
891 | expressions" - where the expression contains a difference of | |
892 | two symbols in the same segment. */ | |
893 | fix_new_exp (frag_now, (opcodep - frag_now->fr_literal), 2, | |
894 | &output_instruction.expr, 0, | |
895 | output_instruction.reloc); | |
896 | } | |
897 | } | |
898 | } | |
899 | ||
3bcbcc3d | 900 | /* Low level text-to-bits assembly. */ |
47926f60 | 901 | |
3bcbcc3d HPN |
902 | static void |
903 | cris_process_instruction (insn_text, out_insnp, prefixp) | |
904 | char *insn_text; | |
47926f60 | 905 | struct cris_instruction *out_insnp; |
3bcbcc3d HPN |
906 | struct cris_prefix *prefixp; |
907 | { | |
47926f60 KH |
908 | char *s; |
909 | char modified_char = 0; | |
910 | const char *args; | |
3bcbcc3d | 911 | struct cris_opcode *instruction; |
47926f60 KH |
912 | char *operands; |
913 | int match = 0; | |
914 | int mode; | |
915 | int regno; | |
916 | int size_bits; | |
3bcbcc3d HPN |
917 | |
918 | /* Reset these fields to a harmless state in case we need to return in | |
919 | error. */ | |
920 | prefixp->kind = PREFIX_NONE; | |
921 | prefixp->reloc = BFD_RELOC_NONE; | |
922 | out_insnp->insn_type = CRIS_INSN_NORMAL; | |
923 | out_insnp->imm_oprnd_size = 0; | |
924 | ||
925 | /* Find the end of the opcode mnemonic. We assume (true in 2.9.1) | |
926 | that the caller has translated the opcode to lower-case, up to the | |
47926f60 KH |
927 | first non-letter. */ |
928 | for (operands = insn_text; islower (*operands); ++operands) | |
3bcbcc3d HPN |
929 | ; |
930 | ||
931 | /* Terminate the opcode after letters, but save the character there if | |
932 | it was of significance. */ | |
933 | switch (*operands) | |
934 | { | |
935 | case '\0': | |
936 | break; | |
937 | ||
938 | case '.': | |
47926f60 | 939 | /* Put back the modified character later. */ |
3bcbcc3d | 940 | modified_char = *operands; |
47926f60 | 941 | /* Fall through. */ |
3bcbcc3d HPN |
942 | |
943 | case ' ': | |
47926f60 KH |
944 | /* Consume the character after the mnemonic |
945 | and replace it with '\0'. */ | |
3bcbcc3d HPN |
946 | *operands++ = '\0'; |
947 | break; | |
948 | ||
949 | default: | |
950 | as_bad (_("Unknown opcode: `%s'"), insn_text); | |
951 | return; | |
952 | } | |
953 | ||
954 | /* Find the instruction. */ | |
955 | instruction = (struct cris_opcode *) hash_find (op_hash, insn_text); | |
956 | if (instruction == NULL) | |
957 | { | |
958 | as_bad (_("Unknown opcode: `%s'"), insn_text); | |
959 | return; | |
960 | } | |
961 | ||
962 | /* Put back the modified character. */ | |
963 | switch (modified_char) | |
964 | { | |
965 | case 0: | |
966 | break; | |
967 | ||
968 | default: | |
969 | *--operands = modified_char; | |
970 | } | |
971 | ||
3bcbcc3d | 972 | /* Try to match an opcode table slot. */ |
47926f60 | 973 | for (s = operands;;) |
3bcbcc3d | 974 | { |
47926f60 | 975 | int imm_expr_found; |
3bcbcc3d HPN |
976 | |
977 | /* Initialize *prefixp, perhaps after being modified for a | |
47926f60 | 978 | "near match". */ |
3bcbcc3d HPN |
979 | prefixp->kind = PREFIX_NONE; |
980 | prefixp->reloc = BFD_RELOC_NONE; | |
981 | ||
982 | /* Initialize *out_insnp. */ | |
983 | memset (out_insnp, 0, sizeof (*out_insnp)); | |
984 | out_insnp->opcode = instruction->match; | |
985 | out_insnp->reloc = BFD_RELOC_NONE; | |
986 | out_insnp->insn_type = CRIS_INSN_NORMAL; | |
987 | out_insnp->imm_oprnd_size = 0; | |
988 | ||
989 | imm_expr_found = 0; | |
990 | ||
991 | /* Build the opcode, checking as we go to make sure that the | |
992 | operands match. */ | |
47926f60 | 993 | for (args = instruction->args;; ++args) |
3bcbcc3d HPN |
994 | { |
995 | switch (*args) | |
996 | { | |
997 | case '\0': | |
998 | /* If we've come to the end of arguments, we're done. */ | |
999 | if (*s == '\0') | |
1000 | match = 1; | |
1001 | break; | |
1002 | ||
1003 | case '!': | |
1004 | /* Non-matcher character for disassembly. | |
1005 | Ignore it here. */ | |
1006 | continue; | |
1007 | ||
1008 | case ',': | |
1009 | case ' ': | |
1010 | /* These must match exactly. */ | |
1011 | if (*s++ == *args) | |
1012 | continue; | |
1013 | break; | |
1014 | ||
1015 | case 'B': | |
1016 | /* This is not really an operand, but causes a "BDAP | |
47926f60 | 1017 | -size,SP" prefix to be output, for PUSH instructions. */ |
3bcbcc3d HPN |
1018 | prefixp->kind = PREFIX_PUSH; |
1019 | continue; | |
1020 | ||
1021 | case 'b': | |
1022 | /* This letter marks an operand that should not be matched | |
1023 | in the assembler. It is a branch with 16-bit | |
1024 | displacement. The assembler will create them from the | |
1025 | 8-bit flavor when necessary. The assembler does not | |
1026 | support the [rN+] operand, as the [r15+] that is | |
1027 | generated for 16-bit displacements. */ | |
1028 | break; | |
1029 | ||
1030 | case 'c': | |
1031 | /* A 5-bit unsigned immediate in bits <4:0>. */ | |
1032 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1033 | break; | |
1034 | else | |
1035 | { | |
1036 | if (out_insnp->expr.X_op == O_constant | |
1037 | && (out_insnp->expr.X_add_number < 0 | |
1038 | || out_insnp->expr.X_add_number > 31)) | |
1039 | as_bad (_("Immediate value not in 5 bit unsigned range: %ld"), | |
1040 | out_insnp->expr.X_add_number); | |
1041 | ||
1042 | out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_5; | |
1043 | continue; | |
1044 | } | |
1045 | ||
1046 | case 'C': | |
1047 | /* A 4-bit unsigned immediate in bits <3:0>. */ | |
1048 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1049 | break; | |
1050 | else | |
1051 | { | |
1052 | if (out_insnp->expr.X_op == O_constant | |
1053 | && (out_insnp->expr.X_add_number < 0 | |
1054 | || out_insnp->expr.X_add_number > 15)) | |
1055 | as_bad (_("Immediate value not in 4 bit unsigned range: %ld"), | |
1056 | out_insnp->expr.X_add_number); | |
1057 | ||
1058 | out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_4; | |
1059 | continue; | |
1060 | } | |
1061 | ||
1062 | case 'D': | |
1063 | /* General register in bits <15:12> and <3:0>. */ | |
1064 | if (! get_gen_reg (&s, ®no)) | |
1065 | break; | |
1066 | else | |
1067 | { | |
1068 | out_insnp->opcode |= regno /* << 0 */; | |
1069 | out_insnp->opcode |= regno << 12; | |
1070 | continue; | |
1071 | } | |
1072 | ||
1073 | case 'f': | |
1074 | /* Flags from the condition code register. */ | |
1075 | { | |
1076 | int flags = 0; | |
1077 | ||
1078 | if (! get_flags (&s, &flags)) | |
1079 | break; | |
1080 | ||
47926f60 | 1081 | out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf); |
3bcbcc3d HPN |
1082 | continue; |
1083 | } | |
1084 | ||
1085 | case 'i': | |
1086 | /* A 6-bit signed immediate in bits <5:0>. */ | |
1087 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1088 | break; | |
1089 | else | |
1090 | { | |
1091 | if (out_insnp->expr.X_op == O_constant | |
1092 | && (out_insnp->expr.X_add_number < -32 | |
1093 | || out_insnp->expr.X_add_number > 31)) | |
1094 | as_bad (_("Immediate value not in 6 bit range: %ld"), | |
1095 | out_insnp->expr.X_add_number); | |
1096 | out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_6; | |
1097 | continue; | |
1098 | } | |
1099 | ||
1100 | case 'I': | |
1101 | /* A 6-bit unsigned immediate in bits <5:0>. */ | |
1102 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1103 | break; | |
1104 | else | |
1105 | { | |
1106 | if (out_insnp->expr.X_op == O_constant | |
1107 | && (out_insnp->expr.X_add_number < 0 | |
1108 | || out_insnp->expr.X_add_number > 63)) | |
1109 | as_bad (_("Immediate value not in 6 bit unsigned range: %ld"), | |
1110 | out_insnp->expr.X_add_number); | |
1111 | out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_6; | |
1112 | continue; | |
1113 | } | |
1114 | ||
1115 | case 'M': | |
1116 | /* A size modifier, B, W or D, to be put in a bit position | |
1117 | suitable for CLEAR instructions (i.e. reflecting a zero | |
1118 | register). */ | |
1119 | if (! get_bwd_size_modifier (&s, &size_bits)) | |
1120 | break; | |
1121 | else | |
1122 | { | |
1123 | switch (size_bits) | |
1124 | { | |
1125 | case 0: | |
1126 | out_insnp->opcode |= 0 << 12; | |
1127 | break; | |
1128 | ||
1129 | case 1: | |
1130 | out_insnp->opcode |= 4 << 12; | |
1131 | break; | |
1132 | ||
1133 | case 2: | |
1134 | out_insnp->opcode |= 8 << 12; | |
1135 | break; | |
1136 | } | |
1137 | continue; | |
1138 | } | |
1139 | ||
1140 | case 'm': | |
1141 | /* A size modifier, B, W or D, to be put in bits <5:4>. */ | |
1142 | if (! get_bwd_size_modifier (&s, &size_bits)) | |
1143 | break; | |
1144 | else | |
1145 | { | |
1146 | out_insnp->opcode |= size_bits << 4; | |
1147 | continue; | |
1148 | } | |
1149 | ||
1150 | case 'o': | |
1151 | /* A branch expression. */ | |
1152 | if (! cris_get_expression (&s, &out_insnp->expr)) | |
1153 | break; | |
1154 | else | |
1155 | { | |
1156 | out_insnp->insn_type = CRIS_INSN_BRANCH; | |
1157 | continue; | |
1158 | } | |
1159 | ||
1160 | case 'O': | |
1161 | /* A BDAP expression for any size, "expr,r". */ | |
1162 | if (! cris_get_expression (&s, &prefixp->expr)) | |
1163 | break; | |
1164 | else | |
1165 | { | |
1166 | if (*s != ',') | |
1167 | break; | |
1168 | ||
1169 | s++; | |
1170 | ||
1171 | if (!get_gen_reg (&s, &prefixp->base_reg_number)) | |
1172 | break; | |
1173 | ||
1174 | /* Since 'O' is used with an explicit bdap, we have no | |
47926f60 | 1175 | "real" instruction. */ |
3bcbcc3d | 1176 | prefixp->kind = PREFIX_BDAP_IMM; |
08caf3f8 HPN |
1177 | prefixp->opcode |
1178 | = BDAP_QUICK_OPCODE | (prefixp->base_reg_number << 12); | |
1179 | ||
3bcbcc3d HPN |
1180 | out_insnp->insn_type = CRIS_INSN_NONE; |
1181 | continue; | |
1182 | } | |
1183 | ||
1184 | case 'P': | |
1185 | /* Special register in bits <15:12>. */ | |
1186 | if (! get_spec_reg (&s, &out_insnp->spec_reg)) | |
1187 | break; | |
1188 | else | |
1189 | { | |
1190 | /* Use of some special register names come with a | |
1191 | specific warning. Note that we have no ".cpu type" | |
1192 | pseudo yet, so some of this is just unused | |
1193 | framework. */ | |
1194 | if (out_insnp->spec_reg->warning) | |
1195 | as_warn (out_insnp->spec_reg->warning); | |
1196 | else if (out_insnp->spec_reg->applicable_version | |
1197 | == cris_ver_warning) | |
1198 | /* Others have a generic warning. */ | |
1199 | as_warn (_("Unimplemented register `%s' specified"), | |
1200 | out_insnp->spec_reg->name); | |
1201 | ||
1202 | out_insnp->opcode | |
1203 | |= out_insnp->spec_reg->number << 12; | |
1204 | continue; | |
1205 | } | |
1206 | ||
1207 | case 'p': | |
1208 | /* This character is used in the disassembler to | |
1209 | recognize a prefix instruction to fold into the | |
1210 | addressing mode for the next instruction. It is | |
47926f60 | 1211 | ignored here. */ |
3bcbcc3d HPN |
1212 | continue; |
1213 | ||
1214 | case 'R': | |
1215 | /* General register in bits <15:12>. */ | |
1216 | if (! get_gen_reg (&s, ®no)) | |
1217 | break; | |
1218 | else | |
1219 | { | |
1220 | out_insnp->opcode |= regno << 12; | |
1221 | continue; | |
1222 | } | |
1223 | ||
1224 | case 'r': | |
1225 | /* General register in bits <3:0>. */ | |
1226 | if (! get_gen_reg (&s, ®no)) | |
1227 | break; | |
1228 | else | |
1229 | { | |
1230 | out_insnp->opcode |= regno /* << 0 */; | |
1231 | continue; | |
1232 | } | |
1233 | ||
1234 | case 'S': | |
1235 | /* Source operand in bit <10> and a prefix; a 3-operand | |
1236 | prefix. */ | |
1237 | if (! get_3op_or_dip_prefix_op (&s, prefixp)) | |
1238 | break; | |
1239 | else | |
1240 | continue; | |
1241 | ||
1242 | case 's': | |
1243 | /* Source operand in bits <10>, <3:0> and optionally a | |
1244 | prefix; i.e. an indirect operand or an side-effect | |
1245 | prefix. */ | |
1246 | if (! get_autoinc_prefix_or_indir_op (&s, prefixp, &mode, | |
1247 | ®no, | |
1248 | &imm_expr_found, | |
1249 | &out_insnp->expr)) | |
1250 | break; | |
1251 | else | |
1252 | { | |
1253 | if (prefixp->kind != PREFIX_NONE) | |
1254 | { | |
1255 | /* A prefix, so it has the autoincrement bit | |
1256 | set. */ | |
1257 | out_insnp->opcode |= (AUTOINCR_BIT << 8); | |
1258 | } | |
1259 | else | |
08caf3f8 HPN |
1260 | { |
1261 | /* No prefix. The "mode" variable contains bits like | |
1262 | whether or not this is autoincrement mode. */ | |
1263 | out_insnp->opcode |= (mode << 10); | |
1264 | ||
1265 | /* If there was a PIC reloc specifier, then it was | |
1266 | attached to the prefix. Note that we can't check | |
1267 | that the reloc size matches, since we don't have | |
1268 | all the operands yet in all cases. */ | |
1269 | if (prefixp->reloc != BFD_RELOC_NONE) | |
1270 | out_insnp->reloc = prefixp->reloc; | |
1271 | } | |
3bcbcc3d HPN |
1272 | |
1273 | out_insnp->opcode |= regno /* << 0 */ ; | |
1274 | continue; | |
1275 | } | |
1276 | ||
1277 | case 'x': | |
1278 | /* Rs.m in bits <15:12> and <5:4>. */ | |
1279 | if (! get_gen_reg (&s, ®no) | |
1280 | || ! get_bwd_size_modifier (&s, &size_bits)) | |
1281 | break; | |
1282 | else | |
1283 | { | |
47926f60 | 1284 | out_insnp->opcode |= (regno << 12) | (size_bits << 4); |
3bcbcc3d HPN |
1285 | continue; |
1286 | } | |
1287 | ||
1288 | case 'y': | |
1289 | /* Source operand in bits <10>, <3:0> and optionally a | |
1290 | prefix; i.e. an indirect operand or an side-effect | |
1291 | prefix. | |
1292 | ||
1293 | The difference to 's' is that this does not allow an | |
81d4177b | 1294 | "immediate" expression. */ |
3bcbcc3d HPN |
1295 | if (! get_autoinc_prefix_or_indir_op (&s, prefixp, |
1296 | &mode, ®no, | |
1297 | &imm_expr_found, | |
1298 | &out_insnp->expr) | |
1299 | || imm_expr_found) | |
1300 | break; | |
1301 | else | |
1302 | { | |
1303 | if (prefixp->kind != PREFIX_NONE) | |
1304 | { | |
1305 | /* A prefix, and those matched here always have | |
1306 | side-effects (see 's' case). */ | |
1307 | out_insnp->opcode |= (AUTOINCR_BIT << 8); | |
1308 | } | |
1309 | else | |
1310 | { | |
1311 | /* No prefix. The "mode" variable contains bits | |
1312 | like whether or not this is autoincrement | |
1313 | mode. */ | |
1314 | out_insnp->opcode |= (mode << 10); | |
1315 | } | |
1316 | ||
1317 | out_insnp->opcode |= regno /* << 0 */; | |
1318 | continue; | |
1319 | } | |
1320 | ||
1321 | case 'z': | |
1322 | /* Size modifier (B or W) in bit <4>. */ | |
1323 | if (! get_bw_size_modifier (&s, &size_bits)) | |
1324 | break; | |
1325 | else | |
1326 | { | |
1327 | out_insnp->opcode |= size_bits << 4; | |
1328 | continue; | |
1329 | } | |
1330 | ||
1331 | default: | |
1332 | BAD_CASE (*args); | |
1333 | } | |
1334 | ||
1335 | /* We get here when we fail a match above or we found a | |
1336 | complete match. Break out of this loop. */ | |
1337 | break; | |
1338 | } | |
1339 | ||
1340 | /* Was it a match or a miss? */ | |
1341 | if (match == 0) | |
1342 | { | |
1343 | /* If it's just that the args don't match, maybe the next | |
1344 | item in the table is the same opcode but with | |
1345 | matching operands. */ | |
1346 | if (instruction[1].name != NULL | |
1347 | && ! strcmp (instruction->name, instruction[1].name)) | |
1348 | { | |
1349 | /* Yep. Restart and try that one instead. */ | |
1350 | ++instruction; | |
1351 | s = operands; | |
1352 | continue; | |
1353 | } | |
1354 | else | |
1355 | { | |
1356 | /* We've come to the end of instructions with this | |
1357 | opcode, so it must be an error. */ | |
1358 | as_bad (_("Illegal operands")); | |
1359 | return; | |
1360 | } | |
1361 | } | |
1362 | else | |
1363 | { | |
1364 | /* We have a match. Check if there's anything more to do. */ | |
1365 | if (imm_expr_found) | |
1366 | { | |
1367 | /* There was an immediate mode operand, so we must check | |
1368 | that it has an appropriate size. */ | |
3bcbcc3d HPN |
1369 | switch (instruction->imm_oprnd_size) |
1370 | { | |
1371 | default: | |
1372 | case SIZE_NONE: | |
1373 | /* Shouldn't happen; this one does not have immediate | |
1374 | operands with different sizes. */ | |
1375 | BAD_CASE (instruction->imm_oprnd_size); | |
1376 | break; | |
1377 | ||
1378 | case SIZE_FIX_32: | |
1379 | out_insnp->imm_oprnd_size = 4; | |
1380 | break; | |
1381 | ||
1382 | case SIZE_SPEC_REG: | |
1383 | switch (out_insnp->spec_reg->reg_size) | |
1384 | { | |
1385 | case 1: | |
1386 | if (out_insnp->expr.X_op == O_constant | |
1387 | && (out_insnp->expr.X_add_number < -128 | |
1388 | || out_insnp->expr.X_add_number > 255)) | |
1389 | as_bad (_("Immediate value not in 8 bit range: %ld"), | |
1390 | out_insnp->expr.X_add_number); | |
47926f60 | 1391 | /* Fall through. */ |
3bcbcc3d HPN |
1392 | case 2: |
1393 | /* FIXME: We need an indicator in the instruction | |
1394 | table to pass on, to indicate if we need to check | |
1395 | overflow for a signed or unsigned number. */ | |
1396 | if (out_insnp->expr.X_op == O_constant | |
1397 | && (out_insnp->expr.X_add_number < -32768 | |
1398 | || out_insnp->expr.X_add_number > 65535)) | |
1399 | as_bad (_("Immediate value not in 16 bit range: %ld"), | |
1400 | out_insnp->expr.X_add_number); | |
1401 | out_insnp->imm_oprnd_size = 2; | |
1402 | break; | |
1403 | ||
1404 | case 4: | |
1405 | out_insnp->imm_oprnd_size = 4; | |
1406 | break; | |
1407 | ||
1408 | default: | |
1409 | BAD_CASE (out_insnp->spec_reg->reg_size); | |
1410 | } | |
1411 | break; | |
1412 | ||
1413 | case SIZE_FIELD: | |
1414 | switch (size_bits) | |
1415 | { | |
1416 | case 0: | |
1417 | if (out_insnp->expr.X_op == O_constant | |
1418 | && (out_insnp->expr.X_add_number < -128 | |
1419 | || out_insnp->expr.X_add_number > 255)) | |
1420 | as_bad (_("Immediate value not in 8 bit range: %ld"), | |
1421 | out_insnp->expr.X_add_number); | |
47926f60 | 1422 | /* Fall through. */ |
3bcbcc3d HPN |
1423 | case 1: |
1424 | if (out_insnp->expr.X_op == O_constant | |
1425 | && (out_insnp->expr.X_add_number < -32768 | |
1426 | || out_insnp->expr.X_add_number > 65535)) | |
1427 | as_bad (_("Immediate value not in 16 bit range: %ld"), | |
1428 | out_insnp->expr.X_add_number); | |
1429 | out_insnp->imm_oprnd_size = 2; | |
1430 | break; | |
1431 | ||
1432 | case 2: | |
1433 | out_insnp->imm_oprnd_size = 4; | |
1434 | break; | |
1435 | ||
1436 | default: | |
1437 | BAD_CASE (out_insnp->spec_reg->reg_size); | |
1438 | } | |
1439 | } | |
08caf3f8 HPN |
1440 | |
1441 | /* If there was a relocation specified for the immediate | |
1442 | expression (i.e. it had a PIC modifier) check that the | |
1443 | size of the PIC relocation matches the size specified by | |
1444 | the opcode. */ | |
1445 | if (out_insnp->reloc != BFD_RELOC_NONE | |
1446 | && (cris_get_pic_reloc_size (out_insnp->reloc) | |
1447 | != (unsigned int) out_insnp->imm_oprnd_size)) | |
1448 | as_bad (_("PIC relocation size does not match operand size")); | |
3bcbcc3d HPN |
1449 | } |
1450 | } | |
1451 | break; | |
1452 | } | |
1453 | } | |
1454 | ||
3bcbcc3d HPN |
1455 | /* Get a B, W, or D size modifier from the string pointed out by *cPP, |
1456 | which must point to a '.' in front of the modifier. On successful | |
1457 | return, *cPP is advanced to the character following the size | |
1458 | modifier, and is undefined otherwise. | |
1459 | ||
1460 | cPP Pointer to pointer to string starting | |
1461 | with the size modifier. | |
1462 | ||
1463 | size_bitsp Pointer to variable to contain the size bits on | |
1464 | successful return. | |
1465 | ||
1466 | Return 1 iff a correct size modifier is found, else 0. */ | |
1467 | ||
1468 | static int | |
1469 | get_bwd_size_modifier (cPP, size_bitsp) | |
1470 | char **cPP; | |
1471 | int *size_bitsp; | |
1472 | { | |
1473 | if (**cPP != '.') | |
1474 | return 0; | |
1475 | else | |
1476 | { | |
47926f60 | 1477 | /* Consume the '.'. */ |
3bcbcc3d HPN |
1478 | (*cPP)++; |
1479 | ||
1480 | switch (**cPP) | |
1481 | { | |
1482 | case 'B': | |
1483 | case 'b': | |
1484 | *size_bitsp = 0; | |
1485 | break; | |
1486 | ||
1487 | case 'W': | |
1488 | case 'w': | |
1489 | *size_bitsp = 1; | |
1490 | break; | |
1491 | ||
1492 | case 'D': | |
1493 | case 'd': | |
1494 | *size_bitsp = 2; | |
1495 | break; | |
1496 | ||
1497 | default: | |
1498 | return 0; | |
1499 | } | |
1500 | ||
1501 | /* Consume the size letter. */ | |
1502 | (*cPP)++; | |
1503 | return 1; | |
1504 | } | |
1505 | } | |
1506 | ||
3bcbcc3d HPN |
1507 | /* Get a B or W size modifier from the string pointed out by *cPP, |
1508 | which must point to a '.' in front of the modifier. On successful | |
1509 | return, *cPP is advanced to the character following the size | |
1510 | modifier, and is undefined otherwise. | |
1511 | ||
1512 | cPP Pointer to pointer to string starting | |
1513 | with the size modifier. | |
1514 | ||
1515 | size_bitsp Pointer to variable to contain the size bits on | |
1516 | successful return. | |
1517 | ||
1518 | Return 1 iff a correct size modifier is found, else 0. */ | |
1519 | ||
1520 | static int | |
1521 | get_bw_size_modifier (cPP, size_bitsp) | |
1522 | char **cPP; | |
1523 | int *size_bitsp; | |
1524 | { | |
1525 | if (**cPP != '.') | |
1526 | return 0; | |
1527 | else | |
1528 | { | |
47926f60 | 1529 | /* Consume the '.'. */ |
3bcbcc3d HPN |
1530 | (*cPP)++; |
1531 | ||
1532 | switch (**cPP) | |
1533 | { | |
1534 | case 'B': | |
1535 | case 'b': | |
1536 | *size_bitsp = 0; | |
1537 | break; | |
1538 | ||
1539 | case 'W': | |
1540 | case 'w': | |
1541 | *size_bitsp = 1; | |
1542 | break; | |
1543 | ||
1544 | default: | |
1545 | return 0; | |
1546 | } | |
1547 | ||
1548 | /* Consume the size letter. */ | |
1549 | (*cPP)++; | |
1550 | return 1; | |
1551 | } | |
1552 | } | |
1553 | ||
07e90ad5 | 1554 | /* Get a general register from the string pointed out by *cPP. The |
3bcbcc3d HPN |
1555 | variable *cPP is advanced to the character following the general |
1556 | register name on a successful return, and has its initial position | |
1557 | otherwise. | |
1558 | ||
1559 | cPP Pointer to pointer to string, beginning with a general | |
1560 | register name. | |
1561 | ||
1562 | regnop Pointer to int containing the register number. | |
1563 | ||
1564 | Return 1 iff a correct general register designator is found, | |
1565 | else 0. */ | |
1566 | ||
1567 | static int | |
1568 | get_gen_reg (cPP, regnop) | |
1569 | char **cPP; | |
1570 | int *regnop; | |
1571 | { | |
1572 | char *oldp; | |
1573 | oldp = *cPP; | |
1574 | ||
7b15d668 HPN |
1575 | /* Handle a sometimes-mandatory dollar sign as register prefix. */ |
1576 | if (**cPP == REGISTER_PREFIX_CHAR) | |
1577 | (*cPP)++; | |
1578 | else if (demand_register_prefix) | |
1579 | return 0; | |
1580 | ||
3bcbcc3d HPN |
1581 | switch (**cPP) |
1582 | { | |
1583 | case 'P': | |
1584 | case 'p': | |
1585 | /* "P" as in "PC"? Consume the "P". */ | |
1586 | (*cPP)++; | |
1587 | ||
1588 | if ((**cPP == 'C' || **cPP == 'c') | |
1589 | && ! isalnum ((*cPP)[1])) | |
1590 | { | |
1591 | /* It's "PC": consume the "c" and we're done. */ | |
1592 | (*cPP)++; | |
1593 | *regnop = REG_PC; | |
1594 | return 1; | |
1595 | } | |
1596 | break; | |
1597 | ||
1598 | case 'R': | |
1599 | case 'r': | |
47926f60 | 1600 | /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */ |
3bcbcc3d HPN |
1601 | (*cPP)++; |
1602 | ||
1603 | if (isdigit (**cPP)) | |
1604 | { | |
1605 | /* It's r[0-9]. Consume and check the next digit. */ | |
1606 | *regnop = **cPP - '0'; | |
1607 | (*cPP)++; | |
1608 | ||
1609 | if (! isalnum (**cPP)) | |
1610 | { | |
47926f60 | 1611 | /* No more digits, we're done. */ |
3bcbcc3d HPN |
1612 | return 1; |
1613 | } | |
1614 | else | |
1615 | { | |
1616 | /* One more digit. Consume and add. */ | |
47926f60 | 1617 | *regnop = *regnop * 10 + (**cPP - '0'); |
3bcbcc3d HPN |
1618 | |
1619 | /* We need to check for a valid register number; Rn, | |
1620 | 0 <= n <= MAX_REG. */ | |
1621 | if (*regnop <= MAX_REG) | |
1622 | { | |
1623 | /* Consume second digit. */ | |
1624 | (*cPP)++; | |
1625 | return 1; | |
1626 | } | |
1627 | } | |
1628 | } | |
1629 | break; | |
1630 | ||
1631 | case 'S': | |
1632 | case 's': | |
1633 | /* "S" as in "SP"? Consume the "S". */ | |
1634 | (*cPP)++; | |
1635 | if (**cPP == 'P' || **cPP == 'p') | |
1636 | { | |
1637 | /* It's "SP": consume the "p" and we're done. */ | |
1638 | (*cPP)++; | |
1639 | *regnop = REG_SP; | |
1640 | return 1; | |
1641 | } | |
1642 | break; | |
1643 | ||
1644 | default: | |
1645 | /* Just here to silence compilation warnings. */ | |
1646 | ; | |
1647 | } | |
1648 | ||
1649 | /* We get here if we fail. Restore the pointer. */ | |
1650 | *cPP = oldp; | |
1651 | return 0; | |
1652 | } | |
1653 | ||
3bcbcc3d HPN |
1654 | /* Get a special register from the string pointed out by *cPP. The |
1655 | variable *cPP is advanced to the character following the special | |
1656 | register name if one is found, and retains its original position | |
1657 | otherwise. | |
1658 | ||
1659 | cPP Pointer to pointer to string starting with a special register | |
1660 | name. | |
1661 | ||
1662 | sregpp Pointer to Pointer to struct spec_reg, where a pointer to the | |
1663 | register description will be stored. | |
1664 | ||
1665 | Return 1 iff a correct special register name is found. */ | |
1666 | ||
1667 | static int | |
1668 | get_spec_reg (cPP, sregpp) | |
1669 | char **cPP; | |
1670 | const struct cris_spec_reg **sregpp; | |
1671 | { | |
1672 | char *s1; | |
1673 | const char *s2; | |
7b15d668 | 1674 | char *name_begin = *cPP; |
3bcbcc3d HPN |
1675 | |
1676 | const struct cris_spec_reg *sregp; | |
1677 | ||
7b15d668 HPN |
1678 | /* Handle a sometimes-mandatory dollar sign as register prefix. */ |
1679 | if (*name_begin == REGISTER_PREFIX_CHAR) | |
1680 | name_begin++; | |
1681 | else if (demand_register_prefix) | |
1682 | return 0; | |
1683 | ||
3bcbcc3d | 1684 | /* Loop over all special registers. */ |
47926f60 | 1685 | for (sregp = cris_spec_regs; sregp->name != NULL; sregp++) |
3bcbcc3d | 1686 | { |
3bcbcc3d | 1687 | /* Start over from beginning of the supposed name. */ |
7b15d668 | 1688 | s1 = name_begin; |
3bcbcc3d HPN |
1689 | s2 = sregp->name; |
1690 | ||
1691 | while (*s2 != '\0' | |
1692 | && (isupper (*s1) ? tolower (*s1) == *s2 : *s1 == *s2)) | |
1693 | { | |
1694 | s1++; | |
1695 | s2++; | |
1696 | } | |
1697 | ||
1698 | /* For a match, we must have consumed the name in the table, and we | |
1699 | must be outside what could be part of a name. Assume here that a | |
47926f60 | 1700 | test for alphanumerics is sufficient for a name test. */ |
3bcbcc3d HPN |
1701 | if (*s2 == 0 && ! isalnum (*s1)) |
1702 | { | |
47926f60 | 1703 | /* We have a match. Update the pointer and be done. */ |
3bcbcc3d HPN |
1704 | *cPP = s1; |
1705 | *sregpp = sregp; | |
1706 | return 1; | |
1707 | } | |
1708 | } | |
1709 | ||
47926f60 | 1710 | /* If we got here, we did not find any name. */ |
3bcbcc3d HPN |
1711 | return 0; |
1712 | } | |
1713 | ||
3bcbcc3d HPN |
1714 | /* Get an unprefixed or side-effect-prefix operand from the string pointed |
1715 | out by *cPP. The pointer *cPP is advanced to the character following | |
1716 | the indirect operand if we have success, else it contains an undefined | |
1717 | value. | |
1718 | ||
1719 | cPP Pointer to pointer to string beginning with the first | |
1720 | character of the supposed operand. | |
1721 | ||
1722 | prefixp Pointer to structure containing an optional instruction | |
1723 | prefix. | |
1724 | ||
1725 | is_autoincp Pointer to int indicating the indirect or autoincrement | |
1726 | bits. | |
1727 | ||
1728 | src_regnop Pointer to int containing the source register number in | |
1729 | the instruction. | |
1730 | ||
1731 | imm_foundp Pointer to an int indicating if an immediate expression | |
1732 | is found. | |
1733 | ||
1734 | imm_exprP Pointer to a structure containing an immediate | |
1735 | expression, if success and if *imm_foundp is nonzero. | |
1736 | ||
1737 | Return 1 iff a correct indirect operand is found. */ | |
1738 | ||
1739 | static int | |
1740 | get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop, | |
1741 | imm_foundp, imm_exprP) | |
47926f60 KH |
1742 | char **cPP; |
1743 | struct cris_prefix *prefixp; | |
1744 | int *is_autoincp; | |
1745 | int *src_regnop; | |
1746 | int *imm_foundp; | |
1747 | expressionS *imm_exprP; | |
3bcbcc3d HPN |
1748 | { |
1749 | /* Assume there was no immediate mode expression. */ | |
1750 | *imm_foundp = 0; | |
1751 | ||
1752 | if (**cPP == '[') | |
1753 | { | |
1754 | /* So this operand is one of: | |
1755 | Indirect: [rN] | |
1756 | Autoincrement: [rN+] | |
1757 | Indexed with assign: [rN=rM+rO.S] | |
1758 | Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s] | |
1759 | ||
1760 | Either way, consume the '['. */ | |
1761 | (*cPP)++; | |
1762 | ||
1763 | /* Get the rN register. */ | |
1764 | if (! get_gen_reg (cPP, src_regnop)) | |
1765 | /* If there was no register, then this cannot match. */ | |
1766 | return 0; | |
1767 | else | |
1768 | { | |
1769 | /* We got the register, now check the next character. */ | |
1770 | switch (**cPP) | |
1771 | { | |
1772 | case ']': | |
1773 | /* Indirect mode. We're done here. */ | |
1774 | prefixp->kind = PREFIX_NONE; | |
1775 | *is_autoincp = 0; | |
1776 | break; | |
1777 | ||
1778 | case '+': | |
1779 | /* This must be an auto-increment mode, if there's a | |
1780 | match. */ | |
1781 | prefixp->kind = PREFIX_NONE; | |
1782 | *is_autoincp = 1; | |
1783 | ||
1784 | /* We consume this character and break out to check the | |
1785 | closing ']'. */ | |
1786 | (*cPP)++; | |
1787 | break; | |
1788 | ||
1789 | case '=': | |
1790 | /* This must be indexed with assign, or offset with assign | |
1791 | to match. */ | |
1792 | (*cPP)++; | |
1793 | ||
1794 | /* Either way, the next thing must be a register. */ | |
1795 | if (! get_gen_reg (cPP, &prefixp->base_reg_number)) | |
1796 | /* No register, no match. */ | |
1797 | return 0; | |
1798 | else | |
1799 | { | |
1800 | /* We've consumed "[rN=rM", so we must be looking at | |
1801 | "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or | |
1802 | "+[rO+].s]". */ | |
1803 | if (**cPP == '+') | |
1804 | { | |
1805 | int index_reg_number; | |
1806 | (*cPP)++; | |
1807 | ||
1808 | if (**cPP == '[') | |
1809 | { | |
1810 | int size_bits; | |
1811 | /* This must be [rx=ry+[rz].s] or | |
1812 | [rx=ry+[rz+].s] or no match. We must be | |
1813 | looking at rz after consuming the '['. */ | |
1814 | (*cPP)++; | |
1815 | ||
1816 | if (!get_gen_reg (cPP, &index_reg_number)) | |
1817 | return 0; | |
1818 | ||
1819 | prefixp->kind = PREFIX_BDAP; | |
1820 | prefixp->opcode | |
1821 | = (BDAP_INDIR_OPCODE | |
1822 | + (prefixp->base_reg_number << 12) | |
1823 | + index_reg_number); | |
1824 | ||
1825 | if (**cPP == '+') | |
1826 | { | |
1827 | /* We've seen "[rx=ry+[rz+" here, so now we | |
1828 | know that there must be "].s]" left to | |
1829 | check. */ | |
1830 | (*cPP)++; | |
1831 | prefixp->opcode |= AUTOINCR_BIT << 8; | |
1832 | } | |
1833 | ||
1834 | /* If it wasn't autoincrement, we don't need to | |
1835 | add anything. */ | |
1836 | ||
1837 | /* Check the next-to-last ']'. */ | |
1838 | if (**cPP != ']') | |
1839 | return 0; | |
1840 | ||
1841 | (*cPP)++; | |
1842 | ||
1843 | /* Check the ".s" modifier. */ | |
1844 | if (! get_bwd_size_modifier (cPP, &size_bits)) | |
1845 | return 0; | |
1846 | ||
1847 | prefixp->opcode |= size_bits << 4; | |
1848 | ||
1849 | /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s. | |
1850 | We break out to check the final ']'. */ | |
1851 | break; | |
1852 | } | |
ab3e48dc KH |
1853 | /* It wasn't an indirection. Check if it's a |
1854 | register. */ | |
1855 | else if (get_gen_reg (cPP, &index_reg_number)) | |
47926f60 KH |
1856 | { |
1857 | int size_bits; | |
1858 | ||
1859 | /* Indexed with assign mode: "[rN+rM.S]". */ | |
1860 | prefixp->kind = PREFIX_BIAP; | |
1861 | prefixp->opcode | |
1862 | = (BIAP_OPCODE + (index_reg_number << 12) | |
1863 | + prefixp->base_reg_number /* << 0 */); | |
1864 | ||
1865 | if (! get_bwd_size_modifier (cPP, &size_bits)) | |
1866 | /* Size missing, this isn't a match. */ | |
1867 | return 0; | |
1868 | else | |
3bcbcc3d | 1869 | { |
47926f60 | 1870 | /* Size found, break out to check the |
3bcbcc3d | 1871 | final ']'. */ |
47926f60 | 1872 | prefixp->opcode |= size_bits << 4; |
3bcbcc3d HPN |
1873 | break; |
1874 | } | |
47926f60 KH |
1875 | } |
1876 | /* Not a register. Then this must be "[rN+I]". */ | |
1877 | else if (cris_get_expression (cPP, &prefixp->expr)) | |
1878 | { | |
1879 | /* We've got offset with assign mode. Fill | |
1880 | in the blanks and break out to match the | |
1881 | final ']'. */ | |
1882 | prefixp->kind = PREFIX_BDAP_IMM; | |
08caf3f8 HPN |
1883 | |
1884 | /* We tentatively put an opcode corresponding to | |
1885 | a 32-bit operand here, although it may be | |
1886 | relaxed when there's no PIC specifier for the | |
1887 | operand. */ | |
1888 | prefixp->opcode | |
1889 | = (BDAP_INDIR_OPCODE | |
1890 | | (prefixp->base_reg_number << 12) | |
1891 | | (AUTOINCR_BIT << 8) | |
1892 | | (2 << 4) | |
1893 | | REG_PC /* << 0 */); | |
1894 | ||
1895 | /* This can have a PIC suffix, specifying reloc | |
1896 | type to use. */ | |
1897 | if (pic && **cPP == PIC_SUFFIX_CHAR) | |
1898 | { | |
1899 | unsigned int relocsize; | |
1900 | ||
1901 | cris_get_pic_suffix (cPP, &prefixp->reloc, | |
1902 | &prefixp->expr); | |
1903 | ||
1904 | /* Tweak the size of the immediate operand | |
1905 | in the prefix opcode if it isn't what we | |
1906 | set. */ | |
1907 | relocsize | |
1908 | = cris_get_pic_reloc_size (prefixp->reloc); | |
1909 | if (relocsize != 4) | |
1910 | prefixp->opcode | |
1911 | = ((prefixp->opcode & ~(3 << 4)) | |
1912 | | ((relocsize >> 1) << 4)); | |
1913 | } | |
47926f60 KH |
1914 | break; |
1915 | } | |
1916 | else | |
1917 | /* Neither register nor expression found, so | |
1918 | this can't be a match. */ | |
1919 | return 0; | |
3bcbcc3d | 1920 | } |
47926f60 | 1921 | /* Not "[rN+" but perhaps "[rN-"? */ |
ab3e48dc | 1922 | else if (**cPP == '-') |
47926f60 KH |
1923 | { |
1924 | /* We must have an offset with assign mode. */ | |
1925 | if (! cris_get_expression (cPP, &prefixp->expr)) | |
1926 | /* No expression, no match. */ | |
1927 | return 0; | |
1928 | else | |
1929 | { | |
1930 | /* We've got offset with assign mode. Fill | |
1931 | in the blanks and break out to match the | |
08caf3f8 HPN |
1932 | final ']'. |
1933 | ||
1934 | Note that we don't allow a PIC suffix for an | |
1935 | operand with a minus sign. */ | |
47926f60 KH |
1936 | prefixp->kind = PREFIX_BDAP_IMM; |
1937 | break; | |
1938 | } | |
1939 | } | |
1940 | else | |
1941 | /* Neither '+' nor '-' after "[rN=rM". Lose. */ | |
1942 | return 0; | |
3bcbcc3d HPN |
1943 | } |
1944 | default: | |
1945 | /* Neither ']' nor '+' nor '=' after "[rN". Lose. */ | |
1946 | return 0; | |
1947 | } | |
1948 | } | |
1949 | ||
1950 | /* When we get here, we have a match and will just check the closing | |
1951 | ']'. We can still fail though. */ | |
1952 | if (**cPP != ']') | |
1953 | return 0; | |
1954 | else | |
1955 | { | |
1956 | /* Don't forget to consume the final ']'. | |
1957 | Then return in glory. */ | |
1958 | (*cPP)++; | |
1959 | return 1; | |
1960 | } | |
1961 | } | |
47926f60 | 1962 | /* No indirection. Perhaps a constant? */ |
ab3e48dc | 1963 | else if (cris_get_expression (cPP, imm_exprP)) |
47926f60 KH |
1964 | { |
1965 | /* Expression found, this is immediate mode. */ | |
1966 | prefixp->kind = PREFIX_NONE; | |
1967 | *is_autoincp = 1; | |
1968 | *src_regnop = REG_PC; | |
1969 | *imm_foundp = 1; | |
08caf3f8 HPN |
1970 | |
1971 | /* This can have a PIC suffix, specifying reloc type to use. The | |
1972 | caller must check that the reloc size matches the operand size. */ | |
1973 | if (pic && **cPP == PIC_SUFFIX_CHAR) | |
1974 | cris_get_pic_suffix (cPP, &prefixp->reloc, imm_exprP); | |
1975 | ||
47926f60 KH |
1976 | return 1; |
1977 | } | |
3bcbcc3d HPN |
1978 | |
1979 | /* No luck today. */ | |
1980 | return 0; | |
1981 | } | |
1982 | ||
3bcbcc3d HPN |
1983 | /* This function gets an indirect operand in a three-address operand |
1984 | combination from the string pointed out by *cPP. The pointer *cPP is | |
1985 | advanced to the character following the indirect operand on success, or | |
1986 | has an unspecified value on failure. | |
1987 | ||
1988 | cPP Pointer to pointer to string begining | |
1989 | with the operand | |
1990 | ||
1991 | prefixp Pointer to structure containing an | |
1992 | instruction prefix | |
1993 | ||
1994 | Returns 1 iff a correct indirect operand is found. */ | |
1995 | ||
1996 | static int | |
1997 | get_3op_or_dip_prefix_op (cPP, prefixp) | |
1998 | char **cPP; | |
1999 | struct cris_prefix *prefixp; | |
2000 | { | |
ab3e48dc KH |
2001 | int reg_number; |
2002 | ||
3bcbcc3d HPN |
2003 | if (**cPP != '[') |
2004 | /* We must have a '[' or it's a clean failure. */ | |
2005 | return 0; | |
3bcbcc3d | 2006 | |
47926f60 KH |
2007 | /* Eat the first '['. */ |
2008 | (*cPP)++; | |
2009 | ||
2010 | if (**cPP == '[') | |
2011 | { | |
2012 | /* A second '[', so this must be double-indirect mode. */ | |
3bcbcc3d | 2013 | (*cPP)++; |
47926f60 KH |
2014 | prefixp->kind = PREFIX_DIP; |
2015 | prefixp->opcode = DIP_OPCODE; | |
3bcbcc3d | 2016 | |
47926f60 KH |
2017 | /* Get the register or fail entirely. */ |
2018 | if (! get_gen_reg (cPP, ®_number)) | |
2019 | return 0; | |
2020 | else | |
3bcbcc3d | 2021 | { |
47926f60 KH |
2022 | prefixp->opcode |= reg_number /* << 0 */ ; |
2023 | if (**cPP == '+') | |
2024 | { | |
2025 | /* Since we found a '+', this must be double-indirect | |
2026 | autoincrement mode. */ | |
2027 | (*cPP)++; | |
2028 | prefixp->opcode |= AUTOINCR_BIT << 8; | |
2029 | } | |
2030 | ||
2031 | /* There's nothing particular to do, if this was a | |
2032 | double-indirect *without* autoincrement. */ | |
2033 | } | |
2034 | ||
2035 | /* Check the first ']'. The second one is checked at the end. */ | |
2036 | if (**cPP != ']') | |
2037 | return 0; | |
2038 | ||
2039 | /* Eat the first ']', so we'll be looking at a second ']'. */ | |
2040 | (*cPP)++; | |
2041 | } | |
2042 | /* No second '['. Then we should have a register here, making | |
2043 | it "[rN". */ | |
2044 | else if (get_gen_reg (cPP, &prefixp->base_reg_number)) | |
2045 | { | |
2046 | /* This must be indexed or offset mode: "[rN+I]" or | |
2047 | "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */ | |
2048 | if (**cPP == '+') | |
2049 | { | |
47926f60 KH |
2050 | int index_reg_number; |
2051 | ||
3bcbcc3d | 2052 | (*cPP)++; |
3bcbcc3d | 2053 | |
47926f60 | 2054 | if (**cPP == '[') |
3bcbcc3d | 2055 | { |
47926f60 KH |
2056 | /* This is "[rx+["... Expect a register next. */ |
2057 | int size_bits; | |
2058 | (*cPP)++; | |
2059 | ||
2060 | if (!get_gen_reg (cPP, &index_reg_number)) | |
2061 | return 0; | |
2062 | ||
2063 | prefixp->kind = PREFIX_BDAP; | |
2064 | prefixp->opcode | |
2065 | = (BDAP_INDIR_OPCODE | |
2066 | + (prefixp->base_reg_number << 12) | |
2067 | + index_reg_number); | |
2068 | ||
2069 | /* We've seen "[rx+[ry", so check if this is | |
2070 | autoincrement. */ | |
3bcbcc3d HPN |
2071 | if (**cPP == '+') |
2072 | { | |
47926f60 | 2073 | /* Yep, now at "[rx+[ry+". */ |
3bcbcc3d HPN |
2074 | (*cPP)++; |
2075 | prefixp->opcode |= AUTOINCR_BIT << 8; | |
2076 | } | |
47926f60 KH |
2077 | /* If it wasn't autoincrement, we don't need to |
2078 | add anything. */ | |
3bcbcc3d | 2079 | |
47926f60 KH |
2080 | /* Check a first closing ']': "[rx+[ry]" or |
2081 | "[rx+[ry+]". */ | |
2082 | if (**cPP != ']') | |
2083 | return 0; | |
2084 | (*cPP)++; | |
3bcbcc3d | 2085 | |
47926f60 KH |
2086 | /* Now expect a size modifier ".S". */ |
2087 | if (! get_bwd_size_modifier (cPP, &size_bits)) | |
2088 | return 0; | |
3bcbcc3d | 2089 | |
47926f60 KH |
2090 | prefixp->opcode |= size_bits << 4; |
2091 | ||
2092 | /* Ok, all interesting stuff has been seen: | |
2093 | "[rx+[ry+].S" or "[rx+[ry].S". We only need to | |
2094 | expect a final ']', which we'll do in a common | |
2095 | closing session. */ | |
2096 | } | |
2097 | /* Seen "[rN+", but not a '[', so check if we have a | |
2098 | register. */ | |
2099 | else if (get_gen_reg (cPP, &index_reg_number)) | |
2100 | { | |
2101 | /* This is indexed mode: "[rN+rM.S]" or | |
2102 | "[rN+rM.S+]". */ | |
2103 | int size_bits; | |
2104 | prefixp->kind = PREFIX_BIAP; | |
2105 | prefixp->opcode | |
2106 | = (BIAP_OPCODE | |
2107 | | prefixp->base_reg_number /* << 0 */ | |
2108 | | (index_reg_number << 12)); | |
2109 | ||
07e90ad5 | 2110 | /* Consume the ".S". */ |
47926f60 KH |
2111 | if (! get_bwd_size_modifier (cPP, &size_bits)) |
2112 | /* Missing size, so fail. */ | |
2113 | return 0; | |
3bcbcc3d | 2114 | else |
47926f60 KH |
2115 | /* Size found. Add that piece and drop down to |
2116 | the common checking of the closing ']'. */ | |
2117 | prefixp->opcode |= size_bits << 4; | |
2118 | } | |
2119 | /* Seen "[rN+", but not a '[' or a register, so then | |
2120 | it must be a constant "I". */ | |
2121 | else if (cris_get_expression (cPP, &prefixp->expr)) | |
2122 | { | |
2123 | /* Expression found, so fill in the bits of offset | |
2124 | mode and drop down to check the closing ']'. */ | |
2125 | prefixp->kind = PREFIX_BDAP_IMM; | |
08caf3f8 HPN |
2126 | |
2127 | /* We tentatively put an opcode corresponding to a 32-bit | |
2128 | operand here, although it may be relaxed when there's no | |
2129 | PIC specifier for the operand. */ | |
2130 | prefixp->opcode | |
2131 | = (BDAP_INDIR_OPCODE | |
2132 | | (prefixp->base_reg_number << 12) | |
2133 | | (AUTOINCR_BIT << 8) | |
2134 | | (2 << 4) | |
2135 | | REG_PC /* << 0 */); | |
2136 | ||
2137 | /* This can have a PIC suffix, specifying reloc type to use. */ | |
2138 | if (pic && **cPP == PIC_SUFFIX_CHAR) | |
2139 | { | |
2140 | unsigned int relocsize; | |
2141 | ||
2142 | cris_get_pic_suffix (cPP, &prefixp->reloc, &prefixp->expr); | |
2143 | ||
2144 | /* Tweak the size of the immediate operand in the prefix | |
2145 | opcode if it isn't what we set. */ | |
2146 | relocsize = cris_get_pic_reloc_size (prefixp->reloc); | |
2147 | if (relocsize != 4) | |
2148 | prefixp->opcode | |
2149 | = ((prefixp->opcode & ~(3 << 4)) | |
2150 | | ((relocsize >> 1) << 4)); | |
2151 | } | |
47926f60 KH |
2152 | } |
2153 | else | |
2154 | /* Nothing valid here: lose. */ | |
2155 | return 0; | |
2156 | } | |
2157 | /* Seen "[rN" but no '+', so check if it's a '-'. */ | |
2158 | else if (**cPP == '-') | |
2159 | { | |
2160 | /* Yep, we must have offset mode. */ | |
2161 | if (! cris_get_expression (cPP, &prefixp->expr)) | |
2162 | /* No expression, so we lose. */ | |
2163 | return 0; | |
2164 | else | |
2165 | { | |
2166 | /* Expression found to make this offset mode, so | |
2167 | fill those bits and drop down to check the | |
08caf3f8 HPN |
2168 | closing ']'. |
2169 | ||
2170 | Note that we don't allow a PIC suffix for | |
2171 | an operand with a minus sign like this. */ | |
47926f60 KH |
2172 | prefixp->kind = PREFIX_BDAP_IMM; |
2173 | } | |
2174 | } | |
2175 | else | |
2176 | { | |
2177 | /* We've seen "[rN", but not '+' or '-'; rather a ']'. | |
2178 | Hmm. Normally this is a simple indirect mode that we | |
2179 | shouldn't match, but if we expect ']', then we have a | |
2180 | zero offset, so it can be a three-address-operand, | |
2181 | like "[rN],rO,rP", thus offset mode. | |
2182 | ||
2183 | Don't eat the ']', that will be done in the closing | |
2184 | ceremony. */ | |
2185 | prefixp->expr.X_op = O_constant; | |
2186 | prefixp->expr.X_add_number = 0; | |
2187 | prefixp->expr.X_add_symbol = NULL; | |
2188 | prefixp->expr.X_op_symbol = NULL; | |
2189 | prefixp->kind = PREFIX_BDAP_IMM; | |
2190 | } | |
2191 | } | |
2192 | /* A '[', but no second '[', and no register. Check if we | |
2193 | have an expression, making this "[I]" for a double-indirect | |
2194 | prefix. */ | |
2195 | else if (cris_get_expression (cPP, &prefixp->expr)) | |
2196 | { | |
2197 | /* Expression found, the so called absolute mode for a | |
2198 | double-indirect prefix on PC. */ | |
2199 | prefixp->kind = PREFIX_DIP; | |
2200 | prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC; | |
2201 | prefixp->reloc = BFD_RELOC_32; | |
2202 | } | |
2203 | else | |
2204 | /* Neither '[' nor register nor expression. We lose. */ | |
2205 | return 0; | |
3bcbcc3d HPN |
2206 | |
2207 | /* We get here as a closing ceremony to a successful match. We just | |
2208 | need to check the closing ']'. */ | |
2209 | if (**cPP != ']') | |
2210 | /* Oops. Close but no air-polluter. */ | |
2211 | return 0; | |
2212 | ||
2213 | /* Don't forget to consume that ']', before returning in glory. */ | |
2214 | (*cPP)++; | |
2215 | return 1; | |
2216 | } | |
2217 | ||
3bcbcc3d HPN |
2218 | /* Get an expression from the string pointed out by *cPP. |
2219 | The pointer *cPP is advanced to the character following the expression | |
2220 | on a success, or retains its original value otherwise. | |
2221 | ||
2222 | cPP Pointer to pointer to string beginning with the expression. | |
2223 | ||
2224 | exprP Pointer to structure containing the expression. | |
2225 | ||
47926f60 | 2226 | Return 1 iff a correct expression is found. */ |
3bcbcc3d HPN |
2227 | |
2228 | static int | |
2229 | cris_get_expression (cPP, exprP) | |
47926f60 KH |
2230 | char **cPP; |
2231 | expressionS *exprP; | |
3bcbcc3d HPN |
2232 | { |
2233 | char *saved_input_line_pointer; | |
2234 | segT exp; | |
2235 | ||
2236 | /* The "expression" function expects to find an expression at the | |
2237 | global variable input_line_pointer, so we have to save it to give | |
2238 | the impression that we don't fiddle with global variables. */ | |
2239 | saved_input_line_pointer = input_line_pointer; | |
2240 | input_line_pointer = *cPP; | |
2241 | ||
2242 | exp = expression (exprP); | |
2243 | if (exprP->X_op == O_illegal || exprP->X_op == O_absent) | |
2244 | { | |
2245 | input_line_pointer = saved_input_line_pointer; | |
2246 | return 0; | |
2247 | } | |
2248 | ||
2249 | /* Everything seems to be fine, just restore the global | |
2250 | input_line_pointer and say we're successful. */ | |
2251 | *cPP = input_line_pointer; | |
2252 | input_line_pointer = saved_input_line_pointer; | |
2253 | return 1; | |
2254 | } | |
2255 | ||
3bcbcc3d HPN |
2256 | /* Get a sequence of flag characters from *spp. The pointer *cPP is |
2257 | advanced to the character following the expression. The flag | |
2258 | characters are consecutive, no commas or spaces. | |
2259 | ||
2260 | cPP Pointer to pointer to string beginning with the expression. | |
2261 | ||
2262 | flagp Pointer to int to return the flags expression. | |
2263 | ||
2264 | Return 1 iff a correct flags expression is found. */ | |
2265 | ||
2266 | static int | |
2267 | get_flags (cPP, flagsp) | |
2268 | char **cPP; | |
2269 | int *flagsp; | |
2270 | { | |
2271 | for (;;) | |
2272 | { | |
2273 | switch (**cPP) | |
2274 | { | |
2275 | case 'd': | |
2276 | case 'D': | |
2277 | case 'm': | |
2278 | case 'M': | |
2279 | *flagsp |= 0x80; | |
2280 | break; | |
2281 | ||
2282 | case 'e': | |
2283 | case 'E': | |
2284 | case 'b': | |
2285 | case 'B': | |
2286 | *flagsp |= 0x40; | |
2287 | break; | |
2288 | ||
2289 | case 'i': | |
2290 | case 'I': | |
2291 | *flagsp |= 0x20; | |
2292 | break; | |
2293 | ||
2294 | case 'x': | |
2295 | case 'X': | |
2296 | *flagsp |= 0x10; | |
2297 | break; | |
2298 | ||
2299 | case 'n': | |
2300 | case 'N': | |
2301 | *flagsp |= 0x8; | |
2302 | break; | |
2303 | ||
2304 | case 'z': | |
2305 | case 'Z': | |
2306 | *flagsp |= 0x4; | |
2307 | break; | |
2308 | ||
2309 | case 'v': | |
2310 | case 'V': | |
2311 | *flagsp |= 0x2; | |
2312 | break; | |
2313 | ||
2314 | case 'c': | |
2315 | case 'C': | |
2316 | *flagsp |= 1; | |
2317 | break; | |
2318 | ||
2319 | default: | |
2320 | /* We consider this successful if we stop at a comma or | |
47926f60 | 2321 | whitespace. Anything else, and we consider it a failure. */ |
3bcbcc3d HPN |
2322 | if (**cPP != ',' |
2323 | && **cPP != 0 | |
2324 | && ! isspace (**cPP)) | |
2325 | return 0; | |
2326 | else | |
2327 | return 1; | |
2328 | } | |
2329 | ||
2330 | /* Don't forget to consume each flag character. */ | |
2331 | (*cPP)++; | |
2332 | } | |
2333 | } | |
2334 | ||
3bcbcc3d HPN |
2335 | /* Generate code and fixes for a BDAP prefix. |
2336 | ||
2337 | base_regno Int containing the base register number. | |
2338 | ||
2339 | exprP Pointer to structure containing the offset expression. */ | |
2340 | ||
2341 | static void | |
2342 | gen_bdap (base_regno, exprP) | |
47926f60 KH |
2343 | int base_regno; |
2344 | expressionS *exprP; | |
3bcbcc3d HPN |
2345 | { |
2346 | unsigned int opcode; | |
2347 | char *opcodep; | |
2348 | ||
2349 | /* Put out the prefix opcode; assume quick immediate mode at first. */ | |
2350 | opcode = BDAP_QUICK_OPCODE | (base_regno << 12); | |
ed67db7a | 2351 | opcodep = cris_insn_first_word_frag (); |
3bcbcc3d HPN |
2352 | md_number_to_chars (opcodep, opcode, 2); |
2353 | ||
2354 | if (exprP->X_op == O_constant) | |
2355 | { | |
2356 | /* We have an absolute expression that we know the size of right | |
47926f60 | 2357 | now. */ |
3bcbcc3d HPN |
2358 | long int value; |
2359 | int size; | |
2360 | ||
2361 | value = exprP->X_add_number; | |
2362 | if (value < -32768 || value > 32767) | |
2363 | /* Outside range for a "word", make it a dword. */ | |
2364 | size = 2; | |
2365 | else | |
47926f60 | 2366 | /* Assume "word" size. */ |
3bcbcc3d HPN |
2367 | size = 1; |
2368 | ||
2369 | /* If this is a signed-byte value, we can fit it into the prefix | |
2370 | insn itself. */ | |
2371 | if (value >= -128 && value <= 127) | |
2372 | opcodep[0] = value; | |
2373 | else | |
2374 | { | |
2375 | /* This is a word or dword displacement, which will be put in a | |
2376 | word or dword after the prefix. */ | |
2377 | char *p; | |
2378 | ||
2379 | opcodep[0] = BDAP_PC_LOW + (size << 4); | |
2380 | opcodep[1] &= 0xF0; | |
2381 | opcodep[1] |= BDAP_INCR_HIGH; | |
2382 | p = frag_more (1 << size); | |
2383 | md_number_to_chars (p, value, 1 << size); | |
2384 | } | |
2385 | } | |
2386 | else | |
08caf3f8 HPN |
2387 | { |
2388 | /* Handle complex expressions. */ | |
2389 | valueT addvalue | |
2390 | = exprP->X_op_symbol != NULL ? 0 : exprP->X_add_number; | |
2391 | symbolS *sym | |
2392 | = (exprP->X_op_symbol != NULL | |
2393 | ? make_expr_symbol (exprP) : exprP->X_add_symbol); | |
2394 | ||
2395 | /* The expression is not defined yet but may become absolute. We | |
2396 | make it a relocation to be relaxed. */ | |
2397 | frag_var (rs_machine_dependent, 4, 0, | |
2398 | ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF), | |
2399 | sym, addvalue, opcodep); | |
2400 | } | |
3bcbcc3d HPN |
2401 | } |
2402 | ||
3bcbcc3d HPN |
2403 | /* Encode a branch displacement in the range -256..254 into the form used |
2404 | by CRIS conditional branch instructions. | |
2405 | ||
2406 | offset The displacement value in bytes. */ | |
2407 | ||
2408 | static int | |
2409 | branch_disp (offset) | |
2410 | int offset; | |
2411 | { | |
2412 | int disp; | |
2413 | ||
2414 | disp = offset & 0xFE; | |
2415 | ||
2416 | if (offset < 0) | |
2417 | disp |= 1; | |
2418 | ||
2419 | return disp; | |
2420 | } | |
2421 | ||
3bcbcc3d HPN |
2422 | /* Generate code and fixes for a 32-bit conditional branch instruction |
2423 | created by "extending" an existing 8-bit branch instruction. | |
2424 | ||
2425 | opcodep Pointer to the word containing the original 8-bit branch | |
2426 | instruction. | |
2427 | ||
2428 | writep Pointer to "extension area" following the first instruction | |
2429 | word. | |
2430 | ||
2431 | fragP Pointer to the frag containing the instruction. | |
2432 | ||
2433 | add_symP, Parts of the destination address expression. | |
2434 | sub_symP, | |
2435 | add_num. */ | |
2436 | ||
2437 | static void | |
2438 | gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num) | |
2439 | char *opcodep; | |
2440 | char *writep; | |
2441 | fragS *fragP; | |
2442 | symbolS *add_symP; | |
2443 | symbolS *sub_symP; | |
2444 | long int add_num; | |
2445 | { | |
2446 | if (warn_for_branch_expansion) | |
08caf3f8 HPN |
2447 | as_warn_where (fragP->fr_file, fragP->fr_line, |
2448 | _("32-bit conditional branch generated")); | |
3bcbcc3d HPN |
2449 | |
2450 | /* Here, writep points to what will be opcodep + 2. First, we change | |
2451 | the actual branch in opcodep[0] and opcodep[1], so that in the | |
2452 | final insn, it will look like: | |
2453 | opcodep+10: Bcc .-6 | |
2454 | ||
2455 | This means we don't have to worry about changing the opcode or | |
08caf3f8 | 2456 | messing with the delay-slot instruction. So, we move it to last in |
3bcbcc3d HPN |
2457 | the "extended" branch, and just change the displacement. Admittedly, |
2458 | it's not the optimal extended construct, but we should get this | |
2459 | rarely enough that it shouldn't matter. */ | |
2460 | ||
47926f60 | 2461 | writep[8] = branch_disp (-2 - 6); |
3bcbcc3d HPN |
2462 | writep[9] = opcodep[1]; |
2463 | ||
2464 | /* Then, we change the branch to an unconditional branch over the | |
2465 | extended part, to the new location of the Bcc: | |
2466 | opcodep: BA .+10 | |
2467 | opcodep+2: NOP | |
2468 | ||
2469 | Note that these two writes are to currently different locations, | |
2470 | merged later. */ | |
2471 | ||
2472 | md_number_to_chars (opcodep, BA_QUICK_OPCODE + 8, 2); | |
2473 | md_number_to_chars (writep, NOP_OPCODE, 2); | |
2474 | ||
2475 | /* Then the extended thing, the 32-bit jump insn. | |
08caf3f8 HPN |
2476 | opcodep+4: JUMP [PC+] |
2477 | or, in the PIC case, | |
2478 | opcodep+4: ADD [PC+],PC. */ | |
3bcbcc3d | 2479 | |
08caf3f8 HPN |
2480 | md_number_to_chars (writep + 2, |
2481 | pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2); | |
3bcbcc3d HPN |
2482 | |
2483 | /* We have to fill in the actual value too. | |
2484 | opcodep+6: .DWORD | |
2485 | This is most probably an expression, but we can cope with an absolute | |
08caf3f8 | 2486 | value too. FIXME: Testcase needed with and without pic. */ |
3bcbcc3d HPN |
2487 | |
2488 | if (add_symP == NULL && sub_symP == NULL) | |
08caf3f8 HPN |
2489 | { |
2490 | /* An absolute address. */ | |
2491 | if (pic) | |
2492 | fix_new (fragP, writep + 4 - fragP->fr_literal, 4, | |
2493 | section_symbol (absolute_section), | |
2494 | add_num, 1, BFD_RELOC_32_PCREL); | |
2495 | else | |
2496 | md_number_to_chars (writep + 4, add_num, 4); | |
2497 | } | |
3bcbcc3d HPN |
2498 | else |
2499 | { | |
08caf3f8 HPN |
2500 | if (sub_symP != NULL) |
2501 | as_bad_where (fragP->fr_file, fragP->fr_line, | |
2502 | _("Complex expression not supported")); | |
3bcbcc3d | 2503 | |
08caf3f8 | 2504 | /* Not absolute, we have to make it a frag for later evaluation. */ |
3bcbcc3d | 2505 | fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP, |
08caf3f8 | 2506 | add_num, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32); |
3bcbcc3d HPN |
2507 | } |
2508 | } | |
2509 | ||
08caf3f8 HPN |
2510 | /* Get the size of an immediate-reloc in bytes. Only valid for PIC |
2511 | relocs. */ | |
2512 | ||
2513 | static unsigned int | |
2514 | cris_get_pic_reloc_size (reloc) | |
2515 | bfd_reloc_code_real_type reloc; | |
2516 | { | |
2517 | return reloc == BFD_RELOC_CRIS_16_GOTPLT || reloc == BFD_RELOC_CRIS_16_GOT | |
2518 | ? 2 : 4; | |
2519 | } | |
2520 | ||
2521 | /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP. | |
2522 | Adjust *EXPRP with any addend found after the PIC suffix. */ | |
2523 | ||
2524 | static void | |
2525 | cris_get_pic_suffix (cPP, relocp, exprP) | |
2526 | char **cPP; | |
2527 | bfd_reloc_code_real_type *relocp; | |
2528 | expressionS *exprP; | |
2529 | { | |
2530 | char *s = *cPP; | |
2531 | unsigned int i; | |
2532 | expressionS const_expr; | |
2533 | ||
2534 | const struct pic_suffixes_struct | |
2535 | { | |
2536 | const char *const suffix; | |
2537 | unsigned int len; | |
2538 | bfd_reloc_code_real_type reloc; | |
2539 | } pic_suffixes[] = | |
2540 | { | |
2541 | #undef PICMAP | |
2542 | #define PICMAP(s, r) {s, sizeof (s) - 1, r} | |
2543 | /* Keep this in order with longest unambiguous prefix first. */ | |
2544 | PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT), | |
2545 | PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT), | |
2546 | PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL), | |
2547 | PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL), | |
2548 | PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL), | |
2549 | PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT), | |
2550 | PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT) | |
2551 | }; | |
2552 | ||
2553 | /* We've already seen the ':', so consume it. */ | |
2554 | s++; | |
2555 | ||
2556 | for (i = 0; i < sizeof (pic_suffixes)/sizeof (pic_suffixes[0]); i++) | |
2557 | { | |
2558 | if (strncmp (s, pic_suffixes[i].suffix, pic_suffixes[i].len) == 0 | |
2559 | && ! is_part_of_name (s[pic_suffixes[i].len])) | |
2560 | { | |
2561 | /* We have a match. Consume the suffix and set the relocation | |
2562 | type. */ | |
2563 | s += pic_suffixes[i].len; | |
2564 | ||
2565 | /* There can be a constant term appended. If so, we will add it | |
2566 | to *EXPRP. */ | |
2567 | if (*s == '+' || *s == '-') | |
2568 | { | |
2569 | if (! cris_get_expression (&s, &const_expr)) | |
2570 | /* There was some kind of syntax error. Bail out. */ | |
2571 | break; | |
2572 | ||
2573 | /* Allow complex expressions as the constant part. It still | |
2574 | has to be a assembly-time constant or there will be an | |
2575 | error emitting the reloc. This makes the PIC qualifiers | |
d551a338 | 2576 | idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we |
08caf3f8 HPN |
2577 | recognize here; the latter is parsed in the incoming |
2578 | expression. */ | |
2579 | exprP->X_add_symbol = make_expr_symbol (exprP); | |
2580 | exprP->X_op = O_add; | |
2581 | exprP->X_add_number = 0; | |
2582 | exprP->X_op_symbol = make_expr_symbol (&const_expr); | |
2583 | } | |
2584 | ||
2585 | *relocp = pic_suffixes[i].reloc; | |
2586 | *cPP = s; | |
2587 | return; | |
2588 | } | |
2589 | } | |
2590 | ||
2591 | /* No match. Don't consume anything; fall back and there will be a | |
2592 | syntax error. */ | |
2593 | } | |
2594 | ||
3bcbcc3d HPN |
2595 | /* This *could* be: |
2596 | ||
47926f60 KH |
2597 | Turn a string in input_line_pointer into a floating point constant |
2598 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2599 | of LITTLENUMS emitted is stored in *SIZEP. | |
3bcbcc3d HPN |
2600 | |
2601 | type A character from FLTCHARS that describes what kind of | |
2602 | floating-point number is wanted. | |
2603 | ||
2604 | litp A pointer to an array that the result should be stored in. | |
2605 | ||
2606 | sizep A pointer to an integer where the size of the result is stored. | |
2607 | ||
2608 | But we don't support floating point constants in assembly code *at all*, | |
2609 | since it's suboptimal and just opens up bug opportunities. GCC emits | |
2610 | the bit patterns as hex. All we could do here is to emit what GCC | |
2611 | would have done in the first place. *Nobody* writes floating-point | |
2612 | code as assembly code, but if they do, they should be able enough to | |
2613 | find out the correct bit patterns and use them. */ | |
2614 | ||
2615 | char * | |
2616 | md_atof (type, litp, sizep) | |
2617 | char type ATTRIBUTE_UNUSED; | |
2618 | char *litp ATTRIBUTE_UNUSED; | |
47926f60 | 2619 | int *sizep ATTRIBUTE_UNUSED; |
3bcbcc3d HPN |
2620 | { |
2621 | /* FIXME: Is this function mentioned in the internals.texi manual? If | |
2622 | not, add it. */ | |
2623 | return _("Bad call to md_atof () - floating point formats are not supported"); | |
2624 | } | |
2625 | ||
3bcbcc3d HPN |
2626 | /* Turn a number as a fixS * into a series of bytes that represents the |
2627 | number on the target machine. The purpose of this procedure is the | |
2628 | same as that of md_number_to_chars but this procedure is supposed to | |
2629 | handle general bit field fixes and machine-dependent fixups. | |
2630 | ||
2631 | bufp Pointer to an array where the result should be stored. | |
2632 | ||
2633 | val The value to store. | |
2634 | ||
2635 | n The number of bytes in "val" that should be stored. | |
2636 | ||
08caf3f8 HPN |
2637 | fixP The fix to be applied to the bit field starting at bufp. |
2638 | ||
2639 | seg The segment containing this number. */ | |
3bcbcc3d HPN |
2640 | |
2641 | static void | |
08caf3f8 | 2642 | cris_number_to_imm (bufp, val, n, fixP, seg) |
3bcbcc3d HPN |
2643 | char *bufp; |
2644 | long val; | |
2645 | int n; | |
2646 | fixS *fixP; | |
08caf3f8 | 2647 | segT seg; |
3bcbcc3d HPN |
2648 | { |
2649 | segT sym_seg; | |
2650 | ||
2651 | know (n <= 4); | |
2652 | know (fixP); | |
2653 | ||
2654 | /* We put the relative "vma" for the other segment for inter-segment | |
2655 | relocations in the object data to stay binary "compatible" (with an | |
2656 | uninteresting old version) for the relocation. | |
2657 | Maybe delete some day. */ | |
2658 | if (fixP->fx_addsy | |
08caf3f8 | 2659 | && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != seg) |
3bcbcc3d HPN |
2660 | val += sym_seg->vma; |
2661 | ||
08caf3f8 HPN |
2662 | if (fixP->fx_addsy != NULL || fixP->fx_pcrel) |
2663 | switch (fixP->fx_r_type) | |
2664 | { | |
2665 | /* These must be fully resolved when getting here. */ | |
2666 | case BFD_RELOC_32_PCREL: | |
2667 | case BFD_RELOC_16_PCREL: | |
2668 | case BFD_RELOC_8_PCREL: | |
2669 | as_bad_where (fixP->fx_frag->fr_file, fixP->fx_frag->fr_line, | |
2670 | _("PC-relative relocation must be trivially resolved")); | |
2671 | default: | |
2672 | ; | |
2673 | } | |
2674 | ||
3bcbcc3d HPN |
2675 | switch (fixP->fx_r_type) |
2676 | { | |
2677 | /* Ditto here, we put the addend into the object code as | |
2678 | well as the reloc addend. Keep it that way for now, to simplify | |
2679 | regression tests on the object file contents. FIXME: Seems | |
2680 | uninteresting now that we have a test suite. */ | |
2681 | ||
08caf3f8 HPN |
2682 | case BFD_RELOC_CRIS_16_GOT: |
2683 | case BFD_RELOC_CRIS_32_GOT: | |
2684 | case BFD_RELOC_CRIS_32_GOTREL: | |
2685 | case BFD_RELOC_CRIS_16_GOTPLT: | |
2686 | case BFD_RELOC_CRIS_32_GOTPLT: | |
2687 | case BFD_RELOC_CRIS_32_PLT_GOTREL: | |
2688 | case BFD_RELOC_CRIS_32_PLT_PCREL: | |
2689 | /* We don't want to put in any kind of non-zero bits in the data | |
2690 | being relocated for these. */ | |
2691 | break; | |
2692 | ||
3bcbcc3d | 2693 | case BFD_RELOC_32: |
08caf3f8 | 2694 | case BFD_RELOC_32_PCREL: |
3bcbcc3d HPN |
2695 | /* No use having warnings here, since most hosts have a 32-bit type |
2696 | for "long" (which will probably change soon, now that I wrote | |
2697 | this). */ | |
2698 | bufp[3] = (val >> 24) & 0xFF; | |
2699 | bufp[2] = (val >> 16) & 0xFF; | |
2700 | bufp[1] = (val >> 8) & 0xFF; | |
2701 | bufp[0] = val & 0xFF; | |
2702 | break; | |
2703 | ||
2704 | /* FIXME: The 16 and 8-bit cases should have a way to check | |
2705 | whether a signed or unsigned (or any signedness) number is | |
2706 | accepted. | |
2707 | FIXME: Does the as_bad calls find the line number by themselves, | |
2708 | or should we change them into as_bad_where? */ | |
2709 | ||
2710 | case BFD_RELOC_16: | |
08caf3f8 | 2711 | case BFD_RELOC_16_PCREL: |
3bcbcc3d HPN |
2712 | if (val > 0xffff || val < -32768) |
2713 | as_bad (_("Value not in 16 bit range: %ld"), val); | |
2714 | if (! fixP->fx_addsy) | |
2715 | { | |
2716 | bufp[1] = (val >> 8) & 0xFF; | |
2717 | bufp[0] = val & 0xFF; | |
2718 | } | |
2719 | break; | |
2720 | ||
2721 | case BFD_RELOC_8: | |
08caf3f8 | 2722 | case BFD_RELOC_8_PCREL: |
3bcbcc3d HPN |
2723 | if (val > 255 || val < -128) |
2724 | as_bad (_("Value not in 8 bit range: %ld"), val); | |
2725 | if (! fixP->fx_addsy) | |
2726 | bufp[0] = val & 0xFF; | |
2727 | break; | |
2728 | ||
2729 | case BFD_RELOC_CRIS_UNSIGNED_4: | |
2730 | if (val > 15 || val < 0) | |
2731 | as_bad (_("Value not in 4 bit unsigned range: %ld"), val); | |
2732 | if (! fixP->fx_addsy) | |
2733 | bufp[0] |= val & 0x0F; | |
2734 | break; | |
2735 | ||
2736 | case BFD_RELOC_CRIS_UNSIGNED_5: | |
2737 | if (val > 31 || val < 0) | |
2738 | as_bad (_("Value not in 5 bit unsigned range: %ld"), val); | |
2739 | if (! fixP->fx_addsy) | |
2740 | bufp[0] |= val & 0x1F; | |
2741 | break; | |
2742 | ||
2743 | case BFD_RELOC_CRIS_SIGNED_6: | |
2744 | if (val > 31 || val < -32) | |
2745 | as_bad (_("Value not in 6 bit range: %ld"), val); | |
2746 | if (! fixP->fx_addsy) | |
2747 | bufp[0] |= val & 0x3F; | |
2748 | break; | |
2749 | ||
2750 | case BFD_RELOC_CRIS_UNSIGNED_6: | |
2751 | if (val > 63 || val < 0) | |
2752 | as_bad (_("Value not in 6 bit unsigned range: %ld"), val); | |
2753 | if (! fixP->fx_addsy) | |
2754 | bufp[0] |= val & 0x3F; | |
2755 | break; | |
2756 | ||
2757 | case BFD_RELOC_CRIS_BDISP8: | |
2758 | if (! fixP->fx_addsy) | |
2759 | bufp[0] = branch_disp (val); | |
2760 | break; | |
2761 | ||
2762 | case BFD_RELOC_NONE: | |
2763 | /* May actually happen automatically. For example at broken | |
2764 | words, if the word turns out not to be broken. | |
47926f60 | 2765 | FIXME: When? Which testcase? */ |
3bcbcc3d HPN |
2766 | if (! fixP->fx_addsy) |
2767 | md_number_to_chars (bufp, val, n); | |
2768 | break; | |
2769 | ||
2770 | case BFD_RELOC_VTABLE_INHERIT: | |
2771 | /* This borrowed from tc-ppc.c on a whim. */ | |
2772 | if (fixP->fx_addsy | |
2773 | && !S_IS_DEFINED (fixP->fx_addsy) | |
2774 | && !S_IS_WEAK (fixP->fx_addsy)) | |
2775 | S_SET_WEAK (fixP->fx_addsy); | |
7b15d668 HPN |
2776 | /* Fall through. */ |
2777 | ||
3bcbcc3d | 2778 | case BFD_RELOC_VTABLE_ENTRY: |
3bcbcc3d HPN |
2779 | fixP->fx_done = 0; |
2780 | break; | |
2781 | ||
2782 | default: | |
2783 | BAD_CASE (fixP->fx_r_type); | |
2784 | } | |
2785 | } | |
2786 | ||
3bcbcc3d HPN |
2787 | /* Processes machine-dependent command line options. Called once for |
2788 | each option on the command line that the machine-independent part of | |
2789 | GAS does not understand. */ | |
47926f60 | 2790 | |
3bcbcc3d HPN |
2791 | int |
2792 | md_parse_option (arg, argp) | |
2793 | int arg; | |
2794 | char *argp ATTRIBUTE_UNUSED; | |
2795 | { | |
2796 | switch (arg) | |
2797 | { | |
2798 | case 'H': | |
2799 | case 'h': | |
7b15d668 | 2800 | printf (_("Please use --help to see usage and options for this assembler.\n")); |
3bcbcc3d | 2801 | md_show_usage (stdout); |
7b15d668 | 2802 | exit (EXIT_SUCCESS); |
3bcbcc3d HPN |
2803 | |
2804 | case 'N': | |
2805 | warn_for_branch_expansion = 1; | |
2806 | return 1; | |
2807 | ||
7b15d668 HPN |
2808 | case OPTION_NO_US: |
2809 | demand_register_prefix = true; | |
2810 | ||
2811 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour) | |
08caf3f8 | 2812 | as_bad (_("--no-underscore is invalid with a.out format")); |
7b15d668 HPN |
2813 | else |
2814 | symbols_have_leading_underscore = false; | |
2815 | return 1; | |
2816 | ||
2817 | case OPTION_US: | |
2818 | demand_register_prefix = false; | |
2819 | symbols_have_leading_underscore = true; | |
2820 | return 1; | |
2821 | ||
08caf3f8 HPN |
2822 | case OPTION_PIC: |
2823 | pic = true; | |
2824 | return 1; | |
2825 | ||
3bcbcc3d HPN |
2826 | default: |
2827 | return 0; | |
47926f60 | 2828 | } |
3bcbcc3d HPN |
2829 | } |
2830 | ||
2831 | /* Round up a section size to the appropriate boundary. */ | |
2832 | valueT | |
2833 | md_section_align (segment, size) | |
2834 | segT segment; | |
2835 | valueT size; | |
2836 | { | |
2837 | /* Round all sects to multiple of 4, except the bss section, which | |
2838 | we'll round to word-size. | |
2839 | ||
2840 | FIXME: Check if this really matters. All sections should be | |
2841 | rounded up, and all sections should (optionally) be assumed to be | |
2842 | dword-aligned, it's just that there is actual usage of linking to a | |
2843 | multiple of two. */ | |
2844 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour) | |
2845 | { | |
2846 | if (segment == bss_section) | |
2847 | return (size + 1) & ~1; | |
2848 | return (size + 3) & ~3; | |
2849 | } | |
2850 | else | |
2851 | { | |
2852 | /* FIXME: Is this wanted? It matches the testsuite, but that's not | |
2853 | really a valid reason. */ | |
2854 | if (segment == text_section) | |
2855 | return (size + 3) & ~3; | |
2856 | } | |
2857 | ||
2858 | return size; | |
2859 | } | |
2860 | ||
3bcbcc3d HPN |
2861 | /* Generate a machine-dependent relocation. */ |
2862 | arelent * | |
2863 | tc_gen_reloc (section, fixP) | |
2864 | asection *section ATTRIBUTE_UNUSED; | |
2865 | fixS *fixP; | |
2866 | { | |
2867 | arelent *relP; | |
2868 | bfd_reloc_code_real_type code; | |
2869 | ||
2870 | switch (fixP->fx_r_type) | |
2871 | { | |
08caf3f8 HPN |
2872 | case BFD_RELOC_CRIS_16_GOT: |
2873 | case BFD_RELOC_CRIS_32_GOT: | |
2874 | case BFD_RELOC_CRIS_16_GOTPLT: | |
2875 | case BFD_RELOC_CRIS_32_GOTPLT: | |
2876 | case BFD_RELOC_CRIS_32_GOTREL: | |
2877 | case BFD_RELOC_CRIS_32_PLT_GOTREL: | |
2878 | case BFD_RELOC_CRIS_32_PLT_PCREL: | |
3bcbcc3d HPN |
2879 | case BFD_RELOC_32: |
2880 | case BFD_RELOC_16: | |
2881 | case BFD_RELOC_8: | |
2882 | case BFD_RELOC_VTABLE_INHERIT: | |
2883 | case BFD_RELOC_VTABLE_ENTRY: | |
2884 | code = fixP->fx_r_type; | |
2885 | break; | |
2886 | default: | |
2887 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2888 | _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant")); | |
2889 | return 0; | |
2890 | } | |
2891 | ||
2892 | relP = (arelent *) xmalloc (sizeof (arelent)); | |
2893 | assert (relP != 0); | |
2894 | relP->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
2895 | *relP->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); | |
2896 | relP->address = fixP->fx_frag->fr_address + fixP->fx_where; | |
2897 | ||
2898 | if (fixP->fx_pcrel) | |
47926f60 | 2899 | /* FIXME: Is this correct? */ |
3bcbcc3d HPN |
2900 | relP->addend = fixP->fx_addnumber; |
2901 | else | |
47926f60 | 2902 | /* At least *this one* is correct. */ |
3bcbcc3d HPN |
2903 | relP->addend = fixP->fx_offset; |
2904 | ||
2905 | /* This is the standard place for KLUDGEs to work around bugs in | |
2906 | bfd_install_relocation (first such note in the documentation | |
2907 | appears with binutils-2.8). | |
2908 | ||
2909 | That function bfd_install_relocation does the wrong thing with | |
2910 | putting stuff into the addend of a reloc (it should stay out) for a | |
2911 | weak symbol. The really bad thing is that it adds the | |
2912 | "segment-relative offset" of the symbol into the reloc. In this | |
2913 | case, the reloc should instead be relative to the symbol with no | |
2914 | other offset than the assembly code shows; and since the symbol is | |
2915 | weak, any local definition should be ignored until link time (or | |
2916 | thereafter). | |
2917 | To wit: weaksym+42 should be weaksym+42 in the reloc, | |
2918 | not weaksym+(offset_from_segment_of_local_weaksym_definition) | |
2919 | ||
2920 | To "work around" this, we subtract the segment-relative offset of | |
2921 | "known" weak symbols. This evens out the extra offset. | |
2922 | ||
2923 | That happens for a.out but not for ELF, since for ELF, | |
2924 | bfd_install_relocation uses the "special function" field of the | |
2925 | howto, and does not execute the code that needs to be undone. */ | |
2926 | ||
2927 | if (OUTPUT_FLAVOR == bfd_target_aout_flavour | |
2928 | && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy) | |
2929 | && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy))) | |
47926f60 KH |
2930 | { |
2931 | relP->addend -= S_GET_VALUE (fixP->fx_addsy); | |
2932 | } | |
3bcbcc3d HPN |
2933 | |
2934 | relP->howto = bfd_reloc_type_lookup (stdoutput, code); | |
2935 | if (! relP->howto) | |
2936 | { | |
2937 | const char *name; | |
2938 | ||
2939 | name = S_GET_NAME (fixP->fx_addsy); | |
2940 | if (name == NULL) | |
2941 | name = _("<unknown>"); | |
2942 | as_fatal (_("Cannot generate relocation type for symbol %s, code %s"), | |
2943 | name, bfd_get_reloc_code_name (code)); | |
2944 | } | |
2945 | ||
2946 | return relP; | |
2947 | } | |
2948 | ||
3bcbcc3d | 2949 | /* Machine-dependent usage-output. */ |
47926f60 | 2950 | |
3bcbcc3d HPN |
2951 | void |
2952 | md_show_usage (stream) | |
2953 | FILE *stream; | |
2954 | { | |
08caf3f8 | 2955 | /* The messages are formatted to line up with the generic options. */ |
7b15d668 HPN |
2956 | fprintf (stream, _("CRIS-specific options:\n")); |
2957 | fprintf (stream, "%s", | |
2958 | _(" -h, -H Don't execute, print this help text. Deprecated.\n")); | |
2959 | fprintf (stream, "%s", | |
2960 | _(" -N Warn when branches are expanded to jumps.\n")); | |
2961 | fprintf (stream, "%s", | |
2962 | _(" --underscore User symbols are normally prepended with underscore.\n")); | |
2963 | fprintf (stream, "%s", | |
2964 | _(" Registers will not need any prefix.\n")); | |
2965 | fprintf (stream, "%s", | |
2966 | _(" --no-underscore User symbols do not have any prefix.\n")); | |
2967 | fprintf (stream, "%s", | |
2968 | _(" Registers will require a `$'-prefix.\n")); | |
08caf3f8 HPN |
2969 | fprintf (stream, "%s", |
2970 | _(" --pic Enable generation of position-independent code.\n")); | |
3bcbcc3d HPN |
2971 | } |
2972 | ||
3bcbcc3d | 2973 | /* Apply a fixS (fixup of an instruction or data that we didn't have |
47926f60 | 2974 | enough info to complete immediately) to the data in a frag. */ |
3bcbcc3d HPN |
2975 | |
2976 | int | |
08caf3f8 | 2977 | md_apply_fix3 (fixP, valP, seg) |
3bcbcc3d HPN |
2978 | fixS *fixP; |
2979 | valueT *valP; | |
08caf3f8 | 2980 | segT seg; |
3bcbcc3d HPN |
2981 | { |
2982 | long val = *valP; | |
2983 | ||
2984 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2985 | ||
2986 | if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) | |
2987 | fixP->fx_done = 1; | |
2988 | ||
2989 | if (fixP->fx_bit_fixP || fixP->fx_im_disp != 0) | |
2990 | { | |
2991 | as_bad_where (fixP->fx_file, fixP->fx_line, _("Invalid relocation")); | |
2992 | fixP->fx_done = 1; | |
2993 | } | |
2994 | else | |
47926f60 KH |
2995 | { |
2996 | /* I took this from tc-arc.c, since we used to not support | |
2997 | fx_subsy != NULL. I'm not totally sure it's TRT. */ | |
2998 | if (fixP->fx_subsy != (symbolS *) NULL) | |
2999 | { | |
3000 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) | |
3001 | val -= S_GET_VALUE (fixP->fx_subsy); | |
3002 | else | |
3003 | { | |
3004 | /* We can't actually support subtracting a symbol. */ | |
3005 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3006 | _("expression too complex")); | |
3007 | } | |
3008 | } | |
3009 | ||
08caf3f8 | 3010 | cris_number_to_imm (buf, val, fixP->fx_size, fixP, seg); |
47926f60 | 3011 | } |
3bcbcc3d HPN |
3012 | |
3013 | return 1; | |
3014 | } | |
3015 | ||
3bcbcc3d HPN |
3016 | /* All relocations are relative to the location just after the fixup; |
3017 | the address of the fixup plus its size. */ | |
3018 | ||
3019 | long | |
3020 | md_pcrel_from (fixP) | |
3021 | fixS *fixP; | |
3022 | { | |
3023 | valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; | |
3024 | ||
3025 | /* FIXME: We get here only at the end of assembly, when X in ".-X" is | |
08caf3f8 HPN |
3026 | still unknown. Since we don't have pc-relative relocations in a.out, |
3027 | this is invalid. What to do if anything for a.out, is to add | |
3bcbcc3d | 3028 | pc-relative relocations everywhere including the elinux program |
08caf3f8 HPN |
3029 | loader. For ELF, allow straight-forward PC-relative relocations, |
3030 | which are always relative to the location after the relocation. */ | |
3031 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3032 | || (fixP->fx_r_type != BFD_RELOC_8_PCREL | |
3033 | && fixP->fx_r_type != BFD_RELOC_16_PCREL | |
3034 | && fixP->fx_r_type != BFD_RELOC_32_PCREL)) | |
3035 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3036 | _("Invalid pc-relative relocation")); | |
3bcbcc3d HPN |
3037 | return fixP->fx_size + addr; |
3038 | } | |
3039 | ||
47926f60 | 3040 | /* We have no need to give defaults for symbol-values. */ |
3bcbcc3d HPN |
3041 | symbolS * |
3042 | md_undefined_symbol (name) | |
3043 | char *name ATTRIBUTE_UNUSED; | |
3044 | { | |
3045 | return 0; | |
3046 | } | |
3047 | ||
3bcbcc3d HPN |
3048 | /* Definition of TC_FORCE_RELOCATION. |
3049 | FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c | |
3050 | when doing multi-object format with ELF, since it's the only other | |
3051 | multi-object-format target with a.out and ELF. */ | |
3052 | int | |
3053 | md_cris_force_relocation (fixp) | |
3054 | struct fix *fixp; | |
3055 | { | |
08caf3f8 HPN |
3056 | switch (fixp->fx_r_type) |
3057 | { | |
3058 | case BFD_RELOC_VTABLE_INHERIT: | |
3059 | case BFD_RELOC_VTABLE_ENTRY: | |
3060 | case BFD_RELOC_CRIS_16_GOT: | |
3061 | case BFD_RELOC_CRIS_32_GOT: | |
3062 | case BFD_RELOC_CRIS_16_GOTPLT: | |
3063 | case BFD_RELOC_CRIS_32_GOTPLT: | |
3064 | case BFD_RELOC_CRIS_32_GOTREL: | |
3065 | case BFD_RELOC_CRIS_32_PLT_GOTREL: | |
3066 | case BFD_RELOC_CRIS_32_PLT_PCREL: | |
3067 | return 1; | |
3068 | default: | |
3069 | ; | |
3070 | } | |
3071 | ||
3bcbcc3d HPN |
3072 | return 0; |
3073 | } | |
3074 | ||
3075 | /* Check and emit error if broken-word handling has failed to fix up a | |
3076 | case-table. This is called from write.c, after doing everything it | |
3077 | knows about how to handle broken words. */ | |
3078 | ||
3079 | void | |
3080 | tc_cris_check_adjusted_broken_word (new_offset, brokwP) | |
3081 | offsetT new_offset; | |
3082 | struct broken_word *brokwP; | |
3083 | { | |
3084 | if (new_offset > 32767 || new_offset < -32768) | |
47926f60 | 3085 | /* We really want a genuine error, not a warning, so make it one. */ |
3bcbcc3d HPN |
3086 | as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line, |
3087 | _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."), | |
3088 | (long) new_offset); | |
3089 | } | |
3090 | ||
7b15d668 HPN |
3091 | /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */ |
3092 | ||
3093 | static void cris_force_reg_prefix () | |
3094 | { | |
3095 | demand_register_prefix = true; | |
3096 | } | |
3097 | ||
3098 | /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */ | |
3099 | ||
3100 | static void cris_relax_reg_prefix () | |
3101 | { | |
3102 | demand_register_prefix = false; | |
3103 | } | |
3104 | ||
3105 | /* Adjust for having a leading '_' on all user symbols. */ | |
3106 | ||
3107 | static void cris_sym_leading_underscore () | |
3108 | { | |
3109 | /* We can't really do anything more than assert that what the program | |
3110 | thinks symbol starts with agrees with the command-line options, since | |
3111 | the bfd is already created. */ | |
3112 | ||
3113 | if (symbols_have_leading_underscore == false) | |
ed67db7a | 3114 | as_bad (_(".syntax %s requires command-line option `--underscore'"), |
7b15d668 HPN |
3115 | SYNTAX_USER_SYM_LEADING_UNDERSCORE); |
3116 | } | |
3117 | ||
3118 | /* Adjust for not having any particular prefix on user symbols. */ | |
3119 | ||
3120 | static void cris_sym_no_leading_underscore () | |
3121 | { | |
3122 | if (symbols_have_leading_underscore == true) | |
ed67db7a | 3123 | as_bad (_(".syntax %s requires command-line option `--no-underscore'"), |
7b15d668 HPN |
3124 | SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE); |
3125 | } | |
3126 | ||
3127 | /* Handle the .syntax pseudo, which takes an argument that decides what | |
3128 | syntax the assembly code has. */ | |
3129 | ||
3130 | static void | |
3131 | s_syntax (ignore) | |
3132 | int ignore ATTRIBUTE_UNUSED; | |
3133 | { | |
3134 | static const struct syntaxes | |
3135 | { | |
3136 | const char *operand; | |
3137 | void (*fn) PARAMS ((void)); | |
4a1805b1 | 3138 | } syntax_table[] = |
7b15d668 HPN |
3139 | {{SYNTAX_ENFORCE_REG_PREFIX, cris_force_reg_prefix}, |
3140 | {SYNTAX_RELAX_REG_PREFIX, cris_relax_reg_prefix}, | |
3141 | {SYNTAX_USER_SYM_LEADING_UNDERSCORE, cris_sym_leading_underscore}, | |
3142 | {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE, cris_sym_no_leading_underscore}}; | |
3143 | ||
3144 | const struct syntaxes *sp; | |
3145 | ||
3146 | for (sp = syntax_table; | |
3147 | sp < syntax_table + sizeof (syntax_table) / sizeof (syntax_table[0]); | |
3148 | sp++) | |
3149 | { | |
3150 | if (strncmp (input_line_pointer, sp->operand, | |
3151 | strlen (sp->operand)) == 0) | |
3152 | { | |
bc805888 | 3153 | (sp->fn) (); |
7b15d668 HPN |
3154 | |
3155 | input_line_pointer += strlen (sp->operand); | |
3156 | demand_empty_rest_of_line (); | |
3157 | return; | |
3158 | } | |
3159 | } | |
3160 | ||
3161 | as_bad (_("Unknown .syntax operand")); | |
3162 | } | |
3163 | ||
fcdc20a4 HPN |
3164 | /* Wrapper for dwarf2_directive_file to emit error if this is seen when |
3165 | not emitting ELF. */ | |
3166 | ||
3167 | static void | |
3168 | s_cris_file (dummy) | |
3169 | int dummy; | |
3170 | { | |
3171 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour) | |
ed67db7a | 3172 | as_bad (_("Pseudodirective .file is only valid when generating ELF")); |
fcdc20a4 HPN |
3173 | else |
3174 | dwarf2_directive_file (dummy); | |
3175 | } | |
3176 | ||
3177 | /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not | |
3178 | emitting ELF. */ | |
3179 | ||
3180 | static void | |
3181 | s_cris_loc (dummy) | |
3182 | int dummy; | |
3183 | { | |
3184 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour) | |
ed67db7a | 3185 | as_bad (_("Pseudodirective .loc is only valid when generating ELF")); |
fcdc20a4 HPN |
3186 | else |
3187 | dwarf2_directive_loc (dummy); | |
3188 | } | |
3189 | ||
3bcbcc3d HPN |
3190 | /* |
3191 | * Local variables: | |
3192 | * eval: (c-set-style "gnu") | |
3193 | * indent-tabs-mode: t | |
3194 | * End: | |
3195 | */ |