Commit | Line | Data |
---|---|---|
c2dcd04e | 1 | /* tc-h8300.c -- Assemble code for the Renesas H8/300 |
cc8a6dd0 | 2 | Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, |
c2dcd04e | 3 | 2001, 2002, 2003 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free | |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
21 | ||
bc0d738a | 22 | /* Written By Steve Chamberlain <sac@cygnus.com>. */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "subsegs.h" | |
27 | #include "bfd.h" | |
2c8714f2 NC |
28 | |
29 | #ifdef BFD_ASSEMBLER | |
30 | #include "dwarf2dbg.h" | |
31 | #endif | |
32 | ||
252b5132 RH |
33 | #define DEFINE_TABLE |
34 | #define h8_opcodes ops | |
35 | #include "opcode/h8300.h" | |
3882b010 | 36 | #include "safe-ctype.h" |
252b5132 | 37 | |
7e0de7bf JL |
38 | #ifdef OBJ_ELF |
39 | #include "elf/h8.h" | |
7e0de7bf JL |
40 | #endif |
41 | ||
63a0b638 | 42 | const char comment_chars[] = ";"; |
252b5132 | 43 | const char line_comment_chars[] = "#"; |
63a0b638 | 44 | const char line_separator_chars[] = ""; |
252b5132 | 45 | |
3048287a NC |
46 | void cons PARAMS ((int)); |
47 | void sbranch PARAMS ((int)); | |
48 | void h8300hmode PARAMS ((int)); | |
49 | void h8300smode PARAMS ((int)); | |
8d9cd6b1 NC |
50 | void h8300hnmode PARAMS ((int)); |
51 | void h8300snmode PARAMS ((int)); | |
3048287a | 52 | static void pint PARAMS ((int)); |
252b5132 RH |
53 | |
54 | int Hmode; | |
55 | int Smode; | |
8d9cd6b1 | 56 | int Nmode; |
3048287a | 57 | |
252b5132 RH |
58 | #define PSIZE (Hmode ? L_32 : L_16) |
59 | #define DMODE (L_16) | |
60 | #define DSYMMODE (Hmode ? L_24 : L_16) | |
3048287a | 61 | |
c2dcd04e | 62 | int bsize = L_8; /* Default branch displacement. */ |
252b5132 | 63 | |
a720f7bc KD |
64 | struct h8_instruction |
65 | { | |
66 | int length; | |
67 | int noperands; | |
68 | int idx; | |
69 | int size; | |
70 | const struct h8_opcode *opcode; | |
71 | }; | |
72 | ||
73 | struct h8_instruction *h8_instructions; | |
74 | ||
252b5132 | 75 | void |
3048287a NC |
76 | h8300hmode (arg) |
77 | int arg ATTRIBUTE_UNUSED; | |
252b5132 RH |
78 | { |
79 | Hmode = 1; | |
80 | Smode = 0; | |
83e20b45 JL |
81 | #ifdef BFD_ASSEMBLER |
82 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h)) | |
83 | as_warn (_("could not set architecture and machine")); | |
84 | #endif | |
252b5132 RH |
85 | } |
86 | ||
87 | void | |
3048287a NC |
88 | h8300smode (arg) |
89 | int arg ATTRIBUTE_UNUSED; | |
252b5132 RH |
90 | { |
91 | Smode = 1; | |
92 | Hmode = 1; | |
83e20b45 JL |
93 | #ifdef BFD_ASSEMBLER |
94 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s)) | |
95 | as_warn (_("could not set architecture and machine")); | |
96 | #endif | |
252b5132 | 97 | } |
70d6ecf3 | 98 | |
8d9cd6b1 NC |
99 | void |
100 | h8300hnmode (arg) | |
101 | int arg ATTRIBUTE_UNUSED; | |
102 | { | |
103 | Hmode = 1; | |
104 | Smode = 0; | |
105 | Nmode = 1; | |
106 | #ifdef BFD_ASSEMBLER | |
107 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300hn)) | |
108 | as_warn (_("could not set architecture and machine")); | |
109 | #endif | |
110 | } | |
111 | ||
112 | void | |
113 | h8300snmode (arg) | |
114 | int arg ATTRIBUTE_UNUSED; | |
115 | { | |
116 | Smode = 1; | |
117 | Hmode = 1; | |
118 | Nmode = 1; | |
119 | #ifdef BFD_ASSEMBLER | |
120 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sn)) | |
121 | as_warn (_("could not set architecture and machine")); | |
122 | #endif | |
123 | } | |
124 | ||
252b5132 RH |
125 | void |
126 | sbranch (size) | |
127 | int size; | |
128 | { | |
129 | bsize = size; | |
130 | } | |
131 | ||
70d6ecf3 | 132 | static void |
3048287a NC |
133 | pint (arg) |
134 | int arg ATTRIBUTE_UNUSED; | |
252b5132 RH |
135 | { |
136 | cons (Hmode ? 4 : 2); | |
137 | } | |
138 | ||
3048287a NC |
139 | /* This table describes all the machine specific pseudo-ops the assembler |
140 | has to support. The fields are: | |
141 | pseudo-op name without dot | |
142 | function to call to execute this pseudo-op | |
143 | Integer arg to pass to the function. */ | |
144 | ||
252b5132 RH |
145 | const pseudo_typeS md_pseudo_table[] = |
146 | { | |
252b5132 | 147 | {"h8300h", h8300hmode, 0}, |
8d9cd6b1 | 148 | {"h8300hn", h8300hnmode, 0}, |
252b5132 | 149 | {"h8300s", h8300smode, 0}, |
8d9cd6b1 | 150 | {"h8300sn", h8300snmode, 0}, |
252b5132 RH |
151 | {"sbranch", sbranch, L_8}, |
152 | {"lbranch", sbranch, L_16}, | |
153 | ||
2c8714f2 NC |
154 | #ifdef BFD_ASSEMBLER |
155 | {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 }, | |
156 | {"loc", dwarf2_directive_loc, 0 }, | |
157 | #endif | |
158 | ||
252b5132 RH |
159 | {"int", pint, 0}, |
160 | {"data.b", cons, 1}, | |
161 | {"data.w", cons, 2}, | |
162 | {"data.l", cons, 4}, | |
163 | {"form", listing_psize, 0}, | |
164 | {"heading", listing_title, 0}, | |
165 | {"import", s_ignore, 0}, | |
166 | {"page", listing_eject, 0}, | |
167 | {"program", s_ignore, 0}, | |
168 | {0, 0, 0} | |
169 | }; | |
170 | ||
171 | const int md_reloc_size; | |
172 | ||
173 | const char EXP_CHARS[] = "eE"; | |
174 | ||
3048287a NC |
175 | /* Chars that mean this number is a floating point constant |
176 | As in 0f12.456 | |
177 | or 0d1.2345e12. */ | |
252b5132 RH |
178 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
179 | ||
3048287a | 180 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics. */ |
252b5132 | 181 | |
70d6ecf3 AM |
182 | /* This function is called once, at assembler startup time. This |
183 | should set up all the tables, etc. that the MD part of the assembler | |
184 | needs. */ | |
3048287a | 185 | |
252b5132 RH |
186 | void |
187 | md_begin () | |
188 | { | |
a720f7bc KD |
189 | unsigned int nopcodes; |
190 | const struct h8_opcode *p; | |
191 | struct h8_instruction *pi; | |
252b5132 RH |
192 | char prev_buffer[100]; |
193 | int idx = 0; | |
194 | ||
83e20b45 JL |
195 | #ifdef BFD_ASSEMBLER |
196 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300)) | |
197 | as_warn (_("could not set architecture and machine")); | |
198 | #endif | |
199 | ||
252b5132 RH |
200 | opcode_hash_control = hash_new (); |
201 | prev_buffer[0] = 0; | |
202 | ||
a720f7bc KD |
203 | nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode); |
204 | ||
205 | h8_instructions = (struct h8_instruction *) | |
206 | xmalloc (nopcodes * sizeof (struct h8_instruction)); | |
207 | ||
208 | for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++) | |
252b5132 RH |
209 | { |
210 | /* Strip off any . part when inserting the opcode and only enter | |
70d6ecf3 | 211 | unique codes into the hash table. */ |
a720f7bc | 212 | char *src = p->name; |
252b5132 RH |
213 | unsigned int len = strlen (src); |
214 | char *dst = malloc (len + 1); | |
215 | char *buffer = dst; | |
216 | ||
a720f7bc | 217 | pi->size = 0; |
252b5132 RH |
218 | while (*src) |
219 | { | |
220 | if (*src == '.') | |
221 | { | |
222 | src++; | |
a720f7bc | 223 | pi->size = *src; |
252b5132 RH |
224 | break; |
225 | } | |
226 | *dst++ = *src++; | |
227 | } | |
228 | *dst++ = 0; | |
229 | if (strcmp (buffer, prev_buffer)) | |
230 | { | |
a720f7bc | 231 | hash_insert (opcode_hash_control, buffer, (char *) pi); |
252b5132 RH |
232 | strcpy (prev_buffer, buffer); |
233 | idx++; | |
234 | } | |
a720f7bc | 235 | pi->idx = idx; |
252b5132 | 236 | |
70d6ecf3 | 237 | /* Find the number of operands. */ |
a720f7bc KD |
238 | pi->noperands = 0; |
239 | while (p->args.nib[pi->noperands] != E) | |
240 | pi->noperands++; | |
70d6ecf3 AM |
241 | |
242 | /* Find the length of the opcode in bytes. */ | |
a720f7bc KD |
243 | pi->length = 0; |
244 | while (p->data.nib[pi->length * 2] != E) | |
245 | pi->length++; | |
246 | ||
247 | pi->opcode = p; | |
252b5132 RH |
248 | } |
249 | ||
a720f7bc KD |
250 | /* Add entry for the NULL vector terminator. */ |
251 | pi->length = 0; | |
252 | pi->noperands = 0; | |
253 | pi->idx = 0; | |
254 | pi->size = 0; | |
255 | pi->opcode = p; | |
256 | ||
252b5132 RH |
257 | linkrelax = 1; |
258 | } | |
259 | ||
252b5132 RH |
260 | struct h8_exp |
261 | { | |
262 | char *e_beg; | |
263 | char *e_end; | |
264 | expressionS e_exp; | |
265 | }; | |
70d6ecf3 | 266 | |
252b5132 | 267 | int dispreg; |
3048287a | 268 | int opsize; /* Set when a register size is seen. */ |
252b5132 | 269 | |
252b5132 RH |
270 | struct h8_op |
271 | { | |
272 | op_type mode; | |
273 | unsigned reg; | |
274 | expressionS exp; | |
275 | }; | |
276 | ||
a720f7bc KD |
277 | static void clever_message PARAMS ((const struct h8_instruction *, struct h8_op *)); |
278 | static void build_bytes PARAMS ((const struct h8_instruction *, struct h8_op *)); | |
3048287a NC |
279 | static void do_a_fix_imm PARAMS ((int, struct h8_op *, int)); |
280 | static void check_operand PARAMS ((struct h8_op *, unsigned int, char *)); | |
a720f7bc | 281 | static const struct h8_instruction * get_specific PARAMS ((const struct h8_instruction *, struct h8_op *, int)); |
3048287a NC |
282 | static char * get_operands PARAMS ((unsigned, char *, struct h8_op *)); |
283 | static void get_operand PARAMS ((char **, struct h8_op *, unsigned, int)); | |
284 | static char * skip_colonthing PARAMS ((char *, expressionS *, int *)); | |
285 | static char * parse_exp PARAMS ((char *, expressionS *)); | |
286 | static int parse_reg PARAMS ((char *, op_type *, unsigned *, int)); | |
287 | char * colonmod24 PARAMS ((struct h8_op *, char *)); | |
288 | ||
252b5132 RH |
289 | /* |
290 | parse operands | |
291 | WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp | |
292 | r0l,r0h,..r7l,r7h | |
293 | @WREG | |
294 | @WREG+ | |
295 | @-WREG | |
296 | #const | |
297 | ccr | |
298 | */ | |
299 | ||
bc0d738a NC |
300 | /* Try to parse a reg name. Return the number of chars consumed. */ |
301 | ||
40f09f82 | 302 | static int |
252b5132 RH |
303 | parse_reg (src, mode, reg, direction) |
304 | char *src; | |
305 | op_type *mode; | |
306 | unsigned int *reg; | |
307 | int direction; | |
252b5132 RH |
308 | { |
309 | char *end; | |
310 | int len; | |
311 | ||
70d6ecf3 | 312 | /* Cribbed from get_symbol_end. */ |
252b5132 RH |
313 | if (!is_name_beginner (*src) || *src == '\001') |
314 | return 0; | |
70d6ecf3 | 315 | end = src + 1; |
252b5132 RH |
316 | while (is_part_of_name (*end) || *end == '\001') |
317 | end++; | |
318 | len = end - src; | |
319 | ||
320 | if (len == 2 && src[0] == 's' && src[1] == 'p') | |
321 | { | |
322 | *mode = PSIZE | REG | direction; | |
323 | *reg = 7; | |
324 | return len; | |
325 | } | |
326 | if (len == 3 && src[0] == 'c' && src[1] == 'c' && src[2] == 'r') | |
327 | { | |
328 | *mode = CCR; | |
329 | *reg = 0; | |
330 | return len; | |
331 | } | |
332 | if (len == 3 && src[0] == 'e' && src[1] == 'x' && src[2] == 'r') | |
333 | { | |
334 | *mode = EXR; | |
335 | *reg = 0; | |
336 | return len; | |
337 | } | |
338 | if (len == 2 && src[0] == 'f' && src[1] == 'p') | |
339 | { | |
340 | *mode = PSIZE | REG | direction; | |
341 | *reg = 6; | |
342 | return len; | |
343 | } | |
344 | if (len == 3 && src[0] == 'e' && src[1] == 'r' | |
345 | && src[2] >= '0' && src[2] <= '7') | |
346 | { | |
347 | *mode = L_32 | REG | direction; | |
348 | *reg = src[2] - '0'; | |
349 | if (!Hmode) | |
350 | as_warn (_("Reg not valid for H8/300")); | |
351 | return len; | |
352 | } | |
353 | if (len == 2 && src[0] == 'e' && src[1] >= '0' && src[1] <= '7') | |
354 | { | |
355 | *mode = L_16 | REG | direction; | |
356 | *reg = src[1] - '0' + 8; | |
357 | if (!Hmode) | |
358 | as_warn (_("Reg not valid for H8/300")); | |
359 | return len; | |
360 | } | |
361 | ||
362 | if (src[0] == 'r') | |
363 | { | |
364 | if (src[1] >= '0' && src[1] <= '7') | |
365 | { | |
366 | if (len == 3 && src[2] == 'l') | |
367 | { | |
368 | *mode = L_8 | REG | direction; | |
369 | *reg = (src[1] - '0') + 8; | |
370 | return len; | |
371 | } | |
372 | if (len == 3 && src[2] == 'h') | |
373 | { | |
374 | *mode = L_8 | REG | direction; | |
375 | *reg = (src[1] - '0'); | |
376 | return len; | |
377 | } | |
378 | if (len == 2) | |
379 | { | |
380 | *mode = L_16 | REG | direction; | |
381 | *reg = (src[1] - '0'); | |
382 | return len; | |
383 | } | |
384 | } | |
385 | } | |
386 | ||
387 | return 0; | |
388 | } | |
389 | ||
40f09f82 | 390 | static char * |
252b5132 RH |
391 | parse_exp (s, op) |
392 | char *s; | |
70d6ecf3 | 393 | expressionS *op; |
252b5132 RH |
394 | { |
395 | char *save = input_line_pointer; | |
396 | char *new; | |
397 | ||
398 | input_line_pointer = s; | |
399 | expression (op); | |
400 | if (op->X_op == O_absent) | |
401 | as_bad (_("missing operand")); | |
402 | new = input_line_pointer; | |
403 | input_line_pointer = save; | |
404 | return new; | |
405 | } | |
406 | ||
407 | static char * | |
408 | skip_colonthing (ptr, exp, mode) | |
409 | char *ptr; | |
dbbc7809 | 410 | expressionS *exp ATTRIBUTE_UNUSED; |
252b5132 RH |
411 | int *mode; |
412 | { | |
413 | if (*ptr == ':') | |
414 | { | |
415 | ptr++; | |
416 | *mode &= ~SIZE; | |
417 | if (*ptr == '8') | |
418 | { | |
419 | ptr++; | |
3048287a | 420 | /* ff fill any 8 bit quantity. */ |
70d6ecf3 | 421 | /* exp->X_add_number -= 0x100; */ |
252b5132 RH |
422 | *mode |= L_8; |
423 | } | |
424 | else | |
425 | { | |
426 | if (*ptr == '2') | |
427 | { | |
428 | *mode |= L_24; | |
429 | } | |
430 | else if (*ptr == '3') | |
431 | { | |
432 | *mode |= L_32; | |
433 | } | |
434 | else if (*ptr == '1') | |
435 | { | |
436 | *mode |= L_16; | |
437 | } | |
3882b010 | 438 | while (ISDIGIT (*ptr)) |
252b5132 RH |
439 | ptr++; |
440 | } | |
441 | } | |
442 | return ptr; | |
443 | } | |
444 | ||
445 | /* The many forms of operand: | |
446 | ||
447 | Rn Register direct | |
448 | @Rn Register indirect | |
449 | @(exp[:16], Rn) Register indirect with displacement | |
450 | @Rn+ | |
451 | @-Rn | |
70d6ecf3 AM |
452 | @aa:8 absolute 8 bit |
453 | @aa:16 absolute 16 bit | |
252b5132 RH |
454 | @aa absolute 16 bit |
455 | ||
456 | #xx[:size] immediate data | |
70d6ecf3 | 457 | @(exp:[8], pc) pc rel |
3048287a | 458 | @@aa[:8] memory indirect. */ |
252b5132 RH |
459 | |
460 | char * | |
461 | colonmod24 (op, src) | |
462 | struct h8_op *op; | |
463 | char *src; | |
252b5132 RH |
464 | { |
465 | int mode = 0; | |
466 | src = skip_colonthing (src, &op->exp, &mode); | |
467 | ||
468 | if (!mode) | |
469 | { | |
70d6ecf3 | 470 | /* Choose a default mode. */ |
252b5132 RH |
471 | if (op->exp.X_add_number < -32768 |
472 | || op->exp.X_add_number > 32767) | |
473 | { | |
474 | if (Hmode) | |
475 | mode = L_24; | |
476 | else | |
477 | mode = L_16; | |
478 | } | |
479 | else if (op->exp.X_add_symbol | |
480 | || op->exp.X_op_symbol) | |
481 | mode = DSYMMODE; | |
482 | else | |
483 | mode = DMODE; | |
484 | } | |
3048287a | 485 | |
252b5132 RH |
486 | op->mode |= mode; |
487 | return src; | |
252b5132 RH |
488 | } |
489 | ||
252b5132 RH |
490 | static void |
491 | get_operand (ptr, op, dst, direction) | |
492 | char **ptr; | |
493 | struct h8_op *op; | |
dbbc7809 | 494 | unsigned int dst ATTRIBUTE_UNUSED; |
252b5132 RH |
495 | int direction; |
496 | { | |
497 | char *src = *ptr; | |
498 | op_type mode; | |
499 | unsigned int num; | |
500 | unsigned int len; | |
501 | ||
502 | op->mode = E; | |
503 | ||
3048287a NC |
504 | /* Check for '(' and ')' for instructions ldm and stm. */ |
505 | if (src[0] == '(' && src[8] == ')') | |
506 | ++ src; | |
507 | ||
252b5132 RH |
508 | /* Gross. Gross. ldm and stm have a format not easily handled |
509 | by get_operand. We deal with it explicitly here. */ | |
3882b010 L |
510 | if (src[0] == 'e' && src[1] == 'r' && ISDIGIT (src[2]) |
511 | && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && ISDIGIT (src[6])) | |
252b5132 RH |
512 | { |
513 | int low, high; | |
514 | ||
515 | low = src[2] - '0'; | |
516 | high = src[6] - '0'; | |
517 | ||
518 | if (high < low) | |
519 | as_bad (_("Invalid register list for ldm/stm\n")); | |
520 | ||
521 | if (low % 2) | |
522 | as_bad (_("Invalid register list for ldm/stm\n")); | |
523 | ||
524 | if (high - low > 3) | |
525 | as_bad (_("Invalid register list for ldm/stm\n")); | |
526 | ||
527 | if (high - low != 1 | |
528 | && low % 4) | |
529 | as_bad (_("Invalid register list for ldm/stm\n")); | |
530 | ||
531 | /* Even sicker. We encode two registers into op->reg. One | |
532 | for the low register to save, the other for the high | |
533 | register to save; we also set the high bit in op->reg | |
534 | so we know this is "very special". */ | |
535 | op->reg = 0x80000000 | (high << 8) | low; | |
536 | op->mode = REG; | |
3048287a NC |
537 | if (src[7] == ')') |
538 | *ptr = src + 8; | |
539 | else | |
540 | *ptr = src + 7; | |
252b5132 RH |
541 | return; |
542 | } | |
543 | ||
544 | len = parse_reg (src, &op->mode, &op->reg, direction); | |
545 | if (len) | |
546 | { | |
547 | *ptr = src + len; | |
548 | return; | |
549 | } | |
550 | ||
551 | if (*src == '@') | |
552 | { | |
553 | src++; | |
554 | if (*src == '@') | |
555 | { | |
556 | src++; | |
557 | src = parse_exp (src, &op->exp); | |
558 | ||
559 | src = skip_colonthing (src, &op->exp, &op->mode); | |
560 | ||
561 | *ptr = src; | |
562 | ||
563 | op->mode = MEMIND; | |
564 | return; | |
252b5132 RH |
565 | } |
566 | ||
252b5132 RH |
567 | if (*src == '-') |
568 | { | |
569 | src++; | |
570 | len = parse_reg (src, &mode, &num, direction); | |
571 | if (len == 0) | |
572 | { | |
70d6ecf3 | 573 | /* Oops, not a reg after all, must be ordinary exp. */ |
252b5132 | 574 | src--; |
70d6ecf3 | 575 | /* Must be a symbol. */ |
252b5132 RH |
576 | op->mode = ABS | PSIZE | direction; |
577 | *ptr = skip_colonthing (parse_exp (src, &op->exp), | |
578 | &op->exp, &op->mode); | |
579 | ||
580 | return; | |
252b5132 RH |
581 | } |
582 | ||
252b5132 RH |
583 | if ((mode & SIZE) != PSIZE) |
584 | as_bad (_("Wrong size pointer register for architecture.")); | |
585 | op->mode = RDDEC; | |
586 | op->reg = num; | |
587 | *ptr = src + len; | |
588 | return; | |
589 | } | |
590 | if (*src == '(') | |
591 | { | |
70d6ecf3 | 592 | /* Disp. */ |
252b5132 RH |
593 | src++; |
594 | ||
70d6ecf3 | 595 | /* Start off assuming a 16 bit offset. */ |
252b5132 RH |
596 | |
597 | src = parse_exp (src, &op->exp); | |
598 | ||
599 | src = colonmod24 (op, src); | |
600 | ||
601 | if (*src == ')') | |
602 | { | |
603 | src++; | |
604 | op->mode |= ABS | direction; | |
605 | *ptr = src; | |
606 | return; | |
607 | } | |
608 | ||
609 | if (*src != ',') | |
610 | { | |
611 | as_bad (_("expected @(exp, reg16)")); | |
612 | return; | |
613 | ||
614 | } | |
615 | src++; | |
616 | ||
617 | len = parse_reg (src, &mode, &op->reg, direction); | |
618 | if (len == 0 || !(mode & REG)) | |
619 | { | |
620 | as_bad (_("expected @(exp, reg16)")); | |
621 | return; | |
622 | } | |
623 | op->mode |= DISP | direction; | |
624 | dispreg = op->reg; | |
625 | src += len; | |
626 | src = skip_colonthing (src, &op->exp, &op->mode); | |
627 | ||
628 | if (*src != ')' && '(') | |
629 | { | |
630 | as_bad (_("expected @(exp, reg16)")); | |
631 | return; | |
632 | } | |
633 | *ptr = src + 1; | |
634 | ||
635 | return; | |
636 | } | |
637 | len = parse_reg (src, &mode, &num, direction); | |
638 | ||
639 | if (len) | |
640 | { | |
641 | src += len; | |
642 | if (*src == '+') | |
643 | { | |
644 | src++; | |
645 | if ((mode & SIZE) != PSIZE) | |
646 | as_bad (_("Wrong size pointer register for architecture.")); | |
647 | op->mode = RSINC; | |
648 | op->reg = num; | |
649 | *ptr = src; | |
650 | return; | |
651 | } | |
652 | if ((mode & SIZE) != PSIZE) | |
653 | as_bad (_("Wrong size pointer register for architecture.")); | |
654 | ||
655 | op->mode = direction | IND | PSIZE; | |
656 | op->reg = num; | |
657 | *ptr = src; | |
658 | ||
659 | return; | |
660 | } | |
661 | else | |
662 | { | |
663 | /* must be a symbol */ | |
664 | ||
665 | op->mode = ABS | direction; | |
666 | src = parse_exp (src, &op->exp); | |
667 | ||
668 | *ptr = colonmod24 (op, src); | |
669 | ||
670 | return; | |
671 | } | |
672 | } | |
673 | ||
252b5132 RH |
674 | if (*src == '#') |
675 | { | |
676 | src++; | |
677 | op->mode = IMM; | |
678 | src = parse_exp (src, &op->exp); | |
679 | *ptr = skip_colonthing (src, &op->exp, &op->mode); | |
680 | ||
681 | return; | |
682 | } | |
683 | else if (strncmp (src, "mach", 4) == 0 | |
684 | || strncmp (src, "macl", 4) == 0) | |
685 | { | |
686 | op->reg = src[3] == 'l'; | |
687 | op->mode = MACREG; | |
688 | *ptr = src + 4; | |
689 | return; | |
690 | } | |
691 | else | |
692 | { | |
693 | src = parse_exp (src, &op->exp); | |
694 | /* Trailing ':' size ? */ | |
695 | if (*src == ':') | |
696 | { | |
697 | if (src[1] == '1' && src[2] == '6') | |
698 | { | |
699 | op->mode = PCREL | L_16; | |
700 | src += 3; | |
701 | } | |
702 | else if (src[1] == '8') | |
703 | { | |
704 | op->mode = PCREL | L_8; | |
705 | src += 2; | |
706 | } | |
707 | else | |
3048287a | 708 | as_bad (_("expect :8 or :16 here")); |
252b5132 RH |
709 | } |
710 | else | |
3048287a NC |
711 | op->mode = PCREL | bsize; |
712 | ||
252b5132 RH |
713 | *ptr = src; |
714 | } | |
715 | } | |
716 | ||
70d6ecf3 | 717 | static char * |
252b5132 RH |
718 | get_operands (noperands, op_end, operand) |
719 | unsigned int noperands; | |
720 | char *op_end; | |
721 | struct h8_op *operand; | |
722 | { | |
723 | char *ptr = op_end; | |
724 | ||
725 | switch (noperands) | |
726 | { | |
727 | case 0: | |
728 | operand[0].mode = 0; | |
729 | operand[1].mode = 0; | |
730 | break; | |
731 | ||
732 | case 1: | |
733 | ptr++; | |
734 | get_operand (&ptr, operand + 0, 0, SRC); | |
735 | if (*ptr == ',') | |
736 | { | |
737 | ptr++; | |
738 | get_operand (&ptr, operand + 1, 1, DST); | |
739 | } | |
740 | else | |
741 | { | |
742 | operand[1].mode = 0; | |
743 | } | |
252b5132 | 744 | break; |
70d6ecf3 | 745 | |
252b5132 RH |
746 | case 2: |
747 | ptr++; | |
748 | get_operand (&ptr, operand + 0, 0, SRC); | |
749 | if (*ptr == ',') | |
750 | ptr++; | |
751 | get_operand (&ptr, operand + 1, 1, DST); | |
752 | break; | |
753 | ||
754 | default: | |
755 | abort (); | |
756 | } | |
757 | ||
252b5132 RH |
758 | return ptr; |
759 | } | |
760 | ||
761 | /* Passed a pointer to a list of opcodes which use different | |
762 | addressing modes, return the opcode which matches the opcodes | |
70d6ecf3 | 763 | provided. */ |
3048287a | 764 | |
a720f7bc KD |
765 | static const struct h8_instruction * |
766 | get_specific (instruction, operands, size) | |
767 | const struct h8_instruction *instruction; | |
252b5132 RH |
768 | struct h8_op *operands; |
769 | int size; | |
770 | { | |
a720f7bc | 771 | const struct h8_instruction *this_try = instruction; |
252b5132 | 772 | int found = 0; |
a720f7bc | 773 | int this_index = instruction->idx; |
252b5132 RH |
774 | |
775 | /* There's only one ldm/stm and it's easier to just | |
776 | get out quick for them. */ | |
a720f7bc KD |
777 | if (strcmp (instruction->opcode->name, "stm.l") == 0 |
778 | || strcmp (instruction->opcode->name, "ldm.l") == 0) | |
252b5132 RH |
779 | return this_try; |
780 | ||
a720f7bc | 781 | while (this_index == instruction->idx && !found) |
252b5132 RH |
782 | { |
783 | found = 1; | |
784 | ||
a720f7bc | 785 | this_try = instruction++; |
252b5132 RH |
786 | if (this_try->noperands == 0) |
787 | { | |
788 | int this_size; | |
789 | ||
a720f7bc | 790 | this_size = this_try->opcode->how & SN; |
252b5132 RH |
791 | if (this_size != size && (this_size != SB || size != SN)) |
792 | found = 0; | |
793 | } | |
794 | else | |
795 | { | |
3048287a | 796 | int i; |
252b5132 RH |
797 | |
798 | for (i = 0; i < this_try->noperands && found; i++) | |
799 | { | |
a720f7bc | 800 | op_type op = this_try->opcode->args.nib[i]; |
252b5132 RH |
801 | int x = operands[i].mode; |
802 | ||
803 | if ((op & (DISP | REG)) == (DISP | REG) | |
804 | && ((x & (DISP | REG)) == (DISP | REG))) | |
805 | { | |
806 | dispreg = operands[i].reg; | |
807 | } | |
808 | else if (op & REG) | |
809 | { | |
810 | if (!(x & REG)) | |
811 | found = 0; | |
812 | ||
813 | if (x & L_P) | |
814 | x = (x & ~L_P) | (Hmode ? L_32 : L_16); | |
815 | if (op & L_P) | |
816 | op = (op & ~L_P) | (Hmode ? L_32 : L_16); | |
817 | ||
818 | opsize = op & SIZE; | |
819 | ||
70d6ecf3 | 820 | /* The size of the reg is v important. */ |
252b5132 RH |
821 | if ((op & SIZE) != (x & SIZE)) |
822 | found = 0; | |
823 | } | |
824 | else if ((op & ABSJMP) && (x & ABS)) | |
825 | { | |
826 | operands[i].mode &= ~ABS; | |
827 | operands[i].mode |= ABSJMP; | |
70d6ecf3 | 828 | /* But it may not be 24 bits long. */ |
252b5132 RH |
829 | if (!Hmode) |
830 | { | |
831 | operands[i].mode &= ~SIZE; | |
832 | operands[i].mode |= L_16; | |
833 | } | |
834 | } | |
835 | else if ((op & (KBIT | DBIT)) && (x & IMM)) | |
836 | { | |
70d6ecf3 | 837 | /* This is ok if the immediate value is sensible. */ |
252b5132 RH |
838 | } |
839 | else if (op & PCREL) | |
840 | { | |
70d6ecf3 | 841 | /* The size of the displacement is important. */ |
252b5132 RH |
842 | if ((op & SIZE) != (x & SIZE)) |
843 | found = 0; | |
844 | } | |
845 | else if ((op & (DISP | IMM | ABS)) | |
846 | && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS))) | |
847 | { | |
848 | /* Promote a L_24 to L_32 if it makes us match. */ | |
849 | if ((x & L_24) && (op & L_32)) | |
850 | { | |
851 | x &= ~L_24; | |
852 | x |= L_32; | |
853 | } | |
854 | /* Promote an L8 to L_16 if it makes us match. */ | |
70d6ecf3 | 855 | if (op & ABS && op & L_8 && op & DISP) |
252b5132 RH |
856 | { |
857 | if (x & L_16) | |
70d6ecf3 | 858 | found = 1; |
252b5132 RH |
859 | } |
860 | else if ((x & SIZE) != 0 | |
861 | && ((op & SIZE) != (x & SIZE))) | |
862 | found = 0; | |
863 | } | |
864 | else if ((op & MACREG) != (x & MACREG)) | |
865 | { | |
866 | found = 0; | |
867 | } | |
868 | else if ((op & MODE) != (x & MODE)) | |
869 | { | |
870 | found = 0; | |
70d6ecf3 | 871 | } |
252b5132 RH |
872 | } |
873 | } | |
874 | } | |
875 | if (found) | |
876 | return this_try; | |
877 | else | |
878 | return 0; | |
879 | } | |
880 | ||
881 | static void | |
882 | check_operand (operand, width, string) | |
883 | struct h8_op *operand; | |
884 | unsigned int width; | |
885 | char *string; | |
886 | { | |
887 | if (operand->exp.X_add_symbol == 0 | |
888 | && operand->exp.X_op_symbol == 0) | |
889 | { | |
70d6ecf3 AM |
890 | /* No symbol involved, let's look at offset, it's dangerous if |
891 | any of the high bits are not 0 or ff's, find out by oring or | |
892 | anding with the width and seeing if the answer is 0 or all | |
893 | fs. */ | |
252b5132 | 894 | |
252b5132 | 895 | if ((operand->exp.X_add_number & ~width) != 0 && |
3048287a | 896 | (operand->exp.X_add_number | width) != (unsigned)(~0)) |
252b5132 | 897 | { |
70d6ecf3 | 898 | if (width == 255 |
252b5132 RH |
899 | && (operand->exp.X_add_number & 0xff00) == 0xff00) |
900 | { | |
901 | /* Just ignore this one - which happens when trying to | |
902 | fit a 16 bit address truncated into an 8 bit address | |
903 | of something like bset. */ | |
904 | } | |
166e23f9 KH |
905 | else if (strcmp (string, "@") == 0 |
906 | && width == 0xffff | |
907 | && (operand->exp.X_add_number & 0xff8000) == 0xff8000) | |
908 | { | |
909 | /* Just ignore this one - which happens when trying to | |
910 | fit a 24 bit address truncated into a 16 bit address | |
911 | of something like mov.w. */ | |
912 | } | |
70d6ecf3 | 913 | else |
252b5132 RH |
914 | { |
915 | as_warn (_("operand %s0x%lx out of range."), string, | |
916 | (unsigned long) operand->exp.X_add_number); | |
917 | } | |
918 | } | |
919 | } | |
252b5132 RH |
920 | } |
921 | ||
922 | /* RELAXMODE has one of 3 values: | |
923 | ||
924 | 0 Output a "normal" reloc, no relaxing possible for this insn/reloc | |
925 | ||
926 | 1 Output a relaxable 24bit absolute mov.w address relocation | |
927 | (may relax into a 16bit absolute address). | |
928 | ||
929 | 2 Output a relaxable 16/24 absolute mov.b address relocation | |
930 | (may relax into an 8bit absolute address). */ | |
931 | ||
932 | static void | |
933 | do_a_fix_imm (offset, operand, relaxmode) | |
934 | int offset; | |
935 | struct h8_op *operand; | |
936 | int relaxmode; | |
937 | { | |
938 | int idx; | |
939 | int size; | |
940 | int where; | |
941 | ||
252b5132 RH |
942 | char *t = operand->mode & IMM ? "#" : "@"; |
943 | ||
944 | if (operand->exp.X_add_symbol == 0) | |
945 | { | |
946 | char *bytes = frag_now->fr_literal + offset; | |
947 | switch (operand->mode & SIZE) | |
948 | { | |
949 | case L_2: | |
950 | check_operand (operand, 0x3, t); | |
951 | bytes[0] |= (operand->exp.X_add_number) << 4; | |
952 | break; | |
953 | case L_3: | |
954 | check_operand (operand, 0x7, t); | |
955 | bytes[0] |= (operand->exp.X_add_number) << 4; | |
956 | break; | |
957 | case L_8: | |
958 | check_operand (operand, 0xff, t); | |
959 | bytes[0] = operand->exp.X_add_number; | |
960 | break; | |
961 | case L_16: | |
962 | check_operand (operand, 0xffff, t); | |
963 | bytes[0] = operand->exp.X_add_number >> 8; | |
964 | bytes[1] = operand->exp.X_add_number >> 0; | |
965 | break; | |
966 | case L_24: | |
967 | check_operand (operand, 0xffffff, t); | |
968 | bytes[0] = operand->exp.X_add_number >> 16; | |
969 | bytes[1] = operand->exp.X_add_number >> 8; | |
970 | bytes[2] = operand->exp.X_add_number >> 0; | |
971 | break; | |
972 | ||
973 | case L_32: | |
70d6ecf3 | 974 | /* This should be done with bfd. */ |
252b5132 RH |
975 | bytes[0] = operand->exp.X_add_number >> 24; |
976 | bytes[1] = operand->exp.X_add_number >> 16; | |
977 | bytes[2] = operand->exp.X_add_number >> 8; | |
978 | bytes[3] = operand->exp.X_add_number >> 0; | |
4132022d AM |
979 | if (relaxmode != 0) |
980 | { | |
981 | idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1; | |
982 | fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx); | |
983 | } | |
252b5132 RH |
984 | break; |
985 | } | |
252b5132 RH |
986 | } |
987 | else | |
988 | { | |
989 | switch (operand->mode & SIZE) | |
990 | { | |
252b5132 RH |
991 | case L_24: |
992 | case L_32: | |
993 | size = 4; | |
994 | where = (operand->mode & SIZE) == L_24 ? -1 : 0; | |
995 | if (relaxmode == 2) | |
996 | idx = R_MOV24B1; | |
997 | else if (relaxmode == 1) | |
998 | idx = R_MOVL1; | |
999 | else | |
1000 | idx = R_RELLONG; | |
1001 | break; | |
1002 | default: | |
70d6ecf3 | 1003 | as_bad (_("Can't work out size of operand.\n")); |
252b5132 RH |
1004 | case L_16: |
1005 | size = 2; | |
1006 | where = 0; | |
1007 | if (relaxmode == 2) | |
1008 | idx = R_MOV16B1; | |
1009 | else | |
1010 | idx = R_RELWORD; | |
4132022d AM |
1011 | operand->exp.X_add_number = |
1012 | ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000; | |
252b5132 RH |
1013 | break; |
1014 | case L_8: | |
1015 | size = 1; | |
1016 | where = 0; | |
1017 | idx = R_RELBYTE; | |
4132022d AM |
1018 | operand->exp.X_add_number = |
1019 | ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80; | |
252b5132 RH |
1020 | } |
1021 | ||
1022 | fix_new_exp (frag_now, | |
1023 | offset + where, | |
1024 | size, | |
1025 | &operand->exp, | |
1026 | 0, | |
1027 | idx); | |
1028 | } | |
252b5132 RH |
1029 | } |
1030 | ||
70d6ecf3 | 1031 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
3048287a | 1032 | |
252b5132 RH |
1033 | static void |
1034 | build_bytes (this_try, operand) | |
a720f7bc | 1035 | const struct h8_instruction *this_try; |
252b5132 RH |
1036 | struct h8_op *operand; |
1037 | { | |
3048287a | 1038 | int i; |
252b5132 | 1039 | char *output = frag_more (this_try->length); |
a720f7bc | 1040 | op_type *nibble_ptr = this_try->opcode->data.nib; |
252b5132 RH |
1041 | op_type c; |
1042 | unsigned int nibble_count = 0; | |
3048287a NC |
1043 | int absat = 0; |
1044 | int immat = 0; | |
1045 | int nib = 0; | |
252b5132 RH |
1046 | int movb = 0; |
1047 | char asnibbles[30]; | |
1048 | char *p = asnibbles; | |
1049 | ||
a720f7bc | 1050 | if (!(this_try->opcode->inbase || Hmode)) |
252b5132 | 1051 | as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"), |
a720f7bc | 1052 | this_try->opcode->name); |
252b5132 RH |
1053 | |
1054 | while (*nibble_ptr != E) | |
1055 | { | |
1056 | int d; | |
1057 | c = *nibble_ptr++; | |
1058 | ||
1059 | d = (c & (DST | SRC_IN_DST)) != 0; | |
1060 | ||
1061 | if (c < 16) | |
3048287a | 1062 | nib = c; |
252b5132 RH |
1063 | else |
1064 | { | |
252b5132 | 1065 | if (c & (REG | IND | INC | DEC)) |
3048287a NC |
1066 | nib = operand[d].reg; |
1067 | ||
252b5132 | 1068 | else if ((c & DISPREG) == (DISPREG)) |
3048287a NC |
1069 | nib = dispreg; |
1070 | ||
70d6ecf3 | 1071 | else if (c & ABS) |
252b5132 RH |
1072 | { |
1073 | operand[d].mode = c; | |
1074 | absat = nibble_count / 2; | |
1075 | nib = 0; | |
1076 | } | |
1077 | else if (c & (IMM | PCREL | ABS | ABSJMP | DISP)) | |
1078 | { | |
1079 | operand[d].mode = c; | |
1080 | immat = nibble_count / 2; | |
1081 | nib = 0; | |
1082 | } | |
1083 | else if (c & IGNORE) | |
3048287a NC |
1084 | nib = 0; |
1085 | ||
252b5132 RH |
1086 | else if (c & DBIT) |
1087 | { | |
1088 | switch (operand[0].exp.X_add_number) | |
1089 | { | |
1090 | case 1: | |
1091 | nib = c; | |
1092 | break; | |
1093 | case 2: | |
1094 | nib = 0x8 | c; | |
1095 | break; | |
1096 | default: | |
1097 | as_bad (_("Need #1 or #2 here")); | |
1098 | } | |
1099 | } | |
1100 | else if (c & KBIT) | |
1101 | { | |
1102 | switch (operand[0].exp.X_add_number) | |
1103 | { | |
1104 | case 1: | |
1105 | nib = 0; | |
1106 | break; | |
1107 | case 2: | |
1108 | nib = 8; | |
1109 | break; | |
1110 | case 4: | |
1111 | if (!Hmode) | |
1112 | as_warn (_("#4 not valid on H8/300.")); | |
1113 | nib = 9; | |
1114 | break; | |
1115 | ||
1116 | default: | |
1117 | as_bad (_("Need #1 or #2 here")); | |
1118 | break; | |
1119 | } | |
70d6ecf3 | 1120 | /* Stop it making a fix. */ |
252b5132 RH |
1121 | operand[0].mode = 0; |
1122 | } | |
1123 | ||
1124 | if (c & MEMRELAX) | |
3048287a | 1125 | operand[d].mode |= MEMRELAX; |
252b5132 RH |
1126 | |
1127 | if (c & B31) | |
3048287a | 1128 | nib |= 0x8; |
252b5132 RH |
1129 | |
1130 | if (c & MACREG) | |
1131 | { | |
f0c56b90 NC |
1132 | if (operand[0].mode == MACREG) |
1133 | /* stmac has mac[hl] as the first operand. */ | |
1134 | nib = 2 + operand[0].reg; | |
1135 | else | |
1136 | /* ldmac has mac[hl] as the second operand. */ | |
1137 | nib = 2 + operand[1].reg; | |
252b5132 RH |
1138 | } |
1139 | } | |
1140 | nibble_count++; | |
1141 | ||
1142 | *p++ = nib; | |
1143 | } | |
1144 | ||
1145 | /* Disgusting. Why, oh why didn't someone ask us for advice | |
1146 | on the assembler format. */ | |
a720f7bc KD |
1147 | if (strcmp (this_try->opcode->name, "stm.l") == 0 |
1148 | || strcmp (this_try->opcode->name, "ldm.l") == 0) | |
252b5132 RH |
1149 | { |
1150 | int high, low; | |
a720f7bc KD |
1151 | high = (operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf; |
1152 | low = operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg & 0xf; | |
252b5132 RH |
1153 | |
1154 | asnibbles[2] = high - low; | |
a720f7bc | 1155 | asnibbles[7] = (this_try->opcode->name[0] == 'l') ? high : low; |
252b5132 RH |
1156 | } |
1157 | ||
1158 | for (i = 0; i < this_try->length; i++) | |
3048287a | 1159 | output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1]; |
252b5132 RH |
1160 | |
1161 | /* Note if this is a movb instruction -- there's a special relaxation | |
1162 | which only applies to them. */ | |
a720f7bc | 1163 | if (strcmp (this_try->opcode->name, "mov.b") == 0) |
252b5132 RH |
1164 | movb = 1; |
1165 | ||
70d6ecf3 | 1166 | /* Output any fixes. */ |
252b5132 RH |
1167 | for (i = 0; i < 2; i++) |
1168 | { | |
1169 | int x = operand[i].mode; | |
1170 | ||
1171 | if (x & (IMM | DISP)) | |
3048287a NC |
1172 | do_a_fix_imm (output - frag_now->fr_literal + immat, |
1173 | operand + i, (x & MEMRELAX) != 0); | |
1174 | ||
252b5132 | 1175 | else if (x & ABS) |
3048287a NC |
1176 | do_a_fix_imm (output - frag_now->fr_literal + absat, |
1177 | operand + i, (x & MEMRELAX) ? movb + 1 : 0); | |
1178 | ||
252b5132 RH |
1179 | else if (x & PCREL) |
1180 | { | |
3048287a | 1181 | int size16 = x & (L_16); |
252b5132 RH |
1182 | int where = size16 ? 2 : 1; |
1183 | int size = size16 ? 2 : 1; | |
1184 | int type = size16 ? R_PCRWORD : R_PCRBYTE; | |
36ed2fff | 1185 | fixS *fixP; |
252b5132 RH |
1186 | |
1187 | check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@"); | |
1188 | ||
1189 | if (operand[i].exp.X_add_number & 1) | |
3048287a NC |
1190 | as_warn (_("branch operand has odd offset (%lx)\n"), |
1191 | (unsigned long) operand->exp.X_add_number); | |
36ed2fff JL |
1192 | #ifndef OBJ_ELF |
1193 | /* The COFF port has always been off by one, changing it | |
1194 | now would be an incompatible change, so we leave it as-is. | |
1195 | ||
1196 | We don't want to do this for ELF as we want to be | |
1197 | compatible with the proposed ELF format from Hitachi. */ | |
252b5132 | 1198 | operand[i].exp.X_add_number -= 1; |
36ed2fff | 1199 | #endif |
4132022d AM |
1200 | operand[i].exp.X_add_number = |
1201 | ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80; | |
252b5132 | 1202 | |
36ed2fff JL |
1203 | fixP = fix_new_exp (frag_now, |
1204 | output - frag_now->fr_literal + where, | |
1205 | size, | |
1206 | &operand[i].exp, | |
1207 | 1, | |
1208 | type); | |
1209 | fixP->fx_signed = 1; | |
252b5132 RH |
1210 | } |
1211 | else if (x & MEMIND) | |
1212 | { | |
252b5132 RH |
1213 | check_operand (operand + i, 0xff, "@@"); |
1214 | fix_new_exp (frag_now, | |
1215 | output - frag_now->fr_literal + 1, | |
1216 | 1, | |
1217 | &operand[i].exp, | |
1218 | 0, | |
1219 | R_MEM_INDIRECT); | |
1220 | } | |
1221 | else if (x & ABSJMP) | |
1222 | { | |
3c1ba8a3 JL |
1223 | int where = 0; |
1224 | ||
1225 | #ifdef OBJ_ELF | |
1226 | /* To be compatible with the proposed H8 ELF format, we | |
1227 | want the relocation's offset to point to the first byte | |
1228 | that will be modified, not to the start of the instruction. */ | |
1229 | where += 1; | |
3c1ba8a3 | 1230 | #endif |
de342d07 | 1231 | |
70d6ecf3 | 1232 | /* This jmp may be a jump or a branch. */ |
252b5132 RH |
1233 | |
1234 | check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@"); | |
3048287a | 1235 | |
252b5132 | 1236 | if (operand[i].exp.X_add_number & 1) |
3048287a NC |
1237 | as_warn (_("branch operand has odd offset (%lx)\n"), |
1238 | (unsigned long) operand->exp.X_add_number); | |
1239 | ||
252b5132 | 1240 | if (!Hmode) |
70d6ecf3 | 1241 | operand[i].exp.X_add_number = |
4132022d | 1242 | ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000; |
252b5132 | 1243 | fix_new_exp (frag_now, |
3c1ba8a3 | 1244 | output - frag_now->fr_literal + where, |
252b5132 RH |
1245 | 4, |
1246 | &operand[i].exp, | |
1247 | 0, | |
1248 | R_JMPL1); | |
1249 | } | |
1250 | } | |
252b5132 RH |
1251 | } |
1252 | ||
70d6ecf3 AM |
1253 | /* Try to give an intelligent error message for common and simple to |
1254 | detect errors. */ | |
3048287a | 1255 | |
252b5132 | 1256 | static void |
a720f7bc KD |
1257 | clever_message (instruction, operand) |
1258 | const struct h8_instruction *instruction; | |
252b5132 RH |
1259 | struct h8_op *operand; |
1260 | { | |
70d6ecf3 | 1261 | /* Find out if there was more than one possible opcode. */ |
252b5132 | 1262 | |
a720f7bc | 1263 | if ((instruction + 1)->idx != instruction->idx) |
252b5132 | 1264 | { |
3048287a | 1265 | int argn; |
252b5132 | 1266 | |
70d6ecf3 AM |
1267 | /* Only one opcode of this flavour, try to guess which operand |
1268 | didn't match. */ | |
a720f7bc | 1269 | for (argn = 0; argn < instruction->noperands; argn++) |
252b5132 | 1270 | { |
a720f7bc | 1271 | switch (instruction->opcode->args.nib[argn]) |
252b5132 RH |
1272 | { |
1273 | case RD16: | |
1274 | if (operand[argn].mode != RD16) | |
1275 | { | |
1276 | as_bad (_("destination operand must be 16 bit register")); | |
1277 | return; | |
1278 | ||
1279 | } | |
1280 | break; | |
1281 | ||
1282 | case RS8: | |
252b5132 RH |
1283 | if (operand[argn].mode != RS8) |
1284 | { | |
1285 | as_bad (_("source operand must be 8 bit register")); | |
1286 | return; | |
1287 | } | |
1288 | break; | |
1289 | ||
1290 | case ABS16DST: | |
1291 | if (operand[argn].mode != ABS16DST) | |
1292 | { | |
1293 | as_bad (_("destination operand must be 16bit absolute address")); | |
1294 | return; | |
1295 | } | |
1296 | break; | |
1297 | case RD8: | |
1298 | if (operand[argn].mode != RD8) | |
1299 | { | |
1300 | as_bad (_("destination operand must be 8 bit register")); | |
1301 | return; | |
1302 | } | |
1303 | break; | |
1304 | ||
252b5132 RH |
1305 | case ABS16SRC: |
1306 | if (operand[argn].mode != ABS16SRC) | |
1307 | { | |
1308 | as_bad (_("source operand must be 16bit absolute address")); | |
1309 | return; | |
1310 | } | |
1311 | break; | |
1312 | ||
1313 | } | |
1314 | } | |
1315 | } | |
1316 | as_bad (_("invalid operands")); | |
1317 | } | |
1318 | ||
70d6ecf3 AM |
1319 | /* This is the guts of the machine-dependent assembler. STR points to |
1320 | a machine dependent instruction. This function is supposed to emit | |
1321 | the frags/bytes it assembles. */ | |
3048287a | 1322 | |
252b5132 RH |
1323 | void |
1324 | md_assemble (str) | |
1325 | char *str; | |
1326 | { | |
1327 | char *op_start; | |
1328 | char *op_end; | |
1329 | struct h8_op operand[2]; | |
a720f7bc KD |
1330 | const struct h8_instruction *instruction; |
1331 | const struct h8_instruction *prev_instruction; | |
252b5132 RH |
1332 | |
1333 | char *dot = 0; | |
1334 | char c; | |
1335 | int size; | |
1336 | ||
70d6ecf3 | 1337 | /* Drop leading whitespace. */ |
252b5132 RH |
1338 | while (*str == ' ') |
1339 | str++; | |
1340 | ||
70d6ecf3 | 1341 | /* Find the op code end. */ |
252b5132 RH |
1342 | for (op_start = op_end = str; |
1343 | *op_end != 0 && *op_end != ' '; | |
1344 | op_end++) | |
1345 | { | |
1346 | if (*op_end == '.') | |
1347 | { | |
1348 | dot = op_end + 1; | |
1349 | *op_end = 0; | |
1350 | op_end += 2; | |
1351 | break; | |
1352 | } | |
1353 | } | |
1354 | ||
252b5132 RH |
1355 | if (op_end == op_start) |
1356 | { | |
1357 | as_bad (_("can't find opcode ")); | |
1358 | } | |
1359 | c = *op_end; | |
1360 | ||
1361 | *op_end = 0; | |
1362 | ||
a720f7bc KD |
1363 | instruction = (const struct h8_instruction *) |
1364 | hash_find (opcode_hash_control, op_start); | |
252b5132 | 1365 | |
a720f7bc | 1366 | if (instruction == NULL) |
252b5132 RH |
1367 | { |
1368 | as_bad (_("unknown opcode")); | |
1369 | return; | |
1370 | } | |
1371 | ||
70d6ecf3 | 1372 | /* We used to set input_line_pointer to the result of get_operands, |
252b5132 RH |
1373 | but that is wrong. Our caller assumes we don't change it. */ |
1374 | ||
a720f7bc | 1375 | (void) get_operands (instruction->noperands, op_end, operand); |
252b5132 | 1376 | *op_end = c; |
a720f7bc | 1377 | prev_instruction = instruction; |
252b5132 RH |
1378 | |
1379 | size = SN; | |
1380 | if (dot) | |
1381 | { | |
1382 | switch (*dot) | |
1383 | { | |
1384 | case 'b': | |
1385 | size = SB; | |
1386 | break; | |
1387 | ||
1388 | case 'w': | |
1389 | size = SW; | |
1390 | break; | |
1391 | ||
1392 | case 'l': | |
1393 | size = SL; | |
1394 | break; | |
1395 | } | |
1396 | } | |
a720f7bc | 1397 | instruction = get_specific (instruction, operand, size); |
252b5132 | 1398 | |
a720f7bc | 1399 | if (instruction == 0) |
252b5132 | 1400 | { |
70d6ecf3 | 1401 | /* Couldn't find an opcode which matched the operands. */ |
252b5132 RH |
1402 | char *where = frag_more (2); |
1403 | ||
1404 | where[0] = 0x0; | |
1405 | where[1] = 0x0; | |
a720f7bc | 1406 | clever_message (prev_instruction, operand); |
252b5132 RH |
1407 | |
1408 | return; | |
1409 | } | |
a720f7bc | 1410 | if (instruction->size && dot) |
252b5132 | 1411 | { |
a720f7bc | 1412 | if (instruction->size != *dot) |
252b5132 RH |
1413 | { |
1414 | as_warn (_("mismatch between opcode size and operand size")); | |
1415 | } | |
1416 | } | |
1417 | ||
a720f7bc | 1418 | build_bytes (instruction, operand); |
2c8714f2 NC |
1419 | |
1420 | #ifdef BFD_ASSEMBLER | |
1421 | dwarf2_emit_insn (instruction->length); | |
1422 | #endif | |
252b5132 RH |
1423 | } |
1424 | ||
5facebfc | 1425 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
1426 | void |
1427 | tc_crawl_symbol_chain (headers) | |
70d6ecf3 | 1428 | object_headers *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
1429 | { |
1430 | printf (_("call to tc_crawl_symbol_chain \n")); | |
1431 | } | |
f333765f | 1432 | #endif |
252b5132 RH |
1433 | |
1434 | symbolS * | |
1435 | md_undefined_symbol (name) | |
dbbc7809 | 1436 | char *name ATTRIBUTE_UNUSED; |
252b5132 RH |
1437 | { |
1438 | return 0; | |
1439 | } | |
1440 | ||
5facebfc | 1441 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
1442 | void |
1443 | tc_headers_hook (headers) | |
70d6ecf3 | 1444 | object_headers *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
1445 | { |
1446 | printf (_("call to tc_headers_hook \n")); | |
1447 | } | |
f333765f | 1448 | #endif |
252b5132 RH |
1449 | |
1450 | /* Various routines to kill one day */ | |
1451 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
1452 | #define MAX_LITTLENUMS 6 | |
1453 | ||
70d6ecf3 AM |
1454 | /* Turn a string in input_line_pointer into a floating point constant |
1455 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
bc0d738a | 1456 | of LITTLENUMS emitted is stored in *SIZEP. An error message is |
70d6ecf3 | 1457 | returned, or NULL on OK. */ |
bc0d738a | 1458 | |
252b5132 RH |
1459 | char * |
1460 | md_atof (type, litP, sizeP) | |
1461 | char type; | |
1462 | char *litP; | |
1463 | int *sizeP; | |
1464 | { | |
1465 | int prec; | |
1466 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
1467 | LITTLENUM_TYPE *wordP; | |
1468 | char *t; | |
252b5132 RH |
1469 | |
1470 | switch (type) | |
1471 | { | |
1472 | case 'f': | |
1473 | case 'F': | |
1474 | case 's': | |
1475 | case 'S': | |
1476 | prec = 2; | |
1477 | break; | |
1478 | ||
1479 | case 'd': | |
1480 | case 'D': | |
1481 | case 'r': | |
1482 | case 'R': | |
1483 | prec = 4; | |
1484 | break; | |
1485 | ||
1486 | case 'x': | |
1487 | case 'X': | |
1488 | prec = 6; | |
1489 | break; | |
1490 | ||
1491 | case 'p': | |
1492 | case 'P': | |
1493 | prec = 6; | |
1494 | break; | |
1495 | ||
1496 | default: | |
1497 | *sizeP = 0; | |
1498 | return _("Bad call to MD_ATOF()"); | |
1499 | } | |
1500 | t = atof_ieee (input_line_pointer, type, words); | |
1501 | if (t) | |
1502 | input_line_pointer = t; | |
1503 | ||
1504 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1505 | for (wordP = words; prec--;) | |
1506 | { | |
1507 | md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
1508 | litP += sizeof (LITTLENUM_TYPE); | |
1509 | } | |
1510 | return 0; | |
1511 | } | |
1512 | \f | |
5a38dc70 | 1513 | const char *md_shortopts = ""; |
252b5132 RH |
1514 | struct option md_longopts[] = { |
1515 | {NULL, no_argument, NULL, 0} | |
1516 | }; | |
70d6ecf3 AM |
1517 | |
1518 | size_t md_longopts_size = sizeof (md_longopts); | |
252b5132 RH |
1519 | |
1520 | int | |
1521 | md_parse_option (c, arg) | |
dbbc7809 JL |
1522 | int c ATTRIBUTE_UNUSED; |
1523 | char *arg ATTRIBUTE_UNUSED; | |
252b5132 RH |
1524 | { |
1525 | return 0; | |
1526 | } | |
1527 | ||
1528 | void | |
1529 | md_show_usage (stream) | |
dbbc7809 | 1530 | FILE *stream ATTRIBUTE_UNUSED; |
252b5132 RH |
1531 | { |
1532 | } | |
1533 | \f | |
3048287a NC |
1534 | void tc_aout_fix_to_chars PARAMS ((void)); |
1535 | ||
252b5132 RH |
1536 | void |
1537 | tc_aout_fix_to_chars () | |
1538 | { | |
1539 | printf (_("call to tc_aout_fix_to_chars \n")); | |
1540 | abort (); | |
1541 | } | |
1542 | ||
1543 | void | |
1544 | md_convert_frag (headers, seg, fragP) | |
36ed2fff JL |
1545 | #ifdef BFD_ASSEMBLER |
1546 | bfd *headers ATTRIBUTE_UNUSED; | |
1547 | #else | |
dbbc7809 | 1548 | object_headers *headers ATTRIBUTE_UNUSED; |
36ed2fff | 1549 | #endif |
dbbc7809 JL |
1550 | segT seg ATTRIBUTE_UNUSED; |
1551 | fragS *fragP ATTRIBUTE_UNUSED; | |
252b5132 RH |
1552 | { |
1553 | printf (_("call to md_convert_frag \n")); | |
1554 | abort (); | |
1555 | } | |
1556 | ||
3c1ba8a3 JL |
1557 | #ifdef BFD_ASSEMBLER |
1558 | valueT | |
1559 | md_section_align (segment, size) | |
1560 | segT segment; | |
1561 | valueT size; | |
1562 | { | |
1563 | int align = bfd_get_section_alignment (stdoutput, segment); | |
1564 | return ((size + (1 << align) - 1) & (-1 << align)); | |
1565 | } | |
1566 | #else | |
70d6ecf3 | 1567 | valueT |
252b5132 RH |
1568 | md_section_align (seg, size) |
1569 | segT seg; | |
1570 | valueT size; | |
1571 | { | |
70d6ecf3 | 1572 | return ((size + (1 << section_alignment[(int) seg]) - 1) |
cc8a6dd0 | 1573 | & (-1 << section_alignment[(int) seg])); |
252b5132 | 1574 | } |
3c1ba8a3 JL |
1575 | #endif |
1576 | ||
252b5132 RH |
1577 | |
1578 | void | |
94f592af | 1579 | md_apply_fix3 (fixP, valP, seg) |
252b5132 | 1580 | fixS *fixP; |
94f592af NC |
1581 | valueT *valP; |
1582 | segT seg ATTRIBUTE_UNUSED; | |
252b5132 RH |
1583 | { |
1584 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
a161fe53 | 1585 | long val = *valP; |
252b5132 RH |
1586 | |
1587 | switch (fixP->fx_size) | |
1588 | { | |
1589 | case 1: | |
1590 | *buf++ = val; | |
1591 | break; | |
1592 | case 2: | |
1593 | *buf++ = (val >> 8); | |
1594 | *buf++ = val; | |
1595 | break; | |
1596 | case 4: | |
1597 | *buf++ = (val >> 24); | |
1598 | *buf++ = (val >> 16); | |
1599 | *buf++ = (val >> 8); | |
1600 | *buf++ = val; | |
1601 | break; | |
1602 | default: | |
1603 | abort (); | |
1604 | } | |
94f592af NC |
1605 | |
1606 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) | |
1607 | fixP->fx_done = 1; | |
252b5132 RH |
1608 | } |
1609 | ||
1610 | int | |
1611 | md_estimate_size_before_relax (fragP, segment_type) | |
dbbc7809 JL |
1612 | register fragS *fragP ATTRIBUTE_UNUSED; |
1613 | register segT segment_type ATTRIBUTE_UNUSED; | |
252b5132 RH |
1614 | { |
1615 | printf (_("call tomd_estimate_size_before_relax \n")); | |
1616 | abort (); | |
1617 | } | |
1618 | ||
70d6ecf3 | 1619 | /* Put number into target byte order. */ |
252b5132 RH |
1620 | void |
1621 | md_number_to_chars (ptr, use, nbytes) | |
1622 | char *ptr; | |
1623 | valueT use; | |
1624 | int nbytes; | |
1625 | { | |
1626 | number_to_chars_bigendian (ptr, use, nbytes); | |
1627 | } | |
70d6ecf3 | 1628 | |
252b5132 RH |
1629 | long |
1630 | md_pcrel_from (fixP) | |
dbbc7809 | 1631 | fixS *fixP ATTRIBUTE_UNUSED; |
252b5132 RH |
1632 | { |
1633 | abort (); | |
1634 | } | |
1635 | ||
5facebfc | 1636 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
1637 | void |
1638 | tc_reloc_mangle (fix_ptr, intr, base) | |
1639 | fixS *fix_ptr; | |
1640 | struct internal_reloc *intr; | |
1641 | bfd_vma base; | |
1642 | ||
1643 | { | |
1644 | symbolS *symbol_ptr; | |
1645 | ||
1646 | symbol_ptr = fix_ptr->fx_addsy; | |
1647 | ||
1648 | /* If this relocation is attached to a symbol then it's ok | |
70d6ecf3 | 1649 | to output it. */ |
252b5132 RH |
1650 | if (fix_ptr->fx_r_type == TC_CONS_RELOC) |
1651 | { | |
1652 | /* cons likes to create reloc32's whatever the size of the reloc.. | |
1653 | */ | |
1654 | switch (fix_ptr->fx_size) | |
1655 | { | |
1656 | case 4: | |
1657 | intr->r_type = R_RELLONG; | |
1658 | break; | |
1659 | case 2: | |
1660 | intr->r_type = R_RELWORD; | |
1661 | break; | |
1662 | case 1: | |
1663 | intr->r_type = R_RELBYTE; | |
1664 | break; | |
1665 | default: | |
1666 | abort (); | |
252b5132 | 1667 | } |
252b5132 RH |
1668 | } |
1669 | else | |
1670 | { | |
1671 | intr->r_type = fix_ptr->fx_r_type; | |
1672 | } | |
1673 | ||
1674 | intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base; | |
1675 | intr->r_offset = fix_ptr->fx_offset; | |
1676 | ||
1677 | if (symbol_ptr) | |
1678 | { | |
1679 | if (symbol_ptr->sy_number != -1) | |
1680 | intr->r_symndx = symbol_ptr->sy_number; | |
1681 | else | |
1682 | { | |
1683 | symbolS *segsym; | |
1684 | ||
1685 | /* This case arises when a reference is made to `.'. */ | |
1686 | segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot; | |
1687 | if (segsym == NULL) | |
1688 | intr->r_symndx = -1; | |
1689 | else | |
1690 | { | |
1691 | intr->r_symndx = segsym->sy_number; | |
1692 | intr->r_offset += S_GET_VALUE (symbol_ptr); | |
1693 | } | |
1694 | } | |
1695 | } | |
1696 | else | |
1697 | intr->r_symndx = -1; | |
252b5132 | 1698 | } |
5facebfc | 1699 | #else /* BFD_ASSEMBLER */ |
f333765f JL |
1700 | arelent * |
1701 | tc_gen_reloc (section, fixp) | |
1702 | asection *section ATTRIBUTE_UNUSED; | |
1703 | fixS *fixp; | |
1704 | { | |
1705 | arelent *rel; | |
1706 | bfd_reloc_code_real_type r_type; | |
1707 | ||
de342d07 JL |
1708 | if (fixp->fx_addsy && fixp->fx_subsy) |
1709 | { | |
1710 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) | |
1711 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1712 | { | |
1713 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1714 | "Difference of symbols in different sections is not supported"); | |
1715 | return NULL; | |
1716 | } | |
1717 | } | |
1718 | ||
f333765f JL |
1719 | rel = (arelent *) xmalloc (sizeof (arelent)); |
1720 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
1721 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
1722 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1723 | rel->addend = fixp->fx_offset; | |
1724 | ||
1725 | r_type = fixp->fx_r_type; | |
1726 | ||
1727 | #define DEBUG 0 | |
1728 | #if DEBUG | |
1729 | fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type)); | |
1730 | fflush(stderr); | |
1731 | #endif | |
1732 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
1733 | if (rel->howto == NULL) | |
1734 | { | |
1735 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1736 | _("Cannot represent relocation type %s"), | |
1737 | bfd_get_reloc_code_name (r_type)); | |
1738 | return NULL; | |
1739 | } | |
1740 | ||
1741 | return rel; | |
1742 | } | |
1743 | #endif |