fix typo
[deliverable/binutils-gdb.git] / gas / config / tc-h8300.c
CommitLineData
252b5132 1/* tc-h8300.c -- Assemble code for the Hitachi H8/300
7e0de7bf 2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
bc0d738a 22/* Written By Steve Chamberlain <sac@cygnus.com>. */
252b5132
RH
23
24#include <stdio.h>
25#include "as.h"
26#include "subsegs.h"
27#include "bfd.h"
28#define DEFINE_TABLE
29#define h8_opcodes ops
30#include "opcode/h8300.h"
3882b010 31#include "safe-ctype.h"
252b5132 32
7e0de7bf
JL
33#ifdef OBJ_ELF
34#include "elf/h8.h"
7e0de7bf
JL
35#endif
36
63a0b638 37const char comment_chars[] = ";";
252b5132 38const char line_comment_chars[] = "#";
63a0b638 39const char line_separator_chars[] = "";
252b5132
RH
40
41/* This table describes all the machine specific pseudo-ops the assembler
42 has to support. The fields are:
43 pseudo-op name without dot
44 function to call to execute this pseudo-op
45 Integer arg to pass to the function
46 */
47
48void cons ();
49
50int Hmode;
51int Smode;
52#define PSIZE (Hmode ? L_32 : L_16)
53#define DMODE (L_16)
54#define DSYMMODE (Hmode ? L_24 : L_16)
55int bsize = L_8; /* default branch displacement */
56
252b5132
RH
57void
58h8300hmode ()
59{
60 Hmode = 1;
61 Smode = 0;
83e20b45
JL
62#ifdef BFD_ASSEMBLER
63 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
64 as_warn (_("could not set architecture and machine"));
65#endif
252b5132
RH
66}
67
68void
69h8300smode ()
70{
71 Smode = 1;
72 Hmode = 1;
83e20b45
JL
73#ifdef BFD_ASSEMBLER
74 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
75 as_warn (_("could not set architecture and machine"));
76#endif
252b5132 77}
70d6ecf3 78
252b5132
RH
79void
80sbranch (size)
81 int size;
82{
83 bsize = size;
84}
85
70d6ecf3
AM
86static void
87pint ()
252b5132
RH
88{
89 cons (Hmode ? 4 : 2);
90}
91
92const pseudo_typeS md_pseudo_table[] =
93{
252b5132
RH
94 {"h8300h", h8300hmode, 0},
95 {"h8300s", h8300smode, 0},
96 {"sbranch", sbranch, L_8},
97 {"lbranch", sbranch, L_16},
98
99 {"int", pint, 0},
100 {"data.b", cons, 1},
101 {"data.w", cons, 2},
102 {"data.l", cons, 4},
103 {"form", listing_psize, 0},
104 {"heading", listing_title, 0},
105 {"import", s_ignore, 0},
106 {"page", listing_eject, 0},
107 {"program", s_ignore, 0},
108 {0, 0, 0}
109};
110
111const int md_reloc_size;
112
113const char EXP_CHARS[] = "eE";
114
115/* Chars that mean this number is a floating point constant */
116/* As in 0f12.456 */
117/* or 0d1.2345e12 */
118const char FLT_CHARS[] = "rRsSfFdDxXpP";
119
120static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
121
70d6ecf3
AM
122/* This function is called once, at assembler startup time. This
123 should set up all the tables, etc. that the MD part of the assembler
124 needs. */
252b5132
RH
125void
126md_begin ()
127{
128 struct h8_opcode *opcode;
129 char prev_buffer[100];
130 int idx = 0;
131
83e20b45
JL
132#ifdef BFD_ASSEMBLER
133 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
134 as_warn (_("could not set architecture and machine"));
135#endif
136
252b5132
RH
137 opcode_hash_control = hash_new ();
138 prev_buffer[0] = 0;
139
140 for (opcode = h8_opcodes; opcode->name; opcode++)
141 {
142 /* Strip off any . part when inserting the opcode and only enter
70d6ecf3 143 unique codes into the hash table. */
252b5132
RH
144 char *src = opcode->name;
145 unsigned int len = strlen (src);
146 char *dst = malloc (len + 1);
147 char *buffer = dst;
148
149 opcode->size = 0;
150 while (*src)
151 {
152 if (*src == '.')
153 {
154 src++;
155 opcode->size = *src;
156 break;
157 }
158 *dst++ = *src++;
159 }
160 *dst++ = 0;
161 if (strcmp (buffer, prev_buffer))
162 {
163 hash_insert (opcode_hash_control, buffer, (char *) opcode);
164 strcpy (prev_buffer, buffer);
165 idx++;
166 }
167 opcode->idx = idx;
168
70d6ecf3 169 /* Find the number of operands. */
252b5132
RH
170 opcode->noperands = 0;
171 while (opcode->args.nib[opcode->noperands] != E)
172 opcode->noperands++;
70d6ecf3
AM
173
174 /* Find the length of the opcode in bytes. */
252b5132
RH
175 opcode->length = 0;
176 while (opcode->data.nib[opcode->length * 2] != E)
177 opcode->length++;
178 }
179
180 linkrelax = 1;
181}
182
252b5132
RH
183struct h8_exp
184{
185 char *e_beg;
186 char *e_end;
187 expressionS e_exp;
188};
70d6ecf3 189
252b5132
RH
190int dispreg;
191int opsize; /* Set when a register size is seen */
192
252b5132
RH
193struct h8_op
194{
195 op_type mode;
196 unsigned reg;
197 expressionS exp;
198};
199
200/*
201 parse operands
202 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
203 r0l,r0h,..r7l,r7h
204 @WREG
205 @WREG+
206 @-WREG
207 #const
208 ccr
209*/
210
bc0d738a
NC
211/* Try to parse a reg name. Return the number of chars consumed. */
212
40f09f82 213static int
252b5132
RH
214parse_reg (src, mode, reg, direction)
215 char *src;
216 op_type *mode;
217 unsigned int *reg;
218 int direction;
219
220{
221 char *end;
222 int len;
223
70d6ecf3 224 /* Cribbed from get_symbol_end. */
252b5132
RH
225 if (!is_name_beginner (*src) || *src == '\001')
226 return 0;
70d6ecf3 227 end = src + 1;
252b5132
RH
228 while (is_part_of_name (*end) || *end == '\001')
229 end++;
230 len = end - src;
231
232 if (len == 2 && src[0] == 's' && src[1] == 'p')
233 {
234 *mode = PSIZE | REG | direction;
235 *reg = 7;
236 return len;
237 }
238 if (len == 3 && src[0] == 'c' && src[1] == 'c' && src[2] == 'r')
239 {
240 *mode = CCR;
241 *reg = 0;
242 return len;
243 }
244 if (len == 3 && src[0] == 'e' && src[1] == 'x' && src[2] == 'r')
245 {
246 *mode = EXR;
247 *reg = 0;
248 return len;
249 }
250 if (len == 2 && src[0] == 'f' && src[1] == 'p')
251 {
252 *mode = PSIZE | REG | direction;
253 *reg = 6;
254 return len;
255 }
256 if (len == 3 && src[0] == 'e' && src[1] == 'r'
257 && src[2] >= '0' && src[2] <= '7')
258 {
259 *mode = L_32 | REG | direction;
260 *reg = src[2] - '0';
261 if (!Hmode)
262 as_warn (_("Reg not valid for H8/300"));
263 return len;
264 }
265 if (len == 2 && src[0] == 'e' && src[1] >= '0' && src[1] <= '7')
266 {
267 *mode = L_16 | REG | direction;
268 *reg = src[1] - '0' + 8;
269 if (!Hmode)
270 as_warn (_("Reg not valid for H8/300"));
271 return len;
272 }
273
274 if (src[0] == 'r')
275 {
276 if (src[1] >= '0' && src[1] <= '7')
277 {
278 if (len == 3 && src[2] == 'l')
279 {
280 *mode = L_8 | REG | direction;
281 *reg = (src[1] - '0') + 8;
282 return len;
283 }
284 if (len == 3 && src[2] == 'h')
285 {
286 *mode = L_8 | REG | direction;
287 *reg = (src[1] - '0');
288 return len;
289 }
290 if (len == 2)
291 {
292 *mode = L_16 | REG | direction;
293 *reg = (src[1] - '0');
294 return len;
295 }
296 }
297 }
298
299 return 0;
300}
301
40f09f82 302static char *
252b5132
RH
303parse_exp (s, op)
304 char *s;
70d6ecf3 305 expressionS *op;
252b5132
RH
306{
307 char *save = input_line_pointer;
308 char *new;
309
310 input_line_pointer = s;
311 expression (op);
312 if (op->X_op == O_absent)
313 as_bad (_("missing operand"));
314 new = input_line_pointer;
315 input_line_pointer = save;
316 return new;
317}
318
319static char *
320skip_colonthing (ptr, exp, mode)
321 char *ptr;
dbbc7809 322 expressionS *exp ATTRIBUTE_UNUSED;
252b5132
RH
323 int *mode;
324{
325 if (*ptr == ':')
326 {
327 ptr++;
328 *mode &= ~SIZE;
329 if (*ptr == '8')
330 {
331 ptr++;
332 /* ff fill any 8 bit quantity */
70d6ecf3 333 /* exp->X_add_number -= 0x100; */
252b5132
RH
334 *mode |= L_8;
335 }
336 else
337 {
338 if (*ptr == '2')
339 {
340 *mode |= L_24;
341 }
342 else if (*ptr == '3')
343 {
344 *mode |= L_32;
345 }
346 else if (*ptr == '1')
347 {
348 *mode |= L_16;
349 }
3882b010 350 while (ISDIGIT (*ptr))
252b5132
RH
351 ptr++;
352 }
353 }
354 return ptr;
355}
356
357/* The many forms of operand:
358
359 Rn Register direct
360 @Rn Register indirect
361 @(exp[:16], Rn) Register indirect with displacement
362 @Rn+
363 @-Rn
70d6ecf3
AM
364 @aa:8 absolute 8 bit
365 @aa:16 absolute 16 bit
252b5132
RH
366 @aa absolute 16 bit
367
368 #xx[:size] immediate data
70d6ecf3 369 @(exp:[8], pc) pc rel
252b5132
RH
370 @@aa[:8] memory indirect
371
372 */
373
374char *
375colonmod24 (op, src)
376 struct h8_op *op;
377 char *src;
378
379{
380 int mode = 0;
381 src = skip_colonthing (src, &op->exp, &mode);
382
383 if (!mode)
384 {
70d6ecf3 385 /* Choose a default mode. */
252b5132
RH
386 if (op->exp.X_add_number < -32768
387 || op->exp.X_add_number > 32767)
388 {
389 if (Hmode)
390 mode = L_24;
391 else
392 mode = L_16;
393 }
394 else if (op->exp.X_add_symbol
395 || op->exp.X_op_symbol)
396 mode = DSYMMODE;
397 else
398 mode = DMODE;
399 }
400 op->mode |= mode;
401 return src;
402
403}
404
252b5132
RH
405static void
406get_operand (ptr, op, dst, direction)
407 char **ptr;
408 struct h8_op *op;
dbbc7809 409 unsigned int dst ATTRIBUTE_UNUSED;
252b5132
RH
410 int direction;
411{
412 char *src = *ptr;
413 op_type mode;
414 unsigned int num;
415 unsigned int len;
416
417 op->mode = E;
418
419 /* Gross. Gross. ldm and stm have a format not easily handled
420 by get_operand. We deal with it explicitly here. */
3882b010
L
421 if (src[0] == 'e' && src[1] == 'r' && ISDIGIT (src[2])
422 && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && ISDIGIT (src[6]))
252b5132
RH
423 {
424 int low, high;
425
426 low = src[2] - '0';
427 high = src[6] - '0';
428
429 if (high < low)
430 as_bad (_("Invalid register list for ldm/stm\n"));
431
432 if (low % 2)
433 as_bad (_("Invalid register list for ldm/stm\n"));
434
435 if (high - low > 3)
436 as_bad (_("Invalid register list for ldm/stm\n"));
437
438 if (high - low != 1
439 && low % 4)
440 as_bad (_("Invalid register list for ldm/stm\n"));
441
442 /* Even sicker. We encode two registers into op->reg. One
443 for the low register to save, the other for the high
444 register to save; we also set the high bit in op->reg
445 so we know this is "very special". */
446 op->reg = 0x80000000 | (high << 8) | low;
447 op->mode = REG;
448 *ptr = src + 7;
449 return;
450 }
451
452 len = parse_reg (src, &op->mode, &op->reg, direction);
453 if (len)
454 {
455 *ptr = src + len;
456 return;
457 }
458
459 if (*src == '@')
460 {
461 src++;
462 if (*src == '@')
463 {
464 src++;
465 src = parse_exp (src, &op->exp);
466
467 src = skip_colonthing (src, &op->exp, &op->mode);
468
469 *ptr = src;
470
471 op->mode = MEMIND;
472 return;
252b5132
RH
473 }
474
252b5132
RH
475 if (*src == '-')
476 {
477 src++;
478 len = parse_reg (src, &mode, &num, direction);
479 if (len == 0)
480 {
70d6ecf3 481 /* Oops, not a reg after all, must be ordinary exp. */
252b5132 482 src--;
70d6ecf3 483 /* Must be a symbol. */
252b5132
RH
484 op->mode = ABS | PSIZE | direction;
485 *ptr = skip_colonthing (parse_exp (src, &op->exp),
486 &op->exp, &op->mode);
487
488 return;
252b5132
RH
489 }
490
252b5132
RH
491 if ((mode & SIZE) != PSIZE)
492 as_bad (_("Wrong size pointer register for architecture."));
493 op->mode = RDDEC;
494 op->reg = num;
495 *ptr = src + len;
496 return;
497 }
498 if (*src == '(')
499 {
70d6ecf3 500 /* Disp. */
252b5132
RH
501 src++;
502
70d6ecf3 503 /* Start off assuming a 16 bit offset. */
252b5132
RH
504
505 src = parse_exp (src, &op->exp);
506
507 src = colonmod24 (op, src);
508
509 if (*src == ')')
510 {
511 src++;
512 op->mode |= ABS | direction;
513 *ptr = src;
514 return;
515 }
516
517 if (*src != ',')
518 {
519 as_bad (_("expected @(exp, reg16)"));
520 return;
521
522 }
523 src++;
524
525 len = parse_reg (src, &mode, &op->reg, direction);
526 if (len == 0 || !(mode & REG))
527 {
528 as_bad (_("expected @(exp, reg16)"));
529 return;
530 }
531 op->mode |= DISP | direction;
532 dispreg = op->reg;
533 src += len;
534 src = skip_colonthing (src, &op->exp, &op->mode);
535
536 if (*src != ')' && '(')
537 {
538 as_bad (_("expected @(exp, reg16)"));
539 return;
540 }
541 *ptr = src + 1;
542
543 return;
544 }
545 len = parse_reg (src, &mode, &num, direction);
546
547 if (len)
548 {
549 src += len;
550 if (*src == '+')
551 {
552 src++;
553 if ((mode & SIZE) != PSIZE)
554 as_bad (_("Wrong size pointer register for architecture."));
555 op->mode = RSINC;
556 op->reg = num;
557 *ptr = src;
558 return;
559 }
560 if ((mode & SIZE) != PSIZE)
561 as_bad (_("Wrong size pointer register for architecture."));
562
563 op->mode = direction | IND | PSIZE;
564 op->reg = num;
565 *ptr = src;
566
567 return;
568 }
569 else
570 {
571 /* must be a symbol */
572
573 op->mode = ABS | direction;
574 src = parse_exp (src, &op->exp);
575
576 *ptr = colonmod24 (op, src);
577
578 return;
579 }
580 }
581
252b5132
RH
582 if (*src == '#')
583 {
584 src++;
585 op->mode = IMM;
586 src = parse_exp (src, &op->exp);
587 *ptr = skip_colonthing (src, &op->exp, &op->mode);
588
589 return;
590 }
591 else if (strncmp (src, "mach", 4) == 0
592 || strncmp (src, "macl", 4) == 0)
593 {
594 op->reg = src[3] == 'l';
595 op->mode = MACREG;
596 *ptr = src + 4;
597 return;
598 }
599 else
600 {
601 src = parse_exp (src, &op->exp);
602 /* Trailing ':' size ? */
603 if (*src == ':')
604 {
605 if (src[1] == '1' && src[2] == '6')
606 {
607 op->mode = PCREL | L_16;
608 src += 3;
609 }
610 else if (src[1] == '8')
611 {
612 op->mode = PCREL | L_8;
613 src += 2;
614 }
615 else
616 {
617 as_bad (_("expect :8 or :16 here"));
618 }
619 }
620 else
621 {
622 op->mode = PCREL | bsize;
623 }
624 *ptr = src;
625 }
626}
627
70d6ecf3 628static char *
252b5132
RH
629get_operands (noperands, op_end, operand)
630 unsigned int noperands;
631 char *op_end;
632 struct h8_op *operand;
633{
634 char *ptr = op_end;
635
636 switch (noperands)
637 {
638 case 0:
639 operand[0].mode = 0;
640 operand[1].mode = 0;
641 break;
642
643 case 1:
644 ptr++;
645 get_operand (&ptr, operand + 0, 0, SRC);
646 if (*ptr == ',')
647 {
648 ptr++;
649 get_operand (&ptr, operand + 1, 1, DST);
650 }
651 else
652 {
653 operand[1].mode = 0;
654 }
252b5132 655 break;
70d6ecf3 656
252b5132
RH
657 case 2:
658 ptr++;
659 get_operand (&ptr, operand + 0, 0, SRC);
660 if (*ptr == ',')
661 ptr++;
662 get_operand (&ptr, operand + 1, 1, DST);
663 break;
664
665 default:
666 abort ();
667 }
668
252b5132
RH
669 return ptr;
670}
671
672/* Passed a pointer to a list of opcodes which use different
673 addressing modes, return the opcode which matches the opcodes
70d6ecf3
AM
674 provided. */
675static struct h8_opcode *
252b5132
RH
676get_specific (opcode, operands, size)
677 struct h8_opcode *opcode;
678 struct h8_op *operands;
679 int size;
680{
681 struct h8_opcode *this_try = opcode;
682 int found = 0;
683
684 unsigned int this_index = opcode->idx;
685
686 /* There's only one ldm/stm and it's easier to just
687 get out quick for them. */
688 if (strcmp (opcode->name, "stm.l") == 0
689 || strcmp (opcode->name, "ldm.l") == 0)
690 return this_try;
691
692 while (this_index == opcode->idx && !found)
693 {
694 found = 1;
695
696 this_try = opcode++;
697 if (this_try->noperands == 0)
698 {
699 int this_size;
700
701 this_size = this_try->how & SN;
702 if (this_size != size && (this_size != SB || size != SN))
703 found = 0;
704 }
705 else
706 {
707 unsigned int i;
708
709 for (i = 0; i < this_try->noperands && found; i++)
710 {
711 op_type op = this_try->args.nib[i];
712 int x = operands[i].mode;
713
714 if ((op & (DISP | REG)) == (DISP | REG)
715 && ((x & (DISP | REG)) == (DISP | REG)))
716 {
717 dispreg = operands[i].reg;
718 }
719 else if (op & REG)
720 {
721 if (!(x & REG))
722 found = 0;
723
724 if (x & L_P)
725 x = (x & ~L_P) | (Hmode ? L_32 : L_16);
726 if (op & L_P)
727 op = (op & ~L_P) | (Hmode ? L_32 : L_16);
728
729 opsize = op & SIZE;
730
70d6ecf3 731 /* The size of the reg is v important. */
252b5132
RH
732 if ((op & SIZE) != (x & SIZE))
733 found = 0;
734 }
735 else if ((op & ABSJMP) && (x & ABS))
736 {
737 operands[i].mode &= ~ABS;
738 operands[i].mode |= ABSJMP;
70d6ecf3 739 /* But it may not be 24 bits long. */
252b5132
RH
740 if (!Hmode)
741 {
742 operands[i].mode &= ~SIZE;
743 operands[i].mode |= L_16;
744 }
745 }
746 else if ((op & (KBIT | DBIT)) && (x & IMM))
747 {
70d6ecf3 748 /* This is ok if the immediate value is sensible. */
252b5132
RH
749 }
750 else if (op & PCREL)
751 {
70d6ecf3 752 /* The size of the displacement is important. */
252b5132
RH
753 if ((op & SIZE) != (x & SIZE))
754 found = 0;
755 }
756 else if ((op & (DISP | IMM | ABS))
757 && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
758 {
759 /* Promote a L_24 to L_32 if it makes us match. */
760 if ((x & L_24) && (op & L_32))
761 {
762 x &= ~L_24;
763 x |= L_32;
764 }
765 /* Promote an L8 to L_16 if it makes us match. */
70d6ecf3 766 if (op & ABS && op & L_8 && op & DISP)
252b5132
RH
767 {
768 if (x & L_16)
70d6ecf3 769 found = 1;
252b5132
RH
770 }
771 else if ((x & SIZE) != 0
772 && ((op & SIZE) != (x & SIZE)))
773 found = 0;
774 }
775 else if ((op & MACREG) != (x & MACREG))
776 {
777 found = 0;
778 }
779 else if ((op & MODE) != (x & MODE))
780 {
781 found = 0;
70d6ecf3 782 }
252b5132
RH
783 }
784 }
785 }
786 if (found)
787 return this_try;
788 else
789 return 0;
790}
791
792static void
793check_operand (operand, width, string)
794 struct h8_op *operand;
795 unsigned int width;
796 char *string;
797{
798 if (operand->exp.X_add_symbol == 0
799 && operand->exp.X_op_symbol == 0)
800 {
70d6ecf3
AM
801 /* No symbol involved, let's look at offset, it's dangerous if
802 any of the high bits are not 0 or ff's, find out by oring or
803 anding with the width and seeing if the answer is 0 or all
804 fs. */
252b5132 805
252b5132
RH
806 if ((operand->exp.X_add_number & ~width) != 0 &&
807 (operand->exp.X_add_number | width) != (~0))
808 {
70d6ecf3 809 if (width == 255
252b5132
RH
810 && (operand->exp.X_add_number & 0xff00) == 0xff00)
811 {
812 /* Just ignore this one - which happens when trying to
813 fit a 16 bit address truncated into an 8 bit address
814 of something like bset. */
815 }
70d6ecf3 816 else
252b5132
RH
817 {
818 as_warn (_("operand %s0x%lx out of range."), string,
819 (unsigned long) operand->exp.X_add_number);
820 }
821 }
822 }
252b5132
RH
823}
824
825/* RELAXMODE has one of 3 values:
826
827 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
828
829 1 Output a relaxable 24bit absolute mov.w address relocation
830 (may relax into a 16bit absolute address).
831
832 2 Output a relaxable 16/24 absolute mov.b address relocation
833 (may relax into an 8bit absolute address). */
834
835static void
836do_a_fix_imm (offset, operand, relaxmode)
837 int offset;
838 struct h8_op *operand;
839 int relaxmode;
840{
841 int idx;
842 int size;
843 int where;
844
252b5132
RH
845 char *t = operand->mode & IMM ? "#" : "@";
846
847 if (operand->exp.X_add_symbol == 0)
848 {
849 char *bytes = frag_now->fr_literal + offset;
850 switch (operand->mode & SIZE)
851 {
852 case L_2:
853 check_operand (operand, 0x3, t);
854 bytes[0] |= (operand->exp.X_add_number) << 4;
855 break;
856 case L_3:
857 check_operand (operand, 0x7, t);
858 bytes[0] |= (operand->exp.X_add_number) << 4;
859 break;
860 case L_8:
861 check_operand (operand, 0xff, t);
862 bytes[0] = operand->exp.X_add_number;
863 break;
864 case L_16:
865 check_operand (operand, 0xffff, t);
866 bytes[0] = operand->exp.X_add_number >> 8;
867 bytes[1] = operand->exp.X_add_number >> 0;
868 break;
869 case L_24:
870 check_operand (operand, 0xffffff, t);
871 bytes[0] = operand->exp.X_add_number >> 16;
872 bytes[1] = operand->exp.X_add_number >> 8;
873 bytes[2] = operand->exp.X_add_number >> 0;
874 break;
875
876 case L_32:
70d6ecf3 877 /* This should be done with bfd. */
252b5132
RH
878 bytes[0] = operand->exp.X_add_number >> 24;
879 bytes[1] = operand->exp.X_add_number >> 16;
880 bytes[2] = operand->exp.X_add_number >> 8;
881 bytes[3] = operand->exp.X_add_number >> 0;
4132022d
AM
882 if (relaxmode != 0)
883 {
884 idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
885 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
886 }
252b5132
RH
887 break;
888 }
252b5132
RH
889 }
890 else
891 {
892 switch (operand->mode & SIZE)
893 {
252b5132
RH
894 case L_24:
895 case L_32:
896 size = 4;
897 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
898 if (relaxmode == 2)
899 idx = R_MOV24B1;
900 else if (relaxmode == 1)
901 idx = R_MOVL1;
902 else
903 idx = R_RELLONG;
904 break;
905 default:
70d6ecf3 906 as_bad (_("Can't work out size of operand.\n"));
252b5132
RH
907 case L_16:
908 size = 2;
909 where = 0;
910 if (relaxmode == 2)
911 idx = R_MOV16B1;
912 else
913 idx = R_RELWORD;
4132022d
AM
914 operand->exp.X_add_number =
915 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
252b5132
RH
916 break;
917 case L_8:
918 size = 1;
919 where = 0;
920 idx = R_RELBYTE;
4132022d
AM
921 operand->exp.X_add_number =
922 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
252b5132
RH
923 }
924
925 fix_new_exp (frag_now,
926 offset + where,
927 size,
928 &operand->exp,
929 0,
930 idx);
931 }
252b5132
RH
932}
933
70d6ecf3 934/* Now we know what sort of opcodes it is, let's build the bytes. */
252b5132
RH
935static void
936build_bytes (this_try, operand)
937 struct h8_opcode *this_try;
938 struct h8_op *operand;
939{
940 unsigned int i;
941
942 char *output = frag_more (this_try->length);
943 op_type *nibble_ptr = this_try->data.nib;
944 op_type c;
945 unsigned int nibble_count = 0;
946 int absat;
947 int immat;
948 int nib;
949 int movb = 0;
950 char asnibbles[30];
951 char *p = asnibbles;
952
953 if (!(this_try->inbase || Hmode))
954 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
955 this_try->name);
956
957 while (*nibble_ptr != E)
958 {
959 int d;
960 c = *nibble_ptr++;
961
962 d = (c & (DST | SRC_IN_DST)) != 0;
963
964 if (c < 16)
965 {
966 nib = c;
967 }
968 else
969 {
252b5132
RH
970 if (c & (REG | IND | INC | DEC))
971 {
972 nib = operand[d].reg;
973 }
974 else if ((c & DISPREG) == (DISPREG))
975 {
976 nib = dispreg;
977 }
70d6ecf3 978 else if (c & ABS)
252b5132
RH
979 {
980 operand[d].mode = c;
981 absat = nibble_count / 2;
982 nib = 0;
983 }
984 else if (c & (IMM | PCREL | ABS | ABSJMP | DISP))
985 {
986 operand[d].mode = c;
987 immat = nibble_count / 2;
988 nib = 0;
989 }
990 else if (c & IGNORE)
991 {
992 nib = 0;
993 }
994 else if (c & DBIT)
995 {
996 switch (operand[0].exp.X_add_number)
997 {
998 case 1:
999 nib = c;
1000 break;
1001 case 2:
1002 nib = 0x8 | c;
1003 break;
1004 default:
1005 as_bad (_("Need #1 or #2 here"));
1006 }
1007 }
1008 else if (c & KBIT)
1009 {
1010 switch (operand[0].exp.X_add_number)
1011 {
1012 case 1:
1013 nib = 0;
1014 break;
1015 case 2:
1016 nib = 8;
1017 break;
1018 case 4:
1019 if (!Hmode)
1020 as_warn (_("#4 not valid on H8/300."));
1021 nib = 9;
1022 break;
1023
1024 default:
1025 as_bad (_("Need #1 or #2 here"));
1026 break;
1027 }
70d6ecf3 1028 /* Stop it making a fix. */
252b5132
RH
1029 operand[0].mode = 0;
1030 }
1031
1032 if (c & MEMRELAX)
1033 {
1034 operand[d].mode |= MEMRELAX;
1035 }
1036
1037 if (c & B31)
1038 {
1039 nib |= 0x8;
1040 }
1041
1042 if (c & MACREG)
1043 {
f0c56b90
NC
1044 if (operand[0].mode == MACREG)
1045 /* stmac has mac[hl] as the first operand. */
1046 nib = 2 + operand[0].reg;
1047 else
1048 /* ldmac has mac[hl] as the second operand. */
1049 nib = 2 + operand[1].reg;
252b5132
RH
1050 }
1051 }
1052 nibble_count++;
1053
1054 *p++ = nib;
1055 }
1056
1057 /* Disgusting. Why, oh why didn't someone ask us for advice
1058 on the assembler format. */
1059 if (strcmp (this_try->name, "stm.l") == 0
1060 || strcmp (this_try->name, "ldm.l") == 0)
1061 {
1062 int high, low;
1063 high = (operand[this_try->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf;
1064 low = operand[this_try->name[0] == 'l' ? 1 : 0].reg & 0xf;
1065
1066 asnibbles[2] = high - low;
1067 asnibbles[7] = (this_try->name[0] == 'l') ? high : low;
1068 }
1069
1070 for (i = 0; i < this_try->length; i++)
1071 {
1072 output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
1073 }
1074
1075 /* Note if this is a movb instruction -- there's a special relaxation
1076 which only applies to them. */
1077 if (strcmp (this_try->name, "mov.b") == 0)
1078 movb = 1;
1079
70d6ecf3 1080 /* Output any fixes. */
252b5132
RH
1081 for (i = 0; i < 2; i++)
1082 {
1083 int x = operand[i].mode;
1084
1085 if (x & (IMM | DISP))
1086 {
1087 do_a_fix_imm (output - frag_now->fr_literal + immat,
1088 operand + i, x & MEMRELAX != 0);
1089 }
1090 else if (x & ABS)
1091 {
1092 do_a_fix_imm (output - frag_now->fr_literal + absat,
1093 operand + i, x & MEMRELAX ? movb + 1 : 0);
1094 }
1095 else if (x & PCREL)
1096 {
1097 int size16 = x & L_16;
1098 int where = size16 ? 2 : 1;
1099 int size = size16 ? 2 : 1;
1100 int type = size16 ? R_PCRWORD : R_PCRBYTE;
36ed2fff 1101 fixS *fixP;
252b5132
RH
1102
1103 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1104
1105 if (operand[i].exp.X_add_number & 1)
1106 {
1107 as_warn (_("branch operand has odd offset (%lx)\n"),
1108 (unsigned long) operand->exp.X_add_number);
1109 }
1110
36ed2fff
JL
1111#ifndef OBJ_ELF
1112 /* The COFF port has always been off by one, changing it
1113 now would be an incompatible change, so we leave it as-is.
1114
1115 We don't want to do this for ELF as we want to be
1116 compatible with the proposed ELF format from Hitachi. */
252b5132 1117 operand[i].exp.X_add_number -= 1;
36ed2fff
JL
1118#endif
1119
4132022d
AM
1120 operand[i].exp.X_add_number =
1121 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
252b5132 1122
36ed2fff
JL
1123 fixP = fix_new_exp (frag_now,
1124 output - frag_now->fr_literal + where,
1125 size,
1126 &operand[i].exp,
1127 1,
1128 type);
1129 fixP->fx_signed = 1;
252b5132
RH
1130 }
1131 else if (x & MEMIND)
1132 {
252b5132
RH
1133 check_operand (operand + i, 0xff, "@@");
1134 fix_new_exp (frag_now,
1135 output - frag_now->fr_literal + 1,
1136 1,
1137 &operand[i].exp,
1138 0,
1139 R_MEM_INDIRECT);
1140 }
1141 else if (x & ABSJMP)
1142 {
3c1ba8a3
JL
1143 int where = 0;
1144
1145#ifdef OBJ_ELF
1146 /* To be compatible with the proposed H8 ELF format, we
1147 want the relocation's offset to point to the first byte
1148 that will be modified, not to the start of the instruction. */
1149 where += 1;
3c1ba8a3 1150#endif
de342d07 1151
70d6ecf3 1152 /* This jmp may be a jump or a branch. */
252b5132
RH
1153
1154 check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@");
1155 if (operand[i].exp.X_add_number & 1)
1156 {
1157 as_warn (_("branch operand has odd offset (%lx)\n"),
1158 (unsigned long) operand->exp.X_add_number);
1159 }
1160 if (!Hmode)
70d6ecf3 1161 operand[i].exp.X_add_number =
4132022d 1162 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
252b5132 1163 fix_new_exp (frag_now,
3c1ba8a3 1164 output - frag_now->fr_literal + where,
252b5132
RH
1165 4,
1166 &operand[i].exp,
1167 0,
1168 R_JMPL1);
1169 }
1170 }
252b5132
RH
1171}
1172
70d6ecf3
AM
1173/* Try to give an intelligent error message for common and simple to
1174 detect errors. */
252b5132
RH
1175static void
1176clever_message (opcode, operand)
1177 struct h8_opcode *opcode;
1178 struct h8_op *operand;
1179{
70d6ecf3 1180 /* Find out if there was more than one possible opcode. */
252b5132
RH
1181
1182 if ((opcode + 1)->idx != opcode->idx)
1183 {
1184 unsigned int argn;
1185
70d6ecf3
AM
1186 /* Only one opcode of this flavour, try to guess which operand
1187 didn't match. */
252b5132
RH
1188 for (argn = 0; argn < opcode->noperands; argn++)
1189 {
1190 switch (opcode->args.nib[argn])
1191 {
1192 case RD16:
1193 if (operand[argn].mode != RD16)
1194 {
1195 as_bad (_("destination operand must be 16 bit register"));
1196 return;
1197
1198 }
1199 break;
1200
1201 case RS8:
252b5132
RH
1202 if (operand[argn].mode != RS8)
1203 {
1204 as_bad (_("source operand must be 8 bit register"));
1205 return;
1206 }
1207 break;
1208
1209 case ABS16DST:
1210 if (operand[argn].mode != ABS16DST)
1211 {
1212 as_bad (_("destination operand must be 16bit absolute address"));
1213 return;
1214 }
1215 break;
1216 case RD8:
1217 if (operand[argn].mode != RD8)
1218 {
1219 as_bad (_("destination operand must be 8 bit register"));
1220 return;
1221 }
1222 break;
1223
252b5132
RH
1224 case ABS16SRC:
1225 if (operand[argn].mode != ABS16SRC)
1226 {
1227 as_bad (_("source operand must be 16bit absolute address"));
1228 return;
1229 }
1230 break;
1231
1232 }
1233 }
1234 }
1235 as_bad (_("invalid operands"));
1236}
1237
70d6ecf3
AM
1238/* This is the guts of the machine-dependent assembler. STR points to
1239 a machine dependent instruction. This function is supposed to emit
1240 the frags/bytes it assembles. */
252b5132
RH
1241void
1242md_assemble (str)
1243 char *str;
1244{
1245 char *op_start;
1246 char *op_end;
1247 struct h8_op operand[2];
1248 struct h8_opcode *opcode;
1249 struct h8_opcode *prev_opcode;
1250
1251 char *dot = 0;
1252 char c;
1253 int size;
1254
70d6ecf3 1255 /* Drop leading whitespace. */
252b5132
RH
1256 while (*str == ' ')
1257 str++;
1258
70d6ecf3 1259 /* Find the op code end. */
252b5132
RH
1260 for (op_start = op_end = str;
1261 *op_end != 0 && *op_end != ' ';
1262 op_end++)
1263 {
1264 if (*op_end == '.')
1265 {
1266 dot = op_end + 1;
1267 *op_end = 0;
1268 op_end += 2;
1269 break;
1270 }
1271 }
1272
252b5132
RH
1273 if (op_end == op_start)
1274 {
1275 as_bad (_("can't find opcode "));
1276 }
1277 c = *op_end;
1278
1279 *op_end = 0;
1280
1281 opcode = (struct h8_opcode *) hash_find (opcode_hash_control,
1282 op_start);
1283
1284 if (opcode == NULL)
1285 {
1286 as_bad (_("unknown opcode"));
1287 return;
1288 }
1289
70d6ecf3 1290 /* We used to set input_line_pointer to the result of get_operands,
252b5132
RH
1291 but that is wrong. Our caller assumes we don't change it. */
1292
1293 (void) get_operands (opcode->noperands, op_end, operand);
1294 *op_end = c;
1295 prev_opcode = opcode;
1296
1297 size = SN;
1298 if (dot)
1299 {
1300 switch (*dot)
1301 {
1302 case 'b':
1303 size = SB;
1304 break;
1305
1306 case 'w':
1307 size = SW;
1308 break;
1309
1310 case 'l':
1311 size = SL;
1312 break;
1313 }
1314 }
1315 opcode = get_specific (opcode, operand, size);
1316
1317 if (opcode == 0)
1318 {
70d6ecf3 1319 /* Couldn't find an opcode which matched the operands. */
252b5132
RH
1320 char *where = frag_more (2);
1321
1322 where[0] = 0x0;
1323 where[1] = 0x0;
1324 clever_message (prev_opcode, operand);
1325
1326 return;
1327 }
1328 if (opcode->size && dot)
1329 {
1330 if (opcode->size != *dot)
1331 {
1332 as_warn (_("mismatch between opcode size and operand size"));
1333 }
1334 }
1335
1336 build_bytes (opcode, operand);
252b5132
RH
1337}
1338
5facebfc 1339#ifndef BFD_ASSEMBLER
252b5132
RH
1340void
1341tc_crawl_symbol_chain (headers)
70d6ecf3 1342 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
1343{
1344 printf (_("call to tc_crawl_symbol_chain \n"));
1345}
f333765f 1346#endif
252b5132
RH
1347
1348symbolS *
1349md_undefined_symbol (name)
dbbc7809 1350 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1351{
1352 return 0;
1353}
1354
5facebfc 1355#ifndef BFD_ASSEMBLER
252b5132
RH
1356void
1357tc_headers_hook (headers)
70d6ecf3 1358 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
1359{
1360 printf (_("call to tc_headers_hook \n"));
1361}
f333765f 1362#endif
252b5132
RH
1363
1364/* Various routines to kill one day */
1365/* Equal to MAX_PRECISION in atof-ieee.c */
1366#define MAX_LITTLENUMS 6
1367
70d6ecf3
AM
1368/* Turn a string in input_line_pointer into a floating point constant
1369 of type TYPE, and store the appropriate bytes in *LITP. The number
bc0d738a 1370 of LITTLENUMS emitted is stored in *SIZEP. An error message is
70d6ecf3 1371 returned, or NULL on OK. */
bc0d738a 1372
252b5132
RH
1373char *
1374md_atof (type, litP, sizeP)
1375 char type;
1376 char *litP;
1377 int *sizeP;
1378{
1379 int prec;
1380 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1381 LITTLENUM_TYPE *wordP;
1382 char *t;
1383 char *atof_ieee ();
1384
1385 switch (type)
1386 {
1387 case 'f':
1388 case 'F':
1389 case 's':
1390 case 'S':
1391 prec = 2;
1392 break;
1393
1394 case 'd':
1395 case 'D':
1396 case 'r':
1397 case 'R':
1398 prec = 4;
1399 break;
1400
1401 case 'x':
1402 case 'X':
1403 prec = 6;
1404 break;
1405
1406 case 'p':
1407 case 'P':
1408 prec = 6;
1409 break;
1410
1411 default:
1412 *sizeP = 0;
1413 return _("Bad call to MD_ATOF()");
1414 }
1415 t = atof_ieee (input_line_pointer, type, words);
1416 if (t)
1417 input_line_pointer = t;
1418
1419 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1420 for (wordP = words; prec--;)
1421 {
1422 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
1423 litP += sizeof (LITTLENUM_TYPE);
1424 }
1425 return 0;
1426}
1427\f
1428CONST char *md_shortopts = "";
1429struct option md_longopts[] = {
1430 {NULL, no_argument, NULL, 0}
1431};
70d6ecf3
AM
1432
1433size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1434
1435int
1436md_parse_option (c, arg)
dbbc7809
JL
1437 int c ATTRIBUTE_UNUSED;
1438 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
1439{
1440 return 0;
1441}
1442
1443void
1444md_show_usage (stream)
dbbc7809 1445 FILE *stream ATTRIBUTE_UNUSED;
252b5132
RH
1446{
1447}
1448\f
1449void
1450tc_aout_fix_to_chars ()
1451{
1452 printf (_("call to tc_aout_fix_to_chars \n"));
1453 abort ();
1454}
1455
1456void
1457md_convert_frag (headers, seg, fragP)
36ed2fff
JL
1458#ifdef BFD_ASSEMBLER
1459 bfd *headers ATTRIBUTE_UNUSED;
1460#else
dbbc7809 1461 object_headers *headers ATTRIBUTE_UNUSED;
36ed2fff 1462#endif
dbbc7809
JL
1463 segT seg ATTRIBUTE_UNUSED;
1464 fragS *fragP ATTRIBUTE_UNUSED;
252b5132
RH
1465{
1466 printf (_("call to md_convert_frag \n"));
1467 abort ();
1468}
1469
3c1ba8a3
JL
1470#ifdef BFD_ASSEMBLER
1471valueT
1472md_section_align (segment, size)
1473 segT segment;
1474 valueT size;
1475{
1476 int align = bfd_get_section_alignment (stdoutput, segment);
1477 return ((size + (1 << align) - 1) & (-1 << align));
1478}
1479#else
70d6ecf3 1480valueT
252b5132
RH
1481md_section_align (seg, size)
1482 segT seg;
1483 valueT size;
1484{
70d6ecf3 1485 return ((size + (1 << section_alignment[(int) seg]) - 1)
3c1ba8a3 1486 & (-1 << section_alignment[(int) seg]));
252b5132 1487}
3c1ba8a3
JL
1488#endif
1489
252b5132
RH
1490
1491void
94f592af 1492md_apply_fix3 (fixP, valP, seg)
252b5132 1493 fixS *fixP;
94f592af
NC
1494 valueT *valP;
1495 segT seg ATTRIBUTE_UNUSED;
252b5132
RH
1496{
1497 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
94f592af 1498 long val = * (long *) valP;
252b5132
RH
1499
1500 switch (fixP->fx_size)
1501 {
1502 case 1:
1503 *buf++ = val;
1504 break;
1505 case 2:
1506 *buf++ = (val >> 8);
1507 *buf++ = val;
1508 break;
1509 case 4:
1510 *buf++ = (val >> 24);
1511 *buf++ = (val >> 16);
1512 *buf++ = (val >> 8);
1513 *buf++ = val;
1514 break;
1515 default:
1516 abort ();
1517 }
94f592af
NC
1518
1519 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1520 fixP->fx_done = 1;
252b5132
RH
1521}
1522
1523int
1524md_estimate_size_before_relax (fragP, segment_type)
dbbc7809
JL
1525 register fragS *fragP ATTRIBUTE_UNUSED;
1526 register segT segment_type ATTRIBUTE_UNUSED;
252b5132
RH
1527{
1528 printf (_("call tomd_estimate_size_before_relax \n"));
1529 abort ();
1530}
1531
70d6ecf3 1532/* Put number into target byte order. */
252b5132
RH
1533void
1534md_number_to_chars (ptr, use, nbytes)
1535 char *ptr;
1536 valueT use;
1537 int nbytes;
1538{
1539 number_to_chars_bigendian (ptr, use, nbytes);
1540}
70d6ecf3 1541
252b5132
RH
1542long
1543md_pcrel_from (fixP)
dbbc7809 1544 fixS *fixP ATTRIBUTE_UNUSED;
252b5132
RH
1545{
1546 abort ();
1547}
1548
5facebfc 1549#ifndef BFD_ASSEMBLER
252b5132
RH
1550void
1551tc_reloc_mangle (fix_ptr, intr, base)
1552 fixS *fix_ptr;
1553 struct internal_reloc *intr;
1554 bfd_vma base;
1555
1556{
1557 symbolS *symbol_ptr;
1558
1559 symbol_ptr = fix_ptr->fx_addsy;
1560
1561 /* If this relocation is attached to a symbol then it's ok
70d6ecf3 1562 to output it. */
252b5132
RH
1563 if (fix_ptr->fx_r_type == TC_CONS_RELOC)
1564 {
1565 /* cons likes to create reloc32's whatever the size of the reloc..
1566 */
1567 switch (fix_ptr->fx_size)
1568 {
1569 case 4:
1570 intr->r_type = R_RELLONG;
1571 break;
1572 case 2:
1573 intr->r_type = R_RELWORD;
1574 break;
1575 case 1:
1576 intr->r_type = R_RELBYTE;
1577 break;
1578 default:
1579 abort ();
252b5132 1580 }
252b5132
RH
1581 }
1582 else
1583 {
1584 intr->r_type = fix_ptr->fx_r_type;
1585 }
1586
1587 intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base;
1588 intr->r_offset = fix_ptr->fx_offset;
1589
1590 if (symbol_ptr)
1591 {
1592 if (symbol_ptr->sy_number != -1)
1593 intr->r_symndx = symbol_ptr->sy_number;
1594 else
1595 {
1596 symbolS *segsym;
1597
1598 /* This case arises when a reference is made to `.'. */
1599 segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot;
1600 if (segsym == NULL)
1601 intr->r_symndx = -1;
1602 else
1603 {
1604 intr->r_symndx = segsym->sy_number;
1605 intr->r_offset += S_GET_VALUE (symbol_ptr);
1606 }
1607 }
1608 }
1609 else
1610 intr->r_symndx = -1;
252b5132 1611}
5facebfc 1612#else /* BFD_ASSEMBLER */
f333765f
JL
1613arelent *
1614tc_gen_reloc (section, fixp)
1615 asection *section ATTRIBUTE_UNUSED;
1616 fixS *fixp;
1617{
1618 arelent *rel;
1619 bfd_reloc_code_real_type r_type;
1620
de342d07
JL
1621 if (fixp->fx_addsy && fixp->fx_subsy)
1622 {
1623 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1624 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1625 {
1626 as_bad_where (fixp->fx_file, fixp->fx_line,
1627 "Difference of symbols in different sections is not supported");
1628 return NULL;
1629 }
1630 }
1631
f333765f
JL
1632 rel = (arelent *) xmalloc (sizeof (arelent));
1633 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1634 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1635 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
1636 rel->addend = fixp->fx_offset;
1637
1638 r_type = fixp->fx_r_type;
1639
1640#define DEBUG 0
1641#if DEBUG
1642 fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
1643 fflush(stderr);
1644#endif
1645 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1646 if (rel->howto == NULL)
1647 {
1648 as_bad_where (fixp->fx_file, fixp->fx_line,
1649 _("Cannot represent relocation type %s"),
1650 bfd_get_reloc_code_name (r_type));
1651 return NULL;
1652 }
1653
1654 return rel;
1655}
1656#endif
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