2001-08-31 H.J. Lu <hjl@gnu.org>
[deliverable/binutils-gdb.git] / gas / config / tc-h8300.c
CommitLineData
252b5132 1/* tc-h8300.c -- Assemble code for the Hitachi H8/300
7e0de7bf 2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
bc0d738a 22/* Written By Steve Chamberlain <sac@cygnus.com>. */
252b5132
RH
23
24#include <stdio.h>
25#include "as.h"
26#include "subsegs.h"
27#include "bfd.h"
28#define DEFINE_TABLE
29#define h8_opcodes ops
30#include "opcode/h8300.h"
31#include <ctype.h>
32
7e0de7bf
JL
33#ifdef OBJ_ELF
34#include "elf/h8.h"
7e0de7bf
JL
35#endif
36
63a0b638 37const char comment_chars[] = ";";
252b5132 38const char line_comment_chars[] = "#";
63a0b638 39const char line_separator_chars[] = "";
252b5132
RH
40
41/* This table describes all the machine specific pseudo-ops the assembler
42 has to support. The fields are:
43 pseudo-op name without dot
44 function to call to execute this pseudo-op
45 Integer arg to pass to the function
46 */
47
48void cons ();
49
50int Hmode;
51int Smode;
52#define PSIZE (Hmode ? L_32 : L_16)
53#define DMODE (L_16)
54#define DSYMMODE (Hmode ? L_24 : L_16)
55int bsize = L_8; /* default branch displacement */
56
252b5132
RH
57void
58h8300hmode ()
59{
60 Hmode = 1;
61 Smode = 0;
83e20b45
JL
62#ifdef BFD_ASSEMBLER
63 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
64 as_warn (_("could not set architecture and machine"));
65#endif
252b5132
RH
66}
67
68void
69h8300smode ()
70{
71 Smode = 1;
72 Hmode = 1;
83e20b45
JL
73#ifdef BFD_ASSEMBLER
74 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
75 as_warn (_("could not set architecture and machine"));
76#endif
252b5132 77}
70d6ecf3 78
252b5132
RH
79void
80sbranch (size)
81 int size;
82{
83 bsize = size;
84}
85
70d6ecf3
AM
86static void
87pint ()
252b5132
RH
88{
89 cons (Hmode ? 4 : 2);
90}
91
92const pseudo_typeS md_pseudo_table[] =
93{
252b5132
RH
94 {"h8300h", h8300hmode, 0},
95 {"h8300s", h8300smode, 0},
96 {"sbranch", sbranch, L_8},
97 {"lbranch", sbranch, L_16},
98
99 {"int", pint, 0},
100 {"data.b", cons, 1},
101 {"data.w", cons, 2},
102 {"data.l", cons, 4},
103 {"form", listing_psize, 0},
104 {"heading", listing_title, 0},
105 {"import", s_ignore, 0},
106 {"page", listing_eject, 0},
107 {"program", s_ignore, 0},
108 {0, 0, 0}
109};
110
111const int md_reloc_size;
112
113const char EXP_CHARS[] = "eE";
114
115/* Chars that mean this number is a floating point constant */
116/* As in 0f12.456 */
117/* or 0d1.2345e12 */
118const char FLT_CHARS[] = "rRsSfFdDxXpP";
119
120static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
121
70d6ecf3
AM
122/* This function is called once, at assembler startup time. This
123 should set up all the tables, etc. that the MD part of the assembler
124 needs. */
252b5132
RH
125void
126md_begin ()
127{
128 struct h8_opcode *opcode;
129 char prev_buffer[100];
130 int idx = 0;
131
83e20b45
JL
132#ifdef BFD_ASSEMBLER
133 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
134 as_warn (_("could not set architecture and machine"));
135#endif
136
252b5132
RH
137 opcode_hash_control = hash_new ();
138 prev_buffer[0] = 0;
139
140 for (opcode = h8_opcodes; opcode->name; opcode++)
141 {
142 /* Strip off any . part when inserting the opcode and only enter
70d6ecf3 143 unique codes into the hash table. */
252b5132
RH
144 char *src = opcode->name;
145 unsigned int len = strlen (src);
146 char *dst = malloc (len + 1);
147 char *buffer = dst;
148
149 opcode->size = 0;
150 while (*src)
151 {
152 if (*src == '.')
153 {
154 src++;
155 opcode->size = *src;
156 break;
157 }
158 *dst++ = *src++;
159 }
160 *dst++ = 0;
161 if (strcmp (buffer, prev_buffer))
162 {
163 hash_insert (opcode_hash_control, buffer, (char *) opcode);
164 strcpy (prev_buffer, buffer);
165 idx++;
166 }
167 opcode->idx = idx;
168
70d6ecf3 169 /* Find the number of operands. */
252b5132
RH
170 opcode->noperands = 0;
171 while (opcode->args.nib[opcode->noperands] != E)
172 opcode->noperands++;
70d6ecf3
AM
173
174 /* Find the length of the opcode in bytes. */
252b5132
RH
175 opcode->length = 0;
176 while (opcode->data.nib[opcode->length * 2] != E)
177 opcode->length++;
178 }
179
180 linkrelax = 1;
181}
182
252b5132
RH
183struct h8_exp
184{
185 char *e_beg;
186 char *e_end;
187 expressionS e_exp;
188};
70d6ecf3 189
252b5132
RH
190int dispreg;
191int opsize; /* Set when a register size is seen */
192
252b5132
RH
193struct h8_op
194{
195 op_type mode;
196 unsigned reg;
197 expressionS exp;
198};
199
200/*
201 parse operands
202 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
203 r0l,r0h,..r7l,r7h
204 @WREG
205 @WREG+
206 @-WREG
207 #const
208 ccr
209*/
210
bc0d738a
NC
211/* Try to parse a reg name. Return the number of chars consumed. */
212
40f09f82 213static int
252b5132
RH
214parse_reg (src, mode, reg, direction)
215 char *src;
216 op_type *mode;
217 unsigned int *reg;
218 int direction;
219
220{
221 char *end;
222 int len;
223
70d6ecf3 224 /* Cribbed from get_symbol_end. */
252b5132
RH
225 if (!is_name_beginner (*src) || *src == '\001')
226 return 0;
70d6ecf3 227 end = src + 1;
252b5132
RH
228 while (is_part_of_name (*end) || *end == '\001')
229 end++;
230 len = end - src;
231
232 if (len == 2 && src[0] == 's' && src[1] == 'p')
233 {
234 *mode = PSIZE | REG | direction;
235 *reg = 7;
236 return len;
237 }
238 if (len == 3 && src[0] == 'c' && src[1] == 'c' && src[2] == 'r')
239 {
240 *mode = CCR;
241 *reg = 0;
242 return len;
243 }
244 if (len == 3 && src[0] == 'e' && src[1] == 'x' && src[2] == 'r')
245 {
246 *mode = EXR;
247 *reg = 0;
248 return len;
249 }
250 if (len == 2 && src[0] == 'f' && src[1] == 'p')
251 {
252 *mode = PSIZE | REG | direction;
253 *reg = 6;
254 return len;
255 }
256 if (len == 3 && src[0] == 'e' && src[1] == 'r'
257 && src[2] >= '0' && src[2] <= '7')
258 {
259 *mode = L_32 | REG | direction;
260 *reg = src[2] - '0';
261 if (!Hmode)
262 as_warn (_("Reg not valid for H8/300"));
263 return len;
264 }
265 if (len == 2 && src[0] == 'e' && src[1] >= '0' && src[1] <= '7')
266 {
267 *mode = L_16 | REG | direction;
268 *reg = src[1] - '0' + 8;
269 if (!Hmode)
270 as_warn (_("Reg not valid for H8/300"));
271 return len;
272 }
273
274 if (src[0] == 'r')
275 {
276 if (src[1] >= '0' && src[1] <= '7')
277 {
278 if (len == 3 && src[2] == 'l')
279 {
280 *mode = L_8 | REG | direction;
281 *reg = (src[1] - '0') + 8;
282 return len;
283 }
284 if (len == 3 && src[2] == 'h')
285 {
286 *mode = L_8 | REG | direction;
287 *reg = (src[1] - '0');
288 return len;
289 }
290 if (len == 2)
291 {
292 *mode = L_16 | REG | direction;
293 *reg = (src[1] - '0');
294 return len;
295 }
296 }
297 }
298
299 return 0;
300}
301
40f09f82 302static char *
252b5132
RH
303parse_exp (s, op)
304 char *s;
70d6ecf3 305 expressionS *op;
252b5132
RH
306{
307 char *save = input_line_pointer;
308 char *new;
309
310 input_line_pointer = s;
311 expression (op);
312 if (op->X_op == O_absent)
313 as_bad (_("missing operand"));
314 new = input_line_pointer;
315 input_line_pointer = save;
316 return new;
317}
318
319static char *
320skip_colonthing (ptr, exp, mode)
321 char *ptr;
dbbc7809 322 expressionS *exp ATTRIBUTE_UNUSED;
252b5132
RH
323 int *mode;
324{
325 if (*ptr == ':')
326 {
327 ptr++;
328 *mode &= ~SIZE;
329 if (*ptr == '8')
330 {
331 ptr++;
332 /* ff fill any 8 bit quantity */
70d6ecf3 333 /* exp->X_add_number -= 0x100; */
252b5132
RH
334 *mode |= L_8;
335 }
336 else
337 {
338 if (*ptr == '2')
339 {
340 *mode |= L_24;
341 }
342 else if (*ptr == '3')
343 {
344 *mode |= L_32;
345 }
346 else if (*ptr == '1')
347 {
348 *mode |= L_16;
349 }
350 while (isdigit (*ptr))
351 ptr++;
352 }
353 }
354 return ptr;
355}
356
357/* The many forms of operand:
358
359 Rn Register direct
360 @Rn Register indirect
361 @(exp[:16], Rn) Register indirect with displacement
362 @Rn+
363 @-Rn
70d6ecf3
AM
364 @aa:8 absolute 8 bit
365 @aa:16 absolute 16 bit
252b5132
RH
366 @aa absolute 16 bit
367
368 #xx[:size] immediate data
70d6ecf3 369 @(exp:[8], pc) pc rel
252b5132
RH
370 @@aa[:8] memory indirect
371
372 */
373
374char *
375colonmod24 (op, src)
376 struct h8_op *op;
377 char *src;
378
379{
380 int mode = 0;
381 src = skip_colonthing (src, &op->exp, &mode);
382
383 if (!mode)
384 {
70d6ecf3 385 /* Choose a default mode. */
252b5132
RH
386 if (op->exp.X_add_number < -32768
387 || op->exp.X_add_number > 32767)
388 {
389 if (Hmode)
390 mode = L_24;
391 else
392 mode = L_16;
393 }
394 else if (op->exp.X_add_symbol
395 || op->exp.X_op_symbol)
396 mode = DSYMMODE;
397 else
398 mode = DMODE;
399 }
400 op->mode |= mode;
401 return src;
402
403}
404
252b5132
RH
405static void
406get_operand (ptr, op, dst, direction)
407 char **ptr;
408 struct h8_op *op;
dbbc7809 409 unsigned int dst ATTRIBUTE_UNUSED;
252b5132
RH
410 int direction;
411{
412 char *src = *ptr;
413 op_type mode;
414 unsigned int num;
415 unsigned int len;
416
417 op->mode = E;
418
419 /* Gross. Gross. ldm and stm have a format not easily handled
420 by get_operand. We deal with it explicitly here. */
70d6ecf3
AM
421 if (src[0] == 'e' && src[1] == 'r' && isdigit (src[2])
422 && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && isdigit (src[6]))
252b5132
RH
423 {
424 int low, high;
425
426 low = src[2] - '0';
427 high = src[6] - '0';
428
429 if (high < low)
430 as_bad (_("Invalid register list for ldm/stm\n"));
431
432 if (low % 2)
433 as_bad (_("Invalid register list for ldm/stm\n"));
434
435 if (high - low > 3)
436 as_bad (_("Invalid register list for ldm/stm\n"));
437
438 if (high - low != 1
439 && low % 4)
440 as_bad (_("Invalid register list for ldm/stm\n"));
441
442 /* Even sicker. We encode two registers into op->reg. One
443 for the low register to save, the other for the high
444 register to save; we also set the high bit in op->reg
445 so we know this is "very special". */
446 op->reg = 0x80000000 | (high << 8) | low;
447 op->mode = REG;
448 *ptr = src + 7;
449 return;
450 }
451
452 len = parse_reg (src, &op->mode, &op->reg, direction);
453 if (len)
454 {
455 *ptr = src + len;
456 return;
457 }
458
459 if (*src == '@')
460 {
461 src++;
462 if (*src == '@')
463 {
464 src++;
465 src = parse_exp (src, &op->exp);
466
467 src = skip_colonthing (src, &op->exp, &op->mode);
468
469 *ptr = src;
470
471 op->mode = MEMIND;
472 return;
252b5132
RH
473 }
474
252b5132
RH
475 if (*src == '-')
476 {
477 src++;
478 len = parse_reg (src, &mode, &num, direction);
479 if (len == 0)
480 {
70d6ecf3 481 /* Oops, not a reg after all, must be ordinary exp. */
252b5132 482 src--;
70d6ecf3 483 /* Must be a symbol. */
252b5132
RH
484 op->mode = ABS | PSIZE | direction;
485 *ptr = skip_colonthing (parse_exp (src, &op->exp),
486 &op->exp, &op->mode);
487
488 return;
252b5132
RH
489 }
490
252b5132
RH
491 if ((mode & SIZE) != PSIZE)
492 as_bad (_("Wrong size pointer register for architecture."));
493 op->mode = RDDEC;
494 op->reg = num;
495 *ptr = src + len;
496 return;
497 }
498 if (*src == '(')
499 {
70d6ecf3 500 /* Disp. */
252b5132
RH
501 src++;
502
70d6ecf3 503 /* Start off assuming a 16 bit offset. */
252b5132
RH
504
505 src = parse_exp (src, &op->exp);
506
507 src = colonmod24 (op, src);
508
509 if (*src == ')')
510 {
511 src++;
512 op->mode |= ABS | direction;
513 *ptr = src;
514 return;
515 }
516
517 if (*src != ',')
518 {
519 as_bad (_("expected @(exp, reg16)"));
520 return;
521
522 }
523 src++;
524
525 len = parse_reg (src, &mode, &op->reg, direction);
526 if (len == 0 || !(mode & REG))
527 {
528 as_bad (_("expected @(exp, reg16)"));
529 return;
530 }
531 op->mode |= DISP | direction;
532 dispreg = op->reg;
533 src += len;
534 src = skip_colonthing (src, &op->exp, &op->mode);
535
536 if (*src != ')' && '(')
537 {
538 as_bad (_("expected @(exp, reg16)"));
539 return;
540 }
541 *ptr = src + 1;
542
543 return;
544 }
545 len = parse_reg (src, &mode, &num, direction);
546
547 if (len)
548 {
549 src += len;
550 if (*src == '+')
551 {
552 src++;
553 if ((mode & SIZE) != PSIZE)
554 as_bad (_("Wrong size pointer register for architecture."));
555 op->mode = RSINC;
556 op->reg = num;
557 *ptr = src;
558 return;
559 }
560 if ((mode & SIZE) != PSIZE)
561 as_bad (_("Wrong size pointer register for architecture."));
562
563 op->mode = direction | IND | PSIZE;
564 op->reg = num;
565 *ptr = src;
566
567 return;
568 }
569 else
570 {
571 /* must be a symbol */
572
573 op->mode = ABS | direction;
574 src = parse_exp (src, &op->exp);
575
576 *ptr = colonmod24 (op, src);
577
578 return;
579 }
580 }
581
252b5132
RH
582 if (*src == '#')
583 {
584 src++;
585 op->mode = IMM;
586 src = parse_exp (src, &op->exp);
587 *ptr = skip_colonthing (src, &op->exp, &op->mode);
588
589 return;
590 }
591 else if (strncmp (src, "mach", 4) == 0
592 || strncmp (src, "macl", 4) == 0)
593 {
594 op->reg = src[3] == 'l';
595 op->mode = MACREG;
596 *ptr = src + 4;
597 return;
598 }
599 else
600 {
601 src = parse_exp (src, &op->exp);
602 /* Trailing ':' size ? */
603 if (*src == ':')
604 {
605 if (src[1] == '1' && src[2] == '6')
606 {
607 op->mode = PCREL | L_16;
608 src += 3;
609 }
610 else if (src[1] == '8')
611 {
612 op->mode = PCREL | L_8;
613 src += 2;
614 }
615 else
616 {
617 as_bad (_("expect :8 or :16 here"));
618 }
619 }
620 else
621 {
622 op->mode = PCREL | bsize;
623 }
624 *ptr = src;
625 }
626}
627
70d6ecf3 628static char *
252b5132
RH
629get_operands (noperands, op_end, operand)
630 unsigned int noperands;
631 char *op_end;
632 struct h8_op *operand;
633{
634 char *ptr = op_end;
635
636 switch (noperands)
637 {
638 case 0:
639 operand[0].mode = 0;
640 operand[1].mode = 0;
641 break;
642
643 case 1:
644 ptr++;
645 get_operand (&ptr, operand + 0, 0, SRC);
646 if (*ptr == ',')
647 {
648 ptr++;
649 get_operand (&ptr, operand + 1, 1, DST);
650 }
651 else
652 {
653 operand[1].mode = 0;
654 }
252b5132 655 break;
70d6ecf3 656
252b5132
RH
657 case 2:
658 ptr++;
659 get_operand (&ptr, operand + 0, 0, SRC);
660 if (*ptr == ',')
661 ptr++;
662 get_operand (&ptr, operand + 1, 1, DST);
663 break;
664
665 default:
666 abort ();
667 }
668
252b5132
RH
669 return ptr;
670}
671
672/* Passed a pointer to a list of opcodes which use different
673 addressing modes, return the opcode which matches the opcodes
70d6ecf3
AM
674 provided. */
675static struct h8_opcode *
252b5132
RH
676get_specific (opcode, operands, size)
677 struct h8_opcode *opcode;
678 struct h8_op *operands;
679 int size;
680{
681 struct h8_opcode *this_try = opcode;
682 int found = 0;
683
684 unsigned int this_index = opcode->idx;
685
686 /* There's only one ldm/stm and it's easier to just
687 get out quick for them. */
688 if (strcmp (opcode->name, "stm.l") == 0
689 || strcmp (opcode->name, "ldm.l") == 0)
690 return this_try;
691
692 while (this_index == opcode->idx && !found)
693 {
694 found = 1;
695
696 this_try = opcode++;
697 if (this_try->noperands == 0)
698 {
699 int this_size;
700
701 this_size = this_try->how & SN;
702 if (this_size != size && (this_size != SB || size != SN))
703 found = 0;
704 }
705 else
706 {
707 unsigned int i;
708
709 for (i = 0; i < this_try->noperands && found; i++)
710 {
711 op_type op = this_try->args.nib[i];
712 int x = operands[i].mode;
713
714 if ((op & (DISP | REG)) == (DISP | REG)
715 && ((x & (DISP | REG)) == (DISP | REG)))
716 {
717 dispreg = operands[i].reg;
718 }
719 else if (op & REG)
720 {
721 if (!(x & REG))
722 found = 0;
723
724 if (x & L_P)
725 x = (x & ~L_P) | (Hmode ? L_32 : L_16);
726 if (op & L_P)
727 op = (op & ~L_P) | (Hmode ? L_32 : L_16);
728
729 opsize = op & SIZE;
730
70d6ecf3 731 /* The size of the reg is v important. */
252b5132
RH
732 if ((op & SIZE) != (x & SIZE))
733 found = 0;
734 }
735 else if ((op & ABSJMP) && (x & ABS))
736 {
737 operands[i].mode &= ~ABS;
738 operands[i].mode |= ABSJMP;
70d6ecf3 739 /* But it may not be 24 bits long. */
252b5132
RH
740 if (!Hmode)
741 {
742 operands[i].mode &= ~SIZE;
743 operands[i].mode |= L_16;
744 }
745 }
746 else if ((op & (KBIT | DBIT)) && (x & IMM))
747 {
70d6ecf3 748 /* This is ok if the immediate value is sensible. */
252b5132
RH
749 }
750 else if (op & PCREL)
751 {
70d6ecf3 752 /* The size of the displacement is important. */
252b5132
RH
753 if ((op & SIZE) != (x & SIZE))
754 found = 0;
755 }
756 else if ((op & (DISP | IMM | ABS))
757 && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
758 {
759 /* Promote a L_24 to L_32 if it makes us match. */
760 if ((x & L_24) && (op & L_32))
761 {
762 x &= ~L_24;
763 x |= L_32;
764 }
765 /* Promote an L8 to L_16 if it makes us match. */
70d6ecf3 766 if (op & ABS && op & L_8 && op & DISP)
252b5132
RH
767 {
768 if (x & L_16)
70d6ecf3 769 found = 1;
252b5132
RH
770 }
771 else if ((x & SIZE) != 0
772 && ((op & SIZE) != (x & SIZE)))
773 found = 0;
774 }
775 else if ((op & MACREG) != (x & MACREG))
776 {
777 found = 0;
778 }
779 else if ((op & MODE) != (x & MODE))
780 {
781 found = 0;
70d6ecf3 782 }
252b5132
RH
783 }
784 }
785 }
786 if (found)
787 return this_try;
788 else
789 return 0;
790}
791
792static void
793check_operand (operand, width, string)
794 struct h8_op *operand;
795 unsigned int width;
796 char *string;
797{
798 if (operand->exp.X_add_symbol == 0
799 && operand->exp.X_op_symbol == 0)
800 {
70d6ecf3
AM
801 /* No symbol involved, let's look at offset, it's dangerous if
802 any of the high bits are not 0 or ff's, find out by oring or
803 anding with the width and seeing if the answer is 0 or all
804 fs. */
252b5132 805
252b5132
RH
806 if ((operand->exp.X_add_number & ~width) != 0 &&
807 (operand->exp.X_add_number | width) != (~0))
808 {
70d6ecf3 809 if (width == 255
252b5132
RH
810 && (operand->exp.X_add_number & 0xff00) == 0xff00)
811 {
812 /* Just ignore this one - which happens when trying to
813 fit a 16 bit address truncated into an 8 bit address
814 of something like bset. */
815 }
70d6ecf3 816 else
252b5132
RH
817 {
818 as_warn (_("operand %s0x%lx out of range."), string,
819 (unsigned long) operand->exp.X_add_number);
820 }
821 }
822 }
252b5132
RH
823}
824
825/* RELAXMODE has one of 3 values:
826
827 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
828
829 1 Output a relaxable 24bit absolute mov.w address relocation
830 (may relax into a 16bit absolute address).
831
832 2 Output a relaxable 16/24 absolute mov.b address relocation
833 (may relax into an 8bit absolute address). */
834
835static void
836do_a_fix_imm (offset, operand, relaxmode)
837 int offset;
838 struct h8_op *operand;
839 int relaxmode;
840{
841 int idx;
842 int size;
843 int where;
844
252b5132
RH
845 char *t = operand->mode & IMM ? "#" : "@";
846
847 if (operand->exp.X_add_symbol == 0)
848 {
849 char *bytes = frag_now->fr_literal + offset;
850 switch (operand->mode & SIZE)
851 {
852 case L_2:
853 check_operand (operand, 0x3, t);
854 bytes[0] |= (operand->exp.X_add_number) << 4;
855 break;
856 case L_3:
857 check_operand (operand, 0x7, t);
858 bytes[0] |= (operand->exp.X_add_number) << 4;
859 break;
860 case L_8:
861 check_operand (operand, 0xff, t);
862 bytes[0] = operand->exp.X_add_number;
863 break;
864 case L_16:
865 check_operand (operand, 0xffff, t);
866 bytes[0] = operand->exp.X_add_number >> 8;
867 bytes[1] = operand->exp.X_add_number >> 0;
868 break;
869 case L_24:
870 check_operand (operand, 0xffffff, t);
871 bytes[0] = operand->exp.X_add_number >> 16;
872 bytes[1] = operand->exp.X_add_number >> 8;
873 bytes[2] = operand->exp.X_add_number >> 0;
874 break;
875
876 case L_32:
70d6ecf3 877 /* This should be done with bfd. */
252b5132
RH
878 bytes[0] = operand->exp.X_add_number >> 24;
879 bytes[1] = operand->exp.X_add_number >> 16;
880 bytes[2] = operand->exp.X_add_number >> 8;
881 bytes[3] = operand->exp.X_add_number >> 0;
4132022d
AM
882 if (relaxmode != 0)
883 {
884 idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
885 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
886 }
252b5132
RH
887 break;
888 }
252b5132
RH
889 }
890 else
891 {
892 switch (operand->mode & SIZE)
893 {
252b5132
RH
894 case L_24:
895 case L_32:
896 size = 4;
897 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
898 if (relaxmode == 2)
899 idx = R_MOV24B1;
900 else if (relaxmode == 1)
901 idx = R_MOVL1;
902 else
903 idx = R_RELLONG;
904 break;
905 default:
70d6ecf3 906 as_bad (_("Can't work out size of operand.\n"));
252b5132
RH
907 case L_16:
908 size = 2;
909 where = 0;
910 if (relaxmode == 2)
911 idx = R_MOV16B1;
912 else
913 idx = R_RELWORD;
4132022d
AM
914 operand->exp.X_add_number =
915 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
252b5132
RH
916 break;
917 case L_8:
918 size = 1;
919 where = 0;
920 idx = R_RELBYTE;
4132022d
AM
921 operand->exp.X_add_number =
922 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
252b5132
RH
923 }
924
925 fix_new_exp (frag_now,
926 offset + where,
927 size,
928 &operand->exp,
929 0,
930 idx);
931 }
252b5132
RH
932}
933
70d6ecf3 934/* Now we know what sort of opcodes it is, let's build the bytes. */
252b5132
RH
935static void
936build_bytes (this_try, operand)
937 struct h8_opcode *this_try;
938 struct h8_op *operand;
939{
940 unsigned int i;
941
942 char *output = frag_more (this_try->length);
943 op_type *nibble_ptr = this_try->data.nib;
944 op_type c;
945 unsigned int nibble_count = 0;
946 int absat;
947 int immat;
948 int nib;
949 int movb = 0;
950 char asnibbles[30];
951 char *p = asnibbles;
952
953 if (!(this_try->inbase || Hmode))
954 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
955 this_try->name);
956
957 while (*nibble_ptr != E)
958 {
959 int d;
960 c = *nibble_ptr++;
961
962 d = (c & (DST | SRC_IN_DST)) != 0;
963
964 if (c < 16)
965 {
966 nib = c;
967 }
968 else
969 {
252b5132
RH
970 if (c & (REG | IND | INC | DEC))
971 {
972 nib = operand[d].reg;
973 }
974 else if ((c & DISPREG) == (DISPREG))
975 {
976 nib = dispreg;
977 }
70d6ecf3 978 else if (c & ABS)
252b5132
RH
979 {
980 operand[d].mode = c;
981 absat = nibble_count / 2;
982 nib = 0;
983 }
984 else if (c & (IMM | PCREL | ABS | ABSJMP | DISP))
985 {
986 operand[d].mode = c;
987 immat = nibble_count / 2;
988 nib = 0;
989 }
990 else if (c & IGNORE)
991 {
992 nib = 0;
993 }
994 else if (c & DBIT)
995 {
996 switch (operand[0].exp.X_add_number)
997 {
998 case 1:
999 nib = c;
1000 break;
1001 case 2:
1002 nib = 0x8 | c;
1003 break;
1004 default:
1005 as_bad (_("Need #1 or #2 here"));
1006 }
1007 }
1008 else if (c & KBIT)
1009 {
1010 switch (operand[0].exp.X_add_number)
1011 {
1012 case 1:
1013 nib = 0;
1014 break;
1015 case 2:
1016 nib = 8;
1017 break;
1018 case 4:
1019 if (!Hmode)
1020 as_warn (_("#4 not valid on H8/300."));
1021 nib = 9;
1022 break;
1023
1024 default:
1025 as_bad (_("Need #1 or #2 here"));
1026 break;
1027 }
70d6ecf3 1028 /* Stop it making a fix. */
252b5132
RH
1029 operand[0].mode = 0;
1030 }
1031
1032 if (c & MEMRELAX)
1033 {
1034 operand[d].mode |= MEMRELAX;
1035 }
1036
1037 if (c & B31)
1038 {
1039 nib |= 0x8;
1040 }
1041
1042 if (c & MACREG)
1043 {
f0c56b90
NC
1044 if (operand[0].mode == MACREG)
1045 /* stmac has mac[hl] as the first operand. */
1046 nib = 2 + operand[0].reg;
1047 else
1048 /* ldmac has mac[hl] as the second operand. */
1049 nib = 2 + operand[1].reg;
252b5132
RH
1050 }
1051 }
1052 nibble_count++;
1053
1054 *p++ = nib;
1055 }
1056
1057 /* Disgusting. Why, oh why didn't someone ask us for advice
1058 on the assembler format. */
1059 if (strcmp (this_try->name, "stm.l") == 0
1060 || strcmp (this_try->name, "ldm.l") == 0)
1061 {
1062 int high, low;
1063 high = (operand[this_try->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf;
1064 low = operand[this_try->name[0] == 'l' ? 1 : 0].reg & 0xf;
1065
1066 asnibbles[2] = high - low;
1067 asnibbles[7] = (this_try->name[0] == 'l') ? high : low;
1068 }
1069
1070 for (i = 0; i < this_try->length; i++)
1071 {
1072 output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
1073 }
1074
1075 /* Note if this is a movb instruction -- there's a special relaxation
1076 which only applies to them. */
1077 if (strcmp (this_try->name, "mov.b") == 0)
1078 movb = 1;
1079
70d6ecf3 1080 /* Output any fixes. */
252b5132
RH
1081 for (i = 0; i < 2; i++)
1082 {
1083 int x = operand[i].mode;
1084
1085 if (x & (IMM | DISP))
1086 {
1087 do_a_fix_imm (output - frag_now->fr_literal + immat,
1088 operand + i, x & MEMRELAX != 0);
1089 }
1090 else if (x & ABS)
1091 {
1092 do_a_fix_imm (output - frag_now->fr_literal + absat,
1093 operand + i, x & MEMRELAX ? movb + 1 : 0);
1094 }
1095 else if (x & PCREL)
1096 {
1097 int size16 = x & L_16;
1098 int where = size16 ? 2 : 1;
1099 int size = size16 ? 2 : 1;
1100 int type = size16 ? R_PCRWORD : R_PCRBYTE;
36ed2fff 1101 fixS *fixP;
252b5132
RH
1102
1103 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1104
1105 if (operand[i].exp.X_add_number & 1)
1106 {
1107 as_warn (_("branch operand has odd offset (%lx)\n"),
1108 (unsigned long) operand->exp.X_add_number);
1109 }
1110
36ed2fff
JL
1111#ifndef OBJ_ELF
1112 /* The COFF port has always been off by one, changing it
1113 now would be an incompatible change, so we leave it as-is.
1114
1115 We don't want to do this for ELF as we want to be
1116 compatible with the proposed ELF format from Hitachi. */
252b5132 1117 operand[i].exp.X_add_number -= 1;
36ed2fff
JL
1118#endif
1119
4132022d
AM
1120 operand[i].exp.X_add_number =
1121 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
252b5132 1122
36ed2fff
JL
1123 fixP = fix_new_exp (frag_now,
1124 output - frag_now->fr_literal + where,
1125 size,
1126 &operand[i].exp,
1127 1,
1128 type);
1129 fixP->fx_signed = 1;
252b5132
RH
1130 }
1131 else if (x & MEMIND)
1132 {
252b5132
RH
1133 check_operand (operand + i, 0xff, "@@");
1134 fix_new_exp (frag_now,
1135 output - frag_now->fr_literal + 1,
1136 1,
1137 &operand[i].exp,
1138 0,
1139 R_MEM_INDIRECT);
1140 }
1141 else if (x & ABSJMP)
1142 {
70d6ecf3 1143 /* This jmp may be a jump or a branch. */
252b5132
RH
1144
1145 check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@");
1146 if (operand[i].exp.X_add_number & 1)
1147 {
1148 as_warn (_("branch operand has odd offset (%lx)\n"),
1149 (unsigned long) operand->exp.X_add_number);
1150 }
1151 if (!Hmode)
70d6ecf3 1152 operand[i].exp.X_add_number =
4132022d 1153 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
252b5132
RH
1154 fix_new_exp (frag_now,
1155 output - frag_now->fr_literal,
1156 4,
1157 &operand[i].exp,
1158 0,
1159 R_JMPL1);
1160 }
1161 }
252b5132
RH
1162}
1163
70d6ecf3
AM
1164/* Try to give an intelligent error message for common and simple to
1165 detect errors. */
252b5132
RH
1166static void
1167clever_message (opcode, operand)
1168 struct h8_opcode *opcode;
1169 struct h8_op *operand;
1170{
70d6ecf3 1171 /* Find out if there was more than one possible opcode. */
252b5132
RH
1172
1173 if ((opcode + 1)->idx != opcode->idx)
1174 {
1175 unsigned int argn;
1176
70d6ecf3
AM
1177 /* Only one opcode of this flavour, try to guess which operand
1178 didn't match. */
252b5132
RH
1179 for (argn = 0; argn < opcode->noperands; argn++)
1180 {
1181 switch (opcode->args.nib[argn])
1182 {
1183 case RD16:
1184 if (operand[argn].mode != RD16)
1185 {
1186 as_bad (_("destination operand must be 16 bit register"));
1187 return;
1188
1189 }
1190 break;
1191
1192 case RS8:
252b5132
RH
1193 if (operand[argn].mode != RS8)
1194 {
1195 as_bad (_("source operand must be 8 bit register"));
1196 return;
1197 }
1198 break;
1199
1200 case ABS16DST:
1201 if (operand[argn].mode != ABS16DST)
1202 {
1203 as_bad (_("destination operand must be 16bit absolute address"));
1204 return;
1205 }
1206 break;
1207 case RD8:
1208 if (operand[argn].mode != RD8)
1209 {
1210 as_bad (_("destination operand must be 8 bit register"));
1211 return;
1212 }
1213 break;
1214
252b5132
RH
1215 case ABS16SRC:
1216 if (operand[argn].mode != ABS16SRC)
1217 {
1218 as_bad (_("source operand must be 16bit absolute address"));
1219 return;
1220 }
1221 break;
1222
1223 }
1224 }
1225 }
1226 as_bad (_("invalid operands"));
1227}
1228
70d6ecf3
AM
1229/* This is the guts of the machine-dependent assembler. STR points to
1230 a machine dependent instruction. This function is supposed to emit
1231 the frags/bytes it assembles. */
252b5132
RH
1232void
1233md_assemble (str)
1234 char *str;
1235{
1236 char *op_start;
1237 char *op_end;
1238 struct h8_op operand[2];
1239 struct h8_opcode *opcode;
1240 struct h8_opcode *prev_opcode;
1241
1242 char *dot = 0;
1243 char c;
1244 int size;
1245
70d6ecf3 1246 /* Drop leading whitespace. */
252b5132
RH
1247 while (*str == ' ')
1248 str++;
1249
70d6ecf3 1250 /* Find the op code end. */
252b5132
RH
1251 for (op_start = op_end = str;
1252 *op_end != 0 && *op_end != ' ';
1253 op_end++)
1254 {
1255 if (*op_end == '.')
1256 {
1257 dot = op_end + 1;
1258 *op_end = 0;
1259 op_end += 2;
1260 break;
1261 }
1262 }
1263
252b5132
RH
1264 if (op_end == op_start)
1265 {
1266 as_bad (_("can't find opcode "));
1267 }
1268 c = *op_end;
1269
1270 *op_end = 0;
1271
1272 opcode = (struct h8_opcode *) hash_find (opcode_hash_control,
1273 op_start);
1274
1275 if (opcode == NULL)
1276 {
1277 as_bad (_("unknown opcode"));
1278 return;
1279 }
1280
70d6ecf3 1281 /* We used to set input_line_pointer to the result of get_operands,
252b5132
RH
1282 but that is wrong. Our caller assumes we don't change it. */
1283
1284 (void) get_operands (opcode->noperands, op_end, operand);
1285 *op_end = c;
1286 prev_opcode = opcode;
1287
1288 size = SN;
1289 if (dot)
1290 {
1291 switch (*dot)
1292 {
1293 case 'b':
1294 size = SB;
1295 break;
1296
1297 case 'w':
1298 size = SW;
1299 break;
1300
1301 case 'l':
1302 size = SL;
1303 break;
1304 }
1305 }
1306 opcode = get_specific (opcode, operand, size);
1307
1308 if (opcode == 0)
1309 {
70d6ecf3 1310 /* Couldn't find an opcode which matched the operands. */
252b5132
RH
1311 char *where = frag_more (2);
1312
1313 where[0] = 0x0;
1314 where[1] = 0x0;
1315 clever_message (prev_opcode, operand);
1316
1317 return;
1318 }
1319 if (opcode->size && dot)
1320 {
1321 if (opcode->size != *dot)
1322 {
1323 as_warn (_("mismatch between opcode size and operand size"));
1324 }
1325 }
1326
1327 build_bytes (opcode, operand);
252b5132
RH
1328}
1329
5facebfc 1330#ifndef BFD_ASSEMBLER
252b5132
RH
1331void
1332tc_crawl_symbol_chain (headers)
70d6ecf3 1333 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
1334{
1335 printf (_("call to tc_crawl_symbol_chain \n"));
1336}
f333765f 1337#endif
252b5132
RH
1338
1339symbolS *
1340md_undefined_symbol (name)
dbbc7809 1341 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1342{
1343 return 0;
1344}
1345
5facebfc 1346#ifndef BFD_ASSEMBLER
252b5132
RH
1347void
1348tc_headers_hook (headers)
70d6ecf3 1349 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
1350{
1351 printf (_("call to tc_headers_hook \n"));
1352}
f333765f 1353#endif
252b5132
RH
1354
1355/* Various routines to kill one day */
1356/* Equal to MAX_PRECISION in atof-ieee.c */
1357#define MAX_LITTLENUMS 6
1358
70d6ecf3
AM
1359/* Turn a string in input_line_pointer into a floating point constant
1360 of type TYPE, and store the appropriate bytes in *LITP. The number
bc0d738a 1361 of LITTLENUMS emitted is stored in *SIZEP. An error message is
70d6ecf3 1362 returned, or NULL on OK. */
bc0d738a 1363
252b5132
RH
1364char *
1365md_atof (type, litP, sizeP)
1366 char type;
1367 char *litP;
1368 int *sizeP;
1369{
1370 int prec;
1371 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1372 LITTLENUM_TYPE *wordP;
1373 char *t;
1374 char *atof_ieee ();
1375
1376 switch (type)
1377 {
1378 case 'f':
1379 case 'F':
1380 case 's':
1381 case 'S':
1382 prec = 2;
1383 break;
1384
1385 case 'd':
1386 case 'D':
1387 case 'r':
1388 case 'R':
1389 prec = 4;
1390 break;
1391
1392 case 'x':
1393 case 'X':
1394 prec = 6;
1395 break;
1396
1397 case 'p':
1398 case 'P':
1399 prec = 6;
1400 break;
1401
1402 default:
1403 *sizeP = 0;
1404 return _("Bad call to MD_ATOF()");
1405 }
1406 t = atof_ieee (input_line_pointer, type, words);
1407 if (t)
1408 input_line_pointer = t;
1409
1410 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1411 for (wordP = words; prec--;)
1412 {
1413 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
1414 litP += sizeof (LITTLENUM_TYPE);
1415 }
1416 return 0;
1417}
1418\f
1419CONST char *md_shortopts = "";
1420struct option md_longopts[] = {
1421 {NULL, no_argument, NULL, 0}
1422};
70d6ecf3
AM
1423
1424size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1425
1426int
1427md_parse_option (c, arg)
dbbc7809
JL
1428 int c ATTRIBUTE_UNUSED;
1429 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
1430{
1431 return 0;
1432}
1433
1434void
1435md_show_usage (stream)
dbbc7809 1436 FILE *stream ATTRIBUTE_UNUSED;
252b5132
RH
1437{
1438}
1439\f
1440void
1441tc_aout_fix_to_chars ()
1442{
1443 printf (_("call to tc_aout_fix_to_chars \n"));
1444 abort ();
1445}
1446
1447void
1448md_convert_frag (headers, seg, fragP)
36ed2fff
JL
1449#ifdef BFD_ASSEMBLER
1450 bfd *headers ATTRIBUTE_UNUSED;
1451#else
dbbc7809 1452 object_headers *headers ATTRIBUTE_UNUSED;
36ed2fff 1453#endif
dbbc7809
JL
1454 segT seg ATTRIBUTE_UNUSED;
1455 fragS *fragP ATTRIBUTE_UNUSED;
252b5132
RH
1456{
1457 printf (_("call to md_convert_frag \n"));
1458 abort ();
1459}
1460
70d6ecf3 1461valueT
252b5132
RH
1462md_section_align (seg, size)
1463 segT seg;
1464 valueT size;
1465{
70d6ecf3
AM
1466 return ((size + (1 << section_alignment[(int) seg]) - 1)
1467 & (-1 << section_alignment[(int) seg]));
252b5132
RH
1468}
1469
1470void
1471md_apply_fix (fixP, val)
1472 fixS *fixP;
1473 long val;
1474{
1475 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1476
1477 switch (fixP->fx_size)
1478 {
1479 case 1:
1480 *buf++ = val;
1481 break;
1482 case 2:
1483 *buf++ = (val >> 8);
1484 *buf++ = val;
1485 break;
1486 case 4:
1487 *buf++ = (val >> 24);
1488 *buf++ = (val >> 16);
1489 *buf++ = (val >> 8);
1490 *buf++ = val;
1491 break;
1492 default:
1493 abort ();
1494 }
1495}
1496
1497int
1498md_estimate_size_before_relax (fragP, segment_type)
dbbc7809
JL
1499 register fragS *fragP ATTRIBUTE_UNUSED;
1500 register segT segment_type ATTRIBUTE_UNUSED;
252b5132
RH
1501{
1502 printf (_("call tomd_estimate_size_before_relax \n"));
1503 abort ();
1504}
1505
70d6ecf3 1506/* Put number into target byte order. */
252b5132
RH
1507void
1508md_number_to_chars (ptr, use, nbytes)
1509 char *ptr;
1510 valueT use;
1511 int nbytes;
1512{
1513 number_to_chars_bigendian (ptr, use, nbytes);
1514}
70d6ecf3 1515
252b5132
RH
1516long
1517md_pcrel_from (fixP)
dbbc7809 1518 fixS *fixP ATTRIBUTE_UNUSED;
252b5132
RH
1519{
1520 abort ();
1521}
1522
5facebfc 1523#ifndef BFD_ASSEMBLER
252b5132
RH
1524void
1525tc_reloc_mangle (fix_ptr, intr, base)
1526 fixS *fix_ptr;
1527 struct internal_reloc *intr;
1528 bfd_vma base;
1529
1530{
1531 symbolS *symbol_ptr;
1532
1533 symbol_ptr = fix_ptr->fx_addsy;
1534
1535 /* If this relocation is attached to a symbol then it's ok
70d6ecf3 1536 to output it. */
252b5132
RH
1537 if (fix_ptr->fx_r_type == TC_CONS_RELOC)
1538 {
1539 /* cons likes to create reloc32's whatever the size of the reloc..
1540 */
1541 switch (fix_ptr->fx_size)
1542 {
1543 case 4:
1544 intr->r_type = R_RELLONG;
1545 break;
1546 case 2:
1547 intr->r_type = R_RELWORD;
1548 break;
1549 case 1:
1550 intr->r_type = R_RELBYTE;
1551 break;
1552 default:
1553 abort ();
252b5132 1554 }
252b5132
RH
1555 }
1556 else
1557 {
1558 intr->r_type = fix_ptr->fx_r_type;
1559 }
1560
1561 intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base;
1562 intr->r_offset = fix_ptr->fx_offset;
1563
1564 if (symbol_ptr)
1565 {
1566 if (symbol_ptr->sy_number != -1)
1567 intr->r_symndx = symbol_ptr->sy_number;
1568 else
1569 {
1570 symbolS *segsym;
1571
1572 /* This case arises when a reference is made to `.'. */
1573 segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot;
1574 if (segsym == NULL)
1575 intr->r_symndx = -1;
1576 else
1577 {
1578 intr->r_symndx = segsym->sy_number;
1579 intr->r_offset += S_GET_VALUE (symbol_ptr);
1580 }
1581 }
1582 }
1583 else
1584 intr->r_symndx = -1;
252b5132 1585}
5facebfc 1586#else /* BFD_ASSEMBLER */
f333765f
JL
1587arelent *
1588tc_gen_reloc (section, fixp)
1589 asection *section ATTRIBUTE_UNUSED;
1590 fixS *fixp;
1591{
1592 arelent *rel;
1593 bfd_reloc_code_real_type r_type;
1594
1595 rel = (arelent *) xmalloc (sizeof (arelent));
1596 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1597 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1598 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
1599 rel->addend = fixp->fx_offset;
1600
1601 r_type = fixp->fx_r_type;
1602
1603#define DEBUG 0
1604#if DEBUG
1605 fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
1606 fflush(stderr);
1607#endif
1608 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1609 if (rel->howto == NULL)
1610 {
1611 as_bad_where (fixp->fx_file, fixp->fx_line,
1612 _("Cannot represent relocation type %s"),
1613 bfd_get_reloc_code_name (r_type));
1614 return NULL;
1615 }
1616
1617 return rel;
1618}
1619#endif
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