gas/
[deliverable/binutils-gdb.git] / gas / config / tc-i386.h
CommitLineData
252b5132 1/* tc-i386.h -- Header file for tc-i386.c
f7e42eb4 2 Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
4dc85607 3 2001, 2002, 2003, 2004, 2005, 2006, 2007
f7e42eb4 4 Free Software Foundation, Inc.
252b5132
RH
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
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RH
22
23#ifndef TC_I386
24#define TC_I386 1
25
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L
26#include "opcodes/i386-opc.h"
27
252b5132 28struct fix;
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RH
29
30#define TARGET_BYTES_BIG_ENDIAN 0
31
252b5132 32#define TARGET_ARCH bfd_arch_i386
b9d79e03 33#define TARGET_MACH (i386_mach ())
b7c92712 34extern unsigned long i386_mach (void);
252b5132 35
cac5b87b
DB
36#ifdef TE_FreeBSD
37#define AOUT_TARGET_FORMAT "a.out-i386-freebsd"
38#endif
252b5132 39#ifdef TE_NetBSD
4c63da97 40#define AOUT_TARGET_FORMAT "a.out-i386-netbsd"
252b5132
RH
41#endif
42#ifdef TE_386BSD
4c63da97 43#define AOUT_TARGET_FORMAT "a.out-i386-bsd"
252b5132
RH
44#endif
45#ifdef TE_LINUX
4c63da97 46#define AOUT_TARGET_FORMAT "a.out-i386-linux"
252b5132
RH
47#endif
48#ifdef TE_Mach
4c63da97 49#define AOUT_TARGET_FORMAT "a.out-mach3"
252b5132
RH
50#endif
51#ifdef TE_DYNIX
4c63da97 52#define AOUT_TARGET_FORMAT "a.out-i386-dynix"
252b5132 53#endif
4c63da97
AM
54#ifndef AOUT_TARGET_FORMAT
55#define AOUT_TARGET_FORMAT "a.out-i386"
252b5132 56#endif
252b5132 57
4ada7262
DB
58#ifdef TE_FreeBSD
59#define ELF_TARGET_FORMAT "elf32-i386-freebsd"
9d7cbccd 60#define ELF_TARGET_FORMAT64 "elf64-x86-64-freebsd"
eac338cf
PB
61#elif defined (TE_VXWORKS)
62#define ELF_TARGET_FORMAT "elf32-i386-vxworks"
4ada7262 63#endif
eac338cf 64
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DB
65#ifndef ELF_TARGET_FORMAT
66#define ELF_TARGET_FORMAT "elf32-i386"
67#endif
68
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69#ifndef ELF_TARGET_FORMAT64
70#define ELF_TARGET_FORMAT64 "elf64-x86-64"
71#endif
72
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JH
73#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
74 || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF))
e3bb37b5 75extern const char *i386_target_format (void);
4c63da97
AM
76#define TARGET_FORMAT i386_target_format ()
77#else
252b5132 78#ifdef OBJ_ELF
4ada7262 79#define TARGET_FORMAT ELF_TARGET_FORMAT
252b5132 80#endif
4c63da97
AM
81#ifdef OBJ_AOUT
82#define TARGET_FORMAT AOUT_TARGET_FORMAT
252b5132
RH
83#endif
84#endif
85
a847613f
AM
86#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF))
87#define md_end i386_elf_emit_arch_note
e3bb37b5 88extern void i386_elf_emit_arch_note (void);
a847613f
AM
89#endif
90
18e1d487
AM
91#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
92
6088b00e 93#define LOCAL_LABELS_FB 1
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RH
94
95extern const char extra_symbol_chars[];
96#define tc_symbol_chars extra_symbol_chars
97
b3b91714
AM
98extern const char *i386_comment_chars;
99#define tc_comment_chars i386_comment_chars
100
252b5132
RH
101/* Prefixes will be emitted in the order defined below.
102 WAIT_PREFIX must be the first prefix since FWAIT is really is an
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L
103 instruction, and so must come before any prefixes.
104 The preferred prefix order is SEG_PREFIX, ADDR_PREFIX, DATA_PREFIX,
105 LOCKREP_PREFIX. */
252b5132 106#define WAIT_PREFIX 0
9021ec07 107#define SEG_PREFIX 1
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RH
108#define ADDR_PREFIX 2
109#define DATA_PREFIX 3
9021ec07 110#define LOCKREP_PREFIX 4
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JH
111#define REX_PREFIX 5 /* must come last. */
112#define MAX_PREFIXES 6 /* max prefixes per opcode */
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RH
113
114/* we define the syntax here (modulo base,index,scale syntax) */
115#define REGISTER_PREFIX '%'
116#define IMMEDIATE_PREFIX '$'
117#define ABSOLUTE_PREFIX '*'
118
252b5132 119/* these are the instruction mnemonic suffixes. */
252b5132
RH
120#define WORD_MNEM_SUFFIX 'w'
121#define BYTE_MNEM_SUFFIX 'b'
122#define SHORT_MNEM_SUFFIX 's'
123#define LONG_MNEM_SUFFIX 'l'
3e73aa7c 124#define QWORD_MNEM_SUFFIX 'q'
252b5132
RH
125/* Intel Syntax */
126#define LONG_DOUBLE_MNEM_SUFFIX 'x'
252b5132 127
252b5132
RH
128#define END_OF_INSN '\0'
129
252b5132
RH
130/*
131 'templates' is for grouping together 'template' structures for opcodes
132 of the same name. This is only used for storing the insns in the grand
133 ole hash table of insns.
134 The templates themselves start at START and range up to (but not including)
135 END.
136 */
252b5132 137typedef struct
e413e4e9 138{
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L
139 const template *start;
140 const template *end;
e413e4e9 141}
0b1cf022 142templates;
252b5132 143
4a4f25cf 144/* 386 operand encoding bytes: see 386 book for details of this. */
252b5132 145typedef struct
e413e4e9
AM
146{
147 unsigned int regmem; /* codes register or memory operand */
148 unsigned int reg; /* codes register operand (or extended opcode) */
149 unsigned int mode; /* how to interpret regmem & reg */
150}
252b5132
RH
151modrm_byte;
152
3e73aa7c 153/* x86-64 extension prefix. */
29b0f896 154typedef int rex_byte;
3e73aa7c 155
85f10a01
MM
156/* The SSE5 instructions have a two bit instruction modifier (OC) that
157 is stored in two separate bytes in the instruction. Pick apart OC
158 into the 2 separate bits for instruction. */
159#define DREX_OC0(x) (((x) & 1) != 0)
160#define DREX_OC1(x) (((x) & 2) != 0)
161
162#define DREX_OC0_MASK (1 << 3) /* set OC0 in byte 4 */
163#define DREX_OC1_MASK (1 << 2) /* set OC1 in byte 3 */
164
165/* OC mappings */
166#define DREX_XMEM_X1_X2_X2 0 /* 4 op insn, dest = src3, src1 = reg/mem */
167#define DREX_X1_XMEM_X2_X2 1 /* 4 op insn, dest = src3, src2 = reg/mem */
168#define DREX_X1_XMEM_X2_X1 2 /* 4 op insn, dest = src1, src2 = reg/mem */
169#define DREX_X1_X2_XMEM_X1 3 /* 4 op insn, dest = src1, src3 = reg/mem */
170
171#define DREX_XMEM_X1_X2 0 /* 3 op insn, src1 = reg/mem */
172#define DREX_X1_XMEM_X2 1 /* 3 op insn, src1 = reg/mem */
173
174/* Information needed to create the DREX byte in SSE5 instructions. */
175typedef struct
176{
177 unsigned int reg; /* register */
178 unsigned int rex; /* REX flags */
179 unsigned int modrm_reg; /* which arg goes in the modrm.reg field */
180 unsigned int modrm_regmem; /* which arg goes in the modrm.regmem field */
181} drex_byte;
182
4a4f25cf 183/* 386 opcode byte to code indirect addressing. */
252b5132 184typedef struct
e413e4e9
AM
185{
186 unsigned base;
187 unsigned index;
188 unsigned scale;
189}
252b5132
RH
190sib_byte;
191
9103f4f4
L
192enum processor_type
193{
194 PROCESSOR_UNKNOWN,
76bc74dc 195 PROCESSOR_I386,
9103f4f4
L
196 PROCESSOR_I486,
197 PROCESSOR_PENTIUM,
198 PROCESSOR_PENTIUMPRO,
199 PROCESSOR_PENTIUM4,
200 PROCESSOR_NOCONA,
ef05d495
L
201 PROCESSOR_CORE,
202 PROCESSOR_CORE2,
9103f4f4
L
203 PROCESSOR_K6,
204 PROCESSOR_ATHLON,
205 PROCESSOR_K8,
206 PROCESSOR_GENERIC32,
050dfa73
MM
207 PROCESSOR_GENERIC64,
208 PROCESSOR_AMDFAM10
9103f4f4
L
209};
210
211/* x86 arch names, types and features */
e413e4e9
AM
212typedef struct
213{
9103f4f4
L
214 const char *name; /* arch name */
215 enum processor_type type; /* arch type */
40fb9820 216 i386_cpu_flags flags; /* cpu feature flags */
e413e4e9
AM
217}
218arch_entry;
219
252b5132 220/* The name of the global offset table generated by the compiler. Allow
4a4f25cf 221 this to be overridden if need be. */
252b5132
RH
222#ifndef GLOBAL_OFFSET_TABLE_NAME
223#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
224#endif
225
718ddfc0 226#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (LEX_AT)
6088b00e 227#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES)
e3bb37b5 228extern void x86_cons (expressionS *, int);
d182319b 229#endif
6088b00e
AM
230
231#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_cons_fix_new(FRAG, OFF, LEN, EXP)
232extern void x86_cons_fix_new
e3bb37b5 233 (fragS *, unsigned int, unsigned int, expressionS *);
6088b00e
AM
234
235#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
236
6088b00e
AM
237#define NO_RELOC BFD_RELOC_NONE
238
e3bb37b5 239void i386_validate_fix (struct fix *);
a161fe53 240#define TC_VALIDATE_FIX(FIX,SEGTYPE,SKIP) i386_validate_fix(FIX)
6088b00e
AM
241
242#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
e3bb37b5 243extern int tc_i386_fix_adjustable (struct fix *);
6088b00e 244
55cf6793 245/* Values passed to md_apply_fix don't include the symbol value. */
a161fe53 246#define MD_APPLY_SYM_VALUE(FIX) 0
3ca4bdc3
AM
247
248/* ELF wants external syms kept, as does PE COFF. */
ae6063d4
AM
249#if defined (TE_PE) && defined (STRICT_PE_FORMAT)
250#define EXTERN_FORCE_RELOC \
3ca4bdc3
AM
251 (OUTPUT_FLAVOR == bfd_target_elf_flavour \
252 || OUTPUT_FLAVOR == bfd_target_coff_flavour)
253#else
254#define EXTERN_FORCE_RELOC \
255 (OUTPUT_FLAVOR == bfd_target_elf_flavour)
252b5132
RH
256#endif
257
a161fe53
AM
258/* This expression evaluates to true if the relocation is for a local
259 object for which we still want to do the relocation at runtime.
260 False if we are willing to perform this relocation while building
261 the .o file. GOTOFF does not need to be checked here because it is
262 not pcrel. I am not sure if some of the others are ever used with
6088b00e
AM
263 pcrel, but it is easier to be safe than sorry. */
264
a161fe53
AM
265#define TC_FORCE_RELOCATION_LOCAL(FIX) \
266 (!(FIX)->fx_pcrel \
a161fe53
AM
267 || (FIX)->fx_r_type == BFD_RELOC_386_PLT32 \
268 || (FIX)->fx_r_type == BFD_RELOC_386_GOT32 \
269 || (FIX)->fx_r_type == BFD_RELOC_386_GOTPC \
270 || TC_FORCE_RELOCATION (FIX))
6088b00e 271
4d1bb795
JB
272extern int i386_parse_name (char *, expressionS *, char *);
273#define md_parse_name(s, e, m, c) i386_parse_name (s, e, c)
252b5132 274
5a918ce7
JB
275#define md_register_arithmetic 0
276
252b5132
RH
277extern const struct relax_type md_relax_table[];
278#define TC_GENERIC_RELAX_TABLE md_relax_table
279
12b55ccc
L
280extern int optimize_align_code;
281
252b5132 282#define md_do_align(n, fill, len, max, around) \
12b55ccc
L
283if ((n) \
284 && !need_pass_2 \
285 && optimize_align_code \
286 && (!(fill) \
287 || ((char)*(fill) == (char)0x90 && (len) == 1)) \
b9e57a38 288 && subseg_text_p (now_seg)) \
252b5132 289 { \
0a9ef439 290 frag_align_code ((n), (max)); \
252b5132
RH
291 goto around; \
292 }
293
76bc74dc 294#define MAX_MEM_FOR_RS_ALIGN_CODE 31
0a9ef439 295
e3bb37b5 296extern void i386_align_code (fragS *, int);
252b5132
RH
297
298#define HANDLE_ALIGN(fragP) \
299if (fragP->fr_type == rs_align_code) \
300 i386_align_code (fragP, (fragP->fr_next->fr_address \
301 - fragP->fr_address \
302 - fragP->fr_fix));
303
e3bb37b5 304void i386_print_statistics (FILE *);
252b5132
RH
305#define tc_print_statistics i386_print_statistics
306
307#define md_number_to_chars number_to_chars_littleendian
308
309#ifdef SCO_ELF
310#define tc_init_after_args() sco_id ()
e3bb37b5 311extern void sco_id (void);
252b5132
RH
312#endif
313
b1b7d09b
AM
314#define WORKING_DOT_WORD 1
315
54cfded0 316/* We want .cfi_* pseudo-ops for generating unwind info. */
a4447b93 317#define TARGET_USE_CFIPOP 1
54cfded0 318
a4447b93
RH
319extern unsigned int x86_dwarf2_return_column;
320#define DWARF2_DEFAULT_RETURN_COLUMN x86_dwarf2_return_column
321
322extern int x86_cie_data_alignment;
323#define DWARF2_CIE_DATA_ALIGNMENT x86_cie_data_alignment
54cfded0
AM
324
325#define tc_regname_to_dw2regnum tc_x86_regname_to_dw2regnum
e3bb37b5 326extern int tc_x86_regname_to_dw2regnum (char *);
54cfded0
AM
327
328#define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions
e3bb37b5 329extern void tc_x86_frame_initial_instructions (void);
54cfded0 330
d2b2c203 331#define md_elf_section_type(str,len) i386_elf_section_type (str, len)
e3bb37b5 332extern int i386_elf_section_type (const char *, size_t);
d2b2c203 333
3b22753a 334/* Support for SHF_X86_64_LARGE */
e3bb37b5
L
335extern int x86_64_section_word (char *, size_t);
336extern int x86_64_section_letter (int, char **);
3b22753a
L
337#define md_elf_section_letter(LETTER, PTR_MSG) x86_64_section_letter (LETTER, PTR_MSG)
338#define md_elf_section_word(STR, LEN) x86_64_section_word (STR, LEN)
339
bb41ade5
AM
340#ifdef TE_PE
341
342#define O_secrel O_md1
343
344#define TC_DWARF2_EMIT_OFFSET tc_pe_dwarf2_emit_offset
345void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
346
347#endif /* TE_PE */
348
6088b00e 349#endif /* TC_I386 */
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