Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
01e1a5bc | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
9699c833 | 3 | 2008, 2009, 2011, 2012, 2013 Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
800eeca4 JW |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
01e1a5bc NC |
53 | #include "bfdver.h" |
54 | #include <time.h> | |
800eeca4 | 55 | |
a66d2bb7 JB |
56 | #ifdef HAVE_LIMITS_H |
57 | #include <limits.h> | |
58 | #endif | |
59 | ||
800eeca4 | 60 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
61 | |
62 | /* Some systems define MIN in, e.g., param.h. */ | |
63 | #undef MIN | |
800eeca4 JW |
64 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
65 | ||
66 | #define NUM_SLOTS 4 | |
67 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
68 | #define CURR_SLOT md.slot[md.curr_slot] | |
69 | ||
70 | #define O_pseudo_fixup (O_max + 1) | |
71 | ||
72 | enum special_section | |
73 | { | |
557debba | 74 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
75 | SPECIAL_SECTION_BSS = 0, |
76 | SPECIAL_SECTION_SBSS, | |
77 | SPECIAL_SECTION_SDATA, | |
78 | SPECIAL_SECTION_RODATA, | |
79 | SPECIAL_SECTION_COMMENT, | |
80 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
81 | SPECIAL_SECTION_UNWIND_INFO, |
82 | /* HPUX specific section pseudo-ops. */ | |
83 | SPECIAL_SECTION_INIT_ARRAY, | |
84 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
85 | }; |
86 | ||
87 | enum reloc_func | |
88 | { | |
13ae64f3 JJ |
89 | FUNC_DTP_MODULE, |
90 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
91 | FUNC_FPTR_RELATIVE, |
92 | FUNC_GP_RELATIVE, | |
93 | FUNC_LT_RELATIVE, | |
fa2c7eff | 94 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 95 | FUNC_PC_RELATIVE, |
800eeca4 JW |
96 | FUNC_PLT_RELATIVE, |
97 | FUNC_SEC_RELATIVE, | |
98 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 99 | FUNC_TP_RELATIVE, |
800eeca4 JW |
100 | FUNC_LTV_RELATIVE, |
101 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
102 | FUNC_LT_DTP_MODULE, |
103 | FUNC_LT_DTP_RELATIVE, | |
104 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 105 | FUNC_IPLT_RELOC, |
9d0e8497 TG |
106 | #ifdef TE_VMS |
107 | FUNC_SLOTCOUNT_RELOC, | |
108 | #endif | |
800eeca4 JW |
109 | }; |
110 | ||
111 | enum reg_symbol | |
112 | { | |
113 | REG_GR = 0, | |
114 | REG_FR = (REG_GR + 128), | |
115 | REG_AR = (REG_FR + 128), | |
116 | REG_CR = (REG_AR + 128), | |
b3e14eda L |
117 | REG_DAHR = (REG_CR + 128), |
118 | REG_P = (REG_DAHR + 8), | |
800eeca4 JW |
119 | REG_BR = (REG_P + 64), |
120 | REG_IP = (REG_BR + 8), | |
121 | REG_CFM, | |
122 | REG_PR, | |
123 | REG_PR_ROT, | |
124 | REG_PSR, | |
125 | REG_PSR_L, | |
126 | REG_PSR_UM, | |
127 | /* The following are pseudo-registers for use by gas only. */ | |
128 | IND_CPUID, | |
129 | IND_DBR, | |
130 | IND_DTR, | |
131 | IND_ITR, | |
132 | IND_IBR, | |
800eeca4 JW |
133 | IND_MSR, |
134 | IND_PKR, | |
135 | IND_PMC, | |
136 | IND_PMD, | |
b3e14eda | 137 | IND_DAHR, |
800eeca4 | 138 | IND_RR, |
542d6675 | 139 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
140 | REG_PSP, |
141 | REG_PRIUNAT, | |
800eeca4 JW |
142 | REG_NUM |
143 | }; | |
144 | ||
145 | enum dynreg_type | |
146 | { | |
147 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
148 | DYNREG_FR, /* dynamic floating point register */ | |
149 | DYNREG_PR, /* dynamic predicate register */ | |
150 | DYNREG_NUM_TYPES | |
151 | }; | |
152 | ||
87f8eb97 JW |
153 | enum operand_match_result |
154 | { | |
155 | OPERAND_MATCH, | |
156 | OPERAND_OUT_OF_RANGE, | |
157 | OPERAND_MISMATCH | |
158 | }; | |
159 | ||
800eeca4 JW |
160 | /* On the ia64, we can't know the address of a text label until the |
161 | instructions are packed into a bundle. To handle this, we keep | |
162 | track of the list of labels that appear in front of each | |
163 | instruction. */ | |
164 | struct label_fix | |
542d6675 KH |
165 | { |
166 | struct label_fix *next; | |
167 | struct symbol *sym; | |
07a53e5c | 168 | bfd_boolean dw2_mark_labels; |
542d6675 | 169 | }; |
800eeca4 | 170 | |
9d0e8497 TG |
171 | #ifdef TE_VMS |
172 | /* An internally used relocation. */ | |
173 | #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1) | |
174 | #endif | |
175 | ||
549f748d | 176 | /* This is the endianness of the current section. */ |
800eeca4 JW |
177 | extern int target_big_endian; |
178 | ||
549f748d JW |
179 | /* This is the default endianness. */ |
180 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
181 | ||
5a49b8ac | 182 | void (*ia64_number_to_chars) (char *, valueT, int); |
10a98291 | 183 | |
5a49b8ac AM |
184 | static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE *, int); |
185 | static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE *, int); | |
186 | ||
187 | static void (*ia64_float_to_chars) (char *, LITTLENUM_TYPE *, int); | |
10a98291 | 188 | |
35f5df7f L |
189 | static struct hash_control *alias_hash; |
190 | static struct hash_control *alias_name_hash; | |
191 | static struct hash_control *secalias_hash; | |
192 | static struct hash_control *secalias_name_hash; | |
193 | ||
2fac3d48 JB |
194 | /* List of chars besides those in app.c:symbol_chars that can start an |
195 | operand. Used to prevent the scrubber eating vital white-space. */ | |
196 | const char ia64_symbol_chars[] = "@?"; | |
197 | ||
800eeca4 JW |
198 | /* Characters which always start a comment. */ |
199 | const char comment_chars[] = ""; | |
200 | ||
201 | /* Characters which start a comment at the beginning of a line. */ | |
202 | const char line_comment_chars[] = "#"; | |
203 | ||
204 | /* Characters which may be used to separate multiple commands on a | |
205 | single line. */ | |
e4e8248d | 206 | const char line_separator_chars[] = ";{}"; |
800eeca4 JW |
207 | |
208 | /* Characters which are used to indicate an exponent in a floating | |
209 | point number. */ | |
210 | const char EXP_CHARS[] = "eE"; | |
211 | ||
212 | /* Characters which mean that a number is a floating point constant, | |
213 | as in 0d1.0. */ | |
214 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
215 | ||
542d6675 | 216 | /* ia64-specific option processing: */ |
800eeca4 | 217 | |
44f5c83a | 218 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
219 | |
220 | struct option md_longopts[] = | |
221 | { | |
c43c2cc5 JW |
222 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
223 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
224 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
225 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
226 | }; |
227 | ||
228 | size_t md_longopts_size = sizeof (md_longopts); | |
229 | ||
230 | static struct | |
231 | { | |
232 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
233 | struct hash_control *reg_hash; /* register name hash table */ | |
234 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
235 | struct hash_control *const_hash; /* constant hash table */ | |
236 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
237 | ||
800eeca4 JW |
238 | /* If X_op is != O_absent, the registername for the instruction's |
239 | qualifying predicate. If NULL, p0 is assumed for instructions | |
ad4b42b4 | 240 | that are predictable. */ |
800eeca4 JW |
241 | expressionS qp; |
242 | ||
8c2fda1d L |
243 | /* Optimize for which CPU. */ |
244 | enum | |
245 | { | |
246 | itanium1, | |
247 | itanium2 | |
248 | } tune; | |
249 | ||
91d777ee L |
250 | /* What to do when hint.b is used. */ |
251 | enum | |
252 | { | |
253 | hint_b_error, | |
254 | hint_b_warning, | |
255 | hint_b_ok | |
256 | } hint_b; | |
257 | ||
800eeca4 | 258 | unsigned int |
197865e8 | 259 | manual_bundling : 1, |
800eeca4 JW |
260 | debug_dv: 1, |
261 | detect_dv: 1, | |
262 | explicit_mode : 1, /* which mode we're in */ | |
263 | default_explicit_mode : 1, /* which mode is the default */ | |
264 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
265 | auto_align : 1, |
266 | keep_pending_output : 1; | |
800eeca4 | 267 | |
970d6792 L |
268 | /* What to do when something is wrong with unwind directives. */ |
269 | enum | |
270 | { | |
271 | unwind_check_warning, | |
272 | unwind_check_error | |
273 | } unwind_check; | |
274 | ||
800eeca4 JW |
275 | /* Each bundle consists of up to three instructions. We keep |
276 | track of four most recent instructions so we can correctly set | |
197865e8 | 277 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
278 | int curr_slot; |
279 | int num_slots_in_use; | |
280 | struct slot | |
281 | { | |
282 | unsigned int | |
283 | end_of_insn_group : 1, | |
284 | manual_bundling_on : 1, | |
196e8040 JW |
285 | manual_bundling_off : 1, |
286 | loc_directive_seen : 1; | |
800eeca4 JW |
287 | signed char user_template; /* user-selected template, if any */ |
288 | unsigned char qp_regno; /* qualifying predicate */ | |
289 | /* This duplicates a good fraction of "struct fix" but we | |
290 | can't use a "struct fix" instead since we can't call | |
291 | fix_new_exp() until we know the address of the instruction. */ | |
292 | int num_fixups; | |
293 | struct insn_fix | |
294 | { | |
295 | bfd_reloc_code_real_type code; | |
296 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
297 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
298 | expressionS expr; /* the value to be inserted */ | |
299 | } | |
300 | fixup[2]; /* at most two fixups per insn */ | |
301 | struct ia64_opcode *idesc; | |
302 | struct label_fix *label_fixups; | |
f1bcba5b | 303 | struct label_fix *tag_fixups; |
800eeca4 JW |
304 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
305 | expressionS opnd[6]; | |
306 | char *src_file; | |
307 | unsigned int src_line; | |
308 | struct dwarf2_line_info debug_line; | |
309 | } | |
310 | slot[NUM_SLOTS]; | |
311 | ||
312 | segT last_text_seg; | |
313 | ||
314 | struct dynreg | |
315 | { | |
316 | struct dynreg *next; /* next dynamic register */ | |
317 | const char *name; | |
318 | unsigned short base; /* the base register number */ | |
319 | unsigned short num_regs; /* # of registers in this set */ | |
320 | } | |
321 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
322 | ||
323 | flagword flags; /* ELF-header flags */ | |
324 | ||
325 | struct mem_offset { | |
326 | unsigned hint:1; /* is this hint currently valid? */ | |
327 | bfd_vma offset; /* mem.offset offset */ | |
328 | bfd_vma base; /* mem.offset base */ | |
329 | } mem_offset; | |
330 | ||
331 | int path; /* number of alt. entry points seen */ | |
332 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 333 | the current DV-checking block. */ |
800eeca4 | 334 | int maxpaths; /* size currently allocated for |
542d6675 | 335 | entry_labels */ |
557debba JW |
336 | |
337 | int pointer_size; /* size in bytes of a pointer */ | |
338 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
8b84be9d JB |
339 | |
340 | symbolS *indregsym[IND_RR - IND_CPUID + 1]; | |
800eeca4 JW |
341 | } |
342 | md; | |
343 | ||
f6fe78d6 JW |
344 | /* These are not const, because they are modified to MMI for non-itanium1 |
345 | targets below. */ | |
346 | /* MFI bundle of nops. */ | |
347 | static unsigned char le_nop[16] = | |
348 | { | |
349 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
350 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
351 | }; | |
352 | /* MFI bundle of nops with stop-bit. */ | |
353 | static unsigned char le_nop_stop[16] = | |
354 | { | |
355 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
356 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
357 | }; | |
358 | ||
542d6675 | 359 | /* application registers: */ |
800eeca4 | 360 | |
e0c9811a JW |
361 | #define AR_K0 0 |
362 | #define AR_K7 7 | |
363 | #define AR_RSC 16 | |
364 | #define AR_BSP 17 | |
365 | #define AR_BSPSTORE 18 | |
366 | #define AR_RNAT 19 | |
d8ca90b5 JB |
367 | #define AR_FCR 21 |
368 | #define AR_EFLAG 24 | |
369 | #define AR_CSD 25 | |
370 | #define AR_SSD 26 | |
371 | #define AR_CFLG 27 | |
372 | #define AR_FSR 28 | |
373 | #define AR_FIR 29 | |
374 | #define AR_FDR 30 | |
375 | #define AR_CCV 32 | |
e0c9811a JW |
376 | #define AR_UNAT 36 |
377 | #define AR_FPSR 40 | |
378 | #define AR_ITC 44 | |
4f8631b1 | 379 | #define AR_RUC 45 |
e0c9811a JW |
380 | #define AR_PFS 64 |
381 | #define AR_LC 65 | |
d8ca90b5 | 382 | #define AR_EC 66 |
800eeca4 JW |
383 | |
384 | static const struct | |
385 | { | |
386 | const char *name; | |
8b84be9d | 387 | unsigned int regnum; |
800eeca4 JW |
388 | } |
389 | ar[] = | |
390 | { | |
d8ca90b5 JB |
391 | {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1}, |
392 | {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3}, | |
393 | {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5}, | |
394 | {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7}, | |
395 | {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP}, | |
396 | {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT}, | |
397 | {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG}, | |
398 | {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD}, | |
399 | {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR}, | |
400 | {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR}, | |
401 | {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT}, | |
402 | {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC}, | |
4f8631b1 L |
403 | {"ar.ruc", AR_RUC}, {"ar.pfs", AR_PFS}, |
404 | {"ar.lc", AR_LC}, {"ar.ec", AR_EC}, | |
800eeca4 JW |
405 | }; |
406 | ||
d8ca90b5 JB |
407 | /* control registers: */ |
408 | ||
409 | #define CR_DCR 0 | |
410 | #define CR_ITM 1 | |
411 | #define CR_IVA 2 | |
412 | #define CR_PTA 8 | |
413 | #define CR_GPTA 9 | |
800eeca4 JW |
414 | #define CR_IPSR 16 |
415 | #define CR_ISR 17 | |
416 | #define CR_IIP 19 | |
417 | #define CR_IFA 20 | |
418 | #define CR_ITIR 21 | |
419 | #define CR_IIPA 22 | |
420 | #define CR_IFS 23 | |
421 | #define CR_IIM 24 | |
422 | #define CR_IHA 25 | |
1ca35711 L |
423 | #define CR_IIB0 26 |
424 | #define CR_IIB1 27 | |
d8ca90b5 | 425 | #define CR_LID 64 |
800eeca4 JW |
426 | #define CR_IVR 65 |
427 | #define CR_TPR 66 | |
428 | #define CR_EOI 67 | |
429 | #define CR_IRR0 68 | |
430 | #define CR_IRR3 71 | |
d8ca90b5 JB |
431 | #define CR_ITV 72 |
432 | #define CR_PMV 73 | |
433 | #define CR_CMCV 74 | |
800eeca4 JW |
434 | #define CR_LRR0 80 |
435 | #define CR_LRR1 81 | |
436 | ||
800eeca4 JW |
437 | static const struct |
438 | { | |
439 | const char *name; | |
8b84be9d | 440 | unsigned int regnum; |
800eeca4 JW |
441 | } |
442 | cr[] = | |
443 | { | |
d8ca90b5 JB |
444 | {"cr.dcr", CR_DCR}, |
445 | {"cr.itm", CR_ITM}, | |
446 | {"cr.iva", CR_IVA}, | |
447 | {"cr.pta", CR_PTA}, | |
448 | {"cr.gpta", CR_GPTA}, | |
449 | {"cr.ipsr", CR_IPSR}, | |
450 | {"cr.isr", CR_ISR}, | |
451 | {"cr.iip", CR_IIP}, | |
452 | {"cr.ifa", CR_IFA}, | |
453 | {"cr.itir", CR_ITIR}, | |
454 | {"cr.iipa", CR_IIPA}, | |
455 | {"cr.ifs", CR_IFS}, | |
456 | {"cr.iim", CR_IIM}, | |
457 | {"cr.iha", CR_IHA}, | |
1ca35711 L |
458 | {"cr.iib0", CR_IIB0}, |
459 | {"cr.iib1", CR_IIB1}, | |
d8ca90b5 JB |
460 | {"cr.lid", CR_LID}, |
461 | {"cr.ivr", CR_IVR}, | |
462 | {"cr.tpr", CR_TPR}, | |
463 | {"cr.eoi", CR_EOI}, | |
464 | {"cr.irr0", CR_IRR0}, | |
465 | {"cr.irr1", CR_IRR0 + 1}, | |
466 | {"cr.irr2", CR_IRR0 + 2}, | |
467 | {"cr.irr3", CR_IRR3}, | |
468 | {"cr.itv", CR_ITV}, | |
469 | {"cr.pmv", CR_PMV}, | |
470 | {"cr.cmcv", CR_CMCV}, | |
471 | {"cr.lrr0", CR_LRR0}, | |
472 | {"cr.lrr1", CR_LRR1} | |
800eeca4 JW |
473 | }; |
474 | ||
475 | #define PSR_MFL 4 | |
476 | #define PSR_IC 13 | |
477 | #define PSR_DFL 18 | |
478 | #define PSR_CPL 32 | |
479 | ||
480 | static const struct const_desc | |
481 | { | |
482 | const char *name; | |
483 | valueT value; | |
484 | } | |
485 | const_bits[] = | |
486 | { | |
542d6675 | 487 | /* PSR constant masks: */ |
800eeca4 JW |
488 | |
489 | /* 0: reserved */ | |
490 | {"psr.be", ((valueT) 1) << 1}, | |
491 | {"psr.up", ((valueT) 1) << 2}, | |
492 | {"psr.ac", ((valueT) 1) << 3}, | |
493 | {"psr.mfl", ((valueT) 1) << 4}, | |
494 | {"psr.mfh", ((valueT) 1) << 5}, | |
495 | /* 6-12: reserved */ | |
496 | {"psr.ic", ((valueT) 1) << 13}, | |
497 | {"psr.i", ((valueT) 1) << 14}, | |
498 | {"psr.pk", ((valueT) 1) << 15}, | |
499 | /* 16: reserved */ | |
500 | {"psr.dt", ((valueT) 1) << 17}, | |
501 | {"psr.dfl", ((valueT) 1) << 18}, | |
502 | {"psr.dfh", ((valueT) 1) << 19}, | |
503 | {"psr.sp", ((valueT) 1) << 20}, | |
504 | {"psr.pp", ((valueT) 1) << 21}, | |
505 | {"psr.di", ((valueT) 1) << 22}, | |
506 | {"psr.si", ((valueT) 1) << 23}, | |
507 | {"psr.db", ((valueT) 1) << 24}, | |
508 | {"psr.lp", ((valueT) 1) << 25}, | |
509 | {"psr.tb", ((valueT) 1) << 26}, | |
510 | {"psr.rt", ((valueT) 1) << 27}, | |
511 | /* 28-31: reserved */ | |
512 | /* 32-33: cpl (current privilege level) */ | |
513 | {"psr.is", ((valueT) 1) << 34}, | |
514 | {"psr.mc", ((valueT) 1) << 35}, | |
515 | {"psr.it", ((valueT) 1) << 36}, | |
516 | {"psr.id", ((valueT) 1) << 37}, | |
517 | {"psr.da", ((valueT) 1) << 38}, | |
518 | {"psr.dd", ((valueT) 1) << 39}, | |
519 | {"psr.ss", ((valueT) 1) << 40}, | |
520 | /* 41-42: ri (restart instruction) */ | |
521 | {"psr.ed", ((valueT) 1) << 43}, | |
522 | {"psr.bn", ((valueT) 1) << 44}, | |
523 | }; | |
524 | ||
542d6675 | 525 | /* indirect register-sets/memory: */ |
800eeca4 JW |
526 | |
527 | static const struct | |
528 | { | |
529 | const char *name; | |
8b84be9d | 530 | unsigned int regnum; |
800eeca4 JW |
531 | } |
532 | indirect_reg[] = | |
533 | { | |
534 | { "CPUID", IND_CPUID }, | |
535 | { "cpuid", IND_CPUID }, | |
536 | { "dbr", IND_DBR }, | |
537 | { "dtr", IND_DTR }, | |
538 | { "itr", IND_ITR }, | |
539 | { "ibr", IND_IBR }, | |
540 | { "msr", IND_MSR }, | |
541 | { "pkr", IND_PKR }, | |
542 | { "pmc", IND_PMC }, | |
543 | { "pmd", IND_PMD }, | |
b3e14eda | 544 | { "dahr", IND_DAHR }, |
800eeca4 JW |
545 | { "rr", IND_RR }, |
546 | }; | |
547 | ||
548 | /* Pseudo functions used to indicate relocation types (these functions | |
549 | start with an at sign (@). */ | |
550 | static struct | |
551 | { | |
552 | const char *name; | |
553 | enum pseudo_type | |
554 | { | |
555 | PSEUDO_FUNC_NONE, | |
556 | PSEUDO_FUNC_RELOC, | |
557 | PSEUDO_FUNC_CONST, | |
e0c9811a | 558 | PSEUDO_FUNC_REG, |
800eeca4 JW |
559 | PSEUDO_FUNC_FLOAT |
560 | } | |
561 | type; | |
562 | union | |
563 | { | |
564 | unsigned long ival; | |
565 | symbolS *sym; | |
566 | } | |
567 | u; | |
568 | } | |
569 | pseudo_func[] = | |
570 | { | |
542d6675 | 571 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
572 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
573 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
574 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
575 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
576 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 577 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
578 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
579 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
580 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
581 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 582 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 583 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
584 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
585 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
586 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
587 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 588 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
9d0e8497 TG |
589 | #ifdef TE_VMS |
590 | { "slotcount", PSEUDO_FUNC_RELOC, { 0 } }, | |
591 | #endif | |
800eeca4 | 592 | |
542d6675 | 593 | /* mbtype4 constants: */ |
800eeca4 JW |
594 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
595 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
596 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
597 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
598 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
599 | ||
542d6675 | 600 | /* fclass constants: */ |
bf3ca999 | 601 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
602 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
603 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
604 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
605 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
606 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
607 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
608 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
609 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
610 | |
611 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 612 | |
c10d9d8f JW |
613 | /* hint constants: */ |
614 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
b3e14eda L |
615 | { "priority", PSEUDO_FUNC_CONST, { 0x1 } }, |
616 | ||
617 | /* tf constants: */ | |
618 | { "clz", PSEUDO_FUNC_CONST, { 32 } }, | |
619 | { "mpy", PSEUDO_FUNC_CONST, { 33 } }, | |
620 | { "datahints", PSEUDO_FUNC_CONST, { 34 } }, | |
c10d9d8f | 621 | |
542d6675 | 622 | /* unwind-related constants: */ |
041340ad JW |
623 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
624 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
625 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
9c55345c | 626 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_GNU } }, |
041340ad JW |
627 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, |
628 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
629 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 630 | |
542d6675 | 631 | /* unwind-related registers: */ |
e0c9811a | 632 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
633 | }; |
634 | ||
542d6675 | 635 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
636 | static const bfd_vma nop[IA64_NUM_UNITS] = |
637 | { | |
638 | 0x0000000000LL, /* NIL => break 0 */ | |
639 | 0x0008000000LL, /* I-unit nop */ | |
640 | 0x0008000000LL, /* M-unit nop */ | |
641 | 0x4000000000LL, /* B-unit nop */ | |
642 | 0x0008000000LL, /* F-unit nop */ | |
5d5e6db9 | 643 | 0x0000000000LL, /* L-"unit" nop immediate */ |
800eeca4 JW |
644 | 0x0008000000LL, /* X-unit nop */ |
645 | }; | |
646 | ||
647 | /* Can't be `const' as it's passed to input routines (which have the | |
648 | habit of setting temporary sentinels. */ | |
649 | static char special_section_name[][20] = | |
650 | { | |
651 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
652 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
653 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
654 | }; |
655 | ||
656 | /* The best template for a particular sequence of up to three | |
657 | instructions: */ | |
658 | #define N IA64_NUM_TYPES | |
659 | static unsigned char best_template[N][N][N]; | |
660 | #undef N | |
661 | ||
662 | /* Resource dependencies currently in effect */ | |
663 | static struct rsrc { | |
664 | int depind; /* dependency index */ | |
665 | const struct ia64_dependency *dependency; /* actual dependency */ | |
666 | unsigned specific:1, /* is this a specific bit/regno? */ | |
667 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
668 | int index; /* specific regno/bit within dependency */ | |
669 | int note; /* optional qualifying note (0 if none) */ | |
670 | #define STATE_NONE 0 | |
671 | #define STATE_STOP 1 | |
672 | #define STATE_SRLZ 2 | |
673 | int insn_srlz; /* current insn serialization state */ | |
674 | int data_srlz; /* current data serialization state */ | |
675 | int qp_regno; /* qualifying predicate for this usage */ | |
676 | char *file; /* what file marked this dependency */ | |
2434f565 | 677 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 678 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 679 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
680 | int path; /* corresponding code entry index */ |
681 | } *regdeps = NULL; | |
682 | static int regdepslen = 0; | |
683 | static int regdepstotlen = 0; | |
684 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
685 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 686 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 687 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
688 | |
689 | /* Current state of PR mutexation */ | |
690 | static struct qpmutex { | |
691 | valueT prmask; | |
692 | int path; | |
693 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
694 | static int qp_mutexeslen = 0; | |
695 | static int qp_mutexestotlen = 0; | |
197865e8 | 696 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
697 | |
698 | /* Current state of PR implications */ | |
699 | static struct qp_imply { | |
700 | unsigned p1:6; | |
701 | unsigned p2:6; | |
702 | unsigned p2_branched:1; | |
703 | int path; | |
704 | } *qp_implies = NULL; | |
705 | static int qp_implieslen = 0; | |
706 | static int qp_impliestotlen = 0; | |
707 | ||
197865e8 KH |
708 | /* Keep track of static GR values so that indirect register usage can |
709 | sometimes be tracked. */ | |
800eeca4 JW |
710 | static struct gr { |
711 | unsigned known:1; | |
712 | int path; | |
713 | valueT value; | |
a66d2bb7 JB |
714 | } gr_values[128] = { |
715 | { | |
716 | 1, | |
717 | #ifdef INT_MAX | |
718 | INT_MAX, | |
719 | #else | |
720 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
721 | #endif | |
722 | 0 | |
723 | } | |
724 | }; | |
800eeca4 | 725 | |
9545c4ce L |
726 | /* Remember the alignment frag. */ |
727 | static fragS *align_frag; | |
728 | ||
800eeca4 JW |
729 | /* These are the routines required to output the various types of |
730 | unwind records. */ | |
731 | ||
f5a30c2e JW |
732 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
733 | frag address here so that if there is a section switch in the middle of | |
734 | a function, then instructions emitted to a different section are not | |
735 | counted. Since there may be more than one frag for a function, this | |
736 | means we also need to keep track of which frag this address belongs to | |
737 | so we can compute inter-frag distances. This also nicely solves the | |
738 | problem with nops emitted for align directives, which can't easily be | |
739 | counted, but can easily be derived from frag sizes. */ | |
740 | ||
800eeca4 JW |
741 | typedef struct unw_rec_list { |
742 | unwind_record r; | |
e0c9811a | 743 | unsigned long slot_number; |
f5a30c2e | 744 | fragS *slot_frag; |
800eeca4 JW |
745 | struct unw_rec_list *next; |
746 | } unw_rec_list; | |
747 | ||
2434f565 | 748 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 749 | |
6290819d NC |
750 | /* Linked list of saved prologue counts. A very poor |
751 | implementation of a map from label numbers to prologue counts. */ | |
752 | typedef struct label_prologue_count | |
753 | { | |
754 | struct label_prologue_count *next; | |
755 | unsigned long label_number; | |
756 | unsigned int prologue_count; | |
757 | } label_prologue_count; | |
758 | ||
5656b6b8 JB |
759 | typedef struct proc_pending |
760 | { | |
761 | symbolS *sym; | |
762 | struct proc_pending *next; | |
763 | } proc_pending; | |
764 | ||
e0c9811a JW |
765 | static struct |
766 | { | |
e0c9811a JW |
767 | /* Maintain a list of unwind entries for the current function. */ |
768 | unw_rec_list *list; | |
769 | unw_rec_list *tail; | |
800eeca4 | 770 | |
ad4b42b4 | 771 | /* Any unwind entries that should be attached to the current slot |
e0c9811a JW |
772 | that an insn is being constructed for. */ |
773 | unw_rec_list *current_entry; | |
800eeca4 | 774 | |
e0c9811a | 775 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 776 | proc_pending proc_pending; |
e0c9811a JW |
777 | symbolS *info; /* pointer to unwind info */ |
778 | symbolS *personality_routine; | |
91a2ae2a RH |
779 | segT saved_text_seg; |
780 | subsegT saved_text_subseg; | |
781 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 782 | |
e0c9811a | 783 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
784 | unsigned int prologue : 1; |
785 | unsigned int prologue_mask : 4; | |
e4e8248d | 786 | unsigned int prologue_gr : 7; |
75e09913 JB |
787 | unsigned int body : 1; |
788 | unsigned int insn : 1; | |
33d01f33 | 789 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
790 | /* Prologue counts at previous .label_state directives. */ |
791 | struct label_prologue_count * saved_prologue_counts; | |
ba825241 JB |
792 | |
793 | /* List of split up .save-s. */ | |
794 | unw_p_record *pending_saves; | |
e0c9811a | 795 | } unwind; |
800eeca4 | 796 | |
9f9a069e JW |
797 | /* The input value is a negated offset from psp, and specifies an address |
798 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
799 | must add 16 and divide by 4 to get the encoded value. */ | |
800 | ||
801 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
802 | ||
5a49b8ac | 803 | typedef void (*vbyte_func) (int, char *, char *); |
800eeca4 | 804 | |
0234cb7c | 805 | /* Forward declarations: */ |
5a49b8ac | 806 | static void dot_alias (int); |
cd42ff9c | 807 | static int parse_operand_and_eval (expressionS *, int); |
5a49b8ac AM |
808 | static void emit_one_bundle (void); |
809 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type (struct symbol *, | |
810 | bfd_reloc_code_real_type); | |
811 | static void insn_group_break (int, int, int); | |
812 | static void add_qp_mutex (valueT); | |
813 | static void add_qp_imply (int, int); | |
814 | static void clear_qp_mutex (valueT); | |
815 | static void clear_qp_implies (valueT, valueT); | |
816 | static void print_dependency (const char *, int); | |
817 | static void instruction_serialization (void); | |
818 | static void data_serialization (void); | |
819 | static void output_R3_format (vbyte_func, unw_record_type, unsigned long); | |
820 | static void output_B3_format (vbyte_func, unsigned long, unsigned long); | |
821 | static void output_B4_format (vbyte_func, unw_record_type, unsigned long); | |
822 | static void free_saved_prologue_counts (void); | |
91a2ae2a | 823 | |
652ca075 | 824 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
825 | unit (as opposed to the memory unit). */ |
826 | static int | |
652ca075 | 827 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
828 | { |
829 | reg -= REG_AR; | |
652ca075 L |
830 | return reg >= 64 && reg <= 111; |
831 | } | |
800eeca4 | 832 | |
652ca075 L |
833 | /* Determine if application register REGNUM resides only in the memory |
834 | unit (as opposed to the integer unit). */ | |
835 | static int | |
836 | ar_is_only_in_memory_unit (int reg) | |
837 | { | |
838 | reg -= REG_AR; | |
839 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
840 | } |
841 | ||
842 | /* Switch to section NAME and create section if necessary. It's | |
843 | rather ugly that we have to manipulate input_line_pointer but I | |
844 | don't see any other way to accomplish the same thing without | |
845 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
846 | static void | |
5a49b8ac | 847 | set_section (char *name) |
800eeca4 JW |
848 | { |
849 | char *saved_input_line_pointer; | |
850 | ||
851 | saved_input_line_pointer = input_line_pointer; | |
852 | input_line_pointer = name; | |
853 | obj_elf_section (0); | |
854 | input_line_pointer = saved_input_line_pointer; | |
855 | } | |
856 | ||
d61a78a7 RH |
857 | /* Map 's' to SHF_IA_64_SHORT. */ |
858 | ||
01e1a5bc | 859 | bfd_vma |
5a49b8ac | 860 | ia64_elf_section_letter (int letter, char **ptr_msg) |
d61a78a7 RH |
861 | { |
862 | if (letter == 's') | |
863 | return SHF_IA_64_SHORT; | |
711ef82f L |
864 | else if (letter == 'o') |
865 | return SHF_LINK_ORDER; | |
01e1a5bc NC |
866 | #ifdef TE_VMS |
867 | else if (letter == 'O') | |
868 | return SHF_IA_64_VMS_OVERLAID; | |
869 | else if (letter == 'g') | |
870 | return SHF_IA_64_VMS_GLOBAL; | |
871 | #endif | |
d61a78a7 | 872 | |
8f3bae45 | 873 | *ptr_msg = _("bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
711ef82f | 874 | return -1; |
d61a78a7 RH |
875 | } |
876 | ||
800eeca4 JW |
877 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
878 | ||
879 | flagword | |
5a49b8ac | 880 | ia64_elf_section_flags (flagword flags, |
01e1a5bc | 881 | bfd_vma attr, |
5a49b8ac | 882 | int type ATTRIBUTE_UNUSED) |
800eeca4 JW |
883 | { |
884 | if (attr & SHF_IA_64_SHORT) | |
885 | flags |= SEC_SMALL_DATA; | |
886 | return flags; | |
887 | } | |
888 | ||
91a2ae2a | 889 | int |
5a49b8ac | 890 | ia64_elf_section_type (const char *str, size_t len) |
91a2ae2a | 891 | { |
1cd8ff38 | 892 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 893 | |
1cd8ff38 | 894 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
895 | return SHT_PROGBITS; |
896 | ||
1cd8ff38 | 897 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
898 | return SHT_PROGBITS; |
899 | ||
1cd8ff38 | 900 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
901 | return SHT_IA_64_UNWIND; |
902 | ||
1cd8ff38 | 903 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
904 | return SHT_IA_64_UNWIND; |
905 | ||
711ef82f L |
906 | if (STREQ ("unwind")) |
907 | return SHT_IA_64_UNWIND; | |
908 | ||
91a2ae2a | 909 | return -1; |
1cd8ff38 | 910 | #undef STREQ |
91a2ae2a RH |
911 | } |
912 | ||
800eeca4 | 913 | static unsigned int |
5a49b8ac AM |
914 | set_regstack (unsigned int ins, |
915 | unsigned int locs, | |
916 | unsigned int outs, | |
917 | unsigned int rots) | |
800eeca4 | 918 | { |
542d6675 KH |
919 | /* Size of frame. */ |
920 | unsigned int sof; | |
800eeca4 JW |
921 | |
922 | sof = ins + locs + outs; | |
923 | if (sof > 96) | |
924 | { | |
ad4b42b4 | 925 | as_bad (_("Size of frame exceeds maximum of 96 registers")); |
800eeca4 JW |
926 | return 0; |
927 | } | |
928 | if (rots > sof) | |
929 | { | |
ad4b42b4 | 930 | as_warn (_("Size of rotating registers exceeds frame size")); |
800eeca4 JW |
931 | return 0; |
932 | } | |
933 | md.in.base = REG_GR + 32; | |
934 | md.loc.base = md.in.base + ins; | |
935 | md.out.base = md.loc.base + locs; | |
936 | ||
937 | md.in.num_regs = ins; | |
938 | md.loc.num_regs = locs; | |
939 | md.out.num_regs = outs; | |
940 | md.rot.num_regs = rots; | |
941 | return sof; | |
942 | } | |
943 | ||
944 | void | |
5a49b8ac | 945 | ia64_flush_insns (void) |
800eeca4 JW |
946 | { |
947 | struct label_fix *lfix; | |
948 | segT saved_seg; | |
949 | subsegT saved_subseg; | |
b44b1b85 | 950 | unw_rec_list *ptr; |
07a53e5c | 951 | bfd_boolean mark; |
800eeca4 JW |
952 | |
953 | if (!md.last_text_seg) | |
954 | return; | |
955 | ||
956 | saved_seg = now_seg; | |
957 | saved_subseg = now_subseg; | |
958 | ||
959 | subseg_set (md.last_text_seg, 0); | |
960 | ||
961 | while (md.num_slots_in_use > 0) | |
962 | emit_one_bundle (); /* force out queued instructions */ | |
963 | ||
964 | /* In case there are labels following the last instruction, resolve | |
07a53e5c RH |
965 | those now. */ |
966 | mark = FALSE; | |
800eeca4 JW |
967 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
968 | { | |
07a53e5c RH |
969 | symbol_set_value_now (lfix->sym); |
970 | mark |= lfix->dw2_mark_labels; | |
800eeca4 | 971 | } |
07a53e5c | 972 | if (mark) |
f1bcba5b | 973 | { |
07a53e5c RH |
974 | dwarf2_where (&CURR_SLOT.debug_line); |
975 | CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
976 | dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); | |
661ba50f | 977 | dwarf2_consume_line_info (); |
f1bcba5b | 978 | } |
07a53e5c RH |
979 | CURR_SLOT.label_fixups = 0; |
980 | ||
981 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) | |
982 | symbol_set_value_now (lfix->sym); | |
f1bcba5b | 983 | CURR_SLOT.tag_fixups = 0; |
800eeca4 | 984 | |
b44b1b85 | 985 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
986 | resolve those now. We only handle prologue, body, and endp directives |
987 | here. Give an error for others. */ | |
b44b1b85 JW |
988 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
989 | { | |
9c59842f | 990 | switch (ptr->r.type) |
b44b1b85 | 991 | { |
9c59842f JW |
992 | case prologue: |
993 | case prologue_gr: | |
994 | case body: | |
995 | case endp: | |
b44b1b85 JW |
996 | ptr->slot_number = (unsigned long) frag_more (0); |
997 | ptr->slot_frag = frag_now; | |
9c59842f JW |
998 | break; |
999 | ||
1000 | /* Allow any record which doesn't have a "t" field (i.e., | |
1001 | doesn't relate to a particular instruction). */ | |
1002 | case unwabi: | |
1003 | case br_gr: | |
1004 | case copy_state: | |
1005 | case fr_mem: | |
1006 | case frgr_mem: | |
1007 | case gr_gr: | |
1008 | case gr_mem: | |
1009 | case label_state: | |
1010 | case rp_br: | |
1011 | case spill_base: | |
1012 | case spill_mask: | |
1013 | /* nothing */ | |
1014 | break; | |
1015 | ||
1016 | default: | |
1017 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1018 | break; | |
b44b1b85 | 1019 | } |
b44b1b85 JW |
1020 | } |
1021 | unwind.current_entry = NULL; | |
1022 | ||
800eeca4 | 1023 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1024 | |
1025 | if (md.qp.X_op == O_register) | |
ad4b42b4 | 1026 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
1027 | } |
1028 | ||
d9201763 L |
1029 | static void |
1030 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1031 | { |
1032 | char *saved_input_line_pointer = input_line_pointer; | |
1033 | ||
1034 | input_line_pointer = ""; | |
1035 | s_align_bytes (nbytes); | |
1036 | input_line_pointer = saved_input_line_pointer; | |
1037 | } | |
1038 | ||
1039 | void | |
5a49b8ac | 1040 | ia64_cons_align (int nbytes) |
800eeca4 JW |
1041 | { |
1042 | if (md.auto_align) | |
1043 | { | |
1044 | char *saved_input_line_pointer = input_line_pointer; | |
1045 | input_line_pointer = ""; | |
1046 | s_align_bytes (nbytes); | |
1047 | input_line_pointer = saved_input_line_pointer; | |
1048 | } | |
1049 | } | |
1050 | ||
2b0bc501 TG |
1051 | #ifdef TE_VMS |
1052 | ||
1053 | /* .vms_common section, symbol, size, alignment */ | |
1054 | ||
1055 | static void | |
1056 | obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED) | |
1057 | { | |
1058 | char *sec_name; | |
1059 | char *sym_name; | |
1060 | char c; | |
1061 | offsetT size; | |
1062 | offsetT cur_size; | |
1063 | offsetT temp; | |
1064 | symbolS *symbolP; | |
1065 | segT current_seg = now_seg; | |
1066 | subsegT current_subseg = now_subseg; | |
1067 | offsetT log_align; | |
1068 | ||
1069 | /* Section name. */ | |
1070 | sec_name = obj_elf_section_name (); | |
1071 | if (sec_name == NULL) | |
1072 | return; | |
1073 | ||
1074 | /* Symbol name. */ | |
1075 | SKIP_WHITESPACE (); | |
1076 | if (*input_line_pointer == ',') | |
1077 | { | |
1078 | input_line_pointer++; | |
1079 | SKIP_WHITESPACE (); | |
1080 | } | |
1081 | else | |
1082 | { | |
1083 | as_bad (_("expected ',' after section name")); | |
1084 | ignore_rest_of_line (); | |
1085 | return; | |
1086 | } | |
1087 | ||
1088 | sym_name = input_line_pointer; | |
1089 | c = get_symbol_end (); | |
1090 | ||
1091 | if (input_line_pointer == sym_name) | |
1092 | { | |
1093 | *input_line_pointer = c; | |
1094 | as_bad (_("expected symbol name")); | |
1095 | ignore_rest_of_line (); | |
1096 | return; | |
1097 | } | |
1098 | ||
1099 | symbolP = symbol_find_or_make (sym_name); | |
1100 | *input_line_pointer = c; | |
1101 | ||
1102 | if ((S_IS_DEFINED (symbolP) || symbol_equated_p (symbolP)) | |
1103 | && !S_IS_COMMON (symbolP)) | |
1104 | { | |
1105 | as_bad (_("Ignoring attempt to re-define symbol")); | |
1106 | ignore_rest_of_line (); | |
1107 | return; | |
1108 | } | |
1109 | ||
1110 | /* Symbol size. */ | |
1111 | SKIP_WHITESPACE (); | |
1112 | if (*input_line_pointer == ',') | |
1113 | { | |
1114 | input_line_pointer++; | |
1115 | SKIP_WHITESPACE (); | |
1116 | } | |
1117 | else | |
1118 | { | |
1119 | as_bad (_("expected ',' after symbol name")); | |
1120 | ignore_rest_of_line (); | |
1121 | return; | |
1122 | } | |
1123 | ||
1124 | temp = get_absolute_expression (); | |
1125 | size = temp; | |
1126 | size &= ((offsetT) 2 << (stdoutput->arch_info->bits_per_address - 1)) - 1; | |
1127 | if (temp != size) | |
1128 | { | |
1129 | as_warn (_("size (%ld) out of range, ignored"), (long) temp); | |
1130 | ignore_rest_of_line (); | |
1131 | return; | |
1132 | } | |
1133 | ||
1134 | /* Alignment. */ | |
1135 | SKIP_WHITESPACE (); | |
1136 | if (*input_line_pointer == ',') | |
1137 | { | |
1138 | input_line_pointer++; | |
1139 | SKIP_WHITESPACE (); | |
1140 | } | |
1141 | else | |
1142 | { | |
1143 | as_bad (_("expected ',' after symbol size")); | |
1144 | ignore_rest_of_line (); | |
1145 | return; | |
1146 | } | |
1147 | ||
1148 | log_align = get_absolute_expression (); | |
1149 | ||
1150 | demand_empty_rest_of_line (); | |
1151 | ||
1152 | obj_elf_change_section | |
1153 | (sec_name, SHT_NOBITS, | |
1154 | SHF_ALLOC | SHF_WRITE | SHF_IA_64_VMS_OVERLAID | SHF_IA_64_VMS_GLOBAL, | |
1155 | 0, NULL, 1, 0); | |
1156 | ||
1157 | S_SET_VALUE (symbolP, 0); | |
1158 | S_SET_SIZE (symbolP, size); | |
1159 | S_SET_EXTERNAL (symbolP); | |
1160 | S_SET_SEGMENT (symbolP, now_seg); | |
1161 | ||
1162 | symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT; | |
1163 | ||
1164 | record_alignment (now_seg, log_align); | |
1165 | ||
1166 | cur_size = bfd_section_size (stdoutput, now_seg); | |
1167 | if ((int) size > cur_size) | |
1168 | { | |
1169 | char *pfrag | |
1170 | = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, | |
1171 | (valueT)size - (valueT)cur_size, NULL); | |
1172 | *pfrag = 0; | |
1173 | bfd_section_size (stdoutput, now_seg) = size; | |
1174 | } | |
1175 | ||
1176 | /* Switch back to current segment. */ | |
1177 | subseg_set (current_seg, current_subseg); | |
1178 | ||
1179 | #ifdef md_elf_section_change_hook | |
1180 | md_elf_section_change_hook (); | |
1181 | #endif | |
1182 | } | |
1183 | ||
1184 | #endif /* TE_VMS */ | |
1185 | ||
800eeca4 | 1186 | /* Output COUNT bytes to a memory location. */ |
2132e3a3 | 1187 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1188 | |
5a49b8ac AM |
1189 | static void |
1190 | output_vbyte_mem (int count, char *ptr, char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1191 | { |
1192 | int x; | |
1193 | if (vbyte_mem_ptr == NULL) | |
1194 | abort (); | |
1195 | ||
1196 | if (count == 0) | |
1197 | return; | |
1198 | for (x = 0; x < count; x++) | |
1199 | *(vbyte_mem_ptr++) = ptr[x]; | |
1200 | } | |
1201 | ||
1202 | /* Count the number of bytes required for records. */ | |
1203 | static int vbyte_count = 0; | |
5a49b8ac AM |
1204 | static void |
1205 | count_output (int count, | |
1206 | char *ptr ATTRIBUTE_UNUSED, | |
1207 | char *comment ATTRIBUTE_UNUSED) | |
800eeca4 JW |
1208 | { |
1209 | vbyte_count += count; | |
1210 | } | |
1211 | ||
1212 | static void | |
5a49b8ac | 1213 | output_R1_format (vbyte_func f, unw_record_type rtype, int rlen) |
800eeca4 | 1214 | { |
e0c9811a | 1215 | int r = 0; |
800eeca4 JW |
1216 | char byte; |
1217 | if (rlen > 0x1f) | |
1218 | { | |
1219 | output_R3_format (f, rtype, rlen); | |
1220 | return; | |
1221 | } | |
197865e8 | 1222 | |
e0c9811a JW |
1223 | if (rtype == body) |
1224 | r = 1; | |
1225 | else if (rtype != prologue) | |
ad4b42b4 | 1226 | as_bad (_("record type is not valid")); |
e0c9811a | 1227 | |
800eeca4 JW |
1228 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1229 | (*f) (1, &byte, NULL); | |
1230 | } | |
1231 | ||
1232 | static void | |
5a49b8ac | 1233 | output_R2_format (vbyte_func f, int mask, int grsave, unsigned long rlen) |
800eeca4 JW |
1234 | { |
1235 | char bytes[20]; | |
1236 | int count = 2; | |
1237 | mask = (mask & 0x0f); | |
1238 | grsave = (grsave & 0x7f); | |
1239 | ||
1240 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1241 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1242 | count += output_leb128 (bytes + 2, rlen, 0); | |
1243 | (*f) (count, bytes, NULL); | |
1244 | } | |
1245 | ||
1246 | static void | |
5a49b8ac | 1247 | output_R3_format (vbyte_func f, unw_record_type rtype, unsigned long rlen) |
800eeca4 | 1248 | { |
e0c9811a | 1249 | int r = 0, count; |
800eeca4 JW |
1250 | char bytes[20]; |
1251 | if (rlen <= 0x1f) | |
1252 | { | |
1253 | output_R1_format (f, rtype, rlen); | |
1254 | return; | |
1255 | } | |
197865e8 | 1256 | |
e0c9811a JW |
1257 | if (rtype == body) |
1258 | r = 1; | |
1259 | else if (rtype != prologue) | |
ad4b42b4 | 1260 | as_bad (_("record type is not valid")); |
800eeca4 JW |
1261 | bytes[0] = (UNW_R3 | r); |
1262 | count = output_leb128 (bytes + 1, rlen, 0); | |
1263 | (*f) (count + 1, bytes, NULL); | |
1264 | } | |
1265 | ||
1266 | static void | |
5a49b8ac | 1267 | output_P1_format (vbyte_func f, int brmask) |
800eeca4 JW |
1268 | { |
1269 | char byte; | |
1270 | byte = UNW_P1 | (brmask & 0x1f); | |
1271 | (*f) (1, &byte, NULL); | |
1272 | } | |
1273 | ||
1274 | static void | |
5a49b8ac | 1275 | output_P2_format (vbyte_func f, int brmask, int gr) |
800eeca4 JW |
1276 | { |
1277 | char bytes[2]; | |
1278 | brmask = (brmask & 0x1f); | |
1279 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1280 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1281 | (*f) (2, bytes, NULL); | |
1282 | } | |
1283 | ||
1284 | static void | |
5a49b8ac | 1285 | output_P3_format (vbyte_func f, unw_record_type rtype, int reg) |
800eeca4 JW |
1286 | { |
1287 | char bytes[2]; | |
e0c9811a | 1288 | int r = 0; |
800eeca4 JW |
1289 | reg = (reg & 0x7f); |
1290 | switch (rtype) | |
542d6675 | 1291 | { |
800eeca4 JW |
1292 | case psp_gr: |
1293 | r = 0; | |
1294 | break; | |
1295 | case rp_gr: | |
1296 | r = 1; | |
1297 | break; | |
1298 | case pfs_gr: | |
1299 | r = 2; | |
1300 | break; | |
1301 | case preds_gr: | |
1302 | r = 3; | |
1303 | break; | |
1304 | case unat_gr: | |
1305 | r = 4; | |
1306 | break; | |
1307 | case lc_gr: | |
1308 | r = 5; | |
1309 | break; | |
1310 | case rp_br: | |
1311 | r = 6; | |
1312 | break; | |
1313 | case rnat_gr: | |
1314 | r = 7; | |
1315 | break; | |
1316 | case bsp_gr: | |
1317 | r = 8; | |
1318 | break; | |
1319 | case bspstore_gr: | |
1320 | r = 9; | |
1321 | break; | |
1322 | case fpsr_gr: | |
1323 | r = 10; | |
1324 | break; | |
1325 | case priunat_gr: | |
1326 | r = 11; | |
1327 | break; | |
1328 | default: | |
ad4b42b4 | 1329 | as_bad (_("Invalid record type for P3 format.")); |
542d6675 | 1330 | } |
800eeca4 JW |
1331 | bytes[0] = (UNW_P3 | (r >> 1)); |
1332 | bytes[1] = (((r & 1) << 7) | reg); | |
1333 | (*f) (2, bytes, NULL); | |
1334 | } | |
1335 | ||
800eeca4 | 1336 | static void |
5a49b8ac | 1337 | output_P4_format (vbyte_func f, unsigned char *imask, unsigned long imask_size) |
800eeca4 | 1338 | { |
e0c9811a | 1339 | imask[0] = UNW_P4; |
2132e3a3 | 1340 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1341 | } |
1342 | ||
1343 | static void | |
5a49b8ac | 1344 | output_P5_format (vbyte_func f, int grmask, unsigned long frmask) |
800eeca4 JW |
1345 | { |
1346 | char bytes[4]; | |
1347 | grmask = (grmask & 0x0f); | |
1348 | ||
1349 | bytes[0] = UNW_P5; | |
1350 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1351 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1352 | bytes[3] = (frmask & 0x000000ff); | |
1353 | (*f) (4, bytes, NULL); | |
1354 | } | |
1355 | ||
1356 | static void | |
5a49b8ac | 1357 | output_P6_format (vbyte_func f, unw_record_type rtype, int rmask) |
800eeca4 JW |
1358 | { |
1359 | char byte; | |
e0c9811a | 1360 | int r = 0; |
197865e8 | 1361 | |
e0c9811a JW |
1362 | if (rtype == gr_mem) |
1363 | r = 1; | |
1364 | else if (rtype != fr_mem) | |
ad4b42b4 | 1365 | as_bad (_("Invalid record type for format P6")); |
800eeca4 JW |
1366 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1367 | (*f) (1, &byte, NULL); | |
1368 | } | |
1369 | ||
1370 | static void | |
5a49b8ac AM |
1371 | output_P7_format (vbyte_func f, |
1372 | unw_record_type rtype, | |
1373 | unsigned long w1, | |
1374 | unsigned long w2) | |
800eeca4 JW |
1375 | { |
1376 | char bytes[20]; | |
1377 | int count = 1; | |
e0c9811a | 1378 | int r = 0; |
800eeca4 JW |
1379 | count += output_leb128 (bytes + 1, w1, 0); |
1380 | switch (rtype) | |
1381 | { | |
542d6675 KH |
1382 | case mem_stack_f: |
1383 | r = 0; | |
1384 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1385 | break; | |
1386 | case mem_stack_v: | |
1387 | r = 1; | |
1388 | break; | |
1389 | case spill_base: | |
1390 | r = 2; | |
1391 | break; | |
1392 | case psp_sprel: | |
1393 | r = 3; | |
1394 | break; | |
1395 | case rp_when: | |
1396 | r = 4; | |
1397 | break; | |
1398 | case rp_psprel: | |
1399 | r = 5; | |
1400 | break; | |
1401 | case pfs_when: | |
1402 | r = 6; | |
1403 | break; | |
1404 | case pfs_psprel: | |
1405 | r = 7; | |
1406 | break; | |
1407 | case preds_when: | |
1408 | r = 8; | |
1409 | break; | |
1410 | case preds_psprel: | |
1411 | r = 9; | |
1412 | break; | |
1413 | case lc_when: | |
1414 | r = 10; | |
1415 | break; | |
1416 | case lc_psprel: | |
1417 | r = 11; | |
1418 | break; | |
1419 | case unat_when: | |
1420 | r = 12; | |
1421 | break; | |
1422 | case unat_psprel: | |
1423 | r = 13; | |
1424 | break; | |
1425 | case fpsr_when: | |
1426 | r = 14; | |
1427 | break; | |
1428 | case fpsr_psprel: | |
1429 | r = 15; | |
1430 | break; | |
1431 | default: | |
1432 | break; | |
800eeca4 JW |
1433 | } |
1434 | bytes[0] = (UNW_P7 | r); | |
1435 | (*f) (count, bytes, NULL); | |
1436 | } | |
1437 | ||
1438 | static void | |
5a49b8ac | 1439 | output_P8_format (vbyte_func f, unw_record_type rtype, unsigned long t) |
800eeca4 JW |
1440 | { |
1441 | char bytes[20]; | |
e0c9811a | 1442 | int r = 0; |
800eeca4 JW |
1443 | int count = 2; |
1444 | bytes[0] = UNW_P8; | |
1445 | switch (rtype) | |
1446 | { | |
542d6675 KH |
1447 | case rp_sprel: |
1448 | r = 1; | |
1449 | break; | |
1450 | case pfs_sprel: | |
1451 | r = 2; | |
1452 | break; | |
1453 | case preds_sprel: | |
1454 | r = 3; | |
1455 | break; | |
1456 | case lc_sprel: | |
1457 | r = 4; | |
1458 | break; | |
1459 | case unat_sprel: | |
1460 | r = 5; | |
1461 | break; | |
1462 | case fpsr_sprel: | |
1463 | r = 6; | |
1464 | break; | |
1465 | case bsp_when: | |
1466 | r = 7; | |
1467 | break; | |
1468 | case bsp_psprel: | |
1469 | r = 8; | |
1470 | break; | |
1471 | case bsp_sprel: | |
1472 | r = 9; | |
1473 | break; | |
1474 | case bspstore_when: | |
1475 | r = 10; | |
1476 | break; | |
1477 | case bspstore_psprel: | |
1478 | r = 11; | |
1479 | break; | |
1480 | case bspstore_sprel: | |
1481 | r = 12; | |
1482 | break; | |
1483 | case rnat_when: | |
1484 | r = 13; | |
1485 | break; | |
1486 | case rnat_psprel: | |
1487 | r = 14; | |
1488 | break; | |
1489 | case rnat_sprel: | |
1490 | r = 15; | |
1491 | break; | |
1492 | case priunat_when_gr: | |
1493 | r = 16; | |
1494 | break; | |
1495 | case priunat_psprel: | |
1496 | r = 17; | |
1497 | break; | |
1498 | case priunat_sprel: | |
1499 | r = 18; | |
1500 | break; | |
1501 | case priunat_when_mem: | |
1502 | r = 19; | |
1503 | break; | |
1504 | default: | |
1505 | break; | |
800eeca4 JW |
1506 | } |
1507 | bytes[1] = r; | |
1508 | count += output_leb128 (bytes + 2, t, 0); | |
1509 | (*f) (count, bytes, NULL); | |
1510 | } | |
1511 | ||
1512 | static void | |
5a49b8ac | 1513 | output_P9_format (vbyte_func f, int grmask, int gr) |
800eeca4 JW |
1514 | { |
1515 | char bytes[3]; | |
1516 | bytes[0] = UNW_P9; | |
1517 | bytes[1] = (grmask & 0x0f); | |
1518 | bytes[2] = (gr & 0x7f); | |
1519 | (*f) (3, bytes, NULL); | |
1520 | } | |
1521 | ||
1522 | static void | |
5a49b8ac | 1523 | output_P10_format (vbyte_func f, int abi, int context) |
800eeca4 JW |
1524 | { |
1525 | char bytes[3]; | |
1526 | bytes[0] = UNW_P10; | |
1527 | bytes[1] = (abi & 0xff); | |
1528 | bytes[2] = (context & 0xff); | |
1529 | (*f) (3, bytes, NULL); | |
1530 | } | |
1531 | ||
1532 | static void | |
5a49b8ac | 1533 | output_B1_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1534 | { |
1535 | char byte; | |
e0c9811a | 1536 | int r = 0; |
197865e8 | 1537 | if (label > 0x1f) |
800eeca4 JW |
1538 | { |
1539 | output_B4_format (f, rtype, label); | |
1540 | return; | |
1541 | } | |
e0c9811a JW |
1542 | if (rtype == copy_state) |
1543 | r = 1; | |
1544 | else if (rtype != label_state) | |
ad4b42b4 | 1545 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1546 | |
1547 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1548 | (*f) (1, &byte, NULL); | |
1549 | } | |
1550 | ||
1551 | static void | |
5a49b8ac | 1552 | output_B2_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1553 | { |
1554 | char bytes[20]; | |
1555 | int count = 1; | |
1556 | if (ecount > 0x1f) | |
1557 | { | |
1558 | output_B3_format (f, ecount, t); | |
1559 | return; | |
1560 | } | |
1561 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1562 | count += output_leb128 (bytes + 1, t, 0); | |
1563 | (*f) (count, bytes, NULL); | |
1564 | } | |
1565 | ||
1566 | static void | |
5a49b8ac | 1567 | output_B3_format (vbyte_func f, unsigned long ecount, unsigned long t) |
800eeca4 JW |
1568 | { |
1569 | char bytes[20]; | |
1570 | int count = 1; | |
1571 | if (ecount <= 0x1f) | |
1572 | { | |
1573 | output_B2_format (f, ecount, t); | |
1574 | return; | |
1575 | } | |
1576 | bytes[0] = UNW_B3; | |
1577 | count += output_leb128 (bytes + 1, t, 0); | |
1578 | count += output_leb128 (bytes + count, ecount, 0); | |
1579 | (*f) (count, bytes, NULL); | |
1580 | } | |
1581 | ||
1582 | static void | |
5a49b8ac | 1583 | output_B4_format (vbyte_func f, unw_record_type rtype, unsigned long label) |
800eeca4 JW |
1584 | { |
1585 | char bytes[20]; | |
e0c9811a | 1586 | int r = 0; |
800eeca4 | 1587 | int count = 1; |
197865e8 | 1588 | if (label <= 0x1f) |
800eeca4 JW |
1589 | { |
1590 | output_B1_format (f, rtype, label); | |
1591 | return; | |
1592 | } | |
197865e8 | 1593 | |
e0c9811a JW |
1594 | if (rtype == copy_state) |
1595 | r = 1; | |
1596 | else if (rtype != label_state) | |
ad4b42b4 | 1597 | as_bad (_("Invalid record type for format B1")); |
800eeca4 JW |
1598 | |
1599 | bytes[0] = (UNW_B4 | (r << 3)); | |
1600 | count += output_leb128 (bytes + 1, label, 0); | |
1601 | (*f) (count, bytes, NULL); | |
1602 | } | |
1603 | ||
1604 | static char | |
5a49b8ac | 1605 | format_ab_reg (int ab, int reg) |
800eeca4 JW |
1606 | { |
1607 | int ret; | |
e0c9811a | 1608 | ab = (ab & 3); |
800eeca4 | 1609 | reg = (reg & 0x1f); |
e0c9811a | 1610 | ret = (ab << 5) | reg; |
800eeca4 JW |
1611 | return ret; |
1612 | } | |
1613 | ||
1614 | static void | |
5a49b8ac AM |
1615 | output_X1_format (vbyte_func f, |
1616 | unw_record_type rtype, | |
1617 | int ab, | |
1618 | int reg, | |
1619 | unsigned long t, | |
1620 | unsigned long w1) | |
800eeca4 JW |
1621 | { |
1622 | char bytes[20]; | |
e0c9811a | 1623 | int r = 0; |
800eeca4 JW |
1624 | int count = 2; |
1625 | bytes[0] = UNW_X1; | |
197865e8 | 1626 | |
e0c9811a JW |
1627 | if (rtype == spill_sprel) |
1628 | r = 1; | |
1629 | else if (rtype != spill_psprel) | |
ad4b42b4 | 1630 | as_bad (_("Invalid record type for format X1")); |
e0c9811a | 1631 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1632 | count += output_leb128 (bytes + 2, t, 0); |
1633 | count += output_leb128 (bytes + count, w1, 0); | |
1634 | (*f) (count, bytes, NULL); | |
1635 | } | |
1636 | ||
1637 | static void | |
5a49b8ac AM |
1638 | output_X2_format (vbyte_func f, |
1639 | int ab, | |
1640 | int reg, | |
1641 | int x, | |
1642 | int y, | |
1643 | int treg, | |
1644 | unsigned long t) | |
800eeca4 JW |
1645 | { |
1646 | char bytes[20]; | |
800eeca4 JW |
1647 | int count = 3; |
1648 | bytes[0] = UNW_X2; | |
e0c9811a | 1649 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1650 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1651 | count += output_leb128 (bytes + 3, t, 0); | |
1652 | (*f) (count, bytes, NULL); | |
1653 | } | |
1654 | ||
1655 | static void | |
5a49b8ac AM |
1656 | output_X3_format (vbyte_func f, |
1657 | unw_record_type rtype, | |
1658 | int qp, | |
1659 | int ab, | |
1660 | int reg, | |
1661 | unsigned long t, | |
1662 | unsigned long w1) | |
800eeca4 JW |
1663 | { |
1664 | char bytes[20]; | |
e0c9811a | 1665 | int r = 0; |
800eeca4 | 1666 | int count = 3; |
e0c9811a JW |
1667 | bytes[0] = UNW_X3; |
1668 | ||
1669 | if (rtype == spill_sprel_p) | |
1670 | r = 1; | |
1671 | else if (rtype != spill_psprel_p) | |
ad4b42b4 | 1672 | as_bad (_("Invalid record type for format X3")); |
800eeca4 | 1673 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1674 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1675 | count += output_leb128 (bytes + 3, t, 0); |
1676 | count += output_leb128 (bytes + count, w1, 0); | |
1677 | (*f) (count, bytes, NULL); | |
1678 | } | |
1679 | ||
1680 | static void | |
5a49b8ac AM |
1681 | output_X4_format (vbyte_func f, |
1682 | int qp, | |
1683 | int ab, | |
1684 | int reg, | |
1685 | int x, | |
1686 | int y, | |
1687 | int treg, | |
1688 | unsigned long t) | |
800eeca4 JW |
1689 | { |
1690 | char bytes[20]; | |
800eeca4 | 1691 | int count = 4; |
e0c9811a | 1692 | bytes[0] = UNW_X4; |
800eeca4 | 1693 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1694 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1695 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1696 | count += output_leb128 (bytes + 4, t, 0); | |
1697 | (*f) (count, bytes, NULL); | |
1698 | } | |
1699 | ||
ba825241 JB |
1700 | /* This function checks whether there are any outstanding .save-s and |
1701 | discards them if so. */ | |
1702 | ||
1703 | static void | |
1704 | check_pending_save (void) | |
1705 | { | |
1706 | if (unwind.pending_saves) | |
1707 | { | |
1708 | unw_rec_list *cur, *prev; | |
1709 | ||
ad4b42b4 | 1710 | as_warn (_("Previous .save incomplete")); |
ba825241 JB |
1711 | for (cur = unwind.list, prev = NULL; cur; ) |
1712 | if (&cur->r.record.p == unwind.pending_saves) | |
1713 | { | |
1714 | if (prev) | |
1715 | prev->next = cur->next; | |
1716 | else | |
1717 | unwind.list = cur->next; | |
1718 | if (cur == unwind.tail) | |
1719 | unwind.tail = prev; | |
1720 | if (cur == unwind.current_entry) | |
1721 | unwind.current_entry = cur->next; | |
1722 | /* Don't free the first discarded record, it's being used as | |
1723 | terminator for (currently) br_gr and gr_gr processing, and | |
1724 | also prevents leaving a dangling pointer to it in its | |
1725 | predecessor. */ | |
1726 | cur->r.record.p.grmask = 0; | |
1727 | cur->r.record.p.brmask = 0; | |
1728 | cur->r.record.p.frmask = 0; | |
1729 | prev = cur->r.record.p.next; | |
1730 | cur->r.record.p.next = NULL; | |
1731 | cur = prev; | |
1732 | break; | |
1733 | } | |
1734 | else | |
1735 | { | |
1736 | prev = cur; | |
1737 | cur = cur->next; | |
1738 | } | |
1739 | while (cur) | |
1740 | { | |
1741 | prev = cur; | |
1742 | cur = cur->r.record.p.next; | |
1743 | free (prev); | |
1744 | } | |
1745 | unwind.pending_saves = NULL; | |
1746 | } | |
1747 | } | |
1748 | ||
800eeca4 | 1749 | /* This function allocates a record list structure, and initializes fields. */ |
542d6675 | 1750 | |
800eeca4 | 1751 | static unw_rec_list * |
197865e8 | 1752 | alloc_record (unw_record_type t) |
800eeca4 JW |
1753 | { |
1754 | unw_rec_list *ptr; | |
1755 | ptr = xmalloc (sizeof (*ptr)); | |
ba825241 | 1756 | memset (ptr, 0, sizeof (*ptr)); |
800eeca4 JW |
1757 | ptr->slot_number = SLOT_NUM_NOT_SET; |
1758 | ptr->r.type = t; | |
1759 | return ptr; | |
1760 | } | |
1761 | ||
5738bc24 JW |
1762 | /* Dummy unwind record used for calculating the length of the last prologue or |
1763 | body region. */ | |
1764 | ||
1765 | static unw_rec_list * | |
5a49b8ac | 1766 | output_endp (void) |
5738bc24 JW |
1767 | { |
1768 | unw_rec_list *ptr = alloc_record (endp); | |
1769 | return ptr; | |
1770 | } | |
1771 | ||
800eeca4 | 1772 | static unw_rec_list * |
5a49b8ac | 1773 | output_prologue (void) |
800eeca4 JW |
1774 | { |
1775 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1776 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1777 | return ptr; |
1778 | } | |
1779 | ||
1780 | static unw_rec_list * | |
5a49b8ac | 1781 | output_prologue_gr (unsigned int saved_mask, unsigned int reg) |
800eeca4 JW |
1782 | { |
1783 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1784 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1785 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1786 | ptr->r.record.r.grsave = reg; |
1787 | return ptr; | |
1788 | } | |
1789 | ||
1790 | static unw_rec_list * | |
5a49b8ac | 1791 | output_body (void) |
800eeca4 JW |
1792 | { |
1793 | unw_rec_list *ptr = alloc_record (body); | |
1794 | return ptr; | |
1795 | } | |
1796 | ||
1797 | static unw_rec_list * | |
5a49b8ac | 1798 | output_mem_stack_f (unsigned int size) |
800eeca4 JW |
1799 | { |
1800 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1801 | ptr->r.record.p.size = size; | |
1802 | return ptr; | |
1803 | } | |
1804 | ||
1805 | static unw_rec_list * | |
5a49b8ac | 1806 | output_mem_stack_v (void) |
800eeca4 JW |
1807 | { |
1808 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1809 | return ptr; | |
1810 | } | |
1811 | ||
1812 | static unw_rec_list * | |
5a49b8ac | 1813 | output_psp_gr (unsigned int gr) |
800eeca4 JW |
1814 | { |
1815 | unw_rec_list *ptr = alloc_record (psp_gr); | |
ba825241 | 1816 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1817 | return ptr; |
1818 | } | |
1819 | ||
1820 | static unw_rec_list * | |
5a49b8ac | 1821 | output_psp_sprel (unsigned int offset) |
800eeca4 JW |
1822 | { |
1823 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
ba825241 | 1824 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1825 | return ptr; |
1826 | } | |
1827 | ||
1828 | static unw_rec_list * | |
5a49b8ac | 1829 | output_rp_when (void) |
800eeca4 JW |
1830 | { |
1831 | unw_rec_list *ptr = alloc_record (rp_when); | |
1832 | return ptr; | |
1833 | } | |
1834 | ||
1835 | static unw_rec_list * | |
5a49b8ac | 1836 | output_rp_gr (unsigned int gr) |
800eeca4 JW |
1837 | { |
1838 | unw_rec_list *ptr = alloc_record (rp_gr); | |
ba825241 | 1839 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1840 | return ptr; |
1841 | } | |
1842 | ||
1843 | static unw_rec_list * | |
5a49b8ac | 1844 | output_rp_br (unsigned int br) |
800eeca4 JW |
1845 | { |
1846 | unw_rec_list *ptr = alloc_record (rp_br); | |
ba825241 | 1847 | ptr->r.record.p.r.br = br; |
800eeca4 JW |
1848 | return ptr; |
1849 | } | |
1850 | ||
1851 | static unw_rec_list * | |
5a49b8ac | 1852 | output_rp_psprel (unsigned int offset) |
800eeca4 JW |
1853 | { |
1854 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
ba825241 | 1855 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1856 | return ptr; |
1857 | } | |
1858 | ||
1859 | static unw_rec_list * | |
5a49b8ac | 1860 | output_rp_sprel (unsigned int offset) |
800eeca4 JW |
1861 | { |
1862 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
ba825241 | 1863 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1864 | return ptr; |
1865 | } | |
1866 | ||
1867 | static unw_rec_list * | |
5a49b8ac | 1868 | output_pfs_when (void) |
800eeca4 JW |
1869 | { |
1870 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1871 | return ptr; | |
1872 | } | |
1873 | ||
1874 | static unw_rec_list * | |
5a49b8ac | 1875 | output_pfs_gr (unsigned int gr) |
800eeca4 JW |
1876 | { |
1877 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
ba825241 | 1878 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1879 | return ptr; |
1880 | } | |
1881 | ||
1882 | static unw_rec_list * | |
5a49b8ac | 1883 | output_pfs_psprel (unsigned int offset) |
800eeca4 JW |
1884 | { |
1885 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
ba825241 | 1886 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1887 | return ptr; |
1888 | } | |
1889 | ||
1890 | static unw_rec_list * | |
5a49b8ac | 1891 | output_pfs_sprel (unsigned int offset) |
800eeca4 JW |
1892 | { |
1893 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
ba825241 | 1894 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1895 | return ptr; |
1896 | } | |
1897 | ||
1898 | static unw_rec_list * | |
5a49b8ac | 1899 | output_preds_when (void) |
800eeca4 JW |
1900 | { |
1901 | unw_rec_list *ptr = alloc_record (preds_when); | |
1902 | return ptr; | |
1903 | } | |
1904 | ||
1905 | static unw_rec_list * | |
5a49b8ac | 1906 | output_preds_gr (unsigned int gr) |
800eeca4 JW |
1907 | { |
1908 | unw_rec_list *ptr = alloc_record (preds_gr); | |
ba825241 | 1909 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1910 | return ptr; |
1911 | } | |
1912 | ||
1913 | static unw_rec_list * | |
5a49b8ac | 1914 | output_preds_psprel (unsigned int offset) |
800eeca4 JW |
1915 | { |
1916 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
ba825241 | 1917 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1918 | return ptr; |
1919 | } | |
1920 | ||
1921 | static unw_rec_list * | |
5a49b8ac | 1922 | output_preds_sprel (unsigned int offset) |
800eeca4 JW |
1923 | { |
1924 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
ba825241 | 1925 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1926 | return ptr; |
1927 | } | |
1928 | ||
1929 | static unw_rec_list * | |
5a49b8ac | 1930 | output_fr_mem (unsigned int mask) |
800eeca4 JW |
1931 | { |
1932 | unw_rec_list *ptr = alloc_record (fr_mem); | |
ba825241 JB |
1933 | unw_rec_list *cur = ptr; |
1934 | ||
1935 | ptr->r.record.p.frmask = mask; | |
1936 | unwind.pending_saves = &ptr->r.record.p; | |
1937 | for (;;) | |
1938 | { | |
1939 | unw_rec_list *prev = cur; | |
1940 | ||
1941 | /* Clear least significant set bit. */ | |
1942 | mask &= ~(mask & (~mask + 1)); | |
1943 | if (!mask) | |
1944 | return ptr; | |
1945 | cur = alloc_record (fr_mem); | |
1946 | cur->r.record.p.frmask = mask; | |
1947 | /* Retain only least significant bit. */ | |
1948 | prev->r.record.p.frmask ^= mask; | |
1949 | prev->r.record.p.next = cur; | |
1950 | } | |
800eeca4 JW |
1951 | } |
1952 | ||
1953 | static unw_rec_list * | |
5a49b8ac | 1954 | output_frgr_mem (unsigned int gr_mask, unsigned int fr_mask) |
800eeca4 JW |
1955 | { |
1956 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
ba825241 JB |
1957 | unw_rec_list *cur = ptr; |
1958 | ||
1959 | unwind.pending_saves = &cur->r.record.p; | |
1960 | cur->r.record.p.frmask = fr_mask; | |
1961 | while (fr_mask) | |
1962 | { | |
1963 | unw_rec_list *prev = cur; | |
1964 | ||
1965 | /* Clear least significant set bit. */ | |
1966 | fr_mask &= ~(fr_mask & (~fr_mask + 1)); | |
1967 | if (!gr_mask && !fr_mask) | |
1968 | return ptr; | |
1969 | cur = alloc_record (frgr_mem); | |
1970 | cur->r.record.p.frmask = fr_mask; | |
1971 | /* Retain only least significant bit. */ | |
1972 | prev->r.record.p.frmask ^= fr_mask; | |
1973 | prev->r.record.p.next = cur; | |
1974 | } | |
1975 | cur->r.record.p.grmask = gr_mask; | |
1976 | for (;;) | |
1977 | { | |
1978 | unw_rec_list *prev = cur; | |
1979 | ||
1980 | /* Clear least significant set bit. */ | |
1981 | gr_mask &= ~(gr_mask & (~gr_mask + 1)); | |
1982 | if (!gr_mask) | |
1983 | return ptr; | |
1984 | cur = alloc_record (frgr_mem); | |
1985 | cur->r.record.p.grmask = gr_mask; | |
1986 | /* Retain only least significant bit. */ | |
1987 | prev->r.record.p.grmask ^= gr_mask; | |
1988 | prev->r.record.p.next = cur; | |
1989 | } | |
800eeca4 JW |
1990 | } |
1991 | ||
1992 | static unw_rec_list * | |
5a49b8ac | 1993 | output_gr_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
1994 | { |
1995 | unw_rec_list *ptr = alloc_record (gr_gr); | |
ba825241 JB |
1996 | unw_rec_list *cur = ptr; |
1997 | ||
800eeca4 | 1998 | ptr->r.record.p.grmask = mask; |
ba825241 JB |
1999 | ptr->r.record.p.r.gr = reg; |
2000 | unwind.pending_saves = &ptr->r.record.p; | |
2001 | for (;;) | |
2002 | { | |
2003 | unw_rec_list *prev = cur; | |
2004 | ||
2005 | /* Clear least significant set bit. */ | |
2006 | mask &= ~(mask & (~mask + 1)); | |
2007 | if (!mask) | |
2008 | return ptr; | |
2009 | cur = alloc_record (gr_gr); | |
2010 | cur->r.record.p.grmask = mask; | |
2011 | /* Indicate this record shouldn't be output. */ | |
2012 | cur->r.record.p.r.gr = REG_NUM; | |
2013 | /* Retain only least significant bit. */ | |
2014 | prev->r.record.p.grmask ^= mask; | |
2015 | prev->r.record.p.next = cur; | |
2016 | } | |
800eeca4 JW |
2017 | } |
2018 | ||
2019 | static unw_rec_list * | |
5a49b8ac | 2020 | output_gr_mem (unsigned int mask) |
800eeca4 JW |
2021 | { |
2022 | unw_rec_list *ptr = alloc_record (gr_mem); | |
ba825241 JB |
2023 | unw_rec_list *cur = ptr; |
2024 | ||
2025 | ptr->r.record.p.grmask = mask; | |
2026 | unwind.pending_saves = &ptr->r.record.p; | |
2027 | for (;;) | |
2028 | { | |
2029 | unw_rec_list *prev = cur; | |
2030 | ||
2031 | /* Clear least significant set bit. */ | |
2032 | mask &= ~(mask & (~mask + 1)); | |
2033 | if (!mask) | |
2034 | return ptr; | |
2035 | cur = alloc_record (gr_mem); | |
2036 | cur->r.record.p.grmask = mask; | |
2037 | /* Retain only least significant bit. */ | |
2038 | prev->r.record.p.grmask ^= mask; | |
2039 | prev->r.record.p.next = cur; | |
2040 | } | |
800eeca4 JW |
2041 | } |
2042 | ||
2043 | static unw_rec_list * | |
2044 | output_br_mem (unsigned int mask) | |
2045 | { | |
2046 | unw_rec_list *ptr = alloc_record (br_mem); | |
ba825241 JB |
2047 | unw_rec_list *cur = ptr; |
2048 | ||
800eeca4 | 2049 | ptr->r.record.p.brmask = mask; |
ba825241 JB |
2050 | unwind.pending_saves = &ptr->r.record.p; |
2051 | for (;;) | |
2052 | { | |
2053 | unw_rec_list *prev = cur; | |
2054 | ||
2055 | /* Clear least significant set bit. */ | |
2056 | mask &= ~(mask & (~mask + 1)); | |
2057 | if (!mask) | |
2058 | return ptr; | |
2059 | cur = alloc_record (br_mem); | |
2060 | cur->r.record.p.brmask = mask; | |
2061 | /* Retain only least significant bit. */ | |
2062 | prev->r.record.p.brmask ^= mask; | |
2063 | prev->r.record.p.next = cur; | |
2064 | } | |
800eeca4 JW |
2065 | } |
2066 | ||
2067 | static unw_rec_list * | |
5a49b8ac | 2068 | output_br_gr (unsigned int mask, unsigned int reg) |
800eeca4 JW |
2069 | { |
2070 | unw_rec_list *ptr = alloc_record (br_gr); | |
ba825241 JB |
2071 | unw_rec_list *cur = ptr; |
2072 | ||
2073 | ptr->r.record.p.brmask = mask; | |
2074 | ptr->r.record.p.r.gr = reg; | |
2075 | unwind.pending_saves = &ptr->r.record.p; | |
2076 | for (;;) | |
2077 | { | |
2078 | unw_rec_list *prev = cur; | |
2079 | ||
2080 | /* Clear least significant set bit. */ | |
2081 | mask &= ~(mask & (~mask + 1)); | |
2082 | if (!mask) | |
2083 | return ptr; | |
2084 | cur = alloc_record (br_gr); | |
2085 | cur->r.record.p.brmask = mask; | |
2086 | /* Indicate this record shouldn't be output. */ | |
2087 | cur->r.record.p.r.gr = REG_NUM; | |
2088 | /* Retain only least significant bit. */ | |
2089 | prev->r.record.p.brmask ^= mask; | |
2090 | prev->r.record.p.next = cur; | |
2091 | } | |
800eeca4 JW |
2092 | } |
2093 | ||
2094 | static unw_rec_list * | |
5a49b8ac | 2095 | output_spill_base (unsigned int offset) |
800eeca4 JW |
2096 | { |
2097 | unw_rec_list *ptr = alloc_record (spill_base); | |
ba825241 | 2098 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2099 | return ptr; |
2100 | } | |
2101 | ||
2102 | static unw_rec_list * | |
5a49b8ac | 2103 | output_unat_when (void) |
800eeca4 JW |
2104 | { |
2105 | unw_rec_list *ptr = alloc_record (unat_when); | |
2106 | return ptr; | |
2107 | } | |
2108 | ||
2109 | static unw_rec_list * | |
5a49b8ac | 2110 | output_unat_gr (unsigned int gr) |
800eeca4 JW |
2111 | { |
2112 | unw_rec_list *ptr = alloc_record (unat_gr); | |
ba825241 | 2113 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2114 | return ptr; |
2115 | } | |
2116 | ||
2117 | static unw_rec_list * | |
5a49b8ac | 2118 | output_unat_psprel (unsigned int offset) |
800eeca4 JW |
2119 | { |
2120 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
ba825241 | 2121 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2122 | return ptr; |
2123 | } | |
2124 | ||
2125 | static unw_rec_list * | |
5a49b8ac | 2126 | output_unat_sprel (unsigned int offset) |
800eeca4 JW |
2127 | { |
2128 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
ba825241 | 2129 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2130 | return ptr; |
2131 | } | |
2132 | ||
2133 | static unw_rec_list * | |
5a49b8ac | 2134 | output_lc_when (void) |
800eeca4 JW |
2135 | { |
2136 | unw_rec_list *ptr = alloc_record (lc_when); | |
2137 | return ptr; | |
2138 | } | |
2139 | ||
2140 | static unw_rec_list * | |
5a49b8ac | 2141 | output_lc_gr (unsigned int gr) |
800eeca4 JW |
2142 | { |
2143 | unw_rec_list *ptr = alloc_record (lc_gr); | |
ba825241 | 2144 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2145 | return ptr; |
2146 | } | |
2147 | ||
2148 | static unw_rec_list * | |
5a49b8ac | 2149 | output_lc_psprel (unsigned int offset) |
800eeca4 JW |
2150 | { |
2151 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
ba825241 | 2152 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2153 | return ptr; |
2154 | } | |
2155 | ||
2156 | static unw_rec_list * | |
5a49b8ac | 2157 | output_lc_sprel (unsigned int offset) |
800eeca4 JW |
2158 | { |
2159 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
ba825241 | 2160 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2161 | return ptr; |
2162 | } | |
2163 | ||
2164 | static unw_rec_list * | |
5a49b8ac | 2165 | output_fpsr_when (void) |
800eeca4 JW |
2166 | { |
2167 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2168 | return ptr; | |
2169 | } | |
2170 | ||
2171 | static unw_rec_list * | |
5a49b8ac | 2172 | output_fpsr_gr (unsigned int gr) |
800eeca4 JW |
2173 | { |
2174 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
ba825241 | 2175 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2176 | return ptr; |
2177 | } | |
2178 | ||
2179 | static unw_rec_list * | |
5a49b8ac | 2180 | output_fpsr_psprel (unsigned int offset) |
800eeca4 JW |
2181 | { |
2182 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
ba825241 | 2183 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2184 | return ptr; |
2185 | } | |
2186 | ||
2187 | static unw_rec_list * | |
5a49b8ac | 2188 | output_fpsr_sprel (unsigned int offset) |
800eeca4 JW |
2189 | { |
2190 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
ba825241 | 2191 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2192 | return ptr; |
2193 | } | |
2194 | ||
2195 | static unw_rec_list * | |
5a49b8ac | 2196 | output_priunat_when_gr (void) |
800eeca4 JW |
2197 | { |
2198 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2199 | return ptr; | |
2200 | } | |
2201 | ||
2202 | static unw_rec_list * | |
5a49b8ac | 2203 | output_priunat_when_mem (void) |
800eeca4 JW |
2204 | { |
2205 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2206 | return ptr; | |
2207 | } | |
2208 | ||
2209 | static unw_rec_list * | |
5a49b8ac | 2210 | output_priunat_gr (unsigned int gr) |
800eeca4 JW |
2211 | { |
2212 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
ba825241 | 2213 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2214 | return ptr; |
2215 | } | |
2216 | ||
2217 | static unw_rec_list * | |
5a49b8ac | 2218 | output_priunat_psprel (unsigned int offset) |
800eeca4 JW |
2219 | { |
2220 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
ba825241 | 2221 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2222 | return ptr; |
2223 | } | |
2224 | ||
2225 | static unw_rec_list * | |
5a49b8ac | 2226 | output_priunat_sprel (unsigned int offset) |
800eeca4 JW |
2227 | { |
2228 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
ba825241 | 2229 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2230 | return ptr; |
2231 | } | |
2232 | ||
2233 | static unw_rec_list * | |
5a49b8ac | 2234 | output_bsp_when (void) |
800eeca4 JW |
2235 | { |
2236 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2237 | return ptr; | |
2238 | } | |
2239 | ||
2240 | static unw_rec_list * | |
5a49b8ac | 2241 | output_bsp_gr (unsigned int gr) |
800eeca4 JW |
2242 | { |
2243 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
ba825241 | 2244 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2245 | return ptr; |
2246 | } | |
2247 | ||
2248 | static unw_rec_list * | |
5a49b8ac | 2249 | output_bsp_psprel (unsigned int offset) |
800eeca4 JW |
2250 | { |
2251 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
ba825241 | 2252 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2253 | return ptr; |
2254 | } | |
2255 | ||
2256 | static unw_rec_list * | |
5a49b8ac | 2257 | output_bsp_sprel (unsigned int offset) |
800eeca4 JW |
2258 | { |
2259 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
ba825241 | 2260 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2261 | return ptr; |
2262 | } | |
2263 | ||
2264 | static unw_rec_list * | |
5a49b8ac | 2265 | output_bspstore_when (void) |
800eeca4 JW |
2266 | { |
2267 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2268 | return ptr; | |
2269 | } | |
2270 | ||
2271 | static unw_rec_list * | |
5a49b8ac | 2272 | output_bspstore_gr (unsigned int gr) |
800eeca4 JW |
2273 | { |
2274 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
ba825241 | 2275 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2276 | return ptr; |
2277 | } | |
2278 | ||
2279 | static unw_rec_list * | |
5a49b8ac | 2280 | output_bspstore_psprel (unsigned int offset) |
800eeca4 JW |
2281 | { |
2282 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
ba825241 | 2283 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2284 | return ptr; |
2285 | } | |
2286 | ||
2287 | static unw_rec_list * | |
5a49b8ac | 2288 | output_bspstore_sprel (unsigned int offset) |
800eeca4 JW |
2289 | { |
2290 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
ba825241 | 2291 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2292 | return ptr; |
2293 | } | |
2294 | ||
2295 | static unw_rec_list * | |
5a49b8ac | 2296 | output_rnat_when (void) |
800eeca4 JW |
2297 | { |
2298 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2299 | return ptr; | |
2300 | } | |
2301 | ||
2302 | static unw_rec_list * | |
5a49b8ac | 2303 | output_rnat_gr (unsigned int gr) |
800eeca4 JW |
2304 | { |
2305 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
ba825241 | 2306 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2307 | return ptr; |
2308 | } | |
2309 | ||
2310 | static unw_rec_list * | |
5a49b8ac | 2311 | output_rnat_psprel (unsigned int offset) |
800eeca4 JW |
2312 | { |
2313 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
ba825241 | 2314 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2315 | return ptr; |
2316 | } | |
2317 | ||
2318 | static unw_rec_list * | |
5a49b8ac | 2319 | output_rnat_sprel (unsigned int offset) |
800eeca4 JW |
2320 | { |
2321 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
ba825241 | 2322 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2323 | return ptr; |
2324 | } | |
2325 | ||
2326 | static unw_rec_list * | |
5a49b8ac | 2327 | output_unwabi (unsigned long abi, unsigned long context) |
800eeca4 | 2328 | { |
e0c9811a JW |
2329 | unw_rec_list *ptr = alloc_record (unwabi); |
2330 | ptr->r.record.p.abi = abi; | |
2331 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2332 | return ptr; |
2333 | } | |
2334 | ||
2335 | static unw_rec_list * | |
e0c9811a | 2336 | output_epilogue (unsigned long ecount) |
800eeca4 | 2337 | { |
e0c9811a JW |
2338 | unw_rec_list *ptr = alloc_record (epilogue); |
2339 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2340 | return ptr; |
2341 | } | |
2342 | ||
2343 | static unw_rec_list * | |
e0c9811a | 2344 | output_label_state (unsigned long label) |
800eeca4 | 2345 | { |
e0c9811a JW |
2346 | unw_rec_list *ptr = alloc_record (label_state); |
2347 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2348 | return ptr; |
2349 | } | |
2350 | ||
2351 | static unw_rec_list * | |
e0c9811a JW |
2352 | output_copy_state (unsigned long label) |
2353 | { | |
2354 | unw_rec_list *ptr = alloc_record (copy_state); | |
2355 | ptr->r.record.b.label = label; | |
2356 | return ptr; | |
2357 | } | |
2358 | ||
2359 | static unw_rec_list * | |
5a49b8ac AM |
2360 | output_spill_psprel (unsigned int ab, |
2361 | unsigned int reg, | |
2362 | unsigned int offset, | |
2363 | unsigned int predicate) | |
800eeca4 | 2364 | { |
e4e8248d | 2365 | unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); |
e0c9811a | 2366 | ptr->r.record.x.ab = ab; |
800eeca4 | 2367 | ptr->r.record.x.reg = reg; |
ba825241 | 2368 | ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2369 | ptr->r.record.x.qp = predicate; |
2370 | return ptr; | |
2371 | } | |
2372 | ||
2373 | static unw_rec_list * | |
5a49b8ac AM |
2374 | output_spill_sprel (unsigned int ab, |
2375 | unsigned int reg, | |
2376 | unsigned int offset, | |
2377 | unsigned int predicate) | |
800eeca4 | 2378 | { |
e4e8248d | 2379 | unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); |
e0c9811a | 2380 | ptr->r.record.x.ab = ab; |
800eeca4 | 2381 | ptr->r.record.x.reg = reg; |
ba825241 | 2382 | ptr->r.record.x.where.spoff = offset / 4; |
800eeca4 JW |
2383 | ptr->r.record.x.qp = predicate; |
2384 | return ptr; | |
2385 | } | |
2386 | ||
2387 | static unw_rec_list * | |
5a49b8ac AM |
2388 | output_spill_reg (unsigned int ab, |
2389 | unsigned int reg, | |
2390 | unsigned int targ_reg, | |
2391 | unsigned int xy, | |
2392 | unsigned int predicate) | |
800eeca4 | 2393 | { |
e4e8248d | 2394 | unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); |
e0c9811a | 2395 | ptr->r.record.x.ab = ab; |
800eeca4 | 2396 | ptr->r.record.x.reg = reg; |
ba825241 | 2397 | ptr->r.record.x.where.reg = targ_reg; |
800eeca4 JW |
2398 | ptr->r.record.x.xy = xy; |
2399 | ptr->r.record.x.qp = predicate; | |
2400 | return ptr; | |
2401 | } | |
2402 | ||
197865e8 | 2403 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2404 | specified function. */ |
542d6675 | 2405 | |
800eeca4 | 2406 | static void |
5a49b8ac | 2407 | process_one_record (unw_rec_list *ptr, vbyte_func f) |
800eeca4 | 2408 | { |
ba825241 | 2409 | unsigned int fr_mask, gr_mask; |
e0c9811a | 2410 | |
197865e8 | 2411 | switch (ptr->r.type) |
800eeca4 | 2412 | { |
5738bc24 JW |
2413 | /* This is a dummy record that takes up no space in the output. */ |
2414 | case endp: | |
2415 | break; | |
2416 | ||
542d6675 KH |
2417 | case gr_mem: |
2418 | case fr_mem: | |
2419 | case br_mem: | |
2420 | case frgr_mem: | |
2421 | /* These are taken care of by prologue/prologue_gr. */ | |
2422 | break; | |
e0c9811a | 2423 | |
542d6675 KH |
2424 | case prologue_gr: |
2425 | case prologue: | |
2426 | if (ptr->r.type == prologue_gr) | |
2427 | output_R2_format (f, ptr->r.record.r.grmask, | |
2428 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2429 | else | |
800eeca4 | 2430 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2431 | |
2432 | /* Output descriptor(s) for union of register spills (if any). */ | |
2433 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2434 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2435 | if (fr_mask) | |
2436 | { | |
2437 | if ((fr_mask & ~0xfUL) == 0) | |
2438 | output_P6_format (f, fr_mem, fr_mask); | |
2439 | else | |
2440 | { | |
2441 | output_P5_format (f, gr_mask, fr_mask); | |
2442 | gr_mask = 0; | |
2443 | } | |
2444 | } | |
2445 | if (gr_mask) | |
2446 | output_P6_format (f, gr_mem, gr_mask); | |
2447 | if (ptr->r.record.r.mask.br_mem) | |
2448 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2449 | ||
2450 | /* output imask descriptor if necessary: */ | |
2451 | if (ptr->r.record.r.mask.i) | |
2452 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2453 | ptr->r.record.r.imask_size); | |
2454 | break; | |
2455 | ||
2456 | case body: | |
2457 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2458 | break; | |
2459 | case mem_stack_f: | |
2460 | case mem_stack_v: | |
2461 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2462 | ptr->r.record.p.size); | |
2463 | break; | |
2464 | case psp_gr: | |
2465 | case rp_gr: | |
2466 | case pfs_gr: | |
2467 | case preds_gr: | |
2468 | case unat_gr: | |
2469 | case lc_gr: | |
2470 | case fpsr_gr: | |
2471 | case priunat_gr: | |
2472 | case bsp_gr: | |
2473 | case bspstore_gr: | |
2474 | case rnat_gr: | |
ba825241 | 2475 | output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); |
542d6675 KH |
2476 | break; |
2477 | case rp_br: | |
ba825241 | 2478 | output_P3_format (f, rp_br, ptr->r.record.p.r.br); |
542d6675 KH |
2479 | break; |
2480 | case psp_sprel: | |
ba825241 | 2481 | output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); |
542d6675 KH |
2482 | break; |
2483 | case rp_when: | |
2484 | case pfs_when: | |
2485 | case preds_when: | |
2486 | case unat_when: | |
2487 | case lc_when: | |
2488 | case fpsr_when: | |
2489 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2490 | break; | |
2491 | case rp_psprel: | |
2492 | case pfs_psprel: | |
2493 | case preds_psprel: | |
2494 | case unat_psprel: | |
2495 | case lc_psprel: | |
2496 | case fpsr_psprel: | |
2497 | case spill_base: | |
ba825241 | 2498 | output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); |
542d6675 KH |
2499 | break; |
2500 | case rp_sprel: | |
2501 | case pfs_sprel: | |
2502 | case preds_sprel: | |
2503 | case unat_sprel: | |
2504 | case lc_sprel: | |
2505 | case fpsr_sprel: | |
2506 | case priunat_sprel: | |
2507 | case bsp_sprel: | |
2508 | case bspstore_sprel: | |
2509 | case rnat_sprel: | |
ba825241 | 2510 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); |
542d6675 KH |
2511 | break; |
2512 | case gr_gr: | |
ba825241 JB |
2513 | if (ptr->r.record.p.r.gr < REG_NUM) |
2514 | { | |
2515 | const unw_rec_list *cur = ptr; | |
2516 | ||
2517 | gr_mask = cur->r.record.p.grmask; | |
2518 | while ((cur = cur->r.record.p.next) != NULL) | |
2519 | gr_mask |= cur->r.record.p.grmask; | |
2520 | output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2521 | } | |
542d6675 KH |
2522 | break; |
2523 | case br_gr: | |
ba825241 JB |
2524 | if (ptr->r.record.p.r.gr < REG_NUM) |
2525 | { | |
2526 | const unw_rec_list *cur = ptr; | |
2527 | ||
2528 | gr_mask = cur->r.record.p.brmask; | |
2529 | while ((cur = cur->r.record.p.next) != NULL) | |
2530 | gr_mask |= cur->r.record.p.brmask; | |
2531 | output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2532 | } | |
542d6675 KH |
2533 | break; |
2534 | case spill_mask: | |
ad4b42b4 | 2535 | as_bad (_("spill_mask record unimplemented.")); |
542d6675 KH |
2536 | break; |
2537 | case priunat_when_gr: | |
2538 | case priunat_when_mem: | |
2539 | case bsp_when: | |
2540 | case bspstore_when: | |
2541 | case rnat_when: | |
2542 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2543 | break; | |
2544 | case priunat_psprel: | |
2545 | case bsp_psprel: | |
2546 | case bspstore_psprel: | |
2547 | case rnat_psprel: | |
ba825241 | 2548 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); |
542d6675 KH |
2549 | break; |
2550 | case unwabi: | |
2551 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2552 | break; | |
2553 | case epilogue: | |
2554 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2555 | break; | |
2556 | case label_state: | |
2557 | case copy_state: | |
2558 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2559 | break; | |
2560 | case spill_psprel: | |
2561 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2562 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2563 | ptr->r.record.x.where.pspoff); |
542d6675 KH |
2564 | break; |
2565 | case spill_sprel: | |
2566 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2567 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2568 | ptr->r.record.x.where.spoff); |
542d6675 KH |
2569 | break; |
2570 | case spill_reg: | |
2571 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2572 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
ba825241 | 2573 | ptr->r.record.x.where.reg, ptr->r.record.x.t); |
542d6675 KH |
2574 | break; |
2575 | case spill_psprel_p: | |
2576 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2577 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2578 | ptr->r.record.x.t, ptr->r.record.x.where.pspoff); |
542d6675 KH |
2579 | break; |
2580 | case spill_sprel_p: | |
2581 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2582 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2583 | ptr->r.record.x.t, ptr->r.record.x.where.spoff); |
542d6675 KH |
2584 | break; |
2585 | case spill_reg_p: | |
2586 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2587 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
ba825241 | 2588 | ptr->r.record.x.xy, ptr->r.record.x.where.reg, |
542d6675 KH |
2589 | ptr->r.record.x.t); |
2590 | break; | |
2591 | default: | |
ad4b42b4 | 2592 | as_bad (_("record_type_not_valid")); |
542d6675 | 2593 | break; |
800eeca4 JW |
2594 | } |
2595 | } | |
2596 | ||
197865e8 | 2597 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2598 | the specified function. */ |
2599 | static void | |
5a49b8ac | 2600 | process_unw_records (unw_rec_list *list, vbyte_func f) |
800eeca4 JW |
2601 | { |
2602 | unw_rec_list *ptr; | |
2603 | for (ptr = list; ptr; ptr = ptr->next) | |
2604 | process_one_record (ptr, f); | |
2605 | } | |
2606 | ||
2607 | /* Determine the size of a record list in bytes. */ | |
2608 | static int | |
5a49b8ac | 2609 | calc_record_size (unw_rec_list *list) |
800eeca4 JW |
2610 | { |
2611 | vbyte_count = 0; | |
2612 | process_unw_records (list, count_output); | |
2613 | return vbyte_count; | |
2614 | } | |
2615 | ||
e4e8248d JB |
2616 | /* Return the number of bits set in the input value. |
2617 | Perhaps this has a better place... */ | |
2618 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) | |
2619 | # define popcount __builtin_popcount | |
2620 | #else | |
2621 | static int | |
2622 | popcount (unsigned x) | |
2623 | { | |
2624 | static const unsigned char popcnt[16] = | |
2625 | { | |
2626 | 0, 1, 1, 2, | |
2627 | 1, 2, 2, 3, | |
2628 | 1, 2, 2, 3, | |
2629 | 2, 3, 3, 4 | |
2630 | }; | |
2631 | ||
2632 | if (x < NELEMS (popcnt)) | |
2633 | return popcnt[x]; | |
2634 | return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); | |
2635 | } | |
2636 | #endif | |
2637 | ||
e0c9811a JW |
2638 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2639 | of type TYPE are saved starting at instruction with index T. If N | |
2640 | bits are set in REGMASK, it is assumed that instructions T through | |
2641 | T+N-1 save these registers. | |
2642 | ||
2643 | TYPE values: | |
2644 | 0: no save | |
2645 | 1: instruction saves next fp reg | |
2646 | 2: instruction saves next general reg | |
2647 | 3: instruction saves next branch reg */ | |
2648 | static void | |
5a49b8ac AM |
2649 | set_imask (unw_rec_list *region, |
2650 | unsigned long regmask, | |
2651 | unsigned long t, | |
2652 | unsigned int type) | |
e0c9811a JW |
2653 | { |
2654 | unsigned char *imask; | |
2655 | unsigned long imask_size; | |
2656 | unsigned int i; | |
2657 | int pos; | |
2658 | ||
2659 | imask = region->r.record.r.mask.i; | |
2660 | imask_size = region->r.record.r.imask_size; | |
2661 | if (!imask) | |
2662 | { | |
542d6675 | 2663 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2664 | imask = xmalloc (imask_size); |
2665 | memset (imask, 0, imask_size); | |
2666 | ||
2667 | region->r.record.r.imask_size = imask_size; | |
2668 | region->r.record.r.mask.i = imask; | |
2669 | } | |
2670 | ||
542d6675 KH |
2671 | i = (t / 4) + 1; |
2672 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2673 | while (regmask) |
2674 | { | |
2675 | if (i >= imask_size) | |
2676 | { | |
ad4b42b4 | 2677 | as_bad (_("Ignoring attempt to spill beyond end of region")); |
e0c9811a JW |
2678 | return; |
2679 | } | |
2680 | ||
2681 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2682 | |
e0c9811a JW |
2683 | regmask &= (regmask - 1); |
2684 | pos -= 2; | |
2685 | if (pos < 0) | |
2686 | { | |
2687 | pos = 0; | |
2688 | ++i; | |
2689 | } | |
2690 | } | |
2691 | } | |
2692 | ||
f5a30c2e JW |
2693 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2694 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2695 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2696 | for frag sizes. */ | |
f5a30c2e | 2697 | |
5a49b8ac AM |
2698 | static unsigned long |
2699 | slot_index (unsigned long slot_addr, | |
2700 | fragS *slot_frag, | |
2701 | unsigned long first_addr, | |
2702 | fragS *first_frag, | |
2703 | int before_relax) | |
e0c9811a | 2704 | { |
91d6fa6a | 2705 | unsigned long s_index = 0; |
f5a30c2e JW |
2706 | |
2707 | /* First time we are called, the initial address and frag are invalid. */ | |
2708 | if (first_addr == 0) | |
2709 | return 0; | |
2710 | ||
2711 | /* If the two addresses are in different frags, then we need to add in | |
2712 | the remaining size of this frag, and then the entire size of intermediate | |
2713 | frags. */ | |
4dddc1d1 | 2714 | while (slot_frag != first_frag) |
f5a30c2e JW |
2715 | { |
2716 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2717 | ||
b5e0fabd | 2718 | if (! before_relax) |
73f20958 | 2719 | { |
b5e0fabd JW |
2720 | /* We can get the final addresses only during and after |
2721 | relaxation. */ | |
73f20958 | 2722 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
91d6fa6a | 2723 | s_index += 3 * ((first_frag->fr_next->fr_address |
73f20958 L |
2724 | - first_frag->fr_address |
2725 | - first_frag->fr_fix) >> 4); | |
2726 | } | |
2727 | else | |
2728 | /* We don't know what the final addresses will be. We try our | |
2729 | best to estimate. */ | |
2730 | switch (first_frag->fr_type) | |
2731 | { | |
2732 | default: | |
2733 | break; | |
2734 | ||
2735 | case rs_space: | |
ad4b42b4 | 2736 | as_fatal (_("Only constant space allocation is supported")); |
73f20958 L |
2737 | break; |
2738 | ||
2739 | case rs_align: | |
2740 | case rs_align_code: | |
2741 | case rs_align_test: | |
2742 | /* Take alignment into account. Assume the worst case | |
2743 | before relaxation. */ | |
91d6fa6a | 2744 | s_index += 3 * ((1 << first_frag->fr_offset) >> 4); |
73f20958 L |
2745 | break; |
2746 | ||
2747 | case rs_org: | |
2748 | if (first_frag->fr_symbol) | |
2749 | { | |
ad4b42b4 | 2750 | as_fatal (_("Only constant offsets are supported")); |
73f20958 L |
2751 | break; |
2752 | } | |
2753 | case rs_fill: | |
91d6fa6a | 2754 | s_index += 3 * (first_frag->fr_offset >> 4); |
73f20958 L |
2755 | break; |
2756 | } | |
2757 | ||
f5a30c2e | 2758 | /* Add in the full size of the frag converted to instruction slots. */ |
91d6fa6a | 2759 | s_index += 3 * (first_frag->fr_fix >> 4); |
f5a30c2e | 2760 | /* Subtract away the initial part before first_addr. */ |
91d6fa6a | 2761 | s_index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) |
f5a30c2e | 2762 | + ((first_addr & 0x3) - (start_addr & 0x3))); |
e0c9811a | 2763 | |
f5a30c2e JW |
2764 | /* Move to the beginning of the next frag. */ |
2765 | first_frag = first_frag->fr_next; | |
2766 | first_addr = (unsigned long) &first_frag->fr_literal; | |
4dddc1d1 JW |
2767 | |
2768 | /* This can happen if there is section switching in the middle of a | |
cb3b8d91 JW |
2769 | function, causing the frag chain for the function to be broken. |
2770 | It is too difficult to recover safely from this problem, so we just | |
2771 | exit with an error. */ | |
4dddc1d1 | 2772 | if (first_frag == NULL) |
ad4b42b4 | 2773 | as_fatal (_("Section switching in code is not supported.")); |
f5a30c2e JW |
2774 | } |
2775 | ||
2776 | /* Add in the used part of the last frag. */ | |
91d6fa6a | 2777 | s_index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) |
f5a30c2e | 2778 | + ((slot_addr & 0x3) - (first_addr & 0x3))); |
91d6fa6a | 2779 | return s_index; |
f5a30c2e | 2780 | } |
4a1805b1 | 2781 | |
91a2ae2a RH |
2782 | /* Optimize unwind record directives. */ |
2783 | ||
2784 | static unw_rec_list * | |
5a49b8ac | 2785 | optimize_unw_records (unw_rec_list *list) |
91a2ae2a RH |
2786 | { |
2787 | if (!list) | |
2788 | return NULL; | |
2789 | ||
2790 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2791 | by ".body", then we can optimize the unwind directives away. */ | |
2792 | if (list->r.type == prologue | |
5738bc24 JW |
2793 | && (list->next->r.type == endp |
2794 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2795 | return NULL; |
2796 | ||
2797 | return list; | |
2798 | } | |
2799 | ||
800eeca4 JW |
2800 | /* Given a complete record list, process any records which have |
2801 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2802 | this has been run, all necessary information should be available |
800eeca4 | 2803 | within each record to generate an image. */ |
542d6675 | 2804 | |
800eeca4 | 2805 | static void |
5a49b8ac | 2806 | fixup_unw_records (unw_rec_list *list, int before_relax) |
800eeca4 | 2807 | { |
e0c9811a JW |
2808 | unw_rec_list *ptr, *region = 0; |
2809 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2810 | fragS *first_frag = 0; |
e0c9811a | 2811 | |
800eeca4 JW |
2812 | for (ptr = list; ptr; ptr = ptr->next) |
2813 | { | |
2814 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
ad4b42b4 | 2815 | as_bad (_(" Insn slot not set in unwind record.")); |
f5a30c2e | 2816 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2817 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2818 | switch (ptr->r.type) |
2819 | { | |
542d6675 KH |
2820 | case prologue: |
2821 | case prologue_gr: | |
2822 | case body: | |
2823 | { | |
2824 | unw_rec_list *last; | |
5738bc24 JW |
2825 | int size; |
2826 | unsigned long last_addr = 0; | |
2827 | fragS *last_frag = NULL; | |
542d6675 KH |
2828 | |
2829 | first_addr = ptr->slot_number; | |
f5a30c2e | 2830 | first_frag = ptr->slot_frag; |
542d6675 | 2831 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2832 | the function, and determine the size of the region. */ |
542d6675 KH |
2833 | for (last = ptr->next; last != NULL; last = last->next) |
2834 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2835 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2836 | { |
2837 | last_addr = last->slot_number; | |
f5a30c2e | 2838 | last_frag = last->slot_frag; |
542d6675 KH |
2839 | break; |
2840 | } | |
b5e0fabd JW |
2841 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2842 | before_relax); | |
542d6675 | 2843 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2844 | if (ptr->r.type == body) |
2845 | /* End of region. */ | |
2846 | region = 0; | |
2847 | else | |
2848 | region = ptr; | |
e0c9811a | 2849 | break; |
542d6675 KH |
2850 | } |
2851 | case epilogue: | |
ed7af9f9 L |
2852 | if (t < rlen) |
2853 | ptr->r.record.b.t = rlen - 1 - t; | |
2854 | else | |
2855 | /* This happens when a memory-stack-less procedure uses a | |
2856 | ".restore sp" directive at the end of a region to pop | |
2857 | the frame state. */ | |
2858 | ptr->r.record.b.t = 0; | |
542d6675 | 2859 | break; |
e0c9811a | 2860 | |
542d6675 KH |
2861 | case mem_stack_f: |
2862 | case mem_stack_v: | |
2863 | case rp_when: | |
2864 | case pfs_when: | |
2865 | case preds_when: | |
2866 | case unat_when: | |
2867 | case lc_when: | |
2868 | case fpsr_when: | |
2869 | case priunat_when_gr: | |
2870 | case priunat_when_mem: | |
2871 | case bsp_when: | |
2872 | case bspstore_when: | |
2873 | case rnat_when: | |
2874 | ptr->r.record.p.t = t; | |
2875 | break; | |
e0c9811a | 2876 | |
542d6675 KH |
2877 | case spill_reg: |
2878 | case spill_sprel: | |
2879 | case spill_psprel: | |
2880 | case spill_reg_p: | |
2881 | case spill_sprel_p: | |
2882 | case spill_psprel_p: | |
2883 | ptr->r.record.x.t = t; | |
2884 | break; | |
e0c9811a | 2885 | |
542d6675 KH |
2886 | case frgr_mem: |
2887 | if (!region) | |
2888 | { | |
ad4b42b4 | 2889 | as_bad (_("frgr_mem record before region record!")); |
542d6675 KH |
2890 | return; |
2891 | } | |
2892 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2893 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2894 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2895 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2896 | break; | |
2897 | case fr_mem: | |
2898 | if (!region) | |
2899 | { | |
ad4b42b4 | 2900 | as_bad (_("fr_mem record before region record!")); |
542d6675 KH |
2901 | return; |
2902 | } | |
ba825241 JB |
2903 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; |
2904 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
542d6675 KH |
2905 | break; |
2906 | case gr_mem: | |
2907 | if (!region) | |
2908 | { | |
ad4b42b4 | 2909 | as_bad (_("gr_mem record before region record!")); |
542d6675 KH |
2910 | return; |
2911 | } | |
ba825241 JB |
2912 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; |
2913 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
542d6675 KH |
2914 | break; |
2915 | case br_mem: | |
2916 | if (!region) | |
2917 | { | |
ad4b42b4 | 2918 | as_bad (_("br_mem record before region record!")); |
542d6675 KH |
2919 | return; |
2920 | } | |
2921 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2922 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2923 | break; | |
e0c9811a | 2924 | |
542d6675 KH |
2925 | case gr_gr: |
2926 | if (!region) | |
2927 | { | |
ad4b42b4 | 2928 | as_bad (_("gr_gr record before region record!")); |
542d6675 KH |
2929 | return; |
2930 | } | |
2931 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2932 | break; | |
2933 | case br_gr: | |
2934 | if (!region) | |
2935 | { | |
ad4b42b4 | 2936 | as_bad (_("br_gr record before region record!")); |
542d6675 KH |
2937 | return; |
2938 | } | |
2939 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2940 | break; | |
e0c9811a | 2941 | |
542d6675 KH |
2942 | default: |
2943 | break; | |
800eeca4 JW |
2944 | } |
2945 | } | |
2946 | } | |
2947 | ||
b5e0fabd JW |
2948 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2949 | to handle here, which is the unwind info frag. */ | |
2950 | ||
2951 | int | |
2952 | ia64_estimate_size_before_relax (fragS *frag, | |
2953 | asection *segtype ATTRIBUTE_UNUSED) | |
2954 | { | |
2955 | unw_rec_list *list; | |
2956 | int len, size, pad; | |
2957 | ||
2958 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2959 | list = (unw_rec_list *) frag->fr_opcode; | |
2960 | fixup_unw_records (list, 0); | |
2961 | ||
2962 | len = calc_record_size (list); | |
2963 | /* pad to pointer-size boundary. */ | |
2964 | pad = len % md.pointer_size; | |
2965 | if (pad != 0) | |
2966 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2967 | /* Add 8 for the header. */ |
2968 | size = len + 8; | |
2969 | /* Add a pointer for the personality offset. */ | |
2970 | if (frag->fr_offset) | |
2971 | size += md.pointer_size; | |
b5e0fabd JW |
2972 | |
2973 | /* fr_var carries the max_chars that we created the fragment with. | |
2974 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 2975 | gas_assert (frag->fr_var >= size); |
b5e0fabd JW |
2976 | |
2977 | return frag->fr_fix + size; | |
2978 | } | |
2979 | ||
73f20958 L |
2980 | /* This function converts a rs_machine_dependent variant frag into a |
2981 | normal fill frag with the unwind image from the the record list. */ | |
2982 | void | |
2983 | ia64_convert_frag (fragS *frag) | |
557debba | 2984 | { |
73f20958 L |
2985 | unw_rec_list *list; |
2986 | int len, size, pad; | |
1cd8ff38 | 2987 | valueT flag_value; |
557debba | 2988 | |
b5e0fabd | 2989 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2990 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2991 | fixup_unw_records (list, 0); |
1cd8ff38 | 2992 | |
73f20958 L |
2993 | len = calc_record_size (list); |
2994 | /* pad to pointer-size boundary. */ | |
2995 | pad = len % md.pointer_size; | |
2996 | if (pad != 0) | |
2997 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2998 | /* Add 8 for the header. */ |
2999 | size = len + 8; | |
3000 | /* Add a pointer for the personality offset. */ | |
3001 | if (frag->fr_offset) | |
3002 | size += md.pointer_size; | |
73f20958 L |
3003 | |
3004 | /* fr_var carries the max_chars that we created the fragment with. | |
3005 | We must, of course, have allocated enough memory earlier. */ | |
9c2799c2 | 3006 | gas_assert (frag->fr_var >= size); |
73f20958 L |
3007 | |
3008 | /* Initialize the header area. fr_offset is initialized with | |
3009 | unwind.personality_routine. */ | |
3010 | if (frag->fr_offset) | |
1cd8ff38 NC |
3011 | { |
3012 | if (md.flags & EF_IA_64_ABI64) | |
3013 | flag_value = (bfd_vma) 3 << 32; | |
3014 | else | |
3015 | /* 32-bit unwind info block. */ | |
3016 | flag_value = (bfd_vma) 0x1003 << 32; | |
3017 | } | |
3018 | else | |
3019 | flag_value = 0; | |
557debba | 3020 | |
73f20958 L |
3021 | md_number_to_chars (frag->fr_literal, |
3022 | (((bfd_vma) 1 << 48) /* Version. */ | |
3023 | | flag_value /* U & E handler flags. */ | |
3024 | | (len / md.pointer_size)), /* Length. */ | |
3025 | 8); | |
557debba | 3026 | |
73f20958 L |
3027 | /* Skip the header. */ |
3028 | vbyte_mem_ptr = frag->fr_literal + 8; | |
3029 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
3030 | |
3031 | /* Fill the padding bytes with zeros. */ | |
3032 | if (pad != 0) | |
3033 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
3034 | md.pointer_size - pad); | |
417c21b7 AO |
3035 | /* Fill the unwind personality with zeros. */ |
3036 | if (frag->fr_offset) | |
3037 | md_number_to_chars (frag->fr_literal + size - md.pointer_size, 0, | |
3038 | md.pointer_size); | |
d6e78c11 | 3039 | |
73f20958 L |
3040 | frag->fr_fix += size; |
3041 | frag->fr_type = rs_fill; | |
3042 | frag->fr_var = 0; | |
3043 | frag->fr_offset = 0; | |
800eeca4 JW |
3044 | } |
3045 | ||
e0c9811a | 3046 | static int |
5a49b8ac | 3047 | parse_predicate_and_operand (expressionS *e, unsigned *qp, const char *po) |
e4e8248d | 3048 | { |
cd42ff9c | 3049 | int sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
3050 | |
3051 | *qp = e->X_add_number - REG_P; | |
3052 | if (e->X_op != O_register || *qp > 63) | |
3053 | { | |
ad4b42b4 | 3054 | as_bad (_("First operand to .%s must be a predicate"), po); |
e4e8248d JB |
3055 | *qp = 0; |
3056 | } | |
3057 | else if (*qp == 0) | |
ad4b42b4 | 3058 | as_warn (_("Pointless use of p0 as first operand to .%s"), po); |
e4e8248d | 3059 | if (sep == ',') |
cd42ff9c | 3060 | sep = parse_operand_and_eval (e, ','); |
e4e8248d JB |
3061 | else |
3062 | e->X_op = O_absent; | |
3063 | return sep; | |
3064 | } | |
3065 | ||
3066 | static void | |
5a49b8ac AM |
3067 | convert_expr_to_ab_reg (const expressionS *e, |
3068 | unsigned int *ab, | |
3069 | unsigned int *regp, | |
3070 | const char *po, | |
3071 | int n) | |
e0c9811a | 3072 | { |
e4e8248d JB |
3073 | unsigned int reg = e->X_add_number; |
3074 | ||
3075 | *ab = *regp = 0; /* Anything valid is good here. */ | |
e0c9811a JW |
3076 | |
3077 | if (e->X_op != O_register) | |
e4e8248d | 3078 | reg = REG_GR; /* Anything invalid is good here. */ |
e0c9811a | 3079 | |
2434f565 | 3080 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
3081 | { |
3082 | *ab = 0; | |
3083 | *regp = reg - REG_GR; | |
3084 | } | |
2434f565 JW |
3085 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
3086 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
3087 | { |
3088 | *ab = 1; | |
3089 | *regp = reg - REG_FR; | |
3090 | } | |
2434f565 | 3091 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3092 | { |
3093 | *ab = 2; | |
3094 | *regp = reg - REG_BR; | |
3095 | } | |
3096 | else | |
3097 | { | |
3098 | *ab = 3; | |
3099 | switch (reg) | |
3100 | { | |
3101 | case REG_PR: *regp = 0; break; | |
3102 | case REG_PSP: *regp = 1; break; | |
3103 | case REG_PRIUNAT: *regp = 2; break; | |
3104 | case REG_BR + 0: *regp = 3; break; | |
3105 | case REG_AR + AR_BSP: *regp = 4; break; | |
3106 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3107 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3108 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3109 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3110 | case REG_AR + AR_PFS: *regp = 9; break; | |
3111 | case REG_AR + AR_LC: *regp = 10; break; | |
3112 | ||
3113 | default: | |
ad4b42b4 | 3114 | as_bad (_("Operand %d to .%s must be a preserved register"), n, po); |
e4e8248d | 3115 | break; |
e0c9811a JW |
3116 | } |
3117 | } | |
197865e8 | 3118 | } |
e0c9811a | 3119 | |
e4e8248d | 3120 | static void |
5a49b8ac AM |
3121 | convert_expr_to_xy_reg (const expressionS *e, |
3122 | unsigned int *xy, | |
3123 | unsigned int *regp, | |
3124 | const char *po, | |
3125 | int n) | |
e0c9811a | 3126 | { |
e4e8248d | 3127 | unsigned int reg = e->X_add_number; |
e0c9811a | 3128 | |
e4e8248d | 3129 | *xy = *regp = 0; /* Anything valid is good here. */ |
e0c9811a | 3130 | |
e4e8248d JB |
3131 | if (e->X_op != O_register) |
3132 | reg = REG_GR; /* Anything invalid is good here. */ | |
e0c9811a | 3133 | |
e4e8248d | 3134 | if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) |
e0c9811a JW |
3135 | { |
3136 | *xy = 0; | |
3137 | *regp = reg - REG_GR; | |
3138 | } | |
e4e8248d | 3139 | else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) |
e0c9811a JW |
3140 | { |
3141 | *xy = 1; | |
3142 | *regp = reg - REG_FR; | |
3143 | } | |
2434f565 | 3144 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3145 | { |
3146 | *xy = 2; | |
3147 | *regp = reg - REG_BR; | |
3148 | } | |
3149 | else | |
ad4b42b4 | 3150 | as_bad (_("Operand %d to .%s must be a writable register"), n, po); |
197865e8 | 3151 | } |
e0c9811a | 3152 | |
d9201763 L |
3153 | static void |
3154 | dot_align (int arg) | |
3155 | { | |
3156 | /* The current frag is an alignment frag. */ | |
3157 | align_frag = frag_now; | |
3158 | s_align_bytes (arg); | |
3159 | } | |
3160 | ||
800eeca4 | 3161 | static void |
5a49b8ac | 3162 | dot_radix (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3163 | { |
fa30c84f JB |
3164 | char *radix; |
3165 | int ch; | |
800eeca4 JW |
3166 | |
3167 | SKIP_WHITESPACE (); | |
800eeca4 | 3168 | |
fa30c84f JB |
3169 | if (is_it_end_of_statement ()) |
3170 | return; | |
3171 | radix = input_line_pointer; | |
3172 | ch = get_symbol_end (); | |
3173 | ia64_canonicalize_symbol_name (radix); | |
3174 | if (strcasecmp (radix, "C")) | |
ad4b42b4 | 3175 | as_bad (_("Radix `%s' unsupported or invalid"), radix); |
fa30c84f JB |
3176 | *input_line_pointer = ch; |
3177 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3178 | } |
3179 | ||
196e8040 JW |
3180 | /* Helper function for .loc directives. If the assembler is not generating |
3181 | line number info, then we need to remember which instructions have a .loc | |
3182 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3183 | ||
3184 | static void | |
3185 | dot_loc (int x) | |
3186 | { | |
3187 | CURR_SLOT.loc_directive_seen = 1; | |
3188 | dwarf2_directive_loc (x); | |
3189 | } | |
3190 | ||
800eeca4 JW |
3191 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3192 | static void | |
5a49b8ac | 3193 | dot_special_section (int which) |
800eeca4 JW |
3194 | { |
3195 | set_section ((char *) special_section_name[which]); | |
3196 | } | |
3197 | ||
07450571 L |
3198 | /* Return -1 for warning and 0 for error. */ |
3199 | ||
3200 | static int | |
970d6792 L |
3201 | unwind_diagnostic (const char * region, const char *directive) |
3202 | { | |
3203 | if (md.unwind_check == unwind_check_warning) | |
07450571 | 3204 | { |
ad4b42b4 | 3205 | as_warn (_(".%s outside of %s"), directive, region); |
07450571 L |
3206 | return -1; |
3207 | } | |
970d6792 L |
3208 | else |
3209 | { | |
ad4b42b4 | 3210 | as_bad (_(".%s outside of %s"), directive, region); |
970d6792 | 3211 | ignore_rest_of_line (); |
07450571 | 3212 | return 0; |
970d6792 L |
3213 | } |
3214 | } | |
3215 | ||
07450571 L |
3216 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3217 | a procedure but the unwind directive check is set to warning, 0 if | |
3218 | a directive isn't in a procedure and the unwind directive check is set | |
3219 | to error. */ | |
3220 | ||
75e09913 JB |
3221 | static int |
3222 | in_procedure (const char *directive) | |
3223 | { | |
5656b6b8 | 3224 | if (unwind.proc_pending.sym |
75e09913 JB |
3225 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3226 | return 1; | |
07450571 | 3227 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3228 | } |
3229 | ||
07450571 L |
3230 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3231 | a prologue but the unwind directive check is set to warning, 0 if | |
3232 | a directive isn't in a prologue and the unwind directive check is set | |
3233 | to error. */ | |
3234 | ||
75e09913 JB |
3235 | static int |
3236 | in_prologue (const char *directive) | |
3237 | { | |
07450571 | 3238 | int in = in_procedure (directive); |
ba825241 JB |
3239 | |
3240 | if (in > 0 && !unwind.prologue) | |
3241 | in = unwind_diagnostic ("prologue", directive); | |
3242 | check_pending_save (); | |
3243 | return in; | |
75e09913 JB |
3244 | } |
3245 | ||
07450571 L |
3246 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3247 | a body but the unwind directive check is set to warning, 0 if | |
3248 | a directive isn't in a body and the unwind directive check is set | |
3249 | to error. */ | |
3250 | ||
75e09913 JB |
3251 | static int |
3252 | in_body (const char *directive) | |
3253 | { | |
07450571 | 3254 | int in = in_procedure (directive); |
ba825241 JB |
3255 | |
3256 | if (in > 0 && !unwind.body) | |
3257 | in = unwind_diagnostic ("body region", directive); | |
3258 | return in; | |
75e09913 JB |
3259 | } |
3260 | ||
800eeca4 | 3261 | static void |
5a49b8ac | 3262 | add_unwind_entry (unw_rec_list *ptr, int sep) |
800eeca4 | 3263 | { |
e4e8248d JB |
3264 | if (ptr) |
3265 | { | |
3266 | if (unwind.tail) | |
3267 | unwind.tail->next = ptr; | |
3268 | else | |
3269 | unwind.list = ptr; | |
3270 | unwind.tail = ptr; | |
3271 | ||
3272 | /* The current entry can in fact be a chain of unwind entries. */ | |
3273 | if (unwind.current_entry == NULL) | |
3274 | unwind.current_entry = ptr; | |
3275 | } | |
800eeca4 JW |
3276 | |
3277 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3278 | if (unwind.current_entry == NULL) |
3279 | unwind.current_entry = ptr; | |
e4e8248d JB |
3280 | |
3281 | if (sep == ',') | |
3282 | { | |
3283 | /* Parse a tag permitted for the current directive. */ | |
3284 | int ch; | |
3285 | ||
3286 | SKIP_WHITESPACE (); | |
3287 | ch = get_symbol_end (); | |
3288 | /* FIXME: For now, just issue a warning that this isn't implemented. */ | |
3289 | { | |
3290 | static int warned; | |
3291 | ||
3292 | if (!warned) | |
3293 | { | |
3294 | warned = 1; | |
ad4b42b4 | 3295 | as_warn (_("Tags on unwind pseudo-ops aren't supported, yet")); |
e4e8248d JB |
3296 | } |
3297 | } | |
3298 | *input_line_pointer = ch; | |
3299 | } | |
3300 | if (sep != NOT_A_CHAR) | |
3301 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3302 | } |
3303 | ||
197865e8 | 3304 | static void |
5a49b8ac | 3305 | dot_fframe (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3306 | { |
3307 | expressionS e; | |
e4e8248d | 3308 | int sep; |
e0c9811a | 3309 | |
75e09913 JB |
3310 | if (!in_prologue ("fframe")) |
3311 | return; | |
3312 | ||
cd42ff9c | 3313 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3314 | |
800eeca4 | 3315 | if (e.X_op != O_constant) |
e4e8248d | 3316 | { |
ad4b42b4 | 3317 | as_bad (_("First operand to .fframe must be a constant")); |
e4e8248d JB |
3318 | e.X_add_number = 0; |
3319 | } | |
3320 | add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); | |
e0c9811a JW |
3321 | } |
3322 | ||
197865e8 | 3323 | static void |
5a49b8ac | 3324 | dot_vframe (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
3325 | { |
3326 | expressionS e; | |
3327 | unsigned reg; | |
e4e8248d | 3328 | int sep; |
e0c9811a | 3329 | |
75e09913 JB |
3330 | if (!in_prologue ("vframe")) |
3331 | return; | |
3332 | ||
cd42ff9c | 3333 | sep = parse_operand_and_eval (&e, ','); |
e0c9811a | 3334 | reg = e.X_add_number - REG_GR; |
e4e8248d | 3335 | if (e.X_op != O_register || reg > 127) |
800eeca4 | 3336 | { |
ad4b42b4 | 3337 | as_bad (_("First operand to .vframe must be a general register")); |
e4e8248d | 3338 | reg = 0; |
800eeca4 | 3339 | } |
e4e8248d JB |
3340 | add_unwind_entry (output_mem_stack_v (), sep); |
3341 | if (! (unwind.prologue_mask & 2)) | |
3342 | add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); | |
3343 | else if (reg != unwind.prologue_gr | |
3344 | + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) | |
ad4b42b4 | 3345 | as_warn (_("Operand of .vframe contradicts .prologue")); |
800eeca4 JW |
3346 | } |
3347 | ||
197865e8 | 3348 | static void |
5a49b8ac | 3349 | dot_vframesp (int psp) |
800eeca4 | 3350 | { |
e0c9811a | 3351 | expressionS e; |
e4e8248d | 3352 | int sep; |
e0c9811a | 3353 | |
e4e8248d | 3354 | if (psp) |
ad4b42b4 | 3355 | as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant")); |
e0c9811a | 3356 | |
e4e8248d | 3357 | if (!in_prologue ("vframesp")) |
75e09913 JB |
3358 | return; |
3359 | ||
cd42ff9c | 3360 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3361 | if (e.X_op != O_constant) |
e0c9811a | 3362 | { |
ad4b42b4 | 3363 | as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)")); |
e4e8248d | 3364 | e.X_add_number = 0; |
e0c9811a | 3365 | } |
e4e8248d JB |
3366 | add_unwind_entry (output_mem_stack_v (), sep); |
3367 | add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); | |
800eeca4 JW |
3368 | } |
3369 | ||
197865e8 | 3370 | static void |
5a49b8ac | 3371 | dot_save (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3372 | { |
3373 | expressionS e1, e2; | |
e4e8248d | 3374 | unsigned reg1, reg2; |
800eeca4 | 3375 | int sep; |
800eeca4 | 3376 | |
75e09913 JB |
3377 | if (!in_prologue ("save")) |
3378 | return; | |
3379 | ||
cd42ff9c | 3380 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3381 | if (sep == ',') |
cd42ff9c | 3382 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3383 | else |
3384 | e2.X_op = O_absent; | |
800eeca4 | 3385 | |
e0c9811a | 3386 | reg1 = e1.X_add_number; |
800eeca4 | 3387 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3388 | if (e1.X_op != O_register) |
800eeca4 | 3389 | { |
ad4b42b4 | 3390 | as_bad (_("First operand to .save not a register")); |
e4e8248d JB |
3391 | reg1 = REG_PR; /* Anything valid is good here. */ |
3392 | } | |
3393 | reg2 = e2.X_add_number - REG_GR; | |
3394 | if (e2.X_op != O_register || reg2 > 127) | |
3395 | { | |
ad4b42b4 | 3396 | as_bad (_("Second operand to .save not a valid register")); |
e4e8248d JB |
3397 | reg2 = 0; |
3398 | } | |
3399 | switch (reg1) | |
3400 | { | |
3401 | case REG_AR + AR_BSP: | |
3402 | add_unwind_entry (output_bsp_when (), sep); | |
3403 | add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); | |
3404 | break; | |
3405 | case REG_AR + AR_BSPSTORE: | |
3406 | add_unwind_entry (output_bspstore_when (), sep); | |
3407 | add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); | |
3408 | break; | |
3409 | case REG_AR + AR_RNAT: | |
3410 | add_unwind_entry (output_rnat_when (), sep); | |
3411 | add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); | |
3412 | break; | |
3413 | case REG_AR + AR_UNAT: | |
3414 | add_unwind_entry (output_unat_when (), sep); | |
3415 | add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); | |
3416 | break; | |
3417 | case REG_AR + AR_FPSR: | |
3418 | add_unwind_entry (output_fpsr_when (), sep); | |
3419 | add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); | |
3420 | break; | |
3421 | case REG_AR + AR_PFS: | |
3422 | add_unwind_entry (output_pfs_when (), sep); | |
3423 | if (! (unwind.prologue_mask & 4)) | |
3424 | add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); | |
3425 | else if (reg2 != unwind.prologue_gr | |
3426 | + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) | |
ad4b42b4 | 3427 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3428 | break; |
3429 | case REG_AR + AR_LC: | |
3430 | add_unwind_entry (output_lc_when (), sep); | |
3431 | add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); | |
3432 | break; | |
3433 | case REG_BR: | |
3434 | add_unwind_entry (output_rp_when (), sep); | |
3435 | if (! (unwind.prologue_mask & 8)) | |
3436 | add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); | |
3437 | else if (reg2 != unwind.prologue_gr) | |
ad4b42b4 | 3438 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3439 | break; |
3440 | case REG_PR: | |
3441 | add_unwind_entry (output_preds_when (), sep); | |
3442 | if (! (unwind.prologue_mask & 1)) | |
3443 | add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); | |
3444 | else if (reg2 != unwind.prologue_gr | |
3445 | + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) | |
ad4b42b4 | 3446 | as_warn (_("Second operand of .save contradicts .prologue")); |
e4e8248d JB |
3447 | break; |
3448 | case REG_PRIUNAT: | |
3449 | add_unwind_entry (output_priunat_when_gr (), sep); | |
3450 | add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); | |
3451 | break; | |
3452 | default: | |
ad4b42b4 | 3453 | as_bad (_("First operand to .save not a valid register")); |
e4e8248d JB |
3454 | add_unwind_entry (NULL, sep); |
3455 | break; | |
800eeca4 | 3456 | } |
800eeca4 JW |
3457 | } |
3458 | ||
197865e8 | 3459 | static void |
5a49b8ac | 3460 | dot_restore (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3461 | { |
e4e8248d | 3462 | expressionS e1; |
33d01f33 | 3463 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3464 | int sep; |
3465 | ||
75e09913 JB |
3466 | if (!in_body ("restore")) |
3467 | return; | |
3468 | ||
cd42ff9c | 3469 | sep = parse_operand_and_eval (&e1, ','); |
e0c9811a | 3470 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) |
ad4b42b4 | 3471 | as_bad (_("First operand to .restore must be stack pointer (sp)")); |
e0c9811a JW |
3472 | |
3473 | if (sep == ',') | |
3474 | { | |
e4e8248d JB |
3475 | expressionS e2; |
3476 | ||
cd42ff9c | 3477 | sep = parse_operand_and_eval (&e2, ','); |
33d01f33 | 3478 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3479 | { |
ad4b42b4 | 3480 | as_bad (_("Second operand to .restore must be a constant >= 0")); |
e4e8248d | 3481 | e2.X_add_number = 0; |
e0c9811a | 3482 | } |
33d01f33 | 3483 | ecount = e2.X_add_number; |
e0c9811a | 3484 | } |
33d01f33 JW |
3485 | else |
3486 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3487 | |
3488 | if (ecount >= unwind.prologue_count) | |
3489 | { | |
ad4b42b4 | 3490 | as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"), |
6290819d | 3491 | ecount + 1, unwind.prologue_count); |
e4e8248d | 3492 | ecount = 0; |
6290819d NC |
3493 | } |
3494 | ||
e4e8248d | 3495 | add_unwind_entry (output_epilogue (ecount), sep); |
33d01f33 JW |
3496 | |
3497 | if (ecount < unwind.prologue_count) | |
3498 | unwind.prologue_count -= ecount + 1; | |
3499 | else | |
3500 | unwind.prologue_count = 0; | |
e0c9811a JW |
3501 | } |
3502 | ||
197865e8 | 3503 | static void |
5a49b8ac | 3504 | dot_restorereg (int pred) |
e0c9811a JW |
3505 | { |
3506 | unsigned int qp, ab, reg; | |
e4e8248d | 3507 | expressionS e; |
e0c9811a | 3508 | int sep; |
e4e8248d | 3509 | const char * const po = pred ? "restorereg.p" : "restorereg"; |
e0c9811a | 3510 | |
e4e8248d | 3511 | if (!in_procedure (po)) |
75e09913 JB |
3512 | return; |
3513 | ||
e4e8248d JB |
3514 | if (pred) |
3515 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3516 | else | |
e0c9811a | 3517 | { |
cd42ff9c | 3518 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 3519 | qp = 0; |
e0c9811a | 3520 | } |
e4e8248d | 3521 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3522 | |
e4e8248d | 3523 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); |
800eeca4 JW |
3524 | } |
3525 | ||
2d6ed997 L |
3526 | static char *special_linkonce_name[] = |
3527 | { | |
3528 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3529 | }; | |
3530 | ||
3531 | static void | |
da9f89d4 | 3532 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3533 | { |
3534 | /* | |
3535 | Use a slightly ugly scheme to derive the unwind section names from | |
3536 | the text section name: | |
3537 | ||
3538 | text sect. unwind table sect. | |
3539 | name: name: comments: | |
3540 | ---------- ----------------- -------------------------------- | |
3541 | .text .IA_64.unwind | |
3542 | .text.foo .IA_64.unwind.text.foo | |
3543 | .foo .IA_64.unwind.foo | |
3544 | .gnu.linkonce.t.foo | |
3545 | .gnu.linkonce.ia64unw.foo | |
3546 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3547 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3548 | ||
3549 | This mapping is done so that: | |
3550 | ||
3551 | (a) An object file with unwind info only in .text will use | |
3552 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3553 | This follows the letter of the ABI and also ensures backwards | |
3554 | compatibility with older toolchains. | |
3555 | ||
3556 | (b) An object file with unwind info in multiple text sections | |
3557 | will use separate unwind sections for each text section. | |
3558 | This allows us to properly set the "sh_info" and "sh_link" | |
3559 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3560 | lets GNU ld support programs with multiple segments | |
3561 | containing unwind info (as might be the case for certain | |
3562 | embedded applications). | |
3563 | ||
3564 | (c) An error is issued if there would be a name clash. | |
3565 | */ | |
3566 | ||
3567 | const char *text_name, *sec_text_name; | |
3568 | char *sec_name; | |
3569 | const char *prefix = special_section_name [sec_index]; | |
3570 | const char *suffix; | |
3571 | size_t prefix_len, suffix_len, sec_name_len; | |
3572 | ||
3573 | sec_text_name = segment_name (text_seg); | |
3574 | text_name = sec_text_name; | |
3575 | if (strncmp (text_name, "_info", 5) == 0) | |
3576 | { | |
ad4b42b4 | 3577 | as_bad (_("Illegal section name `%s' (causes unwind section name clash)"), |
2d6ed997 L |
3578 | text_name); |
3579 | ignore_rest_of_line (); | |
3580 | return; | |
3581 | } | |
3582 | if (strcmp (text_name, ".text") == 0) | |
3583 | text_name = ""; | |
3584 | ||
3585 | /* Build the unwind section name by appending the (possibly stripped) | |
3586 | text section name to the unwind prefix. */ | |
3587 | suffix = text_name; | |
3588 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3589 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3590 | { | |
3591 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3592 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3593 | } | |
3594 | ||
3595 | prefix_len = strlen (prefix); | |
3596 | suffix_len = strlen (suffix); | |
3597 | sec_name_len = prefix_len + suffix_len; | |
3598 | sec_name = alloca (sec_name_len + 1); | |
3599 | memcpy (sec_name, prefix, prefix_len); | |
3600 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3601 | sec_name [sec_name_len] = '\0'; | |
3602 | ||
3603 | /* Handle COMDAT group. */ | |
6e3f953d L |
3604 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3605 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3606 | { |
3607 | char *section; | |
3608 | size_t len, group_name_len; | |
3609 | const char *group_name = elf_group_name (text_seg); | |
3610 | ||
3611 | if (group_name == NULL) | |
3612 | { | |
ad4b42b4 | 3613 | as_bad (_("Group section `%s' has no group signature"), |
2d6ed997 L |
3614 | sec_text_name); |
3615 | ignore_rest_of_line (); | |
3616 | return; | |
3617 | } | |
3618 | /* We have to construct a fake section directive. */ | |
3619 | group_name_len = strlen (group_name); | |
3620 | len = (sec_name_len | |
3621 | + 16 /* ,"aG",@progbits, */ | |
3622 | + group_name_len /* ,group_name */ | |
3623 | + 7); /* ,comdat */ | |
3624 | ||
3625 | section = alloca (len + 1); | |
3626 | memcpy (section, sec_name, sec_name_len); | |
3627 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3628 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3629 | memcpy (section + len - 7, ",comdat", 7); | |
3630 | section [len] = '\0'; | |
3631 | set_section (section); | |
3632 | } | |
3633 | else | |
3634 | { | |
3635 | set_section (sec_name); | |
3636 | bfd_set_section_flags (stdoutput, now_seg, | |
3637 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3638 | } | |
38ce5b11 L |
3639 | |
3640 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3641 | } |
3642 | ||
73f20958 | 3643 | static void |
2d6ed997 | 3644 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3645 | { |
73f20958 L |
3646 | int size, pad; |
3647 | unw_rec_list *list; | |
800eeca4 | 3648 | |
c97b7ef6 JW |
3649 | /* Mark the end of the unwind info, so that we can compute the size of the |
3650 | last unwind region. */ | |
e4e8248d | 3651 | add_unwind_entry (output_endp (), NOT_A_CHAR); |
c97b7ef6 | 3652 | |
10850f29 JW |
3653 | /* Force out pending instructions, to make sure all unwind records have |
3654 | a valid slot_number field. */ | |
3655 | ia64_flush_insns (); | |
3656 | ||
800eeca4 | 3657 | /* Generate the unwind record. */ |
73f20958 | 3658 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3659 | fixup_unw_records (list, 1); |
73f20958 L |
3660 | size = calc_record_size (list); |
3661 | ||
3662 | if (size > 0 || unwind.force_unwind_entry) | |
3663 | { | |
3664 | unwind.force_unwind_entry = 0; | |
3665 | /* pad to pointer-size boundary. */ | |
3666 | pad = size % md.pointer_size; | |
3667 | if (pad != 0) | |
3668 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3669 | /* Add 8 for the header. */ |
3670 | size += 8; | |
3671 | /* Add a pointer for the personality offset. */ | |
3672 | if (unwind.personality_routine) | |
3673 | size += md.pointer_size; | |
73f20958 | 3674 | } |
6290819d | 3675 | |
800eeca4 JW |
3676 | /* If there are unwind records, switch sections, and output the info. */ |
3677 | if (size != 0) | |
3678 | { | |
800eeca4 | 3679 | expressionS exp; |
1cd8ff38 | 3680 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3681 | |
da9f89d4 | 3682 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3683 | |
557debba JW |
3684 | /* Make sure the section has 4 byte alignment for ILP32 and |
3685 | 8 byte alignment for LP64. */ | |
3686 | frag_align (md.pointer_size_shift, 0, 0); | |
3687 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3688 | |
800eeca4 | 3689 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3690 | unwind.info = expr_build_dot (); |
73f20958 L |
3691 | |
3692 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3693 | (offsetT) (long) unwind.personality_routine, |
3694 | (char *) list); | |
91a2ae2a | 3695 | |
800eeca4 | 3696 | /* Add the personality address to the image. */ |
e0c9811a | 3697 | if (unwind.personality_routine != 0) |
542d6675 | 3698 | { |
40449e9f | 3699 | exp.X_op = O_symbol; |
e0c9811a | 3700 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3701 | exp.X_add_number = 0; |
1cd8ff38 NC |
3702 | |
3703 | if (md.flags & EF_IA_64_BE) | |
3704 | { | |
3705 | if (md.flags & EF_IA_64_ABI64) | |
3706 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3707 | else | |
3708 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3709 | } | |
40449e9f | 3710 | else |
1cd8ff38 NC |
3711 | { |
3712 | if (md.flags & EF_IA_64_ABI64) | |
3713 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3714 | else | |
3715 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3716 | } | |
3717 | ||
3718 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3719 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3720 | unwind.personality_routine = 0; |
542d6675 | 3721 | } |
800eeca4 JW |
3722 | } |
3723 | ||
6290819d | 3724 | free_saved_prologue_counts (); |
e0c9811a | 3725 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3726 | } |
3727 | ||
197865e8 | 3728 | static void |
5a49b8ac | 3729 | dot_handlerdata (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3730 | { |
75e09913 JB |
3731 | if (!in_procedure ("handlerdata")) |
3732 | return; | |
91a2ae2a RH |
3733 | unwind.force_unwind_entry = 1; |
3734 | ||
3735 | /* Remember which segment we're in so we can switch back after .endp */ | |
3736 | unwind.saved_text_seg = now_seg; | |
3737 | unwind.saved_text_subseg = now_subseg; | |
3738 | ||
3739 | /* Generate unwind info into unwind-info section and then leave that | |
3740 | section as the currently active one so dataXX directives go into | |
3741 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3742 | generate_unwind_image (now_seg); |
e0c9811a | 3743 | demand_empty_rest_of_line (); |
800eeca4 JW |
3744 | } |
3745 | ||
197865e8 | 3746 | static void |
5a49b8ac | 3747 | dot_unwentry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3748 | { |
75e09913 JB |
3749 | if (!in_procedure ("unwentry")) |
3750 | return; | |
91a2ae2a | 3751 | unwind.force_unwind_entry = 1; |
e0c9811a | 3752 | demand_empty_rest_of_line (); |
800eeca4 JW |
3753 | } |
3754 | ||
197865e8 | 3755 | static void |
5a49b8ac | 3756 | dot_altrp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3757 | { |
e0c9811a JW |
3758 | expressionS e; |
3759 | unsigned reg; | |
3760 | ||
75e09913 JB |
3761 | if (!in_prologue ("altrp")) |
3762 | return; | |
3763 | ||
cd42ff9c | 3764 | parse_operand_and_eval (&e, 0); |
e0c9811a | 3765 | reg = e.X_add_number - REG_BR; |
e4e8248d JB |
3766 | if (e.X_op != O_register || reg > 7) |
3767 | { | |
ad4b42b4 | 3768 | as_bad (_("First operand to .altrp not a valid branch register")); |
e4e8248d JB |
3769 | reg = 0; |
3770 | } | |
3771 | add_unwind_entry (output_rp_br (reg), 0); | |
800eeca4 JW |
3772 | } |
3773 | ||
197865e8 | 3774 | static void |
5a49b8ac | 3775 | dot_savemem (int psprel) |
800eeca4 JW |
3776 | { |
3777 | expressionS e1, e2; | |
3778 | int sep; | |
3779 | int reg1, val; | |
e4e8248d | 3780 | const char * const po = psprel ? "savepsp" : "savesp"; |
800eeca4 | 3781 | |
e4e8248d | 3782 | if (!in_prologue (po)) |
75e09913 JB |
3783 | return; |
3784 | ||
cd42ff9c | 3785 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 3786 | if (sep == ',') |
cd42ff9c | 3787 | sep = parse_operand_and_eval (&e2, ','); |
e4e8248d JB |
3788 | else |
3789 | e2.X_op = O_absent; | |
800eeca4 | 3790 | |
e0c9811a | 3791 | reg1 = e1.X_add_number; |
800eeca4 | 3792 | val = e2.X_add_number; |
197865e8 | 3793 | |
800eeca4 | 3794 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3795 | if (e1.X_op != O_register) |
800eeca4 | 3796 | { |
ad4b42b4 | 3797 | as_bad (_("First operand to .%s not a register"), po); |
e4e8248d JB |
3798 | reg1 = REG_PR; /* Anything valid is good here. */ |
3799 | } | |
3800 | if (e2.X_op != O_constant) | |
3801 | { | |
ad4b42b4 | 3802 | as_bad (_("Second operand to .%s not a constant"), po); |
e4e8248d JB |
3803 | val = 0; |
3804 | } | |
3805 | ||
3806 | switch (reg1) | |
3807 | { | |
3808 | case REG_AR + AR_BSP: | |
3809 | add_unwind_entry (output_bsp_when (), sep); | |
3810 | add_unwind_entry ((psprel | |
3811 | ? output_bsp_psprel | |
3812 | : output_bsp_sprel) (val), NOT_A_CHAR); | |
3813 | break; | |
3814 | case REG_AR + AR_BSPSTORE: | |
3815 | add_unwind_entry (output_bspstore_when (), sep); | |
3816 | add_unwind_entry ((psprel | |
3817 | ? output_bspstore_psprel | |
3818 | : output_bspstore_sprel) (val), NOT_A_CHAR); | |
3819 | break; | |
3820 | case REG_AR + AR_RNAT: | |
3821 | add_unwind_entry (output_rnat_when (), sep); | |
3822 | add_unwind_entry ((psprel | |
3823 | ? output_rnat_psprel | |
3824 | : output_rnat_sprel) (val), NOT_A_CHAR); | |
3825 | break; | |
3826 | case REG_AR + AR_UNAT: | |
3827 | add_unwind_entry (output_unat_when (), sep); | |
3828 | add_unwind_entry ((psprel | |
3829 | ? output_unat_psprel | |
3830 | : output_unat_sprel) (val), NOT_A_CHAR); | |
3831 | break; | |
3832 | case REG_AR + AR_FPSR: | |
3833 | add_unwind_entry (output_fpsr_when (), sep); | |
3834 | add_unwind_entry ((psprel | |
3835 | ? output_fpsr_psprel | |
3836 | : output_fpsr_sprel) (val), NOT_A_CHAR); | |
3837 | break; | |
3838 | case REG_AR + AR_PFS: | |
3839 | add_unwind_entry (output_pfs_when (), sep); | |
3840 | add_unwind_entry ((psprel | |
3841 | ? output_pfs_psprel | |
3842 | : output_pfs_sprel) (val), NOT_A_CHAR); | |
3843 | break; | |
3844 | case REG_AR + AR_LC: | |
3845 | add_unwind_entry (output_lc_when (), sep); | |
3846 | add_unwind_entry ((psprel | |
3847 | ? output_lc_psprel | |
3848 | : output_lc_sprel) (val), NOT_A_CHAR); | |
3849 | break; | |
3850 | case REG_BR: | |
3851 | add_unwind_entry (output_rp_when (), sep); | |
3852 | add_unwind_entry ((psprel | |
3853 | ? output_rp_psprel | |
3854 | : output_rp_sprel) (val), NOT_A_CHAR); | |
3855 | break; | |
3856 | case REG_PR: | |
3857 | add_unwind_entry (output_preds_when (), sep); | |
3858 | add_unwind_entry ((psprel | |
3859 | ? output_preds_psprel | |
3860 | : output_preds_sprel) (val), NOT_A_CHAR); | |
3861 | break; | |
3862 | case REG_PRIUNAT: | |
3863 | add_unwind_entry (output_priunat_when_mem (), sep); | |
3864 | add_unwind_entry ((psprel | |
3865 | ? output_priunat_psprel | |
3866 | : output_priunat_sprel) (val), NOT_A_CHAR); | |
3867 | break; | |
3868 | default: | |
ad4b42b4 | 3869 | as_bad (_("First operand to .%s not a valid register"), po); |
e4e8248d JB |
3870 | add_unwind_entry (NULL, sep); |
3871 | break; | |
800eeca4 | 3872 | } |
800eeca4 JW |
3873 | } |
3874 | ||
197865e8 | 3875 | static void |
5a49b8ac | 3876 | dot_saveg (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3877 | { |
e4e8248d JB |
3878 | expressionS e; |
3879 | unsigned grmask; | |
800eeca4 | 3880 | int sep; |
75e09913 JB |
3881 | |
3882 | if (!in_prologue ("save.g")) | |
3883 | return; | |
3884 | ||
cd42ff9c | 3885 | sep = parse_operand_and_eval (&e, ','); |
197865e8 | 3886 | |
e4e8248d JB |
3887 | grmask = e.X_add_number; |
3888 | if (e.X_op != O_constant | |
3889 | || e.X_add_number <= 0 | |
3890 | || e.X_add_number > 0xf) | |
800eeca4 | 3891 | { |
ad4b42b4 | 3892 | as_bad (_("First operand to .save.g must be a positive 4-bit constant")); |
e4e8248d JB |
3893 | grmask = 0; |
3894 | } | |
3895 | ||
3896 | if (sep == ',') | |
3897 | { | |
3898 | unsigned reg; | |
3899 | int n = popcount (grmask); | |
3900 | ||
cd42ff9c | 3901 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3902 | reg = e.X_add_number - REG_GR; |
3903 | if (e.X_op != O_register || reg > 127) | |
542d6675 | 3904 | { |
ad4b42b4 | 3905 | as_bad (_("Second operand to .save.g must be a general register")); |
e4e8248d JB |
3906 | reg = 0; |
3907 | } | |
3908 | else if (reg > 128U - n) | |
3909 | { | |
ad4b42b4 | 3910 | as_bad (_("Second operand to .save.g must be the first of %d general registers"), n); |
e4e8248d | 3911 | reg = 0; |
800eeca4 | 3912 | } |
e4e8248d | 3913 | add_unwind_entry (output_gr_gr (grmask, reg), 0); |
800eeca4 | 3914 | } |
e4e8248d JB |
3915 | else |
3916 | add_unwind_entry (output_gr_mem (grmask), 0); | |
800eeca4 JW |
3917 | } |
3918 | ||
197865e8 | 3919 | static void |
5a49b8ac | 3920 | dot_savef (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3921 | { |
e4e8248d | 3922 | expressionS e; |
75e09913 JB |
3923 | |
3924 | if (!in_prologue ("save.f")) | |
3925 | return; | |
3926 | ||
cd42ff9c | 3927 | parse_operand_and_eval (&e, 0); |
197865e8 | 3928 | |
e4e8248d JB |
3929 | if (e.X_op != O_constant |
3930 | || e.X_add_number <= 0 | |
3931 | || e.X_add_number > 0xfffff) | |
3932 | { | |
ad4b42b4 | 3933 | as_bad (_("Operand to .save.f must be a positive 20-bit constant")); |
e4e8248d JB |
3934 | e.X_add_number = 0; |
3935 | } | |
3936 | add_unwind_entry (output_fr_mem (e.X_add_number), 0); | |
800eeca4 JW |
3937 | } |
3938 | ||
197865e8 | 3939 | static void |
5a49b8ac | 3940 | dot_saveb (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 3941 | { |
e4e8248d JB |
3942 | expressionS e; |
3943 | unsigned brmask; | |
3944 | int sep; | |
e0c9811a | 3945 | |
75e09913 JB |
3946 | if (!in_prologue ("save.b")) |
3947 | return; | |
3948 | ||
cd42ff9c | 3949 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
3950 | |
3951 | brmask = e.X_add_number; | |
3952 | if (e.X_op != O_constant | |
3953 | || e.X_add_number <= 0 | |
3954 | || e.X_add_number > 0x1f) | |
800eeca4 | 3955 | { |
ad4b42b4 | 3956 | as_bad (_("First operand to .save.b must be a positive 5-bit constant")); |
e4e8248d | 3957 | brmask = 0; |
800eeca4 | 3958 | } |
e0c9811a JW |
3959 | |
3960 | if (sep == ',') | |
3961 | { | |
e4e8248d JB |
3962 | unsigned reg; |
3963 | int n = popcount (brmask); | |
3964 | ||
cd42ff9c | 3965 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
3966 | reg = e.X_add_number - REG_GR; |
3967 | if (e.X_op != O_register || reg > 127) | |
e0c9811a | 3968 | { |
ad4b42b4 | 3969 | as_bad (_("Second operand to .save.b must be a general register")); |
e4e8248d | 3970 | reg = 0; |
e0c9811a | 3971 | } |
e4e8248d JB |
3972 | else if (reg > 128U - n) |
3973 | { | |
ad4b42b4 | 3974 | as_bad (_("Second operand to .save.b must be the first of %d general registers"), n); |
e4e8248d JB |
3975 | reg = 0; |
3976 | } | |
3977 | add_unwind_entry (output_br_gr (brmask, reg), 0); | |
e0c9811a JW |
3978 | } |
3979 | else | |
e4e8248d | 3980 | add_unwind_entry (output_br_mem (brmask), 0); |
800eeca4 JW |
3981 | } |
3982 | ||
197865e8 | 3983 | static void |
5a49b8ac | 3984 | dot_savegf (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
3985 | { |
3986 | expressionS e1, e2; | |
75e09913 JB |
3987 | |
3988 | if (!in_prologue ("save.gf")) | |
3989 | return; | |
3990 | ||
cd42ff9c AM |
3991 | if (parse_operand_and_eval (&e1, ',') == ',') |
3992 | parse_operand_and_eval (&e2, 0); | |
800eeca4 | 3993 | else |
e4e8248d JB |
3994 | e2.X_op = O_absent; |
3995 | ||
3996 | if (e1.X_op != O_constant | |
3997 | || e1.X_add_number < 0 | |
3998 | || e1.X_add_number > 0xf) | |
3999 | { | |
ad4b42b4 | 4000 | as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant")); |
e4e8248d JB |
4001 | e1.X_op = O_absent; |
4002 | e1.X_add_number = 0; | |
4003 | } | |
4004 | if (e2.X_op != O_constant | |
4005 | || e2.X_add_number < 0 | |
4006 | || e2.X_add_number > 0xfffff) | |
800eeca4 | 4007 | { |
ad4b42b4 | 4008 | as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant")); |
e4e8248d JB |
4009 | e2.X_op = O_absent; |
4010 | e2.X_add_number = 0; | |
800eeca4 | 4011 | } |
e4e8248d JB |
4012 | if (e1.X_op == O_constant |
4013 | && e2.X_op == O_constant | |
4014 | && e1.X_add_number == 0 | |
4015 | && e2.X_add_number == 0) | |
ad4b42b4 | 4016 | as_bad (_("Operands to .save.gf may not be both zero")); |
e4e8248d JB |
4017 | |
4018 | add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); | |
800eeca4 JW |
4019 | } |
4020 | ||
197865e8 | 4021 | static void |
5a49b8ac | 4022 | dot_spill (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4023 | { |
4024 | expressionS e; | |
e0c9811a | 4025 | |
75e09913 JB |
4026 | if (!in_prologue ("spill")) |
4027 | return; | |
4028 | ||
cd42ff9c | 4029 | parse_operand_and_eval (&e, 0); |
197865e8 | 4030 | |
800eeca4 | 4031 | if (e.X_op != O_constant) |
800eeca4 | 4032 | { |
ad4b42b4 | 4033 | as_bad (_("Operand to .spill must be a constant")); |
e4e8248d | 4034 | e.X_add_number = 0; |
e0c9811a | 4035 | } |
e4e8248d | 4036 | add_unwind_entry (output_spill_base (e.X_add_number), 0); |
e0c9811a JW |
4037 | } |
4038 | ||
4039 | static void | |
5a49b8ac | 4040 | dot_spillreg (int pred) |
e0c9811a | 4041 | { |
2132e3a3 | 4042 | int sep; |
e4e8248d JB |
4043 | unsigned int qp, ab, xy, reg, treg; |
4044 | expressionS e; | |
4045 | const char * const po = pred ? "spillreg.p" : "spillreg"; | |
e0c9811a | 4046 | |
e4e8248d | 4047 | if (!in_procedure (po)) |
75e09913 JB |
4048 | return; |
4049 | ||
e4e8248d JB |
4050 | if (pred) |
4051 | sep = parse_predicate_and_operand (&e, &qp, po); | |
e0c9811a | 4052 | else |
e0c9811a | 4053 | { |
cd42ff9c | 4054 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 4055 | qp = 0; |
e0c9811a | 4056 | } |
e4e8248d | 4057 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4058 | |
e4e8248d | 4059 | if (sep == ',') |
cd42ff9c | 4060 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
4061 | else |
4062 | e.X_op = O_absent; | |
4063 | convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); | |
e0c9811a | 4064 | |
e4e8248d | 4065 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); |
e0c9811a JW |
4066 | } |
4067 | ||
4068 | static void | |
5a49b8ac | 4069 | dot_spillmem (int psprel) |
e0c9811a | 4070 | { |
e4e8248d JB |
4071 | expressionS e; |
4072 | int pred = (psprel < 0), sep; | |
4073 | unsigned int qp, ab, reg; | |
4074 | const char * po; | |
e0c9811a | 4075 | |
e4e8248d | 4076 | if (pred) |
e0c9811a | 4077 | { |
e4e8248d JB |
4078 | psprel = ~psprel; |
4079 | po = psprel ? "spillpsp.p" : "spillsp.p"; | |
e0c9811a | 4080 | } |
e4e8248d JB |
4081 | else |
4082 | po = psprel ? "spillpsp" : "spillsp"; | |
e0c9811a | 4083 | |
e4e8248d JB |
4084 | if (!in_procedure (po)) |
4085 | return; | |
e0c9811a | 4086 | |
e4e8248d JB |
4087 | if (pred) |
4088 | sep = parse_predicate_and_operand (&e, &qp, po); | |
4089 | else | |
e0c9811a | 4090 | { |
cd42ff9c | 4091 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d | 4092 | qp = 0; |
e0c9811a | 4093 | } |
e4e8248d | 4094 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4095 | |
e4e8248d | 4096 | if (sep == ',') |
cd42ff9c | 4097 | sep = parse_operand_and_eval (&e, ','); |
e4e8248d JB |
4098 | else |
4099 | e.X_op = O_absent; | |
4100 | if (e.X_op != O_constant) | |
e0c9811a | 4101 | { |
ad4b42b4 | 4102 | as_bad (_("Operand %d to .%s must be a constant"), 2 + pred, po); |
e4e8248d | 4103 | e.X_add_number = 0; |
e0c9811a JW |
4104 | } |
4105 | ||
4106 | if (psprel) | |
e4e8248d | 4107 | add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a | 4108 | else |
e4e8248d | 4109 | add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a JW |
4110 | } |
4111 | ||
6290819d | 4112 | static unsigned int |
5a49b8ac | 4113 | get_saved_prologue_count (unsigned long lbl) |
6290819d NC |
4114 | { |
4115 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4116 | ||
4117 | while (lpc != NULL && lpc->label_number != lbl) | |
4118 | lpc = lpc->next; | |
4119 | ||
4120 | if (lpc != NULL) | |
4121 | return lpc->prologue_count; | |
4122 | ||
ad4b42b4 | 4123 | as_bad (_("Missing .label_state %ld"), lbl); |
6290819d NC |
4124 | return 1; |
4125 | } | |
4126 | ||
4127 | static void | |
5a49b8ac | 4128 | save_prologue_count (unsigned long lbl, unsigned int count) |
6290819d NC |
4129 | { |
4130 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4131 | ||
4132 | while (lpc != NULL && lpc->label_number != lbl) | |
4133 | lpc = lpc->next; | |
4134 | ||
4135 | if (lpc != NULL) | |
4136 | lpc->prologue_count = count; | |
4137 | else | |
4138 | { | |
40449e9f | 4139 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4140 | |
4141 | new_lpc->next = unwind.saved_prologue_counts; | |
4142 | new_lpc->label_number = lbl; | |
4143 | new_lpc->prologue_count = count; | |
4144 | unwind.saved_prologue_counts = new_lpc; | |
4145 | } | |
4146 | } | |
4147 | ||
4148 | static void | |
4149 | free_saved_prologue_counts () | |
4150 | { | |
40449e9f KH |
4151 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4152 | label_prologue_count *next; | |
6290819d NC |
4153 | |
4154 | while (lpc != NULL) | |
4155 | { | |
4156 | next = lpc->next; | |
4157 | free (lpc); | |
4158 | lpc = next; | |
4159 | } | |
4160 | ||
4161 | unwind.saved_prologue_counts = NULL; | |
4162 | } | |
4163 | ||
e0c9811a | 4164 | static void |
5a49b8ac | 4165 | dot_label_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4166 | { |
4167 | expressionS e; | |
4168 | ||
75e09913 JB |
4169 | if (!in_body ("label_state")) |
4170 | return; | |
4171 | ||
cd42ff9c | 4172 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4173 | if (e.X_op == O_constant) |
4174 | save_prologue_count (e.X_add_number, unwind.prologue_count); | |
4175 | else | |
e0c9811a | 4176 | { |
ad4b42b4 | 4177 | as_bad (_("Operand to .label_state must be a constant")); |
e4e8248d | 4178 | e.X_add_number = 0; |
e0c9811a | 4179 | } |
e4e8248d | 4180 | add_unwind_entry (output_label_state (e.X_add_number), 0); |
e0c9811a JW |
4181 | } |
4182 | ||
4183 | static void | |
5a49b8ac | 4184 | dot_copy_state (int dummy ATTRIBUTE_UNUSED) |
e0c9811a JW |
4185 | { |
4186 | expressionS e; | |
4187 | ||
75e09913 JB |
4188 | if (!in_body ("copy_state")) |
4189 | return; | |
4190 | ||
cd42ff9c | 4191 | parse_operand_and_eval (&e, 0); |
e4e8248d JB |
4192 | if (e.X_op == O_constant) |
4193 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); | |
4194 | else | |
e0c9811a | 4195 | { |
ad4b42b4 | 4196 | as_bad (_("Operand to .copy_state must be a constant")); |
e4e8248d | 4197 | e.X_add_number = 0; |
e0c9811a | 4198 | } |
e4e8248d | 4199 | add_unwind_entry (output_copy_state (e.X_add_number), 0); |
800eeca4 JW |
4200 | } |
4201 | ||
197865e8 | 4202 | static void |
5a49b8ac | 4203 | dot_unwabi (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4204 | { |
e0c9811a JW |
4205 | expressionS e1, e2; |
4206 | unsigned char sep; | |
4207 | ||
e4e8248d | 4208 | if (!in_prologue ("unwabi")) |
75e09913 JB |
4209 | return; |
4210 | ||
cd42ff9c | 4211 | sep = parse_operand_and_eval (&e1, ','); |
e4e8248d | 4212 | if (sep == ',') |
cd42ff9c | 4213 | parse_operand_and_eval (&e2, 0); |
e4e8248d JB |
4214 | else |
4215 | e2.X_op = O_absent; | |
e0c9811a JW |
4216 | |
4217 | if (e1.X_op != O_constant) | |
4218 | { | |
ad4b42b4 | 4219 | as_bad (_("First operand to .unwabi must be a constant")); |
e4e8248d | 4220 | e1.X_add_number = 0; |
e0c9811a JW |
4221 | } |
4222 | ||
4223 | if (e2.X_op != O_constant) | |
4224 | { | |
ad4b42b4 | 4225 | as_bad (_("Second operand to .unwabi must be a constant")); |
e4e8248d | 4226 | e2.X_add_number = 0; |
e0c9811a JW |
4227 | } |
4228 | ||
e4e8248d | 4229 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); |
800eeca4 JW |
4230 | } |
4231 | ||
197865e8 | 4232 | static void |
5a49b8ac | 4233 | dot_personality (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4234 | { |
4235 | char *name, *p, c; | |
75e09913 JB |
4236 | if (!in_procedure ("personality")) |
4237 | return; | |
800eeca4 JW |
4238 | SKIP_WHITESPACE (); |
4239 | name = input_line_pointer; | |
4240 | c = get_symbol_end (); | |
4241 | p = input_line_pointer; | |
e0c9811a | 4242 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4243 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4244 | *p = c; |
4245 | SKIP_WHITESPACE (); | |
4246 | demand_empty_rest_of_line (); | |
4247 | } | |
4248 | ||
4249 | static void | |
5a49b8ac | 4250 | dot_proc (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4251 | { |
4252 | char *name, *p, c; | |
4253 | symbolS *sym; | |
5656b6b8 JB |
4254 | proc_pending *pending, *last_pending; |
4255 | ||
4256 | if (unwind.proc_pending.sym) | |
4257 | { | |
4258 | (md.unwind_check == unwind_check_warning | |
4259 | ? as_warn | |
ad4b42b4 | 4260 | : as_bad) (_("Missing .endp after previous .proc")); |
5656b6b8 JB |
4261 | while (unwind.proc_pending.next) |
4262 | { | |
4263 | pending = unwind.proc_pending.next; | |
4264 | unwind.proc_pending.next = pending->next; | |
4265 | free (pending); | |
4266 | } | |
4267 | } | |
4268 | last_pending = NULL; | |
800eeca4 | 4269 | |
e0c9811a | 4270 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4271 | function symbols: */ |
800eeca4 JW |
4272 | while (1) |
4273 | { | |
4274 | SKIP_WHITESPACE (); | |
4275 | name = input_line_pointer; | |
4276 | c = get_symbol_end (); | |
4277 | p = input_line_pointer; | |
75e09913 | 4278 | if (!*name) |
ad4b42b4 | 4279 | as_bad (_("Empty argument of .proc")); |
75e09913 | 4280 | else |
542d6675 | 4281 | { |
75e09913 JB |
4282 | sym = symbol_find_or_make (name); |
4283 | if (S_IS_DEFINED (sym)) | |
ad4b42b4 | 4284 | as_bad (_("`%s' was already defined"), name); |
5656b6b8 JB |
4285 | else if (!last_pending) |
4286 | { | |
4287 | unwind.proc_pending.sym = sym; | |
4288 | last_pending = &unwind.proc_pending; | |
4289 | } | |
4290 | else | |
75e09913 | 4291 | { |
5656b6b8 JB |
4292 | pending = xmalloc (sizeof (*pending)); |
4293 | pending->sym = sym; | |
4294 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4295 | } |
4296 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4297 | } |
800eeca4 JW |
4298 | *p = c; |
4299 | SKIP_WHITESPACE (); | |
4300 | if (*input_line_pointer != ',') | |
4301 | break; | |
4302 | ++input_line_pointer; | |
4303 | } | |
5656b6b8 JB |
4304 | if (!last_pending) |
4305 | { | |
4306 | unwind.proc_pending.sym = expr_build_dot (); | |
4307 | last_pending = &unwind.proc_pending; | |
4308 | } | |
4309 | last_pending->next = NULL; | |
800eeca4 JW |
4310 | demand_empty_rest_of_line (); |
4311 | ia64_do_align (16); | |
4312 | ||
75e09913 | 4313 | unwind.prologue = 0; |
33d01f33 | 4314 | unwind.prologue_count = 0; |
75e09913 JB |
4315 | unwind.body = 0; |
4316 | unwind.insn = 0; | |
e0c9811a JW |
4317 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4318 | unwind.personality_routine = 0; | |
800eeca4 JW |
4319 | } |
4320 | ||
4321 | static void | |
5a49b8ac | 4322 | dot_body (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4323 | { |
75e09913 JB |
4324 | if (!in_procedure ("body")) |
4325 | return; | |
4326 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
ad4b42b4 | 4327 | as_warn (_("Initial .body should precede any instructions")); |
ba825241 | 4328 | check_pending_save (); |
75e09913 | 4329 | |
e0c9811a | 4330 | unwind.prologue = 0; |
30d25259 | 4331 | unwind.prologue_mask = 0; |
75e09913 | 4332 | unwind.body = 1; |
30d25259 | 4333 | |
e4e8248d | 4334 | add_unwind_entry (output_body (), 0); |
800eeca4 JW |
4335 | } |
4336 | ||
4337 | static void | |
5a49b8ac | 4338 | dot_prologue (int dummy ATTRIBUTE_UNUSED) |
800eeca4 | 4339 | { |
e4e8248d | 4340 | unsigned mask = 0, grsave = 0; |
e0c9811a | 4341 | |
75e09913 JB |
4342 | if (!in_procedure ("prologue")) |
4343 | return; | |
4344 | if (unwind.prologue) | |
4345 | { | |
ad4b42b4 | 4346 | as_bad (_(".prologue within prologue")); |
75e09913 JB |
4347 | ignore_rest_of_line (); |
4348 | return; | |
4349 | } | |
4350 | if (!unwind.body && unwind.insn) | |
ad4b42b4 | 4351 | as_warn (_("Initial .prologue should precede any instructions")); |
75e09913 | 4352 | |
e0c9811a | 4353 | if (!is_it_end_of_statement ()) |
800eeca4 | 4354 | { |
e4e8248d | 4355 | expressionS e; |
cd42ff9c | 4356 | int n, sep = parse_operand_and_eval (&e, ','); |
30d25259 | 4357 | |
e4e8248d JB |
4358 | if (e.X_op != O_constant |
4359 | || e.X_add_number < 0 | |
4360 | || e.X_add_number > 0xf) | |
ad4b42b4 | 4361 | as_bad (_("First operand to .prologue must be a positive 4-bit constant")); |
e4e8248d | 4362 | else if (e.X_add_number == 0) |
ad4b42b4 | 4363 | as_warn (_("Pointless use of zero first operand to .prologue")); |
e4e8248d JB |
4364 | else |
4365 | mask = e.X_add_number; | |
4366 | n = popcount (mask); | |
30d25259 | 4367 | |
e4e8248d | 4368 | if (sep == ',') |
cd42ff9c | 4369 | parse_operand_and_eval (&e, 0); |
800eeca4 | 4370 | else |
e4e8248d JB |
4371 | e.X_op = O_absent; |
4372 | if (e.X_op == O_constant | |
4373 | && e.X_add_number >= 0 | |
4374 | && e.X_add_number < 128) | |
4375 | { | |
4376 | if (md.unwind_check == unwind_check_error) | |
ad4b42b4 | 4377 | as_warn (_("Using a constant as second operand to .prologue is deprecated")); |
e4e8248d JB |
4378 | grsave = e.X_add_number; |
4379 | } | |
4380 | else if (e.X_op != O_register | |
4381 | || (grsave = e.X_add_number - REG_GR) > 127) | |
4382 | { | |
ad4b42b4 | 4383 | as_bad (_("Second operand to .prologue must be a general register")); |
e4e8248d JB |
4384 | grsave = 0; |
4385 | } | |
4386 | else if (grsave > 128U - n) | |
4387 | { | |
ad4b42b4 | 4388 | as_bad (_("Second operand to .prologue must be the first of %d general registers"), n); |
e4e8248d JB |
4389 | grsave = 0; |
4390 | } | |
4391 | ||
800eeca4 | 4392 | } |
e4e8248d JB |
4393 | |
4394 | if (mask) | |
4395 | add_unwind_entry (output_prologue_gr (mask, grsave), 0); | |
800eeca4 | 4396 | else |
e4e8248d | 4397 | add_unwind_entry (output_prologue (), 0); |
30d25259 RH |
4398 | |
4399 | unwind.prologue = 1; | |
4400 | unwind.prologue_mask = mask; | |
e4e8248d | 4401 | unwind.prologue_gr = grsave; |
75e09913 | 4402 | unwind.body = 0; |
33d01f33 | 4403 | ++unwind.prologue_count; |
800eeca4 JW |
4404 | } |
4405 | ||
4406 | static void | |
5a49b8ac | 4407 | dot_endp (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4408 | { |
4409 | expressionS e; | |
44f5c83a | 4410 | int bytes_per_address; |
800eeca4 JW |
4411 | long where; |
4412 | segT saved_seg; | |
4413 | subsegT saved_subseg; | |
5656b6b8 | 4414 | proc_pending *pending; |
970d6792 | 4415 | int unwind_check = md.unwind_check; |
800eeca4 | 4416 | |
970d6792 | 4417 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4418 | if (!in_procedure ("endp")) |
4419 | return; | |
970d6792 | 4420 | md.unwind_check = unwind_check; |
75e09913 | 4421 | |
91a2ae2a RH |
4422 | if (unwind.saved_text_seg) |
4423 | { | |
4424 | saved_seg = unwind.saved_text_seg; | |
4425 | saved_subseg = unwind.saved_text_subseg; | |
4426 | unwind.saved_text_seg = NULL; | |
4427 | } | |
4428 | else | |
4429 | { | |
4430 | saved_seg = now_seg; | |
4431 | saved_subseg = now_subseg; | |
4432 | } | |
4433 | ||
800eeca4 | 4434 | insn_group_break (1, 0, 0); |
800eeca4 | 4435 | |
91a2ae2a RH |
4436 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4437 | if (!unwind.info) | |
2d6ed997 | 4438 | generate_unwind_image (saved_seg); |
800eeca4 | 4439 | |
91a2ae2a RH |
4440 | if (unwind.info || unwind.force_unwind_entry) |
4441 | { | |
75e09913 JB |
4442 | symbolS *proc_end; |
4443 | ||
91a2ae2a | 4444 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4445 | proc_end = expr_build_dot (); |
5e7474a7 | 4446 | |
da9f89d4 | 4447 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4448 | |
557debba JW |
4449 | /* Make sure that section has 4 byte alignment for ILP32 and |
4450 | 8 byte alignment for LP64. */ | |
4451 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4452 | |
557debba JW |
4453 | /* Need space for 3 pointers for procedure start, procedure end, |
4454 | and unwind info. */ | |
6baf2b51 | 4455 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4456 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4457 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4458 | |
40449e9f | 4459 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4460 | e.X_op = O_pseudo_fixup; |
4461 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4462 | e.X_add_number = 0; | |
5656b6b8 JB |
4463 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4464 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4465 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4466 | S_GET_VALUE (unwind.proc_pending.sym), | |
4467 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4468 | else |
5656b6b8 | 4469 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4470 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4471 | |
800eeca4 JW |
4472 | e.X_op = O_pseudo_fixup; |
4473 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4474 | e.X_add_number = 0; | |
75e09913 | 4475 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4476 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4477 | bytes_per_address, &e); | |
4478 | ||
4479 | if (unwind.info) | |
4480 | { | |
4481 | e.X_op = O_pseudo_fixup; | |
4482 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4483 | e.X_add_number = 0; | |
4484 | e.X_add_symbol = unwind.info; | |
4485 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4486 | bytes_per_address, &e); | |
4487 | } | |
91a2ae2a | 4488 | } |
800eeca4 | 4489 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4490 | |
5656b6b8 JB |
4491 | /* Set symbol sizes. */ |
4492 | pending = &unwind.proc_pending; | |
4493 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4494 | { |
5656b6b8 | 4495 | do |
75e09913 | 4496 | { |
5656b6b8 JB |
4497 | symbolS *sym = pending->sym; |
4498 | ||
4499 | if (!S_IS_DEFINED (sym)) | |
ad4b42b4 | 4500 | as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym)); |
5656b6b8 JB |
4501 | else if (S_GET_SIZE (sym) == 0 |
4502 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4503 | { |
75e09913 JB |
4504 | fragS *frag = symbol_get_frag (sym); |
4505 | ||
5656b6b8 | 4506 | if (frag) |
c538998c | 4507 | { |
75e09913 JB |
4508 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4509 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4510 | else | |
4511 | { | |
4512 | symbol_get_obj (sym)->size = | |
4513 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4514 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4515 | symbol_get_obj (sym)->size->X_add_symbol | |
4516 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4517 | frag_now_fix (), frag_now); | |
4518 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4519 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4520 | } | |
c538998c JJ |
4521 | } |
4522 | } | |
5656b6b8 JB |
4523 | } while ((pending = pending->next) != NULL); |
4524 | } | |
4525 | ||
4526 | /* Parse names of main and alternate entry points. */ | |
4527 | while (1) | |
4528 | { | |
4529 | char *name, *p, c; | |
4530 | ||
4531 | SKIP_WHITESPACE (); | |
4532 | name = input_line_pointer; | |
4533 | c = get_symbol_end (); | |
4534 | p = input_line_pointer; | |
4535 | if (!*name) | |
4536 | (md.unwind_check == unwind_check_warning | |
4537 | ? as_warn | |
ad4b42b4 | 4538 | : as_bad) (_("Empty argument of .endp")); |
5656b6b8 JB |
4539 | else |
4540 | { | |
4541 | symbolS *sym = symbol_find (name); | |
4542 | ||
4543 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4544 | { | |
4545 | if (sym == pending->sym) | |
4546 | { | |
4547 | pending->sym = NULL; | |
4548 | break; | |
4549 | } | |
4550 | } | |
4551 | if (!sym || !pending) | |
ad4b42b4 | 4552 | as_warn (_("`%s' was not specified with previous .proc"), name); |
c538998c JJ |
4553 | } |
4554 | *p = c; | |
4555 | SKIP_WHITESPACE (); | |
4556 | if (*input_line_pointer != ',') | |
4557 | break; | |
4558 | ++input_line_pointer; | |
4559 | } | |
4560 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4561 | |
4562 | /* Deliberately only checking for the main entry point here; the | |
4563 | language spec even says all arguments to .endp are ignored. */ | |
4564 | if (unwind.proc_pending.sym | |
4565 | && S_GET_NAME (unwind.proc_pending.sym) | |
4566 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
ad4b42b4 | 4567 | as_warn (_("`%s' should be an operand to this .endp"), |
5656b6b8 JB |
4568 | S_GET_NAME (unwind.proc_pending.sym)); |
4569 | while (unwind.proc_pending.next) | |
4570 | { | |
4571 | pending = unwind.proc_pending.next; | |
4572 | unwind.proc_pending.next = pending->next; | |
4573 | free (pending); | |
4574 | } | |
4575 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4576 | } |
4577 | ||
4578 | static void | |
d3ce72d0 | 4579 | dot_template (int template_val) |
800eeca4 | 4580 | { |
d3ce72d0 | 4581 | CURR_SLOT.user_template = template_val; |
800eeca4 JW |
4582 | } |
4583 | ||
4584 | static void | |
5a49b8ac | 4585 | dot_regstk (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4586 | { |
4587 | int ins, locs, outs, rots; | |
4588 | ||
4589 | if (is_it_end_of_statement ()) | |
4590 | ins = locs = outs = rots = 0; | |
4591 | else | |
4592 | { | |
4593 | ins = get_absolute_expression (); | |
4594 | if (*input_line_pointer++ != ',') | |
4595 | goto err; | |
4596 | locs = get_absolute_expression (); | |
4597 | if (*input_line_pointer++ != ',') | |
4598 | goto err; | |
4599 | outs = get_absolute_expression (); | |
4600 | if (*input_line_pointer++ != ',') | |
4601 | goto err; | |
4602 | rots = get_absolute_expression (); | |
4603 | } | |
4604 | set_regstack (ins, locs, outs, rots); | |
4605 | return; | |
4606 | ||
4607 | err: | |
ad4b42b4 | 4608 | as_bad (_("Comma expected")); |
800eeca4 JW |
4609 | ignore_rest_of_line (); |
4610 | } | |
4611 | ||
4612 | static void | |
5a49b8ac | 4613 | dot_rot (int type) |
800eeca4 | 4614 | { |
6a2375c6 JB |
4615 | offsetT num_regs; |
4616 | valueT num_alloced = 0; | |
800eeca4 JW |
4617 | struct dynreg **drpp, *dr; |
4618 | int ch, base_reg = 0; | |
4619 | char *name, *start; | |
4620 | size_t len; | |
4621 | ||
4622 | switch (type) | |
4623 | { | |
4624 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4625 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4626 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4627 | default: break; | |
4628 | } | |
4629 | ||
542d6675 | 4630 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4631 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4632 | { | |
db0bc284 | 4633 | hash_delete (md.dynreg_hash, dr->name, FALSE); |
20b36a95 | 4634 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4635 | dr->num_regs = 0; |
4636 | } | |
4637 | ||
4638 | drpp = &md.dynreg[type]; | |
4639 | while (1) | |
4640 | { | |
4641 | start = input_line_pointer; | |
4642 | ch = get_symbol_end (); | |
20b36a95 | 4643 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4644 | *input_line_pointer = ch; |
800eeca4 JW |
4645 | |
4646 | SKIP_WHITESPACE (); | |
4647 | if (*input_line_pointer != '[') | |
4648 | { | |
ad4b42b4 | 4649 | as_bad (_("Expected '['")); |
800eeca4 JW |
4650 | goto err; |
4651 | } | |
4652 | ++input_line_pointer; /* skip '[' */ | |
4653 | ||
4654 | num_regs = get_absolute_expression (); | |
4655 | ||
4656 | if (*input_line_pointer++ != ']') | |
4657 | { | |
ad4b42b4 | 4658 | as_bad (_("Expected ']'")); |
800eeca4 JW |
4659 | goto err; |
4660 | } | |
6a2375c6 JB |
4661 | if (num_regs <= 0) |
4662 | { | |
ad4b42b4 | 4663 | as_bad (_("Number of elements must be positive")); |
6a2375c6 JB |
4664 | goto err; |
4665 | } | |
800eeca4 JW |
4666 | SKIP_WHITESPACE (); |
4667 | ||
4668 | num_alloced += num_regs; | |
4669 | switch (type) | |
4670 | { | |
4671 | case DYNREG_GR: | |
4672 | if (num_alloced > md.rot.num_regs) | |
4673 | { | |
ad4b42b4 | 4674 | as_bad (_("Used more than the declared %d rotating registers"), |
800eeca4 JW |
4675 | md.rot.num_regs); |
4676 | goto err; | |
4677 | } | |
4678 | break; | |
4679 | case DYNREG_FR: | |
4680 | if (num_alloced > 96) | |
4681 | { | |
ad4b42b4 | 4682 | as_bad (_("Used more than the available 96 rotating registers")); |
800eeca4 JW |
4683 | goto err; |
4684 | } | |
4685 | break; | |
4686 | case DYNREG_PR: | |
4687 | if (num_alloced > 48) | |
4688 | { | |
ad4b42b4 | 4689 | as_bad (_("Used more than the available 48 rotating registers")); |
800eeca4 JW |
4690 | goto err; |
4691 | } | |
4692 | break; | |
4693 | ||
4694 | default: | |
4695 | break; | |
4696 | } | |
4697 | ||
800eeca4 JW |
4698 | if (!*drpp) |
4699 | { | |
4700 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4701 | memset (*drpp, 0, sizeof (*dr)); | |
4702 | } | |
4703 | ||
20b36a95 JB |
4704 | name = obstack_alloc (¬es, len + 1); |
4705 | memcpy (name, start, len); | |
4706 | name[len] = '\0'; | |
4707 | ||
800eeca4 JW |
4708 | dr = *drpp; |
4709 | dr->name = name; | |
4710 | dr->num_regs = num_regs; | |
4711 | dr->base = base_reg; | |
4712 | drpp = &dr->next; | |
4713 | base_reg += num_regs; | |
4714 | ||
4715 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4716 | { | |
ad4b42b4 | 4717 | as_bad (_("Attempt to redefine register set `%s'"), name); |
20b36a95 | 4718 | obstack_free (¬es, name); |
800eeca4 JW |
4719 | goto err; |
4720 | } | |
4721 | ||
4722 | if (*input_line_pointer != ',') | |
4723 | break; | |
4724 | ++input_line_pointer; /* skip comma */ | |
4725 | SKIP_WHITESPACE (); | |
4726 | } | |
4727 | demand_empty_rest_of_line (); | |
4728 | return; | |
4729 | ||
4730 | err: | |
4731 | ignore_rest_of_line (); | |
4732 | } | |
4733 | ||
4734 | static void | |
5a49b8ac | 4735 | dot_byteorder (int byteorder) |
800eeca4 | 4736 | { |
10a98291 L |
4737 | segment_info_type *seginfo = seg_info (now_seg); |
4738 | ||
4739 | if (byteorder == -1) | |
4740 | { | |
4741 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4742 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4743 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4744 | } | |
4745 | else | |
4746 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4747 | ||
4748 | if (target_big_endian != byteorder) | |
4749 | { | |
4750 | target_big_endian = byteorder; | |
4751 | if (target_big_endian) | |
4752 | { | |
4753 | ia64_number_to_chars = number_to_chars_bigendian; | |
4754 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4755 | } | |
4756 | else | |
4757 | { | |
4758 | ia64_number_to_chars = number_to_chars_littleendian; | |
4759 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4760 | } | |
4761 | } | |
800eeca4 JW |
4762 | } |
4763 | ||
4764 | static void | |
5a49b8ac | 4765 | dot_psr (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4766 | { |
4767 | char *option; | |
4768 | int ch; | |
4769 | ||
4770 | while (1) | |
4771 | { | |
4772 | option = input_line_pointer; | |
4773 | ch = get_symbol_end (); | |
4774 | if (strcmp (option, "lsb") == 0) | |
4775 | md.flags &= ~EF_IA_64_BE; | |
4776 | else if (strcmp (option, "msb") == 0) | |
4777 | md.flags |= EF_IA_64_BE; | |
4778 | else if (strcmp (option, "abi32") == 0) | |
4779 | md.flags &= ~EF_IA_64_ABI64; | |
4780 | else if (strcmp (option, "abi64") == 0) | |
4781 | md.flags |= EF_IA_64_ABI64; | |
4782 | else | |
ad4b42b4 | 4783 | as_bad (_("Unknown psr option `%s'"), option); |
800eeca4 JW |
4784 | *input_line_pointer = ch; |
4785 | ||
4786 | SKIP_WHITESPACE (); | |
4787 | if (*input_line_pointer != ',') | |
4788 | break; | |
4789 | ||
4790 | ++input_line_pointer; | |
4791 | SKIP_WHITESPACE (); | |
4792 | } | |
4793 | demand_empty_rest_of_line (); | |
4794 | } | |
4795 | ||
800eeca4 | 4796 | static void |
5a49b8ac | 4797 | dot_ln (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4798 | { |
4799 | new_logical_line (0, get_absolute_expression ()); | |
4800 | demand_empty_rest_of_line (); | |
4801 | } | |
4802 | ||
ef6a2b41 | 4803 | static void |
91d6fa6a | 4804 | cross_section (int ref, void (*builder) (int), int ua) |
800eeca4 | 4805 | { |
ef6a2b41 JB |
4806 | char *start, *end; |
4807 | int saved_auto_align; | |
4808 | unsigned int section_count; | |
800eeca4 JW |
4809 | |
4810 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4811 | start = input_line_pointer; |
4812 | if (*start == '"') | |
4813 | { | |
4814 | int len; | |
4815 | char *name; | |
4816 | ||
b3f19c14 | 4817 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4818 | obstack_free(¬es, name); |
4819 | if (!name) | |
4820 | { | |
4821 | ignore_rest_of_line (); | |
4822 | return; | |
4823 | } | |
4824 | } | |
b3f19c14 | 4825 | else |
800eeca4 | 4826 | { |
b3f19c14 JB |
4827 | char c = get_symbol_end (); |
4828 | ||
4829 | if (input_line_pointer == start) | |
4830 | { | |
ad4b42b4 | 4831 | as_bad (_("Missing section name")); |
b3f19c14 | 4832 | ignore_rest_of_line (); |
ef6a2b41 | 4833 | return; |
b3f19c14 | 4834 | } |
b3f19c14 | 4835 | *input_line_pointer = c; |
800eeca4 | 4836 | } |
ef6a2b41 | 4837 | end = input_line_pointer; |
800eeca4 JW |
4838 | SKIP_WHITESPACE (); |
4839 | if (*input_line_pointer != ',') | |
4840 | { | |
ad4b42b4 | 4841 | as_bad (_("Comma expected after section name")); |
800eeca4 | 4842 | ignore_rest_of_line (); |
ef6a2b41 | 4843 | return; |
800eeca4 | 4844 | } |
ef6a2b41 JB |
4845 | *end = '\0'; |
4846 | end = input_line_pointer + 1; /* skip comma */ | |
4847 | input_line_pointer = start; | |
4848 | md.keep_pending_output = 1; | |
91d6fa6a | 4849 | section_count = bfd_count_sections (stdoutput); |
ef6a2b41 | 4850 | obj_elf_section (0); |
91d6fa6a | 4851 | if (section_count != bfd_count_sections (stdoutput)) |
ad4b42b4 | 4852 | as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.")); |
ef6a2b41 JB |
4853 | input_line_pointer = end; |
4854 | saved_auto_align = md.auto_align; | |
4855 | if (ua) | |
4856 | md.auto_align = 0; | |
91d6fa6a | 4857 | (*builder) (ref); |
ef6a2b41 JB |
4858 | if (ua) |
4859 | md.auto_align = saved_auto_align; | |
4860 | obj_elf_previous (0); | |
4861 | md.keep_pending_output = 0; | |
800eeca4 JW |
4862 | } |
4863 | ||
4864 | static void | |
5a49b8ac | 4865 | dot_xdata (int size) |
800eeca4 | 4866 | { |
ef6a2b41 | 4867 | cross_section (size, cons, 0); |
800eeca4 JW |
4868 | } |
4869 | ||
4870 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4871 | |
800eeca4 | 4872 | static void |
5a49b8ac | 4873 | stmt_float_cons (int kind) |
800eeca4 | 4874 | { |
165a7f90 | 4875 | size_t alignment; |
800eeca4 JW |
4876 | |
4877 | switch (kind) | |
4878 | { | |
165a7f90 L |
4879 | case 'd': |
4880 | alignment = 8; | |
4881 | break; | |
4882 | ||
4883 | case 'x': | |
4884 | case 'X': | |
4885 | alignment = 16; | |
4886 | break; | |
800eeca4 JW |
4887 | |
4888 | case 'f': | |
4889 | default: | |
165a7f90 | 4890 | alignment = 4; |
800eeca4 JW |
4891 | break; |
4892 | } | |
165a7f90 | 4893 | ia64_do_align (alignment); |
800eeca4 JW |
4894 | float_cons (kind); |
4895 | } | |
4896 | ||
4897 | static void | |
5a49b8ac | 4898 | stmt_cons_ua (int size) |
800eeca4 JW |
4899 | { |
4900 | int saved_auto_align = md.auto_align; | |
4901 | ||
4902 | md.auto_align = 0; | |
4903 | cons (size); | |
4904 | md.auto_align = saved_auto_align; | |
4905 | } | |
4906 | ||
4907 | static void | |
5a49b8ac | 4908 | dot_xfloat_cons (int kind) |
800eeca4 | 4909 | { |
ef6a2b41 | 4910 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4911 | } |
4912 | ||
4913 | static void | |
38a57ae7 | 4914 | dot_xstringer (int zero) |
800eeca4 | 4915 | { |
ef6a2b41 | 4916 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4917 | } |
4918 | ||
4919 | static void | |
5a49b8ac | 4920 | dot_xdata_ua (int size) |
800eeca4 | 4921 | { |
ef6a2b41 | 4922 | cross_section (size, cons, 1); |
800eeca4 JW |
4923 | } |
4924 | ||
4925 | static void | |
5a49b8ac | 4926 | dot_xfloat_cons_ua (int kind) |
800eeca4 | 4927 | { |
ef6a2b41 | 4928 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4929 | } |
4930 | ||
4931 | /* .reg.val <regname>,value */ | |
542d6675 | 4932 | |
800eeca4 | 4933 | static void |
5a49b8ac | 4934 | dot_reg_val (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
4935 | { |
4936 | expressionS reg; | |
4937 | ||
60d11e55 | 4938 | expression_and_evaluate (®); |
800eeca4 JW |
4939 | if (reg.X_op != O_register) |
4940 | { | |
4941 | as_bad (_("Register name expected")); | |
4942 | ignore_rest_of_line (); | |
4943 | } | |
4944 | else if (*input_line_pointer++ != ',') | |
4945 | { | |
4946 | as_bad (_("Comma expected")); | |
4947 | ignore_rest_of_line (); | |
4948 | } | |
197865e8 | 4949 | else |
800eeca4 JW |
4950 | { |
4951 | valueT value = get_absolute_expression (); | |
4952 | int regno = reg.X_add_number; | |
a66d2bb7 | 4953 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4954 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4955 | else |
542d6675 KH |
4956 | { |
4957 | gr_values[regno - REG_GR].known = 1; | |
4958 | gr_values[regno - REG_GR].value = value; | |
4959 | gr_values[regno - REG_GR].path = md.path; | |
4960 | } | |
800eeca4 JW |
4961 | } |
4962 | demand_empty_rest_of_line (); | |
4963 | } | |
4964 | ||
5e819f9c JW |
4965 | /* |
4966 | .serialize.data | |
4967 | .serialize.instruction | |
4968 | */ | |
4969 | static void | |
5a49b8ac | 4970 | dot_serialize (int type) |
5e819f9c JW |
4971 | { |
4972 | insn_group_break (0, 0, 0); | |
4973 | if (type) | |
4974 | instruction_serialization (); | |
4975 | else | |
4976 | data_serialization (); | |
4977 | insn_group_break (0, 0, 0); | |
4978 | demand_empty_rest_of_line (); | |
4979 | } | |
4980 | ||
197865e8 | 4981 | /* select dv checking mode |
800eeca4 JW |
4982 | .auto |
4983 | .explicit | |
4984 | .default | |
4985 | ||
197865e8 | 4986 | A stop is inserted when changing modes |
800eeca4 | 4987 | */ |
542d6675 | 4988 | |
800eeca4 | 4989 | static void |
5a49b8ac | 4990 | dot_dv_mode (int type) |
800eeca4 JW |
4991 | { |
4992 | if (md.manual_bundling) | |
4993 | as_warn (_("Directive invalid within a bundle")); | |
4994 | ||
4995 | if (type == 'E' || type == 'A') | |
4996 | md.mode_explicitly_set = 0; | |
4997 | else | |
4998 | md.mode_explicitly_set = 1; | |
4999 | ||
5000 | md.detect_dv = 1; | |
5001 | switch (type) | |
5002 | { | |
5003 | case 'A': | |
5004 | case 'a': | |
5005 | if (md.explicit_mode) | |
542d6675 | 5006 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5007 | md.explicit_mode = 0; |
5008 | break; | |
5009 | case 'E': | |
5010 | case 'e': | |
5011 | if (!md.explicit_mode) | |
542d6675 | 5012 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5013 | md.explicit_mode = 1; |
5014 | break; | |
5015 | default: | |
5016 | case 'd': | |
5017 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5018 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5019 | md.explicit_mode = md.default_explicit_mode; |
5020 | md.mode_explicitly_set = 0; | |
5021 | break; | |
5022 | } | |
5023 | } | |
5024 | ||
5025 | static void | |
5a49b8ac | 5026 | print_prmask (valueT mask) |
800eeca4 JW |
5027 | { |
5028 | int regno; | |
5029 | char *comma = ""; | |
542d6675 | 5030 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5031 | { |
542d6675 KH |
5032 | if (mask & ((valueT) 1 << regno)) |
5033 | { | |
5034 | fprintf (stderr, "%s p%d", comma, regno); | |
5035 | comma = ","; | |
5036 | } | |
800eeca4 JW |
5037 | } |
5038 | } | |
5039 | ||
5040 | /* | |
05ee4b0f JB |
5041 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5042 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5043 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5044 | .pred.safe_across_calls p1 [, p2 [,...]] |
5045 | */ | |
542d6675 | 5046 | |
800eeca4 | 5047 | static void |
5a49b8ac | 5048 | dot_pred_rel (int type) |
800eeca4 JW |
5049 | { |
5050 | valueT mask = 0; | |
5051 | int count = 0; | |
5052 | int p1 = -1, p2 = -1; | |
5053 | ||
5054 | if (type == 0) | |
5055 | { | |
05ee4b0f | 5056 | if (*input_line_pointer == '"') |
542d6675 KH |
5057 | { |
5058 | int len; | |
5059 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5060 | |
542d6675 KH |
5061 | if (strcmp (form, "mutex") == 0) |
5062 | type = 'm'; | |
5063 | else if (strcmp (form, "clear") == 0) | |
5064 | type = 'c'; | |
5065 | else if (strcmp (form, "imply") == 0) | |
5066 | type = 'i'; | |
05ee4b0f JB |
5067 | obstack_free (¬es, form); |
5068 | } | |
5069 | else if (*input_line_pointer == '@') | |
5070 | { | |
5071 | char *form = ++input_line_pointer; | |
5072 | char c = get_symbol_end(); | |
5073 | ||
5074 | if (strcmp (form, "mutex") == 0) | |
5075 | type = 'm'; | |
5076 | else if (strcmp (form, "clear") == 0) | |
5077 | type = 'c'; | |
5078 | else if (strcmp (form, "imply") == 0) | |
5079 | type = 'i'; | |
5080 | *input_line_pointer = c; | |
5081 | } | |
5082 | else | |
5083 | { | |
5084 | as_bad (_("Missing predicate relation type")); | |
5085 | ignore_rest_of_line (); | |
5086 | return; | |
5087 | } | |
5088 | if (type == 0) | |
5089 | { | |
5090 | as_bad (_("Unrecognized predicate relation type")); | |
5091 | ignore_rest_of_line (); | |
5092 | return; | |
542d6675 | 5093 | } |
800eeca4 | 5094 | if (*input_line_pointer == ',') |
542d6675 | 5095 | ++input_line_pointer; |
800eeca4 JW |
5096 | SKIP_WHITESPACE (); |
5097 | } | |
5098 | ||
800eeca4 JW |
5099 | while (1) |
5100 | { | |
20b36a95 | 5101 | valueT bits = 1; |
cc941dee | 5102 | int sep, regno; |
20b36a95 JB |
5103 | expressionS pr, *pr1, *pr2; |
5104 | ||
cd42ff9c | 5105 | sep = parse_operand_and_eval (&pr, ','); |
20b36a95 JB |
5106 | if (pr.X_op == O_register |
5107 | && pr.X_add_number >= REG_P | |
5108 | && pr.X_add_number <= REG_P + 63) | |
5109 | { | |
5110 | regno = pr.X_add_number - REG_P; | |
5111 | bits <<= regno; | |
5112 | count++; | |
5113 | if (p1 == -1) | |
5114 | p1 = regno; | |
5115 | else if (p2 == -1) | |
5116 | p2 = regno; | |
5117 | } | |
5118 | else if (type != 'i' | |
5119 | && pr.X_op == O_subtract | |
5120 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5121 | && pr1->X_op == O_register | |
5122 | && pr1->X_add_number >= REG_P | |
5123 | && pr1->X_add_number <= REG_P + 63 | |
5124 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5125 | && pr2->X_op == O_register | |
5126 | && pr2->X_add_number >= REG_P | |
5127 | && pr2->X_add_number <= REG_P + 63) | |
5128 | { | |
5129 | /* It's a range. */ | |
5130 | int stop; | |
5131 | ||
5132 | regno = pr1->X_add_number - REG_P; | |
5133 | stop = pr2->X_add_number - REG_P; | |
5134 | if (regno >= stop) | |
542d6675 KH |
5135 | { |
5136 | as_bad (_("Bad register range")); | |
5137 | ignore_rest_of_line (); | |
5138 | return; | |
5139 | } | |
20b36a95 JB |
5140 | bits = ((bits << stop) << 1) - (bits << regno); |
5141 | count += stop - regno + 1; | |
5142 | } | |
5143 | else | |
5144 | { | |
5145 | as_bad (_("Predicate register expected")); | |
5146 | ignore_rest_of_line (); | |
5147 | return; | |
542d6675 | 5148 | } |
20b36a95 JB |
5149 | if (mask & bits) |
5150 | as_warn (_("Duplicate predicate register ignored")); | |
5151 | mask |= bits; | |
cc941dee | 5152 | if (sep != ',') |
542d6675 | 5153 | break; |
800eeca4 JW |
5154 | } |
5155 | ||
5156 | switch (type) | |
5157 | { | |
5158 | case 'c': | |
5159 | if (count == 0) | |
542d6675 | 5160 | mask = ~(valueT) 0; |
800eeca4 | 5161 | clear_qp_mutex (mask); |
197865e8 | 5162 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5163 | break; |
5164 | case 'i': | |
5165 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5166 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5167 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5168 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5169 | else |
542d6675 | 5170 | add_qp_imply (p1, p2); |
800eeca4 JW |
5171 | break; |
5172 | case 'm': | |
5173 | if (count < 2) | |
542d6675 KH |
5174 | { |
5175 | as_bad (_("At least two PR arguments expected")); | |
5176 | break; | |
5177 | } | |
800eeca4 | 5178 | else if (mask & 1) |
542d6675 KH |
5179 | { |
5180 | as_bad (_("Use of p0 is not valid in this context")); | |
5181 | break; | |
5182 | } | |
800eeca4 JW |
5183 | add_qp_mutex (mask); |
5184 | break; | |
5185 | case 's': | |
5186 | /* note that we don't override any existing relations */ | |
5187 | if (count == 0) | |
542d6675 KH |
5188 | { |
5189 | as_bad (_("At least one PR argument expected")); | |
5190 | break; | |
5191 | } | |
800eeca4 | 5192 | if (md.debug_dv) |
542d6675 KH |
5193 | { |
5194 | fprintf (stderr, "Safe across calls: "); | |
5195 | print_prmask (mask); | |
5196 | fprintf (stderr, "\n"); | |
5197 | } | |
800eeca4 JW |
5198 | qp_safe_across_calls = mask; |
5199 | break; | |
5200 | } | |
5201 | demand_empty_rest_of_line (); | |
5202 | } | |
5203 | ||
5204 | /* .entry label [, label [, ...]] | |
5205 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5206 | Otherwise, only global labels are considered entry points. */ |
5207 | ||
800eeca4 | 5208 | static void |
5a49b8ac | 5209 | dot_entry (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5210 | { |
5211 | const char *err; | |
5212 | char *name; | |
5213 | int c; | |
5214 | symbolS *symbolP; | |
5215 | ||
5216 | do | |
5217 | { | |
5218 | name = input_line_pointer; | |
5219 | c = get_symbol_end (); | |
5220 | symbolP = symbol_find_or_make (name); | |
5221 | ||
5a49b8ac | 5222 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (void *) symbolP); |
800eeca4 | 5223 | if (err) |
542d6675 KH |
5224 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5225 | name, err); | |
800eeca4 JW |
5226 | |
5227 | *input_line_pointer = c; | |
5228 | SKIP_WHITESPACE (); | |
5229 | c = *input_line_pointer; | |
5230 | if (c == ',') | |
5231 | { | |
5232 | input_line_pointer++; | |
5233 | SKIP_WHITESPACE (); | |
5234 | if (*input_line_pointer == '\n') | |
5235 | c = '\n'; | |
5236 | } | |
5237 | } | |
5238 | while (c == ','); | |
5239 | ||
5240 | demand_empty_rest_of_line (); | |
5241 | } | |
5242 | ||
197865e8 | 5243 | /* .mem.offset offset, base |
542d6675 KH |
5244 | "base" is used to distinguish between offsets from a different base. */ |
5245 | ||
800eeca4 | 5246 | static void |
5a49b8ac | 5247 | dot_mem_offset (int dummy ATTRIBUTE_UNUSED) |
800eeca4 JW |
5248 | { |
5249 | md.mem_offset.hint = 1; | |
5250 | md.mem_offset.offset = get_absolute_expression (); | |
5251 | if (*input_line_pointer != ',') | |
5252 | { | |
5253 | as_bad (_("Comma expected")); | |
5254 | ignore_rest_of_line (); | |
5255 | return; | |
5256 | } | |
5257 | ++input_line_pointer; | |
5258 | md.mem_offset.base = get_absolute_expression (); | |
5259 | demand_empty_rest_of_line (); | |
5260 | } | |
5261 | ||
542d6675 | 5262 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5263 | const pseudo_typeS md_pseudo_table[] = |
5264 | { | |
5265 | { "radix", dot_radix, 0 }, | |
5266 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5267 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5268 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5269 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5270 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5271 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5272 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5273 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5274 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5275 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5276 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5277 | { "proc", dot_proc, 0 }, |
5278 | { "body", dot_body, 0 }, | |
5279 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5280 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5281 | |
5282 | { "fframe", dot_fframe, 0 }, | |
5283 | { "vframe", dot_vframe, 0 }, | |
5284 | { "vframesp", dot_vframesp, 0 }, | |
e4e8248d | 5285 | { "vframepsp", dot_vframesp, 1 }, |
2434f565 JW |
5286 | { "save", dot_save, 0 }, |
5287 | { "restore", dot_restore, 0 }, | |
5288 | { "restorereg", dot_restorereg, 0 }, | |
e4e8248d | 5289 | { "restorereg.p", dot_restorereg, 1 }, |
2434f565 JW |
5290 | { "handlerdata", dot_handlerdata, 0 }, |
5291 | { "unwentry", dot_unwentry, 0 }, | |
5292 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5293 | { "savesp", dot_savemem, 0 }, |
5294 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5295 | { "save.g", dot_saveg, 0 }, |
5296 | { "save.f", dot_savef, 0 }, | |
5297 | { "save.b", dot_saveb, 0 }, | |
5298 | { "save.gf", dot_savegf, 0 }, | |
5299 | { "spill", dot_spill, 0 }, | |
5300 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5301 | { "spillsp", dot_spillmem, 0 }, |
5302 | { "spillpsp", dot_spillmem, 1 }, | |
e4e8248d JB |
5303 | { "spillreg.p", dot_spillreg, 1 }, |
5304 | { "spillsp.p", dot_spillmem, ~0 }, | |
5305 | { "spillpsp.p", dot_spillmem, ~1 }, | |
2434f565 JW |
5306 | { "label_state", dot_label_state, 0 }, |
5307 | { "copy_state", dot_copy_state, 0 }, | |
5308 | { "unwabi", dot_unwabi, 0 }, | |
5309 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5310 | { "mii", dot_template, 0x0 }, |
5311 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5312 | { "mlx", dot_template, 0x2 }, | |
5313 | { "mmi", dot_template, 0x4 }, | |
5314 | { "mfi", dot_template, 0x6 }, | |
5315 | { "mmf", dot_template, 0x7 }, | |
5316 | { "mib", dot_template, 0x8 }, | |
5317 | { "mbb", dot_template, 0x9 }, | |
5318 | { "bbb", dot_template, 0xb }, | |
5319 | { "mmb", dot_template, 0xc }, | |
5320 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5321 | { "align", dot_align, 0 }, |
800eeca4 JW |
5322 | { "regstk", dot_regstk, 0 }, |
5323 | { "rotr", dot_rot, DYNREG_GR }, | |
5324 | { "rotf", dot_rot, DYNREG_FR }, | |
5325 | { "rotp", dot_rot, DYNREG_PR }, | |
5326 | { "lsb", dot_byteorder, 0 }, | |
5327 | { "msb", dot_byteorder, 1 }, | |
5328 | { "psr", dot_psr, 0 }, | |
5329 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5330 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5331 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5332 | ||
5333 | { "xdata1", dot_xdata, 1 }, | |
5334 | { "xdata2", dot_xdata, 2 }, | |
5335 | { "xdata4", dot_xdata, 4 }, | |
5336 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5337 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5338 | { "xreal4", dot_xfloat_cons, 'f' }, |
5339 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5340 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5341 | { "xreal16", dot_xfloat_cons, 'X' }, |
38a57ae7 NC |
5342 | { "xstring", dot_xstringer, 8 + 0 }, |
5343 | { "xstringz", dot_xstringer, 8 + 1 }, | |
800eeca4 | 5344 | |
542d6675 | 5345 | /* unaligned versions: */ |
800eeca4 JW |
5346 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5347 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5348 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5349 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5350 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5351 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5352 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5353 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5354 | |
5355 | /* annotations/DV checking support */ | |
5356 | { "entry", dot_entry, 0 }, | |
2434f565 | 5357 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5358 | { "pred.rel", dot_pred_rel, 0 }, |
5359 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5360 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5361 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5362 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5363 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5364 | { "serialize.data", dot_serialize, 0 }, |
5365 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5366 | { "auto", dot_dv_mode, 'a' }, |
5367 | { "explicit", dot_dv_mode, 'e' }, | |
5368 | { "default", dot_dv_mode, 'd' }, | |
5369 | ||
87885043 JW |
5370 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5371 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5372 | tell it that these ones are supposed to be unaligned. Long term, | |
5373 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5374 | are aligned by default. */ | |
5375 | {"2byte", stmt_cons_ua, 2}, | |
5376 | {"4byte", stmt_cons_ua, 4}, | |
5377 | {"8byte", stmt_cons_ua, 8}, | |
5378 | ||
2b0bc501 TG |
5379 | #ifdef TE_VMS |
5380 | {"vms_common", obj_elf_vms_common, 0}, | |
5381 | #endif | |
5382 | ||
800eeca4 JW |
5383 | { NULL, 0, 0 } |
5384 | }; | |
5385 | ||
5386 | static const struct pseudo_opcode | |
5387 | { | |
5388 | const char *name; | |
5389 | void (*handler) (int); | |
5390 | int arg; | |
5391 | } | |
5392 | pseudo_opcode[] = | |
5393 | { | |
5394 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5395 | { "data1", cons, 1 }, | |
5396 | { "data2", cons, 2 }, | |
5397 | { "data4", cons, 4 }, | |
5398 | { "data8", cons, 8 }, | |
3969b680 | 5399 | { "data16", cons, 16 }, |
800eeca4 JW |
5400 | { "real4", stmt_float_cons, 'f' }, |
5401 | { "real8", stmt_float_cons, 'd' }, | |
5402 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5403 | { "real16", stmt_float_cons, 'X' }, |
38a57ae7 NC |
5404 | { "string", stringer, 8 + 0 }, |
5405 | { "stringz", stringer, 8 + 1 }, | |
800eeca4 | 5406 | |
542d6675 | 5407 | /* unaligned versions: */ |
800eeca4 JW |
5408 | { "data2.ua", stmt_cons_ua, 2 }, |
5409 | { "data4.ua", stmt_cons_ua, 4 }, | |
5410 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5411 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5412 | { "real4.ua", float_cons, 'f' }, |
5413 | { "real8.ua", float_cons, 'd' }, | |
5414 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5415 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5416 | }; |
5417 | ||
5418 | /* Declare a register by creating a symbol for it and entering it in | |
5419 | the symbol table. */ | |
542d6675 KH |
5420 | |
5421 | static symbolS * | |
5a49b8ac | 5422 | declare_register (const char *name, unsigned int regnum) |
800eeca4 JW |
5423 | { |
5424 | const char *err; | |
5425 | symbolS *sym; | |
5426 | ||
5e0bd176 | 5427 | sym = symbol_create (name, reg_section, regnum, &zero_address_frag); |
800eeca4 | 5428 | |
5a49b8ac | 5429 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (void *) sym); |
800eeca4 JW |
5430 | if (err) |
5431 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5432 | name, err); | |
5433 | ||
5434 | return sym; | |
5435 | } | |
5436 | ||
5437 | static void | |
5a49b8ac AM |
5438 | declare_register_set (const char *prefix, |
5439 | unsigned int num_regs, | |
5440 | unsigned int base_regnum) | |
800eeca4 JW |
5441 | { |
5442 | char name[8]; | |
8b84be9d | 5443 | unsigned int i; |
800eeca4 JW |
5444 | |
5445 | for (i = 0; i < num_regs; ++i) | |
5446 | { | |
f9f21a03 | 5447 | snprintf (name, sizeof (name), "%s%u", prefix, i); |
800eeca4 JW |
5448 | declare_register (name, base_regnum + i); |
5449 | } | |
5450 | } | |
5451 | ||
5452 | static unsigned int | |
5a49b8ac | 5453 | operand_width (enum ia64_opnd opnd) |
800eeca4 JW |
5454 | { |
5455 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5456 | unsigned int bits = 0; | |
5457 | int i; | |
5458 | ||
5459 | bits = 0; | |
5460 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5461 | bits += odesc->field[i].bits; | |
5462 | ||
5463 | return bits; | |
5464 | } | |
5465 | ||
87f8eb97 | 5466 | static enum operand_match_result |
91d6fa6a | 5467 | operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) |
800eeca4 | 5468 | { |
91d6fa6a | 5469 | enum ia64_opnd opnd = idesc->operands[res_index]; |
800eeca4 JW |
5470 | int bits, relocatable = 0; |
5471 | struct insn_fix *fix; | |
5472 | bfd_signed_vma val; | |
5473 | ||
5474 | switch (opnd) | |
5475 | { | |
542d6675 | 5476 | /* constants: */ |
800eeca4 JW |
5477 | |
5478 | case IA64_OPND_AR_CCV: | |
5479 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5480 | return OPERAND_MATCH; |
800eeca4 JW |
5481 | break; |
5482 | ||
c10d9d8f JW |
5483 | case IA64_OPND_AR_CSD: |
5484 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5485 | return OPERAND_MATCH; | |
5486 | break; | |
5487 | ||
800eeca4 JW |
5488 | case IA64_OPND_AR_PFS: |
5489 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5490 | return OPERAND_MATCH; |
800eeca4 JW |
5491 | break; |
5492 | ||
5493 | case IA64_OPND_GR0: | |
5494 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5495 | return OPERAND_MATCH; |
800eeca4 JW |
5496 | break; |
5497 | ||
5498 | case IA64_OPND_IP: | |
5499 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5500 | return OPERAND_MATCH; |
800eeca4 JW |
5501 | break; |
5502 | ||
5503 | case IA64_OPND_PR: | |
5504 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5505 | return OPERAND_MATCH; |
800eeca4 JW |
5506 | break; |
5507 | ||
5508 | case IA64_OPND_PR_ROT: | |
5509 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5510 | return OPERAND_MATCH; |
800eeca4 JW |
5511 | break; |
5512 | ||
5513 | case IA64_OPND_PSR: | |
5514 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5515 | return OPERAND_MATCH; |
800eeca4 JW |
5516 | break; |
5517 | ||
5518 | case IA64_OPND_PSR_L: | |
5519 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5520 | return OPERAND_MATCH; |
800eeca4 JW |
5521 | break; |
5522 | ||
5523 | case IA64_OPND_PSR_UM: | |
5524 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5525 | return OPERAND_MATCH; |
800eeca4 JW |
5526 | break; |
5527 | ||
5528 | case IA64_OPND_C1: | |
87f8eb97 JW |
5529 | if (e->X_op == O_constant) |
5530 | { | |
5531 | if (e->X_add_number == 1) | |
5532 | return OPERAND_MATCH; | |
5533 | else | |
5534 | return OPERAND_OUT_OF_RANGE; | |
5535 | } | |
800eeca4 JW |
5536 | break; |
5537 | ||
5538 | case IA64_OPND_C8: | |
87f8eb97 JW |
5539 | if (e->X_op == O_constant) |
5540 | { | |
5541 | if (e->X_add_number == 8) | |
5542 | return OPERAND_MATCH; | |
5543 | else | |
5544 | return OPERAND_OUT_OF_RANGE; | |
5545 | } | |
800eeca4 JW |
5546 | break; |
5547 | ||
5548 | case IA64_OPND_C16: | |
87f8eb97 JW |
5549 | if (e->X_op == O_constant) |
5550 | { | |
5551 | if (e->X_add_number == 16) | |
5552 | return OPERAND_MATCH; | |
5553 | else | |
5554 | return OPERAND_OUT_OF_RANGE; | |
5555 | } | |
800eeca4 JW |
5556 | break; |
5557 | ||
542d6675 | 5558 | /* register operands: */ |
800eeca4 JW |
5559 | |
5560 | case IA64_OPND_AR3: | |
5561 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5562 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5563 | return OPERAND_MATCH; |
800eeca4 JW |
5564 | break; |
5565 | ||
5566 | case IA64_OPND_B1: | |
5567 | case IA64_OPND_B2: | |
5568 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5569 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5570 | return OPERAND_MATCH; |
800eeca4 JW |
5571 | break; |
5572 | ||
5573 | case IA64_OPND_CR3: | |
5574 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5575 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5576 | return OPERAND_MATCH; |
800eeca4 JW |
5577 | break; |
5578 | ||
b3e14eda L |
5579 | case IA64_OPND_DAHR3: |
5580 | if (e->X_op == O_register && e->X_add_number >= REG_DAHR | |
5581 | && e->X_add_number < REG_DAHR + 8) | |
5582 | return OPERAND_MATCH; | |
5583 | break; | |
5584 | ||
800eeca4 JW |
5585 | case IA64_OPND_F1: |
5586 | case IA64_OPND_F2: | |
5587 | case IA64_OPND_F3: | |
5588 | case IA64_OPND_F4: | |
5589 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5590 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5591 | return OPERAND_MATCH; |
800eeca4 JW |
5592 | break; |
5593 | ||
5594 | case IA64_OPND_P1: | |
5595 | case IA64_OPND_P2: | |
5596 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5597 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5598 | return OPERAND_MATCH; |
800eeca4 JW |
5599 | break; |
5600 | ||
5601 | case IA64_OPND_R1: | |
5602 | case IA64_OPND_R2: | |
5603 | case IA64_OPND_R3: | |
5604 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5605 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5606 | return OPERAND_MATCH; |
800eeca4 JW |
5607 | break; |
5608 | ||
5609 | case IA64_OPND_R3_2: | |
87f8eb97 | 5610 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5611 | { |
87f8eb97 JW |
5612 | if (e->X_add_number < REG_GR + 4) |
5613 | return OPERAND_MATCH; | |
5614 | else if (e->X_add_number < REG_GR + 128) | |
5615 | return OPERAND_OUT_OF_RANGE; | |
5616 | } | |
800eeca4 JW |
5617 | break; |
5618 | ||
542d6675 | 5619 | /* indirect operands: */ |
800eeca4 JW |
5620 | case IA64_OPND_CPUID_R3: |
5621 | case IA64_OPND_DBR_R3: | |
5622 | case IA64_OPND_DTR_R3: | |
5623 | case IA64_OPND_ITR_R3: | |
5624 | case IA64_OPND_IBR_R3: | |
5625 | case IA64_OPND_MSR_R3: | |
5626 | case IA64_OPND_PKR_R3: | |
5627 | case IA64_OPND_PMC_R3: | |
5628 | case IA64_OPND_PMD_R3: | |
b3e14eda | 5629 | case IA64_OPND_DAHR_R3: |
800eeca4 JW |
5630 | case IA64_OPND_RR_R3: |
5631 | if (e->X_op == O_index && e->X_op_symbol | |
5632 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5633 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5634 | return OPERAND_MATCH; |
800eeca4 JW |
5635 | break; |
5636 | ||
5637 | case IA64_OPND_MR3: | |
5638 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5639 | return OPERAND_MATCH; |
800eeca4 JW |
5640 | break; |
5641 | ||
542d6675 | 5642 | /* immediate operands: */ |
800eeca4 JW |
5643 | case IA64_OPND_CNT2a: |
5644 | case IA64_OPND_LEN4: | |
5645 | case IA64_OPND_LEN6: | |
91d6fa6a | 5646 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 JW |
5647 | if (e->X_op == O_constant) |
5648 | { | |
5649 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5650 | return OPERAND_MATCH; | |
5651 | else | |
5652 | return OPERAND_OUT_OF_RANGE; | |
5653 | } | |
800eeca4 JW |
5654 | break; |
5655 | ||
5656 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5657 | if (e->X_op == O_constant) |
5658 | { | |
5659 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5660 | return OPERAND_MATCH; | |
5661 | else | |
5662 | return OPERAND_OUT_OF_RANGE; | |
5663 | } | |
800eeca4 JW |
5664 | break; |
5665 | ||
5666 | case IA64_OPND_CNT2c: | |
5667 | val = e->X_add_number; | |
87f8eb97 JW |
5668 | if (e->X_op == O_constant) |
5669 | { | |
5670 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5671 | return OPERAND_MATCH; | |
5672 | else | |
5673 | return OPERAND_OUT_OF_RANGE; | |
5674 | } | |
800eeca4 JW |
5675 | break; |
5676 | ||
5677 | case IA64_OPND_SOR: | |
5678 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5679 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5680 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5681 | case IA64_OPND_SOF: |
5682 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5683 | if (e->X_op == O_constant) |
5684 | { | |
5685 | if ((bfd_vma) e->X_add_number <= 96) | |
5686 | return OPERAND_MATCH; | |
5687 | else | |
5688 | return OPERAND_OUT_OF_RANGE; | |
5689 | } | |
800eeca4 JW |
5690 | break; |
5691 | ||
5692 | case IA64_OPND_IMMU62: | |
5693 | if (e->X_op == O_constant) | |
542d6675 | 5694 | { |
800eeca4 | 5695 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5696 | return OPERAND_MATCH; |
5697 | else | |
5698 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5699 | } |
197865e8 | 5700 | else |
542d6675 KH |
5701 | { |
5702 | /* FIXME -- need 62-bit relocation type */ | |
5703 | as_bad (_("62-bit relocation not yet implemented")); | |
5704 | } | |
800eeca4 JW |
5705 | break; |
5706 | ||
5707 | case IA64_OPND_IMMU64: | |
5708 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5709 | || e->X_op == O_subtract) | |
5710 | { | |
5711 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5712 | fix->code = BFD_RELOC_IA64_IMM64; | |
5713 | if (e->X_op != O_subtract) | |
5714 | { | |
5715 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5716 | if (e->X_op == O_pseudo_fixup) | |
5717 | e->X_op = O_symbol; | |
5718 | } | |
5719 | ||
91d6fa6a | 5720 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5721 | fix->expr = *e; |
5722 | fix->is_pcrel = 0; | |
5723 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5724 | return OPERAND_MATCH; |
800eeca4 JW |
5725 | } |
5726 | else if (e->X_op == O_constant) | |
87f8eb97 | 5727 | return OPERAND_MATCH; |
800eeca4 JW |
5728 | break; |
5729 | ||
59cf82fe L |
5730 | case IA64_OPND_IMMU5b: |
5731 | if (e->X_op == O_constant) | |
5732 | { | |
5733 | val = e->X_add_number; | |
5734 | if (val >= 32 && val <= 63) | |
5735 | return OPERAND_MATCH; | |
5736 | else | |
5737 | return OPERAND_OUT_OF_RANGE; | |
5738 | } | |
5739 | break; | |
5740 | ||
800eeca4 JW |
5741 | case IA64_OPND_CCNT5: |
5742 | case IA64_OPND_CNT5: | |
5743 | case IA64_OPND_CNT6: | |
5744 | case IA64_OPND_CPOS6a: | |
5745 | case IA64_OPND_CPOS6b: | |
5746 | case IA64_OPND_CPOS6c: | |
5747 | case IA64_OPND_IMMU2: | |
5748 | case IA64_OPND_IMMU7a: | |
5749 | case IA64_OPND_IMMU7b: | |
b3e14eda L |
5750 | case IA64_OPND_IMMU16: |
5751 | case IA64_OPND_IMMU19: | |
800eeca4 JW |
5752 | case IA64_OPND_IMMU21: |
5753 | case IA64_OPND_IMMU24: | |
5754 | case IA64_OPND_MBTYPE4: | |
5755 | case IA64_OPND_MHTYPE8: | |
5756 | case IA64_OPND_POS6: | |
91d6fa6a | 5757 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 JW |
5758 | if (e->X_op == O_constant) |
5759 | { | |
5760 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5761 | return OPERAND_MATCH; | |
5762 | else | |
5763 | return OPERAND_OUT_OF_RANGE; | |
5764 | } | |
800eeca4 JW |
5765 | break; |
5766 | ||
bf3ca999 | 5767 | case IA64_OPND_IMMU9: |
91d6fa6a | 5768 | bits = operand_width (idesc->operands[res_index]); |
87f8eb97 | 5769 | if (e->X_op == O_constant) |
542d6675 | 5770 | { |
87f8eb97 JW |
5771 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5772 | { | |
5773 | int lobits = e->X_add_number & 0x3; | |
5774 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5775 | e->X_add_number |= (bfd_vma) 0x3; | |
5776 | return OPERAND_MATCH; | |
5777 | } | |
5778 | else | |
5779 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5780 | } |
bf3ca999 TW |
5781 | break; |
5782 | ||
800eeca4 JW |
5783 | case IA64_OPND_IMM44: |
5784 | /* least 16 bits must be zero */ | |
5785 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5786 | /* XXX technically, this is wrong: we should not be issuing warning |
5787 | messages until we're sure this instruction pattern is going to | |
5788 | be used! */ | |
542d6675 | 5789 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5790 | |
87f8eb97 | 5791 | if (e->X_op == O_constant) |
542d6675 | 5792 | { |
87f8eb97 JW |
5793 | if (((e->X_add_number >= 0 |
5794 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5795 | || (e->X_add_number < 0 | |
5796 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5797 | { |
87f8eb97 JW |
5798 | /* sign-extend */ |
5799 | if (e->X_add_number >= 0 | |
5800 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5801 | { | |
5802 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5803 | } | |
5804 | return OPERAND_MATCH; | |
542d6675 | 5805 | } |
87f8eb97 JW |
5806 | else |
5807 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5808 | } |
800eeca4 JW |
5809 | break; |
5810 | ||
5811 | case IA64_OPND_IMM17: | |
5812 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5813 | if (e->X_op == O_constant) |
542d6675 | 5814 | { |
87f8eb97 JW |
5815 | if (((e->X_add_number >= 0 |
5816 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5817 | || (e->X_add_number < 0 | |
5818 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5819 | { |
87f8eb97 JW |
5820 | /* sign-extend */ |
5821 | if (e->X_add_number >= 0 | |
5822 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5823 | { | |
5824 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5825 | } | |
5826 | return OPERAND_MATCH; | |
542d6675 | 5827 | } |
87f8eb97 JW |
5828 | else |
5829 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5830 | } |
800eeca4 JW |
5831 | break; |
5832 | ||
5833 | case IA64_OPND_IMM14: | |
5834 | case IA64_OPND_IMM22: | |
5835 | relocatable = 1; | |
5836 | case IA64_OPND_IMM1: | |
5837 | case IA64_OPND_IMM8: | |
5838 | case IA64_OPND_IMM8U4: | |
5839 | case IA64_OPND_IMM8M1: | |
5840 | case IA64_OPND_IMM8M1U4: | |
5841 | case IA64_OPND_IMM8M1U8: | |
5842 | case IA64_OPND_IMM9a: | |
5843 | case IA64_OPND_IMM9b: | |
91d6fa6a | 5844 | bits = operand_width (idesc->operands[res_index]); |
800eeca4 JW |
5845 | if (relocatable && (e->X_op == O_symbol |
5846 | || e->X_op == O_subtract | |
5847 | || e->X_op == O_pseudo_fixup)) | |
5848 | { | |
5849 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5850 | ||
91d6fa6a | 5851 | if (idesc->operands[res_index] == IA64_OPND_IMM14) |
800eeca4 JW |
5852 | fix->code = BFD_RELOC_IA64_IMM14; |
5853 | else | |
5854 | fix->code = BFD_RELOC_IA64_IMM22; | |
5855 | ||
5856 | if (e->X_op != O_subtract) | |
5857 | { | |
5858 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5859 | if (e->X_op == O_pseudo_fixup) | |
5860 | e->X_op = O_symbol; | |
5861 | } | |
5862 | ||
91d6fa6a | 5863 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5864 | fix->expr = *e; |
5865 | fix->is_pcrel = 0; | |
5866 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5867 | return OPERAND_MATCH; |
800eeca4 JW |
5868 | } |
5869 | else if (e->X_op != O_constant | |
5870 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5871 | return OPERAND_MISMATCH; |
800eeca4 JW |
5872 | |
5873 | if (opnd == IA64_OPND_IMM8M1U4) | |
5874 | { | |
5875 | /* Zero is not valid for unsigned compares that take an adjusted | |
5876 | constant immediate range. */ | |
5877 | if (e->X_add_number == 0) | |
87f8eb97 | 5878 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5879 | |
5880 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5881 | checks will work. */ | |
5882 | val = e->X_add_number; | |
197865e8 KH |
5883 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5884 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5885 | val = ((val << 32) >> 32); |
5886 | ||
5887 | /* Check for 0x100000000. This is valid because | |
5888 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5889 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5890 | return OPERAND_MATCH; |
800eeca4 JW |
5891 | |
5892 | val = val - 1; | |
5893 | } | |
5894 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5895 | { | |
5896 | /* Zero is not valid for unsigned compares that take an adjusted | |
5897 | constant immediate range. */ | |
5898 | if (e->X_add_number == 0) | |
87f8eb97 | 5899 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5900 | |
5901 | /* Check for 0x10000000000000000. */ | |
5902 | if (e->X_op == O_big) | |
5903 | { | |
5904 | if (generic_bignum[0] == 0 | |
5905 | && generic_bignum[1] == 0 | |
5906 | && generic_bignum[2] == 0 | |
5907 | && generic_bignum[3] == 0 | |
5908 | && generic_bignum[4] == 1) | |
87f8eb97 | 5909 | return OPERAND_MATCH; |
800eeca4 | 5910 | else |
87f8eb97 | 5911 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5912 | } |
5913 | else | |
5914 | val = e->X_add_number - 1; | |
5915 | } | |
5916 | else if (opnd == IA64_OPND_IMM8M1) | |
5917 | val = e->X_add_number - 1; | |
5918 | else if (opnd == IA64_OPND_IMM8U4) | |
5919 | { | |
5920 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5921 | checks will work. */ | |
5922 | val = e->X_add_number; | |
197865e8 KH |
5923 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5924 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5925 | val = ((val << 32) >> 32); |
5926 | } | |
5927 | else | |
5928 | val = e->X_add_number; | |
5929 | ||
2434f565 JW |
5930 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5931 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5932 | return OPERAND_MATCH; |
5933 | else | |
5934 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5935 | |
5936 | case IA64_OPND_INC3: | |
5937 | /* +/- 1, 4, 8, 16 */ | |
5938 | val = e->X_add_number; | |
5939 | if (val < 0) | |
5940 | val = -val; | |
87f8eb97 JW |
5941 | if (e->X_op == O_constant) |
5942 | { | |
5943 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5944 | return OPERAND_MATCH; | |
5945 | else | |
5946 | return OPERAND_OUT_OF_RANGE; | |
5947 | } | |
800eeca4 JW |
5948 | break; |
5949 | ||
5950 | case IA64_OPND_TGT25: | |
5951 | case IA64_OPND_TGT25b: | |
5952 | case IA64_OPND_TGT25c: | |
5953 | case IA64_OPND_TGT64: | |
5954 | if (e->X_op == O_symbol) | |
5955 | { | |
5956 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5957 | if (opnd == IA64_OPND_TGT25) | |
5958 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5959 | else if (opnd == IA64_OPND_TGT25b) | |
5960 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5961 | else if (opnd == IA64_OPND_TGT25c) | |
5962 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5963 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5964 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5965 | else | |
5966 | abort (); | |
5967 | ||
800eeca4 | 5968 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
91d6fa6a | 5969 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5970 | fix->expr = *e; |
5971 | fix->is_pcrel = 1; | |
5972 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5973 | return OPERAND_MATCH; |
800eeca4 JW |
5974 | } |
5975 | case IA64_OPND_TAG13: | |
5976 | case IA64_OPND_TAG13b: | |
5977 | switch (e->X_op) | |
5978 | { | |
5979 | case O_constant: | |
87f8eb97 | 5980 | return OPERAND_MATCH; |
800eeca4 JW |
5981 | |
5982 | case O_symbol: | |
5983 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 5984 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 5985 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
5986 | fix->code = BFD_RELOC_UNUSED; |
5987 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
91d6fa6a | 5988 | fix->opnd = idesc->operands[res_index]; |
800eeca4 JW |
5989 | fix->expr = *e; |
5990 | fix->is_pcrel = 1; | |
5991 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5992 | return OPERAND_MATCH; |
800eeca4 JW |
5993 | |
5994 | default: | |
5995 | break; | |
5996 | } | |
5997 | break; | |
5998 | ||
a823923b RH |
5999 | case IA64_OPND_LDXMOV: |
6000 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6001 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
91d6fa6a | 6002 | fix->opnd = idesc->operands[res_index]; |
a823923b RH |
6003 | fix->expr = *e; |
6004 | fix->is_pcrel = 0; | |
6005 | ++CURR_SLOT.num_fixups; | |
6006 | return OPERAND_MATCH; | |
6007 | ||
b3e14eda L |
6008 | case IA64_OPND_STRD5b: |
6009 | if (e->X_op == O_constant) | |
6010 | { | |
6011 | /* 5-bit signed scaled by 64 */ | |
6012 | if ((e->X_add_number <= ( 0xf << 6 )) | |
6013 | && (e->X_add_number >= -( 0x10 << 6 ))) | |
6014 | { | |
6015 | ||
6016 | /* Must be a multiple of 64 */ | |
6017 | if ((e->X_add_number & 0x3f) != 0) | |
6018 | as_warn (_("stride must be a multiple of 64; lower 6 bits ignored")); | |
6019 | ||
6020 | e->X_add_number &= ~ 0x3f; | |
6021 | return OPERAND_MATCH; | |
6022 | } | |
6023 | else | |
6024 | return OPERAND_OUT_OF_RANGE; | |
6025 | } | |
6026 | break; | |
6027 | case IA64_OPND_CNT6a: | |
6028 | if (e->X_op == O_constant) | |
6029 | { | |
6030 | /* 6-bit unsigned biased by 1 -- count 0 is meaningless */ | |
6031 | if ((e->X_add_number <= 64) | |
6032 | && (e->X_add_number > 0) ) | |
6033 | { | |
6034 | return OPERAND_MATCH; | |
6035 | } | |
6036 | else | |
6037 | return OPERAND_OUT_OF_RANGE; | |
6038 | } | |
6039 | break; | |
6040 | ||
800eeca4 JW |
6041 | default: |
6042 | break; | |
6043 | } | |
87f8eb97 | 6044 | return OPERAND_MISMATCH; |
800eeca4 JW |
6045 | } |
6046 | ||
6047 | static int | |
5a49b8ac | 6048 | parse_operand (expressionS *e, int more) |
800eeca4 JW |
6049 | { |
6050 | int sep = '\0'; | |
6051 | ||
6052 | memset (e, 0, sizeof (*e)); | |
6053 | e->X_op = O_absent; | |
6054 | SKIP_WHITESPACE (); | |
cd42ff9c | 6055 | expression (e); |
e4e8248d JB |
6056 | sep = *input_line_pointer; |
6057 | if (more && (sep == ',' || sep == more)) | |
6058 | ++input_line_pointer; | |
800eeca4 JW |
6059 | return sep; |
6060 | } | |
6061 | ||
cd42ff9c AM |
6062 | static int |
6063 | parse_operand_and_eval (expressionS *e, int more) | |
6064 | { | |
6065 | int sep = parse_operand (e, more); | |
6066 | resolve_expression (e); | |
6067 | return sep; | |
6068 | } | |
6069 | ||
6070 | static int | |
6071 | parse_operand_maybe_eval (expressionS *e, int more, enum ia64_opnd op) | |
6072 | { | |
6073 | int sep = parse_operand (e, more); | |
6074 | switch (op) | |
6075 | { | |
6076 | case IA64_OPND_IMM14: | |
6077 | case IA64_OPND_IMM22: | |
6078 | case IA64_OPND_IMMU64: | |
6079 | case IA64_OPND_TGT25: | |
6080 | case IA64_OPND_TGT25b: | |
6081 | case IA64_OPND_TGT25c: | |
6082 | case IA64_OPND_TGT64: | |
6083 | case IA64_OPND_TAG13: | |
6084 | case IA64_OPND_TAG13b: | |
6085 | case IA64_OPND_LDXMOV: | |
6086 | break; | |
6087 | default: | |
6088 | resolve_expression (e); | |
6089 | break; | |
6090 | } | |
6091 | return sep; | |
6092 | } | |
6093 | ||
800eeca4 JW |
6094 | /* Returns the next entry in the opcode table that matches the one in |
6095 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6096 | found, NULL is returned instead. */ |
800eeca4 JW |
6097 | |
6098 | static struct ia64_opcode * | |
6099 | get_next_opcode (struct ia64_opcode *idesc) | |
6100 | { | |
6101 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6102 | ia64_free_opcode (idesc); | |
6103 | return next; | |
6104 | } | |
6105 | ||
6106 | /* Parse the operands for the opcode and find the opcode variant that | |
6107 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6108 | |
6109 | static struct ia64_opcode * | |
5a49b8ac | 6110 | parse_operands (struct ia64_opcode *idesc) |
800eeca4 JW |
6111 | { |
6112 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6113 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6114 | int reg1, reg2; |
6115 | char reg_class; | |
800eeca4 | 6116 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6117 | enum operand_match_result result; |
800eeca4 JW |
6118 | char mnemonic[129]; |
6119 | char *first_arg = 0, *end, *saved_input_pointer; | |
6120 | unsigned int sof; | |
6121 | ||
9c2799c2 | 6122 | gas_assert (strlen (idesc->name) <= 128); |
800eeca4 JW |
6123 | |
6124 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6125 | if (idesc->operands[2] == IA64_OPND_SOF |
6126 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6127 | { |
6128 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6129 | can't parse the first operand until we have parsed the | |
6130 | remaining operands of the "alloc" instruction. */ | |
6131 | SKIP_WHITESPACE (); | |
6132 | first_arg = input_line_pointer; | |
6133 | end = strchr (input_line_pointer, '='); | |
6134 | if (!end) | |
6135 | { | |
ad4b42b4 | 6136 | as_bad (_("Expected separator `='")); |
800eeca4 JW |
6137 | return 0; |
6138 | } | |
6139 | input_line_pointer = end + 1; | |
6140 | ++i; | |
6141 | ++num_outputs; | |
6142 | } | |
6143 | ||
d3156ecc | 6144 | for (; ; ++i) |
800eeca4 | 6145 | { |
d3156ecc JB |
6146 | if (i < NELEMS (CURR_SLOT.opnd)) |
6147 | { | |
cd42ff9c AM |
6148 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + i, '=', |
6149 | idesc->operands[i]); | |
d3156ecc JB |
6150 | if (CURR_SLOT.opnd[i].X_op == O_absent) |
6151 | break; | |
6152 | } | |
6153 | else | |
6154 | { | |
6155 | expressionS dummy; | |
6156 | ||
e4e8248d | 6157 | sep = parse_operand (&dummy, '='); |
d3156ecc JB |
6158 | if (dummy.X_op == O_absent) |
6159 | break; | |
6160 | } | |
800eeca4 JW |
6161 | |
6162 | ++num_operands; | |
6163 | ||
6164 | if (sep != '=' && sep != ',') | |
6165 | break; | |
6166 | ||
6167 | if (sep == '=') | |
6168 | { | |
6169 | if (num_outputs > 0) | |
ad4b42b4 | 6170 | as_bad (_("Duplicate equal sign (=) in instruction")); |
800eeca4 JW |
6171 | else |
6172 | num_outputs = i + 1; | |
6173 | } | |
6174 | } | |
6175 | if (sep != '\0') | |
6176 | { | |
ad4b42b4 | 6177 | as_bad (_("Illegal operand separator `%c'"), sep); |
800eeca4 JW |
6178 | return 0; |
6179 | } | |
197865e8 | 6180 | |
60b9a617 JB |
6181 | if (idesc->operands[2] == IA64_OPND_SOF |
6182 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 | 6183 | { |
ef0241e7 JB |
6184 | /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r. |
6185 | Note, however, that due to that mapping operand numbers in error | |
6186 | messages for any of the constant operands will not be correct. */ | |
800eeca4 | 6187 | know (strcmp (idesc->name, "alloc") == 0); |
ef0241e7 JB |
6188 | /* The first operand hasn't been parsed/initialized, yet (but |
6189 | num_operands intentionally doesn't account for that). */ | |
6190 | i = num_operands > 4 ? 2 : 1; | |
6191 | #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \ | |
6192 | ? CURR_SLOT.opnd[n].X_add_number \ | |
6193 | : 0) | |
6194 | sof = set_regstack (FORCE_CONST(i), | |
6195 | FORCE_CONST(i + 1), | |
6196 | FORCE_CONST(i + 2), | |
6197 | FORCE_CONST(i + 3)); | |
6198 | #undef FORCE_CONST | |
6199 | ||
6200 | /* now we can parse the first arg: */ | |
6201 | saved_input_pointer = input_line_pointer; | |
6202 | input_line_pointer = first_arg; | |
cd42ff9c AM |
6203 | sep = parse_operand_maybe_eval (CURR_SLOT.opnd + 0, '=', |
6204 | idesc->operands[0]); | |
ef0241e7 JB |
6205 | if (sep != '=') |
6206 | --num_outputs; /* force error */ | |
6207 | input_line_pointer = saved_input_pointer; | |
6208 | ||
6209 | CURR_SLOT.opnd[i].X_add_number = sof; | |
6210 | if (CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6211 | && CURR_SLOT.opnd[i + 2].X_op == O_constant) | |
6212 | CURR_SLOT.opnd[i + 1].X_add_number | |
6213 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6214 | else | |
6215 | CURR_SLOT.opnd[i + 1].X_op = O_illegal; | |
6216 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6217 | } |
6218 | ||
d3156ecc | 6219 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6220 | curr_out_of_range_pos = -1; |
6221 | error_pos = 0; | |
800eeca4 JW |
6222 | for (; idesc; idesc = get_next_opcode (idesc)) |
6223 | { | |
6224 | if (num_outputs != idesc->num_outputs) | |
6225 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6226 | if (highest_unmatched_operand < 0) |
6227 | highest_unmatched_operand |= 1; | |
6228 | if (num_operands > NELEMS (idesc->operands) | |
6229 | || (num_operands < NELEMS (idesc->operands) | |
6230 | && idesc->operands[num_operands]) | |
6231 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6232 | continue; /* mismatch in number of arguments */ | |
6233 | if (highest_unmatched_operand < 0) | |
6234 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6235 | |
6236 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6237 | |
6238 | /* Try to match all operands. If we see an out-of-range operand, | |
6239 | then continue trying to match the rest of the operands, since if | |
6240 | the rest match, then this idesc will give the best error message. */ | |
6241 | ||
6242 | out_of_range_pos = -1; | |
800eeca4 | 6243 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6244 | { |
6245 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6246 | if (result != OPERAND_MATCH) | |
6247 | { | |
6248 | if (result != OPERAND_OUT_OF_RANGE) | |
6249 | break; | |
6250 | if (out_of_range_pos < 0) | |
6251 | /* remember position of the first out-of-range operand: */ | |
6252 | out_of_range_pos = i; | |
6253 | } | |
6254 | } | |
800eeca4 | 6255 | |
87f8eb97 JW |
6256 | /* If we did not match all operands, or if at least one operand was |
6257 | out-of-range, then this idesc does not match. Keep track of which | |
6258 | idesc matched the most operands before failing. If we have two | |
6259 | idescs that failed at the same position, and one had an out-of-range | |
6260 | operand, then prefer the out-of-range operand. Thus if we have | |
6261 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6262 | of range instead of an error saying that the constant should have been | |
6263 | a register. */ | |
6264 | ||
6265 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6266 | { |
87f8eb97 JW |
6267 | if (i > highest_unmatched_operand |
6268 | || (i == highest_unmatched_operand | |
6269 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6270 | { |
6271 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6272 | if (out_of_range_pos >= 0) |
6273 | { | |
6274 | expected_operand = idesc->operands[out_of_range_pos]; | |
6275 | error_pos = out_of_range_pos; | |
6276 | } | |
6277 | else | |
6278 | { | |
6279 | expected_operand = idesc->operands[i]; | |
6280 | error_pos = i; | |
6281 | } | |
6282 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6283 | } |
6284 | continue; | |
6285 | } | |
6286 | ||
800eeca4 JW |
6287 | break; |
6288 | } | |
6289 | if (!idesc) | |
6290 | { | |
6291 | if (expected_operand) | |
ad4b42b4 | 6292 | as_bad (_("Operand %u of `%s' should be %s"), |
87f8eb97 | 6293 | error_pos + 1, mnemonic, |
800eeca4 | 6294 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc | 6295 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
ad4b42b4 | 6296 | as_bad (_("Wrong number of output operands")); |
d3156ecc | 6297 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) |
ad4b42b4 | 6298 | as_bad (_("Wrong number of input operands")); |
800eeca4 | 6299 | else |
ad4b42b4 | 6300 | as_bad (_("Operand mismatch")); |
800eeca4 JW |
6301 | return 0; |
6302 | } | |
4b09e828 JB |
6303 | |
6304 | /* Check that the instruction doesn't use | |
6305 | - r0, f0, or f1 as output operands | |
6306 | - the same predicate twice as output operands | |
6307 | - r0 as address of a base update load or store | |
6308 | - the same GR as output and address of a base update load | |
6309 | - two even- or two odd-numbered FRs as output operands of a floating | |
6310 | point parallel load. | |
6311 | At most two (conflicting) output (or output-like) operands can exist, | |
6312 | (floating point parallel loads have three outputs, but the base register, | |
6313 | if updated, cannot conflict with the actual outputs). */ | |
6314 | reg2 = reg1 = -1; | |
6315 | for (i = 0; i < num_operands; ++i) | |
6316 | { | |
6317 | int regno = 0; | |
6318 | ||
6319 | reg_class = 0; | |
6320 | switch (idesc->operands[i]) | |
6321 | { | |
6322 | case IA64_OPND_R1: | |
6323 | case IA64_OPND_R2: | |
6324 | case IA64_OPND_R3: | |
6325 | if (i < num_outputs) | |
6326 | { | |
6327 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6328 | reg_class = 'r'; | |
6329 | else if (reg1 < 0) | |
6330 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6331 | else if (reg2 < 0) | |
6332 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6333 | } | |
6334 | break; | |
6335 | case IA64_OPND_P1: | |
6336 | case IA64_OPND_P2: | |
6337 | if (i < num_outputs) | |
6338 | { | |
6339 | if (reg1 < 0) | |
6340 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6341 | else if (reg2 < 0) | |
6342 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6343 | } | |
6344 | break; | |
6345 | case IA64_OPND_F1: | |
6346 | case IA64_OPND_F2: | |
6347 | case IA64_OPND_F3: | |
6348 | case IA64_OPND_F4: | |
6349 | if (i < num_outputs) | |
6350 | { | |
6351 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6352 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6353 | { | |
6354 | reg_class = 'f'; | |
6355 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6356 | } | |
6357 | else if (reg1 < 0) | |
6358 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6359 | else if (reg2 < 0) | |
6360 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6361 | } | |
6362 | break; | |
6363 | case IA64_OPND_MR3: | |
6364 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6365 | { | |
6366 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6367 | reg_class = 'm'; | |
6368 | else if (reg1 < 0) | |
6369 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6370 | else if (reg2 < 0) | |
6371 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6372 | } | |
6373 | break; | |
6374 | default: | |
6375 | break; | |
6376 | } | |
6377 | switch (reg_class) | |
6378 | { | |
6379 | case 0: | |
6380 | break; | |
6381 | default: | |
ad4b42b4 | 6382 | as_warn (_("Invalid use of `%c%d' as output operand"), reg_class, regno); |
4b09e828 JB |
6383 | break; |
6384 | case 'm': | |
ad4b42b4 | 6385 | as_warn (_("Invalid use of `r%d' as base update address operand"), regno); |
4b09e828 JB |
6386 | break; |
6387 | } | |
6388 | } | |
6389 | if (reg1 == reg2) | |
6390 | { | |
6391 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6392 | { | |
6393 | reg1 -= REG_GR; | |
6394 | reg_class = 'r'; | |
6395 | } | |
6396 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6397 | { | |
6398 | reg1 -= REG_P; | |
6399 | reg_class = 'p'; | |
6400 | } | |
6401 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6402 | { | |
6403 | reg1 -= REG_FR; | |
6404 | reg_class = 'f'; | |
6405 | } | |
6406 | else | |
6407 | reg_class = 0; | |
6408 | if (reg_class) | |
ad4b42b4 | 6409 | as_warn (_("Invalid duplicate use of `%c%d'"), reg_class, reg1); |
4b09e828 JB |
6410 | } |
6411 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6412 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6413 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6414 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6415 | && ! ((reg1 ^ reg2) & 1)) | |
ad4b42b4 | 6416 | as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"), |
4b09e828 JB |
6417 | reg1 - REG_FR, reg2 - REG_FR); |
6418 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6419 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6420 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6421 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
ad4b42b4 | 6422 | as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"), |
4b09e828 | 6423 | reg1 - REG_FR, reg2 - REG_FR); |
800eeca4 JW |
6424 | return idesc; |
6425 | } | |
6426 | ||
6427 | static void | |
5a49b8ac | 6428 | build_insn (struct slot *slot, bfd_vma *insnp) |
800eeca4 JW |
6429 | { |
6430 | const struct ia64_operand *odesc, *o2desc; | |
6431 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6432 | bfd_vma insn; |
6433 | bfd_signed_vma val; | |
800eeca4 JW |
6434 | const char *err; |
6435 | int i; | |
6436 | ||
6437 | insn = idesc->opcode | slot->qp_regno; | |
6438 | ||
6439 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6440 | { | |
c67e42c9 RH |
6441 | if (slot->opnd[i].X_op == O_register |
6442 | || slot->opnd[i].X_op == O_constant | |
6443 | || slot->opnd[i].X_op == O_index) | |
6444 | val = slot->opnd[i].X_add_number; | |
6445 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6446 | { |
c67e42c9 | 6447 | /* This must be the value 0x10000000000000000. */ |
9c2799c2 | 6448 | gas_assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); |
c67e42c9 RH |
6449 | val = 0; |
6450 | } | |
6451 | else | |
6452 | val = 0; | |
6453 | ||
6454 | switch (idesc->operands[i]) | |
6455 | { | |
6456 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6457 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6458 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6459 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6460 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6461 | continue; |
6462 | ||
6463 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6464 | val &= 0x3fffffffffffffffULL; |
6465 | if (val != slot->opnd[i].X_add_number) | |
6466 | as_warn (_("Value truncated to 62 bits")); | |
6467 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6468 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6469 | continue; |
800eeca4 | 6470 | |
c67e42c9 RH |
6471 | case IA64_OPND_TGT64: |
6472 | val >>= 4; | |
6473 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6474 | insn |= ((((val >> 59) & 0x1) << 36) | |
6475 | | (((val >> 0) & 0xfffff) << 13)); | |
6476 | continue; | |
800eeca4 | 6477 | |
c67e42c9 RH |
6478 | case IA64_OPND_AR3: |
6479 | val -= REG_AR; | |
6480 | break; | |
6481 | ||
6482 | case IA64_OPND_B1: | |
6483 | case IA64_OPND_B2: | |
6484 | val -= REG_BR; | |
6485 | break; | |
6486 | ||
6487 | case IA64_OPND_CR3: | |
6488 | val -= REG_CR; | |
6489 | break; | |
6490 | ||
b3e14eda L |
6491 | case IA64_OPND_DAHR3: |
6492 | val -= REG_DAHR; | |
6493 | break; | |
6494 | ||
c67e42c9 RH |
6495 | case IA64_OPND_F1: |
6496 | case IA64_OPND_F2: | |
6497 | case IA64_OPND_F3: | |
6498 | case IA64_OPND_F4: | |
6499 | val -= REG_FR; | |
6500 | break; | |
6501 | ||
6502 | case IA64_OPND_P1: | |
6503 | case IA64_OPND_P2: | |
6504 | val -= REG_P; | |
6505 | break; | |
6506 | ||
6507 | case IA64_OPND_R1: | |
6508 | case IA64_OPND_R2: | |
6509 | case IA64_OPND_R3: | |
6510 | case IA64_OPND_R3_2: | |
6511 | case IA64_OPND_CPUID_R3: | |
6512 | case IA64_OPND_DBR_R3: | |
6513 | case IA64_OPND_DTR_R3: | |
6514 | case IA64_OPND_ITR_R3: | |
6515 | case IA64_OPND_IBR_R3: | |
6516 | case IA64_OPND_MR3: | |
6517 | case IA64_OPND_MSR_R3: | |
6518 | case IA64_OPND_PKR_R3: | |
6519 | case IA64_OPND_PMC_R3: | |
6520 | case IA64_OPND_PMD_R3: | |
b3e14eda | 6521 | case IA64_OPND_DAHR_R3: |
197865e8 | 6522 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6523 | val -= REG_GR; |
6524 | break; | |
6525 | ||
6526 | default: | |
6527 | break; | |
6528 | } | |
6529 | ||
6530 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6531 | err = (*odesc->insert) (odesc, val, &insn); | |
6532 | if (err) | |
6533 | as_bad_where (slot->src_file, slot->src_line, | |
ad4b42b4 | 6534 | _("Bad operand value: %s"), err); |
c67e42c9 RH |
6535 | if (idesc->flags & IA64_OPCODE_PSEUDO) |
6536 | { | |
6537 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6538 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6539 | { | |
6540 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6541 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6542 | } |
c67e42c9 RH |
6543 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6544 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6545 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6546 | { |
c67e42c9 RH |
6547 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6548 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6549 | } |
6550 | } | |
6551 | } | |
6552 | *insnp = insn; | |
6553 | } | |
6554 | ||
6555 | static void | |
5a49b8ac | 6556 | emit_one_bundle (void) |
800eeca4 | 6557 | { |
f4660e2c | 6558 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6559 | enum ia64_unit required_unit, insn_unit = 0; |
6560 | enum ia64_insn_type type[3], insn_type; | |
d3ce72d0 | 6561 | unsigned int template_val, orig_template; |
542d6675 | 6562 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6563 | struct ia64_opcode *idesc; |
6564 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6565 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6566 | bfd_vma t0 = 0, t1 = 0; |
6567 | struct label_fix *lfix; | |
07a53e5c | 6568 | bfd_boolean mark_label; |
800eeca4 JW |
6569 | struct insn_fix *ifix; |
6570 | char mnemonic[16]; | |
6571 | fixS *fix; | |
6572 | char *f; | |
5a9ff93d | 6573 | int addr_mod; |
800eeca4 JW |
6574 | |
6575 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
c13781b8 | 6576 | know (first >= 0 && first < NUM_SLOTS); |
800eeca4 JW |
6577 | n = MIN (3, md.num_slots_in_use); |
6578 | ||
6579 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6580 | otherwise: */ |
800eeca4 JW |
6581 | |
6582 | if (md.slot[first].user_template >= 0) | |
d3ce72d0 | 6583 | user_template = template_val = md.slot[first].user_template; |
800eeca4 JW |
6584 | else |
6585 | { | |
032efc85 | 6586 | /* Auto select appropriate template. */ |
800eeca4 JW |
6587 | memset (type, 0, sizeof (type)); |
6588 | curr = first; | |
6589 | for (i = 0; i < n; ++i) | |
6590 | { | |
032efc85 RH |
6591 | if (md.slot[curr].label_fixups && i != 0) |
6592 | break; | |
800eeca4 JW |
6593 | type[i] = md.slot[curr].idesc->type; |
6594 | curr = (curr + 1) % NUM_SLOTS; | |
6595 | } | |
d3ce72d0 | 6596 | template_val = best_template[type[0]][type[1]][type[2]]; |
800eeca4 JW |
6597 | } |
6598 | ||
542d6675 | 6599 | /* initialize instructions with appropriate nops: */ |
800eeca4 | 6600 | for (i = 0; i < 3; ++i) |
d3ce72d0 | 6601 | insn[i] = nop[ia64_templ_desc[template_val].exec_unit[i]]; |
800eeca4 JW |
6602 | |
6603 | f = frag_more (16); | |
6604 | ||
5a9ff93d JW |
6605 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6606 | from the start of the frag. */ | |
6607 | addr_mod = frag_now_fix () & 15; | |
6608 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6609 | as_bad (_("instruction address is not a multiple of 16")); | |
6610 | frag_now->insn_addr = addr_mod; | |
6611 | frag_now->has_code = 1; | |
6612 | ||
542d6675 | 6613 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6614 | curr = first; |
6615 | idesc = md.slot[curr].idesc; | |
6616 | end_of_insn_group = 0; | |
9b505842 | 6617 | last_slot = -1; |
800eeca4 JW |
6618 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6619 | { | |
d6e78c11 | 6620 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6621 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6622 | unw_rec_list *end_ptr = NULL; | |
6623 | ||
d6e78c11 JW |
6624 | if (ptr) |
6625 | { | |
6626 | /* Find the last prologue/body record in the list for the current | |
6627 | insn, and set the slot number for all records up to that point. | |
6628 | This needs to be done now, because prologue/body records refer to | |
6629 | the current point, not the point after the instruction has been | |
6630 | issued. This matters because there may have been nops emitted | |
6631 | meanwhile. Any non-prologue non-body record followed by a | |
6632 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6633 | unw_rec_list *last_ptr; |
6634 | ||
6635 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6636 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6637 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6638 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6639 | || ptr->r.type == body) | |
6640 | last_ptr = ptr; | |
6641 | if (last_ptr) | |
6642 | { | |
6643 | /* Make last_ptr point one after the last prologue/body | |
6644 | record. */ | |
6645 | last_ptr = last_ptr->next; | |
6646 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6647 | ptr = ptr->next) | |
6648 | { | |
6649 | ptr->slot_number = (unsigned long) f + i; | |
6650 | ptr->slot_frag = frag_now; | |
6651 | } | |
6652 | /* Remove the initialized records, so that we won't accidentally | |
6653 | update them again if we insert a nop and continue. */ | |
6654 | md.slot[curr].unwind_record = last_ptr; | |
6655 | } | |
6656 | } | |
e0c9811a | 6657 | |
f4660e2c JB |
6658 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6659 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6660 | { |
f4660e2c JB |
6661 | if (curr == first) |
6662 | manual_bundling = 1; | |
800eeca4 | 6663 | else |
f4660e2c JB |
6664 | break; /* Need to start a new bundle. */ |
6665 | } | |
6666 | ||
744b6414 JW |
6667 | /* If this instruction specifies a template, then it must be the first |
6668 | instruction of a bundle. */ | |
6669 | if (curr != first && md.slot[curr].user_template >= 0) | |
6670 | break; | |
6671 | ||
f4660e2c JB |
6672 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6673 | { | |
6674 | if (manual_bundling && !manual_bundling_off) | |
6675 | { | |
6676 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6677 | _("`%s' must be last in bundle"), idesc->name); |
f4660e2c JB |
6678 | if (i < 2) |
6679 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6680 | } | |
6681 | i = 2; | |
800eeca4 JW |
6682 | } |
6683 | if (idesc->flags & IA64_OPCODE_LAST) | |
6684 | { | |
2434f565 JW |
6685 | int required_slot; |
6686 | unsigned int required_template; | |
800eeca4 JW |
6687 | |
6688 | /* If we need a stop bit after an M slot, our only choice is | |
6689 | template 5 (M;;MI). If we need a stop bit after a B | |
6690 | slot, our only choice is to place it at the end of the | |
6691 | bundle, because the only available templates are MIB, | |
6692 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6693 | than M and B slots because these are the only kind of | |
6694 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
d3ce72d0 | 6695 | required_template = template_val; |
800eeca4 JW |
6696 | switch (idesc->type) |
6697 | { | |
6698 | case IA64_TYPE_M: | |
6699 | required_slot = 0; | |
6700 | required_template = 5; | |
6701 | break; | |
6702 | ||
6703 | case IA64_TYPE_B: | |
6704 | required_slot = 2; | |
6705 | break; | |
6706 | ||
6707 | default: | |
6708 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 NC |
6709 | _("Internal error: don't know how to force %s to end of instruction group"), |
6710 | idesc->name); | |
800eeca4 JW |
6711 | required_slot = i; |
6712 | break; | |
6713 | } | |
f4660e2c JB |
6714 | if (manual_bundling |
6715 | && (i > required_slot | |
6716 | || (required_slot == 2 && !manual_bundling_off) | |
6717 | || (user_template >= 0 | |
6718 | /* Changing from MMI to M;MI is OK. */ | |
d3ce72d0 | 6719 | && (template_val ^ required_template) > 1))) |
f4660e2c JB |
6720 | { |
6721 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6722 | _("`%s' must be last in instruction group"), |
f4660e2c JB |
6723 | idesc->name); |
6724 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6725 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6726 | } | |
800eeca4 JW |
6727 | if (required_slot < i) |
6728 | /* Can't fit this instruction. */ | |
6729 | break; | |
6730 | ||
6731 | i = required_slot; | |
d3ce72d0 | 6732 | if (required_template != template_val) |
800eeca4 JW |
6733 | { |
6734 | /* If we switch the template, we need to reset the NOPs | |
6735 | after slot i. The slot-types of the instructions ahead | |
6736 | of i never change, so we don't need to worry about | |
6737 | changing NOPs in front of this slot. */ | |
6738 | for (j = i; j < 3; ++j) | |
6739 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
53022e4a JW |
6740 | |
6741 | /* We just picked a template that includes the stop bit in the | |
6742 | middle, so we don't need another one emitted later. */ | |
6743 | md.slot[curr].end_of_insn_group = 0; | |
800eeca4 | 6744 | } |
d3ce72d0 | 6745 | template_val = required_template; |
800eeca4 JW |
6746 | } |
6747 | if (curr != first && md.slot[curr].label_fixups) | |
6748 | { | |
f4660e2c JB |
6749 | if (manual_bundling) |
6750 | { | |
6751 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6752 | _("Label must be first in a bundle")); |
f4660e2c JB |
6753 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6754 | } | |
800eeca4 JW |
6755 | /* This insn must go into the first slot of a bundle. */ |
6756 | break; | |
6757 | } | |
6758 | ||
800eeca4 JW |
6759 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6760 | { | |
6761 | /* We need an instruction group boundary in the middle of a | |
6762 | bundle. See if we can switch to an other template with | |
6763 | an appropriate boundary. */ | |
6764 | ||
d3ce72d0 | 6765 | orig_template = template_val; |
800eeca4 JW |
6766 | if (i == 1 && (user_template == 4 |
6767 | || (user_template < 0 | |
d3ce72d0 | 6768 | && (ia64_templ_desc[template_val].exec_unit[0] |
800eeca4 JW |
6769 | == IA64_UNIT_M)))) |
6770 | { | |
d3ce72d0 | 6771 | template_val = 5; |
800eeca4 JW |
6772 | end_of_insn_group = 0; |
6773 | } | |
6774 | else if (i == 2 && (user_template == 0 | |
6775 | || (user_template < 0 | |
d3ce72d0 | 6776 | && (ia64_templ_desc[template_val].exec_unit[1] |
800eeca4 JW |
6777 | == IA64_UNIT_I))) |
6778 | /* This test makes sure we don't switch the template if | |
6779 | the next instruction is one that needs to be first in | |
6780 | an instruction group. Since all those instructions are | |
6781 | in the M group, there is no way such an instruction can | |
6782 | fit in this bundle even if we switch the template. The | |
6783 | reason we have to check for this is that otherwise we | |
6784 | may end up generating "MI;;I M.." which has the deadly | |
6785 | effect that the second M instruction is no longer the | |
f4660e2c | 6786 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6787 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6788 | { | |
d3ce72d0 | 6789 | template_val = 1; |
800eeca4 JW |
6790 | end_of_insn_group = 0; |
6791 | } | |
f4660e2c JB |
6792 | else if (i == 1 |
6793 | && user_template == 0 | |
6794 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6795 | /* Use the next slot. */ | |
6796 | continue; | |
800eeca4 JW |
6797 | else if (curr != first) |
6798 | /* can't fit this insn */ | |
6799 | break; | |
6800 | ||
d3ce72d0 | 6801 | if (template_val != orig_template) |
800eeca4 JW |
6802 | /* if we switch the template, we need to reset the NOPs |
6803 | after slot i. The slot-types of the instructions ahead | |
6804 | of i never change, so we don't need to worry about | |
6805 | changing NOPs in front of this slot. */ | |
6806 | for (j = i; j < 3; ++j) | |
d3ce72d0 | 6807 | insn[j] = nop[ia64_templ_desc[template_val].exec_unit[j]]; |
800eeca4 | 6808 | } |
d3ce72d0 | 6809 | required_unit = ia64_templ_desc[template_val].exec_unit[i]; |
800eeca4 | 6810 | |
c10d9d8f | 6811 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6812 | if (idesc->type == IA64_TYPE_DYN) |
6813 | { | |
97762d08 JB |
6814 | enum ia64_opnd opnd1, opnd2; |
6815 | ||
800eeca4 JW |
6816 | if ((strcmp (idesc->name, "nop") == 0) |
6817 | || (strcmp (idesc->name, "break") == 0)) | |
6818 | insn_unit = required_unit; | |
91d777ee L |
6819 | else if (strcmp (idesc->name, "hint") == 0) |
6820 | { | |
6821 | insn_unit = required_unit; | |
6822 | if (required_unit == IA64_UNIT_B) | |
6823 | { | |
6824 | switch (md.hint_b) | |
6825 | { | |
6826 | case hint_b_ok: | |
6827 | break; | |
6828 | case hint_b_warning: | |
ad4b42b4 | 6829 | as_warn (_("hint in B unit may be treated as nop")); |
91d777ee L |
6830 | break; |
6831 | case hint_b_error: | |
6832 | /* When manual bundling is off and there is no | |
6833 | user template, we choose a different unit so | |
6834 | that hint won't go into the current slot. We | |
6835 | will fill the current bundle with nops and | |
6836 | try to put hint into the next bundle. */ | |
6837 | if (!manual_bundling && user_template < 0) | |
6838 | insn_unit = IA64_UNIT_I; | |
6839 | else | |
ad4b42b4 | 6840 | as_bad (_("hint in B unit can't be used")); |
91d777ee L |
6841 | break; |
6842 | } | |
6843 | } | |
6844 | } | |
97762d08 JB |
6845 | else if (strcmp (idesc->name, "chk.s") == 0 |
6846 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6847 | { |
6848 | insn_unit = IA64_UNIT_M; | |
97762d08 | 6849 | if (required_unit == IA64_UNIT_I |
d3ce72d0 | 6850 | || (required_unit == IA64_UNIT_F && template_val == 6)) |
800eeca4 JW |
6851 | insn_unit = IA64_UNIT_I; |
6852 | } | |
6853 | else | |
ad4b42b4 | 6854 | as_fatal (_("emit_one_bundle: unexpected dynamic op")); |
800eeca4 | 6855 | |
f9f21a03 L |
6856 | snprintf (mnemonic, sizeof (mnemonic), "%s.%c", |
6857 | idesc->name, "?imbfxx"[insn_unit]); | |
97762d08 JB |
6858 | opnd1 = idesc->operands[0]; |
6859 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6860 | ia64_free_opcode (idesc); |
97762d08 JB |
6861 | idesc = ia64_find_opcode (mnemonic); |
6862 | /* moves to/from ARs have collisions */ | |
6863 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6864 | { | |
6865 | while (idesc != NULL | |
6866 | && (idesc->operands[0] != opnd1 | |
6867 | || idesc->operands[1] != opnd2)) | |
6868 | idesc = get_next_opcode (idesc); | |
6869 | } | |
97762d08 | 6870 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6871 | } |
6872 | else | |
6873 | { | |
6874 | insn_type = idesc->type; | |
6875 | insn_unit = IA64_UNIT_NIL; | |
6876 | switch (insn_type) | |
6877 | { | |
6878 | case IA64_TYPE_A: | |
6879 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6880 | insn_unit = required_unit; | |
6881 | break; | |
542d6675 | 6882 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6883 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6884 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6885 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6886 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6887 | default: break; | |
6888 | } | |
6889 | } | |
6890 | ||
6891 | if (insn_unit != required_unit) | |
9b505842 | 6892 | continue; /* Try next slot. */ |
800eeca4 | 6893 | |
07a53e5c RH |
6894 | /* Now is a good time to fix up the labels for this insn. */ |
6895 | mark_label = FALSE; | |
6896 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) | |
6897 | { | |
6898 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6899 | symbol_set_frag (lfix->sym, frag_now); | |
6900 | mark_label |= lfix->dw2_mark_labels; | |
6901 | } | |
6902 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6903 | { | |
6904 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6905 | symbol_set_frag (lfix->sym, frag_now); | |
6906 | } | |
6907 | ||
6908 | if (debug_type == DEBUG_DWARF2 | |
6909 | || md.slot[curr].loc_directive_seen | |
6910 | || mark_label) | |
196e8040 JW |
6911 | { |
6912 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6913 | |
196e8040 | 6914 | md.slot[curr].loc_directive_seen = 0; |
07a53e5c RH |
6915 | if (mark_label) |
6916 | md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
6917 | ||
196e8040 JW |
6918 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); |
6919 | } | |
800eeca4 JW |
6920 | |
6921 | build_insn (md.slot + curr, insn + i); | |
6922 | ||
d6e78c11 JW |
6923 | ptr = md.slot[curr].unwind_record; |
6924 | if (ptr) | |
6925 | { | |
6926 | /* Set slot numbers for all remaining unwind records belonging to the | |
6927 | current insn. There can not be any prologue/body unwind records | |
6928 | here. */ | |
d6e78c11 JW |
6929 | for (; ptr != end_ptr; ptr = ptr->next) |
6930 | { | |
6931 | ptr->slot_number = (unsigned long) f + i; | |
6932 | ptr->slot_frag = frag_now; | |
6933 | } | |
6934 | md.slot[curr].unwind_record = NULL; | |
6935 | } | |
10850f29 | 6936 | |
800eeca4 JW |
6937 | for (j = 0; j < md.slot[curr].num_fixups; ++j) |
6938 | { | |
6939 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6940 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6941 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6942 | fix->tc_fix_data.opnd = ifix->opnd; | |
800eeca4 JW |
6943 | fix->fx_file = md.slot[curr].src_file; |
6944 | fix->fx_line = md.slot[curr].src_line; | |
6945 | } | |
6946 | ||
6947 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6948 | ||
9699c833 TG |
6949 | /* This adjustment to "i" must occur after the fix, otherwise the fix |
6950 | is assigned to the wrong slot, and the VMS linker complains. */ | |
6951 | if (required_unit == IA64_UNIT_L) | |
6952 | { | |
6953 | know (i == 1); | |
6954 | /* skip one slot for long/X-unit instructions */ | |
6955 | ++i; | |
6956 | } | |
6957 | --md.num_slots_in_use; | |
6958 | last_slot = i; | |
6959 | ||
542d6675 | 6960 | /* clear slot: */ |
800eeca4 JW |
6961 | ia64_free_opcode (md.slot[curr].idesc); |
6962 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6963 | md.slot[curr].user_template = -1; | |
6964 | ||
6965 | if (manual_bundling_off) | |
6966 | { | |
6967 | manual_bundling = 0; | |
6968 | break; | |
6969 | } | |
6970 | curr = (curr + 1) % NUM_SLOTS; | |
6971 | idesc = md.slot[curr].idesc; | |
6972 | } | |
6abae71c JW |
6973 | |
6974 | /* A user template was specified, but the first following instruction did | |
6975 | not fit. This can happen with or without manual bundling. */ | |
6976 | if (md.num_slots_in_use > 0 && last_slot < 0) | |
6977 | { | |
6978 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6979 | _("`%s' does not fit into %s template"), |
d3ce72d0 | 6980 | idesc->name, ia64_templ_desc[template_val].name); |
6abae71c JW |
6981 | /* Drop first insn so we don't livelock. */ |
6982 | --md.num_slots_in_use; | |
6983 | know (curr == first); | |
6984 | ia64_free_opcode (md.slot[curr].idesc); | |
6985 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6986 | md.slot[curr].user_template = -1; | |
6987 | } | |
6988 | else if (manual_bundling > 0) | |
800eeca4 JW |
6989 | { |
6990 | if (md.num_slots_in_use > 0) | |
ac025970 | 6991 | { |
9b505842 JB |
6992 | if (last_slot >= 2) |
6993 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 6994 | _("`%s' does not fit into bundle"), idesc->name); |
9b505842 JB |
6995 | else |
6996 | { | |
6997 | const char *where; | |
6998 | ||
d3ce72d0 | 6999 | if (template_val == 2) |
9b505842 JB |
7000 | where = "X slot"; |
7001 | else if (last_slot == 0) | |
7002 | where = "slots 2 or 3"; | |
7003 | else | |
7004 | where = "slot 3"; | |
7005 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 7006 | _("`%s' can't go in %s of %s template"), |
d3ce72d0 | 7007 | idesc->name, where, ia64_templ_desc[template_val].name); |
9b505842 | 7008 | } |
ac025970 | 7009 | } |
800eeca4 JW |
7010 | else |
7011 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
ad4b42b4 | 7012 | _("Missing '}' at end of file")); |
800eeca4 | 7013 | } |
6abae71c | 7014 | |
800eeca4 JW |
7015 | know (md.num_slots_in_use < NUM_SLOTS); |
7016 | ||
d3ce72d0 | 7017 | t0 = end_of_insn_group | (template_val << 1) | (insn[0] << 5) | (insn[1] << 46); |
800eeca4 JW |
7018 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); |
7019 | ||
44f5c83a JW |
7020 | number_to_chars_littleendian (f + 0, t0, 8); |
7021 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
7022 | } |
7023 | ||
7024 | int | |
5a49b8ac | 7025 | md_parse_option (int c, char *arg) |
800eeca4 | 7026 | { |
7463c317 | 7027 | |
800eeca4 JW |
7028 | switch (c) |
7029 | { | |
c43c2cc5 | 7030 | /* Switches from the Intel assembler. */ |
44f5c83a | 7031 | case 'm': |
800eeca4 JW |
7032 | if (strcmp (arg, "ilp64") == 0 |
7033 | || strcmp (arg, "lp64") == 0 | |
7034 | || strcmp (arg, "p64") == 0) | |
7035 | { | |
7036 | md.flags |= EF_IA_64_ABI64; | |
7037 | } | |
7038 | else if (strcmp (arg, "ilp32") == 0) | |
7039 | { | |
7040 | md.flags &= ~EF_IA_64_ABI64; | |
7041 | } | |
7042 | else if (strcmp (arg, "le") == 0) | |
7043 | { | |
7044 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 7045 | default_big_endian = 0; |
800eeca4 JW |
7046 | } |
7047 | else if (strcmp (arg, "be") == 0) | |
7048 | { | |
7049 | md.flags |= EF_IA_64_BE; | |
549f748d | 7050 | default_big_endian = 1; |
800eeca4 | 7051 | } |
970d6792 L |
7052 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
7053 | { | |
7054 | arg += 13; | |
7055 | if (strcmp (arg, "warning") == 0) | |
7056 | md.unwind_check = unwind_check_warning; | |
7057 | else if (strcmp (arg, "error") == 0) | |
7058 | md.unwind_check = unwind_check_error; | |
7059 | else | |
7060 | return 0; | |
7061 | } | |
91d777ee L |
7062 | else if (strncmp (arg, "hint.b=", 7) == 0) |
7063 | { | |
7064 | arg += 7; | |
7065 | if (strcmp (arg, "ok") == 0) | |
7066 | md.hint_b = hint_b_ok; | |
7067 | else if (strcmp (arg, "warning") == 0) | |
7068 | md.hint_b = hint_b_warning; | |
7069 | else if (strcmp (arg, "error") == 0) | |
7070 | md.hint_b = hint_b_error; | |
7071 | else | |
7072 | return 0; | |
7073 | } | |
8c2fda1d L |
7074 | else if (strncmp (arg, "tune=", 5) == 0) |
7075 | { | |
7076 | arg += 5; | |
7077 | if (strcmp (arg, "itanium1") == 0) | |
7078 | md.tune = itanium1; | |
7079 | else if (strcmp (arg, "itanium2") == 0) | |
7080 | md.tune = itanium2; | |
7081 | else | |
7082 | return 0; | |
7083 | } | |
800eeca4 JW |
7084 | else |
7085 | return 0; | |
7086 | break; | |
7087 | ||
7088 | case 'N': | |
7089 | if (strcmp (arg, "so") == 0) | |
7090 | { | |
542d6675 | 7091 | /* Suppress signon message. */ |
800eeca4 JW |
7092 | } |
7093 | else if (strcmp (arg, "pi") == 0) | |
7094 | { | |
7095 | /* Reject privileged instructions. FIXME */ | |
7096 | } | |
7097 | else if (strcmp (arg, "us") == 0) | |
7098 | { | |
7099 | /* Allow union of signed and unsigned range. FIXME */ | |
7100 | } | |
7101 | else if (strcmp (arg, "close_fcalls") == 0) | |
7102 | { | |
7103 | /* Do not resolve global function calls. */ | |
7104 | } | |
7105 | else | |
7106 | return 0; | |
7107 | break; | |
7108 | ||
7109 | case 'C': | |
7110 | /* temp[="prefix"] Insert temporary labels into the object file | |
7111 | symbol table prefixed by "prefix". | |
7112 | Default prefix is ":temp:". | |
7113 | */ | |
7114 | break; | |
7115 | ||
7116 | case 'a': | |
800eeca4 JW |
7117 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7118 | according to <tgt> -- | |
7119 | exit: branch out from the current context (default) | |
7120 | labels: all labels in context may be branch targets | |
7121 | */ | |
85b40035 L |
7122 | if (strncmp (arg, "indirect=", 9) != 0) |
7123 | return 0; | |
800eeca4 JW |
7124 | break; |
7125 | ||
7126 | case 'x': | |
7127 | /* -X conflicts with an ignored option, use -x instead */ | |
7128 | md.detect_dv = 1; | |
7129 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7130 | { |
7131 | /* set default mode to explicit */ | |
7132 | md.default_explicit_mode = 1; | |
7133 | break; | |
7134 | } | |
800eeca4 | 7135 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7136 | { |
7137 | md.default_explicit_mode = 0; | |
7138 | } | |
f1dab70d JB |
7139 | else if (strcmp (arg, "none") == 0) |
7140 | { | |
7141 | md.detect_dv = 0; | |
7142 | } | |
800eeca4 | 7143 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7144 | { |
7145 | md.debug_dv = 1; | |
7146 | } | |
800eeca4 | 7147 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7148 | { |
7149 | md.default_explicit_mode = 1; | |
7150 | md.debug_dv = 1; | |
7151 | } | |
f1dab70d JB |
7152 | else if (strcmp (arg, "debugn") == 0) |
7153 | { | |
7154 | md.debug_dv = 1; | |
7155 | md.detect_dv = 0; | |
7156 | } | |
800eeca4 | 7157 | else |
542d6675 KH |
7158 | { |
7159 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7160 | } | |
800eeca4 JW |
7161 | break; |
7162 | ||
7163 | case 'S': | |
7164 | /* nops Print nops statistics. */ | |
7165 | break; | |
7166 | ||
c43c2cc5 JW |
7167 | /* GNU specific switches for gcc. */ |
7168 | case OPTION_MCONSTANT_GP: | |
7169 | md.flags |= EF_IA_64_CONS_GP; | |
7170 | break; | |
7171 | ||
7172 | case OPTION_MAUTO_PIC: | |
7173 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7174 | break; | |
7175 | ||
800eeca4 JW |
7176 | default: |
7177 | return 0; | |
7178 | } | |
7179 | ||
7180 | return 1; | |
7181 | } | |
7182 | ||
7183 | void | |
5a49b8ac | 7184 | md_show_usage (FILE *stream) |
800eeca4 | 7185 | { |
542d6675 | 7186 | fputs (_("\ |
800eeca4 | 7187 | IA-64 options:\n\ |
6290819d NC |
7188 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7189 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7190 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7191 | without function descriptors (sets ELF header flag\n\ | |
7192 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7193 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7194 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7195 | -mtune=[itanium1|itanium2]\n\ |
7196 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7197 | -munwind-check=[warning|error]\n\ |
7198 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7199 | -mhint.b=[ok|warning|error]\n\ |
7200 | hint.b check (default -mhint.b=error)\n\ | |
a1727c1a NC |
7201 | -x | -xexplicit turn on dependency violation checking\n"), stream); |
7202 | /* Note for translators: "automagically" can be translated as "automatically" here. */ | |
7203 | fputs (_("\ | |
f1dab70d JB |
7204 | -xauto automagically remove dependency violations (default)\n\ |
7205 | -xnone turn off dependency violation checking\n\ | |
7206 | -xdebug debug dependency violation checker\n\ | |
7207 | -xdebugn debug dependency violation checker but turn off\n\ | |
7208 | dependency violation checking\n\ | |
7209 | -xdebugx debug dependency violation checker and turn on\n\ | |
7210 | dependency violation checking\n"), | |
800eeca4 JW |
7211 | stream); |
7212 | } | |
7213 | ||
acebd4ce | 7214 | void |
5a49b8ac | 7215 | ia64_after_parse_args (void) |
acebd4ce AS |
7216 | { |
7217 | if (debug_type == DEBUG_STABS) | |
7218 | as_fatal (_("--gstabs is not supported for ia64")); | |
7219 | } | |
7220 | ||
44576e1f RH |
7221 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7222 | ||
7223 | static int | |
800eeca4 JW |
7224 | match (int templ, int type, int slot) |
7225 | { | |
7226 | enum ia64_unit unit; | |
7227 | int result; | |
7228 | ||
7229 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7230 | switch (type) | |
7231 | { | |
7232 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7233 | case IA64_TYPE_A: | |
7234 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7235 | break; | |
7236 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7237 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7238 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7239 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7240 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7241 | default: result = 0; break; | |
7242 | } | |
7243 | return result; | |
7244 | } | |
7245 | ||
7c06efaa JW |
7246 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7247 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7248 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7249 | |
7250 | static inline int | |
7251 | extra_goodness (int templ, int slot) | |
7252 | { | |
8c2fda1d L |
7253 | switch (md.tune) |
7254 | { | |
7255 | case itanium1: | |
7256 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7257 | return 2; | |
7258 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7259 | return 1; | |
7260 | else | |
7261 | return 0; | |
7262 | break; | |
7263 | case itanium2: | |
7264 | if (match (templ, IA64_TYPE_M, slot) | |
7265 | || match (templ, IA64_TYPE_I, slot)) | |
7266 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7267 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7268 | branch-prediction. */ | |
7269 | return 2; | |
7270 | else | |
7271 | return 0; | |
7272 | break; | |
7273 | default: | |
7274 | abort (); | |
7275 | return 0; | |
7276 | } | |
44576e1f RH |
7277 | } |
7278 | ||
800eeca4 JW |
7279 | /* This function is called once, at assembler startup time. It sets |
7280 | up all the tables, etc. that the MD part of the assembler will need | |
7281 | that can be determined before arguments are parsed. */ | |
7282 | void | |
5a49b8ac | 7283 | md_begin (void) |
800eeca4 | 7284 | { |
8b84be9d | 7285 | int i, j, k, t, goodness, best, ok; |
800eeca4 JW |
7286 | const char *err; |
7287 | char name[8]; | |
7288 | ||
7289 | md.auto_align = 1; | |
7290 | md.explicit_mode = md.default_explicit_mode; | |
7291 | ||
7292 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7293 | ||
0234cb7c | 7294 | /* Make sure function pointers get initialized. */ |
10a98291 | 7295 | target_big_endian = -1; |
549f748d | 7296 | dot_byteorder (default_big_endian); |
10a98291 | 7297 | |
35f5df7f L |
7298 | alias_hash = hash_new (); |
7299 | alias_name_hash = hash_new (); | |
7300 | secalias_hash = hash_new (); | |
7301 | secalias_name_hash = hash_new (); | |
7302 | ||
13ae64f3 JJ |
7303 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7304 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7305 | &zero_address_frag); | |
7306 | ||
7307 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7308 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7309 | &zero_address_frag); | |
7310 | ||
800eeca4 | 7311 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7312 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7313 | &zero_address_frag); | |
800eeca4 JW |
7314 | |
7315 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7316 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7317 | &zero_address_frag); | |
800eeca4 JW |
7318 | |
7319 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7320 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7321 | &zero_address_frag); | |
800eeca4 | 7322 | |
fa2c7eff RH |
7323 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7324 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7325 | &zero_address_frag); | |
7326 | ||
c67e42c9 | 7327 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7328 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7329 | &zero_address_frag); | |
c67e42c9 | 7330 | |
800eeca4 | 7331 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7332 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7333 | &zero_address_frag); | |
800eeca4 JW |
7334 | |
7335 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7336 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7337 | &zero_address_frag); | |
800eeca4 JW |
7338 | |
7339 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7340 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7341 | &zero_address_frag); | |
800eeca4 | 7342 | |
13ae64f3 JJ |
7343 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7344 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7345 | &zero_address_frag); | |
7346 | ||
800eeca4 | 7347 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7348 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7349 | &zero_address_frag); | |
800eeca4 JW |
7350 | |
7351 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7352 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7353 | &zero_address_frag); | |
800eeca4 | 7354 | |
13ae64f3 JJ |
7355 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7356 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7357 | &zero_address_frag); | |
7358 | ||
7359 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7360 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7361 | &zero_address_frag); | |
7362 | ||
7363 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7364 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7365 | &zero_address_frag); | |
7366 | ||
3969b680 RH |
7367 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7368 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7369 | &zero_address_frag); | |
7370 | ||
9d0e8497 TG |
7371 | #ifdef TE_VMS |
7372 | pseudo_func[FUNC_SLOTCOUNT_RELOC].u.sym = | |
7373 | symbol_new (".<slotcount>", undefined_section, FUNC_SLOTCOUNT_RELOC, | |
7374 | &zero_address_frag); | |
7375 | #endif | |
7376 | ||
f6fe78d6 JW |
7377 | if (md.tune != itanium1) |
7378 | { | |
7379 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7380 | le_nop[0] = 0x8; | |
7381 | le_nop_stop[0] = 0x9; | |
7382 | } | |
7383 | ||
197865e8 | 7384 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7385 | base 4 value, in which each match counts for 3. Match-failures |
7386 | result in NOPs and we use extra_goodness() to pick the execution | |
7387 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7388 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7389 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7390 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7391 | { | |
7392 | best = 0; | |
7393 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7394 | { | |
7395 | goodness = 0; | |
7396 | if (match (t, i, 0)) | |
7397 | { | |
7398 | if (match (t, j, 1)) | |
7399 | { | |
286cee81 | 7400 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7401 | goodness = 3 + 3 + 3; |
800eeca4 | 7402 | else |
44576e1f | 7403 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7404 | } |
7405 | else if (match (t, j, 2)) | |
44576e1f | 7406 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7407 | else |
44576e1f RH |
7408 | { |
7409 | goodness = 3; | |
7410 | goodness += extra_goodness (t, 1); | |
7411 | goodness += extra_goodness (t, 2); | |
7412 | } | |
800eeca4 JW |
7413 | } |
7414 | else if (match (t, i, 1)) | |
7415 | { | |
286cee81 | 7416 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7417 | goodness = 3 + 3; |
800eeca4 | 7418 | else |
44576e1f | 7419 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7420 | } |
7421 | else if (match (t, i, 2)) | |
44576e1f | 7422 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7423 | |
7424 | if (goodness > best) | |
7425 | { | |
7426 | best = goodness; | |
7427 | best_template[i][j][k] = t; | |
7428 | } | |
7429 | } | |
7430 | } | |
7431 | ||
7c06efaa JW |
7432 | #ifdef DEBUG_TEMPLATES |
7433 | /* For debugging changes to the best_template calculations. We don't care | |
7434 | about combinations with invalid instructions, so start the loops at 1. */ | |
7435 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7436 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7437 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7438 | { | |
7439 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7440 | 'x', 'd' }; | |
7441 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7442 | type_letter[k], | |
7443 | ia64_templ_desc[best_template[i][j][k]].name); | |
7444 | } | |
7445 | #endif | |
7446 | ||
800eeca4 JW |
7447 | for (i = 0; i < NUM_SLOTS; ++i) |
7448 | md.slot[i].user_template = -1; | |
7449 | ||
7450 | md.pseudo_hash = hash_new (); | |
7451 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7452 | { | |
7453 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7454 | (void *) (pseudo_opcode + i)); | |
7455 | if (err) | |
ad4b42b4 | 7456 | as_fatal (_("ia64.md_begin: can't hash `%s': %s"), |
800eeca4 JW |
7457 | pseudo_opcode[i].name, err); |
7458 | } | |
7459 | ||
7460 | md.reg_hash = hash_new (); | |
7461 | md.dynreg_hash = hash_new (); | |
7462 | md.const_hash = hash_new (); | |
7463 | md.entry_hash = hash_new (); | |
7464 | ||
542d6675 | 7465 | /* general registers: */ |
8b84be9d JB |
7466 | declare_register_set ("r", 128, REG_GR); |
7467 | declare_register ("gp", REG_GR + 1); | |
7468 | declare_register ("sp", REG_GR + 12); | |
7469 | declare_register ("tp", REG_GR + 13); | |
7470 | declare_register_set ("ret", 4, REG_GR + 8); | |
800eeca4 | 7471 | |
542d6675 | 7472 | /* floating point registers: */ |
8b84be9d JB |
7473 | declare_register_set ("f", 128, REG_FR); |
7474 | declare_register_set ("farg", 8, REG_FR + 8); | |
7475 | declare_register_set ("fret", 8, REG_FR + 8); | |
800eeca4 | 7476 | |
542d6675 | 7477 | /* branch registers: */ |
8b84be9d JB |
7478 | declare_register_set ("b", 8, REG_BR); |
7479 | declare_register ("rp", REG_BR + 0); | |
800eeca4 | 7480 | |
8b84be9d JB |
7481 | /* predicate registers: */ |
7482 | declare_register_set ("p", 64, REG_P); | |
7483 | declare_register ("pr", REG_PR); | |
7484 | declare_register ("pr.rot", REG_PR_ROT); | |
800eeca4 | 7485 | |
8b84be9d JB |
7486 | /* application registers: */ |
7487 | declare_register_set ("ar", 128, REG_AR); | |
5e0bd176 JB |
7488 | for (i = 0; i < NELEMS (ar); ++i) |
7489 | declare_register (ar[i].name, REG_AR + ar[i].regnum); | |
800eeca4 | 7490 | |
8b84be9d JB |
7491 | /* control registers: */ |
7492 | declare_register_set ("cr", 128, REG_CR); | |
5e0bd176 JB |
7493 | for (i = 0; i < NELEMS (cr); ++i) |
7494 | declare_register (cr[i].name, REG_CR + cr[i].regnum); | |
800eeca4 | 7495 | |
b3e14eda L |
7496 | /* dahr registers: */ |
7497 | declare_register_set ("dahr", 8, REG_DAHR); | |
7498 | ||
8b84be9d JB |
7499 | declare_register ("ip", REG_IP); |
7500 | declare_register ("cfm", REG_CFM); | |
7501 | declare_register ("psr", REG_PSR); | |
7502 | declare_register ("psr.l", REG_PSR_L); | |
7503 | declare_register ("psr.um", REG_PSR_UM); | |
7504 | ||
7505 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7506 | { | |
7507 | unsigned int regnum = indirect_reg[i].regnum; | |
7508 | ||
7509 | md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum); | |
7510 | } | |
800eeca4 | 7511 | |
542d6675 | 7512 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7513 | declare_register ("psp", REG_PSP); |
7514 | ||
800eeca4 JW |
7515 | for (i = 0; i < NELEMS (const_bits); ++i) |
7516 | { | |
7517 | err = hash_insert (md.const_hash, const_bits[i].name, | |
5a49b8ac | 7518 | (void *) (const_bits + i)); |
800eeca4 | 7519 | if (err) |
ad4b42b4 | 7520 | as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"), |
800eeca4 JW |
7521 | name, err); |
7522 | } | |
7523 | ||
44f5c83a JW |
7524 | /* Set the architecture and machine depending on defaults and command line |
7525 | options. */ | |
7526 | if (md.flags & EF_IA_64_ABI64) | |
7527 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7528 | else | |
7529 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7530 | ||
7531 | if (! ok) | |
7532 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7533 | |
557debba JW |
7534 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7535 | ||
7536 | if (md.flags & EF_IA_64_ABI64) | |
7537 | { | |
7538 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7539 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7540 | } | |
7541 | else | |
7542 | { | |
7543 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7544 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7545 | } | |
7546 | ||
800eeca4 JW |
7547 | md.mem_offset.hint = 0; |
7548 | md.path = 0; | |
7549 | md.maxpaths = 0; | |
7550 | md.entry_labels = NULL; | |
7551 | } | |
7552 | ||
970d6792 L |
7553 | /* Set the default options in md. Cannot do this in md_begin because |
7554 | that is called after md_parse_option which is where we set the | |
7555 | options in md based on command line options. */ | |
44f5c83a JW |
7556 | |
7557 | void | |
5a49b8ac | 7558 | ia64_init (int argc ATTRIBUTE_UNUSED, char **argv ATTRIBUTE_UNUSED) |
44f5c83a | 7559 | { |
1cd8ff38 | 7560 | md.flags = MD_FLAGS_DEFAULT; |
01e1a5bc NC |
7561 | #ifndef TE_VMS |
7562 | /* Don't turn on dependency checking for VMS, doesn't work. */ | |
f1dab70d | 7563 | md.detect_dv = 1; |
01e1a5bc | 7564 | #endif |
970d6792 L |
7565 | /* FIXME: We should change it to unwind_check_error someday. */ |
7566 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7567 | md.hint_b = hint_b_error; |
8c2fda1d | 7568 | md.tune = itanium2; |
44f5c83a JW |
7569 | } |
7570 | ||
7571 | /* Return a string for the target object file format. */ | |
7572 | ||
7573 | const char * | |
5a49b8ac | 7574 | ia64_target_format (void) |
44f5c83a JW |
7575 | { |
7576 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7577 | { | |
72a76794 JW |
7578 | if (md.flags & EF_IA_64_BE) |
7579 | { | |
7580 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7581 | #if defined(TE_AIX50) |
7463c317 | 7582 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7583 | #elif defined(TE_HPUX) |
7584 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7585 | #else |
72a76794 | 7586 | return "elf64-ia64-big"; |
7463c317 | 7587 | #endif |
72a76794 | 7588 | else |
1cd8ff38 | 7589 | #if defined(TE_AIX50) |
7463c317 | 7590 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7591 | #elif defined(TE_HPUX) |
7592 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7593 | #else |
72a76794 | 7594 | return "elf32-ia64-big"; |
7463c317 | 7595 | #endif |
72a76794 | 7596 | } |
44f5c83a | 7597 | else |
72a76794 JW |
7598 | { |
7599 | if (md.flags & EF_IA_64_ABI64) | |
01e1a5bc | 7600 | #if defined (TE_AIX50) |
7463c317 | 7601 | return "elf64-ia64-aix-little"; |
01e1a5bc NC |
7602 | #elif defined (TE_VMS) |
7603 | { | |
7604 | md.flags |= EF_IA_64_ARCHVER_1; | |
7605 | return "elf64-ia64-vms"; | |
7606 | } | |
7463c317 | 7607 | #else |
72a76794 | 7608 | return "elf64-ia64-little"; |
7463c317 | 7609 | #endif |
72a76794 | 7610 | else |
7463c317 TW |
7611 | #ifdef TE_AIX50 |
7612 | return "elf32-ia64-aix-little"; | |
7613 | #else | |
72a76794 | 7614 | return "elf32-ia64-little"; |
7463c317 | 7615 | #endif |
72a76794 | 7616 | } |
44f5c83a JW |
7617 | } |
7618 | else | |
7619 | return "unknown-format"; | |
7620 | } | |
7621 | ||
800eeca4 | 7622 | void |
5a49b8ac | 7623 | ia64_end_of_source (void) |
800eeca4 | 7624 | { |
542d6675 | 7625 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7626 | insn_group_break (1, 0, 0); |
7627 | ||
542d6675 | 7628 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7629 | ia64_flush_insns (); |
7630 | ||
7631 | bfd_set_private_flags (stdoutput, md.flags); | |
7632 | ||
800eeca4 JW |
7633 | md.mem_offset.hint = 0; |
7634 | } | |
7635 | ||
7636 | void | |
5a49b8ac | 7637 | ia64_start_line (void) |
800eeca4 | 7638 | { |
e4e8248d JB |
7639 | static int first; |
7640 | ||
7641 | if (!first) { | |
7642 | /* Make sure we don't reference input_line_pointer[-1] when that's | |
7643 | not valid. */ | |
7644 | first = 1; | |
7645 | return; | |
7646 | } | |
7647 | ||
f1bcba5b | 7648 | if (md.qp.X_op == O_register) |
ad4b42b4 | 7649 | as_bad (_("qualifying predicate not followed by instruction")); |
800eeca4 JW |
7650 | md.qp.X_op = O_absent; |
7651 | ||
7652 | if (ignore_input ()) | |
7653 | return; | |
7654 | ||
7655 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7656 | { | |
7657 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7658 | { |
7659 | static int warned; | |
7660 | ||
7661 | if (!warned) | |
7662 | { | |
7663 | warned = 1; | |
7664 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7665 | } | |
7666 | } | |
800eeca4 | 7667 | else |
542d6675 | 7668 | insn_group_break (1, 0, 0); |
800eeca4 | 7669 | } |
e4e8248d | 7670 | else if (input_line_pointer[-1] == '{') |
800eeca4 | 7671 | { |
800eeca4 | 7672 | if (md.manual_bundling) |
ad4b42b4 | 7673 | as_warn (_("Found '{' when manual bundling is already turned on")); |
800eeca4 JW |
7674 | else |
7675 | CURR_SLOT.manual_bundling_on = 1; | |
7676 | md.manual_bundling = 1; | |
7677 | ||
542d6675 KH |
7678 | /* Bundling is only acceptable in explicit mode |
7679 | or when in default automatic mode. */ | |
800eeca4 | 7680 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7681 | { |
7682 | if (!md.mode_explicitly_set | |
7683 | && !md.default_explicit_mode) | |
7684 | dot_dv_mode ('E'); | |
7685 | else | |
7686 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7687 | } | |
e4e8248d JB |
7688 | } |
7689 | else if (input_line_pointer[-1] == '}') | |
7690 | { | |
800eeca4 | 7691 | if (!md.manual_bundling) |
ad4b42b4 | 7692 | as_warn (_("Found '}' when manual bundling is off")); |
800eeca4 JW |
7693 | else |
7694 | PREV_SLOT.manual_bundling_off = 1; | |
7695 | md.manual_bundling = 0; | |
7696 | ||
7697 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7698 | if (md.detect_dv |
542d6675 KH |
7699 | && md.explicit_mode |
7700 | && !md.mode_explicitly_set | |
7701 | && !md.default_explicit_mode) | |
7702 | dot_dv_mode ('A'); | |
e4e8248d JB |
7703 | } |
7704 | } | |
800eeca4 | 7705 | |
e4e8248d JB |
7706 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7707 | labels. */ | |
7708 | static int defining_tag = 0; | |
7709 | ||
7710 | int | |
5a49b8ac | 7711 | ia64_unrecognized_line (int ch) |
e4e8248d JB |
7712 | { |
7713 | switch (ch) | |
7714 | { | |
7715 | case '(': | |
60d11e55 | 7716 | expression_and_evaluate (&md.qp); |
e4e8248d | 7717 | if (*input_line_pointer++ != ')') |
800eeca4 | 7718 | { |
ad4b42b4 | 7719 | as_bad (_("Expected ')'")); |
e4e8248d JB |
7720 | return 0; |
7721 | } | |
7722 | if (md.qp.X_op != O_register) | |
7723 | { | |
ad4b42b4 | 7724 | as_bad (_("Qualifying predicate expected")); |
e4e8248d JB |
7725 | return 0; |
7726 | } | |
7727 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7728 | { | |
ad4b42b4 | 7729 | as_bad (_("Predicate register expected")); |
e4e8248d | 7730 | return 0; |
800eeca4 | 7731 | } |
800eeca4 JW |
7732 | return 1; |
7733 | ||
f1bcba5b JW |
7734 | case '[': |
7735 | { | |
7736 | char *s; | |
7737 | char c; | |
7738 | symbolS *tag; | |
4d5a53ff | 7739 | int temp; |
f1bcba5b JW |
7740 | |
7741 | if (md.qp.X_op == O_register) | |
7742 | { | |
ad4b42b4 | 7743 | as_bad (_("Tag must come before qualifying predicate.")); |
f1bcba5b JW |
7744 | return 0; |
7745 | } | |
4d5a53ff JW |
7746 | |
7747 | /* This implements just enough of read_a_source_file in read.c to | |
7748 | recognize labels. */ | |
7749 | if (is_name_beginner (*input_line_pointer)) | |
7750 | { | |
7751 | s = input_line_pointer; | |
7752 | c = get_symbol_end (); | |
7753 | } | |
7754 | else if (LOCAL_LABELS_FB | |
3882b010 | 7755 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7756 | { |
7757 | temp = 0; | |
3882b010 | 7758 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7759 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7760 | fb_label_instance_inc (temp); | |
7761 | s = fb_label_name (temp, 0); | |
7762 | c = *input_line_pointer; | |
7763 | } | |
7764 | else | |
7765 | { | |
7766 | s = NULL; | |
7767 | c = '\0'; | |
7768 | } | |
f1bcba5b JW |
7769 | if (c != ':') |
7770 | { | |
7771 | /* Put ':' back for error messages' sake. */ | |
7772 | *input_line_pointer++ = ':'; | |
ad4b42b4 | 7773 | as_bad (_("Expected ':'")); |
f1bcba5b JW |
7774 | return 0; |
7775 | } | |
4d5a53ff | 7776 | |
f1bcba5b JW |
7777 | defining_tag = 1; |
7778 | tag = colon (s); | |
7779 | defining_tag = 0; | |
7780 | /* Put ':' back for error messages' sake. */ | |
7781 | *input_line_pointer++ = ':'; | |
7782 | if (*input_line_pointer++ != ']') | |
7783 | { | |
ad4b42b4 | 7784 | as_bad (_("Expected ']'")); |
f1bcba5b JW |
7785 | return 0; |
7786 | } | |
7787 | if (! tag) | |
7788 | { | |
ad4b42b4 | 7789 | as_bad (_("Tag name expected")); |
f1bcba5b JW |
7790 | return 0; |
7791 | } | |
7792 | return 1; | |
7793 | } | |
7794 | ||
800eeca4 JW |
7795 | default: |
7796 | break; | |
7797 | } | |
542d6675 KH |
7798 | |
7799 | /* Not a valid line. */ | |
7800 | return 0; | |
800eeca4 JW |
7801 | } |
7802 | ||
7803 | void | |
5a49b8ac | 7804 | ia64_frob_label (struct symbol *sym) |
800eeca4 JW |
7805 | { |
7806 | struct label_fix *fix; | |
7807 | ||
f1bcba5b JW |
7808 | /* Tags need special handling since they are not bundle breaks like |
7809 | labels. */ | |
7810 | if (defining_tag) | |
7811 | { | |
7812 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7813 | fix->sym = sym; | |
7814 | fix->next = CURR_SLOT.tag_fixups; | |
07a53e5c | 7815 | fix->dw2_mark_labels = FALSE; |
f1bcba5b JW |
7816 | CURR_SLOT.tag_fixups = fix; |
7817 | ||
7818 | return; | |
7819 | } | |
7820 | ||
800eeca4 JW |
7821 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7822 | { | |
7823 | md.last_text_seg = now_seg; | |
7824 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7825 | fix->sym = sym; | |
7826 | fix->next = CURR_SLOT.label_fixups; | |
07a53e5c | 7827 | fix->dw2_mark_labels = dwarf2_loc_mark_labels; |
800eeca4 JW |
7828 | CURR_SLOT.label_fixups = fix; |
7829 | ||
542d6675 | 7830 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7831 | if (md.path == md.maxpaths) |
542d6675 KH |
7832 | { |
7833 | md.maxpaths += 20; | |
7834 | md.entry_labels = (const char **) | |
7835 | xrealloc ((void *) md.entry_labels, | |
7836 | md.maxpaths * sizeof (char *)); | |
7837 | } | |
800eeca4 JW |
7838 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7839 | } | |
7840 | } | |
7841 | ||
936cf02e JW |
7842 | #ifdef TE_HPUX |
7843 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7844 | that are declared but unused. This routine removes declared, | |
7845 | unused symbols from an object. */ | |
7846 | int | |
5a49b8ac | 7847 | ia64_frob_symbol (struct symbol *sym) |
936cf02e | 7848 | { |
45dfa85a | 7849 | if ((S_GET_SEGMENT (sym) == bfd_und_section_ptr && ! symbol_used_p (sym) && |
936cf02e | 7850 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) |
45dfa85a | 7851 | || (S_GET_SEGMENT (sym) == bfd_abs_section_ptr |
936cf02e JW |
7852 | && ! S_IS_EXTERNAL (sym))) |
7853 | return 1; | |
7854 | return 0; | |
7855 | } | |
7856 | #endif | |
7857 | ||
800eeca4 | 7858 | void |
5a49b8ac | 7859 | ia64_flush_pending_output (void) |
800eeca4 | 7860 | { |
4d5a53ff JW |
7861 | if (!md.keep_pending_output |
7862 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7863 | { |
7864 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7865 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7866 | insn_group_break (1, 0, 0); | |
7867 | ia64_flush_insns (); | |
7868 | } | |
7869 | } | |
7870 | ||
7871 | /* Do ia64-specific expression optimization. All that's done here is | |
7872 | to transform index expressions that are either due to the indexing | |
7873 | of rotating registers or due to the indexing of indirect register | |
7874 | sets. */ | |
7875 | int | |
5a49b8ac | 7876 | ia64_optimize_expr (expressionS *l, operatorT op, expressionS *r) |
800eeca4 | 7877 | { |
6a2375c6 JB |
7878 | if (op != O_index) |
7879 | return 0; | |
7880 | resolve_expression (l); | |
7881 | if (l->X_op == O_register) | |
800eeca4 | 7882 | { |
6a2375c6 JB |
7883 | unsigned num_regs = l->X_add_number >> 16; |
7884 | ||
7885 | resolve_expression (r); | |
7886 | if (num_regs) | |
800eeca4 | 7887 | { |
6a2375c6 JB |
7888 | /* Left side is a .rotX-allocated register. */ |
7889 | if (r->X_op != O_constant) | |
800eeca4 | 7890 | { |
ad4b42b4 | 7891 | as_bad (_("Rotating register index must be a non-negative constant")); |
6a2375c6 JB |
7892 | r->X_add_number = 0; |
7893 | } | |
7894 | else if ((valueT) r->X_add_number >= num_regs) | |
7895 | { | |
ad4b42b4 | 7896 | as_bad (_("Index out of range 0..%u"), num_regs - 1); |
800eeca4 JW |
7897 | r->X_add_number = 0; |
7898 | } | |
7899 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7900 | return 1; | |
7901 | } | |
6a2375c6 | 7902 | else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR) |
800eeca4 | 7903 | { |
6a2375c6 JB |
7904 | if (r->X_op != O_register |
7905 | || r->X_add_number < REG_GR | |
7906 | || r->X_add_number > REG_GR + 127) | |
800eeca4 | 7907 | { |
ad4b42b4 | 7908 | as_bad (_("Indirect register index must be a general register")); |
6a2375c6 | 7909 | r->X_add_number = REG_GR; |
800eeca4 JW |
7910 | } |
7911 | l->X_op = O_index; | |
8b84be9d | 7912 | l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID]; |
800eeca4 JW |
7913 | l->X_add_number = r->X_add_number; |
7914 | return 1; | |
7915 | } | |
7916 | } | |
ad4b42b4 | 7917 | as_bad (_("Index can only be applied to rotating or indirect registers")); |
6a2375c6 JB |
7918 | /* Fall back to some register use of which has as little as possible |
7919 | side effects, to minimize subsequent error messages. */ | |
7920 | l->X_op = O_register; | |
7921 | l->X_add_number = REG_GR + 3; | |
7922 | return 1; | |
800eeca4 JW |
7923 | } |
7924 | ||
7925 | int | |
5a49b8ac | 7926 | ia64_parse_name (char *name, expressionS *e, char *nextcharP) |
800eeca4 JW |
7927 | { |
7928 | struct const_desc *cdesc; | |
7929 | struct dynreg *dr = 0; | |
16a48f83 | 7930 | unsigned int idx; |
800eeca4 JW |
7931 | struct symbol *sym; |
7932 | char *end; | |
7933 | ||
16a48f83 JB |
7934 | if (*name == '@') |
7935 | { | |
7936 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7937 | ||
7938 | /* Find what relocation pseudo-function we're dealing with. */ | |
7939 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7940 | if (pseudo_func[idx].name | |
7941 | && pseudo_func[idx].name[0] == name[1] | |
7942 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7943 | { | |
7944 | pseudo_type = pseudo_func[idx].type; | |
7945 | break; | |
7946 | } | |
7947 | switch (pseudo_type) | |
7948 | { | |
7949 | case PSEUDO_FUNC_RELOC: | |
7950 | end = input_line_pointer; | |
7951 | if (*nextcharP != '(') | |
7952 | { | |
ad4b42b4 | 7953 | as_bad (_("Expected '('")); |
2f6d622e | 7954 | break; |
16a48f83 JB |
7955 | } |
7956 | /* Skip '('. */ | |
7957 | ++input_line_pointer; | |
7958 | expression (e); | |
7959 | if (*input_line_pointer != ')') | |
7960 | { | |
ad4b42b4 | 7961 | as_bad (_("Missing ')'")); |
16a48f83 JB |
7962 | goto done; |
7963 | } | |
7964 | /* Skip ')'. */ | |
7965 | ++input_line_pointer; | |
9d0e8497 TG |
7966 | #ifdef TE_VMS |
7967 | if (idx == FUNC_SLOTCOUNT_RELOC) | |
7968 | { | |
7969 | /* @slotcount can accept any expression. Canonicalize. */ | |
7970 | e->X_add_symbol = make_expr_symbol (e); | |
7971 | e->X_op = O_symbol; | |
7972 | e->X_add_number = 0; | |
7973 | } | |
7974 | #endif | |
16a48f83 JB |
7975 | if (e->X_op != O_symbol) |
7976 | { | |
7977 | if (e->X_op != O_pseudo_fixup) | |
7978 | { | |
ad4b42b4 | 7979 | as_bad (_("Not a symbolic expression")); |
16a48f83 JB |
7980 | goto done; |
7981 | } | |
7982 | if (idx != FUNC_LT_RELATIVE) | |
7983 | { | |
ad4b42b4 | 7984 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7985 | goto done; |
7986 | } | |
7987 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7988 | { | |
7989 | case FUNC_FPTR_RELATIVE: | |
7990 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7991 | case FUNC_DTP_MODULE: | |
7992 | idx = FUNC_LT_DTP_MODULE; break; | |
7993 | case FUNC_DTP_RELATIVE: | |
7994 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7995 | case FUNC_TP_RELATIVE: | |
7996 | idx = FUNC_LT_TP_RELATIVE; break; | |
7997 | default: | |
ad4b42b4 | 7998 | as_bad (_("Illegal combination of relocation functions")); |
16a48f83 JB |
7999 | goto done; |
8000 | } | |
8001 | } | |
8002 | /* Make sure gas doesn't get rid of local symbols that are used | |
8003 | in relocs. */ | |
8004 | e->X_op = O_pseudo_fixup; | |
8005 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
8006 | done: |
8007 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
8008 | break; |
8009 | ||
8010 | case PSEUDO_FUNC_CONST: | |
8011 | e->X_op = O_constant; | |
8012 | e->X_add_number = pseudo_func[idx].u.ival; | |
8013 | break; | |
8014 | ||
8015 | case PSEUDO_FUNC_REG: | |
8016 | e->X_op = O_register; | |
8017 | e->X_add_number = pseudo_func[idx].u.ival; | |
8018 | break; | |
8019 | ||
8020 | default: | |
8021 | return 0; | |
8022 | } | |
16a48f83 JB |
8023 | return 1; |
8024 | } | |
8025 | ||
542d6675 | 8026 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
8027 | sym = hash_find (md.reg_hash, name); |
8028 | if (sym) | |
8029 | { | |
8030 | e->X_op = O_register; | |
8031 | e->X_add_number = S_GET_VALUE (sym); | |
8032 | return 1; | |
8033 | } | |
8034 | ||
8035 | cdesc = hash_find (md.const_hash, name); | |
8036 | if (cdesc) | |
8037 | { | |
8038 | e->X_op = O_constant; | |
8039 | e->X_add_number = cdesc->value; | |
8040 | return 1; | |
8041 | } | |
8042 | ||
542d6675 | 8043 | /* check for inN, locN, or outN: */ |
26b810ce | 8044 | idx = 0; |
800eeca4 JW |
8045 | switch (name[0]) |
8046 | { | |
8047 | case 'i': | |
3882b010 | 8048 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
8049 | { |
8050 | dr = &md.in; | |
26b810ce | 8051 | idx = 2; |
800eeca4 JW |
8052 | } |
8053 | break; | |
8054 | ||
8055 | case 'l': | |
3882b010 | 8056 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
8057 | { |
8058 | dr = &md.loc; | |
26b810ce | 8059 | idx = 3; |
800eeca4 JW |
8060 | } |
8061 | break; | |
8062 | ||
8063 | case 'o': | |
3882b010 | 8064 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
8065 | { |
8066 | dr = &md.out; | |
26b810ce | 8067 | idx = 3; |
800eeca4 JW |
8068 | } |
8069 | break; | |
8070 | ||
8071 | default: | |
8072 | break; | |
8073 | } | |
8074 | ||
26b810ce JB |
8075 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
8076 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 8077 | { |
26b810ce JB |
8078 | unsigned long regnum; |
8079 | ||
542d6675 | 8080 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
8081 | regnum = strtoul (name + idx, &end, 10); |
8082 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 8083 | { |
26b810ce | 8084 | if (regnum >= dr->num_regs) |
800eeca4 JW |
8085 | { |
8086 | if (!dr->num_regs) | |
ad4b42b4 | 8087 | as_bad (_("No current frame")); |
800eeca4 | 8088 | else |
ad4b42b4 | 8089 | as_bad (_("Register number out of range 0..%u"), |
542d6675 | 8090 | dr->num_regs - 1); |
800eeca4 JW |
8091 | regnum = 0; |
8092 | } | |
8093 | e->X_op = O_register; | |
8094 | e->X_add_number = dr->base + regnum; | |
8095 | return 1; | |
8096 | } | |
8097 | } | |
8098 | ||
20b36a95 JB |
8099 | end = alloca (strlen (name) + 1); |
8100 | strcpy (end, name); | |
8101 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8102 | if ((dr = hash_find (md.dynreg_hash, name))) |
8103 | { | |
8104 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8105 | Store the base register number in the low 16 bits of |
8106 | X_add_number and the size of the register set in the top 16 | |
8107 | bits. */ | |
800eeca4 JW |
8108 | e->X_op = O_register; |
8109 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8110 | return 1; | |
8111 | } | |
8112 | return 0; | |
8113 | } | |
8114 | ||
8115 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8116 | ||
8117 | char * | |
5a49b8ac | 8118 | ia64_canonicalize_symbol_name (char *name) |
800eeca4 | 8119 | { |
20b36a95 JB |
8120 | size_t len = strlen (name), full = len; |
8121 | ||
8122 | while (len > 0 && name[len - 1] == '#') | |
8123 | --len; | |
8124 | if (len <= 0) | |
8125 | { | |
8126 | if (full > 0) | |
ad4b42b4 | 8127 | as_bad (_("Standalone `#' is illegal")); |
20b36a95 JB |
8128 | } |
8129 | else if (len < full - 1) | |
ad4b42b4 | 8130 | as_warn (_("Redundant `#' suffix operators")); |
20b36a95 | 8131 | name[len] = '\0'; |
800eeca4 JW |
8132 | return name; |
8133 | } | |
8134 | ||
3e37788f JW |
8135 | /* Return true if idesc is a conditional branch instruction. This excludes |
8136 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8137 | because they always read/write resources regardless of the value of the | |
8138 | qualifying predicate. br.ia must always use p0, and hence is always | |
8139 | taken. Thus this function returns true for branches which can fall | |
8140 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8141 | |
800eeca4 | 8142 | static int |
5a49b8ac | 8143 | is_conditional_branch (struct ia64_opcode *idesc) |
800eeca4 | 8144 | { |
1deb8127 | 8145 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8146 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8147 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8148 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8149 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8150 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8151 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8152 | || idesc->name[2] == 'l' | |
8153 | /* br.cond, br.call, br.clr */ | |
8154 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8155 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8156 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8157 | } |
8158 | ||
8159 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8160 | returns zero. */ |
8161 | ||
800eeca4 | 8162 | static int |
5a49b8ac | 8163 | is_taken_branch (struct ia64_opcode *idesc) |
800eeca4 JW |
8164 | { |
8165 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8166 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8167 | } |
8168 | ||
8169 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8170 | doubt, returns zero. */ |
8171 | ||
800eeca4 | 8172 | static int |
5a49b8ac | 8173 | is_interruption_or_rfi (struct ia64_opcode *idesc) |
800eeca4 JW |
8174 | { |
8175 | if (strcmp (idesc->name, "rfi") == 0) | |
8176 | return 1; | |
8177 | return 0; | |
8178 | } | |
8179 | ||
8180 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8181 | -1 if there is no dependency. */ | |
542d6675 | 8182 | |
800eeca4 | 8183 | static int |
5a49b8ac | 8184 | depends_on (int depind, struct ia64_opcode *idesc) |
800eeca4 JW |
8185 | { |
8186 | int i; | |
8187 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8188 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8189 | { |
542d6675 KH |
8190 | if (depind == DEP (dep->chks[i])) |
8191 | return i; | |
800eeca4 JW |
8192 | } |
8193 | return -1; | |
8194 | } | |
8195 | ||
8196 | /* Determine a set of specific resources used for a particular resource | |
8197 | class. Returns the number of specific resources identified For those | |
8198 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8199 | marked nonspecific. |
800eeca4 JW |
8200 | |
8201 | Meanings of value in 'NOTE': | |
8202 | 1) only read/write when the register number is explicitly encoded in the | |
8203 | insn. | |
8204 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8205 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8206 | 3) general register value is used to specify an indirect register; not |
8207 | determinable statically. | |
8208 | 4) only read the given resource when bits 7:0 of the indirect index | |
8209 | register value does not match the register number of the resource; not | |
8210 | determinable statically. | |
8211 | 5) all rules are implementation specific. | |
8212 | 6) only when both the index specified by the reader and the index specified | |
8213 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8214 | statically. |
800eeca4 | 8215 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8216 | set |
800eeca4 JW |
8217 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8218 | only read when these insns reference FR2-31 | |
8219 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8220 | written when these insns write FR32-127 | |
8221 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8222 | instruction | |
8223 | 11) The target predicates are written independently of PR[qp], but source | |
8224 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8225 | cannot statically be determined, all source registers are marked used. | |
8226 | 12) This insn only reads the specified predicate register when that | |
8227 | register is the PR[qp]. | |
ad4b42b4 | 8228 | 13) This reference to ld-c only applies to the GR whose value is loaded |
197865e8 | 8229 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8230 | 14) The RSE resource includes the implementation-specific RSE internal |
8231 | state resources. At least one (and possibly more) of these resources are | |
8232 | read by each instruction listed in IC:rse-readers. At least one (and | |
8233 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8234 | IC:rse-writers. |
800eeca4 | 8235 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8236 | generate. |
7f3dfb9c L |
8237 | 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and |
8238 | mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up. | |
800eeca4 JW |
8239 | |
8240 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8241 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8242 | */ |
8243 | ||
8244 | #define MAX_SPECS 256 | |
8245 | #define DV_CHK 1 | |
8246 | #define DV_REG 0 | |
8247 | ||
8248 | static int | |
5a49b8ac AM |
8249 | specify_resource (const struct ia64_dependency *dep, |
8250 | struct ia64_opcode *idesc, | |
8251 | /* is this a DV chk or a DV reg? */ | |
8252 | int type, | |
8253 | /* returned specific resources */ | |
8254 | struct rsrc specs[MAX_SPECS], | |
8255 | /* resource note for this insn's usage */ | |
8256 | int note, | |
8257 | /* which execution path to examine */ | |
8258 | int path) | |
800eeca4 JW |
8259 | { |
8260 | int count = 0; | |
8261 | int i; | |
8262 | int rsrc_write = 0; | |
8263 | struct rsrc tmpl; | |
197865e8 | 8264 | |
800eeca4 JW |
8265 | if (dep->mode == IA64_DV_WAW |
8266 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8267 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8268 | rsrc_write = 1; | |
8269 | ||
8270 | /* template for any resources we identify */ | |
8271 | tmpl.dependency = dep; | |
8272 | tmpl.note = note; | |
8273 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8274 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8275 | tmpl.link_to_qp_branch = 1; | |
8276 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8277 | tmpl.mem_offset.offset = 0; |
8278 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8279 | tmpl.specific = 1; |
a66d2bb7 | 8280 | tmpl.index = -1; |
7484b8e6 | 8281 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8282 | tmpl.depind = 0; |
8283 | tmpl.file = NULL; | |
8284 | tmpl.line = 0; | |
8285 | tmpl.path = 0; | |
800eeca4 JW |
8286 | |
8287 | #define UNHANDLED \ | |
8288 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8289 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8290 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8291 | ||
8292 | /* we don't need to track these */ | |
8293 | if (dep->semantics == IA64_DVS_NONE) | |
8294 | return 0; | |
8295 | ||
8296 | switch (dep->specifier) | |
8297 | { | |
8298 | case IA64_RS_AR_K: | |
8299 | if (note == 1) | |
542d6675 KH |
8300 | { |
8301 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8302 | { | |
8303 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8304 | if (regno >= 0 && regno <= 7) | |
8305 | { | |
8306 | specs[count] = tmpl; | |
8307 | specs[count++].index = regno; | |
8308 | } | |
8309 | } | |
8310 | } | |
800eeca4 | 8311 | else if (note == 0) |
542d6675 KH |
8312 | { |
8313 | for (i = 0; i < 8; i++) | |
8314 | { | |
8315 | specs[count] = tmpl; | |
8316 | specs[count++].index = i; | |
8317 | } | |
8318 | } | |
800eeca4 | 8319 | else |
542d6675 KH |
8320 | { |
8321 | UNHANDLED; | |
8322 | } | |
800eeca4 JW |
8323 | break; |
8324 | ||
8325 | case IA64_RS_AR_UNAT: | |
8326 | /* This is a mov =AR or mov AR= instruction. */ | |
8327 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8328 | { | |
8329 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8330 | if (regno == AR_UNAT) | |
8331 | { | |
8332 | specs[count++] = tmpl; | |
8333 | } | |
8334 | } | |
8335 | else | |
8336 | { | |
8337 | /* This is a spill/fill, or other instruction that modifies the | |
8338 | unat register. */ | |
8339 | ||
8340 | /* Unless we can determine the specific bits used, mark the whole | |
8341 | thing; bits 8:3 of the memory address indicate the bit used in | |
8342 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8343 | subset of conflicts. */ | |
8344 | specs[count] = tmpl; | |
8345 | if (md.mem_offset.hint) | |
8346 | { | |
542d6675 KH |
8347 | if (md.debug_dv) |
8348 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8349 | /* The index isn't actually used, just set it to something | |
8350 | approximating the bit index. */ | |
800eeca4 JW |
8351 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8352 | specs[count].mem_offset.hint = 1; | |
8353 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8354 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8355 | } | |
8356 | else | |
8357 | { | |
8358 | specs[count++].specific = 0; | |
8359 | } | |
8360 | } | |
8361 | break; | |
8362 | ||
8363 | case IA64_RS_AR: | |
8364 | if (note == 1) | |
542d6675 KH |
8365 | { |
8366 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8367 | { | |
8368 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8369 | if ((regno >= 8 && regno <= 15) | |
8370 | || (regno >= 20 && regno <= 23) | |
8371 | || (regno >= 31 && regno <= 39) | |
8372 | || (regno >= 41 && regno <= 47) | |
8373 | || (regno >= 67 && regno <= 111)) | |
8374 | { | |
8375 | specs[count] = tmpl; | |
8376 | specs[count++].index = regno; | |
8377 | } | |
8378 | } | |
8379 | } | |
800eeca4 | 8380 | else |
542d6675 KH |
8381 | { |
8382 | UNHANDLED; | |
8383 | } | |
800eeca4 JW |
8384 | break; |
8385 | ||
8386 | case IA64_RS_ARb: | |
8387 | if (note == 1) | |
542d6675 KH |
8388 | { |
8389 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8390 | { | |
8391 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8392 | if ((regno >= 48 && regno <= 63) | |
8393 | || (regno >= 112 && regno <= 127)) | |
8394 | { | |
8395 | specs[count] = tmpl; | |
8396 | specs[count++].index = regno; | |
8397 | } | |
8398 | } | |
8399 | } | |
800eeca4 | 8400 | else if (note == 0) |
542d6675 KH |
8401 | { |
8402 | for (i = 48; i < 64; i++) | |
8403 | { | |
8404 | specs[count] = tmpl; | |
8405 | specs[count++].index = i; | |
8406 | } | |
8407 | for (i = 112; i < 128; i++) | |
8408 | { | |
8409 | specs[count] = tmpl; | |
8410 | specs[count++].index = i; | |
8411 | } | |
8412 | } | |
197865e8 | 8413 | else |
542d6675 KH |
8414 | { |
8415 | UNHANDLED; | |
8416 | } | |
800eeca4 JW |
8417 | break; |
8418 | ||
8419 | case IA64_RS_BR: | |
8420 | if (note != 1) | |
542d6675 KH |
8421 | { |
8422 | UNHANDLED; | |
8423 | } | |
800eeca4 | 8424 | else |
542d6675 KH |
8425 | { |
8426 | if (rsrc_write) | |
8427 | { | |
8428 | for (i = 0; i < idesc->num_outputs; i++) | |
8429 | if (idesc->operands[i] == IA64_OPND_B1 | |
8430 | || idesc->operands[i] == IA64_OPND_B2) | |
8431 | { | |
8432 | specs[count] = tmpl; | |
8433 | specs[count++].index = | |
8434 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8435 | } | |
8436 | } | |
8437 | else | |
8438 | { | |
40449e9f | 8439 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8440 | if (idesc->operands[i] == IA64_OPND_B1 |
8441 | || idesc->operands[i] == IA64_OPND_B2) | |
8442 | { | |
8443 | specs[count] = tmpl; | |
8444 | specs[count++].index = | |
8445 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8446 | } | |
8447 | } | |
8448 | } | |
800eeca4 JW |
8449 | break; |
8450 | ||
8451 | case IA64_RS_CPUID: /* four or more registers */ | |
8452 | if (note == 3) | |
542d6675 KH |
8453 | { |
8454 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8455 | { | |
8456 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8457 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8458 | && KNOWN (regno)) | |
8459 | { | |
8460 | specs[count] = tmpl; | |
8461 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8462 | } | |
8463 | else | |
8464 | { | |
8465 | specs[count] = tmpl; | |
8466 | specs[count++].specific = 0; | |
8467 | } | |
8468 | } | |
8469 | } | |
800eeca4 | 8470 | else |
542d6675 KH |
8471 | { |
8472 | UNHANDLED; | |
8473 | } | |
800eeca4 JW |
8474 | break; |
8475 | ||
8476 | case IA64_RS_DBR: /* four or more registers */ | |
8477 | if (note == 3) | |
542d6675 KH |
8478 | { |
8479 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8480 | { | |
8481 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8482 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8483 | && KNOWN (regno)) | |
8484 | { | |
8485 | specs[count] = tmpl; | |
8486 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8487 | } | |
8488 | else | |
8489 | { | |
8490 | specs[count] = tmpl; | |
8491 | specs[count++].specific = 0; | |
8492 | } | |
8493 | } | |
8494 | } | |
800eeca4 | 8495 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8496 | { |
8497 | specs[count] = tmpl; | |
8498 | specs[count++].specific = 0; | |
8499 | } | |
800eeca4 | 8500 | else |
542d6675 KH |
8501 | { |
8502 | UNHANDLED; | |
8503 | } | |
800eeca4 JW |
8504 | break; |
8505 | ||
8506 | case IA64_RS_IBR: /* four or more registers */ | |
8507 | if (note == 3) | |
542d6675 KH |
8508 | { |
8509 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8510 | { | |
8511 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8512 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8513 | && KNOWN (regno)) | |
8514 | { | |
8515 | specs[count] = tmpl; | |
8516 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8517 | } | |
8518 | else | |
8519 | { | |
8520 | specs[count] = tmpl; | |
8521 | specs[count++].specific = 0; | |
8522 | } | |
8523 | } | |
8524 | } | |
800eeca4 | 8525 | else |
542d6675 KH |
8526 | { |
8527 | UNHANDLED; | |
8528 | } | |
800eeca4 JW |
8529 | break; |
8530 | ||
8531 | case IA64_RS_MSR: | |
8532 | if (note == 5) | |
8533 | { | |
8534 | /* These are implementation specific. Force all references to | |
8535 | conflict with all other references. */ | |
8536 | specs[count] = tmpl; | |
8537 | specs[count++].specific = 0; | |
8538 | } | |
8539 | else | |
8540 | { | |
8541 | UNHANDLED; | |
8542 | } | |
8543 | break; | |
8544 | ||
8545 | case IA64_RS_PKR: /* 16 or more registers */ | |
8546 | if (note == 3 || note == 4) | |
542d6675 KH |
8547 | { |
8548 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8549 | { | |
8550 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8551 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8552 | && KNOWN (regno)) | |
8553 | { | |
8554 | if (note == 3) | |
8555 | { | |
8556 | specs[count] = tmpl; | |
8557 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8558 | } | |
8559 | else | |
8560 | for (i = 0; i < NELEMS (gr_values); i++) | |
8561 | { | |
8562 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8563 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8564 | { |
8565 | specs[count] = tmpl; | |
8566 | specs[count++].index = i; | |
8567 | } | |
8568 | } | |
8569 | } | |
8570 | else | |
8571 | { | |
8572 | specs[count] = tmpl; | |
8573 | specs[count++].specific = 0; | |
8574 | } | |
8575 | } | |
8576 | } | |
8577 | else if (note == 0) | |
8578 | { | |
8579 | /* probe et al. */ | |
8580 | specs[count] = tmpl; | |
8581 | specs[count++].specific = 0; | |
8582 | } | |
8583 | break; | |
8584 | ||
8585 | case IA64_RS_PMC: /* four or more registers */ | |
8586 | if (note == 3) | |
8587 | { | |
8588 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8589 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8590 | ||
8591 | { | |
91d6fa6a NC |
8592 | int reg_index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) |
8593 | ? 1 : !rsrc_write); | |
8594 | int regno = CURR_SLOT.opnd[reg_index].X_add_number - REG_GR; | |
542d6675 KH |
8595 | if (regno >= 0 && regno < NELEMS (gr_values) |
8596 | && KNOWN (regno)) | |
8597 | { | |
8598 | specs[count] = tmpl; | |
8599 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8600 | } | |
8601 | else | |
8602 | { | |
8603 | specs[count] = tmpl; | |
8604 | specs[count++].specific = 0; | |
8605 | } | |
8606 | } | |
8607 | } | |
8608 | else | |
8609 | { | |
8610 | UNHANDLED; | |
8611 | } | |
800eeca4 JW |
8612 | break; |
8613 | ||
8614 | case IA64_RS_PMD: /* four or more registers */ | |
8615 | if (note == 3) | |
542d6675 KH |
8616 | { |
8617 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8618 | { | |
8619 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8620 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8621 | && KNOWN (regno)) | |
8622 | { | |
8623 | specs[count] = tmpl; | |
8624 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8625 | } | |
8626 | else | |
8627 | { | |
8628 | specs[count] = tmpl; | |
8629 | specs[count++].specific = 0; | |
8630 | } | |
8631 | } | |
8632 | } | |
800eeca4 | 8633 | else |
542d6675 KH |
8634 | { |
8635 | UNHANDLED; | |
8636 | } | |
800eeca4 JW |
8637 | break; |
8638 | ||
8639 | case IA64_RS_RR: /* eight registers */ | |
8640 | if (note == 6) | |
542d6675 KH |
8641 | { |
8642 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8643 | { | |
8644 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8645 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8646 | && KNOWN (regno)) | |
8647 | { | |
8648 | specs[count] = tmpl; | |
8649 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8650 | } | |
8651 | else | |
8652 | { | |
8653 | specs[count] = tmpl; | |
8654 | specs[count++].specific = 0; | |
8655 | } | |
8656 | } | |
8657 | } | |
800eeca4 | 8658 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8659 | { |
8660 | specs[count] = tmpl; | |
8661 | specs[count++].specific = 0; | |
8662 | } | |
197865e8 | 8663 | else |
542d6675 KH |
8664 | { |
8665 | UNHANDLED; | |
8666 | } | |
800eeca4 JW |
8667 | break; |
8668 | ||
8669 | case IA64_RS_CR_IRR: | |
197865e8 | 8670 | if (note == 0) |
542d6675 KH |
8671 | { |
8672 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8673 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8674 | if (rsrc_write | |
8675 | && idesc->operands[1] == IA64_OPND_CR3 | |
8676 | && regno == CR_IVR) | |
8677 | { | |
8678 | for (i = 0; i < 4; i++) | |
8679 | { | |
8680 | specs[count] = tmpl; | |
8681 | specs[count++].index = CR_IRR0 + i; | |
8682 | } | |
8683 | } | |
8684 | } | |
800eeca4 | 8685 | else if (note == 1) |
542d6675 KH |
8686 | { |
8687 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8688 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8689 | && regno >= CR_IRR0 | |
8690 | && regno <= CR_IRR3) | |
8691 | { | |
8692 | specs[count] = tmpl; | |
8693 | specs[count++].index = regno; | |
8694 | } | |
8695 | } | |
800eeca4 | 8696 | else |
542d6675 KH |
8697 | { |
8698 | UNHANDLED; | |
8699 | } | |
800eeca4 JW |
8700 | break; |
8701 | ||
1ca35711 L |
8702 | case IA64_RS_CR_IIB: |
8703 | if (note != 0) | |
8704 | { | |
8705 | UNHANDLED; | |
8706 | } | |
8707 | else | |
8708 | { | |
8709 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8710 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8711 | && (regno == CR_IIB0 || regno == CR_IIB1)) | |
8712 | { | |
8713 | specs[count] = tmpl; | |
8714 | specs[count++].index = regno; | |
8715 | } | |
8716 | } | |
8717 | break; | |
8718 | ||
800eeca4 JW |
8719 | case IA64_RS_CR_LRR: |
8720 | if (note != 1) | |
542d6675 KH |
8721 | { |
8722 | UNHANDLED; | |
8723 | } | |
197865e8 | 8724 | else |
542d6675 KH |
8725 | { |
8726 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8727 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8728 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8729 | { | |
8730 | specs[count] = tmpl; | |
8731 | specs[count++].index = regno; | |
8732 | } | |
8733 | } | |
800eeca4 JW |
8734 | break; |
8735 | ||
8736 | case IA64_RS_CR: | |
8737 | if (note == 1) | |
542d6675 KH |
8738 | { |
8739 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8740 | { | |
8741 | specs[count] = tmpl; | |
8742 | specs[count++].index = | |
8743 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8744 | } | |
8745 | } | |
800eeca4 | 8746 | else |
542d6675 KH |
8747 | { |
8748 | UNHANDLED; | |
8749 | } | |
800eeca4 JW |
8750 | break; |
8751 | ||
b3e14eda L |
8752 | case IA64_RS_DAHR: |
8753 | if (note == 0) | |
8754 | { | |
8755 | if (idesc->operands[!rsrc_write] == IA64_OPND_DAHR3) | |
8756 | { | |
8757 | specs[count] = tmpl; | |
8758 | specs[count++].index = | |
8759 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_DAHR; | |
8760 | } | |
8761 | } | |
8762 | else | |
8763 | { | |
8764 | UNHANDLED; | |
8765 | } | |
8766 | break; | |
8767 | ||
800eeca4 JW |
8768 | case IA64_RS_FR: |
8769 | case IA64_RS_FRb: | |
8770 | if (note != 1) | |
542d6675 KH |
8771 | { |
8772 | UNHANDLED; | |
8773 | } | |
800eeca4 | 8774 | else if (rsrc_write) |
542d6675 KH |
8775 | { |
8776 | if (dep->specifier == IA64_RS_FRb | |
8777 | && idesc->operands[0] == IA64_OPND_F1) | |
8778 | { | |
8779 | specs[count] = tmpl; | |
8780 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8781 | } | |
8782 | } | |
800eeca4 | 8783 | else |
542d6675 KH |
8784 | { |
8785 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8786 | { | |
8787 | if (idesc->operands[i] == IA64_OPND_F2 | |
8788 | || idesc->operands[i] == IA64_OPND_F3 | |
8789 | || idesc->operands[i] == IA64_OPND_F4) | |
8790 | { | |
8791 | specs[count] = tmpl; | |
8792 | specs[count++].index = | |
8793 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8794 | } | |
8795 | } | |
8796 | } | |
800eeca4 JW |
8797 | break; |
8798 | ||
8799 | case IA64_RS_GR: | |
8800 | if (note == 13) | |
542d6675 KH |
8801 | { |
8802 | /* This reference applies only to the GR whose value is loaded with | |
8803 | data returned from memory. */ | |
8804 | specs[count] = tmpl; | |
8805 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8806 | } | |
800eeca4 | 8807 | else if (note == 1) |
542d6675 KH |
8808 | { |
8809 | if (rsrc_write) | |
8810 | { | |
8811 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8812 | if (idesc->operands[i] == IA64_OPND_R1 |
8813 | || idesc->operands[i] == IA64_OPND_R2 | |
8814 | || idesc->operands[i] == IA64_OPND_R3) | |
8815 | { | |
8816 | specs[count] = tmpl; | |
197865e8 | 8817 | specs[count++].index = |
50b81f19 JW |
8818 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8819 | } | |
8820 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8821 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8822 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8823 | { | |
8824 | specs[count] = tmpl; | |
8825 | specs[count++].index = | |
8826 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8827 | } | |
542d6675 KH |
8828 | } |
8829 | else | |
8830 | { | |
8831 | /* Look for anything that reads a GR. */ | |
8832 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8833 | { | |
8834 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8835 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8836 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8837 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8838 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8839 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8840 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8841 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
b3e14eda | 8842 | || idesc->operands[i] == IA64_OPND_DAHR_R3 |
542d6675 KH |
8843 | || idesc->operands[i] == IA64_OPND_RR_R3 |
8844 | || ((i >= idesc->num_outputs) | |
8845 | && (idesc->operands[i] == IA64_OPND_R1 | |
8846 | || idesc->operands[i] == IA64_OPND_R2 | |
8847 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8848 | /* addl source register. */ |
8849 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8850 | { |
8851 | specs[count] = tmpl; | |
8852 | specs[count++].index = | |
8853 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8854 | } | |
8855 | } | |
8856 | } | |
8857 | } | |
197865e8 | 8858 | else |
542d6675 KH |
8859 | { |
8860 | UNHANDLED; | |
8861 | } | |
800eeca4 JW |
8862 | break; |
8863 | ||
139368c9 JW |
8864 | /* This is the same as IA64_RS_PRr, except that the register range is |
8865 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8866 | case IA64_RS_PR: |
8867 | if (note == 0) | |
542d6675 | 8868 | { |
139368c9 | 8869 | for (i = 1; i < 16; i++) |
542d6675 | 8870 | { |
139368c9 JW |
8871 | specs[count] = tmpl; |
8872 | specs[count++].index = i; | |
8873 | } | |
8874 | } | |
8875 | else if (note == 7) | |
8876 | { | |
8877 | valueT mask = 0; | |
8878 | /* Mark only those registers indicated by the mask. */ | |
8879 | if (rsrc_write) | |
8880 | { | |
8881 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8882 | for (i = 1; i < 16; i++) | |
8883 | if (mask & ((valueT) 1 << i)) | |
8884 | { | |
8885 | specs[count] = tmpl; | |
8886 | specs[count++].index = i; | |
8887 | } | |
8888 | } | |
8889 | else | |
8890 | { | |
8891 | UNHANDLED; | |
8892 | } | |
8893 | } | |
8894 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8895 | { | |
8896 | if (rsrc_write) | |
8897 | { | |
8898 | for (i = 0; i < idesc->num_outputs; i++) | |
8899 | { | |
8900 | if (idesc->operands[i] == IA64_OPND_P1 | |
8901 | || idesc->operands[i] == IA64_OPND_P2) | |
8902 | { | |
8903 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8904 | if (regno >= 1 && regno < 16) | |
8905 | { | |
8906 | specs[count] = tmpl; | |
8907 | specs[count++].index = regno; | |
8908 | } | |
8909 | } | |
8910 | } | |
8911 | } | |
8912 | else | |
8913 | { | |
8914 | UNHANDLED; | |
8915 | } | |
8916 | } | |
8917 | else if (note == 12) | |
8918 | { | |
8919 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8920 | { | |
8921 | specs[count] = tmpl; | |
8922 | specs[count++].index = CURR_SLOT.qp_regno; | |
8923 | } | |
8924 | } | |
8925 | else if (note == 1) | |
8926 | { | |
8927 | if (rsrc_write) | |
8928 | { | |
8929 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8930 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8931 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8932 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8933 | |
8934 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8935 | || idesc->operands[0] == IA64_OPND_P2) | |
8936 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8937 | { |
8938 | specs[count] = tmpl; | |
139368c9 JW |
8939 | specs[count].cmp_type = |
8940 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8941 | specs[count++].index = p1; | |
8942 | } | |
8943 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8944 | || idesc->operands[1] == IA64_OPND_P2) | |
8945 | && p2 >= 1 && p2 < 16) | |
8946 | { | |
8947 | specs[count] = tmpl; | |
8948 | specs[count].cmp_type = | |
8949 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8950 | specs[count++].index = p2; | |
542d6675 KH |
8951 | } |
8952 | } | |
8953 | else | |
8954 | { | |
139368c9 | 8955 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8956 | { |
8957 | specs[count] = tmpl; | |
139368c9 JW |
8958 | specs[count++].index = CURR_SLOT.qp_regno; |
8959 | } | |
8960 | if (idesc->operands[1] == IA64_OPND_PR) | |
8961 | { | |
8962 | for (i = 1; i < 16; i++) | |
8963 | { | |
8964 | specs[count] = tmpl; | |
8965 | specs[count++].index = i; | |
8966 | } | |
542d6675 KH |
8967 | } |
8968 | } | |
8969 | } | |
139368c9 JW |
8970 | else |
8971 | { | |
8972 | UNHANDLED; | |
8973 | } | |
8974 | break; | |
8975 | ||
8976 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8977 | simplified cases of this. */ | |
8978 | case IA64_RS_PRr: | |
8979 | if (note == 0) | |
8980 | { | |
8981 | for (i = 16; i < 63; i++) | |
8982 | { | |
8983 | specs[count] = tmpl; | |
8984 | specs[count++].index = i; | |
8985 | } | |
8986 | } | |
800eeca4 | 8987 | else if (note == 7) |
542d6675 KH |
8988 | { |
8989 | valueT mask = 0; | |
8990 | /* Mark only those registers indicated by the mask. */ | |
8991 | if (rsrc_write | |
8992 | && idesc->operands[0] == IA64_OPND_PR) | |
8993 | { | |
8994 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8995 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8996 | for (i = 16; i < 63; i++) |
8997 | { | |
8998 | specs[count] = tmpl; | |
8999 | specs[count++].index = i; | |
9000 | } | |
542d6675 KH |
9001 | } |
9002 | else if (rsrc_write | |
9003 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
9004 | { | |
9005 | for (i = 16; i < 63; i++) | |
9006 | { | |
9007 | specs[count] = tmpl; | |
9008 | specs[count++].index = i; | |
9009 | } | |
9010 | } | |
9011 | else | |
9012 | { | |
9013 | UNHANDLED; | |
9014 | } | |
9015 | } | |
800eeca4 | 9016 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
9017 | { |
9018 | if (rsrc_write) | |
9019 | { | |
9020 | for (i = 0; i < idesc->num_outputs; i++) | |
9021 | { | |
9022 | if (idesc->operands[i] == IA64_OPND_P1 | |
9023 | || idesc->operands[i] == IA64_OPND_P2) | |
9024 | { | |
9025 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 9026 | if (regno >= 16 && regno < 63) |
542d6675 KH |
9027 | { |
9028 | specs[count] = tmpl; | |
9029 | specs[count++].index = regno; | |
9030 | } | |
9031 | } | |
9032 | } | |
9033 | } | |
9034 | else | |
9035 | { | |
9036 | UNHANDLED; | |
9037 | } | |
9038 | } | |
800eeca4 | 9039 | else if (note == 12) |
542d6675 | 9040 | { |
139368c9 | 9041 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9042 | { |
9043 | specs[count] = tmpl; | |
9044 | specs[count++].index = CURR_SLOT.qp_regno; | |
9045 | } | |
9046 | } | |
800eeca4 | 9047 | else if (note == 1) |
542d6675 KH |
9048 | { |
9049 | if (rsrc_write) | |
9050 | { | |
9051 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
9052 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9053 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9054 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9055 | |
542d6675 KH |
9056 | if ((idesc->operands[0] == IA64_OPND_P1 |
9057 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 9058 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
9059 | { |
9060 | specs[count] = tmpl; | |
4a4f25cf | 9061 | specs[count].cmp_type = |
7484b8e6 | 9062 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
9063 | specs[count++].index = p1; |
9064 | } | |
9065 | if ((idesc->operands[1] == IA64_OPND_P1 | |
9066 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 9067 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
9068 | { |
9069 | specs[count] = tmpl; | |
4a4f25cf | 9070 | specs[count].cmp_type = |
7484b8e6 | 9071 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
9072 | specs[count++].index = p2; |
9073 | } | |
9074 | } | |
9075 | else | |
9076 | { | |
139368c9 | 9077 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9078 | { |
9079 | specs[count] = tmpl; | |
9080 | specs[count++].index = CURR_SLOT.qp_regno; | |
9081 | } | |
9082 | if (idesc->operands[1] == IA64_OPND_PR) | |
9083 | { | |
139368c9 | 9084 | for (i = 16; i < 63; i++) |
542d6675 KH |
9085 | { |
9086 | specs[count] = tmpl; | |
9087 | specs[count++].index = i; | |
9088 | } | |
9089 | } | |
9090 | } | |
9091 | } | |
197865e8 | 9092 | else |
542d6675 KH |
9093 | { |
9094 | UNHANDLED; | |
9095 | } | |
800eeca4 JW |
9096 | break; |
9097 | ||
9098 | case IA64_RS_PSR: | |
197865e8 | 9099 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 9100 | dep->regindex. */ |
800eeca4 | 9101 | if (note == 0) |
542d6675 KH |
9102 | { |
9103 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
9104 | { | |
9105 | if (dep->regindex < 6) | |
9106 | { | |
9107 | specs[count++] = tmpl; | |
9108 | } | |
9109 | } | |
9110 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
9111 | { | |
9112 | if (dep->regindex < 32 | |
9113 | || dep->regindex == 35 | |
9114 | || dep->regindex == 36 | |
9115 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
9116 | { | |
9117 | specs[count++] = tmpl; | |
9118 | } | |
9119 | } | |
9120 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
9121 | { | |
9122 | if (dep->regindex < 32 | |
9123 | || dep->regindex == 35 | |
9124 | || dep->regindex == 36 | |
9125 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
9126 | { | |
9127 | specs[count++] = tmpl; | |
9128 | } | |
9129 | } | |
9130 | else | |
9131 | { | |
9132 | /* Several PSR bits have very specific dependencies. */ | |
9133 | switch (dep->regindex) | |
9134 | { | |
9135 | default: | |
9136 | specs[count++] = tmpl; | |
9137 | break; | |
9138 | case PSR_IC: | |
9139 | if (rsrc_write) | |
9140 | { | |
9141 | specs[count++] = tmpl; | |
9142 | } | |
9143 | else | |
9144 | { | |
9145 | /* Only certain CR accesses use PSR.ic */ | |
9146 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9147 | || idesc->operands[1] == IA64_OPND_CR3) | |
9148 | { | |
91d6fa6a | 9149 | int reg_index = |
542d6675 KH |
9150 | ((idesc->operands[0] == IA64_OPND_CR3) |
9151 | ? 0 : 1); | |
9152 | int regno = | |
91d6fa6a | 9153 | CURR_SLOT.opnd[reg_index].X_add_number - REG_CR; |
542d6675 KH |
9154 | |
9155 | switch (regno) | |
9156 | { | |
9157 | default: | |
9158 | break; | |
9159 | case CR_ITIR: | |
9160 | case CR_IFS: | |
9161 | case CR_IIM: | |
9162 | case CR_IIP: | |
9163 | case CR_IPSR: | |
9164 | case CR_ISR: | |
9165 | case CR_IFA: | |
9166 | case CR_IHA: | |
1ca35711 L |
9167 | case CR_IIB0: |
9168 | case CR_IIB1: | |
542d6675 KH |
9169 | case CR_IIPA: |
9170 | specs[count++] = tmpl; | |
9171 | break; | |
9172 | } | |
9173 | } | |
9174 | } | |
9175 | break; | |
9176 | case PSR_CPL: | |
9177 | if (rsrc_write) | |
9178 | { | |
9179 | specs[count++] = tmpl; | |
9180 | } | |
9181 | else | |
9182 | { | |
9183 | /* Only some AR accesses use cpl */ | |
9184 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9185 | || idesc->operands[1] == IA64_OPND_AR3) | |
9186 | { | |
91d6fa6a | 9187 | int reg_index = |
542d6675 KH |
9188 | ((idesc->operands[0] == IA64_OPND_AR3) |
9189 | ? 0 : 1); | |
9190 | int regno = | |
91d6fa6a | 9191 | CURR_SLOT.opnd[reg_index].X_add_number - REG_AR; |
542d6675 KH |
9192 | |
9193 | if (regno == AR_ITC | |
4f8631b1 | 9194 | || regno == AR_RUC |
91d6fa6a | 9195 | || (reg_index == 0 |
4f8631b1 | 9196 | && (regno == AR_RSC |
542d6675 KH |
9197 | || (regno >= AR_K0 |
9198 | && regno <= AR_K7)))) | |
9199 | { | |
9200 | specs[count++] = tmpl; | |
9201 | } | |
9202 | } | |
9203 | else | |
9204 | { | |
9205 | specs[count++] = tmpl; | |
9206 | } | |
9207 | break; | |
9208 | } | |
9209 | } | |
9210 | } | |
9211 | } | |
800eeca4 | 9212 | else if (note == 7) |
542d6675 KH |
9213 | { |
9214 | valueT mask = 0; | |
9215 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9216 | { | |
9217 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9218 | } | |
9219 | else | |
9220 | { | |
9221 | UNHANDLED; | |
9222 | } | |
9223 | if (mask & ((valueT) 1 << dep->regindex)) | |
9224 | { | |
9225 | specs[count++] = tmpl; | |
9226 | } | |
9227 | } | |
800eeca4 | 9228 | else if (note == 8) |
542d6675 KH |
9229 | { |
9230 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9231 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9232 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9233 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9234 | { | |
9235 | if (idesc->operands[i] == IA64_OPND_F1 | |
9236 | || idesc->operands[i] == IA64_OPND_F2 | |
9237 | || idesc->operands[i] == IA64_OPND_F3 | |
9238 | || idesc->operands[i] == IA64_OPND_F4) | |
9239 | { | |
9240 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9241 | if (reg >= min && reg <= max) | |
9242 | { | |
9243 | specs[count++] = tmpl; | |
9244 | } | |
9245 | } | |
9246 | } | |
9247 | } | |
800eeca4 | 9248 | else if (note == 9) |
542d6675 KH |
9249 | { |
9250 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9251 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9252 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9253 | FR2-31 */ | |
9254 | for (i = 0; i < idesc->num_outputs; i++) | |
9255 | { | |
9256 | if (idesc->operands[i] == IA64_OPND_F1) | |
9257 | { | |
9258 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9259 | if (reg >= min && reg <= max) | |
9260 | { | |
9261 | specs[count++] = tmpl; | |
9262 | } | |
9263 | } | |
9264 | } | |
9265 | } | |
800eeca4 | 9266 | else if (note == 10) |
542d6675 KH |
9267 | { |
9268 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9269 | { | |
9270 | if (idesc->operands[i] == IA64_OPND_R1 | |
9271 | || idesc->operands[i] == IA64_OPND_R2 | |
9272 | || idesc->operands[i] == IA64_OPND_R3) | |
9273 | { | |
9274 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9275 | if (regno >= 16 && regno <= 31) | |
9276 | { | |
9277 | specs[count++] = tmpl; | |
9278 | } | |
9279 | } | |
9280 | } | |
9281 | } | |
800eeca4 | 9282 | else |
542d6675 KH |
9283 | { |
9284 | UNHANDLED; | |
9285 | } | |
800eeca4 JW |
9286 | break; |
9287 | ||
9288 | case IA64_RS_AR_FPSR: | |
9289 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9290 | { |
9291 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9292 | if (regno == AR_FPSR) | |
9293 | { | |
9294 | specs[count++] = tmpl; | |
9295 | } | |
9296 | } | |
800eeca4 | 9297 | else |
542d6675 KH |
9298 | { |
9299 | specs[count++] = tmpl; | |
9300 | } | |
800eeca4 JW |
9301 | break; |
9302 | ||
197865e8 | 9303 | case IA64_RS_ARX: |
800eeca4 JW |
9304 | /* Handle all AR[REG] resources */ |
9305 | if (note == 0 || note == 1) | |
542d6675 KH |
9306 | { |
9307 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9308 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9309 | && regno == dep->regindex) | |
9310 | { | |
9311 | specs[count++] = tmpl; | |
9312 | } | |
9313 | /* other AR[REG] resources may be affected by AR accesses */ | |
9314 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9315 | { | |
9316 | /* AR[] writes */ | |
9317 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9318 | switch (dep->regindex) | |
9319 | { | |
9320 | default: | |
9321 | break; | |
9322 | case AR_BSP: | |
9323 | case AR_RNAT: | |
9324 | if (regno == AR_BSPSTORE) | |
9325 | { | |
9326 | specs[count++] = tmpl; | |
9327 | } | |
9328 | case AR_RSC: | |
9329 | if (!rsrc_write && | |
9330 | (regno == AR_BSPSTORE | |
9331 | || regno == AR_RNAT)) | |
9332 | { | |
9333 | specs[count++] = tmpl; | |
9334 | } | |
9335 | break; | |
9336 | } | |
9337 | } | |
9338 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9339 | { | |
9340 | /* AR[] reads */ | |
9341 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9342 | switch (dep->regindex) | |
9343 | { | |
9344 | default: | |
9345 | break; | |
9346 | case AR_RSC: | |
9347 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9348 | { | |
9349 | specs[count++] = tmpl; | |
9350 | } | |
9351 | break; | |
9352 | } | |
9353 | } | |
9354 | else | |
9355 | { | |
9356 | specs[count++] = tmpl; | |
9357 | } | |
9358 | } | |
800eeca4 | 9359 | else |
542d6675 KH |
9360 | { |
9361 | UNHANDLED; | |
9362 | } | |
800eeca4 JW |
9363 | break; |
9364 | ||
9365 | case IA64_RS_CRX: | |
7f3dfb9c L |
9366 | /* Handle all CR[REG] resources. |
9367 | ??? FIXME: The rule 17 isn't really handled correctly. */ | |
9368 | if (note == 0 || note == 1 || note == 17) | |
542d6675 KH |
9369 | { |
9370 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9371 | { | |
9372 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9373 | if (regno == dep->regindex) | |
9374 | { | |
9375 | specs[count++] = tmpl; | |
9376 | } | |
9377 | else if (!rsrc_write) | |
9378 | { | |
9379 | /* Reads from CR[IVR] affect other resources. */ | |
9380 | if (regno == CR_IVR) | |
9381 | { | |
9382 | if ((dep->regindex >= CR_IRR0 | |
9383 | && dep->regindex <= CR_IRR3) | |
9384 | || dep->regindex == CR_TPR) | |
9385 | { | |
9386 | specs[count++] = tmpl; | |
9387 | } | |
9388 | } | |
9389 | } | |
9390 | } | |
9391 | else | |
9392 | { | |
9393 | specs[count++] = tmpl; | |
9394 | } | |
9395 | } | |
800eeca4 | 9396 | else |
542d6675 KH |
9397 | { |
9398 | UNHANDLED; | |
9399 | } | |
800eeca4 JW |
9400 | break; |
9401 | ||
9402 | case IA64_RS_INSERVICE: | |
9403 | /* look for write of EOI (67) or read of IVR (65) */ | |
9404 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9405 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9406 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9407 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9408 | { | |
9409 | specs[count++] = tmpl; | |
9410 | } | |
800eeca4 JW |
9411 | break; |
9412 | ||
9413 | case IA64_RS_GR0: | |
9414 | if (note == 1) | |
542d6675 KH |
9415 | { |
9416 | specs[count++] = tmpl; | |
9417 | } | |
800eeca4 | 9418 | else |
542d6675 KH |
9419 | { |
9420 | UNHANDLED; | |
9421 | } | |
800eeca4 JW |
9422 | break; |
9423 | ||
9424 | case IA64_RS_CFM: | |
9425 | if (note != 2) | |
542d6675 KH |
9426 | { |
9427 | specs[count++] = tmpl; | |
9428 | } | |
800eeca4 | 9429 | else |
542d6675 KH |
9430 | { |
9431 | /* Check if any of the registers accessed are in the rotating region. | |
9432 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9433 | region */ | |
9434 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9435 | { | |
9436 | if (idesc->operands[i] == IA64_OPND_R1 | |
9437 | || idesc->operands[i] == IA64_OPND_R2 | |
9438 | || idesc->operands[i] == IA64_OPND_R3) | |
9439 | { | |
9440 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9441 | /* Assumes that md.rot.num_regs is always valid */ | |
9442 | if (md.rot.num_regs > 0 | |
9443 | && num > 31 | |
9444 | && num < 31 + md.rot.num_regs) | |
9445 | { | |
9446 | specs[count] = tmpl; | |
9447 | specs[count++].specific = 0; | |
9448 | } | |
9449 | } | |
9450 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9451 | || idesc->operands[i] == IA64_OPND_F2 | |
9452 | || idesc->operands[i] == IA64_OPND_F3 | |
9453 | || idesc->operands[i] == IA64_OPND_F4) | |
9454 | { | |
9455 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9456 | if (num > 31) | |
9457 | { | |
9458 | specs[count] = tmpl; | |
9459 | specs[count++].specific = 0; | |
9460 | } | |
9461 | } | |
9462 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9463 | || idesc->operands[i] == IA64_OPND_P2) | |
9464 | { | |
9465 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9466 | if (num > 15) | |
9467 | { | |
9468 | specs[count] = tmpl; | |
9469 | specs[count++].specific = 0; | |
9470 | } | |
9471 | } | |
9472 | } | |
9473 | if (CURR_SLOT.qp_regno > 15) | |
9474 | { | |
9475 | specs[count] = tmpl; | |
9476 | specs[count++].specific = 0; | |
9477 | } | |
9478 | } | |
800eeca4 JW |
9479 | break; |
9480 | ||
139368c9 JW |
9481 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9482 | the fact that there is only one register. */ | |
800eeca4 JW |
9483 | case IA64_RS_PR63: |
9484 | if (note == 0) | |
542d6675 KH |
9485 | { |
9486 | specs[count++] = tmpl; | |
9487 | } | |
139368c9 | 9488 | else if (note == 7) |
40449e9f KH |
9489 | { |
9490 | valueT mask = 0; | |
9491 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9492 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9493 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9494 | specs[count++] = tmpl; |
40449e9f | 9495 | } |
800eeca4 | 9496 | else if (note == 11) |
542d6675 KH |
9497 | { |
9498 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9499 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9500 | || (idesc->operands[1] == IA64_OPND_P2 | |
9501 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9502 | { | |
9503 | specs[count++] = tmpl; | |
9504 | } | |
9505 | } | |
800eeca4 | 9506 | else if (note == 12) |
542d6675 KH |
9507 | { |
9508 | if (CURR_SLOT.qp_regno == 63) | |
9509 | { | |
9510 | specs[count++] = tmpl; | |
9511 | } | |
9512 | } | |
800eeca4 | 9513 | else if (note == 1) |
542d6675 KH |
9514 | { |
9515 | if (rsrc_write) | |
9516 | { | |
40449e9f KH |
9517 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9518 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9519 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9520 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9521 | |
4a4f25cf | 9522 | if (p1 == 63 |
7484b8e6 TW |
9523 | && (idesc->operands[0] == IA64_OPND_P1 |
9524 | || idesc->operands[0] == IA64_OPND_P2)) | |
9525 | { | |
40449e9f | 9526 | specs[count] = tmpl; |
4a4f25cf | 9527 | specs[count++].cmp_type = |
7484b8e6 TW |
9528 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9529 | } | |
9530 | if (p2 == 63 | |
9531 | && (idesc->operands[1] == IA64_OPND_P1 | |
9532 | || idesc->operands[1] == IA64_OPND_P2)) | |
9533 | { | |
40449e9f | 9534 | specs[count] = tmpl; |
4a4f25cf | 9535 | specs[count++].cmp_type = |
7484b8e6 TW |
9536 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9537 | } | |
542d6675 KH |
9538 | } |
9539 | else | |
9540 | { | |
9541 | if (CURR_SLOT.qp_regno == 63) | |
9542 | { | |
9543 | specs[count++] = tmpl; | |
9544 | } | |
9545 | } | |
9546 | } | |
800eeca4 | 9547 | else |
542d6675 KH |
9548 | { |
9549 | UNHANDLED; | |
9550 | } | |
800eeca4 JW |
9551 | break; |
9552 | ||
9553 | case IA64_RS_RSE: | |
9554 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9555 | read resources have not yet been completely identified, so for now |
9556 | treat RSE as a single resource */ | |
800eeca4 | 9557 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9558 | { |
9559 | if (rsrc_write) | |
9560 | { | |
9561 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9562 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9563 | { | |
a66d2bb7 | 9564 | specs[count++] = tmpl; |
542d6675 KH |
9565 | } |
9566 | } | |
9567 | else | |
9568 | { | |
9569 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9570 | { | |
9571 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9572 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9573 | { | |
9574 | specs[count++] = tmpl; | |
9575 | } | |
9576 | } | |
9577 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9578 | { | |
9579 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9580 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9581 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9582 | { | |
9583 | specs[count++] = tmpl; | |
9584 | } | |
9585 | } | |
9586 | } | |
9587 | } | |
197865e8 | 9588 | else |
542d6675 KH |
9589 | { |
9590 | specs[count++] = tmpl; | |
9591 | } | |
800eeca4 JW |
9592 | break; |
9593 | ||
9594 | case IA64_RS_ANY: | |
9595 | /* FIXME -- do any of these need to be non-specific? */ | |
9596 | specs[count++] = tmpl; | |
9597 | break; | |
9598 | ||
9599 | default: | |
9600 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9601 | break; | |
9602 | } | |
9603 | ||
9604 | return count; | |
9605 | } | |
9606 | ||
9607 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9608 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9609 | ||
800eeca4 | 9610 | static void |
5a49b8ac | 9611 | clear_qp_branch_flag (valueT mask) |
800eeca4 JW |
9612 | { |
9613 | int i; | |
542d6675 | 9614 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9615 | { |
197865e8 | 9616 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9617 | if ((bit & mask) != 0) |
542d6675 KH |
9618 | { |
9619 | regdeps[i].link_to_qp_branch = 0; | |
9620 | } | |
800eeca4 JW |
9621 | } |
9622 | } | |
9623 | ||
5e2f6673 L |
9624 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9625 | any mutexes which contain one of the PRs and create new ones when | |
9626 | needed. */ | |
9627 | ||
9628 | static int | |
9629 | update_qp_mutex (valueT mask) | |
9630 | { | |
9631 | int i; | |
9632 | int add = 0; | |
9633 | ||
9634 | i = 0; | |
9635 | while (i < qp_mutexeslen) | |
9636 | { | |
9637 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9638 | { | |
9639 | /* If it destroys and creates the same mutex, do nothing. */ | |
9640 | if (qp_mutexes[i].prmask == mask | |
9641 | && qp_mutexes[i].path == md.path) | |
9642 | { | |
9643 | i++; | |
9644 | add = -1; | |
9645 | } | |
9646 | else | |
9647 | { | |
9648 | int keep = 0; | |
9649 | ||
9650 | if (md.debug_dv) | |
9651 | { | |
9652 | fprintf (stderr, " Clearing mutex relation"); | |
9653 | print_prmask (qp_mutexes[i].prmask); | |
9654 | fprintf (stderr, "\n"); | |
9655 | } | |
9656 | ||
9657 | /* Deal with the old mutex with more than 3+ PRs only if | |
9658 | the new mutex on the same execution path with it. | |
9659 | ||
9660 | FIXME: The 3+ mutex support is incomplete. | |
9661 | dot_pred_rel () may be a better place to fix it. */ | |
9662 | if (qp_mutexes[i].path == md.path) | |
9663 | { | |
9664 | /* If it is a proper subset of the mutex, create a | |
9665 | new mutex. */ | |
9666 | if (add == 0 | |
9667 | && (qp_mutexes[i].prmask & mask) == mask) | |
9668 | add = 1; | |
9669 | ||
9670 | qp_mutexes[i].prmask &= ~mask; | |
9671 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9672 | { | |
9673 | /* Modify the mutex if there are more than one | |
9674 | PR left. */ | |
9675 | keep = 1; | |
9676 | i++; | |
9677 | } | |
9678 | } | |
9679 | ||
9680 | if (keep == 0) | |
9681 | /* Remove the mutex. */ | |
9682 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9683 | } | |
9684 | } | |
9685 | else | |
9686 | ++i; | |
9687 | } | |
9688 | ||
9689 | if (add == 1) | |
9690 | add_qp_mutex (mask); | |
9691 | ||
9692 | return add; | |
9693 | } | |
9694 | ||
197865e8 | 9695 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9696 | |
542d6675 KH |
9697 | Any changes to a PR clears the mutex relations which include that PR. */ |
9698 | ||
800eeca4 | 9699 | static void |
5a49b8ac | 9700 | clear_qp_mutex (valueT mask) |
800eeca4 JW |
9701 | { |
9702 | int i; | |
9703 | ||
9704 | i = 0; | |
9705 | while (i < qp_mutexeslen) | |
9706 | { | |
9707 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9708 | { |
9709 | if (md.debug_dv) | |
9710 | { | |
9711 | fprintf (stderr, " Clearing mutex relation"); | |
9712 | print_prmask (qp_mutexes[i].prmask); | |
9713 | fprintf (stderr, "\n"); | |
9714 | } | |
9715 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9716 | } | |
800eeca4 | 9717 | else |
542d6675 | 9718 | ++i; |
800eeca4 JW |
9719 | } |
9720 | } | |
9721 | ||
9722 | /* Clear implies relations which contain PRs in the given masks. | |
9723 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9724 | indicates the implied PR. */ |
9725 | ||
800eeca4 | 9726 | static void |
5a49b8ac | 9727 | clear_qp_implies (valueT p1_mask, valueT p2_mask) |
800eeca4 JW |
9728 | { |
9729 | int i; | |
9730 | ||
9731 | i = 0; | |
9732 | while (i < qp_implieslen) | |
9733 | { | |
197865e8 | 9734 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9735 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9736 | { | |
9737 | if (md.debug_dv) | |
9738 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9739 | qp_implies[i].p1, qp_implies[i].p2); | |
9740 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9741 | } | |
197865e8 | 9742 | else |
542d6675 | 9743 | ++i; |
800eeca4 JW |
9744 | } |
9745 | } | |
9746 | ||
542d6675 KH |
9747 | /* Add the PRs specified to the list of implied relations. */ |
9748 | ||
800eeca4 | 9749 | static void |
5a49b8ac | 9750 | add_qp_imply (int p1, int p2) |
800eeca4 JW |
9751 | { |
9752 | valueT mask; | |
9753 | valueT bit; | |
9754 | int i; | |
9755 | ||
542d6675 | 9756 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9757 | if (p1 == 0 || p2 == 0) |
9758 | abort (); | |
9759 | ||
9760 | if (p1 == p2) | |
9761 | return; | |
9762 | ||
542d6675 KH |
9763 | /* If it exists already, ignore it. */ |
9764 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9765 | { |
197865e8 | 9766 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9767 | && qp_implies[i].p2 == p2 |
9768 | && qp_implies[i].path == md.path | |
9769 | && !qp_implies[i].p2_branched) | |
9770 | return; | |
800eeca4 JW |
9771 | } |
9772 | ||
9773 | if (qp_implieslen == qp_impliestotlen) | |
9774 | { | |
9775 | qp_impliestotlen += 20; | |
9776 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9777 | xrealloc ((void *) qp_implies, |
9778 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9779 | } |
9780 | if (md.debug_dv) | |
9781 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9782 | qp_implies[qp_implieslen].p1 = p1; | |
9783 | qp_implies[qp_implieslen].p2 = p2; | |
9784 | qp_implies[qp_implieslen].path = md.path; | |
9785 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9786 | ||
9787 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9788 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9789 | as well. */ |
542d6675 | 9790 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9791 | { |
9792 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9793 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9794 | if (qp_implies[i].p2 == p1) |
542d6675 | 9795 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9796 | } |
9797 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9798 | relation containing p2, duplicate it and replace p2 with p1. */ |
9799 | bit = (valueT) 1 << p1; | |
9800 | mask = (valueT) 1 << p2; | |
542d6675 | 9801 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9802 | { |
9803 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9804 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9805 | } |
9806 | } | |
9807 | ||
800eeca4 JW |
9808 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9809 | one of the PRs can be true at any time. PR0 should never be included in | |
9810 | the mask. */ | |
542d6675 | 9811 | |
800eeca4 | 9812 | static void |
5a49b8ac | 9813 | add_qp_mutex (valueT mask) |
800eeca4 JW |
9814 | { |
9815 | if (mask & 0x1) | |
9816 | abort (); | |
9817 | ||
9818 | if (qp_mutexeslen == qp_mutexestotlen) | |
9819 | { | |
9820 | qp_mutexestotlen += 20; | |
9821 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9822 | xrealloc ((void *) qp_mutexes, |
9823 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9824 | } |
9825 | if (md.debug_dv) | |
9826 | { | |
9827 | fprintf (stderr, " Registering mutex on"); | |
9828 | print_prmask (mask); | |
9829 | fprintf (stderr, "\n"); | |
9830 | } | |
9831 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9832 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9833 | } | |
9834 | ||
cb5301b6 | 9835 | static int |
5a49b8ac | 9836 | has_suffix_p (const char *name, const char *suffix) |
cb5301b6 RH |
9837 | { |
9838 | size_t namelen = strlen (name); | |
9839 | size_t sufflen = strlen (suffix); | |
9840 | ||
9841 | if (namelen <= sufflen) | |
9842 | return 0; | |
9843 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9844 | } | |
9845 | ||
800eeca4 | 9846 | static void |
5a49b8ac | 9847 | clear_register_values (void) |
800eeca4 JW |
9848 | { |
9849 | int i; | |
9850 | if (md.debug_dv) | |
9851 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9852 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9853 | gr_values[i].known = 0; |
9854 | } | |
9855 | ||
9856 | /* Keep track of register values/changes which affect DV tracking. | |
9857 | ||
9858 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9859 | have to examine a group of strings to identify them. */ |
800eeca4 | 9860 | |
800eeca4 | 9861 | static void |
5a49b8ac | 9862 | note_register_values (struct ia64_opcode *idesc) |
800eeca4 JW |
9863 | { |
9864 | valueT qp_changemask = 0; | |
9865 | int i; | |
9866 | ||
542d6675 KH |
9867 | /* Invalidate values for registers being written to. */ |
9868 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9869 | { |
197865e8 | 9870 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9871 | || idesc->operands[i] == IA64_OPND_R2 |
9872 | || idesc->operands[i] == IA64_OPND_R3) | |
9873 | { | |
9874 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9875 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9876 | gr_values[regno].known = 0; | |
9877 | } | |
50b81f19 JW |
9878 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9879 | { | |
9880 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9881 | if (regno > 0 && regno < 4) | |
9882 | gr_values[regno].known = 0; | |
9883 | } | |
197865e8 | 9884 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9885 | || idesc->operands[i] == IA64_OPND_P2) |
9886 | { | |
9887 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9888 | qp_changemask |= (valueT) 1 << regno; | |
9889 | } | |
800eeca4 | 9890 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9891 | { |
9892 | if (idesc->operands[2] & (valueT) 0x10000) | |
9893 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9894 | else | |
9895 | qp_changemask = idesc->operands[2]; | |
9896 | break; | |
9897 | } | |
800eeca4 | 9898 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9899 | { |
9900 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9901 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9902 | else |
9903 | qp_changemask = idesc->operands[1]; | |
9904 | qp_changemask &= ~(valueT) 0xFFFF; | |
9905 | break; | |
9906 | } | |
9907 | } | |
9908 | ||
9909 | /* Always clear qp branch flags on any PR change. */ | |
9910 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9911 | clear_qp_branch_flag (qp_changemask); |
9912 | ||
542d6675 | 9913 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9914 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9915 | { | |
197865e8 | 9916 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9917 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9918 | { |
9919 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9920 | gr_values[i].known = 0; | |
9921 | } | |
800eeca4 JW |
9922 | clear_qp_mutex (qp_changemask); |
9923 | clear_qp_implies (qp_changemask, qp_changemask); | |
9924 | } | |
542d6675 KH |
9925 | /* After a call, all register values are undefined, except those marked |
9926 | as "safe". */ | |
800eeca4 | 9927 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9928 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9929 | { |
56d27c17 | 9930 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9931 | clear_register_values (); |
9932 | clear_qp_mutex (~qp_safe_across_calls); | |
9933 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9934 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9935 | } | |
e9718fe1 | 9936 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9937 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9938 | { |
9939 | clear_register_values (); | |
197865e8 KH |
9940 | clear_qp_mutex (~(valueT) 0); |
9941 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9942 | } |
542d6675 | 9943 | /* Look for mutex and implies relations. */ |
197865e8 | 9944 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9945 | || idesc->operands[0] == IA64_OPND_P2) |
9946 | && (idesc->operands[1] == IA64_OPND_P1 | |
9947 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9948 | { |
9949 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9950 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9951 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9952 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9953 | |
5e2f6673 L |
9954 | /* If both PRs are PR0, we can't really do anything. */ |
9955 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9956 | { |
9957 | if (md.debug_dv) | |
9958 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9959 | } | |
800eeca4 | 9960 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9961 | with the following exceptions. */ |
cb5301b6 RH |
9962 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9963 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9964 | { |
542d6675 KH |
9965 | clear_qp_implies (p2mask, p1mask); |
9966 | } | |
cb5301b6 RH |
9967 | else if (has_suffix_p (idesc->name, ".andcm") |
9968 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9969 | { |
9970 | clear_qp_implies (0, p1mask | p2mask); | |
9971 | } | |
cb5301b6 RH |
9972 | else if (has_suffix_p (idesc->name, ".orcm") |
9973 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9974 | { |
9975 | clear_qp_mutex (p1mask | p2mask); | |
9976 | clear_qp_implies (p1mask | p2mask, 0); | |
9977 | } | |
800eeca4 | 9978 | else |
542d6675 | 9979 | { |
5e2f6673 L |
9980 | int added = 0; |
9981 | ||
542d6675 | 9982 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9983 | |
9984 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9985 | if (p1 == 0 || p2 == 0) | |
9986 | clear_qp_mutex (p1mask | p2mask); | |
9987 | else | |
9988 | added = update_qp_mutex (p1mask | p2mask); | |
9989 | ||
9990 | if (CURR_SLOT.qp_regno == 0 | |
9991 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9992 | { |
5e2f6673 L |
9993 | if (added == 0 && p1 && p2) |
9994 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9995 | if (CURR_SLOT.qp_regno != 0) |
9996 | { | |
5e2f6673 L |
9997 | if (p1) |
9998 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9999 | if (p2) | |
10000 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
10001 | } |
10002 | } | |
542d6675 KH |
10003 | } |
10004 | } | |
10005 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 10006 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
10007 | && (idesc->operands[1] == IA64_OPND_IMM22 |
10008 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 10009 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
10010 | && (strcmp (idesc->name, "mov") == 0 |
10011 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
10012 | { |
10013 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
10014 | if (regno > 0 && regno < NELEMS (gr_values)) |
10015 | { | |
10016 | gr_values[regno].known = 1; | |
10017 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
10018 | gr_values[regno].path = md.path; | |
10019 | if (md.debug_dv) | |
2434f565 JW |
10020 | { |
10021 | fprintf (stderr, " Know gr%d = ", regno); | |
10022 | fprintf_vma (stderr, gr_values[regno].value); | |
10023 | fputs ("\n", stderr); | |
10024 | } | |
542d6675 | 10025 | } |
800eeca4 | 10026 | } |
a66d2bb7 JB |
10027 | /* Look for dep.z imm insns. */ |
10028 | else if (idesc->operands[0] == IA64_OPND_R1 | |
10029 | && idesc->operands[1] == IA64_OPND_IMM8 | |
10030 | && strcmp (idesc->name, "dep.z") == 0) | |
10031 | { | |
10032 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
10033 | if (regno > 0 && regno < NELEMS (gr_values)) | |
10034 | { | |
10035 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
10036 | ||
10037 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
10038 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
10039 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
10040 | gr_values[regno].known = 1; | |
10041 | gr_values[regno].value = value; | |
10042 | gr_values[regno].path = md.path; | |
10043 | if (md.debug_dv) | |
10044 | { | |
10045 | fprintf (stderr, " Know gr%d = ", regno); | |
10046 | fprintf_vma (stderr, gr_values[regno].value); | |
10047 | fputs ("\n", stderr); | |
10048 | } | |
10049 | } | |
10050 | } | |
197865e8 | 10051 | else |
800eeca4 JW |
10052 | { |
10053 | clear_qp_mutex (qp_changemask); | |
10054 | clear_qp_implies (qp_changemask, qp_changemask); | |
10055 | } | |
10056 | } | |
10057 | ||
542d6675 KH |
10058 | /* Return whether the given predicate registers are currently mutex. */ |
10059 | ||
800eeca4 | 10060 | static int |
5a49b8ac | 10061 | qp_mutex (int p1, int p2, int path) |
800eeca4 JW |
10062 | { |
10063 | int i; | |
10064 | valueT mask; | |
10065 | ||
10066 | if (p1 != p2) | |
10067 | { | |
542d6675 KH |
10068 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
10069 | for (i = 0; i < qp_mutexeslen; i++) | |
10070 | { | |
10071 | if (qp_mutexes[i].path >= path | |
10072 | && (qp_mutexes[i].prmask & mask) == mask) | |
10073 | return 1; | |
10074 | } | |
800eeca4 JW |
10075 | } |
10076 | return 0; | |
10077 | } | |
10078 | ||
10079 | /* Return whether the given resource is in the given insn's list of chks | |
10080 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
10081 | conflict. */ |
10082 | ||
800eeca4 | 10083 | static int |
5a49b8ac AM |
10084 | resources_match (struct rsrc *rs, |
10085 | struct ia64_opcode *idesc, | |
10086 | int note, | |
10087 | int qp_regno, | |
10088 | int path) | |
800eeca4 JW |
10089 | { |
10090 | struct rsrc specs[MAX_SPECS]; | |
10091 | int count; | |
10092 | ||
10093 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
10094 | we don't need to check. One exception is note 11, which indicates that | |
10095 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 10096 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
10097 | && note != 11) |
10098 | return 0; | |
10099 | ||
10100 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
10101 | while (count-- > 0) | |
10102 | { | |
10103 | /* UNAT checking is a bit more specific than other resources */ | |
10104 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
10105 | && specs[count].mem_offset.hint |
10106 | && rs->mem_offset.hint) | |
10107 | { | |
10108 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
10109 | { | |
10110 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
10111 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
10112 | return 1; | |
10113 | else | |
10114 | continue; | |
10115 | } | |
10116 | } | |
800eeca4 | 10117 | |
7484b8e6 | 10118 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 10119 | writes are an OR. */ |
7484b8e6 | 10120 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 10121 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
10122 | || rs->dependency->specifier == IA64_RS_PR63) |
10123 | { | |
10124 | if (specs[count].cmp_type != CMP_NONE | |
10125 | && specs[count].cmp_type == rs->cmp_type) | |
10126 | { | |
10127 | if (md.debug_dv) | |
10128 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10129 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10130 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10131 | specs[count].index : 63); |
10132 | continue; | |
10133 | } | |
10134 | if (md.debug_dv) | |
4a4f25cf | 10135 | fprintf (stderr, |
7484b8e6 TW |
10136 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10137 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10138 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10139 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10140 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10141 | specs[count].index : 63); |
4a4f25cf | 10142 | |
7484b8e6 TW |
10143 | } |
10144 | ||
800eeca4 | 10145 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10146 | */ |
800eeca4 | 10147 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10148 | return 2; |
800eeca4 | 10149 | else if (specs[count].index == rs->index) |
542d6675 | 10150 | return 1; |
800eeca4 | 10151 | } |
800eeca4 JW |
10152 | |
10153 | return 0; | |
10154 | } | |
10155 | ||
10156 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10157 | insert a stop to create the break. Update all resource dependencies | |
10158 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10159 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10160 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10161 | instruction. */ |
800eeca4 JW |
10162 | |
10163 | static void | |
5a49b8ac | 10164 | insn_group_break (int insert_stop, int qp_regno, int save_current) |
800eeca4 JW |
10165 | { |
10166 | int i; | |
10167 | ||
10168 | if (insert_stop && md.num_slots_in_use > 0) | |
10169 | PREV_SLOT.end_of_insn_group = 1; | |
10170 | ||
10171 | if (md.debug_dv) | |
10172 | { | |
197865e8 | 10173 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10174 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10175 | if (qp_regno != 0) |
542d6675 | 10176 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10177 | fprintf (stderr, "\n"); |
10178 | } | |
10179 | ||
10180 | i = 0; | |
10181 | while (i < regdepslen) | |
10182 | { | |
10183 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10184 | ||
10185 | if (qp_regno != 0 | |
542d6675 KH |
10186 | && regdeps[i].qp_regno != qp_regno) |
10187 | { | |
10188 | ++i; | |
10189 | continue; | |
10190 | } | |
800eeca4 JW |
10191 | |
10192 | if (save_current | |
542d6675 KH |
10193 | && CURR_SLOT.src_file == regdeps[i].file |
10194 | && CURR_SLOT.src_line == regdeps[i].line) | |
10195 | { | |
10196 | ++i; | |
10197 | continue; | |
10198 | } | |
800eeca4 JW |
10199 | |
10200 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10201 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10202 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10203 | || dep->semantics == IA64_DVS_IMPLIEDF |
10204 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10205 | { | |
10206 | print_dependency ("Removing", i); | |
10207 | regdeps[i] = regdeps[--regdepslen]; | |
10208 | } | |
800eeca4 | 10209 | else |
542d6675 KH |
10210 | { |
10211 | if (dep->semantics == IA64_DVS_DATA | |
10212 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10213 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10214 | { |
10215 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10216 | regdeps[i].insn_srlz = STATE_STOP; | |
10217 | if (regdeps[i].data_srlz == STATE_NONE) | |
10218 | regdeps[i].data_srlz = STATE_STOP; | |
10219 | } | |
10220 | ++i; | |
10221 | } | |
800eeca4 JW |
10222 | } |
10223 | } | |
10224 | ||
542d6675 KH |
10225 | /* Add the given resource usage spec to the list of active dependencies. */ |
10226 | ||
197865e8 | 10227 | static void |
5a49b8ac AM |
10228 | mark_resource (struct ia64_opcode *idesc ATTRIBUTE_UNUSED, |
10229 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED, | |
10230 | struct rsrc *spec, | |
10231 | int depind, | |
10232 | int path) | |
800eeca4 JW |
10233 | { |
10234 | if (regdepslen == regdepstotlen) | |
10235 | { | |
10236 | regdepstotlen += 20; | |
10237 | regdeps = (struct rsrc *) | |
542d6675 | 10238 | xrealloc ((void *) regdeps, |
bc805888 | 10239 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10240 | } |
10241 | ||
10242 | regdeps[regdepslen] = *spec; | |
10243 | regdeps[regdepslen].depind = depind; | |
10244 | regdeps[regdepslen].path = path; | |
10245 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10246 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10247 | ||
10248 | print_dependency ("Adding", regdepslen); | |
10249 | ||
10250 | ++regdepslen; | |
10251 | } | |
10252 | ||
10253 | static void | |
5a49b8ac | 10254 | print_dependency (const char *action, int depind) |
800eeca4 JW |
10255 | { |
10256 | if (md.debug_dv) | |
10257 | { | |
197865e8 | 10258 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10259 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10260 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10261 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10262 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10263 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10264 | { |
10265 | fputs (" ", stderr); | |
10266 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10267 | fputs ("+", stderr); | |
10268 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10269 | } | |
800eeca4 JW |
10270 | fprintf (stderr, "\n"); |
10271 | } | |
10272 | } | |
10273 | ||
10274 | static void | |
5a49b8ac | 10275 | instruction_serialization (void) |
800eeca4 JW |
10276 | { |
10277 | int i; | |
10278 | if (md.debug_dv) | |
10279 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10280 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10281 | if (regdeps[i].insn_srlz == STATE_STOP) |
10282 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10283 | } | |
10284 | ||
10285 | static void | |
5a49b8ac | 10286 | data_serialization (void) |
800eeca4 JW |
10287 | { |
10288 | int i = 0; | |
10289 | if (md.debug_dv) | |
10290 | fprintf (stderr, " Data serialization\n"); | |
10291 | while (i < regdepslen) | |
10292 | { | |
10293 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10294 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10295 | data serialization. This might change with new tables */ | |
10296 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10297 | { | |
10298 | print_dependency ("Removing", i); | |
10299 | regdeps[i] = regdeps[--regdepslen]; | |
10300 | } | |
800eeca4 | 10301 | else |
542d6675 | 10302 | ++i; |
800eeca4 JW |
10303 | } |
10304 | } | |
10305 | ||
542d6675 KH |
10306 | /* Insert stops and serializations as needed to avoid DVs. */ |
10307 | ||
800eeca4 | 10308 | static void |
5a49b8ac | 10309 | remove_marked_resource (struct rsrc *rs) |
800eeca4 JW |
10310 | { |
10311 | switch (rs->dependency->semantics) | |
10312 | { | |
10313 | case IA64_DVS_SPECIFIC: | |
10314 | if (md.debug_dv) | |
10315 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10316 | /* ...fall through... */ |
800eeca4 JW |
10317 | case IA64_DVS_INSTR: |
10318 | if (md.debug_dv) | |
542d6675 | 10319 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10320 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10321 | insn_group_break (1, 0, 0); |
800eeca4 | 10322 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10323 | { |
888a75be | 10324 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10325 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10326 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10327 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10328 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10329 | instruction_serialization (); | |
10330 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10331 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10332 | emit_one_bundle (); | |
888a75be | 10333 | CURR_SLOT = oldslot; |
542d6675 | 10334 | } |
800eeca4 JW |
10335 | insn_group_break (1, 0, 0); |
10336 | break; | |
10337 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10338 | "other" types of DV are eliminated |
10339 | by a data serialization */ | |
800eeca4 JW |
10340 | case IA64_DVS_DATA: |
10341 | if (md.debug_dv) | |
542d6675 | 10342 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10343 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10344 | insn_group_break (1, 0, 0); |
800eeca4 | 10345 | { |
888a75be | 10346 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10347 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10348 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10349 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10350 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10351 | data_serialization (); | |
10352 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10353 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10354 | emit_one_bundle (); | |
888a75be | 10355 | CURR_SLOT = oldslot; |
800eeca4 JW |
10356 | } |
10357 | break; | |
10358 | case IA64_DVS_IMPLIED: | |
10359 | case IA64_DVS_IMPLIEDF: | |
10360 | if (md.debug_dv) | |
542d6675 | 10361 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10362 | insn_group_break (1, 0, 0); |
10363 | break; | |
10364 | default: | |
10365 | break; | |
10366 | } | |
10367 | } | |
10368 | ||
10369 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10370 | list. |
800eeca4 JW |
10371 | |
10372 | The check is run once for each execution path encountered. In this case, | |
10373 | a unique execution path is the sequence of instructions following a code | |
10374 | entry point, e.g. the following has three execution paths, one starting | |
10375 | at L0, one at L1, and one at L2. | |
197865e8 | 10376 | |
800eeca4 JW |
10377 | L0: nop |
10378 | L1: add | |
10379 | L2: add | |
197865e8 | 10380 | br.ret |
800eeca4 | 10381 | */ |
542d6675 | 10382 | |
800eeca4 | 10383 | static void |
5a49b8ac | 10384 | check_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10385 | { |
10386 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10387 | int path; | |
10388 | int i; | |
10389 | ||
10390 | /* Note that the number of marked resources may change within the | |
197865e8 | 10391 | loop if in auto mode. */ |
800eeca4 JW |
10392 | i = 0; |
10393 | while (i < regdepslen) | |
10394 | { | |
10395 | struct rsrc *rs = ®deps[i]; | |
10396 | const struct ia64_dependency *dep = rs->dependency; | |
10397 | int chkind; | |
10398 | int note; | |
10399 | int start_over = 0; | |
10400 | ||
10401 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10402 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10403 | { | |
10404 | ++i; | |
10405 | continue; | |
10406 | } | |
10407 | ||
10408 | note = NOTE (opdeps->chks[chkind]); | |
10409 | ||
10410 | /* Check this resource against each execution path seen thus far. */ | |
10411 | for (path = 0; path <= md.path; path++) | |
10412 | { | |
10413 | int matchtype; | |
10414 | ||
10415 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10416 | if (rs->path < path) | |
10417 | continue; | |
10418 | ||
10419 | /* If the QP for this insn implies a QP which has branched, don't | |
10420 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10421 | useful; what's the point of generating code which will only be | |
10422 | reached if its QP is zero? | |
10423 | This code was specifically inserted to handle the following code, | |
10424 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10425 | ||
10426 | mov r4 = 2 | |
10427 | (p2) br.cond L | |
10428 | (p1) mov r4 = 7 | |
10429 | */ | |
10430 | if (CURR_SLOT.qp_regno != 0) | |
10431 | { | |
10432 | int skip = 0; | |
10433 | int implies; | |
10434 | for (implies = 0; implies < qp_implieslen; implies++) | |
10435 | { | |
10436 | if (qp_implies[implies].path >= path | |
10437 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10438 | && qp_implies[implies].p2_branched) | |
10439 | { | |
10440 | skip = 1; | |
10441 | break; | |
10442 | } | |
10443 | } | |
10444 | if (skip) | |
10445 | continue; | |
10446 | } | |
10447 | ||
10448 | if ((matchtype = resources_match (rs, idesc, note, | |
10449 | CURR_SLOT.qp_regno, path)) != 0) | |
10450 | { | |
10451 | char msg[1024]; | |
10452 | char pathmsg[256] = ""; | |
10453 | char indexmsg[256] = ""; | |
10454 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10455 | ||
10456 | if (path != 0) | |
f9f21a03 L |
10457 | snprintf (pathmsg, sizeof (pathmsg), |
10458 | " when entry is at label '%s'", | |
542d6675 | 10459 | md.entry_labels[path - 1]); |
a66d2bb7 | 10460 | if (matchtype == 1 && rs->index >= 0) |
f9f21a03 L |
10461 | snprintf (indexmsg, sizeof (indexmsg), |
10462 | ", specific resource number is %d", | |
542d6675 | 10463 | rs->index); |
f9f21a03 L |
10464 | snprintf (msg, sizeof (msg), |
10465 | "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
542d6675 KH |
10466 | idesc->name, |
10467 | (certain ? "violates" : "may violate"), | |
10468 | dv_mode[dep->mode], dep->name, | |
10469 | dv_sem[dep->semantics], | |
10470 | pathmsg, indexmsg); | |
10471 | ||
10472 | if (md.explicit_mode) | |
10473 | { | |
10474 | as_warn ("%s", msg); | |
10475 | if (path < md.path) | |
ad4b42b4 | 10476 | as_warn (_("Only the first path encountering the conflict is reported")); |
542d6675 | 10477 | as_warn_where (rs->file, rs->line, |
ad4b42b4 | 10478 | _("This is the location of the conflicting usage")); |
542d6675 KH |
10479 | /* Don't bother checking other paths, to avoid duplicating |
10480 | the same warning */ | |
10481 | break; | |
10482 | } | |
10483 | else | |
10484 | { | |
10485 | if (md.debug_dv) | |
10486 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10487 | ||
10488 | remove_marked_resource (rs); | |
10489 | ||
10490 | /* since the set of dependencies has changed, start over */ | |
10491 | /* FIXME -- since we're removing dvs as we go, we | |
10492 | probably don't really need to start over... */ | |
10493 | start_over = 1; | |
10494 | break; | |
10495 | } | |
10496 | } | |
10497 | } | |
800eeca4 | 10498 | if (start_over) |
542d6675 | 10499 | i = 0; |
800eeca4 | 10500 | else |
542d6675 | 10501 | ++i; |
800eeca4 JW |
10502 | } |
10503 | } | |
10504 | ||
542d6675 KH |
10505 | /* Register new dependencies based on the given opcode. */ |
10506 | ||
800eeca4 | 10507 | static void |
5a49b8ac | 10508 | mark_resources (struct ia64_opcode *idesc) |
800eeca4 JW |
10509 | { |
10510 | int i; | |
10511 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10512 | int add_only_qp_reads = 0; | |
10513 | ||
10514 | /* A conditional branch only uses its resources if it is taken; if it is | |
10515 | taken, we stop following that path. The other branch types effectively | |
10516 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10517 | reads. */ |
800eeca4 JW |
10518 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10519 | { | |
10520 | add_only_qp_reads = 1; | |
10521 | } | |
10522 | ||
10523 | if (md.debug_dv) | |
10524 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10525 | ||
542d6675 | 10526 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10527 | { |
10528 | const struct ia64_dependency *dep; | |
10529 | struct rsrc specs[MAX_SPECS]; | |
10530 | int note; | |
10531 | int path; | |
10532 | int count; | |
197865e8 | 10533 | |
800eeca4 | 10534 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10535 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10536 | |
10537 | if (add_only_qp_reads | |
542d6675 KH |
10538 | && !(dep->mode == IA64_DV_WAR |
10539 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10540 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10541 | || dep->specifier == IA64_RS_PR63))) |
10542 | continue; | |
800eeca4 JW |
10543 | |
10544 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10545 | ||
800eeca4 | 10546 | while (count-- > 0) |
542d6675 KH |
10547 | { |
10548 | mark_resource (idesc, dep, &specs[count], | |
10549 | DEP (opdeps->regs[i]), md.path); | |
10550 | } | |
800eeca4 JW |
10551 | |
10552 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10553 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10554 | switch (dep->specifier) |
542d6675 KH |
10555 | { |
10556 | default: | |
10557 | break; | |
10558 | case IA64_RS_CPUID: | |
10559 | case IA64_RS_DBR: | |
10560 | case IA64_RS_IBR: | |
800eeca4 | 10561 | case IA64_RS_MSR: |
542d6675 KH |
10562 | case IA64_RS_PKR: |
10563 | case IA64_RS_PMC: | |
10564 | case IA64_RS_PMD: | |
10565 | case IA64_RS_RR: | |
10566 | for (path = 0; path < md.path; path++) | |
10567 | { | |
10568 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10569 | while (count-- > 0) | |
10570 | mark_resource (idesc, dep, &specs[count], | |
10571 | DEP (opdeps->regs[i]), path); | |
10572 | } | |
10573 | break; | |
10574 | } | |
10575 | } | |
10576 | } | |
10577 | ||
10578 | /* Remove dependencies when they no longer apply. */ | |
10579 | ||
800eeca4 | 10580 | static void |
5a49b8ac | 10581 | update_dependencies (struct ia64_opcode *idesc) |
800eeca4 JW |
10582 | { |
10583 | int i; | |
10584 | ||
10585 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10586 | { | |
10587 | instruction_serialization (); | |
10588 | } | |
10589 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10590 | { | |
10591 | data_serialization (); | |
10592 | } | |
10593 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10594 | || is_taken_branch (idesc)) |
800eeca4 | 10595 | { |
542d6675 KH |
10596 | /* Although technically the taken branch doesn't clear dependencies |
10597 | which require a srlz.[id], we don't follow the branch; the next | |
10598 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10599 | regdepslen = 0; |
800eeca4 JW |
10600 | md.path = 0; |
10601 | } | |
10602 | else if (is_conditional_branch (idesc) | |
542d6675 | 10603 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10604 | { |
10605 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10606 | ||
542d6675 KH |
10607 | for (i = 0; i < qp_implieslen; i++) |
10608 | { | |
10609 | /* If the conditional branch's predicate is implied by the predicate | |
10610 | in an existing dependency, remove that dependency. */ | |
10611 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10612 | { | |
10613 | int depind = 0; | |
10614 | /* Note that this implied predicate takes a branch so that if | |
10615 | a later insn generates a DV but its predicate implies this | |
10616 | one, we can avoid the false DV warning. */ | |
10617 | qp_implies[i].p2_branched = 1; | |
10618 | while (depind < regdepslen) | |
10619 | { | |
10620 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10621 | { | |
10622 | print_dependency ("Removing", depind); | |
10623 | regdeps[depind] = regdeps[--regdepslen]; | |
10624 | } | |
10625 | else | |
10626 | ++depind; | |
10627 | } | |
10628 | } | |
10629 | } | |
800eeca4 | 10630 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10631 | cleared, provided that the QP hasn't been modified between the |
10632 | marking instruction and the branch. */ | |
800eeca4 | 10633 | if (is_call) |
542d6675 KH |
10634 | { |
10635 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10636 | } | |
800eeca4 | 10637 | else |
542d6675 KH |
10638 | { |
10639 | i = 0; | |
10640 | while (i < regdepslen) | |
10641 | { | |
10642 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10643 | && regdeps[i].link_to_qp_branch | |
10644 | && (regdeps[i].file != CURR_SLOT.src_file | |
10645 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10646 | { | |
10647 | /* Treat like a taken branch */ | |
10648 | print_dependency ("Removing", i); | |
10649 | regdeps[i] = regdeps[--regdepslen]; | |
10650 | } | |
10651 | else | |
10652 | ++i; | |
10653 | } | |
10654 | } | |
800eeca4 JW |
10655 | } |
10656 | } | |
10657 | ||
10658 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10659 | |
800eeca4 | 10660 | static int |
5a49b8ac | 10661 | check_dv (struct ia64_opcode *idesc) |
800eeca4 JW |
10662 | { |
10663 | if (md.debug_dv) | |
10664 | { | |
197865e8 | 10665 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10666 | idesc->name, CURR_SLOT.src_line, |
10667 | idesc->dependencies->nchks, | |
10668 | idesc->dependencies->nregs); | |
800eeca4 JW |
10669 | } |
10670 | ||
197865e8 | 10671 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10672 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10673 | check against the specific resources used. */ |
800eeca4 JW |
10674 | check_dependencies (idesc); |
10675 | ||
542d6675 KH |
10676 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10677 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10678 | mark_resources (idesc); |
10679 | ||
10680 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10681 | requirements for being cleared |
10682 | ||
800eeca4 JW |
10683 | Instruction serialization (insns separated by interruption, rfi, or |
10684 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10685 | ||
10686 | Data serialization (instruction serialization, or writer + srlz.d + | |
10687 | reader, where writer and srlz.d are in separate groups) clears | |
10688 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10689 | always be the case). | |
10690 | ||
10691 | Instruction group break (groups separated by stop, taken branch, | |
10692 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10693 | */ | |
10694 | update_dependencies (idesc); | |
10695 | ||
10696 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10697 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10698 | note_register_values (idesc); |
10699 | ||
197865e8 | 10700 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10701 | md.mem_offset.hint = 0; |
10702 | ||
10703 | return 0; | |
10704 | } | |
10705 | ||
10706 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10707 | here. */ | |
10708 | void | |
5a49b8ac | 10709 | md_assemble (char *str) |
800eeca4 JW |
10710 | { |
10711 | char *saved_input_line_pointer, *mnemonic; | |
10712 | const struct pseudo_opcode *pdesc; | |
10713 | struct ia64_opcode *idesc; | |
10714 | unsigned char qp_regno; | |
10715 | unsigned int flags; | |
10716 | int ch; | |
10717 | ||
10718 | saved_input_line_pointer = input_line_pointer; | |
10719 | input_line_pointer = str; | |
10720 | ||
542d6675 | 10721 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10722 | |
10723 | mnemonic = input_line_pointer; | |
10724 | ch = get_symbol_end (); | |
10725 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10726 | if (pdesc) | |
10727 | { | |
10728 | *input_line_pointer = ch; | |
10729 | (*pdesc->handler) (pdesc->arg); | |
10730 | goto done; | |
10731 | } | |
10732 | ||
542d6675 | 10733 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10734 | |
10735 | idesc = ia64_find_opcode (mnemonic); | |
10736 | *input_line_pointer = ch; | |
10737 | if (!idesc) | |
10738 | { | |
ad4b42b4 | 10739 | as_bad (_("Unknown opcode `%s'"), mnemonic); |
800eeca4 JW |
10740 | goto done; |
10741 | } | |
10742 | ||
10743 | idesc = parse_operands (idesc); | |
10744 | if (!idesc) | |
10745 | goto done; | |
10746 | ||
542d6675 | 10747 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10748 | if (idesc->type == IA64_TYPE_DYN) |
10749 | { | |
10750 | if (strcmp (idesc->name, "add") == 0) | |
10751 | { | |
10752 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10753 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10754 | mnemonic = "addl"; | |
10755 | else | |
10756 | mnemonic = "adds"; | |
3d56ab85 | 10757 | ia64_free_opcode (idesc); |
800eeca4 | 10758 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10759 | } |
10760 | else if (strcmp (idesc->name, "mov") == 0) | |
10761 | { | |
10762 | enum ia64_opnd opnd1, opnd2; | |
10763 | int rop; | |
10764 | ||
10765 | opnd1 = idesc->operands[0]; | |
10766 | opnd2 = idesc->operands[1]; | |
10767 | if (opnd1 == IA64_OPND_AR3) | |
10768 | rop = 0; | |
10769 | else if (opnd2 == IA64_OPND_AR3) | |
10770 | rop = 1; | |
10771 | else | |
10772 | abort (); | |
652ca075 L |
10773 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10774 | { | |
10775 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10776 | mnemonic = "mov.i"; | |
97762d08 | 10777 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10778 | mnemonic = "mov.m"; |
97762d08 JB |
10779 | else |
10780 | rop = -1; | |
652ca075 | 10781 | } |
800eeca4 | 10782 | else |
652ca075 | 10783 | abort (); |
97762d08 JB |
10784 | if (rop >= 0) |
10785 | { | |
10786 | ia64_free_opcode (idesc); | |
10787 | idesc = ia64_find_opcode (mnemonic); | |
10788 | while (idesc != NULL | |
10789 | && (idesc->operands[0] != opnd1 | |
10790 | || idesc->operands[1] != opnd2)) | |
10791 | idesc = get_next_opcode (idesc); | |
10792 | } | |
800eeca4 JW |
10793 | } |
10794 | } | |
652ca075 L |
10795 | else if (strcmp (idesc->name, "mov.i") == 0 |
10796 | || strcmp (idesc->name, "mov.m") == 0) | |
10797 | { | |
10798 | enum ia64_opnd opnd1, opnd2; | |
10799 | int rop; | |
10800 | ||
10801 | opnd1 = idesc->operands[0]; | |
10802 | opnd2 = idesc->operands[1]; | |
10803 | if (opnd1 == IA64_OPND_AR3) | |
10804 | rop = 0; | |
10805 | else if (opnd2 == IA64_OPND_AR3) | |
10806 | rop = 1; | |
10807 | else | |
10808 | abort (); | |
10809 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10810 | { | |
10811 | char unit = 'a'; | |
10812 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10813 | unit = 'i'; | |
10814 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10815 | unit = 'm'; | |
10816 | if (unit != 'a' && unit != idesc->name [4]) | |
ad4b42b4 | 10817 | as_bad (_("AR %d can only be accessed by %c-unit"), |
652ca075 L |
10818 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10819 | TOUPPER (unit)); | |
10820 | } | |
10821 | } | |
91d777ee L |
10822 | else if (strcmp (idesc->name, "hint.b") == 0) |
10823 | { | |
10824 | switch (md.hint_b) | |
10825 | { | |
10826 | case hint_b_ok: | |
10827 | break; | |
10828 | case hint_b_warning: | |
ad4b42b4 | 10829 | as_warn (_("hint.b may be treated as nop")); |
91d777ee L |
10830 | break; |
10831 | case hint_b_error: | |
ad4b42b4 | 10832 | as_bad (_("hint.b shouldn't be used")); |
91d777ee L |
10833 | break; |
10834 | } | |
10835 | } | |
800eeca4 JW |
10836 | |
10837 | qp_regno = 0; | |
10838 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10839 | { |
10840 | qp_regno = md.qp.X_add_number - REG_P; | |
10841 | md.qp.X_op = O_absent; | |
10842 | } | |
800eeca4 JW |
10843 | |
10844 | flags = idesc->flags; | |
10845 | ||
10846 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10847 | { |
10848 | /* The alignment frag has to end with a stop bit only if the | |
10849 | next instruction after the alignment directive has to be | |
10850 | the first instruction in an instruction group. */ | |
10851 | if (align_frag) | |
10852 | { | |
10853 | while (align_frag->fr_type != rs_align_code) | |
10854 | { | |
10855 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10856 | if (!align_frag) |
10857 | break; | |
9545c4ce | 10858 | } |
bae25f19 L |
10859 | /* align_frag can be NULL if there are directives in |
10860 | between. */ | |
10861 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10862 | align_frag->tc_frag_data = 1; |
10863 | } | |
10864 | ||
10865 | insn_group_break (1, 0, 0); | |
10866 | } | |
10867 | align_frag = NULL; | |
800eeca4 JW |
10868 | |
10869 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10870 | { | |
ad4b42b4 | 10871 | as_bad (_("`%s' cannot be predicated"), idesc->name); |
800eeca4 JW |
10872 | goto done; |
10873 | } | |
10874 | ||
542d6675 | 10875 | /* Build the instruction. */ |
800eeca4 JW |
10876 | CURR_SLOT.qp_regno = qp_regno; |
10877 | CURR_SLOT.idesc = idesc; | |
10878 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10879 | dwarf2_where (&CURR_SLOT.debug_line); |
661ba50f | 10880 | dwarf2_consume_line_info (); |
800eeca4 | 10881 | |
ba825241 | 10882 | /* Add unwind entries, if there are any. */ |
e0c9811a | 10883 | if (unwind.current_entry) |
800eeca4 | 10884 | { |
e0c9811a JW |
10885 | CURR_SLOT.unwind_record = unwind.current_entry; |
10886 | unwind.current_entry = NULL; | |
800eeca4 | 10887 | } |
ba825241 JB |
10888 | if (unwind.pending_saves) |
10889 | { | |
10890 | if (unwind.pending_saves->next) | |
10891 | { | |
10892 | /* Attach the next pending save to the next slot so that its | |
10893 | slot number will get set correctly. */ | |
10894 | add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); | |
10895 | unwind.pending_saves = &unwind.pending_saves->next->r.record.p; | |
10896 | } | |
10897 | else | |
10898 | unwind.pending_saves = NULL; | |
10899 | } | |
5656b6b8 | 10900 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10901 | unwind.insn = 1; |
800eeca4 | 10902 | |
542d6675 | 10903 | /* Check for dependency violations. */ |
800eeca4 | 10904 | if (md.detect_dv) |
542d6675 | 10905 | check_dv (idesc); |
800eeca4 JW |
10906 | |
10907 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10908 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10909 | emit_one_bundle (); | |
10910 | ||
10911 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10912 | insn_group_break (1, 0, 0); | |
10913 | ||
10914 | md.last_text_seg = now_seg; | |
10915 | ||
10916 | done: | |
10917 | input_line_pointer = saved_input_line_pointer; | |
10918 | } | |
10919 | ||
10920 | /* Called when symbol NAME cannot be found in the symbol table. | |
10921 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10922 | |
10923 | symbolS * | |
5a49b8ac | 10924 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
800eeca4 JW |
10925 | { |
10926 | return 0; | |
10927 | } | |
10928 | ||
10929 | /* Called for any expression that can not be recognized. When the | |
10930 | function is called, `input_line_pointer' will point to the start of | |
10931 | the expression. */ | |
542d6675 | 10932 | |
800eeca4 | 10933 | void |
5a49b8ac | 10934 | md_operand (expressionS *e) |
800eeca4 | 10935 | { |
800eeca4 JW |
10936 | switch (*input_line_pointer) |
10937 | { | |
800eeca4 JW |
10938 | case '[': |
10939 | ++input_line_pointer; | |
60d11e55 | 10940 | expression_and_evaluate (e); |
800eeca4 JW |
10941 | if (*input_line_pointer != ']') |
10942 | { | |
ad4b42b4 | 10943 | as_bad (_("Closing bracket missing")); |
800eeca4 JW |
10944 | goto err; |
10945 | } | |
10946 | else | |
10947 | { | |
6a2375c6 JB |
10948 | if (e->X_op != O_register |
10949 | || e->X_add_number < REG_GR | |
10950 | || e->X_add_number > REG_GR + 127) | |
10951 | { | |
ad4b42b4 | 10952 | as_bad (_("Index must be a general register")); |
6a2375c6 JB |
10953 | e->X_add_number = REG_GR; |
10954 | } | |
800eeca4 JW |
10955 | |
10956 | ++input_line_pointer; | |
10957 | e->X_op = O_index; | |
10958 | } | |
10959 | break; | |
10960 | ||
10961 | default: | |
10962 | break; | |
10963 | } | |
10964 | return; | |
10965 | ||
10966 | err: | |
10967 | ignore_rest_of_line (); | |
10968 | } | |
10969 | ||
10970 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10971 | a section symbol plus some offset. For relocs involving @fptr(), | |
10972 | directives we don't want such adjustments since we need to have the | |
10973 | original symbol's name in the reloc. */ | |
10974 | int | |
5a49b8ac | 10975 | ia64_fix_adjustable (fixS *fix) |
800eeca4 JW |
10976 | { |
10977 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 10978 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
10979 | return 0; |
10980 | ||
10981 | switch (fix->fx_r_type) | |
10982 | { | |
10983 | case BFD_RELOC_IA64_FPTR64I: | |
10984 | case BFD_RELOC_IA64_FPTR32MSB: | |
10985 | case BFD_RELOC_IA64_FPTR32LSB: | |
10986 | case BFD_RELOC_IA64_FPTR64MSB: | |
10987 | case BFD_RELOC_IA64_FPTR64LSB: | |
10988 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10989 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10990 | return 0; | |
10991 | default: | |
10992 | break; | |
10993 | } | |
10994 | ||
10995 | return 1; | |
10996 | } | |
10997 | ||
10998 | int | |
5a49b8ac | 10999 | ia64_force_relocation (fixS *fix) |
800eeca4 JW |
11000 | { |
11001 | switch (fix->fx_r_type) | |
11002 | { | |
11003 | case BFD_RELOC_IA64_FPTR64I: | |
11004 | case BFD_RELOC_IA64_FPTR32MSB: | |
11005 | case BFD_RELOC_IA64_FPTR32LSB: | |
11006 | case BFD_RELOC_IA64_FPTR64MSB: | |
11007 | case BFD_RELOC_IA64_FPTR64LSB: | |
11008 | ||
11009 | case BFD_RELOC_IA64_LTOFF22: | |
11010 | case BFD_RELOC_IA64_LTOFF64I: | |
11011 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11012 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11013 | case BFD_RELOC_IA64_PLTOFF22: | |
11014 | case BFD_RELOC_IA64_PLTOFF64I: | |
11015 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
11016 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
11017 | |
11018 | case BFD_RELOC_IA64_LTOFF22X: | |
11019 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
11020 | return 1; |
11021 | ||
11022 | default: | |
a161fe53 | 11023 | break; |
800eeca4 | 11024 | } |
a161fe53 | 11025 | |
ae6063d4 | 11026 | return generic_force_reloc (fix); |
800eeca4 JW |
11027 | } |
11028 | ||
11029 | /* Decide from what point a pc-relative relocation is relative to, | |
11030 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
11031 | long | |
5a49b8ac | 11032 | ia64_pcrel_from_section (fixS *fix, segT sec) |
800eeca4 JW |
11033 | { |
11034 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 11035 | |
800eeca4 JW |
11036 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
11037 | off &= ~0xfUL; | |
11038 | ||
11039 | return off; | |
11040 | } | |
11041 | ||
6174d9c8 RH |
11042 | |
11043 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
11044 | void | |
11045 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
11046 | { | |
91d6fa6a | 11047 | expressionS exp; |
6174d9c8 | 11048 | |
91d6fa6a NC |
11049 | exp.X_op = O_pseudo_fixup; |
11050 | exp.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
11051 | exp.X_add_number = 0; | |
11052 | exp.X_add_symbol = symbol; | |
11053 | emit_expr (&exp, size); | |
6174d9c8 RH |
11054 | } |
11055 | ||
800eeca4 JW |
11056 | /* This is called whenever some data item (not an instruction) needs a |
11057 | fixup. We pick the right reloc code depending on the byteorder | |
11058 | currently in effect. */ | |
11059 | void | |
5a49b8ac | 11060 | ia64_cons_fix_new (fragS *f, int where, int nbytes, expressionS *exp) |
800eeca4 JW |
11061 | { |
11062 | bfd_reloc_code_real_type code; | |
11063 | fixS *fix; | |
11064 | ||
11065 | switch (nbytes) | |
11066 | { | |
11067 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
11068 | them here since they will work fine as long as the expression | |
11069 | is fully defined at the end of the pass over the source file. */ | |
11070 | case 1: code = BFD_RELOC_8; break; | |
11071 | case 2: code = BFD_RELOC_16; break; | |
11072 | case 4: | |
11073 | if (target_big_endian) | |
11074 | code = BFD_RELOC_IA64_DIR32MSB; | |
11075 | else | |
11076 | code = BFD_RELOC_IA64_DIR32LSB; | |
11077 | break; | |
11078 | ||
11079 | case 8: | |
40449e9f | 11080 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 11081 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
11082 | && exp->X_op_symbol |
11083 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
11084 | && !(md.flags & EF_IA_64_ABI64)) | |
11085 | { | |
11086 | if (target_big_endian) | |
11087 | code = BFD_RELOC_IA64_IPLTMSB; | |
11088 | else | |
11089 | code = BFD_RELOC_IA64_IPLTLSB; | |
11090 | exp->X_op = O_symbol; | |
11091 | break; | |
11092 | } | |
11093 | else | |
11094 | { | |
11095 | if (target_big_endian) | |
11096 | code = BFD_RELOC_IA64_DIR64MSB; | |
11097 | else | |
11098 | code = BFD_RELOC_IA64_DIR64LSB; | |
11099 | break; | |
11100 | } | |
800eeca4 | 11101 | |
3969b680 RH |
11102 | case 16: |
11103 | if (exp->X_op == O_pseudo_fixup | |
11104 | && exp->X_op_symbol | |
11105 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
11106 | { | |
11107 | if (target_big_endian) | |
11108 | code = BFD_RELOC_IA64_IPLTMSB; | |
11109 | else | |
11110 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
11111 | exp->X_op = O_symbol; |
11112 | break; | |
11113 | } | |
11114 | /* FALLTHRU */ | |
11115 | ||
800eeca4 | 11116 | default: |
ad4b42b4 | 11117 | as_bad (_("Unsupported fixup size %d"), nbytes); |
800eeca4 JW |
11118 | ignore_rest_of_line (); |
11119 | return; | |
11120 | } | |
6174d9c8 | 11121 | |
800eeca4 JW |
11122 | if (exp->X_op == O_pseudo_fixup) |
11123 | { | |
800eeca4 JW |
11124 | exp->X_op = O_symbol; |
11125 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11126 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11127 | } |
3969b680 | 11128 | |
800eeca4 JW |
11129 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11130 | /* We need to store the byte order in effect in case we're going | |
11131 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 11132 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
11133 | fix->tc_fix_data.bigendian = target_big_endian; |
11134 | } | |
11135 | ||
11136 | /* Return the actual relocation we wish to associate with the pseudo | |
11137 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11138 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11139 | |
11140 | static bfd_reloc_code_real_type | |
5a49b8ac | 11141 | ia64_gen_real_reloc_type (struct symbol *sym, bfd_reloc_code_real_type r_type) |
800eeca4 | 11142 | { |
d3ce72d0 | 11143 | bfd_reloc_code_real_type newr = 0; |
0ca3e455 | 11144 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11145 | |
11146 | if (sym == NULL) | |
11147 | { | |
11148 | return r_type; | |
11149 | } | |
11150 | ||
11151 | switch (S_GET_VALUE (sym)) | |
11152 | { | |
11153 | case FUNC_FPTR_RELATIVE: | |
11154 | switch (r_type) | |
11155 | { | |
d3ce72d0 NC |
11156 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_FPTR64I; break; |
11157 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_FPTR32MSB; break; | |
11158 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_FPTR32LSB; break; | |
11159 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_FPTR64MSB; break; | |
11160 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11161 | default: type = "FPTR"; break; |
800eeca4 JW |
11162 | } |
11163 | break; | |
11164 | ||
11165 | case FUNC_GP_RELATIVE: | |
11166 | switch (r_type) | |
11167 | { | |
d3ce72d0 NC |
11168 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_GPREL22; break; |
11169 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_GPREL64I; break; | |
11170 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_GPREL32MSB; break; | |
11171 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_GPREL32LSB; break; | |
11172 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_GPREL64MSB; break; | |
11173 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11174 | default: type = "GPREL"; break; |
800eeca4 JW |
11175 | } |
11176 | break; | |
11177 | ||
11178 | case FUNC_LT_RELATIVE: | |
11179 | switch (r_type) | |
11180 | { | |
d3ce72d0 NC |
11181 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22; break; |
11182 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11183 | default: type = "LTOFF"; break; |
800eeca4 JW |
11184 | } |
11185 | break; | |
11186 | ||
fa2c7eff RH |
11187 | case FUNC_LT_RELATIVE_X: |
11188 | switch (r_type) | |
11189 | { | |
d3ce72d0 | 11190 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_LTOFF22X; break; |
0ca3e455 | 11191 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11192 | } |
11193 | break; | |
11194 | ||
c67e42c9 RH |
11195 | case FUNC_PC_RELATIVE: |
11196 | switch (r_type) | |
11197 | { | |
d3ce72d0 NC |
11198 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PCREL22; break; |
11199 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PCREL64I; break; | |
11200 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_PCREL32MSB; break; | |
11201 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_PCREL32LSB; break; | |
11202 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PCREL64MSB; break; | |
11203 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11204 | default: type = "PCREL"; break; |
c67e42c9 RH |
11205 | } |
11206 | break; | |
11207 | ||
800eeca4 JW |
11208 | case FUNC_PLT_RELATIVE: |
11209 | switch (r_type) | |
11210 | { | |
d3ce72d0 NC |
11211 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_PLTOFF22; break; |
11212 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_PLTOFF64I; break; | |
11213 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11214 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11215 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11216 | } |
11217 | break; | |
11218 | ||
11219 | case FUNC_SEC_RELATIVE: | |
11220 | switch (r_type) | |
11221 | { | |
d3ce72d0 NC |
11222 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SECREL32MSB;break; |
11223 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SECREL32LSB;break; | |
11224 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SECREL64MSB;break; | |
11225 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11226 | default: type = "SECREL"; break; |
800eeca4 JW |
11227 | } |
11228 | break; | |
11229 | ||
11230 | case FUNC_SEG_RELATIVE: | |
11231 | switch (r_type) | |
11232 | { | |
d3ce72d0 NC |
11233 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_SEGREL32MSB;break; |
11234 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11235 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11236 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11237 | default: type = "SEGREL"; break; |
800eeca4 JW |
11238 | } |
11239 | break; | |
11240 | ||
11241 | case FUNC_LTV_RELATIVE: | |
11242 | switch (r_type) | |
11243 | { | |
d3ce72d0 NC |
11244 | case BFD_RELOC_IA64_DIR32MSB: newr = BFD_RELOC_IA64_LTV32MSB; break; |
11245 | case BFD_RELOC_IA64_DIR32LSB: newr = BFD_RELOC_IA64_LTV32LSB; break; | |
11246 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_LTV64MSB; break; | |
11247 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11248 | default: type = "LTV"; break; |
800eeca4 JW |
11249 | } |
11250 | break; | |
11251 | ||
11252 | case FUNC_LT_FPTR_RELATIVE: | |
11253 | switch (r_type) | |
11254 | { | |
11255 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11256 | newr = BFD_RELOC_IA64_LTOFF_FPTR22; break; |
800eeca4 | 11257 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11258 | newr = BFD_RELOC_IA64_LTOFF_FPTR64I; break; |
0ca3e455 | 11259 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11260 | newr = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; |
0ca3e455 | 11261 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11262 | newr = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; |
0ca3e455 | 11263 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11264 | newr = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; |
0ca3e455 | 11265 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11266 | newr = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; |
800eeca4 | 11267 | default: |
0ca3e455 | 11268 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11269 | } |
11270 | break; | |
3969b680 | 11271 | |
13ae64f3 JJ |
11272 | case FUNC_TP_RELATIVE: |
11273 | switch (r_type) | |
11274 | { | |
d3ce72d0 NC |
11275 | case BFD_RELOC_IA64_IMM14: newr = BFD_RELOC_IA64_TPREL14; break; |
11276 | case BFD_RELOC_IA64_IMM22: newr = BFD_RELOC_IA64_TPREL22; break; | |
11277 | case BFD_RELOC_IA64_IMM64: newr = BFD_RELOC_IA64_TPREL64I; break; | |
11278 | case BFD_RELOC_IA64_DIR64MSB: newr = BFD_RELOC_IA64_TPREL64MSB; break; | |
11279 | case BFD_RELOC_IA64_DIR64LSB: newr = BFD_RELOC_IA64_TPREL64LSB; break; | |
0ca3e455 | 11280 | default: type = "TPREL"; break; |
13ae64f3 JJ |
11281 | } |
11282 | break; | |
11283 | ||
11284 | case FUNC_LT_TP_RELATIVE: | |
11285 | switch (r_type) | |
11286 | { | |
11287 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11288 | newr = BFD_RELOC_IA64_LTOFF_TPREL22; break; |
13ae64f3 | 11289 | default: |
0ca3e455 JB |
11290 | type = "LTOFF_TPREL"; break; |
11291 | } | |
11292 | break; | |
11293 | ||
11294 | case FUNC_DTP_MODULE: | |
11295 | switch (r_type) | |
11296 | { | |
11297 | case BFD_RELOC_IA64_DIR64MSB: | |
d3ce72d0 | 11298 | newr = BFD_RELOC_IA64_DTPMOD64MSB; break; |
0ca3e455 | 11299 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11300 | newr = BFD_RELOC_IA64_DTPMOD64LSB; break; |
0ca3e455 JB |
11301 | default: |
11302 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11303 | } |
11304 | break; | |
11305 | ||
11306 | case FUNC_LT_DTP_MODULE: | |
11307 | switch (r_type) | |
11308 | { | |
11309 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11310 | newr = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; |
13ae64f3 | 11311 | default: |
0ca3e455 | 11312 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11313 | } |
11314 | break; | |
11315 | ||
11316 | case FUNC_DTP_RELATIVE: | |
11317 | switch (r_type) | |
11318 | { | |
0ca3e455 | 11319 | case BFD_RELOC_IA64_DIR32MSB: |
d3ce72d0 | 11320 | newr = BFD_RELOC_IA64_DTPREL32MSB; break; |
0ca3e455 | 11321 | case BFD_RELOC_IA64_DIR32LSB: |
d3ce72d0 | 11322 | newr = BFD_RELOC_IA64_DTPREL32LSB; break; |
6174d9c8 | 11323 | case BFD_RELOC_IA64_DIR64MSB: |
d3ce72d0 | 11324 | newr = BFD_RELOC_IA64_DTPREL64MSB; break; |
6174d9c8 | 11325 | case BFD_RELOC_IA64_DIR64LSB: |
d3ce72d0 | 11326 | newr = BFD_RELOC_IA64_DTPREL64LSB; break; |
13ae64f3 | 11327 | case BFD_RELOC_IA64_IMM14: |
d3ce72d0 | 11328 | newr = BFD_RELOC_IA64_DTPREL14; break; |
13ae64f3 | 11329 | case BFD_RELOC_IA64_IMM22: |
d3ce72d0 | 11330 | newr = BFD_RELOC_IA64_DTPREL22; break; |
13ae64f3 | 11331 | case BFD_RELOC_IA64_IMM64: |
d3ce72d0 | 11332 | newr = BFD_RELOC_IA64_DTPREL64I; break; |
13ae64f3 | 11333 | default: |
0ca3e455 | 11334 | type = "DTPREL"; break; |
13ae64f3 JJ |
11335 | } |
11336 | break; | |
11337 | ||
11338 | case FUNC_LT_DTP_RELATIVE: | |
11339 | switch (r_type) | |
11340 | { | |
11341 | case BFD_RELOC_IA64_IMM22: | |
d3ce72d0 | 11342 | newr = BFD_RELOC_IA64_LTOFF_DTPREL22; break; |
13ae64f3 | 11343 | default: |
0ca3e455 | 11344 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11345 | } |
11346 | break; | |
11347 | ||
40449e9f | 11348 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11349 | switch (r_type) |
11350 | { | |
11351 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11352 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11353 | default: type = "IPLT"; break; | |
11354 | } | |
40449e9f | 11355 | break; |
1cd8ff38 | 11356 | |
9d0e8497 TG |
11357 | #ifdef TE_VMS |
11358 | case FUNC_SLOTCOUNT_RELOC: | |
11359 | return DUMMY_RELOC_IA64_SLOTCOUNT; | |
11360 | #endif | |
11361 | ||
800eeca4 JW |
11362 | default: |
11363 | abort (); | |
11364 | } | |
6174d9c8 | 11365 | |
d3ce72d0 NC |
11366 | if (newr) |
11367 | return newr; | |
800eeca4 | 11368 | else |
0ca3e455 JB |
11369 | { |
11370 | int width; | |
11371 | ||
11372 | if (!type) | |
11373 | abort (); | |
11374 | switch (r_type) | |
11375 | { | |
11376 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11377 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11378 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11379 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11380 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11381 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11382 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11383 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11384 | default: abort (); | |
11385 | } | |
11386 | ||
11387 | /* This should be an error, but since previously there wasn't any | |
ad4b42b4 NC |
11388 | diagnostic here, don't make it fail because of this for now. */ |
11389 | as_warn (_("Cannot express %s%d%s relocation"), type, width, suffix); | |
0ca3e455 JB |
11390 | return r_type; |
11391 | } | |
800eeca4 JW |
11392 | } |
11393 | ||
11394 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11395 | functions. */ | |
11396 | void | |
5a49b8ac | 11397 | ia64_validate_fix (fixS *fix) |
800eeca4 JW |
11398 | { |
11399 | switch (fix->fx_r_type) | |
11400 | { | |
11401 | case BFD_RELOC_IA64_FPTR64I: | |
11402 | case BFD_RELOC_IA64_FPTR32MSB: | |
11403 | case BFD_RELOC_IA64_FPTR64LSB: | |
11404 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11405 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11406 | if (fix->fx_offset != 0) | |
11407 | as_bad_where (fix->fx_file, fix->fx_line, | |
ad4b42b4 | 11408 | _("No addend allowed in @fptr() relocation")); |
800eeca4 JW |
11409 | break; |
11410 | default: | |
11411 | break; | |
11412 | } | |
800eeca4 JW |
11413 | } |
11414 | ||
11415 | static void | |
5a49b8ac | 11416 | fix_insn (fixS *fix, const struct ia64_operand *odesc, valueT value) |
800eeca4 JW |
11417 | { |
11418 | bfd_vma insn[3], t0, t1, control_bits; | |
11419 | const char *err; | |
11420 | char *fixpos; | |
11421 | long slot; | |
11422 | ||
11423 | slot = fix->fx_where & 0x3; | |
11424 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11425 | ||
c67e42c9 | 11426 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11427 | t0 = bfd_getl64 (fixpos); |
11428 | t1 = bfd_getl64 (fixpos + 8); | |
11429 | control_bits = t0 & 0x1f; | |
11430 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11431 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11432 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11433 | ||
c67e42c9 RH |
11434 | err = NULL; |
11435 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11436 | { |
c67e42c9 RH |
11437 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11438 | insn[2] |= (((value & 0x7f) << 13) | |
11439 | | (((value >> 7) & 0x1ff) << 27) | |
11440 | | (((value >> 16) & 0x1f) << 22) | |
11441 | | (((value >> 21) & 0x1) << 21) | |
11442 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11443 | } |
c67e42c9 RH |
11444 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11445 | { | |
11446 | if (value & ~0x3fffffffffffffffULL) | |
20203fb9 | 11447 | err = _("integer operand out of range"); |
c67e42c9 RH |
11448 | insn[1] = (value >> 21) & 0x1ffffffffffLL; |
11449 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11450 | } | |
11451 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11452 | { | |
11453 | value >>= 4; | |
11454 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11455 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11456 | | (((value >> 0) & 0xfffff) << 13)); | |
11457 | } | |
11458 | else | |
11459 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11460 | ||
11461 | if (err) | |
83cf10fd | 11462 | as_bad_where (fix->fx_file, fix->fx_line, "%s", err); |
800eeca4 JW |
11463 | |
11464 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11465 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11466 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11467 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11468 | } |
11469 | ||
11470 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11471 | ignored; perhaps it was once meaningful, but now it is historical. | |
11472 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11473 | ||
11474 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11475 | (if possible). */ |
94f592af NC |
11476 | |
11477 | void | |
5a49b8ac | 11478 | md_apply_fix (fixS *fix, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
800eeca4 JW |
11479 | { |
11480 | char *fixpos; | |
40449e9f | 11481 | valueT value = *valP; |
800eeca4 JW |
11482 | |
11483 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11484 | ||
11485 | if (fix->fx_pcrel) | |
11486 | { | |
7b347e43 JB |
11487 | switch (fix->fx_r_type) |
11488 | { | |
11489 | case BFD_RELOC_IA64_PCREL21B: break; | |
11490 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11491 | case BFD_RELOC_IA64_PCREL21F: break; | |
11492 | case BFD_RELOC_IA64_PCREL21M: break; | |
11493 | case BFD_RELOC_IA64_PCREL60B: break; | |
11494 | case BFD_RELOC_IA64_PCREL22: break; | |
11495 | case BFD_RELOC_IA64_PCREL64I: break; | |
11496 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11497 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11498 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11499 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11500 | default: | |
11501 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11502 | fix->fx_r_type); | |
11503 | break; | |
11504 | } | |
800eeca4 JW |
11505 | } |
11506 | if (fix->fx_addsy) | |
11507 | { | |
592588f3 | 11508 | switch ((unsigned) fix->fx_r_type) |
800eeca4 | 11509 | { |
00f7efb6 | 11510 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11511 | /* This must be a TAG13 or TAG13b operand. There are no external |
11512 | relocs defined for them, so we must give an error. */ | |
800eeca4 | 11513 | as_bad_where (fix->fx_file, fix->fx_line, |
ad4b42b4 | 11514 | _("%s must have a constant value"), |
800eeca4 | 11515 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); |
fa1cb89c | 11516 | fix->fx_done = 1; |
94f592af | 11517 | return; |
00f7efb6 JJ |
11518 | |
11519 | case BFD_RELOC_IA64_TPREL14: | |
11520 | case BFD_RELOC_IA64_TPREL22: | |
11521 | case BFD_RELOC_IA64_TPREL64I: | |
11522 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11523 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11524 | case BFD_RELOC_IA64_DTPREL14: | |
11525 | case BFD_RELOC_IA64_DTPREL22: | |
11526 | case BFD_RELOC_IA64_DTPREL64I: | |
11527 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11528 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11529 | break; | |
7925dd68 | 11530 | |
9d0e8497 TG |
11531 | #ifdef TE_VMS |
11532 | case DUMMY_RELOC_IA64_SLOTCOUNT: | |
11533 | as_bad_where (fix->fx_file, fix->fx_line, | |
11534 | _("cannot resolve @slotcount parameter")); | |
11535 | fix->fx_done = 1; | |
11536 | return; | |
11537 | #endif | |
11538 | ||
7925dd68 JJ |
11539 | default: |
11540 | break; | |
800eeca4 | 11541 | } |
800eeca4 JW |
11542 | } |
11543 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11544 | { | |
9d0e8497 TG |
11545 | #ifdef TE_VMS |
11546 | if (fix->fx_r_type == DUMMY_RELOC_IA64_SLOTCOUNT) | |
11547 | { | |
11548 | /* For @slotcount, convert an addresses difference to a slots | |
11549 | difference. */ | |
11550 | valueT v; | |
11551 | ||
11552 | v = (value >> 4) * 3; | |
11553 | switch (value & 0x0f) | |
11554 | { | |
11555 | case 0: | |
11556 | case 1: | |
11557 | case 2: | |
11558 | v += value & 0x0f; | |
11559 | break; | |
11560 | case 0x0f: | |
11561 | v += 2; | |
11562 | break; | |
11563 | case 0x0e: | |
11564 | v += 1; | |
11565 | break; | |
11566 | default: | |
11567 | as_bad (_("invalid @slotcount value")); | |
11568 | } | |
11569 | value = v; | |
11570 | } | |
11571 | #endif | |
11572 | ||
800eeca4 JW |
11573 | if (fix->tc_fix_data.bigendian) |
11574 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11575 | else | |
11576 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11577 | fix->fx_done = 1; | |
800eeca4 JW |
11578 | } |
11579 | else | |
11580 | { | |
11581 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11582 | fix->fx_done = 1; | |
800eeca4 | 11583 | } |
800eeca4 JW |
11584 | } |
11585 | ||
11586 | /* Generate the BFD reloc to be stuck in the object file from the | |
11587 | fixup used internally in the assembler. */ | |
542d6675 KH |
11588 | |
11589 | arelent * | |
5a49b8ac | 11590 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp) |
800eeca4 JW |
11591 | { |
11592 | arelent *reloc; | |
11593 | ||
11594 | reloc = xmalloc (sizeof (*reloc)); | |
11595 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11596 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11597 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11598 | reloc->addend = fixp->fx_offset; | |
11599 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11600 | ||
11601 | if (!reloc->howto) | |
11602 | { | |
11603 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ad4b42b4 | 11604 | _("Cannot represent %s relocation in object file"), |
800eeca4 | 11605 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
cf738528 AS |
11606 | free (reloc); |
11607 | return NULL; | |
800eeca4 JW |
11608 | } |
11609 | return reloc; | |
11610 | } | |
11611 | ||
11612 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11613 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11614 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11615 | returned, or NULL on OK. */ |
11616 | ||
11617 | #define MAX_LITTLENUMS 5 | |
11618 | ||
542d6675 | 11619 | char * |
499ac353 | 11620 | md_atof (int type, char *lit, int *size) |
800eeca4 JW |
11621 | { |
11622 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11623 | char *t; |
11624 | int prec; | |
11625 | ||
11626 | switch (type) | |
11627 | { | |
11628 | /* IEEE floats */ | |
11629 | case 'f': | |
11630 | case 'F': | |
11631 | case 's': | |
11632 | case 'S': | |
11633 | prec = 2; | |
11634 | break; | |
11635 | ||
11636 | case 'd': | |
11637 | case 'D': | |
11638 | case 'r': | |
11639 | case 'R': | |
11640 | prec = 4; | |
11641 | break; | |
11642 | ||
11643 | case 'x': | |
11644 | case 'X': | |
11645 | case 'p': | |
11646 | case 'P': | |
11647 | prec = 5; | |
11648 | break; | |
11649 | ||
11650 | default: | |
11651 | *size = 0; | |
499ac353 | 11652 | return _("Unrecognized or unsupported floating point constant"); |
800eeca4 JW |
11653 | } |
11654 | t = atof_ieee (input_line_pointer, type, words); | |
11655 | if (t) | |
11656 | input_line_pointer = t; | |
800eeca4 | 11657 | |
10a98291 L |
11658 | (*ia64_float_to_chars) (lit, words, prec); |
11659 | ||
165a7f90 L |
11660 | if (type == 'X') |
11661 | { | |
11662 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11663 | memset (&lit [10], 0, 6); |
165a7f90 L |
11664 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11665 | } | |
10a98291 L |
11666 | else |
11667 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11668 | ||
499ac353 | 11669 | return NULL; |
800eeca4 JW |
11670 | } |
11671 | ||
800eeca4 JW |
11672 | /* Handle ia64 specific semantics of the align directive. */ |
11673 | ||
0a9ef439 | 11674 | void |
5a49b8ac AM |
11675 | ia64_md_do_align (int n ATTRIBUTE_UNUSED, |
11676 | const char *fill ATTRIBUTE_UNUSED, | |
11677 | int len ATTRIBUTE_UNUSED, | |
11678 | int max ATTRIBUTE_UNUSED) | |
800eeca4 | 11679 | { |
0a9ef439 | 11680 | if (subseg_text_p (now_seg)) |
800eeca4 | 11681 | ia64_flush_insns (); |
0a9ef439 | 11682 | } |
800eeca4 | 11683 | |
0a9ef439 RH |
11684 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11685 | of an rs_align_code fragment. */ | |
800eeca4 | 11686 | |
0a9ef439 | 11687 | void |
5a49b8ac | 11688 | ia64_handle_align (fragS *fragp) |
0a9ef439 | 11689 | { |
0a9ef439 RH |
11690 | int bytes; |
11691 | char *p; | |
91d6fa6a | 11692 | const unsigned char *nop_type; |
0a9ef439 RH |
11693 | |
11694 | if (fragp->fr_type != rs_align_code) | |
11695 | return; | |
11696 | ||
9545c4ce | 11697 | /* Check if this frag has to end with a stop bit. */ |
91d6fa6a | 11698 | nop_type = fragp->tc_frag_data ? le_nop_stop : le_nop; |
9545c4ce | 11699 | |
0a9ef439 RH |
11700 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11701 | p = fragp->fr_literal + fragp->fr_fix; | |
11702 | ||
d9201763 L |
11703 | /* If no paddings are needed, we check if we need a stop bit. */ |
11704 | if (!bytes && fragp->tc_frag_data) | |
11705 | { | |
11706 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11707 | #if 1 |
11708 | /* FIXME: It won't work with | |
11709 | .align 16 | |
11710 | alloc r32=ar.pfs,1,2,4,0 | |
11711 | */ | |
11712 | ; | |
11713 | #else | |
d9201763 L |
11714 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11715 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11716 | #endif |
d9201763 L |
11717 | else |
11718 | /* Bundles are always in little-endian byte order. Make sure | |
11719 | the previous bundle has the stop bit. */ | |
11720 | *(p - 16) |= 1; | |
11721 | } | |
11722 | ||
0a9ef439 RH |
11723 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11724 | putting data into a text section. */ | |
11725 | if (bytes & 15) | |
11726 | { | |
11727 | int fix = bytes & 15; | |
11728 | memset (p, 0, fix); | |
11729 | p += fix; | |
11730 | bytes -= fix; | |
11731 | fragp->fr_fix += fix; | |
800eeca4 JW |
11732 | } |
11733 | ||
012a452b | 11734 | /* Instruction bundles are always little-endian. */ |
91d6fa6a | 11735 | memcpy (p, nop_type, 16); |
0a9ef439 | 11736 | fragp->fr_var = 16; |
800eeca4 | 11737 | } |
10a98291 L |
11738 | |
11739 | static void | |
11740 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11741 | int prec) | |
11742 | { | |
11743 | while (prec--) | |
11744 | { | |
11745 | number_to_chars_bigendian (lit, (long) (*words++), | |
11746 | sizeof (LITTLENUM_TYPE)); | |
11747 | lit += sizeof (LITTLENUM_TYPE); | |
11748 | } | |
11749 | } | |
11750 | ||
11751 | static void | |
11752 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11753 | int prec) | |
11754 | { | |
11755 | while (prec--) | |
11756 | { | |
11757 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11758 | sizeof (LITTLENUM_TYPE)); | |
11759 | lit += sizeof (LITTLENUM_TYPE); | |
11760 | } | |
11761 | } | |
11762 | ||
11763 | void | |
5a49b8ac | 11764 | ia64_elf_section_change_hook (void) |
10a98291 | 11765 | { |
38ce5b11 L |
11766 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11767 | && elf_linked_to_section (now_seg) == NULL) | |
11768 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11769 | dot_byteorder (-1); |
11770 | } | |
a645d1eb L |
11771 | |
11772 | /* Check if a label should be made global. */ | |
11773 | void | |
11774 | ia64_check_label (symbolS *label) | |
11775 | { | |
11776 | if (*input_line_pointer == ':') | |
11777 | { | |
11778 | S_SET_EXTERNAL (label); | |
11779 | input_line_pointer++; | |
11780 | } | |
11781 | } | |
35f5df7f L |
11782 | |
11783 | /* Used to remember where .alias and .secalias directives are seen. We | |
11784 | will rename symbol and section names when we are about to output | |
11785 | the relocatable file. */ | |
11786 | struct alias | |
11787 | { | |
11788 | char *file; /* The file where the directive is seen. */ | |
11789 | unsigned int line; /* The line number the directive is at. */ | |
708587a4 | 11790 | const char *name; /* The original name of the symbol. */ |
35f5df7f L |
11791 | }; |
11792 | ||
11793 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11794 | .secalias. Otherwise, it is .alias. */ | |
11795 | static void | |
11796 | dot_alias (int section) | |
11797 | { | |
11798 | char *name, *alias; | |
11799 | char delim; | |
11800 | char *end_name; | |
11801 | int len; | |
11802 | const char *error_string; | |
11803 | struct alias *h; | |
11804 | const char *a; | |
11805 | struct hash_control *ahash, *nhash; | |
11806 | const char *kind; | |
11807 | ||
11808 | name = input_line_pointer; | |
11809 | delim = get_symbol_end (); | |
11810 | end_name = input_line_pointer; | |
11811 | *end_name = delim; | |
11812 | ||
11813 | if (name == end_name) | |
11814 | { | |
11815 | as_bad (_("expected symbol name")); | |
e4e8248d | 11816 | ignore_rest_of_line (); |
35f5df7f L |
11817 | return; |
11818 | } | |
11819 | ||
11820 | SKIP_WHITESPACE (); | |
11821 | ||
11822 | if (*input_line_pointer != ',') | |
11823 | { | |
11824 | *end_name = 0; | |
11825 | as_bad (_("expected comma after \"%s\""), name); | |
11826 | *end_name = delim; | |
11827 | ignore_rest_of_line (); | |
11828 | return; | |
11829 | } | |
11830 | ||
11831 | input_line_pointer++; | |
11832 | *end_name = 0; | |
20b36a95 | 11833 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11834 | |
11835 | /* We call demand_copy_C_string to check if alias string is valid. | |
11836 | There should be a closing `"' and no `\0' in the string. */ | |
11837 | alias = demand_copy_C_string (&len); | |
11838 | if (alias == NULL) | |
11839 | { | |
11840 | ignore_rest_of_line (); | |
11841 | return; | |
11842 | } | |
11843 | ||
11844 | /* Make a copy of name string. */ | |
11845 | len = strlen (name) + 1; | |
11846 | obstack_grow (¬es, name, len); | |
11847 | name = obstack_finish (¬es); | |
11848 | ||
11849 | if (section) | |
11850 | { | |
11851 | kind = "section"; | |
11852 | ahash = secalias_hash; | |
11853 | nhash = secalias_name_hash; | |
11854 | } | |
11855 | else | |
11856 | { | |
11857 | kind = "symbol"; | |
11858 | ahash = alias_hash; | |
11859 | nhash = alias_name_hash; | |
11860 | } | |
11861 | ||
11862 | /* Check if alias has been used before. */ | |
11863 | h = (struct alias *) hash_find (ahash, alias); | |
11864 | if (h) | |
11865 | { | |
11866 | if (strcmp (h->name, name)) | |
11867 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11868 | alias, kind, h->name); | |
11869 | goto out; | |
11870 | } | |
11871 | ||
11872 | /* Check if name already has an alias. */ | |
11873 | a = (const char *) hash_find (nhash, name); | |
11874 | if (a) | |
11875 | { | |
11876 | if (strcmp (a, alias)) | |
11877 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11878 | goto out; | |
11879 | } | |
11880 | ||
11881 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11882 | as_where (&h->file, &h->line); | |
11883 | h->name = name; | |
11884 | ||
5a49b8ac | 11885 | error_string = hash_jam (ahash, alias, (void *) h); |
35f5df7f L |
11886 | if (error_string) |
11887 | { | |
11888 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11889 | alias, kind, error_string); | |
11890 | goto out; | |
11891 | } | |
11892 | ||
5a49b8ac | 11893 | error_string = hash_jam (nhash, name, (void *) alias); |
35f5df7f L |
11894 | if (error_string) |
11895 | { | |
11896 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11897 | alias, kind, error_string); | |
11898 | out: | |
11899 | obstack_free (¬es, name); | |
11900 | obstack_free (¬es, alias); | |
11901 | } | |
11902 | ||
11903 | demand_empty_rest_of_line (); | |
11904 | } | |
11905 | ||
11906 | /* It renames the original symbol name to its alias. */ | |
11907 | static void | |
5a49b8ac | 11908 | do_alias (const char *alias, void *value) |
35f5df7f L |
11909 | { |
11910 | struct alias *h = (struct alias *) value; | |
11911 | symbolS *sym = symbol_find (h->name); | |
11912 | ||
11913 | if (sym == NULL) | |
01e1a5bc NC |
11914 | { |
11915 | #ifdef TE_VMS | |
11916 | /* Uses .alias extensively to alias CRTL functions to same with | |
11917 | decc$ prefix. Sometimes function gets optimized away and a | |
11918 | warning results, which should be suppressed. */ | |
11919 | if (strncmp (alias, "decc$", 5) != 0) | |
11920 | #endif | |
11921 | as_warn_where (h->file, h->line, | |
11922 | _("symbol `%s' aliased to `%s' is not used"), | |
11923 | h->name, alias); | |
11924 | } | |
35f5df7f L |
11925 | else |
11926 | S_SET_NAME (sym, (char *) alias); | |
11927 | } | |
11928 | ||
11929 | /* Called from write_object_file. */ | |
11930 | void | |
11931 | ia64_adjust_symtab (void) | |
11932 | { | |
11933 | hash_traverse (alias_hash, do_alias); | |
11934 | } | |
11935 | ||
11936 | /* It renames the original section name to its alias. */ | |
11937 | static void | |
5a49b8ac | 11938 | do_secalias (const char *alias, void *value) |
35f5df7f L |
11939 | { |
11940 | struct alias *h = (struct alias *) value; | |
11941 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11942 | ||
11943 | if (sec == NULL) | |
11944 | as_warn_where (h->file, h->line, | |
11945 | _("section `%s' aliased to `%s' is not used"), | |
11946 | h->name, alias); | |
11947 | else | |
11948 | sec->name = alias; | |
11949 | } | |
11950 | ||
11951 | /* Called from write_object_file. */ | |
11952 | void | |
11953 | ia64_frob_file (void) | |
11954 | { | |
11955 | hash_traverse (secalias_hash, do_secalias); | |
11956 | } | |
01e1a5bc NC |
11957 | |
11958 | #ifdef TE_VMS | |
11959 | #define NT_VMS_MHD 1 | |
11960 | #define NT_VMS_LNM 2 | |
11961 | ||
11962 | /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF | |
11963 | .note section. */ | |
11964 | ||
11965 | /* Manufacture a VMS-like time string. */ | |
11966 | static void | |
11967 | get_vms_time (char *Now) | |
11968 | { | |
11969 | char *pnt; | |
11970 | time_t timeb; | |
11971 | ||
11972 | time (&timeb); | |
11973 | pnt = ctime (&timeb); | |
11974 | pnt[3] = 0; | |
11975 | pnt[7] = 0; | |
11976 | pnt[10] = 0; | |
11977 | pnt[16] = 0; | |
11978 | pnt[24] = 0; | |
11979 | sprintf (Now, "%2s-%3s-%s %s", pnt + 8, pnt + 4, pnt + 20, pnt + 11); | |
11980 | } | |
11981 | ||
11982 | void | |
11983 | ia64_vms_note (void) | |
11984 | { | |
11985 | char *p; | |
11986 | asection *seg = now_seg; | |
11987 | subsegT subseg = now_subseg; | |
01e1a5bc | 11988 | asection *secp = NULL; |
a0840211 | 11989 | char *bname; |
01e1a5bc NC |
11990 | char buf [256]; |
11991 | symbolS *sym; | |
11992 | ||
11993 | /* Create the .note section. */ | |
11994 | ||
11995 | secp = subseg_new (".note", 0); | |
11996 | bfd_set_section_flags (stdoutput, | |
11997 | secp, | |
11998 | SEC_HAS_CONTENTS | SEC_READONLY); | |
11999 | ||
37a1f277 | 12000 | /* Module header note (MHD). */ |
a0840211 | 12001 | bname = xstrdup (lbasename (out_file_name)); |
01e1a5bc NC |
12002 | if ((p = strrchr (bname, '.'))) |
12003 | *p = '\0'; | |
37a1f277 TG |
12004 | |
12005 | /* VMS note header is 24 bytes long. */ | |
12006 | p = frag_more (8 + 8 + 8); | |
12007 | number_to_chars_littleendian (p + 0, 8, 8); | |
12008 | number_to_chars_littleendian (p + 8, 40 + strlen (bname), 8); | |
12009 | number_to_chars_littleendian (p + 16, NT_VMS_MHD, 8); | |
01e1a5bc NC |
12010 | |
12011 | p = frag_more (8); | |
12012 | strcpy (p, "IPF/VMS"); | |
12013 | ||
37a1f277 TG |
12014 | p = frag_more (17 + 17 + strlen (bname) + 1 + 5); |
12015 | get_vms_time (p); | |
12016 | strcpy (p + 17, "24-FEB-2005 15:00"); | |
12017 | p += 17 + 17; | |
01e1a5bc | 12018 | strcpy (p, bname); |
37a1f277 | 12019 | p += strlen (bname) + 1; |
a0840211 | 12020 | free (bname); |
01e1a5bc NC |
12021 | strcpy (p, "V1.0"); |
12022 | ||
12023 | frag_align (3, 0, 0); | |
12024 | ||
12025 | /* Language processor name note. */ | |
12026 | sprintf (buf, "GNU assembler version %s (%s) using BFD version %s", | |
12027 | VERSION, TARGET_ALIAS, BFD_VERSION_STRING); | |
12028 | ||
37a1f277 TG |
12029 | p = frag_more (8 + 8 + 8); |
12030 | number_to_chars_littleendian (p + 0, 8, 8); | |
12031 | number_to_chars_littleendian (p + 8, strlen (buf) + 1, 8); | |
12032 | number_to_chars_littleendian (p + 16, NT_VMS_LNM, 8); | |
01e1a5bc NC |
12033 | |
12034 | p = frag_more (8); | |
12035 | strcpy (p, "IPF/VMS"); | |
12036 | ||
12037 | p = frag_more (strlen (buf) + 1); | |
12038 | strcpy (p, buf); | |
12039 | ||
12040 | frag_align (3, 0, 0); | |
12041 | ||
12042 | secp = subseg_new (".vms_display_name_info", 0); | |
12043 | bfd_set_section_flags (stdoutput, | |
12044 | secp, | |
12045 | SEC_HAS_CONTENTS | SEC_READONLY); | |
12046 | ||
12047 | /* This symbol should be passed on the command line and be variable | |
12048 | according to language. */ | |
12049 | sym = symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl", | |
12050 | absolute_section, 0, &zero_address_frag); | |
12051 | symbol_table_insert (sym); | |
12052 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING | BSF_DYNAMIC; | |
12053 | ||
12054 | p = frag_more (4); | |
12055 | /* Format 3 of VMS demangler Spec. */ | |
12056 | number_to_chars_littleendian (p, 3, 4); | |
12057 | ||
12058 | p = frag_more (4); | |
12059 | /* Place holder for symbol table index of above symbol. */ | |
12060 | number_to_chars_littleendian (p, -1, 4); | |
12061 | ||
12062 | frag_align (3, 0, 0); | |
12063 | ||
12064 | /* We probably can't restore the current segment, for there likely | |
12065 | isn't one yet... */ | |
12066 | if (seg && subseg) | |
12067 | subseg_set (seg, subseg); | |
12068 | } | |
12069 | ||
12070 | #endif /* TE_VMS */ |