Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
744b6414 | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 |
d6afba4b | 3 | Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
a66d2bb7 JB |
54 | #ifdef HAVE_LIMITS_H |
55 | #include <limits.h> | |
56 | #endif | |
57 | ||
800eeca4 | 58 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
59 | |
60 | /* Some systems define MIN in, e.g., param.h. */ | |
61 | #undef MIN | |
800eeca4 JW |
62 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
63 | ||
64 | #define NUM_SLOTS 4 | |
65 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
66 | #define CURR_SLOT md.slot[md.curr_slot] | |
67 | ||
68 | #define O_pseudo_fixup (O_max + 1) | |
69 | ||
70 | enum special_section | |
71 | { | |
557debba | 72 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
73 | SPECIAL_SECTION_BSS = 0, |
74 | SPECIAL_SECTION_SBSS, | |
75 | SPECIAL_SECTION_SDATA, | |
76 | SPECIAL_SECTION_RODATA, | |
77 | SPECIAL_SECTION_COMMENT, | |
78 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
79 | SPECIAL_SECTION_UNWIND_INFO, |
80 | /* HPUX specific section pseudo-ops. */ | |
81 | SPECIAL_SECTION_INIT_ARRAY, | |
82 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
83 | }; |
84 | ||
85 | enum reloc_func | |
86 | { | |
13ae64f3 JJ |
87 | FUNC_DTP_MODULE, |
88 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
89 | FUNC_FPTR_RELATIVE, |
90 | FUNC_GP_RELATIVE, | |
91 | FUNC_LT_RELATIVE, | |
fa2c7eff | 92 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 93 | FUNC_PC_RELATIVE, |
800eeca4 JW |
94 | FUNC_PLT_RELATIVE, |
95 | FUNC_SEC_RELATIVE, | |
96 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 97 | FUNC_TP_RELATIVE, |
800eeca4 JW |
98 | FUNC_LTV_RELATIVE, |
99 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
100 | FUNC_LT_DTP_MODULE, |
101 | FUNC_LT_DTP_RELATIVE, | |
102 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 103 | FUNC_IPLT_RELOC, |
800eeca4 JW |
104 | }; |
105 | ||
106 | enum reg_symbol | |
107 | { | |
108 | REG_GR = 0, | |
109 | REG_FR = (REG_GR + 128), | |
110 | REG_AR = (REG_FR + 128), | |
111 | REG_CR = (REG_AR + 128), | |
112 | REG_P = (REG_CR + 128), | |
113 | REG_BR = (REG_P + 64), | |
114 | REG_IP = (REG_BR + 8), | |
115 | REG_CFM, | |
116 | REG_PR, | |
117 | REG_PR_ROT, | |
118 | REG_PSR, | |
119 | REG_PSR_L, | |
120 | REG_PSR_UM, | |
121 | /* The following are pseudo-registers for use by gas only. */ | |
122 | IND_CPUID, | |
123 | IND_DBR, | |
124 | IND_DTR, | |
125 | IND_ITR, | |
126 | IND_IBR, | |
127 | IND_MEM, | |
128 | IND_MSR, | |
129 | IND_PKR, | |
130 | IND_PMC, | |
131 | IND_PMD, | |
132 | IND_RR, | |
542d6675 | 133 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
134 | REG_PSP, |
135 | REG_PRIUNAT, | |
800eeca4 JW |
136 | REG_NUM |
137 | }; | |
138 | ||
139 | enum dynreg_type | |
140 | { | |
141 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
142 | DYNREG_FR, /* dynamic floating point register */ | |
143 | DYNREG_PR, /* dynamic predicate register */ | |
144 | DYNREG_NUM_TYPES | |
145 | }; | |
146 | ||
87f8eb97 JW |
147 | enum operand_match_result |
148 | { | |
149 | OPERAND_MATCH, | |
150 | OPERAND_OUT_OF_RANGE, | |
151 | OPERAND_MISMATCH | |
152 | }; | |
153 | ||
800eeca4 JW |
154 | /* On the ia64, we can't know the address of a text label until the |
155 | instructions are packed into a bundle. To handle this, we keep | |
156 | track of the list of labels that appear in front of each | |
157 | instruction. */ | |
158 | struct label_fix | |
542d6675 KH |
159 | { |
160 | struct label_fix *next; | |
161 | struct symbol *sym; | |
162 | }; | |
800eeca4 | 163 | |
549f748d | 164 | /* This is the endianness of the current section. */ |
800eeca4 JW |
165 | extern int target_big_endian; |
166 | ||
549f748d JW |
167 | /* This is the default endianness. */ |
168 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
169 | ||
10a98291 L |
170 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
171 | ||
172 | static void ia64_float_to_chars_bigendian | |
173 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
174 | static void ia64_float_to_chars_littleendian | |
175 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
176 | static void (*ia64_float_to_chars) | |
177 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
178 | ||
35f5df7f L |
179 | static struct hash_control *alias_hash; |
180 | static struct hash_control *alias_name_hash; | |
181 | static struct hash_control *secalias_hash; | |
182 | static struct hash_control *secalias_name_hash; | |
183 | ||
2fac3d48 JB |
184 | /* List of chars besides those in app.c:symbol_chars that can start an |
185 | operand. Used to prevent the scrubber eating vital white-space. */ | |
186 | const char ia64_symbol_chars[] = "@?"; | |
187 | ||
800eeca4 JW |
188 | /* Characters which always start a comment. */ |
189 | const char comment_chars[] = ""; | |
190 | ||
191 | /* Characters which start a comment at the beginning of a line. */ | |
192 | const char line_comment_chars[] = "#"; | |
193 | ||
194 | /* Characters which may be used to separate multiple commands on a | |
195 | single line. */ | |
196 | const char line_separator_chars[] = ";"; | |
197 | ||
198 | /* Characters which are used to indicate an exponent in a floating | |
199 | point number. */ | |
200 | const char EXP_CHARS[] = "eE"; | |
201 | ||
202 | /* Characters which mean that a number is a floating point constant, | |
203 | as in 0d1.0. */ | |
204 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
205 | ||
542d6675 | 206 | /* ia64-specific option processing: */ |
800eeca4 | 207 | |
44f5c83a | 208 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
209 | |
210 | struct option md_longopts[] = | |
211 | { | |
c43c2cc5 JW |
212 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
213 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
214 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
215 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
216 | }; |
217 | ||
218 | size_t md_longopts_size = sizeof (md_longopts); | |
219 | ||
220 | static struct | |
221 | { | |
222 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
223 | struct hash_control *reg_hash; /* register name hash table */ | |
224 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
225 | struct hash_control *const_hash; /* constant hash table */ | |
226 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
227 | ||
228 | symbolS *regsym[REG_NUM]; | |
229 | ||
230 | /* If X_op is != O_absent, the registername for the instruction's | |
231 | qualifying predicate. If NULL, p0 is assumed for instructions | |
232 | that are predicatable. */ | |
233 | expressionS qp; | |
234 | ||
8c2fda1d L |
235 | /* Optimize for which CPU. */ |
236 | enum | |
237 | { | |
238 | itanium1, | |
239 | itanium2 | |
240 | } tune; | |
241 | ||
91d777ee L |
242 | /* What to do when hint.b is used. */ |
243 | enum | |
244 | { | |
245 | hint_b_error, | |
246 | hint_b_warning, | |
247 | hint_b_ok | |
248 | } hint_b; | |
249 | ||
800eeca4 | 250 | unsigned int |
197865e8 | 251 | manual_bundling : 1, |
800eeca4 JW |
252 | debug_dv: 1, |
253 | detect_dv: 1, | |
254 | explicit_mode : 1, /* which mode we're in */ | |
255 | default_explicit_mode : 1, /* which mode is the default */ | |
256 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
257 | auto_align : 1, |
258 | keep_pending_output : 1; | |
800eeca4 | 259 | |
970d6792 L |
260 | /* What to do when something is wrong with unwind directives. */ |
261 | enum | |
262 | { | |
263 | unwind_check_warning, | |
264 | unwind_check_error | |
265 | } unwind_check; | |
266 | ||
800eeca4 JW |
267 | /* Each bundle consists of up to three instructions. We keep |
268 | track of four most recent instructions so we can correctly set | |
197865e8 | 269 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
270 | int curr_slot; |
271 | int num_slots_in_use; | |
272 | struct slot | |
273 | { | |
274 | unsigned int | |
275 | end_of_insn_group : 1, | |
276 | manual_bundling_on : 1, | |
196e8040 JW |
277 | manual_bundling_off : 1, |
278 | loc_directive_seen : 1; | |
800eeca4 JW |
279 | signed char user_template; /* user-selected template, if any */ |
280 | unsigned char qp_regno; /* qualifying predicate */ | |
281 | /* This duplicates a good fraction of "struct fix" but we | |
282 | can't use a "struct fix" instead since we can't call | |
283 | fix_new_exp() until we know the address of the instruction. */ | |
284 | int num_fixups; | |
285 | struct insn_fix | |
286 | { | |
287 | bfd_reloc_code_real_type code; | |
288 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
289 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
290 | expressionS expr; /* the value to be inserted */ | |
291 | } | |
292 | fixup[2]; /* at most two fixups per insn */ | |
293 | struct ia64_opcode *idesc; | |
294 | struct label_fix *label_fixups; | |
f1bcba5b | 295 | struct label_fix *tag_fixups; |
800eeca4 JW |
296 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
297 | expressionS opnd[6]; | |
298 | char *src_file; | |
299 | unsigned int src_line; | |
300 | struct dwarf2_line_info debug_line; | |
301 | } | |
302 | slot[NUM_SLOTS]; | |
303 | ||
304 | segT last_text_seg; | |
305 | ||
306 | struct dynreg | |
307 | { | |
308 | struct dynreg *next; /* next dynamic register */ | |
309 | const char *name; | |
310 | unsigned short base; /* the base register number */ | |
311 | unsigned short num_regs; /* # of registers in this set */ | |
312 | } | |
313 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
314 | ||
315 | flagword flags; /* ELF-header flags */ | |
316 | ||
317 | struct mem_offset { | |
318 | unsigned hint:1; /* is this hint currently valid? */ | |
319 | bfd_vma offset; /* mem.offset offset */ | |
320 | bfd_vma base; /* mem.offset base */ | |
321 | } mem_offset; | |
322 | ||
323 | int path; /* number of alt. entry points seen */ | |
324 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 325 | the current DV-checking block. */ |
800eeca4 | 326 | int maxpaths; /* size currently allocated for |
542d6675 | 327 | entry_labels */ |
557debba JW |
328 | |
329 | int pointer_size; /* size in bytes of a pointer */ | |
330 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
331 | } |
332 | md; | |
333 | ||
f6fe78d6 JW |
334 | /* These are not const, because they are modified to MMI for non-itanium1 |
335 | targets below. */ | |
336 | /* MFI bundle of nops. */ | |
337 | static unsigned char le_nop[16] = | |
338 | { | |
339 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
340 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
341 | }; | |
342 | /* MFI bundle of nops with stop-bit. */ | |
343 | static unsigned char le_nop_stop[16] = | |
344 | { | |
345 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
346 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
347 | }; | |
348 | ||
542d6675 | 349 | /* application registers: */ |
800eeca4 | 350 | |
e0c9811a JW |
351 | #define AR_K0 0 |
352 | #define AR_K7 7 | |
353 | #define AR_RSC 16 | |
354 | #define AR_BSP 17 | |
355 | #define AR_BSPSTORE 18 | |
356 | #define AR_RNAT 19 | |
357 | #define AR_UNAT 36 | |
358 | #define AR_FPSR 40 | |
359 | #define AR_ITC 44 | |
360 | #define AR_PFS 64 | |
361 | #define AR_LC 65 | |
800eeca4 JW |
362 | |
363 | static const struct | |
364 | { | |
365 | const char *name; | |
366 | int regnum; | |
367 | } | |
368 | ar[] = | |
369 | { | |
370 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
371 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
372 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
373 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
374 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
375 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
376 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
377 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
378 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
379 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
380 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 381 | {"ar.ec", 66}, |
800eeca4 JW |
382 | }; |
383 | ||
384 | #define CR_IPSR 16 | |
385 | #define CR_ISR 17 | |
386 | #define CR_IIP 19 | |
387 | #define CR_IFA 20 | |
388 | #define CR_ITIR 21 | |
389 | #define CR_IIPA 22 | |
390 | #define CR_IFS 23 | |
391 | #define CR_IIM 24 | |
392 | #define CR_IHA 25 | |
393 | #define CR_IVR 65 | |
394 | #define CR_TPR 66 | |
395 | #define CR_EOI 67 | |
396 | #define CR_IRR0 68 | |
397 | #define CR_IRR3 71 | |
398 | #define CR_LRR0 80 | |
399 | #define CR_LRR1 81 | |
400 | ||
542d6675 | 401 | /* control registers: */ |
800eeca4 JW |
402 | static const struct |
403 | { | |
404 | const char *name; | |
405 | int regnum; | |
406 | } | |
407 | cr[] = | |
408 | { | |
409 | {"cr.dcr", 0}, | |
410 | {"cr.itm", 1}, | |
411 | {"cr.iva", 2}, | |
412 | {"cr.pta", 8}, | |
413 | {"cr.gpta", 9}, | |
414 | {"cr.ipsr", 16}, | |
415 | {"cr.isr", 17}, | |
416 | {"cr.iip", 19}, | |
417 | {"cr.ifa", 20}, | |
418 | {"cr.itir", 21}, | |
419 | {"cr.iipa", 22}, | |
420 | {"cr.ifs", 23}, | |
421 | {"cr.iim", 24}, | |
422 | {"cr.iha", 25}, | |
423 | {"cr.lid", 64}, | |
424 | {"cr.ivr", 65}, | |
425 | {"cr.tpr", 66}, | |
426 | {"cr.eoi", 67}, | |
427 | {"cr.irr0", 68}, | |
428 | {"cr.irr1", 69}, | |
429 | {"cr.irr2", 70}, | |
430 | {"cr.irr3", 71}, | |
431 | {"cr.itv", 72}, | |
432 | {"cr.pmv", 73}, | |
433 | {"cr.cmcv", 74}, | |
434 | {"cr.lrr0", 80}, | |
435 | {"cr.lrr1", 81} | |
436 | }; | |
437 | ||
438 | #define PSR_MFL 4 | |
439 | #define PSR_IC 13 | |
440 | #define PSR_DFL 18 | |
441 | #define PSR_CPL 32 | |
442 | ||
443 | static const struct const_desc | |
444 | { | |
445 | const char *name; | |
446 | valueT value; | |
447 | } | |
448 | const_bits[] = | |
449 | { | |
542d6675 | 450 | /* PSR constant masks: */ |
800eeca4 JW |
451 | |
452 | /* 0: reserved */ | |
453 | {"psr.be", ((valueT) 1) << 1}, | |
454 | {"psr.up", ((valueT) 1) << 2}, | |
455 | {"psr.ac", ((valueT) 1) << 3}, | |
456 | {"psr.mfl", ((valueT) 1) << 4}, | |
457 | {"psr.mfh", ((valueT) 1) << 5}, | |
458 | /* 6-12: reserved */ | |
459 | {"psr.ic", ((valueT) 1) << 13}, | |
460 | {"psr.i", ((valueT) 1) << 14}, | |
461 | {"psr.pk", ((valueT) 1) << 15}, | |
462 | /* 16: reserved */ | |
463 | {"psr.dt", ((valueT) 1) << 17}, | |
464 | {"psr.dfl", ((valueT) 1) << 18}, | |
465 | {"psr.dfh", ((valueT) 1) << 19}, | |
466 | {"psr.sp", ((valueT) 1) << 20}, | |
467 | {"psr.pp", ((valueT) 1) << 21}, | |
468 | {"psr.di", ((valueT) 1) << 22}, | |
469 | {"psr.si", ((valueT) 1) << 23}, | |
470 | {"psr.db", ((valueT) 1) << 24}, | |
471 | {"psr.lp", ((valueT) 1) << 25}, | |
472 | {"psr.tb", ((valueT) 1) << 26}, | |
473 | {"psr.rt", ((valueT) 1) << 27}, | |
474 | /* 28-31: reserved */ | |
475 | /* 32-33: cpl (current privilege level) */ | |
476 | {"psr.is", ((valueT) 1) << 34}, | |
477 | {"psr.mc", ((valueT) 1) << 35}, | |
478 | {"psr.it", ((valueT) 1) << 36}, | |
479 | {"psr.id", ((valueT) 1) << 37}, | |
480 | {"psr.da", ((valueT) 1) << 38}, | |
481 | {"psr.dd", ((valueT) 1) << 39}, | |
482 | {"psr.ss", ((valueT) 1) << 40}, | |
483 | /* 41-42: ri (restart instruction) */ | |
484 | {"psr.ed", ((valueT) 1) << 43}, | |
485 | {"psr.bn", ((valueT) 1) << 44}, | |
486 | }; | |
487 | ||
542d6675 | 488 | /* indirect register-sets/memory: */ |
800eeca4 JW |
489 | |
490 | static const struct | |
491 | { | |
492 | const char *name; | |
493 | int regnum; | |
494 | } | |
495 | indirect_reg[] = | |
496 | { | |
497 | { "CPUID", IND_CPUID }, | |
498 | { "cpuid", IND_CPUID }, | |
499 | { "dbr", IND_DBR }, | |
500 | { "dtr", IND_DTR }, | |
501 | { "itr", IND_ITR }, | |
502 | { "ibr", IND_IBR }, | |
503 | { "msr", IND_MSR }, | |
504 | { "pkr", IND_PKR }, | |
505 | { "pmc", IND_PMC }, | |
506 | { "pmd", IND_PMD }, | |
507 | { "rr", IND_RR }, | |
508 | }; | |
509 | ||
510 | /* Pseudo functions used to indicate relocation types (these functions | |
511 | start with an at sign (@). */ | |
512 | static struct | |
513 | { | |
514 | const char *name; | |
515 | enum pseudo_type | |
516 | { | |
517 | PSEUDO_FUNC_NONE, | |
518 | PSEUDO_FUNC_RELOC, | |
519 | PSEUDO_FUNC_CONST, | |
e0c9811a | 520 | PSEUDO_FUNC_REG, |
800eeca4 JW |
521 | PSEUDO_FUNC_FLOAT |
522 | } | |
523 | type; | |
524 | union | |
525 | { | |
526 | unsigned long ival; | |
527 | symbolS *sym; | |
528 | } | |
529 | u; | |
530 | } | |
531 | pseudo_func[] = | |
532 | { | |
542d6675 | 533 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
534 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
535 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
536 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
537 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
538 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 539 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
540 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
541 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
542 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
543 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 544 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 545 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
546 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
547 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
548 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
549 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 550 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 551 | |
542d6675 | 552 | /* mbtype4 constants: */ |
800eeca4 JW |
553 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
554 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
555 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
556 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
557 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
558 | ||
542d6675 | 559 | /* fclass constants: */ |
bf3ca999 | 560 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
561 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
562 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
563 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
564 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
565 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
566 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
567 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
568 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
569 | |
570 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 571 | |
c10d9d8f JW |
572 | /* hint constants: */ |
573 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
574 | ||
542d6675 | 575 | /* unwind-related constants: */ |
041340ad JW |
576 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
577 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
578 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
579 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
580 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
581 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
582 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 583 | |
542d6675 | 584 | /* unwind-related registers: */ |
e0c9811a | 585 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
586 | }; |
587 | ||
542d6675 | 588 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
589 | static const bfd_vma nop[IA64_NUM_UNITS] = |
590 | { | |
591 | 0x0000000000LL, /* NIL => break 0 */ | |
592 | 0x0008000000LL, /* I-unit nop */ | |
593 | 0x0008000000LL, /* M-unit nop */ | |
594 | 0x4000000000LL, /* B-unit nop */ | |
595 | 0x0008000000LL, /* F-unit nop */ | |
596 | 0x0008000000LL, /* L-"unit" nop */ | |
597 | 0x0008000000LL, /* X-unit nop */ | |
598 | }; | |
599 | ||
600 | /* Can't be `const' as it's passed to input routines (which have the | |
601 | habit of setting temporary sentinels. */ | |
602 | static char special_section_name[][20] = | |
603 | { | |
604 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
605 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
606 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
607 | }; |
608 | ||
609 | /* The best template for a particular sequence of up to three | |
610 | instructions: */ | |
611 | #define N IA64_NUM_TYPES | |
612 | static unsigned char best_template[N][N][N]; | |
613 | #undef N | |
614 | ||
615 | /* Resource dependencies currently in effect */ | |
616 | static struct rsrc { | |
617 | int depind; /* dependency index */ | |
618 | const struct ia64_dependency *dependency; /* actual dependency */ | |
619 | unsigned specific:1, /* is this a specific bit/regno? */ | |
620 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
621 | int index; /* specific regno/bit within dependency */ | |
622 | int note; /* optional qualifying note (0 if none) */ | |
623 | #define STATE_NONE 0 | |
624 | #define STATE_STOP 1 | |
625 | #define STATE_SRLZ 2 | |
626 | int insn_srlz; /* current insn serialization state */ | |
627 | int data_srlz; /* current data serialization state */ | |
628 | int qp_regno; /* qualifying predicate for this usage */ | |
629 | char *file; /* what file marked this dependency */ | |
2434f565 | 630 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 631 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 632 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
633 | int path; /* corresponding code entry index */ |
634 | } *regdeps = NULL; | |
635 | static int regdepslen = 0; | |
636 | static int regdepstotlen = 0; | |
637 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
638 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 639 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 640 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
641 | |
642 | /* Current state of PR mutexation */ | |
643 | static struct qpmutex { | |
644 | valueT prmask; | |
645 | int path; | |
646 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
647 | static int qp_mutexeslen = 0; | |
648 | static int qp_mutexestotlen = 0; | |
197865e8 | 649 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
650 | |
651 | /* Current state of PR implications */ | |
652 | static struct qp_imply { | |
653 | unsigned p1:6; | |
654 | unsigned p2:6; | |
655 | unsigned p2_branched:1; | |
656 | int path; | |
657 | } *qp_implies = NULL; | |
658 | static int qp_implieslen = 0; | |
659 | static int qp_impliestotlen = 0; | |
660 | ||
197865e8 KH |
661 | /* Keep track of static GR values so that indirect register usage can |
662 | sometimes be tracked. */ | |
800eeca4 JW |
663 | static struct gr { |
664 | unsigned known:1; | |
665 | int path; | |
666 | valueT value; | |
a66d2bb7 JB |
667 | } gr_values[128] = { |
668 | { | |
669 | 1, | |
670 | #ifdef INT_MAX | |
671 | INT_MAX, | |
672 | #else | |
673 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
674 | #endif | |
675 | 0 | |
676 | } | |
677 | }; | |
800eeca4 | 678 | |
9545c4ce L |
679 | /* Remember the alignment frag. */ |
680 | static fragS *align_frag; | |
681 | ||
800eeca4 JW |
682 | /* These are the routines required to output the various types of |
683 | unwind records. */ | |
684 | ||
f5a30c2e JW |
685 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
686 | frag address here so that if there is a section switch in the middle of | |
687 | a function, then instructions emitted to a different section are not | |
688 | counted. Since there may be more than one frag for a function, this | |
689 | means we also need to keep track of which frag this address belongs to | |
690 | so we can compute inter-frag distances. This also nicely solves the | |
691 | problem with nops emitted for align directives, which can't easily be | |
692 | counted, but can easily be derived from frag sizes. */ | |
693 | ||
800eeca4 JW |
694 | typedef struct unw_rec_list { |
695 | unwind_record r; | |
e0c9811a | 696 | unsigned long slot_number; |
f5a30c2e | 697 | fragS *slot_frag; |
800eeca4 JW |
698 | struct unw_rec_list *next; |
699 | } unw_rec_list; | |
700 | ||
2434f565 | 701 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 702 | |
6290819d NC |
703 | /* Linked list of saved prologue counts. A very poor |
704 | implementation of a map from label numbers to prologue counts. */ | |
705 | typedef struct label_prologue_count | |
706 | { | |
707 | struct label_prologue_count *next; | |
708 | unsigned long label_number; | |
709 | unsigned int prologue_count; | |
710 | } label_prologue_count; | |
711 | ||
5656b6b8 JB |
712 | typedef struct proc_pending |
713 | { | |
714 | symbolS *sym; | |
715 | struct proc_pending *next; | |
716 | } proc_pending; | |
717 | ||
e0c9811a JW |
718 | static struct |
719 | { | |
e0c9811a JW |
720 | /* Maintain a list of unwind entries for the current function. */ |
721 | unw_rec_list *list; | |
722 | unw_rec_list *tail; | |
800eeca4 | 723 | |
e0c9811a JW |
724 | /* Any unwind entires that should be attached to the current slot |
725 | that an insn is being constructed for. */ | |
726 | unw_rec_list *current_entry; | |
800eeca4 | 727 | |
e0c9811a | 728 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 729 | proc_pending proc_pending; |
e0c9811a JW |
730 | symbolS *info; /* pointer to unwind info */ |
731 | symbolS *personality_routine; | |
91a2ae2a RH |
732 | segT saved_text_seg; |
733 | subsegT saved_text_subseg; | |
734 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 735 | |
e0c9811a | 736 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
737 | unsigned int prologue : 1; |
738 | unsigned int prologue_mask : 4; | |
739 | unsigned int body : 1; | |
740 | unsigned int insn : 1; | |
33d01f33 | 741 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
742 | /* Prologue counts at previous .label_state directives. */ |
743 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 744 | } unwind; |
800eeca4 | 745 | |
9f9a069e JW |
746 | /* The input value is a negated offset from psp, and specifies an address |
747 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
748 | must add 16 and divide by 4 to get the encoded value. */ | |
749 | ||
750 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
751 | ||
800eeca4 JW |
752 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
753 | ||
0234cb7c | 754 | /* Forward declarations: */ |
800eeca4 JW |
755 | static void set_section PARAMS ((char *name)); |
756 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
757 | unsigned int, unsigned int)); | |
d9201763 | 758 | static void dot_align (int); |
800eeca4 JW |
759 | static void dot_radix PARAMS ((int)); |
760 | static void dot_special_section PARAMS ((int)); | |
761 | static void dot_proc PARAMS ((int)); | |
762 | static void dot_fframe PARAMS ((int)); | |
763 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
764 | static void dot_vframesp PARAMS ((int)); |
765 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
766 | static void dot_save PARAMS ((int)); |
767 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
768 | static void dot_restorereg PARAMS ((int)); |
769 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
770 | static void dot_handlerdata PARAMS ((int)); |
771 | static void dot_unwentry PARAMS ((int)); | |
772 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 773 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
774 | static void dot_saveg PARAMS ((int)); |
775 | static void dot_savef PARAMS ((int)); | |
776 | static void dot_saveb PARAMS ((int)); | |
777 | static void dot_savegf PARAMS ((int)); | |
778 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
779 | static void dot_spillreg PARAMS ((int)); |
780 | static void dot_spillmem PARAMS ((int)); | |
781 | static void dot_spillreg_p PARAMS ((int)); | |
782 | static void dot_spillmem_p PARAMS ((int)); | |
783 | static void dot_label_state PARAMS ((int)); | |
784 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
785 | static void dot_unwabi PARAMS ((int)); |
786 | static void dot_personality PARAMS ((int)); | |
787 | static void dot_body PARAMS ((int)); | |
788 | static void dot_prologue PARAMS ((int)); | |
789 | static void dot_endp PARAMS ((int)); | |
790 | static void dot_template PARAMS ((int)); | |
791 | static void dot_regstk PARAMS ((int)); | |
792 | static void dot_rot PARAMS ((int)); | |
793 | static void dot_byteorder PARAMS ((int)); | |
794 | static void dot_psr PARAMS ((int)); | |
795 | static void dot_alias PARAMS ((int)); | |
796 | static void dot_ln PARAMS ((int)); | |
ef6a2b41 | 797 | static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua)); |
800eeca4 JW |
798 | static void dot_xdata PARAMS ((int)); |
799 | static void stmt_float_cons PARAMS ((int)); | |
800 | static void stmt_cons_ua PARAMS ((int)); | |
801 | static void dot_xfloat_cons PARAMS ((int)); | |
802 | static void dot_xstringer PARAMS ((int)); | |
803 | static void dot_xdata_ua PARAMS ((int)); | |
804 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 805 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
806 | static void dot_pred_rel PARAMS ((int)); |
807 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 808 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
809 | static void dot_dv_mode PARAMS ((int)); |
810 | static void dot_entry PARAMS ((int)); | |
811 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 812 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 813 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
814 | static void declare_register_set PARAMS ((const char *, int, int)); |
815 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
816 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
817 | int index, | |
818 | expressionS *e)); | |
800eeca4 JW |
819 | static int parse_operand PARAMS ((expressionS *e)); |
820 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
821 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); | |
822 | static void emit_one_bundle PARAMS ((void)); | |
823 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 824 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
825 | bfd_reloc_code_real_type r_type)); |
826 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
827 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
828 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
829 | static void add_qp_mutex PARAMS((valueT mask)); |
830 | static void add_qp_imply PARAMS((int p1, int p2)); | |
831 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
832 | static void clear_qp_mutex PARAMS((valueT mask)); | |
833 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 834 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
835 | static void clear_register_values PARAMS ((void)); |
836 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
837 | static void instruction_serialization PARAMS ((void)); |
838 | static void data_serialization PARAMS ((void)); | |
839 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 840 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 841 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 842 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
843 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
844 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
845 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
846 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
847 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
848 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
849 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
850 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
851 | static int qp_mutex PARAMS ((int, int, int)); |
852 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
853 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
854 | static void count_output PARAMS ((int, char *, char *)); | |
855 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
856 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 857 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
858 | static void output_P1_format PARAMS ((vbyte_func, int)); |
859 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
860 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
861 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
862 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
863 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
864 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
865 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
866 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
867 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
868 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
869 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
870 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
871 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
872 | static char format_ab_reg PARAMS ((int, int)); |
873 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
874 | unsigned long)); | |
875 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
876 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
877 | unsigned long)); | |
878 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 879 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
880 | static unw_rec_list *output_prologue PARAMS ((void)); |
881 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
882 | static unw_rec_list *output_body PARAMS ((void)); | |
883 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
884 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
885 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
886 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
887 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
888 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
889 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
890 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
891 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
892 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
893 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
894 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
895 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
896 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
897 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
898 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
899 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
900 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
901 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
902 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
903 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
904 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
905 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
906 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
907 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
908 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
909 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
910 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
911 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
912 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
913 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
914 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
915 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
916 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
917 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
918 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
919 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
920 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
921 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
922 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
923 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
924 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
925 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
926 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
927 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
928 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
929 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
930 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
931 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
932 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
933 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
934 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
935 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
936 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
937 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
938 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
939 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
940 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
941 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
942 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
943 | unsigned int)); | |
944 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
945 | unsigned int)); | |
946 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
947 | unsigned int)); | |
948 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
949 | unsigned int, unsigned int)); | |
950 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
951 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
952 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
953 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 954 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
955 | unsigned long, fragS *, |
956 | int)); | |
91a2ae2a | 957 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 958 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
150f24a2 JW |
959 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
960 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
6290819d NC |
961 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
962 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
963 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 964 | |
652ca075 | 965 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
966 | unit (as opposed to the memory unit). */ |
967 | static int | |
652ca075 | 968 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
969 | { |
970 | reg -= REG_AR; | |
652ca075 L |
971 | return reg >= 64 && reg <= 111; |
972 | } | |
800eeca4 | 973 | |
652ca075 L |
974 | /* Determine if application register REGNUM resides only in the memory |
975 | unit (as opposed to the integer unit). */ | |
976 | static int | |
977 | ar_is_only_in_memory_unit (int reg) | |
978 | { | |
979 | reg -= REG_AR; | |
980 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
981 | } |
982 | ||
983 | /* Switch to section NAME and create section if necessary. It's | |
984 | rather ugly that we have to manipulate input_line_pointer but I | |
985 | don't see any other way to accomplish the same thing without | |
986 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
987 | static void | |
988 | set_section (name) | |
989 | char *name; | |
990 | { | |
991 | char *saved_input_line_pointer; | |
992 | ||
993 | saved_input_line_pointer = input_line_pointer; | |
994 | input_line_pointer = name; | |
995 | obj_elf_section (0); | |
996 | input_line_pointer = saved_input_line_pointer; | |
997 | } | |
998 | ||
d61a78a7 RH |
999 | /* Map 's' to SHF_IA_64_SHORT. */ |
1000 | ||
1001 | int | |
1002 | ia64_elf_section_letter (letter, ptr_msg) | |
1003 | int letter; | |
1004 | char **ptr_msg; | |
1005 | { | |
1006 | if (letter == 's') | |
1007 | return SHF_IA_64_SHORT; | |
711ef82f L |
1008 | else if (letter == 'o') |
1009 | return SHF_LINK_ORDER; | |
d61a78a7 | 1010 | |
711ef82f L |
1011 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
1012 | return -1; | |
d61a78a7 RH |
1013 | } |
1014 | ||
800eeca4 JW |
1015 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
1016 | ||
1017 | flagword | |
1018 | ia64_elf_section_flags (flags, attr, type) | |
1019 | flagword flags; | |
2434f565 | 1020 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
1021 | { |
1022 | if (attr & SHF_IA_64_SHORT) | |
1023 | flags |= SEC_SMALL_DATA; | |
1024 | return flags; | |
1025 | } | |
1026 | ||
91a2ae2a RH |
1027 | int |
1028 | ia64_elf_section_type (str, len) | |
40449e9f KH |
1029 | const char *str; |
1030 | size_t len; | |
91a2ae2a | 1031 | { |
1cd8ff38 | 1032 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1033 | |
1cd8ff38 | 1034 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1035 | return SHT_PROGBITS; |
1036 | ||
1cd8ff38 | 1037 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1038 | return SHT_PROGBITS; |
1039 | ||
1cd8ff38 | 1040 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1041 | return SHT_IA_64_UNWIND; |
1042 | ||
1cd8ff38 | 1043 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1044 | return SHT_IA_64_UNWIND; |
1045 | ||
711ef82f L |
1046 | if (STREQ ("unwind")) |
1047 | return SHT_IA_64_UNWIND; | |
1048 | ||
91a2ae2a | 1049 | return -1; |
1cd8ff38 | 1050 | #undef STREQ |
91a2ae2a RH |
1051 | } |
1052 | ||
800eeca4 JW |
1053 | static unsigned int |
1054 | set_regstack (ins, locs, outs, rots) | |
1055 | unsigned int ins, locs, outs, rots; | |
1056 | { | |
542d6675 KH |
1057 | /* Size of frame. */ |
1058 | unsigned int sof; | |
800eeca4 JW |
1059 | |
1060 | sof = ins + locs + outs; | |
1061 | if (sof > 96) | |
1062 | { | |
1063 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1064 | return 0; | |
1065 | } | |
1066 | if (rots > sof) | |
1067 | { | |
1068 | as_warn ("Size of rotating registers exceeds frame size"); | |
1069 | return 0; | |
1070 | } | |
1071 | md.in.base = REG_GR + 32; | |
1072 | md.loc.base = md.in.base + ins; | |
1073 | md.out.base = md.loc.base + locs; | |
1074 | ||
1075 | md.in.num_regs = ins; | |
1076 | md.loc.num_regs = locs; | |
1077 | md.out.num_regs = outs; | |
1078 | md.rot.num_regs = rots; | |
1079 | return sof; | |
1080 | } | |
1081 | ||
1082 | void | |
1083 | ia64_flush_insns () | |
1084 | { | |
1085 | struct label_fix *lfix; | |
1086 | segT saved_seg; | |
1087 | subsegT saved_subseg; | |
b44b1b85 | 1088 | unw_rec_list *ptr; |
800eeca4 JW |
1089 | |
1090 | if (!md.last_text_seg) | |
1091 | return; | |
1092 | ||
1093 | saved_seg = now_seg; | |
1094 | saved_subseg = now_subseg; | |
1095 | ||
1096 | subseg_set (md.last_text_seg, 0); | |
1097 | ||
1098 | while (md.num_slots_in_use > 0) | |
1099 | emit_one_bundle (); /* force out queued instructions */ | |
1100 | ||
1101 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1102 | those now: */ |
800eeca4 JW |
1103 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1104 | { | |
1105 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1106 | symbol_set_frag (lfix->sym, frag_now); | |
1107 | } | |
1108 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1109 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1110 | { | |
1111 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1112 | symbol_set_frag (lfix->sym, frag_now); | |
1113 | } | |
1114 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1115 | |
b44b1b85 | 1116 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1117 | resolve those now. We only handle prologue, body, and endp directives |
1118 | here. Give an error for others. */ | |
b44b1b85 JW |
1119 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1120 | { | |
9c59842f | 1121 | switch (ptr->r.type) |
b44b1b85 | 1122 | { |
9c59842f JW |
1123 | case prologue: |
1124 | case prologue_gr: | |
1125 | case body: | |
1126 | case endp: | |
b44b1b85 JW |
1127 | ptr->slot_number = (unsigned long) frag_more (0); |
1128 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1129 | break; |
1130 | ||
1131 | /* Allow any record which doesn't have a "t" field (i.e., | |
1132 | doesn't relate to a particular instruction). */ | |
1133 | case unwabi: | |
1134 | case br_gr: | |
1135 | case copy_state: | |
1136 | case fr_mem: | |
1137 | case frgr_mem: | |
1138 | case gr_gr: | |
1139 | case gr_mem: | |
1140 | case label_state: | |
1141 | case rp_br: | |
1142 | case spill_base: | |
1143 | case spill_mask: | |
1144 | /* nothing */ | |
1145 | break; | |
1146 | ||
1147 | default: | |
1148 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1149 | break; | |
b44b1b85 | 1150 | } |
b44b1b85 JW |
1151 | } |
1152 | unwind.current_entry = NULL; | |
1153 | ||
800eeca4 | 1154 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1155 | |
1156 | if (md.qp.X_op == O_register) | |
1157 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1158 | } |
1159 | ||
d9201763 L |
1160 | static void |
1161 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1162 | { |
1163 | char *saved_input_line_pointer = input_line_pointer; | |
1164 | ||
1165 | input_line_pointer = ""; | |
1166 | s_align_bytes (nbytes); | |
1167 | input_line_pointer = saved_input_line_pointer; | |
1168 | } | |
1169 | ||
1170 | void | |
1171 | ia64_cons_align (nbytes) | |
1172 | int nbytes; | |
1173 | { | |
1174 | if (md.auto_align) | |
1175 | { | |
1176 | char *saved_input_line_pointer = input_line_pointer; | |
1177 | input_line_pointer = ""; | |
1178 | s_align_bytes (nbytes); | |
1179 | input_line_pointer = saved_input_line_pointer; | |
1180 | } | |
1181 | } | |
1182 | ||
1183 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1184 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1185 | |
197865e8 | 1186 | void |
800eeca4 JW |
1187 | output_vbyte_mem (count, ptr, comment) |
1188 | int count; | |
1189 | char *ptr; | |
2434f565 | 1190 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1191 | { |
1192 | int x; | |
1193 | if (vbyte_mem_ptr == NULL) | |
1194 | abort (); | |
1195 | ||
1196 | if (count == 0) | |
1197 | return; | |
1198 | for (x = 0; x < count; x++) | |
1199 | *(vbyte_mem_ptr++) = ptr[x]; | |
1200 | } | |
1201 | ||
1202 | /* Count the number of bytes required for records. */ | |
1203 | static int vbyte_count = 0; | |
197865e8 | 1204 | void |
800eeca4 JW |
1205 | count_output (count, ptr, comment) |
1206 | int count; | |
2434f565 JW |
1207 | char *ptr ATTRIBUTE_UNUSED; |
1208 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1209 | { |
1210 | vbyte_count += count; | |
1211 | } | |
1212 | ||
1213 | static void | |
1214 | output_R1_format (f, rtype, rlen) | |
1215 | vbyte_func f; | |
1216 | unw_record_type rtype; | |
1217 | int rlen; | |
1218 | { | |
e0c9811a | 1219 | int r = 0; |
800eeca4 JW |
1220 | char byte; |
1221 | if (rlen > 0x1f) | |
1222 | { | |
1223 | output_R3_format (f, rtype, rlen); | |
1224 | return; | |
1225 | } | |
197865e8 | 1226 | |
e0c9811a JW |
1227 | if (rtype == body) |
1228 | r = 1; | |
1229 | else if (rtype != prologue) | |
1230 | as_bad ("record type is not valid"); | |
1231 | ||
800eeca4 JW |
1232 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1233 | (*f) (1, &byte, NULL); | |
1234 | } | |
1235 | ||
1236 | static void | |
1237 | output_R2_format (f, mask, grsave, rlen) | |
1238 | vbyte_func f; | |
1239 | int mask, grsave; | |
1240 | unsigned long rlen; | |
1241 | { | |
1242 | char bytes[20]; | |
1243 | int count = 2; | |
1244 | mask = (mask & 0x0f); | |
1245 | grsave = (grsave & 0x7f); | |
1246 | ||
1247 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1248 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1249 | count += output_leb128 (bytes + 2, rlen, 0); | |
1250 | (*f) (count, bytes, NULL); | |
1251 | } | |
1252 | ||
1253 | static void | |
1254 | output_R3_format (f, rtype, rlen) | |
1255 | vbyte_func f; | |
1256 | unw_record_type rtype; | |
1257 | unsigned long rlen; | |
1258 | { | |
e0c9811a | 1259 | int r = 0, count; |
800eeca4 JW |
1260 | char bytes[20]; |
1261 | if (rlen <= 0x1f) | |
1262 | { | |
1263 | output_R1_format (f, rtype, rlen); | |
1264 | return; | |
1265 | } | |
197865e8 | 1266 | |
e0c9811a JW |
1267 | if (rtype == body) |
1268 | r = 1; | |
1269 | else if (rtype != prologue) | |
1270 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1271 | bytes[0] = (UNW_R3 | r); |
1272 | count = output_leb128 (bytes + 1, rlen, 0); | |
1273 | (*f) (count + 1, bytes, NULL); | |
1274 | } | |
1275 | ||
1276 | static void | |
1277 | output_P1_format (f, brmask) | |
1278 | vbyte_func f; | |
1279 | int brmask; | |
1280 | { | |
1281 | char byte; | |
1282 | byte = UNW_P1 | (brmask & 0x1f); | |
1283 | (*f) (1, &byte, NULL); | |
1284 | } | |
1285 | ||
1286 | static void | |
1287 | output_P2_format (f, brmask, gr) | |
1288 | vbyte_func f; | |
1289 | int brmask; | |
1290 | int gr; | |
1291 | { | |
1292 | char bytes[2]; | |
1293 | brmask = (brmask & 0x1f); | |
1294 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1295 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1296 | (*f) (2, bytes, NULL); | |
1297 | } | |
1298 | ||
1299 | static void | |
1300 | output_P3_format (f, rtype, reg) | |
1301 | vbyte_func f; | |
1302 | unw_record_type rtype; | |
1303 | int reg; | |
1304 | { | |
1305 | char bytes[2]; | |
e0c9811a | 1306 | int r = 0; |
800eeca4 JW |
1307 | reg = (reg & 0x7f); |
1308 | switch (rtype) | |
542d6675 | 1309 | { |
800eeca4 JW |
1310 | case psp_gr: |
1311 | r = 0; | |
1312 | break; | |
1313 | case rp_gr: | |
1314 | r = 1; | |
1315 | break; | |
1316 | case pfs_gr: | |
1317 | r = 2; | |
1318 | break; | |
1319 | case preds_gr: | |
1320 | r = 3; | |
1321 | break; | |
1322 | case unat_gr: | |
1323 | r = 4; | |
1324 | break; | |
1325 | case lc_gr: | |
1326 | r = 5; | |
1327 | break; | |
1328 | case rp_br: | |
1329 | r = 6; | |
1330 | break; | |
1331 | case rnat_gr: | |
1332 | r = 7; | |
1333 | break; | |
1334 | case bsp_gr: | |
1335 | r = 8; | |
1336 | break; | |
1337 | case bspstore_gr: | |
1338 | r = 9; | |
1339 | break; | |
1340 | case fpsr_gr: | |
1341 | r = 10; | |
1342 | break; | |
1343 | case priunat_gr: | |
1344 | r = 11; | |
1345 | break; | |
1346 | default: | |
1347 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1348 | } |
800eeca4 JW |
1349 | bytes[0] = (UNW_P3 | (r >> 1)); |
1350 | bytes[1] = (((r & 1) << 7) | reg); | |
1351 | (*f) (2, bytes, NULL); | |
1352 | } | |
1353 | ||
800eeca4 | 1354 | static void |
e0c9811a | 1355 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1356 | vbyte_func f; |
e0c9811a JW |
1357 | unsigned char *imask; |
1358 | unsigned long imask_size; | |
800eeca4 | 1359 | { |
e0c9811a | 1360 | imask[0] = UNW_P4; |
2132e3a3 | 1361 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1362 | } |
1363 | ||
1364 | static void | |
1365 | output_P5_format (f, grmask, frmask) | |
1366 | vbyte_func f; | |
1367 | int grmask; | |
1368 | unsigned long frmask; | |
1369 | { | |
1370 | char bytes[4]; | |
1371 | grmask = (grmask & 0x0f); | |
1372 | ||
1373 | bytes[0] = UNW_P5; | |
1374 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1375 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1376 | bytes[3] = (frmask & 0x000000ff); | |
1377 | (*f) (4, bytes, NULL); | |
1378 | } | |
1379 | ||
1380 | static void | |
1381 | output_P6_format (f, rtype, rmask) | |
1382 | vbyte_func f; | |
1383 | unw_record_type rtype; | |
1384 | int rmask; | |
1385 | { | |
1386 | char byte; | |
e0c9811a | 1387 | int r = 0; |
197865e8 | 1388 | |
e0c9811a JW |
1389 | if (rtype == gr_mem) |
1390 | r = 1; | |
1391 | else if (rtype != fr_mem) | |
1392 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1393 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1394 | (*f) (1, &byte, NULL); | |
1395 | } | |
1396 | ||
1397 | static void | |
1398 | output_P7_format (f, rtype, w1, w2) | |
1399 | vbyte_func f; | |
1400 | unw_record_type rtype; | |
1401 | unsigned long w1; | |
1402 | unsigned long w2; | |
1403 | { | |
1404 | char bytes[20]; | |
1405 | int count = 1; | |
e0c9811a | 1406 | int r = 0; |
800eeca4 JW |
1407 | count += output_leb128 (bytes + 1, w1, 0); |
1408 | switch (rtype) | |
1409 | { | |
542d6675 KH |
1410 | case mem_stack_f: |
1411 | r = 0; | |
1412 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1413 | break; | |
1414 | case mem_stack_v: | |
1415 | r = 1; | |
1416 | break; | |
1417 | case spill_base: | |
1418 | r = 2; | |
1419 | break; | |
1420 | case psp_sprel: | |
1421 | r = 3; | |
1422 | break; | |
1423 | case rp_when: | |
1424 | r = 4; | |
1425 | break; | |
1426 | case rp_psprel: | |
1427 | r = 5; | |
1428 | break; | |
1429 | case pfs_when: | |
1430 | r = 6; | |
1431 | break; | |
1432 | case pfs_psprel: | |
1433 | r = 7; | |
1434 | break; | |
1435 | case preds_when: | |
1436 | r = 8; | |
1437 | break; | |
1438 | case preds_psprel: | |
1439 | r = 9; | |
1440 | break; | |
1441 | case lc_when: | |
1442 | r = 10; | |
1443 | break; | |
1444 | case lc_psprel: | |
1445 | r = 11; | |
1446 | break; | |
1447 | case unat_when: | |
1448 | r = 12; | |
1449 | break; | |
1450 | case unat_psprel: | |
1451 | r = 13; | |
1452 | break; | |
1453 | case fpsr_when: | |
1454 | r = 14; | |
1455 | break; | |
1456 | case fpsr_psprel: | |
1457 | r = 15; | |
1458 | break; | |
1459 | default: | |
1460 | break; | |
800eeca4 JW |
1461 | } |
1462 | bytes[0] = (UNW_P7 | r); | |
1463 | (*f) (count, bytes, NULL); | |
1464 | } | |
1465 | ||
1466 | static void | |
1467 | output_P8_format (f, rtype, t) | |
1468 | vbyte_func f; | |
1469 | unw_record_type rtype; | |
1470 | unsigned long t; | |
1471 | { | |
1472 | char bytes[20]; | |
e0c9811a | 1473 | int r = 0; |
800eeca4 JW |
1474 | int count = 2; |
1475 | bytes[0] = UNW_P8; | |
1476 | switch (rtype) | |
1477 | { | |
542d6675 KH |
1478 | case rp_sprel: |
1479 | r = 1; | |
1480 | break; | |
1481 | case pfs_sprel: | |
1482 | r = 2; | |
1483 | break; | |
1484 | case preds_sprel: | |
1485 | r = 3; | |
1486 | break; | |
1487 | case lc_sprel: | |
1488 | r = 4; | |
1489 | break; | |
1490 | case unat_sprel: | |
1491 | r = 5; | |
1492 | break; | |
1493 | case fpsr_sprel: | |
1494 | r = 6; | |
1495 | break; | |
1496 | case bsp_when: | |
1497 | r = 7; | |
1498 | break; | |
1499 | case bsp_psprel: | |
1500 | r = 8; | |
1501 | break; | |
1502 | case bsp_sprel: | |
1503 | r = 9; | |
1504 | break; | |
1505 | case bspstore_when: | |
1506 | r = 10; | |
1507 | break; | |
1508 | case bspstore_psprel: | |
1509 | r = 11; | |
1510 | break; | |
1511 | case bspstore_sprel: | |
1512 | r = 12; | |
1513 | break; | |
1514 | case rnat_when: | |
1515 | r = 13; | |
1516 | break; | |
1517 | case rnat_psprel: | |
1518 | r = 14; | |
1519 | break; | |
1520 | case rnat_sprel: | |
1521 | r = 15; | |
1522 | break; | |
1523 | case priunat_when_gr: | |
1524 | r = 16; | |
1525 | break; | |
1526 | case priunat_psprel: | |
1527 | r = 17; | |
1528 | break; | |
1529 | case priunat_sprel: | |
1530 | r = 18; | |
1531 | break; | |
1532 | case priunat_when_mem: | |
1533 | r = 19; | |
1534 | break; | |
1535 | default: | |
1536 | break; | |
800eeca4 JW |
1537 | } |
1538 | bytes[1] = r; | |
1539 | count += output_leb128 (bytes + 2, t, 0); | |
1540 | (*f) (count, bytes, NULL); | |
1541 | } | |
1542 | ||
1543 | static void | |
1544 | output_P9_format (f, grmask, gr) | |
1545 | vbyte_func f; | |
1546 | int grmask; | |
1547 | int gr; | |
1548 | { | |
1549 | char bytes[3]; | |
1550 | bytes[0] = UNW_P9; | |
1551 | bytes[1] = (grmask & 0x0f); | |
1552 | bytes[2] = (gr & 0x7f); | |
1553 | (*f) (3, bytes, NULL); | |
1554 | } | |
1555 | ||
1556 | static void | |
1557 | output_P10_format (f, abi, context) | |
1558 | vbyte_func f; | |
1559 | int abi; | |
1560 | int context; | |
1561 | { | |
1562 | char bytes[3]; | |
1563 | bytes[0] = UNW_P10; | |
1564 | bytes[1] = (abi & 0xff); | |
1565 | bytes[2] = (context & 0xff); | |
1566 | (*f) (3, bytes, NULL); | |
1567 | } | |
1568 | ||
1569 | static void | |
1570 | output_B1_format (f, rtype, label) | |
1571 | vbyte_func f; | |
1572 | unw_record_type rtype; | |
1573 | unsigned long label; | |
1574 | { | |
1575 | char byte; | |
e0c9811a | 1576 | int r = 0; |
197865e8 | 1577 | if (label > 0x1f) |
800eeca4 JW |
1578 | { |
1579 | output_B4_format (f, rtype, label); | |
1580 | return; | |
1581 | } | |
e0c9811a JW |
1582 | if (rtype == copy_state) |
1583 | r = 1; | |
1584 | else if (rtype != label_state) | |
1585 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1586 | |
1587 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1588 | (*f) (1, &byte, NULL); | |
1589 | } | |
1590 | ||
1591 | static void | |
1592 | output_B2_format (f, ecount, t) | |
1593 | vbyte_func f; | |
1594 | unsigned long ecount; | |
1595 | unsigned long t; | |
1596 | { | |
1597 | char bytes[20]; | |
1598 | int count = 1; | |
1599 | if (ecount > 0x1f) | |
1600 | { | |
1601 | output_B3_format (f, ecount, t); | |
1602 | return; | |
1603 | } | |
1604 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1605 | count += output_leb128 (bytes + 1, t, 0); | |
1606 | (*f) (count, bytes, NULL); | |
1607 | } | |
1608 | ||
1609 | static void | |
1610 | output_B3_format (f, ecount, t) | |
1611 | vbyte_func f; | |
1612 | unsigned long ecount; | |
1613 | unsigned long t; | |
1614 | { | |
1615 | char bytes[20]; | |
1616 | int count = 1; | |
1617 | if (ecount <= 0x1f) | |
1618 | { | |
1619 | output_B2_format (f, ecount, t); | |
1620 | return; | |
1621 | } | |
1622 | bytes[0] = UNW_B3; | |
1623 | count += output_leb128 (bytes + 1, t, 0); | |
1624 | count += output_leb128 (bytes + count, ecount, 0); | |
1625 | (*f) (count, bytes, NULL); | |
1626 | } | |
1627 | ||
1628 | static void | |
1629 | output_B4_format (f, rtype, label) | |
1630 | vbyte_func f; | |
1631 | unw_record_type rtype; | |
1632 | unsigned long label; | |
1633 | { | |
1634 | char bytes[20]; | |
e0c9811a | 1635 | int r = 0; |
800eeca4 | 1636 | int count = 1; |
197865e8 | 1637 | if (label <= 0x1f) |
800eeca4 JW |
1638 | { |
1639 | output_B1_format (f, rtype, label); | |
1640 | return; | |
1641 | } | |
197865e8 | 1642 | |
e0c9811a JW |
1643 | if (rtype == copy_state) |
1644 | r = 1; | |
1645 | else if (rtype != label_state) | |
1646 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1647 | |
1648 | bytes[0] = (UNW_B4 | (r << 3)); | |
1649 | count += output_leb128 (bytes + 1, label, 0); | |
1650 | (*f) (count, bytes, NULL); | |
1651 | } | |
1652 | ||
1653 | static char | |
e0c9811a | 1654 | format_ab_reg (ab, reg) |
542d6675 KH |
1655 | int ab; |
1656 | int reg; | |
800eeca4 JW |
1657 | { |
1658 | int ret; | |
e0c9811a | 1659 | ab = (ab & 3); |
800eeca4 | 1660 | reg = (reg & 0x1f); |
e0c9811a | 1661 | ret = (ab << 5) | reg; |
800eeca4 JW |
1662 | return ret; |
1663 | } | |
1664 | ||
1665 | static void | |
e0c9811a | 1666 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1667 | vbyte_func f; |
1668 | unw_record_type rtype; | |
e0c9811a | 1669 | int ab, reg; |
800eeca4 JW |
1670 | unsigned long t; |
1671 | unsigned long w1; | |
1672 | { | |
1673 | char bytes[20]; | |
e0c9811a | 1674 | int r = 0; |
800eeca4 JW |
1675 | int count = 2; |
1676 | bytes[0] = UNW_X1; | |
197865e8 | 1677 | |
e0c9811a JW |
1678 | if (rtype == spill_sprel) |
1679 | r = 1; | |
1680 | else if (rtype != spill_psprel) | |
1681 | as_bad ("Invalid record type for format X1"); | |
1682 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1683 | count += output_leb128 (bytes + 2, t, 0); |
1684 | count += output_leb128 (bytes + count, w1, 0); | |
1685 | (*f) (count, bytes, NULL); | |
1686 | } | |
1687 | ||
1688 | static void | |
e0c9811a | 1689 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1690 | vbyte_func f; |
e0c9811a | 1691 | int ab, reg; |
800eeca4 JW |
1692 | int x, y, treg; |
1693 | unsigned long t; | |
1694 | { | |
1695 | char bytes[20]; | |
800eeca4 JW |
1696 | int count = 3; |
1697 | bytes[0] = UNW_X2; | |
e0c9811a | 1698 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1699 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1700 | count += output_leb128 (bytes + 3, t, 0); | |
1701 | (*f) (count, bytes, NULL); | |
1702 | } | |
1703 | ||
1704 | static void | |
e0c9811a | 1705 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1706 | vbyte_func f; |
1707 | unw_record_type rtype; | |
1708 | int qp; | |
e0c9811a | 1709 | int ab, reg; |
800eeca4 JW |
1710 | unsigned long t; |
1711 | unsigned long w1; | |
1712 | { | |
1713 | char bytes[20]; | |
e0c9811a | 1714 | int r = 0; |
800eeca4 | 1715 | int count = 3; |
e0c9811a JW |
1716 | bytes[0] = UNW_X3; |
1717 | ||
1718 | if (rtype == spill_sprel_p) | |
1719 | r = 1; | |
1720 | else if (rtype != spill_psprel_p) | |
1721 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1722 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1723 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1724 | count += output_leb128 (bytes + 3, t, 0); |
1725 | count += output_leb128 (bytes + count, w1, 0); | |
1726 | (*f) (count, bytes, NULL); | |
1727 | } | |
1728 | ||
1729 | static void | |
e0c9811a | 1730 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1731 | vbyte_func f; |
1732 | int qp; | |
e0c9811a | 1733 | int ab, reg; |
800eeca4 JW |
1734 | int x, y, treg; |
1735 | unsigned long t; | |
1736 | { | |
1737 | char bytes[20]; | |
800eeca4 | 1738 | int count = 4; |
e0c9811a | 1739 | bytes[0] = UNW_X4; |
800eeca4 | 1740 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1741 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1742 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1743 | count += output_leb128 (bytes + 4, t, 0); | |
1744 | (*f) (count, bytes, NULL); | |
1745 | } | |
1746 | ||
1747 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1748 | |
800eeca4 | 1749 | static unw_rec_list * |
197865e8 | 1750 | alloc_record (unw_record_type t) |
800eeca4 JW |
1751 | { |
1752 | unw_rec_list *ptr; | |
1753 | ptr = xmalloc (sizeof (*ptr)); | |
1754 | ptr->next = NULL; | |
1755 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1756 | ptr->r.type = t; | |
1757 | return ptr; | |
1758 | } | |
1759 | ||
5738bc24 JW |
1760 | /* Dummy unwind record used for calculating the length of the last prologue or |
1761 | body region. */ | |
1762 | ||
1763 | static unw_rec_list * | |
1764 | output_endp () | |
1765 | { | |
1766 | unw_rec_list *ptr = alloc_record (endp); | |
1767 | return ptr; | |
1768 | } | |
1769 | ||
800eeca4 JW |
1770 | static unw_rec_list * |
1771 | output_prologue () | |
1772 | { | |
1773 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1774 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1775 | return ptr; |
1776 | } | |
1777 | ||
1778 | static unw_rec_list * | |
1779 | output_prologue_gr (saved_mask, reg) | |
1780 | unsigned int saved_mask; | |
1781 | unsigned int reg; | |
1782 | { | |
1783 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1784 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1785 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1786 | ptr->r.record.r.grsave = reg; |
1787 | return ptr; | |
1788 | } | |
1789 | ||
1790 | static unw_rec_list * | |
1791 | output_body () | |
1792 | { | |
1793 | unw_rec_list *ptr = alloc_record (body); | |
1794 | return ptr; | |
1795 | } | |
1796 | ||
1797 | static unw_rec_list * | |
1798 | output_mem_stack_f (size) | |
1799 | unsigned int size; | |
1800 | { | |
1801 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1802 | ptr->r.record.p.size = size; | |
1803 | return ptr; | |
1804 | } | |
1805 | ||
1806 | static unw_rec_list * | |
1807 | output_mem_stack_v () | |
1808 | { | |
1809 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1810 | return ptr; | |
1811 | } | |
1812 | ||
1813 | static unw_rec_list * | |
1814 | output_psp_gr (gr) | |
1815 | unsigned int gr; | |
1816 | { | |
1817 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1818 | ptr->r.record.p.gr = gr; | |
1819 | return ptr; | |
1820 | } | |
1821 | ||
1822 | static unw_rec_list * | |
1823 | output_psp_sprel (offset) | |
1824 | unsigned int offset; | |
1825 | { | |
1826 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1827 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1828 | return ptr; |
1829 | } | |
1830 | ||
1831 | static unw_rec_list * | |
1832 | output_rp_when () | |
1833 | { | |
1834 | unw_rec_list *ptr = alloc_record (rp_when); | |
1835 | return ptr; | |
1836 | } | |
1837 | ||
1838 | static unw_rec_list * | |
1839 | output_rp_gr (gr) | |
1840 | unsigned int gr; | |
1841 | { | |
1842 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1843 | ptr->r.record.p.gr = gr; | |
1844 | return ptr; | |
1845 | } | |
1846 | ||
1847 | static unw_rec_list * | |
1848 | output_rp_br (br) | |
1849 | unsigned int br; | |
1850 | { | |
1851 | unw_rec_list *ptr = alloc_record (rp_br); | |
1852 | ptr->r.record.p.br = br; | |
1853 | return ptr; | |
1854 | } | |
1855 | ||
1856 | static unw_rec_list * | |
1857 | output_rp_psprel (offset) | |
1858 | unsigned int offset; | |
1859 | { | |
1860 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
9f9a069e | 1861 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1862 | return ptr; |
1863 | } | |
1864 | ||
1865 | static unw_rec_list * | |
1866 | output_rp_sprel (offset) | |
1867 | unsigned int offset; | |
1868 | { | |
1869 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1870 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1871 | return ptr; |
1872 | } | |
1873 | ||
1874 | static unw_rec_list * | |
1875 | output_pfs_when () | |
1876 | { | |
1877 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1878 | return ptr; | |
1879 | } | |
1880 | ||
1881 | static unw_rec_list * | |
1882 | output_pfs_gr (gr) | |
1883 | unsigned int gr; | |
1884 | { | |
1885 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1886 | ptr->r.record.p.gr = gr; | |
1887 | return ptr; | |
1888 | } | |
1889 | ||
1890 | static unw_rec_list * | |
1891 | output_pfs_psprel (offset) | |
1892 | unsigned int offset; | |
1893 | { | |
1894 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
9f9a069e | 1895 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1896 | return ptr; |
1897 | } | |
1898 | ||
1899 | static unw_rec_list * | |
1900 | output_pfs_sprel (offset) | |
1901 | unsigned int offset; | |
1902 | { | |
1903 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1904 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1905 | return ptr; |
1906 | } | |
1907 | ||
1908 | static unw_rec_list * | |
1909 | output_preds_when () | |
1910 | { | |
1911 | unw_rec_list *ptr = alloc_record (preds_when); | |
1912 | return ptr; | |
1913 | } | |
1914 | ||
1915 | static unw_rec_list * | |
1916 | output_preds_gr (gr) | |
1917 | unsigned int gr; | |
1918 | { | |
1919 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1920 | ptr->r.record.p.gr = gr; | |
1921 | return ptr; | |
1922 | } | |
1923 | ||
1924 | static unw_rec_list * | |
1925 | output_preds_psprel (offset) | |
1926 | unsigned int offset; | |
1927 | { | |
1928 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
9f9a069e | 1929 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1930 | return ptr; |
1931 | } | |
1932 | ||
1933 | static unw_rec_list * | |
1934 | output_preds_sprel (offset) | |
1935 | unsigned int offset; | |
1936 | { | |
1937 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1938 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1939 | return ptr; |
1940 | } | |
1941 | ||
1942 | static unw_rec_list * | |
1943 | output_fr_mem (mask) | |
1944 | unsigned int mask; | |
1945 | { | |
1946 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1947 | ptr->r.record.p.rmask = mask; | |
1948 | return ptr; | |
1949 | } | |
1950 | ||
1951 | static unw_rec_list * | |
1952 | output_frgr_mem (gr_mask, fr_mask) | |
1953 | unsigned int gr_mask; | |
1954 | unsigned int fr_mask; | |
1955 | { | |
1956 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1957 | ptr->r.record.p.grmask = gr_mask; | |
1958 | ptr->r.record.p.frmask = fr_mask; | |
1959 | return ptr; | |
1960 | } | |
1961 | ||
1962 | static unw_rec_list * | |
1963 | output_gr_gr (mask, reg) | |
1964 | unsigned int mask; | |
1965 | unsigned int reg; | |
1966 | { | |
1967 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1968 | ptr->r.record.p.grmask = mask; | |
1969 | ptr->r.record.p.gr = reg; | |
1970 | return ptr; | |
1971 | } | |
1972 | ||
1973 | static unw_rec_list * | |
1974 | output_gr_mem (mask) | |
1975 | unsigned int mask; | |
1976 | { | |
1977 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1978 | ptr->r.record.p.rmask = mask; | |
1979 | return ptr; | |
1980 | } | |
1981 | ||
1982 | static unw_rec_list * | |
1983 | output_br_mem (unsigned int mask) | |
1984 | { | |
1985 | unw_rec_list *ptr = alloc_record (br_mem); | |
1986 | ptr->r.record.p.brmask = mask; | |
1987 | return ptr; | |
1988 | } | |
1989 | ||
1990 | static unw_rec_list * | |
1991 | output_br_gr (save_mask, reg) | |
1992 | unsigned int save_mask; | |
1993 | unsigned int reg; | |
1994 | { | |
1995 | unw_rec_list *ptr = alloc_record (br_gr); | |
1996 | ptr->r.record.p.brmask = save_mask; | |
1997 | ptr->r.record.p.gr = reg; | |
1998 | return ptr; | |
1999 | } | |
2000 | ||
2001 | static unw_rec_list * | |
2002 | output_spill_base (offset) | |
2003 | unsigned int offset; | |
2004 | { | |
2005 | unw_rec_list *ptr = alloc_record (spill_base); | |
9f9a069e | 2006 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2007 | return ptr; |
2008 | } | |
2009 | ||
2010 | static unw_rec_list * | |
2011 | output_unat_when () | |
2012 | { | |
2013 | unw_rec_list *ptr = alloc_record (unat_when); | |
2014 | return ptr; | |
2015 | } | |
2016 | ||
2017 | static unw_rec_list * | |
2018 | output_unat_gr (gr) | |
2019 | unsigned int gr; | |
2020 | { | |
2021 | unw_rec_list *ptr = alloc_record (unat_gr); | |
2022 | ptr->r.record.p.gr = gr; | |
2023 | return ptr; | |
2024 | } | |
2025 | ||
2026 | static unw_rec_list * | |
2027 | output_unat_psprel (offset) | |
2028 | unsigned int offset; | |
2029 | { | |
2030 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
9f9a069e | 2031 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2032 | return ptr; |
2033 | } | |
2034 | ||
2035 | static unw_rec_list * | |
2036 | output_unat_sprel (offset) | |
2037 | unsigned int offset; | |
2038 | { | |
2039 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 2040 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2041 | return ptr; |
2042 | } | |
2043 | ||
2044 | static unw_rec_list * | |
2045 | output_lc_when () | |
2046 | { | |
2047 | unw_rec_list *ptr = alloc_record (lc_when); | |
2048 | return ptr; | |
2049 | } | |
2050 | ||
2051 | static unw_rec_list * | |
2052 | output_lc_gr (gr) | |
2053 | unsigned int gr; | |
2054 | { | |
2055 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2056 | ptr->r.record.p.gr = gr; | |
2057 | return ptr; | |
2058 | } | |
2059 | ||
2060 | static unw_rec_list * | |
2061 | output_lc_psprel (offset) | |
2062 | unsigned int offset; | |
2063 | { | |
2064 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
9f9a069e | 2065 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2066 | return ptr; |
2067 | } | |
2068 | ||
2069 | static unw_rec_list * | |
2070 | output_lc_sprel (offset) | |
2071 | unsigned int offset; | |
2072 | { | |
2073 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2074 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2075 | return ptr; |
2076 | } | |
2077 | ||
2078 | static unw_rec_list * | |
2079 | output_fpsr_when () | |
2080 | { | |
2081 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2082 | return ptr; | |
2083 | } | |
2084 | ||
2085 | static unw_rec_list * | |
2086 | output_fpsr_gr (gr) | |
2087 | unsigned int gr; | |
2088 | { | |
2089 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2090 | ptr->r.record.p.gr = gr; | |
2091 | return ptr; | |
2092 | } | |
2093 | ||
2094 | static unw_rec_list * | |
2095 | output_fpsr_psprel (offset) | |
2096 | unsigned int offset; | |
2097 | { | |
2098 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
9f9a069e | 2099 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2100 | return ptr; |
2101 | } | |
2102 | ||
2103 | static unw_rec_list * | |
2104 | output_fpsr_sprel (offset) | |
2105 | unsigned int offset; | |
2106 | { | |
2107 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2108 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2109 | return ptr; |
2110 | } | |
2111 | ||
2112 | static unw_rec_list * | |
2113 | output_priunat_when_gr () | |
2114 | { | |
2115 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2116 | return ptr; | |
2117 | } | |
2118 | ||
2119 | static unw_rec_list * | |
2120 | output_priunat_when_mem () | |
2121 | { | |
2122 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2123 | return ptr; | |
2124 | } | |
2125 | ||
2126 | static unw_rec_list * | |
2127 | output_priunat_gr (gr) | |
2128 | unsigned int gr; | |
2129 | { | |
2130 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2131 | ptr->r.record.p.gr = gr; | |
2132 | return ptr; | |
2133 | } | |
2134 | ||
2135 | static unw_rec_list * | |
2136 | output_priunat_psprel (offset) | |
2137 | unsigned int offset; | |
2138 | { | |
2139 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
9f9a069e | 2140 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2141 | return ptr; |
2142 | } | |
2143 | ||
2144 | static unw_rec_list * | |
2145 | output_priunat_sprel (offset) | |
2146 | unsigned int offset; | |
2147 | { | |
2148 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2149 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2150 | return ptr; |
2151 | } | |
2152 | ||
2153 | static unw_rec_list * | |
2154 | output_bsp_when () | |
2155 | { | |
2156 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2157 | return ptr; | |
2158 | } | |
2159 | ||
2160 | static unw_rec_list * | |
2161 | output_bsp_gr (gr) | |
2162 | unsigned int gr; | |
2163 | { | |
2164 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2165 | ptr->r.record.p.gr = gr; | |
2166 | return ptr; | |
2167 | } | |
2168 | ||
2169 | static unw_rec_list * | |
2170 | output_bsp_psprel (offset) | |
2171 | unsigned int offset; | |
2172 | { | |
2173 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
9f9a069e | 2174 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2175 | return ptr; |
2176 | } | |
2177 | ||
2178 | static unw_rec_list * | |
2179 | output_bsp_sprel (offset) | |
2180 | unsigned int offset; | |
2181 | { | |
2182 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2183 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2184 | return ptr; |
2185 | } | |
2186 | ||
2187 | static unw_rec_list * | |
2188 | output_bspstore_when () | |
2189 | { | |
2190 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2191 | return ptr; | |
2192 | } | |
2193 | ||
2194 | static unw_rec_list * | |
2195 | output_bspstore_gr (gr) | |
2196 | unsigned int gr; | |
2197 | { | |
2198 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2199 | ptr->r.record.p.gr = gr; | |
2200 | return ptr; | |
2201 | } | |
2202 | ||
2203 | static unw_rec_list * | |
2204 | output_bspstore_psprel (offset) | |
2205 | unsigned int offset; | |
2206 | { | |
2207 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
9f9a069e | 2208 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2209 | return ptr; |
2210 | } | |
2211 | ||
2212 | static unw_rec_list * | |
2213 | output_bspstore_sprel (offset) | |
2214 | unsigned int offset; | |
2215 | { | |
2216 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2217 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2218 | return ptr; |
2219 | } | |
2220 | ||
2221 | static unw_rec_list * | |
2222 | output_rnat_when () | |
2223 | { | |
2224 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2225 | return ptr; | |
2226 | } | |
2227 | ||
2228 | static unw_rec_list * | |
2229 | output_rnat_gr (gr) | |
2230 | unsigned int gr; | |
2231 | { | |
2232 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2233 | ptr->r.record.p.gr = gr; | |
2234 | return ptr; | |
2235 | } | |
2236 | ||
2237 | static unw_rec_list * | |
2238 | output_rnat_psprel (offset) | |
2239 | unsigned int offset; | |
2240 | { | |
2241 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
9f9a069e | 2242 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2243 | return ptr; |
2244 | } | |
2245 | ||
2246 | static unw_rec_list * | |
2247 | output_rnat_sprel (offset) | |
2248 | unsigned int offset; | |
2249 | { | |
2250 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2251 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2252 | return ptr; |
2253 | } | |
2254 | ||
2255 | static unw_rec_list * | |
e0c9811a JW |
2256 | output_unwabi (abi, context) |
2257 | unsigned long abi; | |
2258 | unsigned long context; | |
800eeca4 | 2259 | { |
e0c9811a JW |
2260 | unw_rec_list *ptr = alloc_record (unwabi); |
2261 | ptr->r.record.p.abi = abi; | |
2262 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2263 | return ptr; |
2264 | } | |
2265 | ||
2266 | static unw_rec_list * | |
e0c9811a | 2267 | output_epilogue (unsigned long ecount) |
800eeca4 | 2268 | { |
e0c9811a JW |
2269 | unw_rec_list *ptr = alloc_record (epilogue); |
2270 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2271 | return ptr; |
2272 | } | |
2273 | ||
2274 | static unw_rec_list * | |
e0c9811a | 2275 | output_label_state (unsigned long label) |
800eeca4 | 2276 | { |
e0c9811a JW |
2277 | unw_rec_list *ptr = alloc_record (label_state); |
2278 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2279 | return ptr; |
2280 | } | |
2281 | ||
2282 | static unw_rec_list * | |
e0c9811a JW |
2283 | output_copy_state (unsigned long label) |
2284 | { | |
2285 | unw_rec_list *ptr = alloc_record (copy_state); | |
2286 | ptr->r.record.b.label = label; | |
2287 | return ptr; | |
2288 | } | |
2289 | ||
2290 | static unw_rec_list * | |
2291 | output_spill_psprel (ab, reg, offset) | |
2292 | unsigned int ab; | |
800eeca4 JW |
2293 | unsigned int reg; |
2294 | unsigned int offset; | |
2295 | { | |
2296 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2297 | ptr->r.record.x.ab = ab; |
800eeca4 | 2298 | ptr->r.record.x.reg = reg; |
9f9a069e | 2299 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2300 | return ptr; |
2301 | } | |
2302 | ||
2303 | static unw_rec_list * | |
e0c9811a JW |
2304 | output_spill_sprel (ab, reg, offset) |
2305 | unsigned int ab; | |
800eeca4 JW |
2306 | unsigned int reg; |
2307 | unsigned int offset; | |
2308 | { | |
2309 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2310 | ptr->r.record.x.ab = ab; |
800eeca4 | 2311 | ptr->r.record.x.reg = reg; |
542d6675 | 2312 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2313 | return ptr; |
2314 | } | |
2315 | ||
2316 | static unw_rec_list * | |
e0c9811a JW |
2317 | output_spill_psprel_p (ab, reg, offset, predicate) |
2318 | unsigned int ab; | |
800eeca4 JW |
2319 | unsigned int reg; |
2320 | unsigned int offset; | |
2321 | unsigned int predicate; | |
2322 | { | |
2323 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2324 | ptr->r.record.x.ab = ab; |
800eeca4 | 2325 | ptr->r.record.x.reg = reg; |
9f9a069e | 2326 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2327 | ptr->r.record.x.qp = predicate; |
2328 | return ptr; | |
2329 | } | |
2330 | ||
2331 | static unw_rec_list * | |
e0c9811a JW |
2332 | output_spill_sprel_p (ab, reg, offset, predicate) |
2333 | unsigned int ab; | |
800eeca4 JW |
2334 | unsigned int reg; |
2335 | unsigned int offset; | |
2336 | unsigned int predicate; | |
2337 | { | |
2338 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2339 | ptr->r.record.x.ab = ab; |
800eeca4 | 2340 | ptr->r.record.x.reg = reg; |
542d6675 | 2341 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2342 | ptr->r.record.x.qp = predicate; |
2343 | return ptr; | |
2344 | } | |
2345 | ||
2346 | static unw_rec_list * | |
e0c9811a JW |
2347 | output_spill_reg (ab, reg, targ_reg, xy) |
2348 | unsigned int ab; | |
800eeca4 JW |
2349 | unsigned int reg; |
2350 | unsigned int targ_reg; | |
2351 | unsigned int xy; | |
2352 | { | |
2353 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2354 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2355 | ptr->r.record.x.reg = reg; |
2356 | ptr->r.record.x.treg = targ_reg; | |
2357 | ptr->r.record.x.xy = xy; | |
2358 | return ptr; | |
2359 | } | |
2360 | ||
2361 | static unw_rec_list * | |
e0c9811a JW |
2362 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2363 | unsigned int ab; | |
800eeca4 JW |
2364 | unsigned int reg; |
2365 | unsigned int targ_reg; | |
2366 | unsigned int xy; | |
2367 | unsigned int predicate; | |
2368 | { | |
2369 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2370 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2371 | ptr->r.record.x.reg = reg; |
2372 | ptr->r.record.x.treg = targ_reg; | |
2373 | ptr->r.record.x.xy = xy; | |
2374 | ptr->r.record.x.qp = predicate; | |
2375 | return ptr; | |
2376 | } | |
2377 | ||
197865e8 | 2378 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2379 | specified function. */ |
542d6675 | 2380 | |
800eeca4 JW |
2381 | static void |
2382 | process_one_record (ptr, f) | |
2383 | unw_rec_list *ptr; | |
2384 | vbyte_func f; | |
2385 | { | |
e0c9811a JW |
2386 | unsigned long fr_mask, gr_mask; |
2387 | ||
197865e8 | 2388 | switch (ptr->r.type) |
800eeca4 | 2389 | { |
5738bc24 JW |
2390 | /* This is a dummy record that takes up no space in the output. */ |
2391 | case endp: | |
2392 | break; | |
2393 | ||
542d6675 KH |
2394 | case gr_mem: |
2395 | case fr_mem: | |
2396 | case br_mem: | |
2397 | case frgr_mem: | |
2398 | /* These are taken care of by prologue/prologue_gr. */ | |
2399 | break; | |
e0c9811a | 2400 | |
542d6675 KH |
2401 | case prologue_gr: |
2402 | case prologue: | |
2403 | if (ptr->r.type == prologue_gr) | |
2404 | output_R2_format (f, ptr->r.record.r.grmask, | |
2405 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2406 | else | |
800eeca4 | 2407 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2408 | |
2409 | /* Output descriptor(s) for union of register spills (if any). */ | |
2410 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2411 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2412 | if (fr_mask) | |
2413 | { | |
2414 | if ((fr_mask & ~0xfUL) == 0) | |
2415 | output_P6_format (f, fr_mem, fr_mask); | |
2416 | else | |
2417 | { | |
2418 | output_P5_format (f, gr_mask, fr_mask); | |
2419 | gr_mask = 0; | |
2420 | } | |
2421 | } | |
2422 | if (gr_mask) | |
2423 | output_P6_format (f, gr_mem, gr_mask); | |
2424 | if (ptr->r.record.r.mask.br_mem) | |
2425 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2426 | ||
2427 | /* output imask descriptor if necessary: */ | |
2428 | if (ptr->r.record.r.mask.i) | |
2429 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2430 | ptr->r.record.r.imask_size); | |
2431 | break; | |
2432 | ||
2433 | case body: | |
2434 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2435 | break; | |
2436 | case mem_stack_f: | |
2437 | case mem_stack_v: | |
2438 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2439 | ptr->r.record.p.size); | |
2440 | break; | |
2441 | case psp_gr: | |
2442 | case rp_gr: | |
2443 | case pfs_gr: | |
2444 | case preds_gr: | |
2445 | case unat_gr: | |
2446 | case lc_gr: | |
2447 | case fpsr_gr: | |
2448 | case priunat_gr: | |
2449 | case bsp_gr: | |
2450 | case bspstore_gr: | |
2451 | case rnat_gr: | |
2452 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2453 | break; | |
2454 | case rp_br: | |
2455 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2456 | break; | |
2457 | case psp_sprel: | |
2458 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2459 | break; | |
2460 | case rp_when: | |
2461 | case pfs_when: | |
2462 | case preds_when: | |
2463 | case unat_when: | |
2464 | case lc_when: | |
2465 | case fpsr_when: | |
2466 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2467 | break; | |
2468 | case rp_psprel: | |
2469 | case pfs_psprel: | |
2470 | case preds_psprel: | |
2471 | case unat_psprel: | |
2472 | case lc_psprel: | |
2473 | case fpsr_psprel: | |
2474 | case spill_base: | |
2475 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2476 | break; | |
2477 | case rp_sprel: | |
2478 | case pfs_sprel: | |
2479 | case preds_sprel: | |
2480 | case unat_sprel: | |
2481 | case lc_sprel: | |
2482 | case fpsr_sprel: | |
2483 | case priunat_sprel: | |
2484 | case bsp_sprel: | |
2485 | case bspstore_sprel: | |
2486 | case rnat_sprel: | |
2487 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2488 | break; | |
2489 | case gr_gr: | |
2490 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2491 | break; | |
2492 | case br_gr: | |
2493 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2494 | break; | |
2495 | case spill_mask: | |
2496 | as_bad ("spill_mask record unimplemented."); | |
2497 | break; | |
2498 | case priunat_when_gr: | |
2499 | case priunat_when_mem: | |
2500 | case bsp_when: | |
2501 | case bspstore_when: | |
2502 | case rnat_when: | |
2503 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2504 | break; | |
2505 | case priunat_psprel: | |
2506 | case bsp_psprel: | |
2507 | case bspstore_psprel: | |
2508 | case rnat_psprel: | |
2509 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2510 | break; | |
2511 | case unwabi: | |
2512 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2513 | break; | |
2514 | case epilogue: | |
2515 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2516 | break; | |
2517 | case label_state: | |
2518 | case copy_state: | |
2519 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2520 | break; | |
2521 | case spill_psprel: | |
2522 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2523 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2524 | ptr->r.record.x.pspoff); | |
2525 | break; | |
2526 | case spill_sprel: | |
2527 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2528 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2529 | ptr->r.record.x.spoff); | |
2530 | break; | |
2531 | case spill_reg: | |
2532 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2533 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2534 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2535 | break; | |
2536 | case spill_psprel_p: | |
2537 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2538 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2539 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2540 | break; | |
2541 | case spill_sprel_p: | |
2542 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2543 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2544 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2545 | break; | |
2546 | case spill_reg_p: | |
2547 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2548 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2549 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2550 | ptr->r.record.x.t); | |
2551 | break; | |
2552 | default: | |
2553 | as_bad ("record_type_not_valid"); | |
2554 | break; | |
800eeca4 JW |
2555 | } |
2556 | } | |
2557 | ||
197865e8 | 2558 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2559 | the specified function. */ |
2560 | static void | |
2561 | process_unw_records (list, f) | |
2562 | unw_rec_list *list; | |
2563 | vbyte_func f; | |
2564 | { | |
2565 | unw_rec_list *ptr; | |
2566 | for (ptr = list; ptr; ptr = ptr->next) | |
2567 | process_one_record (ptr, f); | |
2568 | } | |
2569 | ||
2570 | /* Determine the size of a record list in bytes. */ | |
2571 | static int | |
2572 | calc_record_size (list) | |
2573 | unw_rec_list *list; | |
2574 | { | |
2575 | vbyte_count = 0; | |
2576 | process_unw_records (list, count_output); | |
2577 | return vbyte_count; | |
2578 | } | |
2579 | ||
e0c9811a JW |
2580 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2581 | of type TYPE are saved starting at instruction with index T. If N | |
2582 | bits are set in REGMASK, it is assumed that instructions T through | |
2583 | T+N-1 save these registers. | |
2584 | ||
2585 | TYPE values: | |
2586 | 0: no save | |
2587 | 1: instruction saves next fp reg | |
2588 | 2: instruction saves next general reg | |
2589 | 3: instruction saves next branch reg */ | |
2590 | static void | |
2591 | set_imask (region, regmask, t, type) | |
2592 | unw_rec_list *region; | |
2593 | unsigned long regmask; | |
2594 | unsigned long t; | |
2595 | unsigned int type; | |
2596 | { | |
2597 | unsigned char *imask; | |
2598 | unsigned long imask_size; | |
2599 | unsigned int i; | |
2600 | int pos; | |
2601 | ||
2602 | imask = region->r.record.r.mask.i; | |
2603 | imask_size = region->r.record.r.imask_size; | |
2604 | if (!imask) | |
2605 | { | |
542d6675 | 2606 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2607 | imask = xmalloc (imask_size); |
2608 | memset (imask, 0, imask_size); | |
2609 | ||
2610 | region->r.record.r.imask_size = imask_size; | |
2611 | region->r.record.r.mask.i = imask; | |
2612 | } | |
2613 | ||
542d6675 KH |
2614 | i = (t / 4) + 1; |
2615 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2616 | while (regmask) |
2617 | { | |
2618 | if (i >= imask_size) | |
2619 | { | |
2620 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2621 | return; | |
2622 | } | |
2623 | ||
2624 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2625 | |
e0c9811a JW |
2626 | regmask &= (regmask - 1); |
2627 | pos -= 2; | |
2628 | if (pos < 0) | |
2629 | { | |
2630 | pos = 0; | |
2631 | ++i; | |
2632 | } | |
2633 | } | |
2634 | } | |
2635 | ||
f5a30c2e JW |
2636 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2637 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2638 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2639 | for frag sizes. */ | |
f5a30c2e | 2640 | |
e0c9811a | 2641 | unsigned long |
b5e0fabd | 2642 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2643 | unsigned long slot_addr; |
2644 | fragS *slot_frag; | |
2645 | unsigned long first_addr; | |
2646 | fragS *first_frag; | |
b5e0fabd | 2647 | int before_relax; |
e0c9811a | 2648 | { |
f5a30c2e JW |
2649 | unsigned long index = 0; |
2650 | ||
2651 | /* First time we are called, the initial address and frag are invalid. */ | |
2652 | if (first_addr == 0) | |
2653 | return 0; | |
2654 | ||
2655 | /* If the two addresses are in different frags, then we need to add in | |
2656 | the remaining size of this frag, and then the entire size of intermediate | |
2657 | frags. */ | |
2658 | while (slot_frag != first_frag) | |
2659 | { | |
2660 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2661 | ||
b5e0fabd | 2662 | if (! before_relax) |
73f20958 | 2663 | { |
b5e0fabd JW |
2664 | /* We can get the final addresses only during and after |
2665 | relaxation. */ | |
73f20958 L |
2666 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2667 | index += 3 * ((first_frag->fr_next->fr_address | |
2668 | - first_frag->fr_address | |
2669 | - first_frag->fr_fix) >> 4); | |
2670 | } | |
2671 | else | |
2672 | /* We don't know what the final addresses will be. We try our | |
2673 | best to estimate. */ | |
2674 | switch (first_frag->fr_type) | |
2675 | { | |
2676 | default: | |
2677 | break; | |
2678 | ||
2679 | case rs_space: | |
2680 | as_fatal ("only constant space allocation is supported"); | |
2681 | break; | |
2682 | ||
2683 | case rs_align: | |
2684 | case rs_align_code: | |
2685 | case rs_align_test: | |
2686 | /* Take alignment into account. Assume the worst case | |
2687 | before relaxation. */ | |
2688 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2689 | break; | |
2690 | ||
2691 | case rs_org: | |
2692 | if (first_frag->fr_symbol) | |
2693 | { | |
2694 | as_fatal ("only constant offsets are supported"); | |
2695 | break; | |
2696 | } | |
2697 | case rs_fill: | |
2698 | index += 3 * (first_frag->fr_offset >> 4); | |
2699 | break; | |
2700 | } | |
2701 | ||
f5a30c2e JW |
2702 | /* Add in the full size of the frag converted to instruction slots. */ |
2703 | index += 3 * (first_frag->fr_fix >> 4); | |
2704 | /* Subtract away the initial part before first_addr. */ | |
2705 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2706 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2707 | |
f5a30c2e JW |
2708 | /* Move to the beginning of the next frag. */ |
2709 | first_frag = first_frag->fr_next; | |
2710 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2711 | } | |
2712 | ||
2713 | /* Add in the used part of the last frag. */ | |
2714 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2715 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2716 | return index; | |
2717 | } | |
4a1805b1 | 2718 | |
91a2ae2a RH |
2719 | /* Optimize unwind record directives. */ |
2720 | ||
2721 | static unw_rec_list * | |
2722 | optimize_unw_records (list) | |
2723 | unw_rec_list *list; | |
2724 | { | |
2725 | if (!list) | |
2726 | return NULL; | |
2727 | ||
2728 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2729 | by ".body", then we can optimize the unwind directives away. */ | |
2730 | if (list->r.type == prologue | |
5738bc24 JW |
2731 | && (list->next->r.type == endp |
2732 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2733 | return NULL; |
2734 | ||
2735 | return list; | |
2736 | } | |
2737 | ||
800eeca4 JW |
2738 | /* Given a complete record list, process any records which have |
2739 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2740 | this has been run, all necessary information should be available |
800eeca4 | 2741 | within each record to generate an image. */ |
542d6675 | 2742 | |
800eeca4 | 2743 | static void |
b5e0fabd | 2744 | fixup_unw_records (list, before_relax) |
800eeca4 | 2745 | unw_rec_list *list; |
b5e0fabd | 2746 | int before_relax; |
800eeca4 | 2747 | { |
e0c9811a JW |
2748 | unw_rec_list *ptr, *region = 0; |
2749 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2750 | fragS *first_frag = 0; |
e0c9811a | 2751 | |
800eeca4 JW |
2752 | for (ptr = list; ptr; ptr = ptr->next) |
2753 | { | |
2754 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2755 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2756 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2757 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2758 | switch (ptr->r.type) |
2759 | { | |
542d6675 KH |
2760 | case prologue: |
2761 | case prologue_gr: | |
2762 | case body: | |
2763 | { | |
2764 | unw_rec_list *last; | |
5738bc24 JW |
2765 | int size; |
2766 | unsigned long last_addr = 0; | |
2767 | fragS *last_frag = NULL; | |
542d6675 KH |
2768 | |
2769 | first_addr = ptr->slot_number; | |
f5a30c2e | 2770 | first_frag = ptr->slot_frag; |
542d6675 | 2771 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2772 | the function, and determine the size of the region. */ |
542d6675 KH |
2773 | for (last = ptr->next; last != NULL; last = last->next) |
2774 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2775 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2776 | { |
2777 | last_addr = last->slot_number; | |
f5a30c2e | 2778 | last_frag = last->slot_frag; |
542d6675 KH |
2779 | break; |
2780 | } | |
b5e0fabd JW |
2781 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2782 | before_relax); | |
542d6675 | 2783 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2784 | if (ptr->r.type == body) |
2785 | /* End of region. */ | |
2786 | region = 0; | |
2787 | else | |
2788 | region = ptr; | |
e0c9811a | 2789 | break; |
542d6675 KH |
2790 | } |
2791 | case epilogue: | |
ed7af9f9 L |
2792 | if (t < rlen) |
2793 | ptr->r.record.b.t = rlen - 1 - t; | |
2794 | else | |
2795 | /* This happens when a memory-stack-less procedure uses a | |
2796 | ".restore sp" directive at the end of a region to pop | |
2797 | the frame state. */ | |
2798 | ptr->r.record.b.t = 0; | |
542d6675 | 2799 | break; |
e0c9811a | 2800 | |
542d6675 KH |
2801 | case mem_stack_f: |
2802 | case mem_stack_v: | |
2803 | case rp_when: | |
2804 | case pfs_when: | |
2805 | case preds_when: | |
2806 | case unat_when: | |
2807 | case lc_when: | |
2808 | case fpsr_when: | |
2809 | case priunat_when_gr: | |
2810 | case priunat_when_mem: | |
2811 | case bsp_when: | |
2812 | case bspstore_when: | |
2813 | case rnat_when: | |
2814 | ptr->r.record.p.t = t; | |
2815 | break; | |
e0c9811a | 2816 | |
542d6675 KH |
2817 | case spill_reg: |
2818 | case spill_sprel: | |
2819 | case spill_psprel: | |
2820 | case spill_reg_p: | |
2821 | case spill_sprel_p: | |
2822 | case spill_psprel_p: | |
2823 | ptr->r.record.x.t = t; | |
2824 | break; | |
e0c9811a | 2825 | |
542d6675 KH |
2826 | case frgr_mem: |
2827 | if (!region) | |
2828 | { | |
75e09913 | 2829 | as_bad ("frgr_mem record before region record!"); |
542d6675 KH |
2830 | return; |
2831 | } | |
2832 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2833 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2834 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2835 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2836 | break; | |
2837 | case fr_mem: | |
2838 | if (!region) | |
2839 | { | |
75e09913 | 2840 | as_bad ("fr_mem record before region record!"); |
542d6675 KH |
2841 | return; |
2842 | } | |
2843 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2844 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2845 | break; | |
2846 | case gr_mem: | |
2847 | if (!region) | |
2848 | { | |
75e09913 | 2849 | as_bad ("gr_mem record before region record!"); |
542d6675 KH |
2850 | return; |
2851 | } | |
2852 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2853 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2854 | break; | |
2855 | case br_mem: | |
2856 | if (!region) | |
2857 | { | |
75e09913 | 2858 | as_bad ("br_mem record before region record!"); |
542d6675 KH |
2859 | return; |
2860 | } | |
2861 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2862 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2863 | break; | |
e0c9811a | 2864 | |
542d6675 KH |
2865 | case gr_gr: |
2866 | if (!region) | |
2867 | { | |
75e09913 | 2868 | as_bad ("gr_gr record before region record!"); |
542d6675 KH |
2869 | return; |
2870 | } | |
2871 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2872 | break; | |
2873 | case br_gr: | |
2874 | if (!region) | |
2875 | { | |
75e09913 | 2876 | as_bad ("br_gr record before region record!"); |
542d6675 KH |
2877 | return; |
2878 | } | |
2879 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2880 | break; | |
e0c9811a | 2881 | |
542d6675 KH |
2882 | default: |
2883 | break; | |
800eeca4 JW |
2884 | } |
2885 | } | |
2886 | } | |
2887 | ||
b5e0fabd JW |
2888 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2889 | to handle here, which is the unwind info frag. */ | |
2890 | ||
2891 | int | |
2892 | ia64_estimate_size_before_relax (fragS *frag, | |
2893 | asection *segtype ATTRIBUTE_UNUSED) | |
2894 | { | |
2895 | unw_rec_list *list; | |
2896 | int len, size, pad; | |
2897 | ||
2898 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2899 | list = (unw_rec_list *) frag->fr_opcode; | |
2900 | fixup_unw_records (list, 0); | |
2901 | ||
2902 | len = calc_record_size (list); | |
2903 | /* pad to pointer-size boundary. */ | |
2904 | pad = len % md.pointer_size; | |
2905 | if (pad != 0) | |
2906 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2907 | /* Add 8 for the header. */ |
2908 | size = len + 8; | |
2909 | /* Add a pointer for the personality offset. */ | |
2910 | if (frag->fr_offset) | |
2911 | size += md.pointer_size; | |
b5e0fabd JW |
2912 | |
2913 | /* fr_var carries the max_chars that we created the fragment with. | |
2914 | We must, of course, have allocated enough memory earlier. */ | |
2915 | assert (frag->fr_var >= size); | |
2916 | ||
2917 | return frag->fr_fix + size; | |
2918 | } | |
2919 | ||
73f20958 L |
2920 | /* This function converts a rs_machine_dependent variant frag into a |
2921 | normal fill frag with the unwind image from the the record list. */ | |
2922 | void | |
2923 | ia64_convert_frag (fragS *frag) | |
557debba | 2924 | { |
73f20958 L |
2925 | unw_rec_list *list; |
2926 | int len, size, pad; | |
1cd8ff38 | 2927 | valueT flag_value; |
557debba | 2928 | |
b5e0fabd | 2929 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2930 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2931 | fixup_unw_records (list, 0); |
1cd8ff38 | 2932 | |
73f20958 L |
2933 | len = calc_record_size (list); |
2934 | /* pad to pointer-size boundary. */ | |
2935 | pad = len % md.pointer_size; | |
2936 | if (pad != 0) | |
2937 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2938 | /* Add 8 for the header. */ |
2939 | size = len + 8; | |
2940 | /* Add a pointer for the personality offset. */ | |
2941 | if (frag->fr_offset) | |
2942 | size += md.pointer_size; | |
73f20958 L |
2943 | |
2944 | /* fr_var carries the max_chars that we created the fragment with. | |
2945 | We must, of course, have allocated enough memory earlier. */ | |
2946 | assert (frag->fr_var >= size); | |
2947 | ||
2948 | /* Initialize the header area. fr_offset is initialized with | |
2949 | unwind.personality_routine. */ | |
2950 | if (frag->fr_offset) | |
1cd8ff38 NC |
2951 | { |
2952 | if (md.flags & EF_IA_64_ABI64) | |
2953 | flag_value = (bfd_vma) 3 << 32; | |
2954 | else | |
2955 | /* 32-bit unwind info block. */ | |
2956 | flag_value = (bfd_vma) 0x1003 << 32; | |
2957 | } | |
2958 | else | |
2959 | flag_value = 0; | |
557debba | 2960 | |
73f20958 L |
2961 | md_number_to_chars (frag->fr_literal, |
2962 | (((bfd_vma) 1 << 48) /* Version. */ | |
2963 | | flag_value /* U & E handler flags. */ | |
2964 | | (len / md.pointer_size)), /* Length. */ | |
2965 | 8); | |
557debba | 2966 | |
73f20958 L |
2967 | /* Skip the header. */ |
2968 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2969 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2970 | |
2971 | /* Fill the padding bytes with zeros. */ | |
2972 | if (pad != 0) | |
2973 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2974 | md.pointer_size - pad); | |
2975 | ||
73f20958 L |
2976 | frag->fr_fix += size; |
2977 | frag->fr_type = rs_fill; | |
2978 | frag->fr_var = 0; | |
2979 | frag->fr_offset = 0; | |
800eeca4 JW |
2980 | } |
2981 | ||
e0c9811a JW |
2982 | static int |
2983 | convert_expr_to_ab_reg (e, ab, regp) | |
2984 | expressionS *e; | |
2985 | unsigned int *ab; | |
2986 | unsigned int *regp; | |
2987 | { | |
2988 | unsigned int reg; | |
2989 | ||
2990 | if (e->X_op != O_register) | |
2991 | return 0; | |
2992 | ||
2993 | reg = e->X_add_number; | |
2434f565 | 2994 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2995 | { |
2996 | *ab = 0; | |
2997 | *regp = reg - REG_GR; | |
2998 | } | |
2434f565 JW |
2999 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
3000 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
3001 | { |
3002 | *ab = 1; | |
3003 | *regp = reg - REG_FR; | |
3004 | } | |
2434f565 | 3005 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3006 | { |
3007 | *ab = 2; | |
3008 | *regp = reg - REG_BR; | |
3009 | } | |
3010 | else | |
3011 | { | |
3012 | *ab = 3; | |
3013 | switch (reg) | |
3014 | { | |
3015 | case REG_PR: *regp = 0; break; | |
3016 | case REG_PSP: *regp = 1; break; | |
3017 | case REG_PRIUNAT: *regp = 2; break; | |
3018 | case REG_BR + 0: *regp = 3; break; | |
3019 | case REG_AR + AR_BSP: *regp = 4; break; | |
3020 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3021 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3022 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3023 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3024 | case REG_AR + AR_PFS: *regp = 9; break; | |
3025 | case REG_AR + AR_LC: *regp = 10; break; | |
3026 | ||
3027 | default: | |
3028 | return 0; | |
3029 | } | |
3030 | } | |
3031 | return 1; | |
197865e8 | 3032 | } |
e0c9811a JW |
3033 | |
3034 | static int | |
3035 | convert_expr_to_xy_reg (e, xy, regp) | |
3036 | expressionS *e; | |
3037 | unsigned int *xy; | |
3038 | unsigned int *regp; | |
3039 | { | |
3040 | unsigned int reg; | |
3041 | ||
3042 | if (e->X_op != O_register) | |
3043 | return 0; | |
3044 | ||
3045 | reg = e->X_add_number; | |
3046 | ||
2434f565 | 3047 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
3048 | { |
3049 | *xy = 0; | |
3050 | *regp = reg - REG_GR; | |
3051 | } | |
2434f565 | 3052 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
3053 | { |
3054 | *xy = 1; | |
3055 | *regp = reg - REG_FR; | |
3056 | } | |
2434f565 | 3057 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3058 | { |
3059 | *xy = 2; | |
3060 | *regp = reg - REG_BR; | |
3061 | } | |
3062 | else | |
3063 | return -1; | |
3064 | return 1; | |
197865e8 | 3065 | } |
e0c9811a | 3066 | |
d9201763 L |
3067 | static void |
3068 | dot_align (int arg) | |
3069 | { | |
3070 | /* The current frag is an alignment frag. */ | |
3071 | align_frag = frag_now; | |
3072 | s_align_bytes (arg); | |
3073 | } | |
3074 | ||
800eeca4 JW |
3075 | static void |
3076 | dot_radix (dummy) | |
2434f565 | 3077 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3078 | { |
fa30c84f JB |
3079 | char *radix; |
3080 | int ch; | |
800eeca4 JW |
3081 | |
3082 | SKIP_WHITESPACE (); | |
800eeca4 | 3083 | |
fa30c84f JB |
3084 | if (is_it_end_of_statement ()) |
3085 | return; | |
3086 | radix = input_line_pointer; | |
3087 | ch = get_symbol_end (); | |
3088 | ia64_canonicalize_symbol_name (radix); | |
3089 | if (strcasecmp (radix, "C")) | |
3090 | as_bad ("Radix `%s' unsupported or invalid", radix); | |
3091 | *input_line_pointer = ch; | |
3092 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3093 | } |
3094 | ||
196e8040 JW |
3095 | /* Helper function for .loc directives. If the assembler is not generating |
3096 | line number info, then we need to remember which instructions have a .loc | |
3097 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3098 | ||
3099 | static void | |
3100 | dot_loc (int x) | |
3101 | { | |
3102 | CURR_SLOT.loc_directive_seen = 1; | |
3103 | dwarf2_directive_loc (x); | |
3104 | } | |
3105 | ||
800eeca4 JW |
3106 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3107 | static void | |
3108 | dot_special_section (which) | |
3109 | int which; | |
3110 | { | |
3111 | set_section ((char *) special_section_name[which]); | |
3112 | } | |
3113 | ||
07450571 L |
3114 | /* Return -1 for warning and 0 for error. */ |
3115 | ||
3116 | static int | |
970d6792 L |
3117 | unwind_diagnostic (const char * region, const char *directive) |
3118 | { | |
3119 | if (md.unwind_check == unwind_check_warning) | |
07450571 L |
3120 | { |
3121 | as_warn (".%s outside of %s", directive, region); | |
3122 | return -1; | |
3123 | } | |
970d6792 L |
3124 | else |
3125 | { | |
3126 | as_bad (".%s outside of %s", directive, region); | |
3127 | ignore_rest_of_line (); | |
07450571 | 3128 | return 0; |
970d6792 L |
3129 | } |
3130 | } | |
3131 | ||
07450571 L |
3132 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3133 | a procedure but the unwind directive check is set to warning, 0 if | |
3134 | a directive isn't in a procedure and the unwind directive check is set | |
3135 | to error. */ | |
3136 | ||
75e09913 JB |
3137 | static int |
3138 | in_procedure (const char *directive) | |
3139 | { | |
5656b6b8 | 3140 | if (unwind.proc_pending.sym |
75e09913 JB |
3141 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3142 | return 1; | |
07450571 | 3143 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3144 | } |
3145 | ||
07450571 L |
3146 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3147 | a prologue but the unwind directive check is set to warning, 0 if | |
3148 | a directive isn't in a prologue and the unwind directive check is set | |
3149 | to error. */ | |
3150 | ||
75e09913 JB |
3151 | static int |
3152 | in_prologue (const char *directive) | |
3153 | { | |
07450571 L |
3154 | int in = in_procedure (directive); |
3155 | if (in) | |
75e09913 | 3156 | { |
970d6792 | 3157 | /* We are in a procedure. Check if we are in a prologue. */ |
75e09913 JB |
3158 | if (unwind.prologue) |
3159 | return 1; | |
07450571 L |
3160 | /* We only want to issue one message. */ |
3161 | if (in == 1) | |
3162 | return unwind_diagnostic ("prologue", directive); | |
3163 | else | |
3164 | return -1; | |
75e09913 JB |
3165 | } |
3166 | return 0; | |
3167 | } | |
3168 | ||
07450571 L |
3169 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3170 | a body but the unwind directive check is set to warning, 0 if | |
3171 | a directive isn't in a body and the unwind directive check is set | |
3172 | to error. */ | |
3173 | ||
75e09913 JB |
3174 | static int |
3175 | in_body (const char *directive) | |
3176 | { | |
07450571 L |
3177 | int in = in_procedure (directive); |
3178 | if (in) | |
75e09913 | 3179 | { |
970d6792 | 3180 | /* We are in a procedure. Check if we are in a body. */ |
75e09913 JB |
3181 | if (unwind.body) |
3182 | return 1; | |
07450571 L |
3183 | /* We only want to issue one message. */ |
3184 | if (in == 1) | |
3185 | return unwind_diagnostic ("body region", directive); | |
3186 | else | |
3187 | return -1; | |
75e09913 JB |
3188 | } |
3189 | return 0; | |
3190 | } | |
3191 | ||
800eeca4 JW |
3192 | static void |
3193 | add_unwind_entry (ptr) | |
3194 | unw_rec_list *ptr; | |
3195 | { | |
e0c9811a JW |
3196 | if (unwind.tail) |
3197 | unwind.tail->next = ptr; | |
800eeca4 | 3198 | else |
e0c9811a JW |
3199 | unwind.list = ptr; |
3200 | unwind.tail = ptr; | |
800eeca4 JW |
3201 | |
3202 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3203 | if (unwind.current_entry == NULL) |
3204 | unwind.current_entry = ptr; | |
800eeca4 JW |
3205 | } |
3206 | ||
197865e8 | 3207 | static void |
800eeca4 | 3208 | dot_fframe (dummy) |
2434f565 | 3209 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3210 | { |
3211 | expressionS e; | |
e0c9811a | 3212 | |
75e09913 JB |
3213 | if (!in_prologue ("fframe")) |
3214 | return; | |
3215 | ||
800eeca4 | 3216 | parse_operand (&e); |
197865e8 | 3217 | |
800eeca4 JW |
3218 | if (e.X_op != O_constant) |
3219 | as_bad ("Operand to .fframe must be a constant"); | |
3220 | else | |
e0c9811a JW |
3221 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3222 | } | |
3223 | ||
197865e8 | 3224 | static void |
e0c9811a | 3225 | dot_vframe (dummy) |
2434f565 | 3226 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3227 | { |
3228 | expressionS e; | |
3229 | unsigned reg; | |
3230 | ||
75e09913 JB |
3231 | if (!in_prologue ("vframe")) |
3232 | return; | |
3233 | ||
e0c9811a JW |
3234 | parse_operand (&e); |
3235 | reg = e.X_add_number - REG_GR; | |
3236 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3237 | { |
e0c9811a | 3238 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3239 | if (! (unwind.prologue_mask & 2)) |
3240 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3241 | } |
e0c9811a JW |
3242 | else |
3243 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3244 | } |
3245 | ||
197865e8 | 3246 | static void |
e0c9811a | 3247 | dot_vframesp (dummy) |
2434f565 | 3248 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3249 | { |
e0c9811a JW |
3250 | expressionS e; |
3251 | ||
75e09913 JB |
3252 | if (!in_prologue ("vframesp")) |
3253 | return; | |
3254 | ||
e0c9811a JW |
3255 | parse_operand (&e); |
3256 | if (e.X_op == O_constant) | |
3257 | { | |
3258 | add_unwind_entry (output_mem_stack_v ()); | |
3259 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3260 | } | |
3261 | else | |
69906a9b | 3262 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3263 | } |
3264 | ||
197865e8 | 3265 | static void |
e0c9811a | 3266 | dot_vframepsp (dummy) |
2434f565 | 3267 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3268 | { |
3269 | expressionS e; | |
3270 | ||
75e09913 JB |
3271 | if (!in_prologue ("vframepsp")) |
3272 | return; | |
3273 | ||
e0c9811a JW |
3274 | parse_operand (&e); |
3275 | if (e.X_op == O_constant) | |
3276 | { | |
3277 | add_unwind_entry (output_mem_stack_v ()); | |
3278 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3279 | } | |
3280 | else | |
69906a9b | 3281 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3282 | } |
3283 | ||
197865e8 | 3284 | static void |
800eeca4 | 3285 | dot_save (dummy) |
2434f565 | 3286 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3287 | { |
3288 | expressionS e1, e2; | |
3289 | int sep; | |
3290 | int reg1, reg2; | |
3291 | ||
75e09913 JB |
3292 | if (!in_prologue ("save")) |
3293 | return; | |
3294 | ||
800eeca4 JW |
3295 | sep = parse_operand (&e1); |
3296 | if (sep != ',') | |
3297 | as_bad ("No second operand to .save"); | |
3298 | sep = parse_operand (&e2); | |
3299 | ||
e0c9811a | 3300 | reg1 = e1.X_add_number; |
800eeca4 | 3301 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3302 | |
800eeca4 | 3303 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3304 | if (e1.X_op == O_register) |
800eeca4 | 3305 | { |
542d6675 | 3306 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3307 | { |
3308 | switch (reg1) | |
3309 | { | |
542d6675 KH |
3310 | case REG_AR + AR_BSP: |
3311 | add_unwind_entry (output_bsp_when ()); | |
3312 | add_unwind_entry (output_bsp_gr (reg2)); | |
3313 | break; | |
3314 | case REG_AR + AR_BSPSTORE: | |
3315 | add_unwind_entry (output_bspstore_when ()); | |
3316 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3317 | break; | |
3318 | case REG_AR + AR_RNAT: | |
3319 | add_unwind_entry (output_rnat_when ()); | |
3320 | add_unwind_entry (output_rnat_gr (reg2)); | |
3321 | break; | |
3322 | case REG_AR + AR_UNAT: | |
3323 | add_unwind_entry (output_unat_when ()); | |
3324 | add_unwind_entry (output_unat_gr (reg2)); | |
3325 | break; | |
3326 | case REG_AR + AR_FPSR: | |
3327 | add_unwind_entry (output_fpsr_when ()); | |
3328 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3329 | break; | |
3330 | case REG_AR + AR_PFS: | |
3331 | add_unwind_entry (output_pfs_when ()); | |
3332 | if (! (unwind.prologue_mask & 4)) | |
3333 | add_unwind_entry (output_pfs_gr (reg2)); | |
3334 | break; | |
3335 | case REG_AR + AR_LC: | |
3336 | add_unwind_entry (output_lc_when ()); | |
3337 | add_unwind_entry (output_lc_gr (reg2)); | |
3338 | break; | |
3339 | case REG_BR: | |
3340 | add_unwind_entry (output_rp_when ()); | |
3341 | if (! (unwind.prologue_mask & 8)) | |
3342 | add_unwind_entry (output_rp_gr (reg2)); | |
3343 | break; | |
3344 | case REG_PR: | |
3345 | add_unwind_entry (output_preds_when ()); | |
3346 | if (! (unwind.prologue_mask & 1)) | |
3347 | add_unwind_entry (output_preds_gr (reg2)); | |
3348 | break; | |
3349 | case REG_PRIUNAT: | |
3350 | add_unwind_entry (output_priunat_when_gr ()); | |
3351 | add_unwind_entry (output_priunat_gr (reg2)); | |
3352 | break; | |
3353 | default: | |
3354 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3355 | } |
3356 | } | |
3357 | else | |
3358 | as_bad (" Second operand not a valid register"); | |
3359 | } | |
3360 | else | |
e0c9811a | 3361 | as_bad ("First operand not a register"); |
800eeca4 JW |
3362 | } |
3363 | ||
197865e8 | 3364 | static void |
800eeca4 | 3365 | dot_restore (dummy) |
2434f565 | 3366 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3367 | { |
e0c9811a | 3368 | expressionS e1, e2; |
33d01f33 | 3369 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3370 | int sep; |
3371 | ||
75e09913 JB |
3372 | if (!in_body ("restore")) |
3373 | return; | |
3374 | ||
e0c9811a JW |
3375 | sep = parse_operand (&e1); |
3376 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3377 | { | |
3378 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3379 | return; | |
3380 | } | |
3381 | ||
3382 | if (sep == ',') | |
3383 | { | |
3384 | parse_operand (&e2); | |
33d01f33 | 3385 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3386 | { |
33d01f33 | 3387 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3388 | return; |
3389 | } | |
33d01f33 | 3390 | ecount = e2.X_add_number; |
e0c9811a | 3391 | } |
33d01f33 JW |
3392 | else |
3393 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3394 | |
3395 | if (ecount >= unwind.prologue_count) | |
3396 | { | |
3397 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3398 | ecount + 1, unwind.prologue_count); | |
3399 | return; | |
3400 | } | |
3401 | ||
e0c9811a | 3402 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3403 | |
3404 | if (ecount < unwind.prologue_count) | |
3405 | unwind.prologue_count -= ecount + 1; | |
3406 | else | |
3407 | unwind.prologue_count = 0; | |
e0c9811a JW |
3408 | } |
3409 | ||
197865e8 | 3410 | static void |
e0c9811a | 3411 | dot_restorereg (dummy) |
2434f565 | 3412 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3413 | { |
3414 | unsigned int ab, reg; | |
3415 | expressionS e; | |
3416 | ||
75e09913 JB |
3417 | if (!in_procedure ("restorereg")) |
3418 | return; | |
3419 | ||
e0c9811a JW |
3420 | parse_operand (&e); |
3421 | ||
3422 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3423 | { | |
3424 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3425 | return; | |
3426 | } | |
3427 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3428 | } | |
3429 | ||
197865e8 | 3430 | static void |
e0c9811a | 3431 | dot_restorereg_p (dummy) |
2434f565 | 3432 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3433 | { |
3434 | unsigned int qp, ab, reg; | |
3435 | expressionS e1, e2; | |
3436 | int sep; | |
3437 | ||
75e09913 JB |
3438 | if (!in_procedure ("restorereg.p")) |
3439 | return; | |
3440 | ||
e0c9811a JW |
3441 | sep = parse_operand (&e1); |
3442 | if (sep != ',') | |
3443 | { | |
3444 | as_bad ("No second operand to .restorereg.p"); | |
3445 | return; | |
3446 | } | |
3447 | ||
3448 | parse_operand (&e2); | |
3449 | ||
3450 | qp = e1.X_add_number - REG_P; | |
3451 | if (e1.X_op != O_register || qp > 63) | |
3452 | { | |
3453 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3454 | return; | |
3455 | } | |
3456 | ||
3457 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3458 | { | |
3459 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3460 | return; | |
3461 | } | |
3462 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3463 | } |
3464 | ||
2d6ed997 L |
3465 | static char *special_linkonce_name[] = |
3466 | { | |
3467 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3468 | }; | |
3469 | ||
3470 | static void | |
da9f89d4 | 3471 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3472 | { |
3473 | /* | |
3474 | Use a slightly ugly scheme to derive the unwind section names from | |
3475 | the text section name: | |
3476 | ||
3477 | text sect. unwind table sect. | |
3478 | name: name: comments: | |
3479 | ---------- ----------------- -------------------------------- | |
3480 | .text .IA_64.unwind | |
3481 | .text.foo .IA_64.unwind.text.foo | |
3482 | .foo .IA_64.unwind.foo | |
3483 | .gnu.linkonce.t.foo | |
3484 | .gnu.linkonce.ia64unw.foo | |
3485 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3486 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3487 | ||
3488 | This mapping is done so that: | |
3489 | ||
3490 | (a) An object file with unwind info only in .text will use | |
3491 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3492 | This follows the letter of the ABI and also ensures backwards | |
3493 | compatibility with older toolchains. | |
3494 | ||
3495 | (b) An object file with unwind info in multiple text sections | |
3496 | will use separate unwind sections for each text section. | |
3497 | This allows us to properly set the "sh_info" and "sh_link" | |
3498 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3499 | lets GNU ld support programs with multiple segments | |
3500 | containing unwind info (as might be the case for certain | |
3501 | embedded applications). | |
3502 | ||
3503 | (c) An error is issued if there would be a name clash. | |
3504 | */ | |
3505 | ||
3506 | const char *text_name, *sec_text_name; | |
3507 | char *sec_name; | |
3508 | const char *prefix = special_section_name [sec_index]; | |
3509 | const char *suffix; | |
3510 | size_t prefix_len, suffix_len, sec_name_len; | |
3511 | ||
3512 | sec_text_name = segment_name (text_seg); | |
3513 | text_name = sec_text_name; | |
3514 | if (strncmp (text_name, "_info", 5) == 0) | |
3515 | { | |
3516 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3517 | text_name); | |
3518 | ignore_rest_of_line (); | |
3519 | return; | |
3520 | } | |
3521 | if (strcmp (text_name, ".text") == 0) | |
3522 | text_name = ""; | |
3523 | ||
3524 | /* Build the unwind section name by appending the (possibly stripped) | |
3525 | text section name to the unwind prefix. */ | |
3526 | suffix = text_name; | |
3527 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3528 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3529 | { | |
3530 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3531 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3532 | } | |
3533 | ||
3534 | prefix_len = strlen (prefix); | |
3535 | suffix_len = strlen (suffix); | |
3536 | sec_name_len = prefix_len + suffix_len; | |
3537 | sec_name = alloca (sec_name_len + 1); | |
3538 | memcpy (sec_name, prefix, prefix_len); | |
3539 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3540 | sec_name [sec_name_len] = '\0'; | |
3541 | ||
3542 | /* Handle COMDAT group. */ | |
6e3f953d L |
3543 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3544 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3545 | { |
3546 | char *section; | |
3547 | size_t len, group_name_len; | |
3548 | const char *group_name = elf_group_name (text_seg); | |
3549 | ||
3550 | if (group_name == NULL) | |
3551 | { | |
3552 | as_bad ("Group section `%s' has no group signature", | |
3553 | sec_text_name); | |
3554 | ignore_rest_of_line (); | |
3555 | return; | |
3556 | } | |
3557 | /* We have to construct a fake section directive. */ | |
3558 | group_name_len = strlen (group_name); | |
3559 | len = (sec_name_len | |
3560 | + 16 /* ,"aG",@progbits, */ | |
3561 | + group_name_len /* ,group_name */ | |
3562 | + 7); /* ,comdat */ | |
3563 | ||
3564 | section = alloca (len + 1); | |
3565 | memcpy (section, sec_name, sec_name_len); | |
3566 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3567 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3568 | memcpy (section + len - 7, ",comdat", 7); | |
3569 | section [len] = '\0'; | |
3570 | set_section (section); | |
3571 | } | |
3572 | else | |
3573 | { | |
3574 | set_section (sec_name); | |
3575 | bfd_set_section_flags (stdoutput, now_seg, | |
3576 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3577 | } | |
38ce5b11 L |
3578 | |
3579 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3580 | } |
3581 | ||
73f20958 | 3582 | static void |
2d6ed997 | 3583 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3584 | { |
73f20958 L |
3585 | int size, pad; |
3586 | unw_rec_list *list; | |
800eeca4 | 3587 | |
c97b7ef6 JW |
3588 | /* Mark the end of the unwind info, so that we can compute the size of the |
3589 | last unwind region. */ | |
3590 | add_unwind_entry (output_endp ()); | |
3591 | ||
10850f29 JW |
3592 | /* Force out pending instructions, to make sure all unwind records have |
3593 | a valid slot_number field. */ | |
3594 | ia64_flush_insns (); | |
3595 | ||
800eeca4 | 3596 | /* Generate the unwind record. */ |
73f20958 | 3597 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3598 | fixup_unw_records (list, 1); |
73f20958 L |
3599 | size = calc_record_size (list); |
3600 | ||
3601 | if (size > 0 || unwind.force_unwind_entry) | |
3602 | { | |
3603 | unwind.force_unwind_entry = 0; | |
3604 | /* pad to pointer-size boundary. */ | |
3605 | pad = size % md.pointer_size; | |
3606 | if (pad != 0) | |
3607 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3608 | /* Add 8 for the header. */ |
3609 | size += 8; | |
3610 | /* Add a pointer for the personality offset. */ | |
3611 | if (unwind.personality_routine) | |
3612 | size += md.pointer_size; | |
73f20958 | 3613 | } |
6290819d | 3614 | |
800eeca4 JW |
3615 | /* If there are unwind records, switch sections, and output the info. */ |
3616 | if (size != 0) | |
3617 | { | |
800eeca4 | 3618 | expressionS exp; |
1cd8ff38 | 3619 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3620 | |
da9f89d4 | 3621 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3622 | |
557debba JW |
3623 | /* Make sure the section has 4 byte alignment for ILP32 and |
3624 | 8 byte alignment for LP64. */ | |
3625 | frag_align (md.pointer_size_shift, 0, 0); | |
3626 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3627 | |
800eeca4 | 3628 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3629 | unwind.info = expr_build_dot (); |
73f20958 L |
3630 | |
3631 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3632 | (offsetT) (long) unwind.personality_routine, |
3633 | (char *) list); | |
91a2ae2a | 3634 | |
800eeca4 | 3635 | /* Add the personality address to the image. */ |
e0c9811a | 3636 | if (unwind.personality_routine != 0) |
542d6675 | 3637 | { |
40449e9f | 3638 | exp.X_op = O_symbol; |
e0c9811a | 3639 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3640 | exp.X_add_number = 0; |
1cd8ff38 NC |
3641 | |
3642 | if (md.flags & EF_IA_64_BE) | |
3643 | { | |
3644 | if (md.flags & EF_IA_64_ABI64) | |
3645 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3646 | else | |
3647 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3648 | } | |
40449e9f | 3649 | else |
1cd8ff38 NC |
3650 | { |
3651 | if (md.flags & EF_IA_64_ABI64) | |
3652 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3653 | else | |
3654 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3655 | } | |
3656 | ||
3657 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3658 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3659 | unwind.personality_routine = 0; |
542d6675 | 3660 | } |
800eeca4 JW |
3661 | } |
3662 | ||
6290819d | 3663 | free_saved_prologue_counts (); |
e0c9811a | 3664 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3665 | } |
3666 | ||
197865e8 | 3667 | static void |
542d6675 | 3668 | dot_handlerdata (dummy) |
2434f565 | 3669 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3670 | { |
75e09913 JB |
3671 | if (!in_procedure ("handlerdata")) |
3672 | return; | |
91a2ae2a RH |
3673 | unwind.force_unwind_entry = 1; |
3674 | ||
3675 | /* Remember which segment we're in so we can switch back after .endp */ | |
3676 | unwind.saved_text_seg = now_seg; | |
3677 | unwind.saved_text_subseg = now_subseg; | |
3678 | ||
3679 | /* Generate unwind info into unwind-info section and then leave that | |
3680 | section as the currently active one so dataXX directives go into | |
3681 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3682 | generate_unwind_image (now_seg); |
e0c9811a | 3683 | demand_empty_rest_of_line (); |
800eeca4 JW |
3684 | } |
3685 | ||
197865e8 | 3686 | static void |
800eeca4 | 3687 | dot_unwentry (dummy) |
2434f565 | 3688 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3689 | { |
75e09913 JB |
3690 | if (!in_procedure ("unwentry")) |
3691 | return; | |
91a2ae2a | 3692 | unwind.force_unwind_entry = 1; |
e0c9811a | 3693 | demand_empty_rest_of_line (); |
800eeca4 JW |
3694 | } |
3695 | ||
197865e8 | 3696 | static void |
800eeca4 | 3697 | dot_altrp (dummy) |
2434f565 | 3698 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3699 | { |
e0c9811a JW |
3700 | expressionS e; |
3701 | unsigned reg; | |
3702 | ||
75e09913 JB |
3703 | if (!in_prologue ("altrp")) |
3704 | return; | |
3705 | ||
e0c9811a JW |
3706 | parse_operand (&e); |
3707 | reg = e.X_add_number - REG_BR; | |
3708 | if (e.X_op == O_register && reg < 8) | |
3709 | add_unwind_entry (output_rp_br (reg)); | |
3710 | else | |
3711 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3712 | } |
3713 | ||
197865e8 | 3714 | static void |
e0c9811a JW |
3715 | dot_savemem (psprel) |
3716 | int psprel; | |
800eeca4 JW |
3717 | { |
3718 | expressionS e1, e2; | |
3719 | int sep; | |
3720 | int reg1, val; | |
3721 | ||
75e09913 JB |
3722 | if (!in_prologue (psprel ? "savepsp" : "savesp")) |
3723 | return; | |
3724 | ||
800eeca4 JW |
3725 | sep = parse_operand (&e1); |
3726 | if (sep != ',') | |
e0c9811a | 3727 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3728 | sep = parse_operand (&e2); |
3729 | ||
e0c9811a | 3730 | reg1 = e1.X_add_number; |
800eeca4 | 3731 | val = e2.X_add_number; |
197865e8 | 3732 | |
800eeca4 | 3733 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3734 | if (e1.X_op == O_register) |
800eeca4 JW |
3735 | { |
3736 | if (e2.X_op == O_constant) | |
3737 | { | |
3738 | switch (reg1) | |
3739 | { | |
542d6675 KH |
3740 | case REG_AR + AR_BSP: |
3741 | add_unwind_entry (output_bsp_when ()); | |
3742 | add_unwind_entry ((psprel | |
3743 | ? output_bsp_psprel | |
3744 | : output_bsp_sprel) (val)); | |
3745 | break; | |
3746 | case REG_AR + AR_BSPSTORE: | |
3747 | add_unwind_entry (output_bspstore_when ()); | |
3748 | add_unwind_entry ((psprel | |
3749 | ? output_bspstore_psprel | |
3750 | : output_bspstore_sprel) (val)); | |
3751 | break; | |
3752 | case REG_AR + AR_RNAT: | |
3753 | add_unwind_entry (output_rnat_when ()); | |
3754 | add_unwind_entry ((psprel | |
3755 | ? output_rnat_psprel | |
3756 | : output_rnat_sprel) (val)); | |
3757 | break; | |
3758 | case REG_AR + AR_UNAT: | |
3759 | add_unwind_entry (output_unat_when ()); | |
3760 | add_unwind_entry ((psprel | |
3761 | ? output_unat_psprel | |
3762 | : output_unat_sprel) (val)); | |
3763 | break; | |
3764 | case REG_AR + AR_FPSR: | |
3765 | add_unwind_entry (output_fpsr_when ()); | |
3766 | add_unwind_entry ((psprel | |
3767 | ? output_fpsr_psprel | |
3768 | : output_fpsr_sprel) (val)); | |
3769 | break; | |
3770 | case REG_AR + AR_PFS: | |
3771 | add_unwind_entry (output_pfs_when ()); | |
3772 | add_unwind_entry ((psprel | |
3773 | ? output_pfs_psprel | |
3774 | : output_pfs_sprel) (val)); | |
3775 | break; | |
3776 | case REG_AR + AR_LC: | |
3777 | add_unwind_entry (output_lc_when ()); | |
3778 | add_unwind_entry ((psprel | |
3779 | ? output_lc_psprel | |
3780 | : output_lc_sprel) (val)); | |
3781 | break; | |
3782 | case REG_BR: | |
3783 | add_unwind_entry (output_rp_when ()); | |
3784 | add_unwind_entry ((psprel | |
3785 | ? output_rp_psprel | |
3786 | : output_rp_sprel) (val)); | |
3787 | break; | |
3788 | case REG_PR: | |
3789 | add_unwind_entry (output_preds_when ()); | |
3790 | add_unwind_entry ((psprel | |
3791 | ? output_preds_psprel | |
3792 | : output_preds_sprel) (val)); | |
3793 | break; | |
3794 | case REG_PRIUNAT: | |
3795 | add_unwind_entry (output_priunat_when_mem ()); | |
3796 | add_unwind_entry ((psprel | |
3797 | ? output_priunat_psprel | |
3798 | : output_priunat_sprel) (val)); | |
3799 | break; | |
3800 | default: | |
3801 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3802 | } |
3803 | } | |
3804 | else | |
3805 | as_bad (" Second operand not a valid constant"); | |
3806 | } | |
3807 | else | |
e0c9811a | 3808 | as_bad ("First operand not a register"); |
800eeca4 JW |
3809 | } |
3810 | ||
197865e8 | 3811 | static void |
800eeca4 | 3812 | dot_saveg (dummy) |
2434f565 | 3813 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3814 | { |
3815 | expressionS e1, e2; | |
3816 | int sep; | |
75e09913 JB |
3817 | |
3818 | if (!in_prologue ("save.g")) | |
3819 | return; | |
3820 | ||
800eeca4 JW |
3821 | sep = parse_operand (&e1); |
3822 | if (sep == ',') | |
3823 | parse_operand (&e2); | |
197865e8 | 3824 | |
800eeca4 JW |
3825 | if (e1.X_op != O_constant) |
3826 | as_bad ("First operand to .save.g must be a constant."); | |
3827 | else | |
3828 | { | |
3829 | int grmask = e1.X_add_number; | |
3830 | if (sep != ',') | |
3831 | add_unwind_entry (output_gr_mem (grmask)); | |
3832 | else | |
542d6675 | 3833 | { |
800eeca4 | 3834 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3835 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3836 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3837 | else | |
3838 | as_bad ("Second operand is an invalid register."); | |
3839 | } | |
3840 | } | |
3841 | } | |
3842 | ||
197865e8 | 3843 | static void |
800eeca4 | 3844 | dot_savef (dummy) |
2434f565 | 3845 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3846 | { |
e0c9811a | 3847 | expressionS e1; |
800eeca4 | 3848 | int sep; |
75e09913 JB |
3849 | |
3850 | if (!in_prologue ("save.f")) | |
3851 | return; | |
3852 | ||
800eeca4 | 3853 | sep = parse_operand (&e1); |
197865e8 | 3854 | |
800eeca4 JW |
3855 | if (e1.X_op != O_constant) |
3856 | as_bad ("Operand to .save.f must be a constant."); | |
3857 | else | |
e0c9811a | 3858 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3859 | } |
3860 | ||
197865e8 | 3861 | static void |
800eeca4 | 3862 | dot_saveb (dummy) |
2434f565 | 3863 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3864 | { |
e0c9811a JW |
3865 | expressionS e1, e2; |
3866 | unsigned int reg; | |
3867 | unsigned char sep; | |
3868 | int brmask; | |
3869 | ||
75e09913 JB |
3870 | if (!in_prologue ("save.b")) |
3871 | return; | |
3872 | ||
800eeca4 | 3873 | sep = parse_operand (&e1); |
800eeca4 | 3874 | if (e1.X_op != O_constant) |
800eeca4 | 3875 | { |
e0c9811a JW |
3876 | as_bad ("First operand to .save.b must be a constant."); |
3877 | return; | |
800eeca4 | 3878 | } |
e0c9811a JW |
3879 | brmask = e1.X_add_number; |
3880 | ||
3881 | if (sep == ',') | |
3882 | { | |
3883 | sep = parse_operand (&e2); | |
3884 | reg = e2.X_add_number - REG_GR; | |
3885 | if (e2.X_op != O_register || reg > 127) | |
3886 | { | |
3887 | as_bad ("Second operand to .save.b must be a general register."); | |
3888 | return; | |
3889 | } | |
3890 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3891 | } | |
3892 | else | |
3893 | add_unwind_entry (output_br_mem (brmask)); | |
3894 | ||
3895 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3896 | demand_empty_rest_of_line (); |
800eeca4 JW |
3897 | } |
3898 | ||
197865e8 | 3899 | static void |
800eeca4 | 3900 | dot_savegf (dummy) |
2434f565 | 3901 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3902 | { |
3903 | expressionS e1, e2; | |
3904 | int sep; | |
75e09913 JB |
3905 | |
3906 | if (!in_prologue ("save.gf")) | |
3907 | return; | |
3908 | ||
800eeca4 JW |
3909 | sep = parse_operand (&e1); |
3910 | if (sep == ',') | |
3911 | parse_operand (&e2); | |
197865e8 | 3912 | |
800eeca4 JW |
3913 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3914 | as_bad ("Both operands of .save.gf must be constants."); | |
3915 | else | |
3916 | { | |
3917 | int grmask = e1.X_add_number; | |
3918 | int frmask = e2.X_add_number; | |
3919 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3920 | } | |
3921 | } | |
3922 | ||
197865e8 | 3923 | static void |
800eeca4 | 3924 | dot_spill (dummy) |
2434f565 | 3925 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3926 | { |
3927 | expressionS e; | |
e0c9811a JW |
3928 | unsigned char sep; |
3929 | ||
75e09913 JB |
3930 | if (!in_prologue ("spill")) |
3931 | return; | |
3932 | ||
e0c9811a JW |
3933 | sep = parse_operand (&e); |
3934 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3935 | demand_empty_rest_of_line (); |
197865e8 | 3936 | |
800eeca4 JW |
3937 | if (e.X_op != O_constant) |
3938 | as_bad ("Operand to .spill must be a constant"); | |
3939 | else | |
e0c9811a JW |
3940 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3941 | } | |
3942 | ||
3943 | static void | |
3944 | dot_spillreg (dummy) | |
2434f565 | 3945 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a | 3946 | { |
2132e3a3 AM |
3947 | int sep; |
3948 | unsigned int ab, xy, reg, treg; | |
e0c9811a JW |
3949 | expressionS e1, e2; |
3950 | ||
75e09913 JB |
3951 | if (!in_procedure ("spillreg")) |
3952 | return; | |
3953 | ||
e0c9811a JW |
3954 | sep = parse_operand (&e1); |
3955 | if (sep != ',') | |
3956 | { | |
3957 | as_bad ("No second operand to .spillreg"); | |
3958 | return; | |
3959 | } | |
3960 | ||
3961 | parse_operand (&e2); | |
3962 | ||
3963 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3964 | { |
e0c9811a JW |
3965 | as_bad ("First operand to .spillreg must be a preserved register"); |
3966 | return; | |
800eeca4 | 3967 | } |
e0c9811a JW |
3968 | |
3969 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3970 | { | |
3971 | as_bad ("Second operand to .spillreg must be a register"); | |
3972 | return; | |
3973 | } | |
3974 | ||
3975 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3976 | } | |
3977 | ||
3978 | static void | |
3979 | dot_spillmem (psprel) | |
3980 | int psprel; | |
3981 | { | |
3982 | expressionS e1, e2; | |
2132e3a3 AM |
3983 | int sep; |
3984 | unsigned int ab, reg; | |
e0c9811a | 3985 | |
75e09913 JB |
3986 | if (!in_procedure ("spillmem")) |
3987 | return; | |
3988 | ||
e0c9811a JW |
3989 | sep = parse_operand (&e1); |
3990 | if (sep != ',') | |
3991 | { | |
3992 | as_bad ("Second operand missing"); | |
3993 | return; | |
3994 | } | |
3995 | ||
3996 | parse_operand (&e2); | |
3997 | ||
3998 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3999 | { | |
4000 | as_bad ("First operand to .spill%s must be a preserved register", | |
4001 | psprel ? "psp" : "sp"); | |
4002 | return; | |
4003 | } | |
4004 | ||
4005 | if (e2.X_op != O_constant) | |
4006 | { | |
4007 | as_bad ("Second operand to .spill%s must be a constant", | |
4008 | psprel ? "psp" : "sp"); | |
4009 | return; | |
4010 | } | |
4011 | ||
4012 | if (psprel) | |
4013 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
4014 | else | |
4015 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
4016 | } | |
4017 | ||
4018 | static void | |
4019 | dot_spillreg_p (dummy) | |
2434f565 | 4020 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a | 4021 | { |
2132e3a3 AM |
4022 | int sep; |
4023 | unsigned int ab, xy, reg, treg; | |
e0c9811a JW |
4024 | expressionS e1, e2, e3; |
4025 | unsigned int qp; | |
4026 | ||
75e09913 JB |
4027 | if (!in_procedure ("spillreg.p")) |
4028 | return; | |
4029 | ||
e0c9811a JW |
4030 | sep = parse_operand (&e1); |
4031 | if (sep != ',') | |
4032 | { | |
4033 | as_bad ("No second and third operand to .spillreg.p"); | |
4034 | return; | |
4035 | } | |
4036 | ||
4037 | sep = parse_operand (&e2); | |
4038 | if (sep != ',') | |
4039 | { | |
4040 | as_bad ("No third operand to .spillreg.p"); | |
4041 | return; | |
4042 | } | |
4043 | ||
4044 | parse_operand (&e3); | |
4045 | ||
4046 | qp = e1.X_add_number - REG_P; | |
4047 | ||
4048 | if (e1.X_op != O_register || qp > 63) | |
4049 | { | |
4050 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
4051 | return; | |
4052 | } | |
4053 | ||
4054 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4055 | { | |
4056 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
4057 | return; | |
4058 | } | |
4059 | ||
4060 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
4061 | { | |
4062 | as_bad ("Third operand to .spillreg.p must be a register"); | |
4063 | return; | |
4064 | } | |
4065 | ||
4066 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
4067 | } | |
4068 | ||
4069 | static void | |
4070 | dot_spillmem_p (psprel) | |
4071 | int psprel; | |
4072 | { | |
4073 | expressionS e1, e2, e3; | |
2132e3a3 AM |
4074 | int sep; |
4075 | unsigned int ab, reg; | |
e0c9811a JW |
4076 | unsigned int qp; |
4077 | ||
75e09913 JB |
4078 | if (!in_procedure ("spillmem.p")) |
4079 | return; | |
4080 | ||
e0c9811a JW |
4081 | sep = parse_operand (&e1); |
4082 | if (sep != ',') | |
4083 | { | |
4084 | as_bad ("Second operand missing"); | |
4085 | return; | |
4086 | } | |
4087 | ||
4088 | parse_operand (&e2); | |
4089 | if (sep != ',') | |
4090 | { | |
4091 | as_bad ("Second operand missing"); | |
4092 | return; | |
4093 | } | |
4094 | ||
4095 | parse_operand (&e3); | |
4096 | ||
4097 | qp = e1.X_add_number - REG_P; | |
4098 | if (e1.X_op != O_register || qp > 63) | |
4099 | { | |
4100 | as_bad ("First operand to .spill%s_p must be a predicate", | |
4101 | psprel ? "psp" : "sp"); | |
4102 | return; | |
4103 | } | |
4104 | ||
4105 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4106 | { | |
4107 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
4108 | psprel ? "psp" : "sp"); | |
4109 | return; | |
4110 | } | |
4111 | ||
4112 | if (e3.X_op != O_constant) | |
4113 | { | |
4114 | as_bad ("Third operand to .spill%s_p must be a constant", | |
4115 | psprel ? "psp" : "sp"); | |
4116 | return; | |
4117 | } | |
4118 | ||
4119 | if (psprel) | |
fa7fda74 | 4120 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 4121 | else |
fa7fda74 | 4122 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
4123 | } |
4124 | ||
6290819d NC |
4125 | static unsigned int |
4126 | get_saved_prologue_count (lbl) | |
4127 | unsigned long lbl; | |
4128 | { | |
4129 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4130 | ||
4131 | while (lpc != NULL && lpc->label_number != lbl) | |
4132 | lpc = lpc->next; | |
4133 | ||
4134 | if (lpc != NULL) | |
4135 | return lpc->prologue_count; | |
4136 | ||
4137 | as_bad ("Missing .label_state %ld", lbl); | |
4138 | return 1; | |
4139 | } | |
4140 | ||
4141 | static void | |
4142 | save_prologue_count (lbl, count) | |
4143 | unsigned long lbl; | |
4144 | unsigned int count; | |
4145 | { | |
4146 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4147 | ||
4148 | while (lpc != NULL && lpc->label_number != lbl) | |
4149 | lpc = lpc->next; | |
4150 | ||
4151 | if (lpc != NULL) | |
4152 | lpc->prologue_count = count; | |
4153 | else | |
4154 | { | |
40449e9f | 4155 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4156 | |
4157 | new_lpc->next = unwind.saved_prologue_counts; | |
4158 | new_lpc->label_number = lbl; | |
4159 | new_lpc->prologue_count = count; | |
4160 | unwind.saved_prologue_counts = new_lpc; | |
4161 | } | |
4162 | } | |
4163 | ||
4164 | static void | |
4165 | free_saved_prologue_counts () | |
4166 | { | |
40449e9f KH |
4167 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4168 | label_prologue_count *next; | |
6290819d NC |
4169 | |
4170 | while (lpc != NULL) | |
4171 | { | |
4172 | next = lpc->next; | |
4173 | free (lpc); | |
4174 | lpc = next; | |
4175 | } | |
4176 | ||
4177 | unwind.saved_prologue_counts = NULL; | |
4178 | } | |
4179 | ||
e0c9811a JW |
4180 | static void |
4181 | dot_label_state (dummy) | |
2434f565 | 4182 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4183 | { |
4184 | expressionS e; | |
4185 | ||
75e09913 JB |
4186 | if (!in_body ("label_state")) |
4187 | return; | |
4188 | ||
e0c9811a JW |
4189 | parse_operand (&e); |
4190 | if (e.X_op != O_constant) | |
4191 | { | |
4192 | as_bad ("Operand to .label_state must be a constant"); | |
4193 | return; | |
4194 | } | |
4195 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 4196 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
4197 | } |
4198 | ||
4199 | static void | |
4200 | dot_copy_state (dummy) | |
2434f565 | 4201 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4202 | { |
4203 | expressionS e; | |
4204 | ||
75e09913 JB |
4205 | if (!in_body ("copy_state")) |
4206 | return; | |
4207 | ||
e0c9811a JW |
4208 | parse_operand (&e); |
4209 | if (e.X_op != O_constant) | |
4210 | { | |
4211 | as_bad ("Operand to .copy_state must be a constant"); | |
4212 | return; | |
4213 | } | |
4214 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 4215 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
4216 | } |
4217 | ||
197865e8 | 4218 | static void |
800eeca4 | 4219 | dot_unwabi (dummy) |
2434f565 | 4220 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4221 | { |
e0c9811a JW |
4222 | expressionS e1, e2; |
4223 | unsigned char sep; | |
4224 | ||
75e09913 JB |
4225 | if (!in_procedure ("unwabi")) |
4226 | return; | |
4227 | ||
e0c9811a JW |
4228 | sep = parse_operand (&e1); |
4229 | if (sep != ',') | |
4230 | { | |
4231 | as_bad ("Second operand to .unwabi missing"); | |
4232 | return; | |
4233 | } | |
4234 | sep = parse_operand (&e2); | |
4235 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 4236 | demand_empty_rest_of_line (); |
e0c9811a JW |
4237 | |
4238 | if (e1.X_op != O_constant) | |
4239 | { | |
4240 | as_bad ("First operand to .unwabi must be a constant"); | |
4241 | return; | |
4242 | } | |
4243 | ||
4244 | if (e2.X_op != O_constant) | |
4245 | { | |
4246 | as_bad ("Second operand to .unwabi must be a constant"); | |
4247 | return; | |
4248 | } | |
4249 | ||
4250 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
4251 | } |
4252 | ||
197865e8 | 4253 | static void |
800eeca4 | 4254 | dot_personality (dummy) |
2434f565 | 4255 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4256 | { |
4257 | char *name, *p, c; | |
75e09913 JB |
4258 | if (!in_procedure ("personality")) |
4259 | return; | |
800eeca4 JW |
4260 | SKIP_WHITESPACE (); |
4261 | name = input_line_pointer; | |
4262 | c = get_symbol_end (); | |
4263 | p = input_line_pointer; | |
e0c9811a | 4264 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4265 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4266 | *p = c; |
4267 | SKIP_WHITESPACE (); | |
4268 | demand_empty_rest_of_line (); | |
4269 | } | |
4270 | ||
4271 | static void | |
4272 | dot_proc (dummy) | |
2434f565 | 4273 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4274 | { |
4275 | char *name, *p, c; | |
4276 | symbolS *sym; | |
5656b6b8 JB |
4277 | proc_pending *pending, *last_pending; |
4278 | ||
4279 | if (unwind.proc_pending.sym) | |
4280 | { | |
4281 | (md.unwind_check == unwind_check_warning | |
4282 | ? as_warn | |
4283 | : as_bad) ("Missing .endp after previous .proc"); | |
4284 | while (unwind.proc_pending.next) | |
4285 | { | |
4286 | pending = unwind.proc_pending.next; | |
4287 | unwind.proc_pending.next = pending->next; | |
4288 | free (pending); | |
4289 | } | |
4290 | } | |
4291 | last_pending = NULL; | |
800eeca4 | 4292 | |
e0c9811a | 4293 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4294 | function symbols: */ |
800eeca4 JW |
4295 | while (1) |
4296 | { | |
4297 | SKIP_WHITESPACE (); | |
4298 | name = input_line_pointer; | |
4299 | c = get_symbol_end (); | |
4300 | p = input_line_pointer; | |
75e09913 JB |
4301 | if (!*name) |
4302 | as_bad ("Empty argument of .proc"); | |
4303 | else | |
542d6675 | 4304 | { |
75e09913 JB |
4305 | sym = symbol_find_or_make (name); |
4306 | if (S_IS_DEFINED (sym)) | |
4307 | as_bad ("`%s' was already defined", name); | |
5656b6b8 JB |
4308 | else if (!last_pending) |
4309 | { | |
4310 | unwind.proc_pending.sym = sym; | |
4311 | last_pending = &unwind.proc_pending; | |
4312 | } | |
4313 | else | |
75e09913 | 4314 | { |
5656b6b8 JB |
4315 | pending = xmalloc (sizeof (*pending)); |
4316 | pending->sym = sym; | |
4317 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4318 | } |
4319 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4320 | } |
800eeca4 JW |
4321 | *p = c; |
4322 | SKIP_WHITESPACE (); | |
4323 | if (*input_line_pointer != ',') | |
4324 | break; | |
4325 | ++input_line_pointer; | |
4326 | } | |
5656b6b8 JB |
4327 | if (!last_pending) |
4328 | { | |
4329 | unwind.proc_pending.sym = expr_build_dot (); | |
4330 | last_pending = &unwind.proc_pending; | |
4331 | } | |
4332 | last_pending->next = NULL; | |
800eeca4 JW |
4333 | demand_empty_rest_of_line (); |
4334 | ia64_do_align (16); | |
4335 | ||
75e09913 | 4336 | unwind.prologue = 0; |
33d01f33 | 4337 | unwind.prologue_count = 0; |
75e09913 JB |
4338 | unwind.body = 0; |
4339 | unwind.insn = 0; | |
e0c9811a JW |
4340 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4341 | unwind.personality_routine = 0; | |
800eeca4 JW |
4342 | } |
4343 | ||
4344 | static void | |
4345 | dot_body (dummy) | |
2434f565 | 4346 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4347 | { |
75e09913 JB |
4348 | if (!in_procedure ("body")) |
4349 | return; | |
4350 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
4351 | as_warn ("Initial .body should precede any instructions"); | |
4352 | ||
e0c9811a | 4353 | unwind.prologue = 0; |
30d25259 | 4354 | unwind.prologue_mask = 0; |
75e09913 | 4355 | unwind.body = 1; |
30d25259 | 4356 | |
800eeca4 | 4357 | add_unwind_entry (output_body ()); |
e0c9811a | 4358 | demand_empty_rest_of_line (); |
800eeca4 JW |
4359 | } |
4360 | ||
4361 | static void | |
4362 | dot_prologue (dummy) | |
2434f565 | 4363 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4364 | { |
e0c9811a | 4365 | unsigned char sep; |
2434f565 | 4366 | int mask = 0, grsave = 0; |
e0c9811a | 4367 | |
75e09913 JB |
4368 | if (!in_procedure ("prologue")) |
4369 | return; | |
4370 | if (unwind.prologue) | |
4371 | { | |
4372 | as_bad (".prologue within prologue"); | |
4373 | ignore_rest_of_line (); | |
4374 | return; | |
4375 | } | |
4376 | if (!unwind.body && unwind.insn) | |
4377 | as_warn ("Initial .prologue should precede any instructions"); | |
4378 | ||
e0c9811a | 4379 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
4380 | { |
4381 | expressionS e1, e2; | |
800eeca4 JW |
4382 | sep = parse_operand (&e1); |
4383 | if (sep != ',') | |
4384 | as_bad ("No second operand to .prologue"); | |
4385 | sep = parse_operand (&e2); | |
e0c9811a | 4386 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
c95b35a9 | 4387 | demand_empty_rest_of_line (); |
800eeca4 JW |
4388 | |
4389 | if (e1.X_op == O_constant) | |
542d6675 | 4390 | { |
30d25259 RH |
4391 | mask = e1.X_add_number; |
4392 | ||
800eeca4 | 4393 | if (e2.X_op == O_constant) |
30d25259 RH |
4394 | grsave = e2.X_add_number; |
4395 | else if (e2.X_op == O_register | |
4396 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
4397 | ; | |
800eeca4 | 4398 | else |
30d25259 RH |
4399 | as_bad ("Second operand not a constant or general register"); |
4400 | ||
4401 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
4402 | } |
4403 | else | |
4404 | as_bad ("First operand not a constant"); | |
4405 | } | |
4406 | else | |
4407 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4408 | |
4409 | unwind.prologue = 1; | |
4410 | unwind.prologue_mask = mask; | |
75e09913 | 4411 | unwind.body = 0; |
33d01f33 | 4412 | ++unwind.prologue_count; |
800eeca4 JW |
4413 | } |
4414 | ||
4415 | static void | |
4416 | dot_endp (dummy) | |
2434f565 | 4417 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4418 | { |
4419 | expressionS e; | |
44f5c83a | 4420 | int bytes_per_address; |
800eeca4 JW |
4421 | long where; |
4422 | segT saved_seg; | |
4423 | subsegT saved_subseg; | |
5656b6b8 | 4424 | proc_pending *pending; |
970d6792 | 4425 | int unwind_check = md.unwind_check; |
800eeca4 | 4426 | |
970d6792 | 4427 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4428 | if (!in_procedure ("endp")) |
4429 | return; | |
970d6792 | 4430 | md.unwind_check = unwind_check; |
75e09913 | 4431 | |
91a2ae2a RH |
4432 | if (unwind.saved_text_seg) |
4433 | { | |
4434 | saved_seg = unwind.saved_text_seg; | |
4435 | saved_subseg = unwind.saved_text_subseg; | |
4436 | unwind.saved_text_seg = NULL; | |
4437 | } | |
4438 | else | |
4439 | { | |
4440 | saved_seg = now_seg; | |
4441 | saved_subseg = now_subseg; | |
4442 | } | |
4443 | ||
800eeca4 | 4444 | insn_group_break (1, 0, 0); |
800eeca4 | 4445 | |
91a2ae2a RH |
4446 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4447 | if (!unwind.info) | |
2d6ed997 | 4448 | generate_unwind_image (saved_seg); |
800eeca4 | 4449 | |
91a2ae2a RH |
4450 | if (unwind.info || unwind.force_unwind_entry) |
4451 | { | |
75e09913 JB |
4452 | symbolS *proc_end; |
4453 | ||
91a2ae2a | 4454 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4455 | proc_end = expr_build_dot (); |
5e7474a7 | 4456 | |
da9f89d4 | 4457 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4458 | |
557debba JW |
4459 | /* Make sure that section has 4 byte alignment for ILP32 and |
4460 | 8 byte alignment for LP64. */ | |
4461 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4462 | |
557debba JW |
4463 | /* Need space for 3 pointers for procedure start, procedure end, |
4464 | and unwind info. */ | |
6baf2b51 | 4465 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4466 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4467 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4468 | |
40449e9f | 4469 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4470 | e.X_op = O_pseudo_fixup; |
4471 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4472 | e.X_add_number = 0; | |
5656b6b8 JB |
4473 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4474 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4475 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4476 | S_GET_VALUE (unwind.proc_pending.sym), | |
4477 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4478 | else |
5656b6b8 | 4479 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4480 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4481 | |
800eeca4 JW |
4482 | e.X_op = O_pseudo_fixup; |
4483 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4484 | e.X_add_number = 0; | |
75e09913 | 4485 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4486 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4487 | bytes_per_address, &e); | |
4488 | ||
4489 | if (unwind.info) | |
4490 | { | |
4491 | e.X_op = O_pseudo_fixup; | |
4492 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4493 | e.X_add_number = 0; | |
4494 | e.X_add_symbol = unwind.info; | |
4495 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4496 | bytes_per_address, &e); | |
4497 | } | |
91a2ae2a | 4498 | } |
800eeca4 | 4499 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4500 | |
5656b6b8 JB |
4501 | /* Set symbol sizes. */ |
4502 | pending = &unwind.proc_pending; | |
4503 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4504 | { |
5656b6b8 | 4505 | do |
75e09913 | 4506 | { |
5656b6b8 JB |
4507 | symbolS *sym = pending->sym; |
4508 | ||
4509 | if (!S_IS_DEFINED (sym)) | |
4510 | as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym)); | |
4511 | else if (S_GET_SIZE (sym) == 0 | |
4512 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4513 | { |
75e09913 JB |
4514 | fragS *frag = symbol_get_frag (sym); |
4515 | ||
5656b6b8 | 4516 | if (frag) |
c538998c | 4517 | { |
75e09913 JB |
4518 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4519 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4520 | else | |
4521 | { | |
4522 | symbol_get_obj (sym)->size = | |
4523 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4524 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4525 | symbol_get_obj (sym)->size->X_add_symbol | |
4526 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4527 | frag_now_fix (), frag_now); | |
4528 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4529 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4530 | } | |
c538998c JJ |
4531 | } |
4532 | } | |
5656b6b8 JB |
4533 | } while ((pending = pending->next) != NULL); |
4534 | } | |
4535 | ||
4536 | /* Parse names of main and alternate entry points. */ | |
4537 | while (1) | |
4538 | { | |
4539 | char *name, *p, c; | |
4540 | ||
4541 | SKIP_WHITESPACE (); | |
4542 | name = input_line_pointer; | |
4543 | c = get_symbol_end (); | |
4544 | p = input_line_pointer; | |
4545 | if (!*name) | |
4546 | (md.unwind_check == unwind_check_warning | |
4547 | ? as_warn | |
4548 | : as_bad) ("Empty argument of .endp"); | |
4549 | else | |
4550 | { | |
4551 | symbolS *sym = symbol_find (name); | |
4552 | ||
4553 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4554 | { | |
4555 | if (sym == pending->sym) | |
4556 | { | |
4557 | pending->sym = NULL; | |
4558 | break; | |
4559 | } | |
4560 | } | |
4561 | if (!sym || !pending) | |
4562 | as_warn ("`%s' was not specified with previous .proc", name); | |
c538998c JJ |
4563 | } |
4564 | *p = c; | |
4565 | SKIP_WHITESPACE (); | |
4566 | if (*input_line_pointer != ',') | |
4567 | break; | |
4568 | ++input_line_pointer; | |
4569 | } | |
4570 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4571 | |
4572 | /* Deliberately only checking for the main entry point here; the | |
4573 | language spec even says all arguments to .endp are ignored. */ | |
4574 | if (unwind.proc_pending.sym | |
4575 | && S_GET_NAME (unwind.proc_pending.sym) | |
4576 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
4577 | as_warn ("`%s' should be an operand to this .endp", | |
4578 | S_GET_NAME (unwind.proc_pending.sym)); | |
4579 | while (unwind.proc_pending.next) | |
4580 | { | |
4581 | pending = unwind.proc_pending.next; | |
4582 | unwind.proc_pending.next = pending->next; | |
4583 | free (pending); | |
4584 | } | |
4585 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4586 | } |
4587 | ||
4588 | static void | |
4589 | dot_template (template) | |
4590 | int template; | |
4591 | { | |
4592 | CURR_SLOT.user_template = template; | |
4593 | } | |
4594 | ||
4595 | static void | |
4596 | dot_regstk (dummy) | |
2434f565 | 4597 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4598 | { |
4599 | int ins, locs, outs, rots; | |
4600 | ||
4601 | if (is_it_end_of_statement ()) | |
4602 | ins = locs = outs = rots = 0; | |
4603 | else | |
4604 | { | |
4605 | ins = get_absolute_expression (); | |
4606 | if (*input_line_pointer++ != ',') | |
4607 | goto err; | |
4608 | locs = get_absolute_expression (); | |
4609 | if (*input_line_pointer++ != ',') | |
4610 | goto err; | |
4611 | outs = get_absolute_expression (); | |
4612 | if (*input_line_pointer++ != ',') | |
4613 | goto err; | |
4614 | rots = get_absolute_expression (); | |
4615 | } | |
4616 | set_regstack (ins, locs, outs, rots); | |
4617 | return; | |
4618 | ||
4619 | err: | |
4620 | as_bad ("Comma expected"); | |
4621 | ignore_rest_of_line (); | |
4622 | } | |
4623 | ||
4624 | static void | |
4625 | dot_rot (type) | |
4626 | int type; | |
4627 | { | |
4628 | unsigned num_regs, num_alloced = 0; | |
4629 | struct dynreg **drpp, *dr; | |
4630 | int ch, base_reg = 0; | |
4631 | char *name, *start; | |
4632 | size_t len; | |
4633 | ||
4634 | switch (type) | |
4635 | { | |
4636 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4637 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4638 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4639 | default: break; | |
4640 | } | |
4641 | ||
542d6675 | 4642 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4643 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4644 | { | |
4645 | hash_delete (md.dynreg_hash, dr->name); | |
20b36a95 | 4646 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4647 | dr->num_regs = 0; |
4648 | } | |
4649 | ||
4650 | drpp = &md.dynreg[type]; | |
4651 | while (1) | |
4652 | { | |
4653 | start = input_line_pointer; | |
4654 | ch = get_symbol_end (); | |
20b36a95 | 4655 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4656 | *input_line_pointer = ch; |
800eeca4 JW |
4657 | |
4658 | SKIP_WHITESPACE (); | |
4659 | if (*input_line_pointer != '[') | |
4660 | { | |
4661 | as_bad ("Expected '['"); | |
4662 | goto err; | |
4663 | } | |
4664 | ++input_line_pointer; /* skip '[' */ | |
4665 | ||
4666 | num_regs = get_absolute_expression (); | |
4667 | ||
4668 | if (*input_line_pointer++ != ']') | |
4669 | { | |
4670 | as_bad ("Expected ']'"); | |
4671 | goto err; | |
4672 | } | |
4673 | SKIP_WHITESPACE (); | |
4674 | ||
4675 | num_alloced += num_regs; | |
4676 | switch (type) | |
4677 | { | |
4678 | case DYNREG_GR: | |
4679 | if (num_alloced > md.rot.num_regs) | |
4680 | { | |
4681 | as_bad ("Used more than the declared %d rotating registers", | |
4682 | md.rot.num_regs); | |
4683 | goto err; | |
4684 | } | |
4685 | break; | |
4686 | case DYNREG_FR: | |
4687 | if (num_alloced > 96) | |
4688 | { | |
4689 | as_bad ("Used more than the available 96 rotating registers"); | |
4690 | goto err; | |
4691 | } | |
4692 | break; | |
4693 | case DYNREG_PR: | |
4694 | if (num_alloced > 48) | |
4695 | { | |
4696 | as_bad ("Used more than the available 48 rotating registers"); | |
4697 | goto err; | |
4698 | } | |
4699 | break; | |
4700 | ||
4701 | default: | |
4702 | break; | |
4703 | } | |
4704 | ||
800eeca4 JW |
4705 | if (!*drpp) |
4706 | { | |
4707 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4708 | memset (*drpp, 0, sizeof (*dr)); | |
4709 | } | |
4710 | ||
20b36a95 JB |
4711 | name = obstack_alloc (¬es, len + 1); |
4712 | memcpy (name, start, len); | |
4713 | name[len] = '\0'; | |
4714 | ||
800eeca4 JW |
4715 | dr = *drpp; |
4716 | dr->name = name; | |
4717 | dr->num_regs = num_regs; | |
4718 | dr->base = base_reg; | |
4719 | drpp = &dr->next; | |
4720 | base_reg += num_regs; | |
4721 | ||
4722 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4723 | { | |
4724 | as_bad ("Attempt to redefine register set `%s'", name); | |
20b36a95 | 4725 | obstack_free (¬es, name); |
800eeca4 JW |
4726 | goto err; |
4727 | } | |
4728 | ||
4729 | if (*input_line_pointer != ',') | |
4730 | break; | |
4731 | ++input_line_pointer; /* skip comma */ | |
4732 | SKIP_WHITESPACE (); | |
4733 | } | |
4734 | demand_empty_rest_of_line (); | |
4735 | return; | |
4736 | ||
4737 | err: | |
4738 | ignore_rest_of_line (); | |
4739 | } | |
4740 | ||
4741 | static void | |
4742 | dot_byteorder (byteorder) | |
4743 | int byteorder; | |
4744 | { | |
10a98291 L |
4745 | segment_info_type *seginfo = seg_info (now_seg); |
4746 | ||
4747 | if (byteorder == -1) | |
4748 | { | |
4749 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4750 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4751 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4752 | } | |
4753 | else | |
4754 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4755 | ||
4756 | if (target_big_endian != byteorder) | |
4757 | { | |
4758 | target_big_endian = byteorder; | |
4759 | if (target_big_endian) | |
4760 | { | |
4761 | ia64_number_to_chars = number_to_chars_bigendian; | |
4762 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4763 | } | |
4764 | else | |
4765 | { | |
4766 | ia64_number_to_chars = number_to_chars_littleendian; | |
4767 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4768 | } | |
4769 | } | |
800eeca4 JW |
4770 | } |
4771 | ||
4772 | static void | |
4773 | dot_psr (dummy) | |
2434f565 | 4774 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4775 | { |
4776 | char *option; | |
4777 | int ch; | |
4778 | ||
4779 | while (1) | |
4780 | { | |
4781 | option = input_line_pointer; | |
4782 | ch = get_symbol_end (); | |
4783 | if (strcmp (option, "lsb") == 0) | |
4784 | md.flags &= ~EF_IA_64_BE; | |
4785 | else if (strcmp (option, "msb") == 0) | |
4786 | md.flags |= EF_IA_64_BE; | |
4787 | else if (strcmp (option, "abi32") == 0) | |
4788 | md.flags &= ~EF_IA_64_ABI64; | |
4789 | else if (strcmp (option, "abi64") == 0) | |
4790 | md.flags |= EF_IA_64_ABI64; | |
4791 | else | |
4792 | as_bad ("Unknown psr option `%s'", option); | |
4793 | *input_line_pointer = ch; | |
4794 | ||
4795 | SKIP_WHITESPACE (); | |
4796 | if (*input_line_pointer != ',') | |
4797 | break; | |
4798 | ||
4799 | ++input_line_pointer; | |
4800 | SKIP_WHITESPACE (); | |
4801 | } | |
4802 | demand_empty_rest_of_line (); | |
4803 | } | |
4804 | ||
800eeca4 JW |
4805 | static void |
4806 | dot_ln (dummy) | |
2434f565 | 4807 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4808 | { |
4809 | new_logical_line (0, get_absolute_expression ()); | |
4810 | demand_empty_rest_of_line (); | |
4811 | } | |
4812 | ||
ef6a2b41 JB |
4813 | static void |
4814 | cross_section (ref, cons, ua) | |
4815 | int ref; | |
4816 | void (*cons) PARAMS((int)); | |
4817 | int ua; | |
800eeca4 | 4818 | { |
ef6a2b41 JB |
4819 | char *start, *end; |
4820 | int saved_auto_align; | |
4821 | unsigned int section_count; | |
800eeca4 JW |
4822 | |
4823 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4824 | start = input_line_pointer; |
4825 | if (*start == '"') | |
4826 | { | |
4827 | int len; | |
4828 | char *name; | |
4829 | ||
b3f19c14 | 4830 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4831 | obstack_free(¬es, name); |
4832 | if (!name) | |
4833 | { | |
4834 | ignore_rest_of_line (); | |
4835 | return; | |
4836 | } | |
4837 | } | |
b3f19c14 | 4838 | else |
800eeca4 | 4839 | { |
b3f19c14 JB |
4840 | char c = get_symbol_end (); |
4841 | ||
4842 | if (input_line_pointer == start) | |
4843 | { | |
4844 | as_bad ("Missing section name"); | |
4845 | ignore_rest_of_line (); | |
ef6a2b41 | 4846 | return; |
b3f19c14 | 4847 | } |
b3f19c14 | 4848 | *input_line_pointer = c; |
800eeca4 | 4849 | } |
ef6a2b41 | 4850 | end = input_line_pointer; |
800eeca4 JW |
4851 | SKIP_WHITESPACE (); |
4852 | if (*input_line_pointer != ',') | |
4853 | { | |
4854 | as_bad ("Comma expected after section name"); | |
4855 | ignore_rest_of_line (); | |
ef6a2b41 | 4856 | return; |
800eeca4 | 4857 | } |
ef6a2b41 JB |
4858 | *end = '\0'; |
4859 | end = input_line_pointer + 1; /* skip comma */ | |
4860 | input_line_pointer = start; | |
4861 | md.keep_pending_output = 1; | |
4862 | section_count = bfd_count_sections(stdoutput); | |
4863 | obj_elf_section (0); | |
4864 | if (section_count != bfd_count_sections(stdoutput)) | |
4865 | as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."); | |
4866 | input_line_pointer = end; | |
4867 | saved_auto_align = md.auto_align; | |
4868 | if (ua) | |
4869 | md.auto_align = 0; | |
4870 | (*cons) (ref); | |
4871 | if (ua) | |
4872 | md.auto_align = saved_auto_align; | |
4873 | obj_elf_previous (0); | |
4874 | md.keep_pending_output = 0; | |
800eeca4 JW |
4875 | } |
4876 | ||
4877 | static void | |
4878 | dot_xdata (size) | |
4879 | int size; | |
4880 | { | |
ef6a2b41 | 4881 | cross_section (size, cons, 0); |
800eeca4 JW |
4882 | } |
4883 | ||
4884 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4885 | |
800eeca4 JW |
4886 | static void |
4887 | stmt_float_cons (kind) | |
4888 | int kind; | |
4889 | { | |
165a7f90 | 4890 | size_t alignment; |
800eeca4 JW |
4891 | |
4892 | switch (kind) | |
4893 | { | |
165a7f90 L |
4894 | case 'd': |
4895 | alignment = 8; | |
4896 | break; | |
4897 | ||
4898 | case 'x': | |
4899 | case 'X': | |
4900 | alignment = 16; | |
4901 | break; | |
800eeca4 JW |
4902 | |
4903 | case 'f': | |
4904 | default: | |
165a7f90 | 4905 | alignment = 4; |
800eeca4 JW |
4906 | break; |
4907 | } | |
165a7f90 | 4908 | ia64_do_align (alignment); |
800eeca4 JW |
4909 | float_cons (kind); |
4910 | } | |
4911 | ||
4912 | static void | |
4913 | stmt_cons_ua (size) | |
4914 | int size; | |
4915 | { | |
4916 | int saved_auto_align = md.auto_align; | |
4917 | ||
4918 | md.auto_align = 0; | |
4919 | cons (size); | |
4920 | md.auto_align = saved_auto_align; | |
4921 | } | |
4922 | ||
4923 | static void | |
4924 | dot_xfloat_cons (kind) | |
4925 | int kind; | |
4926 | { | |
ef6a2b41 | 4927 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4928 | } |
4929 | ||
4930 | static void | |
4931 | dot_xstringer (zero) | |
4932 | int zero; | |
4933 | { | |
ef6a2b41 | 4934 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4935 | } |
4936 | ||
4937 | static void | |
4938 | dot_xdata_ua (size) | |
4939 | int size; | |
4940 | { | |
ef6a2b41 | 4941 | cross_section (size, cons, 1); |
800eeca4 JW |
4942 | } |
4943 | ||
4944 | static void | |
4945 | dot_xfloat_cons_ua (kind) | |
4946 | int kind; | |
4947 | { | |
ef6a2b41 | 4948 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4949 | } |
4950 | ||
4951 | /* .reg.val <regname>,value */ | |
542d6675 | 4952 | |
800eeca4 JW |
4953 | static void |
4954 | dot_reg_val (dummy) | |
2434f565 | 4955 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4956 | { |
4957 | expressionS reg; | |
4958 | ||
4959 | expression (®); | |
4960 | if (reg.X_op != O_register) | |
4961 | { | |
4962 | as_bad (_("Register name expected")); | |
4963 | ignore_rest_of_line (); | |
4964 | } | |
4965 | else if (*input_line_pointer++ != ',') | |
4966 | { | |
4967 | as_bad (_("Comma expected")); | |
4968 | ignore_rest_of_line (); | |
4969 | } | |
197865e8 | 4970 | else |
800eeca4 JW |
4971 | { |
4972 | valueT value = get_absolute_expression (); | |
4973 | int regno = reg.X_add_number; | |
a66d2bb7 | 4974 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4975 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4976 | else |
542d6675 KH |
4977 | { |
4978 | gr_values[regno - REG_GR].known = 1; | |
4979 | gr_values[regno - REG_GR].value = value; | |
4980 | gr_values[regno - REG_GR].path = md.path; | |
4981 | } | |
800eeca4 JW |
4982 | } |
4983 | demand_empty_rest_of_line (); | |
4984 | } | |
4985 | ||
5e819f9c JW |
4986 | /* |
4987 | .serialize.data | |
4988 | .serialize.instruction | |
4989 | */ | |
4990 | static void | |
4991 | dot_serialize (type) | |
4992 | int type; | |
4993 | { | |
4994 | insn_group_break (0, 0, 0); | |
4995 | if (type) | |
4996 | instruction_serialization (); | |
4997 | else | |
4998 | data_serialization (); | |
4999 | insn_group_break (0, 0, 0); | |
5000 | demand_empty_rest_of_line (); | |
5001 | } | |
5002 | ||
197865e8 | 5003 | /* select dv checking mode |
800eeca4 JW |
5004 | .auto |
5005 | .explicit | |
5006 | .default | |
5007 | ||
197865e8 | 5008 | A stop is inserted when changing modes |
800eeca4 | 5009 | */ |
542d6675 | 5010 | |
800eeca4 JW |
5011 | static void |
5012 | dot_dv_mode (type) | |
542d6675 | 5013 | int type; |
800eeca4 JW |
5014 | { |
5015 | if (md.manual_bundling) | |
5016 | as_warn (_("Directive invalid within a bundle")); | |
5017 | ||
5018 | if (type == 'E' || type == 'A') | |
5019 | md.mode_explicitly_set = 0; | |
5020 | else | |
5021 | md.mode_explicitly_set = 1; | |
5022 | ||
5023 | md.detect_dv = 1; | |
5024 | switch (type) | |
5025 | { | |
5026 | case 'A': | |
5027 | case 'a': | |
5028 | if (md.explicit_mode) | |
542d6675 | 5029 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5030 | md.explicit_mode = 0; |
5031 | break; | |
5032 | case 'E': | |
5033 | case 'e': | |
5034 | if (!md.explicit_mode) | |
542d6675 | 5035 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5036 | md.explicit_mode = 1; |
5037 | break; | |
5038 | default: | |
5039 | case 'd': | |
5040 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5041 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5042 | md.explicit_mode = md.default_explicit_mode; |
5043 | md.mode_explicitly_set = 0; | |
5044 | break; | |
5045 | } | |
5046 | } | |
5047 | ||
5048 | static void | |
5049 | print_prmask (mask) | |
542d6675 | 5050 | valueT mask; |
800eeca4 JW |
5051 | { |
5052 | int regno; | |
5053 | char *comma = ""; | |
542d6675 | 5054 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5055 | { |
542d6675 KH |
5056 | if (mask & ((valueT) 1 << regno)) |
5057 | { | |
5058 | fprintf (stderr, "%s p%d", comma, regno); | |
5059 | comma = ","; | |
5060 | } | |
800eeca4 JW |
5061 | } |
5062 | } | |
5063 | ||
5064 | /* | |
05ee4b0f JB |
5065 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5066 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5067 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5068 | .pred.safe_across_calls p1 [, p2 [,...]] |
5069 | */ | |
542d6675 | 5070 | |
800eeca4 JW |
5071 | static void |
5072 | dot_pred_rel (type) | |
542d6675 | 5073 | int type; |
800eeca4 JW |
5074 | { |
5075 | valueT mask = 0; | |
5076 | int count = 0; | |
5077 | int p1 = -1, p2 = -1; | |
5078 | ||
5079 | if (type == 0) | |
5080 | { | |
05ee4b0f | 5081 | if (*input_line_pointer == '"') |
542d6675 KH |
5082 | { |
5083 | int len; | |
5084 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5085 | |
542d6675 KH |
5086 | if (strcmp (form, "mutex") == 0) |
5087 | type = 'm'; | |
5088 | else if (strcmp (form, "clear") == 0) | |
5089 | type = 'c'; | |
5090 | else if (strcmp (form, "imply") == 0) | |
5091 | type = 'i'; | |
05ee4b0f JB |
5092 | obstack_free (¬es, form); |
5093 | } | |
5094 | else if (*input_line_pointer == '@') | |
5095 | { | |
5096 | char *form = ++input_line_pointer; | |
5097 | char c = get_symbol_end(); | |
5098 | ||
5099 | if (strcmp (form, "mutex") == 0) | |
5100 | type = 'm'; | |
5101 | else if (strcmp (form, "clear") == 0) | |
5102 | type = 'c'; | |
5103 | else if (strcmp (form, "imply") == 0) | |
5104 | type = 'i'; | |
5105 | *input_line_pointer = c; | |
5106 | } | |
5107 | else | |
5108 | { | |
5109 | as_bad (_("Missing predicate relation type")); | |
5110 | ignore_rest_of_line (); | |
5111 | return; | |
5112 | } | |
5113 | if (type == 0) | |
5114 | { | |
5115 | as_bad (_("Unrecognized predicate relation type")); | |
5116 | ignore_rest_of_line (); | |
5117 | return; | |
542d6675 | 5118 | } |
800eeca4 | 5119 | if (*input_line_pointer == ',') |
542d6675 | 5120 | ++input_line_pointer; |
800eeca4 JW |
5121 | SKIP_WHITESPACE (); |
5122 | } | |
5123 | ||
5124 | SKIP_WHITESPACE (); | |
5125 | while (1) | |
5126 | { | |
20b36a95 | 5127 | valueT bits = 1; |
800eeca4 | 5128 | int regno; |
20b36a95 JB |
5129 | expressionS pr, *pr1, *pr2; |
5130 | ||
5131 | expression (&pr); | |
5132 | if (pr.X_op == O_register | |
5133 | && pr.X_add_number >= REG_P | |
5134 | && pr.X_add_number <= REG_P + 63) | |
5135 | { | |
5136 | regno = pr.X_add_number - REG_P; | |
5137 | bits <<= regno; | |
5138 | count++; | |
5139 | if (p1 == -1) | |
5140 | p1 = regno; | |
5141 | else if (p2 == -1) | |
5142 | p2 = regno; | |
5143 | } | |
5144 | else if (type != 'i' | |
5145 | && pr.X_op == O_subtract | |
5146 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5147 | && pr1->X_op == O_register | |
5148 | && pr1->X_add_number >= REG_P | |
5149 | && pr1->X_add_number <= REG_P + 63 | |
5150 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5151 | && pr2->X_op == O_register | |
5152 | && pr2->X_add_number >= REG_P | |
5153 | && pr2->X_add_number <= REG_P + 63) | |
5154 | { | |
5155 | /* It's a range. */ | |
5156 | int stop; | |
5157 | ||
5158 | regno = pr1->X_add_number - REG_P; | |
5159 | stop = pr2->X_add_number - REG_P; | |
5160 | if (regno >= stop) | |
542d6675 KH |
5161 | { |
5162 | as_bad (_("Bad register range")); | |
5163 | ignore_rest_of_line (); | |
5164 | return; | |
5165 | } | |
20b36a95 JB |
5166 | bits = ((bits << stop) << 1) - (bits << regno); |
5167 | count += stop - regno + 1; | |
5168 | } | |
5169 | else | |
5170 | { | |
5171 | as_bad (_("Predicate register expected")); | |
5172 | ignore_rest_of_line (); | |
5173 | return; | |
542d6675 | 5174 | } |
20b36a95 JB |
5175 | if (mask & bits) |
5176 | as_warn (_("Duplicate predicate register ignored")); | |
5177 | mask |= bits; | |
800eeca4 | 5178 | if (*input_line_pointer != ',') |
542d6675 | 5179 | break; |
800eeca4 JW |
5180 | ++input_line_pointer; |
5181 | SKIP_WHITESPACE (); | |
5182 | } | |
5183 | ||
5184 | switch (type) | |
5185 | { | |
5186 | case 'c': | |
5187 | if (count == 0) | |
542d6675 | 5188 | mask = ~(valueT) 0; |
800eeca4 | 5189 | clear_qp_mutex (mask); |
197865e8 | 5190 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5191 | break; |
5192 | case 'i': | |
5193 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5194 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5195 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5196 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5197 | else |
542d6675 | 5198 | add_qp_imply (p1, p2); |
800eeca4 JW |
5199 | break; |
5200 | case 'm': | |
5201 | if (count < 2) | |
542d6675 KH |
5202 | { |
5203 | as_bad (_("At least two PR arguments expected")); | |
5204 | break; | |
5205 | } | |
800eeca4 | 5206 | else if (mask & 1) |
542d6675 KH |
5207 | { |
5208 | as_bad (_("Use of p0 is not valid in this context")); | |
5209 | break; | |
5210 | } | |
800eeca4 JW |
5211 | add_qp_mutex (mask); |
5212 | break; | |
5213 | case 's': | |
5214 | /* note that we don't override any existing relations */ | |
5215 | if (count == 0) | |
542d6675 KH |
5216 | { |
5217 | as_bad (_("At least one PR argument expected")); | |
5218 | break; | |
5219 | } | |
800eeca4 | 5220 | if (md.debug_dv) |
542d6675 KH |
5221 | { |
5222 | fprintf (stderr, "Safe across calls: "); | |
5223 | print_prmask (mask); | |
5224 | fprintf (stderr, "\n"); | |
5225 | } | |
800eeca4 JW |
5226 | qp_safe_across_calls = mask; |
5227 | break; | |
5228 | } | |
5229 | demand_empty_rest_of_line (); | |
5230 | } | |
5231 | ||
5232 | /* .entry label [, label [, ...]] | |
5233 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5234 | Otherwise, only global labels are considered entry points. */ |
5235 | ||
800eeca4 JW |
5236 | static void |
5237 | dot_entry (dummy) | |
2434f565 | 5238 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5239 | { |
5240 | const char *err; | |
5241 | char *name; | |
5242 | int c; | |
5243 | symbolS *symbolP; | |
5244 | ||
5245 | do | |
5246 | { | |
5247 | name = input_line_pointer; | |
5248 | c = get_symbol_end (); | |
5249 | symbolP = symbol_find_or_make (name); | |
5250 | ||
5251 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
5252 | if (err) | |
542d6675 KH |
5253 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5254 | name, err); | |
800eeca4 JW |
5255 | |
5256 | *input_line_pointer = c; | |
5257 | SKIP_WHITESPACE (); | |
5258 | c = *input_line_pointer; | |
5259 | if (c == ',') | |
5260 | { | |
5261 | input_line_pointer++; | |
5262 | SKIP_WHITESPACE (); | |
5263 | if (*input_line_pointer == '\n') | |
5264 | c = '\n'; | |
5265 | } | |
5266 | } | |
5267 | while (c == ','); | |
5268 | ||
5269 | demand_empty_rest_of_line (); | |
5270 | } | |
5271 | ||
197865e8 | 5272 | /* .mem.offset offset, base |
542d6675 KH |
5273 | "base" is used to distinguish between offsets from a different base. */ |
5274 | ||
800eeca4 JW |
5275 | static void |
5276 | dot_mem_offset (dummy) | |
2434f565 | 5277 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5278 | { |
5279 | md.mem_offset.hint = 1; | |
5280 | md.mem_offset.offset = get_absolute_expression (); | |
5281 | if (*input_line_pointer != ',') | |
5282 | { | |
5283 | as_bad (_("Comma expected")); | |
5284 | ignore_rest_of_line (); | |
5285 | return; | |
5286 | } | |
5287 | ++input_line_pointer; | |
5288 | md.mem_offset.base = get_absolute_expression (); | |
5289 | demand_empty_rest_of_line (); | |
5290 | } | |
5291 | ||
542d6675 | 5292 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5293 | const pseudo_typeS md_pseudo_table[] = |
5294 | { | |
5295 | { "radix", dot_radix, 0 }, | |
5296 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5297 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5298 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5299 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5300 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5301 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5302 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5303 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5304 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5305 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5306 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5307 | { "proc", dot_proc, 0 }, |
5308 | { "body", dot_body, 0 }, | |
5309 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5310 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5311 | |
5312 | { "fframe", dot_fframe, 0 }, | |
5313 | { "vframe", dot_vframe, 0 }, | |
5314 | { "vframesp", dot_vframesp, 0 }, | |
5315 | { "vframepsp", dot_vframepsp, 0 }, | |
5316 | { "save", dot_save, 0 }, | |
5317 | { "restore", dot_restore, 0 }, | |
5318 | { "restorereg", dot_restorereg, 0 }, | |
5319 | { "restorereg.p", dot_restorereg_p, 0 }, | |
5320 | { "handlerdata", dot_handlerdata, 0 }, | |
5321 | { "unwentry", dot_unwentry, 0 }, | |
5322 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5323 | { "savesp", dot_savemem, 0 }, |
5324 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5325 | { "save.g", dot_saveg, 0 }, |
5326 | { "save.f", dot_savef, 0 }, | |
5327 | { "save.b", dot_saveb, 0 }, | |
5328 | { "save.gf", dot_savegf, 0 }, | |
5329 | { "spill", dot_spill, 0 }, | |
5330 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5331 | { "spillsp", dot_spillmem, 0 }, |
5332 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 5333 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
5334 | { "spillsp.p", dot_spillmem_p, 0 }, |
5335 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
5336 | { "label_state", dot_label_state, 0 }, |
5337 | { "copy_state", dot_copy_state, 0 }, | |
5338 | { "unwabi", dot_unwabi, 0 }, | |
5339 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5340 | { "mii", dot_template, 0x0 }, |
5341 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5342 | { "mlx", dot_template, 0x2 }, | |
5343 | { "mmi", dot_template, 0x4 }, | |
5344 | { "mfi", dot_template, 0x6 }, | |
5345 | { "mmf", dot_template, 0x7 }, | |
5346 | { "mib", dot_template, 0x8 }, | |
5347 | { "mbb", dot_template, 0x9 }, | |
5348 | { "bbb", dot_template, 0xb }, | |
5349 | { "mmb", dot_template, 0xc }, | |
5350 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5351 | { "align", dot_align, 0 }, |
800eeca4 JW |
5352 | { "regstk", dot_regstk, 0 }, |
5353 | { "rotr", dot_rot, DYNREG_GR }, | |
5354 | { "rotf", dot_rot, DYNREG_FR }, | |
5355 | { "rotp", dot_rot, DYNREG_PR }, | |
5356 | { "lsb", dot_byteorder, 0 }, | |
5357 | { "msb", dot_byteorder, 1 }, | |
5358 | { "psr", dot_psr, 0 }, | |
5359 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5360 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5361 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5362 | ||
5363 | { "xdata1", dot_xdata, 1 }, | |
5364 | { "xdata2", dot_xdata, 2 }, | |
5365 | { "xdata4", dot_xdata, 4 }, | |
5366 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5367 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5368 | { "xreal4", dot_xfloat_cons, 'f' }, |
5369 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5370 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5371 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5372 | { "xstring", dot_xstringer, 0 }, |
5373 | { "xstringz", dot_xstringer, 1 }, | |
5374 | ||
542d6675 | 5375 | /* unaligned versions: */ |
800eeca4 JW |
5376 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5377 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5378 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5379 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5380 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5381 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5382 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5383 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5384 | |
5385 | /* annotations/DV checking support */ | |
5386 | { "entry", dot_entry, 0 }, | |
2434f565 | 5387 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5388 | { "pred.rel", dot_pred_rel, 0 }, |
5389 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5390 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5391 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5392 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5393 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5394 | { "serialize.data", dot_serialize, 0 }, |
5395 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5396 | { "auto", dot_dv_mode, 'a' }, |
5397 | { "explicit", dot_dv_mode, 'e' }, | |
5398 | { "default", dot_dv_mode, 'd' }, | |
5399 | ||
87885043 JW |
5400 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5401 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5402 | tell it that these ones are supposed to be unaligned. Long term, | |
5403 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5404 | are aligned by default. */ | |
5405 | {"2byte", stmt_cons_ua, 2}, | |
5406 | {"4byte", stmt_cons_ua, 4}, | |
5407 | {"8byte", stmt_cons_ua, 8}, | |
5408 | ||
800eeca4 JW |
5409 | { NULL, 0, 0 } |
5410 | }; | |
5411 | ||
5412 | static const struct pseudo_opcode | |
5413 | { | |
5414 | const char *name; | |
5415 | void (*handler) (int); | |
5416 | int arg; | |
5417 | } | |
5418 | pseudo_opcode[] = | |
5419 | { | |
5420 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5421 | { "data1", cons, 1 }, | |
5422 | { "data2", cons, 2 }, | |
5423 | { "data4", cons, 4 }, | |
5424 | { "data8", cons, 8 }, | |
3969b680 | 5425 | { "data16", cons, 16 }, |
800eeca4 JW |
5426 | { "real4", stmt_float_cons, 'f' }, |
5427 | { "real8", stmt_float_cons, 'd' }, | |
5428 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5429 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5430 | { "string", stringer, 0 }, |
5431 | { "stringz", stringer, 1 }, | |
5432 | ||
542d6675 | 5433 | /* unaligned versions: */ |
800eeca4 JW |
5434 | { "data2.ua", stmt_cons_ua, 2 }, |
5435 | { "data4.ua", stmt_cons_ua, 4 }, | |
5436 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5437 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5438 | { "real4.ua", float_cons, 'f' }, |
5439 | { "real8.ua", float_cons, 'd' }, | |
5440 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5441 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5442 | }; |
5443 | ||
5444 | /* Declare a register by creating a symbol for it and entering it in | |
5445 | the symbol table. */ | |
542d6675 KH |
5446 | |
5447 | static symbolS * | |
800eeca4 JW |
5448 | declare_register (name, regnum) |
5449 | const char *name; | |
5450 | int regnum; | |
5451 | { | |
5452 | const char *err; | |
5453 | symbolS *sym; | |
5454 | ||
5455 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5456 | ||
5457 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5458 | if (err) | |
5459 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5460 | name, err); | |
5461 | ||
5462 | return sym; | |
5463 | } | |
5464 | ||
5465 | static void | |
5466 | declare_register_set (prefix, num_regs, base_regnum) | |
5467 | const char *prefix; | |
5468 | int num_regs; | |
5469 | int base_regnum; | |
5470 | { | |
5471 | char name[8]; | |
5472 | int i; | |
5473 | ||
5474 | for (i = 0; i < num_regs; ++i) | |
5475 | { | |
5476 | sprintf (name, "%s%u", prefix, i); | |
5477 | declare_register (name, base_regnum + i); | |
5478 | } | |
5479 | } | |
5480 | ||
5481 | static unsigned int | |
5482 | operand_width (opnd) | |
5483 | enum ia64_opnd opnd; | |
5484 | { | |
5485 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5486 | unsigned int bits = 0; | |
5487 | int i; | |
5488 | ||
5489 | bits = 0; | |
5490 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5491 | bits += odesc->field[i].bits; | |
5492 | ||
5493 | return bits; | |
5494 | } | |
5495 | ||
87f8eb97 | 5496 | static enum operand_match_result |
800eeca4 JW |
5497 | operand_match (idesc, index, e) |
5498 | const struct ia64_opcode *idesc; | |
5499 | int index; | |
5500 | expressionS *e; | |
5501 | { | |
5502 | enum ia64_opnd opnd = idesc->operands[index]; | |
5503 | int bits, relocatable = 0; | |
5504 | struct insn_fix *fix; | |
5505 | bfd_signed_vma val; | |
5506 | ||
5507 | switch (opnd) | |
5508 | { | |
542d6675 | 5509 | /* constants: */ |
800eeca4 JW |
5510 | |
5511 | case IA64_OPND_AR_CCV: | |
5512 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5513 | return OPERAND_MATCH; |
800eeca4 JW |
5514 | break; |
5515 | ||
c10d9d8f JW |
5516 | case IA64_OPND_AR_CSD: |
5517 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5518 | return OPERAND_MATCH; | |
5519 | break; | |
5520 | ||
800eeca4 JW |
5521 | case IA64_OPND_AR_PFS: |
5522 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5523 | return OPERAND_MATCH; |
800eeca4 JW |
5524 | break; |
5525 | ||
5526 | case IA64_OPND_GR0: | |
5527 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5528 | return OPERAND_MATCH; |
800eeca4 JW |
5529 | break; |
5530 | ||
5531 | case IA64_OPND_IP: | |
5532 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5533 | return OPERAND_MATCH; |
800eeca4 JW |
5534 | break; |
5535 | ||
5536 | case IA64_OPND_PR: | |
5537 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5538 | return OPERAND_MATCH; |
800eeca4 JW |
5539 | break; |
5540 | ||
5541 | case IA64_OPND_PR_ROT: | |
5542 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5543 | return OPERAND_MATCH; |
800eeca4 JW |
5544 | break; |
5545 | ||
5546 | case IA64_OPND_PSR: | |
5547 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5548 | return OPERAND_MATCH; |
800eeca4 JW |
5549 | break; |
5550 | ||
5551 | case IA64_OPND_PSR_L: | |
5552 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5553 | return OPERAND_MATCH; |
800eeca4 JW |
5554 | break; |
5555 | ||
5556 | case IA64_OPND_PSR_UM: | |
5557 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5558 | return OPERAND_MATCH; |
800eeca4 JW |
5559 | break; |
5560 | ||
5561 | case IA64_OPND_C1: | |
87f8eb97 JW |
5562 | if (e->X_op == O_constant) |
5563 | { | |
5564 | if (e->X_add_number == 1) | |
5565 | return OPERAND_MATCH; | |
5566 | else | |
5567 | return OPERAND_OUT_OF_RANGE; | |
5568 | } | |
800eeca4 JW |
5569 | break; |
5570 | ||
5571 | case IA64_OPND_C8: | |
87f8eb97 JW |
5572 | if (e->X_op == O_constant) |
5573 | { | |
5574 | if (e->X_add_number == 8) | |
5575 | return OPERAND_MATCH; | |
5576 | else | |
5577 | return OPERAND_OUT_OF_RANGE; | |
5578 | } | |
800eeca4 JW |
5579 | break; |
5580 | ||
5581 | case IA64_OPND_C16: | |
87f8eb97 JW |
5582 | if (e->X_op == O_constant) |
5583 | { | |
5584 | if (e->X_add_number == 16) | |
5585 | return OPERAND_MATCH; | |
5586 | else | |
5587 | return OPERAND_OUT_OF_RANGE; | |
5588 | } | |
800eeca4 JW |
5589 | break; |
5590 | ||
542d6675 | 5591 | /* register operands: */ |
800eeca4 JW |
5592 | |
5593 | case IA64_OPND_AR3: | |
5594 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5595 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5596 | return OPERAND_MATCH; |
800eeca4 JW |
5597 | break; |
5598 | ||
5599 | case IA64_OPND_B1: | |
5600 | case IA64_OPND_B2: | |
5601 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5602 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5603 | return OPERAND_MATCH; |
800eeca4 JW |
5604 | break; |
5605 | ||
5606 | case IA64_OPND_CR3: | |
5607 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5608 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5609 | return OPERAND_MATCH; |
800eeca4 JW |
5610 | break; |
5611 | ||
5612 | case IA64_OPND_F1: | |
5613 | case IA64_OPND_F2: | |
5614 | case IA64_OPND_F3: | |
5615 | case IA64_OPND_F4: | |
5616 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5617 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5618 | return OPERAND_MATCH; |
800eeca4 JW |
5619 | break; |
5620 | ||
5621 | case IA64_OPND_P1: | |
5622 | case IA64_OPND_P2: | |
5623 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5624 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5625 | return OPERAND_MATCH; |
800eeca4 JW |
5626 | break; |
5627 | ||
5628 | case IA64_OPND_R1: | |
5629 | case IA64_OPND_R2: | |
5630 | case IA64_OPND_R3: | |
5631 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5632 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5633 | return OPERAND_MATCH; |
800eeca4 JW |
5634 | break; |
5635 | ||
5636 | case IA64_OPND_R3_2: | |
87f8eb97 | 5637 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5638 | { |
87f8eb97 JW |
5639 | if (e->X_add_number < REG_GR + 4) |
5640 | return OPERAND_MATCH; | |
5641 | else if (e->X_add_number < REG_GR + 128) | |
5642 | return OPERAND_OUT_OF_RANGE; | |
5643 | } | |
800eeca4 JW |
5644 | break; |
5645 | ||
542d6675 | 5646 | /* indirect operands: */ |
800eeca4 JW |
5647 | case IA64_OPND_CPUID_R3: |
5648 | case IA64_OPND_DBR_R3: | |
5649 | case IA64_OPND_DTR_R3: | |
5650 | case IA64_OPND_ITR_R3: | |
5651 | case IA64_OPND_IBR_R3: | |
5652 | case IA64_OPND_MSR_R3: | |
5653 | case IA64_OPND_PKR_R3: | |
5654 | case IA64_OPND_PMC_R3: | |
5655 | case IA64_OPND_PMD_R3: | |
5656 | case IA64_OPND_RR_R3: | |
5657 | if (e->X_op == O_index && e->X_op_symbol | |
5658 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5659 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5660 | return OPERAND_MATCH; |
800eeca4 JW |
5661 | break; |
5662 | ||
5663 | case IA64_OPND_MR3: | |
5664 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5665 | return OPERAND_MATCH; |
800eeca4 JW |
5666 | break; |
5667 | ||
542d6675 | 5668 | /* immediate operands: */ |
800eeca4 JW |
5669 | case IA64_OPND_CNT2a: |
5670 | case IA64_OPND_LEN4: | |
5671 | case IA64_OPND_LEN6: | |
5672 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5673 | if (e->X_op == O_constant) |
5674 | { | |
5675 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5676 | return OPERAND_MATCH; | |
5677 | else | |
5678 | return OPERAND_OUT_OF_RANGE; | |
5679 | } | |
800eeca4 JW |
5680 | break; |
5681 | ||
5682 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5683 | if (e->X_op == O_constant) |
5684 | { | |
5685 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5686 | return OPERAND_MATCH; | |
5687 | else | |
5688 | return OPERAND_OUT_OF_RANGE; | |
5689 | } | |
800eeca4 JW |
5690 | break; |
5691 | ||
5692 | case IA64_OPND_CNT2c: | |
5693 | val = e->X_add_number; | |
87f8eb97 JW |
5694 | if (e->X_op == O_constant) |
5695 | { | |
5696 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5697 | return OPERAND_MATCH; | |
5698 | else | |
5699 | return OPERAND_OUT_OF_RANGE; | |
5700 | } | |
800eeca4 JW |
5701 | break; |
5702 | ||
5703 | case IA64_OPND_SOR: | |
5704 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5705 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5706 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5707 | case IA64_OPND_SOF: |
5708 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5709 | if (e->X_op == O_constant) |
5710 | { | |
5711 | if ((bfd_vma) e->X_add_number <= 96) | |
5712 | return OPERAND_MATCH; | |
5713 | else | |
5714 | return OPERAND_OUT_OF_RANGE; | |
5715 | } | |
800eeca4 JW |
5716 | break; |
5717 | ||
5718 | case IA64_OPND_IMMU62: | |
5719 | if (e->X_op == O_constant) | |
542d6675 | 5720 | { |
800eeca4 | 5721 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5722 | return OPERAND_MATCH; |
5723 | else | |
5724 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5725 | } |
197865e8 | 5726 | else |
542d6675 KH |
5727 | { |
5728 | /* FIXME -- need 62-bit relocation type */ | |
5729 | as_bad (_("62-bit relocation not yet implemented")); | |
5730 | } | |
800eeca4 JW |
5731 | break; |
5732 | ||
5733 | case IA64_OPND_IMMU64: | |
5734 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5735 | || e->X_op == O_subtract) | |
5736 | { | |
5737 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5738 | fix->code = BFD_RELOC_IA64_IMM64; | |
5739 | if (e->X_op != O_subtract) | |
5740 | { | |
5741 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5742 | if (e->X_op == O_pseudo_fixup) | |
5743 | e->X_op = O_symbol; | |
5744 | } | |
5745 | ||
5746 | fix->opnd = idesc->operands[index]; | |
5747 | fix->expr = *e; | |
5748 | fix->is_pcrel = 0; | |
5749 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5750 | return OPERAND_MATCH; |
800eeca4 JW |
5751 | } |
5752 | else if (e->X_op == O_constant) | |
87f8eb97 | 5753 | return OPERAND_MATCH; |
800eeca4 JW |
5754 | break; |
5755 | ||
5756 | case IA64_OPND_CCNT5: | |
5757 | case IA64_OPND_CNT5: | |
5758 | case IA64_OPND_CNT6: | |
5759 | case IA64_OPND_CPOS6a: | |
5760 | case IA64_OPND_CPOS6b: | |
5761 | case IA64_OPND_CPOS6c: | |
5762 | case IA64_OPND_IMMU2: | |
5763 | case IA64_OPND_IMMU7a: | |
5764 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5765 | case IA64_OPND_IMMU21: |
5766 | case IA64_OPND_IMMU24: | |
5767 | case IA64_OPND_MBTYPE4: | |
5768 | case IA64_OPND_MHTYPE8: | |
5769 | case IA64_OPND_POS6: | |
5770 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5771 | if (e->X_op == O_constant) |
5772 | { | |
5773 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5774 | return OPERAND_MATCH; | |
5775 | else | |
5776 | return OPERAND_OUT_OF_RANGE; | |
5777 | } | |
800eeca4 JW |
5778 | break; |
5779 | ||
bf3ca999 TW |
5780 | case IA64_OPND_IMMU9: |
5781 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5782 | if (e->X_op == O_constant) |
542d6675 | 5783 | { |
87f8eb97 JW |
5784 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5785 | { | |
5786 | int lobits = e->X_add_number & 0x3; | |
5787 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5788 | e->X_add_number |= (bfd_vma) 0x3; | |
5789 | return OPERAND_MATCH; | |
5790 | } | |
5791 | else | |
5792 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5793 | } |
bf3ca999 TW |
5794 | break; |
5795 | ||
800eeca4 JW |
5796 | case IA64_OPND_IMM44: |
5797 | /* least 16 bits must be zero */ | |
5798 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5799 | /* XXX technically, this is wrong: we should not be issuing warning |
5800 | messages until we're sure this instruction pattern is going to | |
5801 | be used! */ | |
542d6675 | 5802 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5803 | |
87f8eb97 | 5804 | if (e->X_op == O_constant) |
542d6675 | 5805 | { |
87f8eb97 JW |
5806 | if (((e->X_add_number >= 0 |
5807 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5808 | || (e->X_add_number < 0 | |
5809 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5810 | { |
87f8eb97 JW |
5811 | /* sign-extend */ |
5812 | if (e->X_add_number >= 0 | |
5813 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5814 | { | |
5815 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5816 | } | |
5817 | return OPERAND_MATCH; | |
542d6675 | 5818 | } |
87f8eb97 JW |
5819 | else |
5820 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5821 | } |
800eeca4 JW |
5822 | break; |
5823 | ||
5824 | case IA64_OPND_IMM17: | |
5825 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5826 | if (e->X_op == O_constant) |
542d6675 | 5827 | { |
87f8eb97 JW |
5828 | if (((e->X_add_number >= 0 |
5829 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5830 | || (e->X_add_number < 0 | |
5831 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5832 | { |
87f8eb97 JW |
5833 | /* sign-extend */ |
5834 | if (e->X_add_number >= 0 | |
5835 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5836 | { | |
5837 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5838 | } | |
5839 | return OPERAND_MATCH; | |
542d6675 | 5840 | } |
87f8eb97 JW |
5841 | else |
5842 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5843 | } |
800eeca4 JW |
5844 | break; |
5845 | ||
5846 | case IA64_OPND_IMM14: | |
5847 | case IA64_OPND_IMM22: | |
5848 | relocatable = 1; | |
5849 | case IA64_OPND_IMM1: | |
5850 | case IA64_OPND_IMM8: | |
5851 | case IA64_OPND_IMM8U4: | |
5852 | case IA64_OPND_IMM8M1: | |
5853 | case IA64_OPND_IMM8M1U4: | |
5854 | case IA64_OPND_IMM8M1U8: | |
5855 | case IA64_OPND_IMM9a: | |
5856 | case IA64_OPND_IMM9b: | |
5857 | bits = operand_width (idesc->operands[index]); | |
5858 | if (relocatable && (e->X_op == O_symbol | |
5859 | || e->X_op == O_subtract | |
5860 | || e->X_op == O_pseudo_fixup)) | |
5861 | { | |
5862 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5863 | ||
5864 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5865 | fix->code = BFD_RELOC_IA64_IMM14; | |
5866 | else | |
5867 | fix->code = BFD_RELOC_IA64_IMM22; | |
5868 | ||
5869 | if (e->X_op != O_subtract) | |
5870 | { | |
5871 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5872 | if (e->X_op == O_pseudo_fixup) | |
5873 | e->X_op = O_symbol; | |
5874 | } | |
5875 | ||
5876 | fix->opnd = idesc->operands[index]; | |
5877 | fix->expr = *e; | |
5878 | fix->is_pcrel = 0; | |
5879 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5880 | return OPERAND_MATCH; |
800eeca4 JW |
5881 | } |
5882 | else if (e->X_op != O_constant | |
5883 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5884 | return OPERAND_MISMATCH; |
800eeca4 JW |
5885 | |
5886 | if (opnd == IA64_OPND_IMM8M1U4) | |
5887 | { | |
5888 | /* Zero is not valid for unsigned compares that take an adjusted | |
5889 | constant immediate range. */ | |
5890 | if (e->X_add_number == 0) | |
87f8eb97 | 5891 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5892 | |
5893 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5894 | checks will work. */ | |
5895 | val = e->X_add_number; | |
197865e8 KH |
5896 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5897 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5898 | val = ((val << 32) >> 32); |
5899 | ||
5900 | /* Check for 0x100000000. This is valid because | |
5901 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5902 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5903 | return OPERAND_MATCH; |
800eeca4 JW |
5904 | |
5905 | val = val - 1; | |
5906 | } | |
5907 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5908 | { | |
5909 | /* Zero is not valid for unsigned compares that take an adjusted | |
5910 | constant immediate range. */ | |
5911 | if (e->X_add_number == 0) | |
87f8eb97 | 5912 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5913 | |
5914 | /* Check for 0x10000000000000000. */ | |
5915 | if (e->X_op == O_big) | |
5916 | { | |
5917 | if (generic_bignum[0] == 0 | |
5918 | && generic_bignum[1] == 0 | |
5919 | && generic_bignum[2] == 0 | |
5920 | && generic_bignum[3] == 0 | |
5921 | && generic_bignum[4] == 1) | |
87f8eb97 | 5922 | return OPERAND_MATCH; |
800eeca4 | 5923 | else |
87f8eb97 | 5924 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5925 | } |
5926 | else | |
5927 | val = e->X_add_number - 1; | |
5928 | } | |
5929 | else if (opnd == IA64_OPND_IMM8M1) | |
5930 | val = e->X_add_number - 1; | |
5931 | else if (opnd == IA64_OPND_IMM8U4) | |
5932 | { | |
5933 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5934 | checks will work. */ | |
5935 | val = e->X_add_number; | |
197865e8 KH |
5936 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5937 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5938 | val = ((val << 32) >> 32); |
5939 | } | |
5940 | else | |
5941 | val = e->X_add_number; | |
5942 | ||
2434f565 JW |
5943 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5944 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5945 | return OPERAND_MATCH; |
5946 | else | |
5947 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5948 | |
5949 | case IA64_OPND_INC3: | |
5950 | /* +/- 1, 4, 8, 16 */ | |
5951 | val = e->X_add_number; | |
5952 | if (val < 0) | |
5953 | val = -val; | |
87f8eb97 JW |
5954 | if (e->X_op == O_constant) |
5955 | { | |
5956 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5957 | return OPERAND_MATCH; | |
5958 | else | |
5959 | return OPERAND_OUT_OF_RANGE; | |
5960 | } | |
800eeca4 JW |
5961 | break; |
5962 | ||
5963 | case IA64_OPND_TGT25: | |
5964 | case IA64_OPND_TGT25b: | |
5965 | case IA64_OPND_TGT25c: | |
5966 | case IA64_OPND_TGT64: | |
5967 | if (e->X_op == O_symbol) | |
5968 | { | |
5969 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5970 | if (opnd == IA64_OPND_TGT25) | |
5971 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5972 | else if (opnd == IA64_OPND_TGT25b) | |
5973 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5974 | else if (opnd == IA64_OPND_TGT25c) | |
5975 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5976 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5977 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5978 | else | |
5979 | abort (); | |
5980 | ||
800eeca4 JW |
5981 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5982 | fix->opnd = idesc->operands[index]; | |
5983 | fix->expr = *e; | |
5984 | fix->is_pcrel = 1; | |
5985 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5986 | return OPERAND_MATCH; |
800eeca4 JW |
5987 | } |
5988 | case IA64_OPND_TAG13: | |
5989 | case IA64_OPND_TAG13b: | |
5990 | switch (e->X_op) | |
5991 | { | |
5992 | case O_constant: | |
87f8eb97 | 5993 | return OPERAND_MATCH; |
800eeca4 JW |
5994 | |
5995 | case O_symbol: | |
5996 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 5997 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 5998 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
5999 | fix->code = BFD_RELOC_UNUSED; |
6000 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
6001 | fix->opnd = idesc->operands[index]; |
6002 | fix->expr = *e; | |
6003 | fix->is_pcrel = 1; | |
6004 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6005 | return OPERAND_MATCH; |
800eeca4 JW |
6006 | |
6007 | default: | |
6008 | break; | |
6009 | } | |
6010 | break; | |
6011 | ||
a823923b RH |
6012 | case IA64_OPND_LDXMOV: |
6013 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6014 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
6015 | fix->opnd = idesc->operands[index]; | |
6016 | fix->expr = *e; | |
6017 | fix->is_pcrel = 0; | |
6018 | ++CURR_SLOT.num_fixups; | |
6019 | return OPERAND_MATCH; | |
6020 | ||
800eeca4 JW |
6021 | default: |
6022 | break; | |
6023 | } | |
87f8eb97 | 6024 | return OPERAND_MISMATCH; |
800eeca4 JW |
6025 | } |
6026 | ||
6027 | static int | |
6028 | parse_operand (e) | |
6029 | expressionS *e; | |
6030 | { | |
6031 | int sep = '\0'; | |
6032 | ||
6033 | memset (e, 0, sizeof (*e)); | |
6034 | e->X_op = O_absent; | |
6035 | SKIP_WHITESPACE (); | |
6036 | if (*input_line_pointer != '}') | |
6037 | expression (e); | |
6038 | sep = *input_line_pointer++; | |
6039 | ||
6040 | if (sep == '}') | |
6041 | { | |
6042 | if (!md.manual_bundling) | |
6043 | as_warn ("Found '}' when manual bundling is off"); | |
6044 | else | |
6045 | CURR_SLOT.manual_bundling_off = 1; | |
6046 | md.manual_bundling = 0; | |
6047 | sep = '\0'; | |
6048 | } | |
6049 | return sep; | |
6050 | } | |
6051 | ||
6052 | /* Returns the next entry in the opcode table that matches the one in | |
6053 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6054 | found, NULL is returned instead. */ |
800eeca4 JW |
6055 | |
6056 | static struct ia64_opcode * | |
6057 | get_next_opcode (struct ia64_opcode *idesc) | |
6058 | { | |
6059 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6060 | ia64_free_opcode (idesc); | |
6061 | return next; | |
6062 | } | |
6063 | ||
6064 | /* Parse the operands for the opcode and find the opcode variant that | |
6065 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6066 | |
6067 | static struct ia64_opcode * | |
800eeca4 JW |
6068 | parse_operands (idesc) |
6069 | struct ia64_opcode *idesc; | |
6070 | { | |
6071 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6072 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6073 | int reg1, reg2; |
6074 | char reg_class; | |
800eeca4 | 6075 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6076 | enum operand_match_result result; |
800eeca4 JW |
6077 | char mnemonic[129]; |
6078 | char *first_arg = 0, *end, *saved_input_pointer; | |
6079 | unsigned int sof; | |
6080 | ||
6081 | assert (strlen (idesc->name) <= 128); | |
6082 | ||
6083 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6084 | if (idesc->operands[2] == IA64_OPND_SOF |
6085 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6086 | { |
6087 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6088 | can't parse the first operand until we have parsed the | |
6089 | remaining operands of the "alloc" instruction. */ | |
6090 | SKIP_WHITESPACE (); | |
6091 | first_arg = input_line_pointer; | |
6092 | end = strchr (input_line_pointer, '='); | |
6093 | if (!end) | |
6094 | { | |
6095 | as_bad ("Expected separator `='"); | |
6096 | return 0; | |
6097 | } | |
6098 | input_line_pointer = end + 1; | |
6099 | ++i; | |
6100 | ++num_outputs; | |
6101 | } | |
6102 | ||
d3156ecc | 6103 | for (; ; ++i) |
800eeca4 | 6104 | { |
d3156ecc JB |
6105 | if (i < NELEMS (CURR_SLOT.opnd)) |
6106 | { | |
6107 | sep = parse_operand (CURR_SLOT.opnd + i); | |
6108 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
6109 | break; | |
6110 | } | |
6111 | else | |
6112 | { | |
6113 | expressionS dummy; | |
6114 | ||
6115 | sep = parse_operand (&dummy); | |
6116 | if (dummy.X_op == O_absent) | |
6117 | break; | |
6118 | } | |
800eeca4 JW |
6119 | |
6120 | ++num_operands; | |
6121 | ||
6122 | if (sep != '=' && sep != ',') | |
6123 | break; | |
6124 | ||
6125 | if (sep == '=') | |
6126 | { | |
6127 | if (num_outputs > 0) | |
6128 | as_bad ("Duplicate equal sign (=) in instruction"); | |
6129 | else | |
6130 | num_outputs = i + 1; | |
6131 | } | |
6132 | } | |
6133 | if (sep != '\0') | |
6134 | { | |
6135 | as_bad ("Illegal operand separator `%c'", sep); | |
6136 | return 0; | |
6137 | } | |
197865e8 | 6138 | |
60b9a617 JB |
6139 | if (idesc->operands[2] == IA64_OPND_SOF |
6140 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6141 | { |
6142 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
6143 | know (strcmp (idesc->name, "alloc") == 0); | |
60b9a617 JB |
6144 | i = (CURR_SLOT.opnd[1].X_op == O_register |
6145 | && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1; | |
6146 | if (num_operands == i + 3 /* first_arg not included in this count! */ | |
6147 | && CURR_SLOT.opnd[i].X_op == O_constant | |
6148 | && CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6149 | && CURR_SLOT.opnd[i + 2].X_op == O_constant | |
6150 | && CURR_SLOT.opnd[i + 3].X_op == O_constant) | |
800eeca4 | 6151 | { |
60b9a617 JB |
6152 | sof = set_regstack (CURR_SLOT.opnd[i].X_add_number, |
6153 | CURR_SLOT.opnd[i + 1].X_add_number, | |
6154 | CURR_SLOT.opnd[i + 2].X_add_number, | |
6155 | CURR_SLOT.opnd[i + 3].X_add_number); | |
800eeca4 | 6156 | |
542d6675 | 6157 | /* now we can parse the first arg: */ |
800eeca4 JW |
6158 | saved_input_pointer = input_line_pointer; |
6159 | input_line_pointer = first_arg; | |
6160 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
6161 | if (sep != '=') | |
6162 | --num_outputs; /* force error */ | |
6163 | input_line_pointer = saved_input_pointer; | |
6164 | ||
60b9a617 JB |
6165 | CURR_SLOT.opnd[i].X_add_number = sof; |
6166 | CURR_SLOT.opnd[i + 1].X_add_number | |
6167 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6168 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6169 | } |
6170 | } | |
6171 | ||
d3156ecc | 6172 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6173 | curr_out_of_range_pos = -1; |
6174 | error_pos = 0; | |
800eeca4 JW |
6175 | for (; idesc; idesc = get_next_opcode (idesc)) |
6176 | { | |
6177 | if (num_outputs != idesc->num_outputs) | |
6178 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6179 | if (highest_unmatched_operand < 0) |
6180 | highest_unmatched_operand |= 1; | |
6181 | if (num_operands > NELEMS (idesc->operands) | |
6182 | || (num_operands < NELEMS (idesc->operands) | |
6183 | && idesc->operands[num_operands]) | |
6184 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6185 | continue; /* mismatch in number of arguments */ | |
6186 | if (highest_unmatched_operand < 0) | |
6187 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6188 | |
6189 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6190 | |
6191 | /* Try to match all operands. If we see an out-of-range operand, | |
6192 | then continue trying to match the rest of the operands, since if | |
6193 | the rest match, then this idesc will give the best error message. */ | |
6194 | ||
6195 | out_of_range_pos = -1; | |
800eeca4 | 6196 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6197 | { |
6198 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6199 | if (result != OPERAND_MATCH) | |
6200 | { | |
6201 | if (result != OPERAND_OUT_OF_RANGE) | |
6202 | break; | |
6203 | if (out_of_range_pos < 0) | |
6204 | /* remember position of the first out-of-range operand: */ | |
6205 | out_of_range_pos = i; | |
6206 | } | |
6207 | } | |
800eeca4 | 6208 | |
87f8eb97 JW |
6209 | /* If we did not match all operands, or if at least one operand was |
6210 | out-of-range, then this idesc does not match. Keep track of which | |
6211 | idesc matched the most operands before failing. If we have two | |
6212 | idescs that failed at the same position, and one had an out-of-range | |
6213 | operand, then prefer the out-of-range operand. Thus if we have | |
6214 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6215 | of range instead of an error saying that the constant should have been | |
6216 | a register. */ | |
6217 | ||
6218 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6219 | { |
87f8eb97 JW |
6220 | if (i > highest_unmatched_operand |
6221 | || (i == highest_unmatched_operand | |
6222 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6223 | { |
6224 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6225 | if (out_of_range_pos >= 0) |
6226 | { | |
6227 | expected_operand = idesc->operands[out_of_range_pos]; | |
6228 | error_pos = out_of_range_pos; | |
6229 | } | |
6230 | else | |
6231 | { | |
6232 | expected_operand = idesc->operands[i]; | |
6233 | error_pos = i; | |
6234 | } | |
6235 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6236 | } |
6237 | continue; | |
6238 | } | |
6239 | ||
800eeca4 JW |
6240 | break; |
6241 | } | |
6242 | if (!idesc) | |
6243 | { | |
6244 | if (expected_operand) | |
6245 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 6246 | error_pos + 1, mnemonic, |
800eeca4 | 6247 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc JB |
6248 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
6249 | as_bad ("Wrong number of output operands"); | |
6250 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) | |
6251 | as_bad ("Wrong number of input operands"); | |
800eeca4 JW |
6252 | else |
6253 | as_bad ("Operand mismatch"); | |
6254 | return 0; | |
6255 | } | |
4b09e828 JB |
6256 | |
6257 | /* Check that the instruction doesn't use | |
6258 | - r0, f0, or f1 as output operands | |
6259 | - the same predicate twice as output operands | |
6260 | - r0 as address of a base update load or store | |
6261 | - the same GR as output and address of a base update load | |
6262 | - two even- or two odd-numbered FRs as output operands of a floating | |
6263 | point parallel load. | |
6264 | At most two (conflicting) output (or output-like) operands can exist, | |
6265 | (floating point parallel loads have three outputs, but the base register, | |
6266 | if updated, cannot conflict with the actual outputs). */ | |
6267 | reg2 = reg1 = -1; | |
6268 | for (i = 0; i < num_operands; ++i) | |
6269 | { | |
6270 | int regno = 0; | |
6271 | ||
6272 | reg_class = 0; | |
6273 | switch (idesc->operands[i]) | |
6274 | { | |
6275 | case IA64_OPND_R1: | |
6276 | case IA64_OPND_R2: | |
6277 | case IA64_OPND_R3: | |
6278 | if (i < num_outputs) | |
6279 | { | |
6280 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6281 | reg_class = 'r'; | |
6282 | else if (reg1 < 0) | |
6283 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6284 | else if (reg2 < 0) | |
6285 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6286 | } | |
6287 | break; | |
6288 | case IA64_OPND_P1: | |
6289 | case IA64_OPND_P2: | |
6290 | if (i < num_outputs) | |
6291 | { | |
6292 | if (reg1 < 0) | |
6293 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6294 | else if (reg2 < 0) | |
6295 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6296 | } | |
6297 | break; | |
6298 | case IA64_OPND_F1: | |
6299 | case IA64_OPND_F2: | |
6300 | case IA64_OPND_F3: | |
6301 | case IA64_OPND_F4: | |
6302 | if (i < num_outputs) | |
6303 | { | |
6304 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6305 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6306 | { | |
6307 | reg_class = 'f'; | |
6308 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6309 | } | |
6310 | else if (reg1 < 0) | |
6311 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6312 | else if (reg2 < 0) | |
6313 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6314 | } | |
6315 | break; | |
6316 | case IA64_OPND_MR3: | |
6317 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6318 | { | |
6319 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6320 | reg_class = 'm'; | |
6321 | else if (reg1 < 0) | |
6322 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6323 | else if (reg2 < 0) | |
6324 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6325 | } | |
6326 | break; | |
6327 | default: | |
6328 | break; | |
6329 | } | |
6330 | switch (reg_class) | |
6331 | { | |
6332 | case 0: | |
6333 | break; | |
6334 | default: | |
6335 | as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno); | |
6336 | break; | |
6337 | case 'm': | |
6338 | as_warn ("Invalid use of `r%d' as base update address operand", regno); | |
6339 | break; | |
6340 | } | |
6341 | } | |
6342 | if (reg1 == reg2) | |
6343 | { | |
6344 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6345 | { | |
6346 | reg1 -= REG_GR; | |
6347 | reg_class = 'r'; | |
6348 | } | |
6349 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6350 | { | |
6351 | reg1 -= REG_P; | |
6352 | reg_class = 'p'; | |
6353 | } | |
6354 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6355 | { | |
6356 | reg1 -= REG_FR; | |
6357 | reg_class = 'f'; | |
6358 | } | |
6359 | else | |
6360 | reg_class = 0; | |
6361 | if (reg_class) | |
6362 | as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1); | |
6363 | } | |
6364 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6365 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6366 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6367 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6368 | && ! ((reg1 ^ reg2) & 1)) | |
6369 | as_warn ("Invalid simultaneous use of `f%d' and `f%d'", | |
6370 | reg1 - REG_FR, reg2 - REG_FR); | |
6371 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6372 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6373 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6374 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
6375 | as_warn ("Dangerous simultaneous use of `f%d' and `f%d'", | |
6376 | reg1 - REG_FR, reg2 - REG_FR); | |
800eeca4 JW |
6377 | return idesc; |
6378 | } | |
6379 | ||
6380 | static void | |
6381 | build_insn (slot, insnp) | |
6382 | struct slot *slot; | |
6383 | bfd_vma *insnp; | |
6384 | { | |
6385 | const struct ia64_operand *odesc, *o2desc; | |
6386 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6387 | bfd_vma insn; |
6388 | bfd_signed_vma val; | |
800eeca4 JW |
6389 | const char *err; |
6390 | int i; | |
6391 | ||
6392 | insn = idesc->opcode | slot->qp_regno; | |
6393 | ||
6394 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6395 | { | |
c67e42c9 RH |
6396 | if (slot->opnd[i].X_op == O_register |
6397 | || slot->opnd[i].X_op == O_constant | |
6398 | || slot->opnd[i].X_op == O_index) | |
6399 | val = slot->opnd[i].X_add_number; | |
6400 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6401 | { |
c67e42c9 RH |
6402 | /* This must be the value 0x10000000000000000. */ |
6403 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6404 | val = 0; | |
6405 | } | |
6406 | else | |
6407 | val = 0; | |
6408 | ||
6409 | switch (idesc->operands[i]) | |
6410 | { | |
6411 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6412 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6413 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6414 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6415 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6416 | continue; |
6417 | ||
6418 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6419 | val &= 0x3fffffffffffffffULL; |
6420 | if (val != slot->opnd[i].X_add_number) | |
6421 | as_warn (_("Value truncated to 62 bits")); | |
6422 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6423 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6424 | continue; |
800eeca4 | 6425 | |
c67e42c9 RH |
6426 | case IA64_OPND_TGT64: |
6427 | val >>= 4; | |
6428 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6429 | insn |= ((((val >> 59) & 0x1) << 36) | |
6430 | | (((val >> 0) & 0xfffff) << 13)); | |
6431 | continue; | |
800eeca4 | 6432 | |
c67e42c9 RH |
6433 | case IA64_OPND_AR3: |
6434 | val -= REG_AR; | |
6435 | break; | |
6436 | ||
6437 | case IA64_OPND_B1: | |
6438 | case IA64_OPND_B2: | |
6439 | val -= REG_BR; | |
6440 | break; | |
6441 | ||
6442 | case IA64_OPND_CR3: | |
6443 | val -= REG_CR; | |
6444 | break; | |
6445 | ||
6446 | case IA64_OPND_F1: | |
6447 | case IA64_OPND_F2: | |
6448 | case IA64_OPND_F3: | |
6449 | case IA64_OPND_F4: | |
6450 | val -= REG_FR; | |
6451 | break; | |
6452 | ||
6453 | case IA64_OPND_P1: | |
6454 | case IA64_OPND_P2: | |
6455 | val -= REG_P; | |
6456 | break; | |
6457 | ||
6458 | case IA64_OPND_R1: | |
6459 | case IA64_OPND_R2: | |
6460 | case IA64_OPND_R3: | |
6461 | case IA64_OPND_R3_2: | |
6462 | case IA64_OPND_CPUID_R3: | |
6463 | case IA64_OPND_DBR_R3: | |
6464 | case IA64_OPND_DTR_R3: | |
6465 | case IA64_OPND_ITR_R3: | |
6466 | case IA64_OPND_IBR_R3: | |
6467 | case IA64_OPND_MR3: | |
6468 | case IA64_OPND_MSR_R3: | |
6469 | case IA64_OPND_PKR_R3: | |
6470 | case IA64_OPND_PMC_R3: | |
6471 | case IA64_OPND_PMD_R3: | |
197865e8 | 6472 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6473 | val -= REG_GR; |
6474 | break; | |
6475 | ||
6476 | default: | |
6477 | break; | |
6478 | } | |
6479 | ||
6480 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6481 | err = (*odesc->insert) (odesc, val, &insn); | |
6482 | if (err) | |
6483 | as_bad_where (slot->src_file, slot->src_line, | |
6484 | "Bad operand value: %s", err); | |
6485 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6486 | { | |
6487 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6488 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6489 | { | |
6490 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6491 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6492 | } |
c67e42c9 RH |
6493 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6494 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6495 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6496 | { |
c67e42c9 RH |
6497 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6498 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6499 | } |
6500 | } | |
6501 | } | |
6502 | *insnp = insn; | |
6503 | } | |
6504 | ||
6505 | static void | |
6506 | emit_one_bundle () | |
6507 | { | |
f4660e2c | 6508 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6509 | enum ia64_unit required_unit, insn_unit = 0; |
6510 | enum ia64_insn_type type[3], insn_type; | |
6511 | unsigned int template, orig_template; | |
542d6675 | 6512 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6513 | struct ia64_opcode *idesc; |
6514 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6515 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6516 | bfd_vma t0 = 0, t1 = 0; |
6517 | struct label_fix *lfix; | |
6518 | struct insn_fix *ifix; | |
6519 | char mnemonic[16]; | |
6520 | fixS *fix; | |
6521 | char *f; | |
5a9ff93d | 6522 | int addr_mod; |
800eeca4 JW |
6523 | |
6524 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6525 | know (first >= 0 & first < NUM_SLOTS); | |
6526 | n = MIN (3, md.num_slots_in_use); | |
6527 | ||
6528 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6529 | otherwise: */ |
800eeca4 JW |
6530 | |
6531 | if (md.slot[first].user_template >= 0) | |
6532 | user_template = template = md.slot[first].user_template; | |
6533 | else | |
6534 | { | |
032efc85 | 6535 | /* Auto select appropriate template. */ |
800eeca4 JW |
6536 | memset (type, 0, sizeof (type)); |
6537 | curr = first; | |
6538 | for (i = 0; i < n; ++i) | |
6539 | { | |
032efc85 RH |
6540 | if (md.slot[curr].label_fixups && i != 0) |
6541 | break; | |
800eeca4 JW |
6542 | type[i] = md.slot[curr].idesc->type; |
6543 | curr = (curr + 1) % NUM_SLOTS; | |
6544 | } | |
6545 | template = best_template[type[0]][type[1]][type[2]]; | |
6546 | } | |
6547 | ||
542d6675 | 6548 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6549 | for (i = 0; i < 3; ++i) |
6550 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6551 | ||
6552 | f = frag_more (16); | |
6553 | ||
5a9ff93d JW |
6554 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6555 | from the start of the frag. */ | |
6556 | addr_mod = frag_now_fix () & 15; | |
6557 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6558 | as_bad (_("instruction address is not a multiple of 16")); | |
6559 | frag_now->insn_addr = addr_mod; | |
6560 | frag_now->has_code = 1; | |
6561 | ||
542d6675 | 6562 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6563 | curr = first; |
6564 | idesc = md.slot[curr].idesc; | |
6565 | end_of_insn_group = 0; | |
9b505842 | 6566 | last_slot = -1; |
800eeca4 JW |
6567 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6568 | { | |
d6e78c11 | 6569 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6570 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6571 | unw_rec_list *end_ptr = NULL; | |
6572 | ||
d6e78c11 JW |
6573 | if (ptr) |
6574 | { | |
6575 | /* Find the last prologue/body record in the list for the current | |
6576 | insn, and set the slot number for all records up to that point. | |
6577 | This needs to be done now, because prologue/body records refer to | |
6578 | the current point, not the point after the instruction has been | |
6579 | issued. This matters because there may have been nops emitted | |
6580 | meanwhile. Any non-prologue non-body record followed by a | |
6581 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6582 | unw_rec_list *last_ptr; |
6583 | ||
6584 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6585 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6586 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6587 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6588 | || ptr->r.type == body) | |
6589 | last_ptr = ptr; | |
6590 | if (last_ptr) | |
6591 | { | |
6592 | /* Make last_ptr point one after the last prologue/body | |
6593 | record. */ | |
6594 | last_ptr = last_ptr->next; | |
6595 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6596 | ptr = ptr->next) | |
6597 | { | |
6598 | ptr->slot_number = (unsigned long) f + i; | |
6599 | ptr->slot_frag = frag_now; | |
6600 | } | |
6601 | /* Remove the initialized records, so that we won't accidentally | |
6602 | update them again if we insert a nop and continue. */ | |
6603 | md.slot[curr].unwind_record = last_ptr; | |
6604 | } | |
6605 | } | |
e0c9811a | 6606 | |
f4660e2c JB |
6607 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6608 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6609 | { |
f4660e2c JB |
6610 | if (curr == first) |
6611 | manual_bundling = 1; | |
800eeca4 | 6612 | else |
f4660e2c JB |
6613 | break; /* Need to start a new bundle. */ |
6614 | } | |
6615 | ||
744b6414 JW |
6616 | /* If this instruction specifies a template, then it must be the first |
6617 | instruction of a bundle. */ | |
6618 | if (curr != first && md.slot[curr].user_template >= 0) | |
6619 | break; | |
6620 | ||
f4660e2c JB |
6621 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6622 | { | |
6623 | if (manual_bundling && !manual_bundling_off) | |
6624 | { | |
6625 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6626 | "`%s' must be last in bundle", idesc->name); | |
6627 | if (i < 2) | |
6628 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6629 | } | |
6630 | i = 2; | |
800eeca4 JW |
6631 | } |
6632 | if (idesc->flags & IA64_OPCODE_LAST) | |
6633 | { | |
2434f565 JW |
6634 | int required_slot; |
6635 | unsigned int required_template; | |
800eeca4 JW |
6636 | |
6637 | /* If we need a stop bit after an M slot, our only choice is | |
6638 | template 5 (M;;MI). If we need a stop bit after a B | |
6639 | slot, our only choice is to place it at the end of the | |
6640 | bundle, because the only available templates are MIB, | |
6641 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6642 | than M and B slots because these are the only kind of | |
6643 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6644 | required_template = template; | |
6645 | switch (idesc->type) | |
6646 | { | |
6647 | case IA64_TYPE_M: | |
6648 | required_slot = 0; | |
6649 | required_template = 5; | |
6650 | break; | |
6651 | ||
6652 | case IA64_TYPE_B: | |
6653 | required_slot = 2; | |
6654 | break; | |
6655 | ||
6656 | default: | |
6657 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6658 | "Internal error: don't know how to force %s to end" | |
6659 | "of instruction group", idesc->name); | |
6660 | required_slot = i; | |
6661 | break; | |
6662 | } | |
f4660e2c JB |
6663 | if (manual_bundling |
6664 | && (i > required_slot | |
6665 | || (required_slot == 2 && !manual_bundling_off) | |
6666 | || (user_template >= 0 | |
6667 | /* Changing from MMI to M;MI is OK. */ | |
6668 | && (template ^ required_template) > 1))) | |
6669 | { | |
6670 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6671 | "`%s' must be last in instruction group", | |
6672 | idesc->name); | |
6673 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6674 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6675 | } | |
800eeca4 JW |
6676 | if (required_slot < i) |
6677 | /* Can't fit this instruction. */ | |
6678 | break; | |
6679 | ||
6680 | i = required_slot; | |
6681 | if (required_template != template) | |
6682 | { | |
6683 | /* If we switch the template, we need to reset the NOPs | |
6684 | after slot i. The slot-types of the instructions ahead | |
6685 | of i never change, so we don't need to worry about | |
6686 | changing NOPs in front of this slot. */ | |
6687 | for (j = i; j < 3; ++j) | |
6688 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6689 | } | |
6690 | template = required_template; | |
6691 | } | |
6692 | if (curr != first && md.slot[curr].label_fixups) | |
6693 | { | |
f4660e2c JB |
6694 | if (manual_bundling) |
6695 | { | |
6696 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
800eeca4 | 6697 | "Label must be first in a bundle"); |
f4660e2c JB |
6698 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6699 | } | |
800eeca4 JW |
6700 | /* This insn must go into the first slot of a bundle. */ |
6701 | break; | |
6702 | } | |
6703 | ||
800eeca4 JW |
6704 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6705 | { | |
6706 | /* We need an instruction group boundary in the middle of a | |
6707 | bundle. See if we can switch to an other template with | |
6708 | an appropriate boundary. */ | |
6709 | ||
6710 | orig_template = template; | |
6711 | if (i == 1 && (user_template == 4 | |
6712 | || (user_template < 0 | |
6713 | && (ia64_templ_desc[template].exec_unit[0] | |
6714 | == IA64_UNIT_M)))) | |
6715 | { | |
6716 | template = 5; | |
6717 | end_of_insn_group = 0; | |
6718 | } | |
6719 | else if (i == 2 && (user_template == 0 | |
6720 | || (user_template < 0 | |
6721 | && (ia64_templ_desc[template].exec_unit[1] | |
6722 | == IA64_UNIT_I))) | |
6723 | /* This test makes sure we don't switch the template if | |
6724 | the next instruction is one that needs to be first in | |
6725 | an instruction group. Since all those instructions are | |
6726 | in the M group, there is no way such an instruction can | |
6727 | fit in this bundle even if we switch the template. The | |
6728 | reason we have to check for this is that otherwise we | |
6729 | may end up generating "MI;;I M.." which has the deadly | |
6730 | effect that the second M instruction is no longer the | |
f4660e2c | 6731 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6732 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6733 | { | |
6734 | template = 1; | |
6735 | end_of_insn_group = 0; | |
6736 | } | |
f4660e2c JB |
6737 | else if (i == 1 |
6738 | && user_template == 0 | |
6739 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6740 | /* Use the next slot. */ | |
6741 | continue; | |
800eeca4 JW |
6742 | else if (curr != first) |
6743 | /* can't fit this insn */ | |
6744 | break; | |
6745 | ||
6746 | if (template != orig_template) | |
6747 | /* if we switch the template, we need to reset the NOPs | |
6748 | after slot i. The slot-types of the instructions ahead | |
6749 | of i never change, so we don't need to worry about | |
6750 | changing NOPs in front of this slot. */ | |
6751 | for (j = i; j < 3; ++j) | |
6752 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6753 | } | |
6754 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6755 | ||
c10d9d8f | 6756 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6757 | if (idesc->type == IA64_TYPE_DYN) |
6758 | { | |
97762d08 JB |
6759 | enum ia64_opnd opnd1, opnd2; |
6760 | ||
800eeca4 JW |
6761 | if ((strcmp (idesc->name, "nop") == 0) |
6762 | || (strcmp (idesc->name, "break") == 0)) | |
6763 | insn_unit = required_unit; | |
91d777ee L |
6764 | else if (strcmp (idesc->name, "hint") == 0) |
6765 | { | |
6766 | insn_unit = required_unit; | |
6767 | if (required_unit == IA64_UNIT_B) | |
6768 | { | |
6769 | switch (md.hint_b) | |
6770 | { | |
6771 | case hint_b_ok: | |
6772 | break; | |
6773 | case hint_b_warning: | |
6774 | as_warn ("hint in B unit may be treated as nop"); | |
6775 | break; | |
6776 | case hint_b_error: | |
6777 | /* When manual bundling is off and there is no | |
6778 | user template, we choose a different unit so | |
6779 | that hint won't go into the current slot. We | |
6780 | will fill the current bundle with nops and | |
6781 | try to put hint into the next bundle. */ | |
6782 | if (!manual_bundling && user_template < 0) | |
6783 | insn_unit = IA64_UNIT_I; | |
6784 | else | |
6785 | as_bad ("hint in B unit can't be used"); | |
6786 | break; | |
6787 | } | |
6788 | } | |
6789 | } | |
97762d08 JB |
6790 | else if (strcmp (idesc->name, "chk.s") == 0 |
6791 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6792 | { |
6793 | insn_unit = IA64_UNIT_M; | |
97762d08 JB |
6794 | if (required_unit == IA64_UNIT_I |
6795 | || (required_unit == IA64_UNIT_F && template == 6)) | |
800eeca4 JW |
6796 | insn_unit = IA64_UNIT_I; |
6797 | } | |
6798 | else | |
6799 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6800 | ||
09124b3f | 6801 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]); |
97762d08 JB |
6802 | opnd1 = idesc->operands[0]; |
6803 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6804 | ia64_free_opcode (idesc); |
97762d08 JB |
6805 | idesc = ia64_find_opcode (mnemonic); |
6806 | /* moves to/from ARs have collisions */ | |
6807 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6808 | { | |
6809 | while (idesc != NULL | |
6810 | && (idesc->operands[0] != opnd1 | |
6811 | || idesc->operands[1] != opnd2)) | |
6812 | idesc = get_next_opcode (idesc); | |
6813 | } | |
97762d08 | 6814 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6815 | } |
6816 | else | |
6817 | { | |
6818 | insn_type = idesc->type; | |
6819 | insn_unit = IA64_UNIT_NIL; | |
6820 | switch (insn_type) | |
6821 | { | |
6822 | case IA64_TYPE_A: | |
6823 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6824 | insn_unit = required_unit; | |
6825 | break; | |
542d6675 | 6826 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6827 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6828 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6829 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6830 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6831 | default: break; | |
6832 | } | |
6833 | } | |
6834 | ||
6835 | if (insn_unit != required_unit) | |
9b505842 | 6836 | continue; /* Try next slot. */ |
800eeca4 | 6837 | |
196e8040 JW |
6838 | if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen) |
6839 | { | |
6840 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6841 | |
196e8040 JW |
6842 | md.slot[curr].loc_directive_seen = 0; |
6843 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6844 | } | |
800eeca4 JW |
6845 | |
6846 | build_insn (md.slot + curr, insn + i); | |
6847 | ||
d6e78c11 JW |
6848 | ptr = md.slot[curr].unwind_record; |
6849 | if (ptr) | |
6850 | { | |
6851 | /* Set slot numbers for all remaining unwind records belonging to the | |
6852 | current insn. There can not be any prologue/body unwind records | |
6853 | here. */ | |
d6e78c11 JW |
6854 | for (; ptr != end_ptr; ptr = ptr->next) |
6855 | { | |
6856 | ptr->slot_number = (unsigned long) f + i; | |
6857 | ptr->slot_frag = frag_now; | |
6858 | } | |
6859 | md.slot[curr].unwind_record = NULL; | |
6860 | } | |
10850f29 | 6861 | |
800eeca4 JW |
6862 | if (required_unit == IA64_UNIT_L) |
6863 | { | |
6864 | know (i == 1); | |
6865 | /* skip one slot for long/X-unit instructions */ | |
6866 | ++i; | |
6867 | } | |
6868 | --md.num_slots_in_use; | |
9b505842 | 6869 | last_slot = i; |
800eeca4 | 6870 | |
542d6675 | 6871 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6872 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6873 | { | |
6874 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6875 | symbol_set_frag (lfix->sym, frag_now); | |
6876 | } | |
f1bcba5b JW |
6877 | /* and fix up the tags also. */ |
6878 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6879 | { | |
6880 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6881 | symbol_set_frag (lfix->sym, frag_now); | |
6882 | } | |
800eeca4 JW |
6883 | |
6884 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6885 | { | |
6886 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6887 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6888 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6889 | fix->tc_fix_data.opnd = ifix->opnd; | |
6890 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6891 | fix->fx_file = md.slot[curr].src_file; | |
6892 | fix->fx_line = md.slot[curr].src_line; | |
6893 | } | |
6894 | ||
6895 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6896 | ||
542d6675 | 6897 | /* clear slot: */ |
800eeca4 JW |
6898 | ia64_free_opcode (md.slot[curr].idesc); |
6899 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6900 | md.slot[curr].user_template = -1; | |
6901 | ||
6902 | if (manual_bundling_off) | |
6903 | { | |
6904 | manual_bundling = 0; | |
6905 | break; | |
6906 | } | |
6907 | curr = (curr + 1) % NUM_SLOTS; | |
6908 | idesc = md.slot[curr].idesc; | |
6909 | } | |
f4660e2c | 6910 | if (manual_bundling > 0) |
800eeca4 JW |
6911 | { |
6912 | if (md.num_slots_in_use > 0) | |
ac025970 | 6913 | { |
9b505842 JB |
6914 | if (last_slot >= 2) |
6915 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6916 | "`%s' does not fit into bundle", idesc->name); | |
6917 | else if (last_slot < 0) | |
6918 | { | |
6919 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6920 | "`%s' does not fit into %s template", | |
6921 | idesc->name, ia64_templ_desc[template].name); | |
6922 | /* Drop first insn so we don't livelock. */ | |
6923 | --md.num_slots_in_use; | |
6924 | know (curr == first); | |
6925 | ia64_free_opcode (md.slot[curr].idesc); | |
6926 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6927 | md.slot[curr].user_template = -1; | |
6928 | } | |
6929 | else | |
6930 | { | |
6931 | const char *where; | |
6932 | ||
6933 | if (template == 2) | |
6934 | where = "X slot"; | |
6935 | else if (last_slot == 0) | |
6936 | where = "slots 2 or 3"; | |
6937 | else | |
6938 | where = "slot 3"; | |
6939 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6940 | "`%s' can't go in %s of %s template", | |
6941 | idesc->name, where, ia64_templ_desc[template].name); | |
6942 | } | |
ac025970 | 6943 | } |
800eeca4 JW |
6944 | else |
6945 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6946 | "Missing '}' at end of file"); | |
6947 | } | |
6948 | know (md.num_slots_in_use < NUM_SLOTS); | |
6949 | ||
6950 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6951 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6952 | ||
44f5c83a JW |
6953 | number_to_chars_littleendian (f + 0, t0, 8); |
6954 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
6955 | } |
6956 | ||
6957 | int | |
6958 | md_parse_option (c, arg) | |
6959 | int c; | |
6960 | char *arg; | |
6961 | { | |
7463c317 | 6962 | |
800eeca4 JW |
6963 | switch (c) |
6964 | { | |
c43c2cc5 | 6965 | /* Switches from the Intel assembler. */ |
44f5c83a | 6966 | case 'm': |
800eeca4 JW |
6967 | if (strcmp (arg, "ilp64") == 0 |
6968 | || strcmp (arg, "lp64") == 0 | |
6969 | || strcmp (arg, "p64") == 0) | |
6970 | { | |
6971 | md.flags |= EF_IA_64_ABI64; | |
6972 | } | |
6973 | else if (strcmp (arg, "ilp32") == 0) | |
6974 | { | |
6975 | md.flags &= ~EF_IA_64_ABI64; | |
6976 | } | |
6977 | else if (strcmp (arg, "le") == 0) | |
6978 | { | |
6979 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6980 | default_big_endian = 0; |
800eeca4 JW |
6981 | } |
6982 | else if (strcmp (arg, "be") == 0) | |
6983 | { | |
6984 | md.flags |= EF_IA_64_BE; | |
549f748d | 6985 | default_big_endian = 1; |
800eeca4 | 6986 | } |
970d6792 L |
6987 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6988 | { | |
6989 | arg += 13; | |
6990 | if (strcmp (arg, "warning") == 0) | |
6991 | md.unwind_check = unwind_check_warning; | |
6992 | else if (strcmp (arg, "error") == 0) | |
6993 | md.unwind_check = unwind_check_error; | |
6994 | else | |
6995 | return 0; | |
6996 | } | |
91d777ee L |
6997 | else if (strncmp (arg, "hint.b=", 7) == 0) |
6998 | { | |
6999 | arg += 7; | |
7000 | if (strcmp (arg, "ok") == 0) | |
7001 | md.hint_b = hint_b_ok; | |
7002 | else if (strcmp (arg, "warning") == 0) | |
7003 | md.hint_b = hint_b_warning; | |
7004 | else if (strcmp (arg, "error") == 0) | |
7005 | md.hint_b = hint_b_error; | |
7006 | else | |
7007 | return 0; | |
7008 | } | |
8c2fda1d L |
7009 | else if (strncmp (arg, "tune=", 5) == 0) |
7010 | { | |
7011 | arg += 5; | |
7012 | if (strcmp (arg, "itanium1") == 0) | |
7013 | md.tune = itanium1; | |
7014 | else if (strcmp (arg, "itanium2") == 0) | |
7015 | md.tune = itanium2; | |
7016 | else | |
7017 | return 0; | |
7018 | } | |
800eeca4 JW |
7019 | else |
7020 | return 0; | |
7021 | break; | |
7022 | ||
7023 | case 'N': | |
7024 | if (strcmp (arg, "so") == 0) | |
7025 | { | |
542d6675 | 7026 | /* Suppress signon message. */ |
800eeca4 JW |
7027 | } |
7028 | else if (strcmp (arg, "pi") == 0) | |
7029 | { | |
7030 | /* Reject privileged instructions. FIXME */ | |
7031 | } | |
7032 | else if (strcmp (arg, "us") == 0) | |
7033 | { | |
7034 | /* Allow union of signed and unsigned range. FIXME */ | |
7035 | } | |
7036 | else if (strcmp (arg, "close_fcalls") == 0) | |
7037 | { | |
7038 | /* Do not resolve global function calls. */ | |
7039 | } | |
7040 | else | |
7041 | return 0; | |
7042 | break; | |
7043 | ||
7044 | case 'C': | |
7045 | /* temp[="prefix"] Insert temporary labels into the object file | |
7046 | symbol table prefixed by "prefix". | |
7047 | Default prefix is ":temp:". | |
7048 | */ | |
7049 | break; | |
7050 | ||
7051 | case 'a': | |
800eeca4 JW |
7052 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7053 | according to <tgt> -- | |
7054 | exit: branch out from the current context (default) | |
7055 | labels: all labels in context may be branch targets | |
7056 | */ | |
85b40035 L |
7057 | if (strncmp (arg, "indirect=", 9) != 0) |
7058 | return 0; | |
800eeca4 JW |
7059 | break; |
7060 | ||
7061 | case 'x': | |
7062 | /* -X conflicts with an ignored option, use -x instead */ | |
7063 | md.detect_dv = 1; | |
7064 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7065 | { |
7066 | /* set default mode to explicit */ | |
7067 | md.default_explicit_mode = 1; | |
7068 | break; | |
7069 | } | |
800eeca4 | 7070 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7071 | { |
7072 | md.default_explicit_mode = 0; | |
7073 | } | |
f1dab70d JB |
7074 | else if (strcmp (arg, "none") == 0) |
7075 | { | |
7076 | md.detect_dv = 0; | |
7077 | } | |
800eeca4 | 7078 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7079 | { |
7080 | md.debug_dv = 1; | |
7081 | } | |
800eeca4 | 7082 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7083 | { |
7084 | md.default_explicit_mode = 1; | |
7085 | md.debug_dv = 1; | |
7086 | } | |
f1dab70d JB |
7087 | else if (strcmp (arg, "debugn") == 0) |
7088 | { | |
7089 | md.debug_dv = 1; | |
7090 | md.detect_dv = 0; | |
7091 | } | |
800eeca4 | 7092 | else |
542d6675 KH |
7093 | { |
7094 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7095 | } | |
800eeca4 JW |
7096 | break; |
7097 | ||
7098 | case 'S': | |
7099 | /* nops Print nops statistics. */ | |
7100 | break; | |
7101 | ||
c43c2cc5 JW |
7102 | /* GNU specific switches for gcc. */ |
7103 | case OPTION_MCONSTANT_GP: | |
7104 | md.flags |= EF_IA_64_CONS_GP; | |
7105 | break; | |
7106 | ||
7107 | case OPTION_MAUTO_PIC: | |
7108 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7109 | break; | |
7110 | ||
800eeca4 JW |
7111 | default: |
7112 | return 0; | |
7113 | } | |
7114 | ||
7115 | return 1; | |
7116 | } | |
7117 | ||
7118 | void | |
7119 | md_show_usage (stream) | |
7120 | FILE *stream; | |
7121 | { | |
542d6675 | 7122 | fputs (_("\ |
800eeca4 | 7123 | IA-64 options:\n\ |
6290819d NC |
7124 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7125 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7126 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7127 | without function descriptors (sets ELF header flag\n\ | |
7128 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7129 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7130 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7131 | -mtune=[itanium1|itanium2]\n\ |
7132 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7133 | -munwind-check=[warning|error]\n\ |
7134 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7135 | -mhint.b=[ok|warning|error]\n\ |
7136 | hint.b check (default -mhint.b=error)\n\ | |
f1dab70d JB |
7137 | -x | -xexplicit turn on dependency violation checking\n\ |
7138 | -xauto automagically remove dependency violations (default)\n\ | |
7139 | -xnone turn off dependency violation checking\n\ | |
7140 | -xdebug debug dependency violation checker\n\ | |
7141 | -xdebugn debug dependency violation checker but turn off\n\ | |
7142 | dependency violation checking\n\ | |
7143 | -xdebugx debug dependency violation checker and turn on\n\ | |
7144 | dependency violation checking\n"), | |
800eeca4 JW |
7145 | stream); |
7146 | } | |
7147 | ||
acebd4ce AS |
7148 | void |
7149 | ia64_after_parse_args () | |
7150 | { | |
7151 | if (debug_type == DEBUG_STABS) | |
7152 | as_fatal (_("--gstabs is not supported for ia64")); | |
7153 | } | |
7154 | ||
44576e1f RH |
7155 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7156 | ||
7157 | static int | |
800eeca4 JW |
7158 | match (int templ, int type, int slot) |
7159 | { | |
7160 | enum ia64_unit unit; | |
7161 | int result; | |
7162 | ||
7163 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7164 | switch (type) | |
7165 | { | |
7166 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7167 | case IA64_TYPE_A: | |
7168 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7169 | break; | |
7170 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7171 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7172 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7173 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7174 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7175 | default: result = 0; break; | |
7176 | } | |
7177 | return result; | |
7178 | } | |
7179 | ||
7c06efaa JW |
7180 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7181 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7182 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7183 | |
7184 | static inline int | |
7185 | extra_goodness (int templ, int slot) | |
7186 | { | |
8c2fda1d L |
7187 | switch (md.tune) |
7188 | { | |
7189 | case itanium1: | |
7190 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7191 | return 2; | |
7192 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7193 | return 1; | |
7194 | else | |
7195 | return 0; | |
7196 | break; | |
7197 | case itanium2: | |
7198 | if (match (templ, IA64_TYPE_M, slot) | |
7199 | || match (templ, IA64_TYPE_I, slot)) | |
7200 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7201 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7202 | branch-prediction. */ | |
7203 | return 2; | |
7204 | else | |
7205 | return 0; | |
7206 | break; | |
7207 | default: | |
7208 | abort (); | |
7209 | return 0; | |
7210 | } | |
44576e1f RH |
7211 | } |
7212 | ||
800eeca4 JW |
7213 | /* This function is called once, at assembler startup time. It sets |
7214 | up all the tables, etc. that the MD part of the assembler will need | |
7215 | that can be determined before arguments are parsed. */ | |
7216 | void | |
7217 | md_begin () | |
7218 | { | |
44f5c83a | 7219 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
7220 | const char *err; |
7221 | char name[8]; | |
7222 | ||
7223 | md.auto_align = 1; | |
7224 | md.explicit_mode = md.default_explicit_mode; | |
7225 | ||
7226 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7227 | ||
0234cb7c | 7228 | /* Make sure function pointers get initialized. */ |
10a98291 | 7229 | target_big_endian = -1; |
549f748d | 7230 | dot_byteorder (default_big_endian); |
10a98291 | 7231 | |
35f5df7f L |
7232 | alias_hash = hash_new (); |
7233 | alias_name_hash = hash_new (); | |
7234 | secalias_hash = hash_new (); | |
7235 | secalias_name_hash = hash_new (); | |
7236 | ||
13ae64f3 JJ |
7237 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7238 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7239 | &zero_address_frag); | |
7240 | ||
7241 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7242 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7243 | &zero_address_frag); | |
7244 | ||
800eeca4 | 7245 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7246 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7247 | &zero_address_frag); | |
800eeca4 JW |
7248 | |
7249 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7250 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7251 | &zero_address_frag); | |
800eeca4 JW |
7252 | |
7253 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7254 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7255 | &zero_address_frag); | |
800eeca4 | 7256 | |
fa2c7eff RH |
7257 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7258 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7259 | &zero_address_frag); | |
7260 | ||
c67e42c9 | 7261 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7262 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7263 | &zero_address_frag); | |
c67e42c9 | 7264 | |
800eeca4 | 7265 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7266 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7267 | &zero_address_frag); | |
800eeca4 JW |
7268 | |
7269 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7270 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7271 | &zero_address_frag); | |
800eeca4 JW |
7272 | |
7273 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7274 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7275 | &zero_address_frag); | |
800eeca4 | 7276 | |
13ae64f3 JJ |
7277 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7278 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7279 | &zero_address_frag); | |
7280 | ||
800eeca4 | 7281 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7282 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7283 | &zero_address_frag); | |
800eeca4 JW |
7284 | |
7285 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7286 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7287 | &zero_address_frag); | |
800eeca4 | 7288 | |
13ae64f3 JJ |
7289 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7290 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7291 | &zero_address_frag); | |
7292 | ||
7293 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7294 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7295 | &zero_address_frag); | |
7296 | ||
7297 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7298 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7299 | &zero_address_frag); | |
7300 | ||
3969b680 RH |
7301 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7302 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7303 | &zero_address_frag); | |
7304 | ||
f6fe78d6 JW |
7305 | if (md.tune != itanium1) |
7306 | { | |
7307 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7308 | le_nop[0] = 0x8; | |
7309 | le_nop_stop[0] = 0x9; | |
7310 | } | |
7311 | ||
197865e8 | 7312 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7313 | base 4 value, in which each match counts for 3. Match-failures |
7314 | result in NOPs and we use extra_goodness() to pick the execution | |
7315 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7316 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7317 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7318 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7319 | { | |
7320 | best = 0; | |
7321 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7322 | { | |
7323 | goodness = 0; | |
7324 | if (match (t, i, 0)) | |
7325 | { | |
7326 | if (match (t, j, 1)) | |
7327 | { | |
286cee81 | 7328 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7329 | goodness = 3 + 3 + 3; |
800eeca4 | 7330 | else |
44576e1f | 7331 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7332 | } |
7333 | else if (match (t, j, 2)) | |
44576e1f | 7334 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7335 | else |
44576e1f RH |
7336 | { |
7337 | goodness = 3; | |
7338 | goodness += extra_goodness (t, 1); | |
7339 | goodness += extra_goodness (t, 2); | |
7340 | } | |
800eeca4 JW |
7341 | } |
7342 | else if (match (t, i, 1)) | |
7343 | { | |
286cee81 | 7344 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7345 | goodness = 3 + 3; |
800eeca4 | 7346 | else |
44576e1f | 7347 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7348 | } |
7349 | else if (match (t, i, 2)) | |
44576e1f | 7350 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7351 | |
7352 | if (goodness > best) | |
7353 | { | |
7354 | best = goodness; | |
7355 | best_template[i][j][k] = t; | |
7356 | } | |
7357 | } | |
7358 | } | |
7359 | ||
7c06efaa JW |
7360 | #ifdef DEBUG_TEMPLATES |
7361 | /* For debugging changes to the best_template calculations. We don't care | |
7362 | about combinations with invalid instructions, so start the loops at 1. */ | |
7363 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7364 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7365 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7366 | { | |
7367 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7368 | 'x', 'd' }; | |
7369 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7370 | type_letter[k], | |
7371 | ia64_templ_desc[best_template[i][j][k]].name); | |
7372 | } | |
7373 | #endif | |
7374 | ||
800eeca4 JW |
7375 | for (i = 0; i < NUM_SLOTS; ++i) |
7376 | md.slot[i].user_template = -1; | |
7377 | ||
7378 | md.pseudo_hash = hash_new (); | |
7379 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7380 | { | |
7381 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7382 | (void *) (pseudo_opcode + i)); | |
7383 | if (err) | |
7384 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
7385 | pseudo_opcode[i].name, err); | |
7386 | } | |
7387 | ||
7388 | md.reg_hash = hash_new (); | |
7389 | md.dynreg_hash = hash_new (); | |
7390 | md.const_hash = hash_new (); | |
7391 | md.entry_hash = hash_new (); | |
7392 | ||
542d6675 | 7393 | /* general registers: */ |
800eeca4 JW |
7394 | |
7395 | total = 128; | |
7396 | for (i = 0; i < total; ++i) | |
7397 | { | |
7398 | sprintf (name, "r%d", i - REG_GR); | |
7399 | md.regsym[i] = declare_register (name, i); | |
7400 | } | |
7401 | ||
542d6675 | 7402 | /* floating point registers: */ |
800eeca4 JW |
7403 | total += 128; |
7404 | for (; i < total; ++i) | |
7405 | { | |
7406 | sprintf (name, "f%d", i - REG_FR); | |
7407 | md.regsym[i] = declare_register (name, i); | |
7408 | } | |
7409 | ||
542d6675 | 7410 | /* application registers: */ |
800eeca4 JW |
7411 | total += 128; |
7412 | ar_base = i; | |
7413 | for (; i < total; ++i) | |
7414 | { | |
7415 | sprintf (name, "ar%d", i - REG_AR); | |
7416 | md.regsym[i] = declare_register (name, i); | |
7417 | } | |
7418 | ||
542d6675 | 7419 | /* control registers: */ |
800eeca4 JW |
7420 | total += 128; |
7421 | cr_base = i; | |
7422 | for (; i < total; ++i) | |
7423 | { | |
7424 | sprintf (name, "cr%d", i - REG_CR); | |
7425 | md.regsym[i] = declare_register (name, i); | |
7426 | } | |
7427 | ||
542d6675 | 7428 | /* predicate registers: */ |
800eeca4 JW |
7429 | total += 64; |
7430 | for (; i < total; ++i) | |
7431 | { | |
7432 | sprintf (name, "p%d", i - REG_P); | |
7433 | md.regsym[i] = declare_register (name, i); | |
7434 | } | |
7435 | ||
542d6675 | 7436 | /* branch registers: */ |
800eeca4 JW |
7437 | total += 8; |
7438 | for (; i < total; ++i) | |
7439 | { | |
7440 | sprintf (name, "b%d", i - REG_BR); | |
7441 | md.regsym[i] = declare_register (name, i); | |
7442 | } | |
7443 | ||
7444 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
7445 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
7446 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
7447 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
7448 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
7449 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
7450 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
7451 | ||
7452 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7453 | { | |
7454 | regnum = indirect_reg[i].regnum; | |
7455 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
7456 | } | |
7457 | ||
542d6675 | 7458 | /* define synonyms for application registers: */ |
800eeca4 JW |
7459 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
7460 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
7461 | REG_AR + ar[i - REG_AR].regnum); | |
7462 | ||
542d6675 | 7463 | /* define synonyms for control registers: */ |
800eeca4 JW |
7464 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
7465 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
7466 | REG_CR + cr[i - REG_CR].regnum); | |
7467 | ||
7468 | declare_register ("gp", REG_GR + 1); | |
7469 | declare_register ("sp", REG_GR + 12); | |
7470 | declare_register ("rp", REG_BR + 0); | |
7471 | ||
542d6675 | 7472 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7473 | declare_register ("psp", REG_PSP); |
7474 | ||
800eeca4 JW |
7475 | declare_register_set ("ret", 4, REG_GR + 8); |
7476 | declare_register_set ("farg", 8, REG_FR + 8); | |
7477 | declare_register_set ("fret", 8, REG_FR + 8); | |
7478 | ||
7479 | for (i = 0; i < NELEMS (const_bits); ++i) | |
7480 | { | |
7481 | err = hash_insert (md.const_hash, const_bits[i].name, | |
7482 | (PTR) (const_bits + i)); | |
7483 | if (err) | |
7484 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
7485 | name, err); | |
7486 | } | |
7487 | ||
44f5c83a JW |
7488 | /* Set the architecture and machine depending on defaults and command line |
7489 | options. */ | |
7490 | if (md.flags & EF_IA_64_ABI64) | |
7491 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7492 | else | |
7493 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7494 | ||
7495 | if (! ok) | |
7496 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7497 | |
557debba JW |
7498 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7499 | ||
7500 | if (md.flags & EF_IA_64_ABI64) | |
7501 | { | |
7502 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7503 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7504 | } | |
7505 | else | |
7506 | { | |
7507 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7508 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7509 | } | |
7510 | ||
800eeca4 JW |
7511 | md.mem_offset.hint = 0; |
7512 | md.path = 0; | |
7513 | md.maxpaths = 0; | |
7514 | md.entry_labels = NULL; | |
7515 | } | |
7516 | ||
970d6792 L |
7517 | /* Set the default options in md. Cannot do this in md_begin because |
7518 | that is called after md_parse_option which is where we set the | |
7519 | options in md based on command line options. */ | |
44f5c83a JW |
7520 | |
7521 | void | |
7522 | ia64_init (argc, argv) | |
2434f565 JW |
7523 | int argc ATTRIBUTE_UNUSED; |
7524 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7525 | { |
1cd8ff38 | 7526 | md.flags = MD_FLAGS_DEFAULT; |
f1dab70d | 7527 | md.detect_dv = 1; |
970d6792 L |
7528 | /* FIXME: We should change it to unwind_check_error someday. */ |
7529 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7530 | md.hint_b = hint_b_error; |
8c2fda1d | 7531 | md.tune = itanium2; |
44f5c83a JW |
7532 | } |
7533 | ||
7534 | /* Return a string for the target object file format. */ | |
7535 | ||
7536 | const char * | |
7537 | ia64_target_format () | |
7538 | { | |
7539 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7540 | { | |
72a76794 JW |
7541 | if (md.flags & EF_IA_64_BE) |
7542 | { | |
7543 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7544 | #if defined(TE_AIX50) |
7463c317 | 7545 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7546 | #elif defined(TE_HPUX) |
7547 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7548 | #else |
72a76794 | 7549 | return "elf64-ia64-big"; |
7463c317 | 7550 | #endif |
72a76794 | 7551 | else |
1cd8ff38 | 7552 | #if defined(TE_AIX50) |
7463c317 | 7553 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7554 | #elif defined(TE_HPUX) |
7555 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7556 | #else |
72a76794 | 7557 | return "elf32-ia64-big"; |
7463c317 | 7558 | #endif |
72a76794 | 7559 | } |
44f5c83a | 7560 | else |
72a76794 JW |
7561 | { |
7562 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7563 | #ifdef TE_AIX50 |
7564 | return "elf64-ia64-aix-little"; | |
7565 | #else | |
72a76794 | 7566 | return "elf64-ia64-little"; |
7463c317 | 7567 | #endif |
72a76794 | 7568 | else |
7463c317 TW |
7569 | #ifdef TE_AIX50 |
7570 | return "elf32-ia64-aix-little"; | |
7571 | #else | |
72a76794 | 7572 | return "elf32-ia64-little"; |
7463c317 | 7573 | #endif |
72a76794 | 7574 | } |
44f5c83a JW |
7575 | } |
7576 | else | |
7577 | return "unknown-format"; | |
7578 | } | |
7579 | ||
800eeca4 JW |
7580 | void |
7581 | ia64_end_of_source () | |
7582 | { | |
542d6675 | 7583 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7584 | insn_group_break (1, 0, 0); |
7585 | ||
542d6675 | 7586 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7587 | ia64_flush_insns (); |
7588 | ||
7589 | bfd_set_private_flags (stdoutput, md.flags); | |
7590 | ||
800eeca4 JW |
7591 | md.mem_offset.hint = 0; |
7592 | } | |
7593 | ||
7594 | void | |
7595 | ia64_start_line () | |
7596 | { | |
f1bcba5b JW |
7597 | if (md.qp.X_op == O_register) |
7598 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7599 | md.qp.X_op = O_absent; |
7600 | ||
7601 | if (ignore_input ()) | |
7602 | return; | |
7603 | ||
7604 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7605 | { | |
7606 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7607 | { |
7608 | static int warned; | |
7609 | ||
7610 | if (!warned) | |
7611 | { | |
7612 | warned = 1; | |
7613 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7614 | } | |
7615 | } | |
800eeca4 | 7616 | else |
542d6675 | 7617 | insn_group_break (1, 0, 0); |
800eeca4 JW |
7618 | } |
7619 | } | |
7620 | ||
f1bcba5b JW |
7621 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7622 | labels. */ | |
7623 | static int defining_tag = 0; | |
7624 | ||
800eeca4 JW |
7625 | int |
7626 | ia64_unrecognized_line (ch) | |
7627 | int ch; | |
7628 | { | |
7629 | switch (ch) | |
7630 | { | |
7631 | case '(': | |
7632 | expression (&md.qp); | |
7633 | if (*input_line_pointer++ != ')') | |
7634 | { | |
7635 | as_bad ("Expected ')'"); | |
7636 | return 0; | |
7637 | } | |
7638 | if (md.qp.X_op != O_register) | |
7639 | { | |
7640 | as_bad ("Qualifying predicate expected"); | |
7641 | return 0; | |
7642 | } | |
7643 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7644 | { | |
7645 | as_bad ("Predicate register expected"); | |
7646 | return 0; | |
7647 | } | |
7648 | return 1; | |
7649 | ||
7650 | case '{': | |
7651 | if (md.manual_bundling) | |
7652 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7653 | else | |
7654 | CURR_SLOT.manual_bundling_on = 1; | |
7655 | md.manual_bundling = 1; | |
7656 | ||
542d6675 KH |
7657 | /* Bundling is only acceptable in explicit mode |
7658 | or when in default automatic mode. */ | |
800eeca4 | 7659 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7660 | { |
7661 | if (!md.mode_explicitly_set | |
7662 | && !md.default_explicit_mode) | |
7663 | dot_dv_mode ('E'); | |
7664 | else | |
7665 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7666 | } | |
800eeca4 JW |
7667 | return 1; |
7668 | ||
7669 | case '}': | |
7670 | if (!md.manual_bundling) | |
7671 | as_warn ("Found '}' when manual bundling is off"); | |
7672 | else | |
7673 | PREV_SLOT.manual_bundling_off = 1; | |
7674 | md.manual_bundling = 0; | |
7675 | ||
7676 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7677 | if (md.detect_dv |
542d6675 KH |
7678 | && md.explicit_mode |
7679 | && !md.mode_explicitly_set | |
7680 | && !md.default_explicit_mode) | |
7681 | dot_dv_mode ('A'); | |
800eeca4 JW |
7682 | |
7683 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7684 | happens automatically because ';' is an end of line marker. */ | |
7685 | SKIP_WHITESPACE (); | |
7686 | if (input_line_pointer[0] == '{') | |
7687 | { | |
7688 | input_line_pointer++; | |
7689 | return ia64_unrecognized_line ('{'); | |
7690 | } | |
7691 | ||
7692 | demand_empty_rest_of_line (); | |
7693 | return 1; | |
7694 | ||
f1bcba5b JW |
7695 | case '[': |
7696 | { | |
7697 | char *s; | |
7698 | char c; | |
7699 | symbolS *tag; | |
4d5a53ff | 7700 | int temp; |
f1bcba5b JW |
7701 | |
7702 | if (md.qp.X_op == O_register) | |
7703 | { | |
7704 | as_bad ("Tag must come before qualifying predicate."); | |
7705 | return 0; | |
7706 | } | |
4d5a53ff JW |
7707 | |
7708 | /* This implements just enough of read_a_source_file in read.c to | |
7709 | recognize labels. */ | |
7710 | if (is_name_beginner (*input_line_pointer)) | |
7711 | { | |
7712 | s = input_line_pointer; | |
7713 | c = get_symbol_end (); | |
7714 | } | |
7715 | else if (LOCAL_LABELS_FB | |
3882b010 | 7716 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7717 | { |
7718 | temp = 0; | |
3882b010 | 7719 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7720 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7721 | fb_label_instance_inc (temp); | |
7722 | s = fb_label_name (temp, 0); | |
7723 | c = *input_line_pointer; | |
7724 | } | |
7725 | else | |
7726 | { | |
7727 | s = NULL; | |
7728 | c = '\0'; | |
7729 | } | |
f1bcba5b JW |
7730 | if (c != ':') |
7731 | { | |
7732 | /* Put ':' back for error messages' sake. */ | |
7733 | *input_line_pointer++ = ':'; | |
7734 | as_bad ("Expected ':'"); | |
7735 | return 0; | |
7736 | } | |
4d5a53ff | 7737 | |
f1bcba5b JW |
7738 | defining_tag = 1; |
7739 | tag = colon (s); | |
7740 | defining_tag = 0; | |
7741 | /* Put ':' back for error messages' sake. */ | |
7742 | *input_line_pointer++ = ':'; | |
7743 | if (*input_line_pointer++ != ']') | |
7744 | { | |
7745 | as_bad ("Expected ']'"); | |
7746 | return 0; | |
7747 | } | |
7748 | if (! tag) | |
7749 | { | |
7750 | as_bad ("Tag name expected"); | |
7751 | return 0; | |
7752 | } | |
7753 | return 1; | |
7754 | } | |
7755 | ||
800eeca4 JW |
7756 | default: |
7757 | break; | |
7758 | } | |
542d6675 KH |
7759 | |
7760 | /* Not a valid line. */ | |
7761 | return 0; | |
800eeca4 JW |
7762 | } |
7763 | ||
7764 | void | |
7765 | ia64_frob_label (sym) | |
7766 | struct symbol *sym; | |
7767 | { | |
7768 | struct label_fix *fix; | |
7769 | ||
f1bcba5b JW |
7770 | /* Tags need special handling since they are not bundle breaks like |
7771 | labels. */ | |
7772 | if (defining_tag) | |
7773 | { | |
7774 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7775 | fix->sym = sym; | |
7776 | fix->next = CURR_SLOT.tag_fixups; | |
7777 | CURR_SLOT.tag_fixups = fix; | |
7778 | ||
7779 | return; | |
7780 | } | |
7781 | ||
800eeca4 JW |
7782 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7783 | { | |
7784 | md.last_text_seg = now_seg; | |
7785 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7786 | fix->sym = sym; | |
7787 | fix->next = CURR_SLOT.label_fixups; | |
7788 | CURR_SLOT.label_fixups = fix; | |
7789 | ||
542d6675 | 7790 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7791 | if (md.path == md.maxpaths) |
542d6675 KH |
7792 | { |
7793 | md.maxpaths += 20; | |
7794 | md.entry_labels = (const char **) | |
7795 | xrealloc ((void *) md.entry_labels, | |
7796 | md.maxpaths * sizeof (char *)); | |
7797 | } | |
800eeca4 JW |
7798 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7799 | } | |
7800 | } | |
7801 | ||
936cf02e JW |
7802 | #ifdef TE_HPUX |
7803 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7804 | that are declared but unused. This routine removes declared, | |
7805 | unused symbols from an object. */ | |
7806 | int | |
7807 | ia64_frob_symbol (sym) | |
7808 | struct symbol *sym; | |
7809 | { | |
7810 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7811 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7812 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7813 | && ! S_IS_EXTERNAL (sym))) | |
7814 | return 1; | |
7815 | return 0; | |
7816 | } | |
7817 | #endif | |
7818 | ||
800eeca4 JW |
7819 | void |
7820 | ia64_flush_pending_output () | |
7821 | { | |
4d5a53ff JW |
7822 | if (!md.keep_pending_output |
7823 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7824 | { |
7825 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7826 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7827 | insn_group_break (1, 0, 0); | |
7828 | ia64_flush_insns (); | |
7829 | } | |
7830 | } | |
7831 | ||
7832 | /* Do ia64-specific expression optimization. All that's done here is | |
7833 | to transform index expressions that are either due to the indexing | |
7834 | of rotating registers or due to the indexing of indirect register | |
7835 | sets. */ | |
7836 | int | |
7837 | ia64_optimize_expr (l, op, r) | |
7838 | expressionS *l; | |
7839 | operatorT op; | |
7840 | expressionS *r; | |
7841 | { | |
7842 | unsigned num_regs; | |
7843 | ||
7844 | if (op == O_index) | |
7845 | { | |
7846 | if (l->X_op == O_register && r->X_op == O_constant) | |
7847 | { | |
7848 | num_regs = (l->X_add_number >> 16); | |
7849 | if ((unsigned) r->X_add_number >= num_regs) | |
7850 | { | |
7851 | if (!num_regs) | |
7852 | as_bad ("No current frame"); | |
7853 | else | |
7854 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7855 | r->X_add_number = 0; | |
7856 | } | |
7857 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7858 | return 1; | |
7859 | } | |
7860 | else if (l->X_op == O_register && r->X_op == O_register) | |
7861 | { | |
7862 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7863 | || l->X_add_number == IND_MEM) | |
7864 | { | |
7865 | as_bad ("Indirect register set name expected"); | |
7866 | l->X_add_number = IND_CPUID; | |
7867 | } | |
7868 | l->X_op = O_index; | |
7869 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7870 | l->X_add_number = r->X_add_number; | |
7871 | return 1; | |
7872 | } | |
7873 | } | |
7874 | return 0; | |
7875 | } | |
7876 | ||
7877 | int | |
16a48f83 | 7878 | ia64_parse_name (name, e, nextcharP) |
800eeca4 JW |
7879 | char *name; |
7880 | expressionS *e; | |
16a48f83 | 7881 | char *nextcharP; |
800eeca4 JW |
7882 | { |
7883 | struct const_desc *cdesc; | |
7884 | struct dynreg *dr = 0; | |
16a48f83 | 7885 | unsigned int idx; |
800eeca4 JW |
7886 | struct symbol *sym; |
7887 | char *end; | |
7888 | ||
16a48f83 JB |
7889 | if (*name == '@') |
7890 | { | |
7891 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7892 | ||
7893 | /* Find what relocation pseudo-function we're dealing with. */ | |
7894 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7895 | if (pseudo_func[idx].name | |
7896 | && pseudo_func[idx].name[0] == name[1] | |
7897 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7898 | { | |
7899 | pseudo_type = pseudo_func[idx].type; | |
7900 | break; | |
7901 | } | |
7902 | switch (pseudo_type) | |
7903 | { | |
7904 | case PSEUDO_FUNC_RELOC: | |
7905 | end = input_line_pointer; | |
7906 | if (*nextcharP != '(') | |
7907 | { | |
7908 | as_bad ("Expected '('"); | |
2f6d622e | 7909 | break; |
16a48f83 JB |
7910 | } |
7911 | /* Skip '('. */ | |
7912 | ++input_line_pointer; | |
7913 | expression (e); | |
7914 | if (*input_line_pointer != ')') | |
7915 | { | |
7916 | as_bad ("Missing ')'"); | |
7917 | goto done; | |
7918 | } | |
7919 | /* Skip ')'. */ | |
7920 | ++input_line_pointer; | |
7921 | if (e->X_op != O_symbol) | |
7922 | { | |
7923 | if (e->X_op != O_pseudo_fixup) | |
7924 | { | |
7925 | as_bad ("Not a symbolic expression"); | |
7926 | goto done; | |
7927 | } | |
7928 | if (idx != FUNC_LT_RELATIVE) | |
7929 | { | |
7930 | as_bad ("Illegal combination of relocation functions"); | |
7931 | goto done; | |
7932 | } | |
7933 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7934 | { | |
7935 | case FUNC_FPTR_RELATIVE: | |
7936 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7937 | case FUNC_DTP_MODULE: | |
7938 | idx = FUNC_LT_DTP_MODULE; break; | |
7939 | case FUNC_DTP_RELATIVE: | |
7940 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7941 | case FUNC_TP_RELATIVE: | |
7942 | idx = FUNC_LT_TP_RELATIVE; break; | |
7943 | default: | |
7944 | as_bad ("Illegal combination of relocation functions"); | |
7945 | goto done; | |
7946 | } | |
7947 | } | |
7948 | /* Make sure gas doesn't get rid of local symbols that are used | |
7949 | in relocs. */ | |
7950 | e->X_op = O_pseudo_fixup; | |
7951 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7952 | done: |
7953 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7954 | break; |
7955 | ||
7956 | case PSEUDO_FUNC_CONST: | |
7957 | e->X_op = O_constant; | |
7958 | e->X_add_number = pseudo_func[idx].u.ival; | |
7959 | break; | |
7960 | ||
7961 | case PSEUDO_FUNC_REG: | |
7962 | e->X_op = O_register; | |
7963 | e->X_add_number = pseudo_func[idx].u.ival; | |
7964 | break; | |
7965 | ||
7966 | default: | |
7967 | return 0; | |
7968 | } | |
16a48f83 JB |
7969 | return 1; |
7970 | } | |
7971 | ||
542d6675 | 7972 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7973 | sym = hash_find (md.reg_hash, name); |
7974 | if (sym) | |
7975 | { | |
7976 | e->X_op = O_register; | |
7977 | e->X_add_number = S_GET_VALUE (sym); | |
7978 | return 1; | |
7979 | } | |
7980 | ||
7981 | cdesc = hash_find (md.const_hash, name); | |
7982 | if (cdesc) | |
7983 | { | |
7984 | e->X_op = O_constant; | |
7985 | e->X_add_number = cdesc->value; | |
7986 | return 1; | |
7987 | } | |
7988 | ||
542d6675 | 7989 | /* check for inN, locN, or outN: */ |
26b810ce | 7990 | idx = 0; |
800eeca4 JW |
7991 | switch (name[0]) |
7992 | { | |
7993 | case 'i': | |
3882b010 | 7994 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7995 | { |
7996 | dr = &md.in; | |
26b810ce | 7997 | idx = 2; |
800eeca4 JW |
7998 | } |
7999 | break; | |
8000 | ||
8001 | case 'l': | |
3882b010 | 8002 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
8003 | { |
8004 | dr = &md.loc; | |
26b810ce | 8005 | idx = 3; |
800eeca4 JW |
8006 | } |
8007 | break; | |
8008 | ||
8009 | case 'o': | |
3882b010 | 8010 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
8011 | { |
8012 | dr = &md.out; | |
26b810ce | 8013 | idx = 3; |
800eeca4 JW |
8014 | } |
8015 | break; | |
8016 | ||
8017 | default: | |
8018 | break; | |
8019 | } | |
8020 | ||
26b810ce JB |
8021 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
8022 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 8023 | { |
26b810ce JB |
8024 | unsigned long regnum; |
8025 | ||
542d6675 | 8026 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
8027 | regnum = strtoul (name + idx, &end, 10); |
8028 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 8029 | { |
26b810ce | 8030 | if (regnum >= dr->num_regs) |
800eeca4 JW |
8031 | { |
8032 | if (!dr->num_regs) | |
8033 | as_bad ("No current frame"); | |
8034 | else | |
542d6675 KH |
8035 | as_bad ("Register number out of range 0..%u", |
8036 | dr->num_regs - 1); | |
800eeca4 JW |
8037 | regnum = 0; |
8038 | } | |
8039 | e->X_op = O_register; | |
8040 | e->X_add_number = dr->base + regnum; | |
8041 | return 1; | |
8042 | } | |
8043 | } | |
8044 | ||
20b36a95 JB |
8045 | end = alloca (strlen (name) + 1); |
8046 | strcpy (end, name); | |
8047 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8048 | if ((dr = hash_find (md.dynreg_hash, name))) |
8049 | { | |
8050 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8051 | Store the base register number in the low 16 bits of |
8052 | X_add_number and the size of the register set in the top 16 | |
8053 | bits. */ | |
800eeca4 JW |
8054 | e->X_op = O_register; |
8055 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8056 | return 1; | |
8057 | } | |
8058 | return 0; | |
8059 | } | |
8060 | ||
8061 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8062 | ||
8063 | char * | |
8064 | ia64_canonicalize_symbol_name (name) | |
8065 | char *name; | |
8066 | { | |
20b36a95 JB |
8067 | size_t len = strlen (name), full = len; |
8068 | ||
8069 | while (len > 0 && name[len - 1] == '#') | |
8070 | --len; | |
8071 | if (len <= 0) | |
8072 | { | |
8073 | if (full > 0) | |
8074 | as_bad ("Standalone `#' is illegal"); | |
20b36a95 JB |
8075 | } |
8076 | else if (len < full - 1) | |
8077 | as_warn ("Redundant `#' suffix operators"); | |
8078 | name[len] = '\0'; | |
800eeca4 JW |
8079 | return name; |
8080 | } | |
8081 | ||
3e37788f JW |
8082 | /* Return true if idesc is a conditional branch instruction. This excludes |
8083 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8084 | because they always read/write resources regardless of the value of the | |
8085 | qualifying predicate. br.ia must always use p0, and hence is always | |
8086 | taken. Thus this function returns true for branches which can fall | |
8087 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8088 | |
800eeca4 JW |
8089 | static int |
8090 | is_conditional_branch (idesc) | |
542d6675 | 8091 | struct ia64_opcode *idesc; |
800eeca4 | 8092 | { |
1deb8127 | 8093 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8094 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8095 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8096 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8097 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8098 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8099 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8100 | || idesc->name[2] == 'l' | |
8101 | /* br.cond, br.call, br.clr */ | |
8102 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8103 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8104 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8105 | } |
8106 | ||
8107 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8108 | returns zero. */ |
8109 | ||
800eeca4 JW |
8110 | static int |
8111 | is_taken_branch (idesc) | |
542d6675 | 8112 | struct ia64_opcode *idesc; |
800eeca4 JW |
8113 | { |
8114 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8115 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8116 | } |
8117 | ||
8118 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8119 | doubt, returns zero. */ |
8120 | ||
800eeca4 JW |
8121 | static int |
8122 | is_interruption_or_rfi (idesc) | |
542d6675 | 8123 | struct ia64_opcode *idesc; |
800eeca4 JW |
8124 | { |
8125 | if (strcmp (idesc->name, "rfi") == 0) | |
8126 | return 1; | |
8127 | return 0; | |
8128 | } | |
8129 | ||
8130 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8131 | -1 if there is no dependency. */ | |
542d6675 | 8132 | |
800eeca4 JW |
8133 | static int |
8134 | depends_on (depind, idesc) | |
542d6675 KH |
8135 | int depind; |
8136 | struct ia64_opcode *idesc; | |
800eeca4 JW |
8137 | { |
8138 | int i; | |
8139 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8140 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8141 | { |
542d6675 KH |
8142 | if (depind == DEP (dep->chks[i])) |
8143 | return i; | |
800eeca4 JW |
8144 | } |
8145 | return -1; | |
8146 | } | |
8147 | ||
8148 | /* Determine a set of specific resources used for a particular resource | |
8149 | class. Returns the number of specific resources identified For those | |
8150 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8151 | marked nonspecific. |
800eeca4 JW |
8152 | |
8153 | Meanings of value in 'NOTE': | |
8154 | 1) only read/write when the register number is explicitly encoded in the | |
8155 | insn. | |
8156 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8157 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8158 | 3) general register value is used to specify an indirect register; not |
8159 | determinable statically. | |
8160 | 4) only read the given resource when bits 7:0 of the indirect index | |
8161 | register value does not match the register number of the resource; not | |
8162 | determinable statically. | |
8163 | 5) all rules are implementation specific. | |
8164 | 6) only when both the index specified by the reader and the index specified | |
8165 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8166 | statically. |
800eeca4 | 8167 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8168 | set |
800eeca4 JW |
8169 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8170 | only read when these insns reference FR2-31 | |
8171 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8172 | written when these insns write FR32-127 | |
8173 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8174 | instruction | |
8175 | 11) The target predicates are written independently of PR[qp], but source | |
8176 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8177 | cannot statically be determined, all source registers are marked used. | |
8178 | 12) This insn only reads the specified predicate register when that | |
8179 | register is the PR[qp]. | |
8180 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 8181 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8182 | 14) The RSE resource includes the implementation-specific RSE internal |
8183 | state resources. At least one (and possibly more) of these resources are | |
8184 | read by each instruction listed in IC:rse-readers. At least one (and | |
8185 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8186 | IC:rse-writers. |
800eeca4 | 8187 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8188 | generate. |
800eeca4 JW |
8189 | |
8190 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8191 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8192 | */ |
8193 | ||
8194 | #define MAX_SPECS 256 | |
8195 | #define DV_CHK 1 | |
8196 | #define DV_REG 0 | |
8197 | ||
8198 | static int | |
8199 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
8200 | const struct ia64_dependency *dep; |
8201 | struct ia64_opcode *idesc; | |
8202 | int type; /* is this a DV chk or a DV reg? */ | |
8203 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
8204 | int note; /* resource note for this insn's usage */ | |
8205 | int path; /* which execution path to examine */ | |
800eeca4 JW |
8206 | { |
8207 | int count = 0; | |
8208 | int i; | |
8209 | int rsrc_write = 0; | |
8210 | struct rsrc tmpl; | |
197865e8 | 8211 | |
800eeca4 JW |
8212 | if (dep->mode == IA64_DV_WAW |
8213 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8214 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8215 | rsrc_write = 1; | |
8216 | ||
8217 | /* template for any resources we identify */ | |
8218 | tmpl.dependency = dep; | |
8219 | tmpl.note = note; | |
8220 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8221 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8222 | tmpl.link_to_qp_branch = 1; | |
8223 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8224 | tmpl.mem_offset.offset = 0; |
8225 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8226 | tmpl.specific = 1; |
a66d2bb7 | 8227 | tmpl.index = -1; |
7484b8e6 | 8228 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8229 | tmpl.depind = 0; |
8230 | tmpl.file = NULL; | |
8231 | tmpl.line = 0; | |
8232 | tmpl.path = 0; | |
800eeca4 JW |
8233 | |
8234 | #define UNHANDLED \ | |
8235 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8236 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8237 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8238 | ||
8239 | /* we don't need to track these */ | |
8240 | if (dep->semantics == IA64_DVS_NONE) | |
8241 | return 0; | |
8242 | ||
8243 | switch (dep->specifier) | |
8244 | { | |
8245 | case IA64_RS_AR_K: | |
8246 | if (note == 1) | |
542d6675 KH |
8247 | { |
8248 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8249 | { | |
8250 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8251 | if (regno >= 0 && regno <= 7) | |
8252 | { | |
8253 | specs[count] = tmpl; | |
8254 | specs[count++].index = regno; | |
8255 | } | |
8256 | } | |
8257 | } | |
800eeca4 | 8258 | else if (note == 0) |
542d6675 KH |
8259 | { |
8260 | for (i = 0; i < 8; i++) | |
8261 | { | |
8262 | specs[count] = tmpl; | |
8263 | specs[count++].index = i; | |
8264 | } | |
8265 | } | |
800eeca4 | 8266 | else |
542d6675 KH |
8267 | { |
8268 | UNHANDLED; | |
8269 | } | |
800eeca4 JW |
8270 | break; |
8271 | ||
8272 | case IA64_RS_AR_UNAT: | |
8273 | /* This is a mov =AR or mov AR= instruction. */ | |
8274 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8275 | { | |
8276 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8277 | if (regno == AR_UNAT) | |
8278 | { | |
8279 | specs[count++] = tmpl; | |
8280 | } | |
8281 | } | |
8282 | else | |
8283 | { | |
8284 | /* This is a spill/fill, or other instruction that modifies the | |
8285 | unat register. */ | |
8286 | ||
8287 | /* Unless we can determine the specific bits used, mark the whole | |
8288 | thing; bits 8:3 of the memory address indicate the bit used in | |
8289 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8290 | subset of conflicts. */ | |
8291 | specs[count] = tmpl; | |
8292 | if (md.mem_offset.hint) | |
8293 | { | |
542d6675 KH |
8294 | if (md.debug_dv) |
8295 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8296 | /* The index isn't actually used, just set it to something | |
8297 | approximating the bit index. */ | |
800eeca4 JW |
8298 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8299 | specs[count].mem_offset.hint = 1; | |
8300 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8301 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8302 | } | |
8303 | else | |
8304 | { | |
8305 | specs[count++].specific = 0; | |
8306 | } | |
8307 | } | |
8308 | break; | |
8309 | ||
8310 | case IA64_RS_AR: | |
8311 | if (note == 1) | |
542d6675 KH |
8312 | { |
8313 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8314 | { | |
8315 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8316 | if ((regno >= 8 && regno <= 15) | |
8317 | || (regno >= 20 && regno <= 23) | |
8318 | || (regno >= 31 && regno <= 39) | |
8319 | || (regno >= 41 && regno <= 47) | |
8320 | || (regno >= 67 && regno <= 111)) | |
8321 | { | |
8322 | specs[count] = tmpl; | |
8323 | specs[count++].index = regno; | |
8324 | } | |
8325 | } | |
8326 | } | |
800eeca4 | 8327 | else |
542d6675 KH |
8328 | { |
8329 | UNHANDLED; | |
8330 | } | |
800eeca4 JW |
8331 | break; |
8332 | ||
8333 | case IA64_RS_ARb: | |
8334 | if (note == 1) | |
542d6675 KH |
8335 | { |
8336 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8337 | { | |
8338 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8339 | if ((regno >= 48 && regno <= 63) | |
8340 | || (regno >= 112 && regno <= 127)) | |
8341 | { | |
8342 | specs[count] = tmpl; | |
8343 | specs[count++].index = regno; | |
8344 | } | |
8345 | } | |
8346 | } | |
800eeca4 | 8347 | else if (note == 0) |
542d6675 KH |
8348 | { |
8349 | for (i = 48; i < 64; i++) | |
8350 | { | |
8351 | specs[count] = tmpl; | |
8352 | specs[count++].index = i; | |
8353 | } | |
8354 | for (i = 112; i < 128; i++) | |
8355 | { | |
8356 | specs[count] = tmpl; | |
8357 | specs[count++].index = i; | |
8358 | } | |
8359 | } | |
197865e8 | 8360 | else |
542d6675 KH |
8361 | { |
8362 | UNHANDLED; | |
8363 | } | |
800eeca4 JW |
8364 | break; |
8365 | ||
8366 | case IA64_RS_BR: | |
8367 | if (note != 1) | |
542d6675 KH |
8368 | { |
8369 | UNHANDLED; | |
8370 | } | |
800eeca4 | 8371 | else |
542d6675 KH |
8372 | { |
8373 | if (rsrc_write) | |
8374 | { | |
8375 | for (i = 0; i < idesc->num_outputs; i++) | |
8376 | if (idesc->operands[i] == IA64_OPND_B1 | |
8377 | || idesc->operands[i] == IA64_OPND_B2) | |
8378 | { | |
8379 | specs[count] = tmpl; | |
8380 | specs[count++].index = | |
8381 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8382 | } | |
8383 | } | |
8384 | else | |
8385 | { | |
40449e9f | 8386 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8387 | if (idesc->operands[i] == IA64_OPND_B1 |
8388 | || idesc->operands[i] == IA64_OPND_B2) | |
8389 | { | |
8390 | specs[count] = tmpl; | |
8391 | specs[count++].index = | |
8392 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8393 | } | |
8394 | } | |
8395 | } | |
800eeca4 JW |
8396 | break; |
8397 | ||
8398 | case IA64_RS_CPUID: /* four or more registers */ | |
8399 | if (note == 3) | |
542d6675 KH |
8400 | { |
8401 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8402 | { | |
8403 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8404 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8405 | && KNOWN (regno)) | |
8406 | { | |
8407 | specs[count] = tmpl; | |
8408 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8409 | } | |
8410 | else | |
8411 | { | |
8412 | specs[count] = tmpl; | |
8413 | specs[count++].specific = 0; | |
8414 | } | |
8415 | } | |
8416 | } | |
800eeca4 | 8417 | else |
542d6675 KH |
8418 | { |
8419 | UNHANDLED; | |
8420 | } | |
800eeca4 JW |
8421 | break; |
8422 | ||
8423 | case IA64_RS_DBR: /* four or more registers */ | |
8424 | if (note == 3) | |
542d6675 KH |
8425 | { |
8426 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8427 | { | |
8428 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8429 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8430 | && KNOWN (regno)) | |
8431 | { | |
8432 | specs[count] = tmpl; | |
8433 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8434 | } | |
8435 | else | |
8436 | { | |
8437 | specs[count] = tmpl; | |
8438 | specs[count++].specific = 0; | |
8439 | } | |
8440 | } | |
8441 | } | |
800eeca4 | 8442 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8443 | { |
8444 | specs[count] = tmpl; | |
8445 | specs[count++].specific = 0; | |
8446 | } | |
800eeca4 | 8447 | else |
542d6675 KH |
8448 | { |
8449 | UNHANDLED; | |
8450 | } | |
800eeca4 JW |
8451 | break; |
8452 | ||
8453 | case IA64_RS_IBR: /* four or more registers */ | |
8454 | if (note == 3) | |
542d6675 KH |
8455 | { |
8456 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8457 | { | |
8458 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8459 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8460 | && KNOWN (regno)) | |
8461 | { | |
8462 | specs[count] = tmpl; | |
8463 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8464 | } | |
8465 | else | |
8466 | { | |
8467 | specs[count] = tmpl; | |
8468 | specs[count++].specific = 0; | |
8469 | } | |
8470 | } | |
8471 | } | |
800eeca4 | 8472 | else |
542d6675 KH |
8473 | { |
8474 | UNHANDLED; | |
8475 | } | |
800eeca4 JW |
8476 | break; |
8477 | ||
8478 | case IA64_RS_MSR: | |
8479 | if (note == 5) | |
8480 | { | |
8481 | /* These are implementation specific. Force all references to | |
8482 | conflict with all other references. */ | |
8483 | specs[count] = tmpl; | |
8484 | specs[count++].specific = 0; | |
8485 | } | |
8486 | else | |
8487 | { | |
8488 | UNHANDLED; | |
8489 | } | |
8490 | break; | |
8491 | ||
8492 | case IA64_RS_PKR: /* 16 or more registers */ | |
8493 | if (note == 3 || note == 4) | |
542d6675 KH |
8494 | { |
8495 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8496 | { | |
8497 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8498 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8499 | && KNOWN (regno)) | |
8500 | { | |
8501 | if (note == 3) | |
8502 | { | |
8503 | specs[count] = tmpl; | |
8504 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8505 | } | |
8506 | else | |
8507 | for (i = 0; i < NELEMS (gr_values); i++) | |
8508 | { | |
8509 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8510 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8511 | { |
8512 | specs[count] = tmpl; | |
8513 | specs[count++].index = i; | |
8514 | } | |
8515 | } | |
8516 | } | |
8517 | else | |
8518 | { | |
8519 | specs[count] = tmpl; | |
8520 | specs[count++].specific = 0; | |
8521 | } | |
8522 | } | |
8523 | } | |
8524 | else if (note == 0) | |
8525 | { | |
8526 | /* probe et al. */ | |
8527 | specs[count] = tmpl; | |
8528 | specs[count++].specific = 0; | |
8529 | } | |
8530 | break; | |
8531 | ||
8532 | case IA64_RS_PMC: /* four or more registers */ | |
8533 | if (note == 3) | |
8534 | { | |
8535 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8536 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8537 | ||
8538 | { | |
8539 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8540 | ? 1 : !rsrc_write); | |
8541 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8542 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8543 | && KNOWN (regno)) | |
8544 | { | |
8545 | specs[count] = tmpl; | |
8546 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8547 | } | |
8548 | else | |
8549 | { | |
8550 | specs[count] = tmpl; | |
8551 | specs[count++].specific = 0; | |
8552 | } | |
8553 | } | |
8554 | } | |
8555 | else | |
8556 | { | |
8557 | UNHANDLED; | |
8558 | } | |
800eeca4 JW |
8559 | break; |
8560 | ||
8561 | case IA64_RS_PMD: /* four or more registers */ | |
8562 | if (note == 3) | |
542d6675 KH |
8563 | { |
8564 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8565 | { | |
8566 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8567 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8568 | && KNOWN (regno)) | |
8569 | { | |
8570 | specs[count] = tmpl; | |
8571 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8572 | } | |
8573 | else | |
8574 | { | |
8575 | specs[count] = tmpl; | |
8576 | specs[count++].specific = 0; | |
8577 | } | |
8578 | } | |
8579 | } | |
800eeca4 | 8580 | else |
542d6675 KH |
8581 | { |
8582 | UNHANDLED; | |
8583 | } | |
800eeca4 JW |
8584 | break; |
8585 | ||
8586 | case IA64_RS_RR: /* eight registers */ | |
8587 | if (note == 6) | |
542d6675 KH |
8588 | { |
8589 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8590 | { | |
8591 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8592 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8593 | && KNOWN (regno)) | |
8594 | { | |
8595 | specs[count] = tmpl; | |
8596 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8597 | } | |
8598 | else | |
8599 | { | |
8600 | specs[count] = tmpl; | |
8601 | specs[count++].specific = 0; | |
8602 | } | |
8603 | } | |
8604 | } | |
800eeca4 | 8605 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8606 | { |
8607 | specs[count] = tmpl; | |
8608 | specs[count++].specific = 0; | |
8609 | } | |
197865e8 | 8610 | else |
542d6675 KH |
8611 | { |
8612 | UNHANDLED; | |
8613 | } | |
800eeca4 JW |
8614 | break; |
8615 | ||
8616 | case IA64_RS_CR_IRR: | |
197865e8 | 8617 | if (note == 0) |
542d6675 KH |
8618 | { |
8619 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8620 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8621 | if (rsrc_write | |
8622 | && idesc->operands[1] == IA64_OPND_CR3 | |
8623 | && regno == CR_IVR) | |
8624 | { | |
8625 | for (i = 0; i < 4; i++) | |
8626 | { | |
8627 | specs[count] = tmpl; | |
8628 | specs[count++].index = CR_IRR0 + i; | |
8629 | } | |
8630 | } | |
8631 | } | |
800eeca4 | 8632 | else if (note == 1) |
542d6675 KH |
8633 | { |
8634 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8635 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8636 | && regno >= CR_IRR0 | |
8637 | && regno <= CR_IRR3) | |
8638 | { | |
8639 | specs[count] = tmpl; | |
8640 | specs[count++].index = regno; | |
8641 | } | |
8642 | } | |
800eeca4 | 8643 | else |
542d6675 KH |
8644 | { |
8645 | UNHANDLED; | |
8646 | } | |
800eeca4 JW |
8647 | break; |
8648 | ||
8649 | case IA64_RS_CR_LRR: | |
8650 | if (note != 1) | |
542d6675 KH |
8651 | { |
8652 | UNHANDLED; | |
8653 | } | |
197865e8 | 8654 | else |
542d6675 KH |
8655 | { |
8656 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8657 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8658 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8659 | { | |
8660 | specs[count] = tmpl; | |
8661 | specs[count++].index = regno; | |
8662 | } | |
8663 | } | |
800eeca4 JW |
8664 | break; |
8665 | ||
8666 | case IA64_RS_CR: | |
8667 | if (note == 1) | |
542d6675 KH |
8668 | { |
8669 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8670 | { | |
8671 | specs[count] = tmpl; | |
8672 | specs[count++].index = | |
8673 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8674 | } | |
8675 | } | |
800eeca4 | 8676 | else |
542d6675 KH |
8677 | { |
8678 | UNHANDLED; | |
8679 | } | |
800eeca4 JW |
8680 | break; |
8681 | ||
8682 | case IA64_RS_FR: | |
8683 | case IA64_RS_FRb: | |
8684 | if (note != 1) | |
542d6675 KH |
8685 | { |
8686 | UNHANDLED; | |
8687 | } | |
800eeca4 | 8688 | else if (rsrc_write) |
542d6675 KH |
8689 | { |
8690 | if (dep->specifier == IA64_RS_FRb | |
8691 | && idesc->operands[0] == IA64_OPND_F1) | |
8692 | { | |
8693 | specs[count] = tmpl; | |
8694 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8695 | } | |
8696 | } | |
800eeca4 | 8697 | else |
542d6675 KH |
8698 | { |
8699 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8700 | { | |
8701 | if (idesc->operands[i] == IA64_OPND_F2 | |
8702 | || idesc->operands[i] == IA64_OPND_F3 | |
8703 | || idesc->operands[i] == IA64_OPND_F4) | |
8704 | { | |
8705 | specs[count] = tmpl; | |
8706 | specs[count++].index = | |
8707 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8708 | } | |
8709 | } | |
8710 | } | |
800eeca4 JW |
8711 | break; |
8712 | ||
8713 | case IA64_RS_GR: | |
8714 | if (note == 13) | |
542d6675 KH |
8715 | { |
8716 | /* This reference applies only to the GR whose value is loaded with | |
8717 | data returned from memory. */ | |
8718 | specs[count] = tmpl; | |
8719 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8720 | } | |
800eeca4 | 8721 | else if (note == 1) |
542d6675 KH |
8722 | { |
8723 | if (rsrc_write) | |
8724 | { | |
8725 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8726 | if (idesc->operands[i] == IA64_OPND_R1 |
8727 | || idesc->operands[i] == IA64_OPND_R2 | |
8728 | || idesc->operands[i] == IA64_OPND_R3) | |
8729 | { | |
8730 | specs[count] = tmpl; | |
197865e8 | 8731 | specs[count++].index = |
50b81f19 JW |
8732 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8733 | } | |
8734 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8735 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8736 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8737 | { | |
8738 | specs[count] = tmpl; | |
8739 | specs[count++].index = | |
8740 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8741 | } | |
542d6675 KH |
8742 | } |
8743 | else | |
8744 | { | |
8745 | /* Look for anything that reads a GR. */ | |
8746 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8747 | { | |
8748 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8749 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8750 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8751 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8752 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8753 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8754 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8755 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8756 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8757 | || ((i >= idesc->num_outputs) | |
8758 | && (idesc->operands[i] == IA64_OPND_R1 | |
8759 | || idesc->operands[i] == IA64_OPND_R2 | |
8760 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8761 | /* addl source register. */ |
8762 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8763 | { |
8764 | specs[count] = tmpl; | |
8765 | specs[count++].index = | |
8766 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8767 | } | |
8768 | } | |
8769 | } | |
8770 | } | |
197865e8 | 8771 | else |
542d6675 KH |
8772 | { |
8773 | UNHANDLED; | |
8774 | } | |
800eeca4 JW |
8775 | break; |
8776 | ||
139368c9 JW |
8777 | /* This is the same as IA64_RS_PRr, except that the register range is |
8778 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8779 | case IA64_RS_PR: |
8780 | if (note == 0) | |
542d6675 | 8781 | { |
139368c9 | 8782 | for (i = 1; i < 16; i++) |
542d6675 | 8783 | { |
139368c9 JW |
8784 | specs[count] = tmpl; |
8785 | specs[count++].index = i; | |
8786 | } | |
8787 | } | |
8788 | else if (note == 7) | |
8789 | { | |
8790 | valueT mask = 0; | |
8791 | /* Mark only those registers indicated by the mask. */ | |
8792 | if (rsrc_write) | |
8793 | { | |
8794 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8795 | for (i = 1; i < 16; i++) | |
8796 | if (mask & ((valueT) 1 << i)) | |
8797 | { | |
8798 | specs[count] = tmpl; | |
8799 | specs[count++].index = i; | |
8800 | } | |
8801 | } | |
8802 | else | |
8803 | { | |
8804 | UNHANDLED; | |
8805 | } | |
8806 | } | |
8807 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8808 | { | |
8809 | if (rsrc_write) | |
8810 | { | |
8811 | for (i = 0; i < idesc->num_outputs; i++) | |
8812 | { | |
8813 | if (idesc->operands[i] == IA64_OPND_P1 | |
8814 | || idesc->operands[i] == IA64_OPND_P2) | |
8815 | { | |
8816 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8817 | if (regno >= 1 && regno < 16) | |
8818 | { | |
8819 | specs[count] = tmpl; | |
8820 | specs[count++].index = regno; | |
8821 | } | |
8822 | } | |
8823 | } | |
8824 | } | |
8825 | else | |
8826 | { | |
8827 | UNHANDLED; | |
8828 | } | |
8829 | } | |
8830 | else if (note == 12) | |
8831 | { | |
8832 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8833 | { | |
8834 | specs[count] = tmpl; | |
8835 | specs[count++].index = CURR_SLOT.qp_regno; | |
8836 | } | |
8837 | } | |
8838 | else if (note == 1) | |
8839 | { | |
8840 | if (rsrc_write) | |
8841 | { | |
8842 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8843 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8844 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8845 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8846 | |
8847 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8848 | || idesc->operands[0] == IA64_OPND_P2) | |
8849 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8850 | { |
8851 | specs[count] = tmpl; | |
139368c9 JW |
8852 | specs[count].cmp_type = |
8853 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8854 | specs[count++].index = p1; | |
8855 | } | |
8856 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8857 | || idesc->operands[1] == IA64_OPND_P2) | |
8858 | && p2 >= 1 && p2 < 16) | |
8859 | { | |
8860 | specs[count] = tmpl; | |
8861 | specs[count].cmp_type = | |
8862 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8863 | specs[count++].index = p2; | |
542d6675 KH |
8864 | } |
8865 | } | |
8866 | else | |
8867 | { | |
139368c9 | 8868 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8869 | { |
8870 | specs[count] = tmpl; | |
139368c9 JW |
8871 | specs[count++].index = CURR_SLOT.qp_regno; |
8872 | } | |
8873 | if (idesc->operands[1] == IA64_OPND_PR) | |
8874 | { | |
8875 | for (i = 1; i < 16; i++) | |
8876 | { | |
8877 | specs[count] = tmpl; | |
8878 | specs[count++].index = i; | |
8879 | } | |
542d6675 KH |
8880 | } |
8881 | } | |
8882 | } | |
139368c9 JW |
8883 | else |
8884 | { | |
8885 | UNHANDLED; | |
8886 | } | |
8887 | break; | |
8888 | ||
8889 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8890 | simplified cases of this. */ | |
8891 | case IA64_RS_PRr: | |
8892 | if (note == 0) | |
8893 | { | |
8894 | for (i = 16; i < 63; i++) | |
8895 | { | |
8896 | specs[count] = tmpl; | |
8897 | specs[count++].index = i; | |
8898 | } | |
8899 | } | |
800eeca4 | 8900 | else if (note == 7) |
542d6675 KH |
8901 | { |
8902 | valueT mask = 0; | |
8903 | /* Mark only those registers indicated by the mask. */ | |
8904 | if (rsrc_write | |
8905 | && idesc->operands[0] == IA64_OPND_PR) | |
8906 | { | |
8907 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8908 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8909 | for (i = 16; i < 63; i++) |
8910 | { | |
8911 | specs[count] = tmpl; | |
8912 | specs[count++].index = i; | |
8913 | } | |
542d6675 KH |
8914 | } |
8915 | else if (rsrc_write | |
8916 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8917 | { | |
8918 | for (i = 16; i < 63; i++) | |
8919 | { | |
8920 | specs[count] = tmpl; | |
8921 | specs[count++].index = i; | |
8922 | } | |
8923 | } | |
8924 | else | |
8925 | { | |
8926 | UNHANDLED; | |
8927 | } | |
8928 | } | |
800eeca4 | 8929 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8930 | { |
8931 | if (rsrc_write) | |
8932 | { | |
8933 | for (i = 0; i < idesc->num_outputs; i++) | |
8934 | { | |
8935 | if (idesc->operands[i] == IA64_OPND_P1 | |
8936 | || idesc->operands[i] == IA64_OPND_P2) | |
8937 | { | |
8938 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8939 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8940 | { |
8941 | specs[count] = tmpl; | |
8942 | specs[count++].index = regno; | |
8943 | } | |
8944 | } | |
8945 | } | |
8946 | } | |
8947 | else | |
8948 | { | |
8949 | UNHANDLED; | |
8950 | } | |
8951 | } | |
800eeca4 | 8952 | else if (note == 12) |
542d6675 | 8953 | { |
139368c9 | 8954 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8955 | { |
8956 | specs[count] = tmpl; | |
8957 | specs[count++].index = CURR_SLOT.qp_regno; | |
8958 | } | |
8959 | } | |
800eeca4 | 8960 | else if (note == 1) |
542d6675 KH |
8961 | { |
8962 | if (rsrc_write) | |
8963 | { | |
8964 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8965 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8966 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8967 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8968 | |
542d6675 KH |
8969 | if ((idesc->operands[0] == IA64_OPND_P1 |
8970 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8971 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8972 | { |
8973 | specs[count] = tmpl; | |
4a4f25cf | 8974 | specs[count].cmp_type = |
7484b8e6 | 8975 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8976 | specs[count++].index = p1; |
8977 | } | |
8978 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8979 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8980 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8981 | { |
8982 | specs[count] = tmpl; | |
4a4f25cf | 8983 | specs[count].cmp_type = |
7484b8e6 | 8984 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8985 | specs[count++].index = p2; |
8986 | } | |
8987 | } | |
8988 | else | |
8989 | { | |
139368c9 | 8990 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8991 | { |
8992 | specs[count] = tmpl; | |
8993 | specs[count++].index = CURR_SLOT.qp_regno; | |
8994 | } | |
8995 | if (idesc->operands[1] == IA64_OPND_PR) | |
8996 | { | |
139368c9 | 8997 | for (i = 16; i < 63; i++) |
542d6675 KH |
8998 | { |
8999 | specs[count] = tmpl; | |
9000 | specs[count++].index = i; | |
9001 | } | |
9002 | } | |
9003 | } | |
9004 | } | |
197865e8 | 9005 | else |
542d6675 KH |
9006 | { |
9007 | UNHANDLED; | |
9008 | } | |
800eeca4 JW |
9009 | break; |
9010 | ||
9011 | case IA64_RS_PSR: | |
197865e8 | 9012 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 9013 | dep->regindex. */ |
800eeca4 | 9014 | if (note == 0) |
542d6675 KH |
9015 | { |
9016 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
9017 | { | |
9018 | if (dep->regindex < 6) | |
9019 | { | |
9020 | specs[count++] = tmpl; | |
9021 | } | |
9022 | } | |
9023 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
9024 | { | |
9025 | if (dep->regindex < 32 | |
9026 | || dep->regindex == 35 | |
9027 | || dep->regindex == 36 | |
9028 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
9029 | { | |
9030 | specs[count++] = tmpl; | |
9031 | } | |
9032 | } | |
9033 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
9034 | { | |
9035 | if (dep->regindex < 32 | |
9036 | || dep->regindex == 35 | |
9037 | || dep->regindex == 36 | |
9038 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
9039 | { | |
9040 | specs[count++] = tmpl; | |
9041 | } | |
9042 | } | |
9043 | else | |
9044 | { | |
9045 | /* Several PSR bits have very specific dependencies. */ | |
9046 | switch (dep->regindex) | |
9047 | { | |
9048 | default: | |
9049 | specs[count++] = tmpl; | |
9050 | break; | |
9051 | case PSR_IC: | |
9052 | if (rsrc_write) | |
9053 | { | |
9054 | specs[count++] = tmpl; | |
9055 | } | |
9056 | else | |
9057 | { | |
9058 | /* Only certain CR accesses use PSR.ic */ | |
9059 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9060 | || idesc->operands[1] == IA64_OPND_CR3) | |
9061 | { | |
9062 | int index = | |
9063 | ((idesc->operands[0] == IA64_OPND_CR3) | |
9064 | ? 0 : 1); | |
9065 | int regno = | |
9066 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
9067 | ||
9068 | switch (regno) | |
9069 | { | |
9070 | default: | |
9071 | break; | |
9072 | case CR_ITIR: | |
9073 | case CR_IFS: | |
9074 | case CR_IIM: | |
9075 | case CR_IIP: | |
9076 | case CR_IPSR: | |
9077 | case CR_ISR: | |
9078 | case CR_IFA: | |
9079 | case CR_IHA: | |
9080 | case CR_IIPA: | |
9081 | specs[count++] = tmpl; | |
9082 | break; | |
9083 | } | |
9084 | } | |
9085 | } | |
9086 | break; | |
9087 | case PSR_CPL: | |
9088 | if (rsrc_write) | |
9089 | { | |
9090 | specs[count++] = tmpl; | |
9091 | } | |
9092 | else | |
9093 | { | |
9094 | /* Only some AR accesses use cpl */ | |
9095 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9096 | || idesc->operands[1] == IA64_OPND_AR3) | |
9097 | { | |
9098 | int index = | |
9099 | ((idesc->operands[0] == IA64_OPND_AR3) | |
9100 | ? 0 : 1); | |
9101 | int regno = | |
9102 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
9103 | ||
9104 | if (regno == AR_ITC | |
9105 | || (index == 0 | |
9106 | && (regno == AR_ITC | |
9107 | || regno == AR_RSC | |
9108 | || (regno >= AR_K0 | |
9109 | && regno <= AR_K7)))) | |
9110 | { | |
9111 | specs[count++] = tmpl; | |
9112 | } | |
9113 | } | |
9114 | else | |
9115 | { | |
9116 | specs[count++] = tmpl; | |
9117 | } | |
9118 | break; | |
9119 | } | |
9120 | } | |
9121 | } | |
9122 | } | |
800eeca4 | 9123 | else if (note == 7) |
542d6675 KH |
9124 | { |
9125 | valueT mask = 0; | |
9126 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9127 | { | |
9128 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9129 | } | |
9130 | else | |
9131 | { | |
9132 | UNHANDLED; | |
9133 | } | |
9134 | if (mask & ((valueT) 1 << dep->regindex)) | |
9135 | { | |
9136 | specs[count++] = tmpl; | |
9137 | } | |
9138 | } | |
800eeca4 | 9139 | else if (note == 8) |
542d6675 KH |
9140 | { |
9141 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9142 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9143 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9144 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9145 | { | |
9146 | if (idesc->operands[i] == IA64_OPND_F1 | |
9147 | || idesc->operands[i] == IA64_OPND_F2 | |
9148 | || idesc->operands[i] == IA64_OPND_F3 | |
9149 | || idesc->operands[i] == IA64_OPND_F4) | |
9150 | { | |
9151 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9152 | if (reg >= min && reg <= max) | |
9153 | { | |
9154 | specs[count++] = tmpl; | |
9155 | } | |
9156 | } | |
9157 | } | |
9158 | } | |
800eeca4 | 9159 | else if (note == 9) |
542d6675 KH |
9160 | { |
9161 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9162 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9163 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9164 | FR2-31 */ | |
9165 | for (i = 0; i < idesc->num_outputs; i++) | |
9166 | { | |
9167 | if (idesc->operands[i] == IA64_OPND_F1) | |
9168 | { | |
9169 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9170 | if (reg >= min && reg <= max) | |
9171 | { | |
9172 | specs[count++] = tmpl; | |
9173 | } | |
9174 | } | |
9175 | } | |
9176 | } | |
800eeca4 | 9177 | else if (note == 10) |
542d6675 KH |
9178 | { |
9179 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9180 | { | |
9181 | if (idesc->operands[i] == IA64_OPND_R1 | |
9182 | || idesc->operands[i] == IA64_OPND_R2 | |
9183 | || idesc->operands[i] == IA64_OPND_R3) | |
9184 | { | |
9185 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9186 | if (regno >= 16 && regno <= 31) | |
9187 | { | |
9188 | specs[count++] = tmpl; | |
9189 | } | |
9190 | } | |
9191 | } | |
9192 | } | |
800eeca4 | 9193 | else |
542d6675 KH |
9194 | { |
9195 | UNHANDLED; | |
9196 | } | |
800eeca4 JW |
9197 | break; |
9198 | ||
9199 | case IA64_RS_AR_FPSR: | |
9200 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9201 | { |
9202 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9203 | if (regno == AR_FPSR) | |
9204 | { | |
9205 | specs[count++] = tmpl; | |
9206 | } | |
9207 | } | |
800eeca4 | 9208 | else |
542d6675 KH |
9209 | { |
9210 | specs[count++] = tmpl; | |
9211 | } | |
800eeca4 JW |
9212 | break; |
9213 | ||
197865e8 | 9214 | case IA64_RS_ARX: |
800eeca4 JW |
9215 | /* Handle all AR[REG] resources */ |
9216 | if (note == 0 || note == 1) | |
542d6675 KH |
9217 | { |
9218 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9219 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9220 | && regno == dep->regindex) | |
9221 | { | |
9222 | specs[count++] = tmpl; | |
9223 | } | |
9224 | /* other AR[REG] resources may be affected by AR accesses */ | |
9225 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9226 | { | |
9227 | /* AR[] writes */ | |
9228 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9229 | switch (dep->regindex) | |
9230 | { | |
9231 | default: | |
9232 | break; | |
9233 | case AR_BSP: | |
9234 | case AR_RNAT: | |
9235 | if (regno == AR_BSPSTORE) | |
9236 | { | |
9237 | specs[count++] = tmpl; | |
9238 | } | |
9239 | case AR_RSC: | |
9240 | if (!rsrc_write && | |
9241 | (regno == AR_BSPSTORE | |
9242 | || regno == AR_RNAT)) | |
9243 | { | |
9244 | specs[count++] = tmpl; | |
9245 | } | |
9246 | break; | |
9247 | } | |
9248 | } | |
9249 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9250 | { | |
9251 | /* AR[] reads */ | |
9252 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9253 | switch (dep->regindex) | |
9254 | { | |
9255 | default: | |
9256 | break; | |
9257 | case AR_RSC: | |
9258 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9259 | { | |
9260 | specs[count++] = tmpl; | |
9261 | } | |
9262 | break; | |
9263 | } | |
9264 | } | |
9265 | else | |
9266 | { | |
9267 | specs[count++] = tmpl; | |
9268 | } | |
9269 | } | |
800eeca4 | 9270 | else |
542d6675 KH |
9271 | { |
9272 | UNHANDLED; | |
9273 | } | |
800eeca4 JW |
9274 | break; |
9275 | ||
9276 | case IA64_RS_CRX: | |
9277 | /* Handle all CR[REG] resources */ | |
9278 | if (note == 0 || note == 1) | |
542d6675 KH |
9279 | { |
9280 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9281 | { | |
9282 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9283 | if (regno == dep->regindex) | |
9284 | { | |
9285 | specs[count++] = tmpl; | |
9286 | } | |
9287 | else if (!rsrc_write) | |
9288 | { | |
9289 | /* Reads from CR[IVR] affect other resources. */ | |
9290 | if (regno == CR_IVR) | |
9291 | { | |
9292 | if ((dep->regindex >= CR_IRR0 | |
9293 | && dep->regindex <= CR_IRR3) | |
9294 | || dep->regindex == CR_TPR) | |
9295 | { | |
9296 | specs[count++] = tmpl; | |
9297 | } | |
9298 | } | |
9299 | } | |
9300 | } | |
9301 | else | |
9302 | { | |
9303 | specs[count++] = tmpl; | |
9304 | } | |
9305 | } | |
800eeca4 | 9306 | else |
542d6675 KH |
9307 | { |
9308 | UNHANDLED; | |
9309 | } | |
800eeca4 JW |
9310 | break; |
9311 | ||
9312 | case IA64_RS_INSERVICE: | |
9313 | /* look for write of EOI (67) or read of IVR (65) */ | |
9314 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9315 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9316 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9317 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9318 | { | |
9319 | specs[count++] = tmpl; | |
9320 | } | |
800eeca4 JW |
9321 | break; |
9322 | ||
9323 | case IA64_RS_GR0: | |
9324 | if (note == 1) | |
542d6675 KH |
9325 | { |
9326 | specs[count++] = tmpl; | |
9327 | } | |
800eeca4 | 9328 | else |
542d6675 KH |
9329 | { |
9330 | UNHANDLED; | |
9331 | } | |
800eeca4 JW |
9332 | break; |
9333 | ||
9334 | case IA64_RS_CFM: | |
9335 | if (note != 2) | |
542d6675 KH |
9336 | { |
9337 | specs[count++] = tmpl; | |
9338 | } | |
800eeca4 | 9339 | else |
542d6675 KH |
9340 | { |
9341 | /* Check if any of the registers accessed are in the rotating region. | |
9342 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9343 | region */ | |
9344 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9345 | { | |
9346 | if (idesc->operands[i] == IA64_OPND_R1 | |
9347 | || idesc->operands[i] == IA64_OPND_R2 | |
9348 | || idesc->operands[i] == IA64_OPND_R3) | |
9349 | { | |
9350 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9351 | /* Assumes that md.rot.num_regs is always valid */ | |
9352 | if (md.rot.num_regs > 0 | |
9353 | && num > 31 | |
9354 | && num < 31 + md.rot.num_regs) | |
9355 | { | |
9356 | specs[count] = tmpl; | |
9357 | specs[count++].specific = 0; | |
9358 | } | |
9359 | } | |
9360 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9361 | || idesc->operands[i] == IA64_OPND_F2 | |
9362 | || idesc->operands[i] == IA64_OPND_F3 | |
9363 | || idesc->operands[i] == IA64_OPND_F4) | |
9364 | { | |
9365 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9366 | if (num > 31) | |
9367 | { | |
9368 | specs[count] = tmpl; | |
9369 | specs[count++].specific = 0; | |
9370 | } | |
9371 | } | |
9372 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9373 | || idesc->operands[i] == IA64_OPND_P2) | |
9374 | { | |
9375 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9376 | if (num > 15) | |
9377 | { | |
9378 | specs[count] = tmpl; | |
9379 | specs[count++].specific = 0; | |
9380 | } | |
9381 | } | |
9382 | } | |
9383 | if (CURR_SLOT.qp_regno > 15) | |
9384 | { | |
9385 | specs[count] = tmpl; | |
9386 | specs[count++].specific = 0; | |
9387 | } | |
9388 | } | |
800eeca4 JW |
9389 | break; |
9390 | ||
139368c9 JW |
9391 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9392 | the fact that there is only one register. */ | |
800eeca4 JW |
9393 | case IA64_RS_PR63: |
9394 | if (note == 0) | |
542d6675 KH |
9395 | { |
9396 | specs[count++] = tmpl; | |
9397 | } | |
139368c9 | 9398 | else if (note == 7) |
40449e9f KH |
9399 | { |
9400 | valueT mask = 0; | |
9401 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9402 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9403 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9404 | specs[count++] = tmpl; |
40449e9f | 9405 | } |
800eeca4 | 9406 | else if (note == 11) |
542d6675 KH |
9407 | { |
9408 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9409 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9410 | || (idesc->operands[1] == IA64_OPND_P2 | |
9411 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9412 | { | |
9413 | specs[count++] = tmpl; | |
9414 | } | |
9415 | } | |
800eeca4 | 9416 | else if (note == 12) |
542d6675 KH |
9417 | { |
9418 | if (CURR_SLOT.qp_regno == 63) | |
9419 | { | |
9420 | specs[count++] = tmpl; | |
9421 | } | |
9422 | } | |
800eeca4 | 9423 | else if (note == 1) |
542d6675 KH |
9424 | { |
9425 | if (rsrc_write) | |
9426 | { | |
40449e9f KH |
9427 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9428 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9429 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9430 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9431 | |
4a4f25cf | 9432 | if (p1 == 63 |
7484b8e6 TW |
9433 | && (idesc->operands[0] == IA64_OPND_P1 |
9434 | || idesc->operands[0] == IA64_OPND_P2)) | |
9435 | { | |
40449e9f | 9436 | specs[count] = tmpl; |
4a4f25cf | 9437 | specs[count++].cmp_type = |
7484b8e6 TW |
9438 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9439 | } | |
9440 | if (p2 == 63 | |
9441 | && (idesc->operands[1] == IA64_OPND_P1 | |
9442 | || idesc->operands[1] == IA64_OPND_P2)) | |
9443 | { | |
40449e9f | 9444 | specs[count] = tmpl; |
4a4f25cf | 9445 | specs[count++].cmp_type = |
7484b8e6 TW |
9446 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9447 | } | |
542d6675 KH |
9448 | } |
9449 | else | |
9450 | { | |
9451 | if (CURR_SLOT.qp_regno == 63) | |
9452 | { | |
9453 | specs[count++] = tmpl; | |
9454 | } | |
9455 | } | |
9456 | } | |
800eeca4 | 9457 | else |
542d6675 KH |
9458 | { |
9459 | UNHANDLED; | |
9460 | } | |
800eeca4 JW |
9461 | break; |
9462 | ||
9463 | case IA64_RS_RSE: | |
9464 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9465 | read resources have not yet been completely identified, so for now |
9466 | treat RSE as a single resource */ | |
800eeca4 | 9467 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9468 | { |
9469 | if (rsrc_write) | |
9470 | { | |
9471 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9472 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9473 | { | |
a66d2bb7 | 9474 | specs[count++] = tmpl; |
542d6675 KH |
9475 | } |
9476 | } | |
9477 | else | |
9478 | { | |
9479 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9480 | { | |
9481 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9482 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9483 | { | |
9484 | specs[count++] = tmpl; | |
9485 | } | |
9486 | } | |
9487 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9488 | { | |
9489 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9490 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9491 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9492 | { | |
9493 | specs[count++] = tmpl; | |
9494 | } | |
9495 | } | |
9496 | } | |
9497 | } | |
197865e8 | 9498 | else |
542d6675 KH |
9499 | { |
9500 | specs[count++] = tmpl; | |
9501 | } | |
800eeca4 JW |
9502 | break; |
9503 | ||
9504 | case IA64_RS_ANY: | |
9505 | /* FIXME -- do any of these need to be non-specific? */ | |
9506 | specs[count++] = tmpl; | |
9507 | break; | |
9508 | ||
9509 | default: | |
9510 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9511 | break; | |
9512 | } | |
9513 | ||
9514 | return count; | |
9515 | } | |
9516 | ||
9517 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9518 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9519 | ||
800eeca4 JW |
9520 | static void |
9521 | clear_qp_branch_flag (mask) | |
542d6675 | 9522 | valueT mask; |
800eeca4 JW |
9523 | { |
9524 | int i; | |
542d6675 | 9525 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9526 | { |
197865e8 | 9527 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9528 | if ((bit & mask) != 0) |
542d6675 KH |
9529 | { |
9530 | regdeps[i].link_to_qp_branch = 0; | |
9531 | } | |
800eeca4 JW |
9532 | } |
9533 | } | |
9534 | ||
5e2f6673 L |
9535 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9536 | any mutexes which contain one of the PRs and create new ones when | |
9537 | needed. */ | |
9538 | ||
9539 | static int | |
9540 | update_qp_mutex (valueT mask) | |
9541 | { | |
9542 | int i; | |
9543 | int add = 0; | |
9544 | ||
9545 | i = 0; | |
9546 | while (i < qp_mutexeslen) | |
9547 | { | |
9548 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9549 | { | |
9550 | /* If it destroys and creates the same mutex, do nothing. */ | |
9551 | if (qp_mutexes[i].prmask == mask | |
9552 | && qp_mutexes[i].path == md.path) | |
9553 | { | |
9554 | i++; | |
9555 | add = -1; | |
9556 | } | |
9557 | else | |
9558 | { | |
9559 | int keep = 0; | |
9560 | ||
9561 | if (md.debug_dv) | |
9562 | { | |
9563 | fprintf (stderr, " Clearing mutex relation"); | |
9564 | print_prmask (qp_mutexes[i].prmask); | |
9565 | fprintf (stderr, "\n"); | |
9566 | } | |
9567 | ||
9568 | /* Deal with the old mutex with more than 3+ PRs only if | |
9569 | the new mutex on the same execution path with it. | |
9570 | ||
9571 | FIXME: The 3+ mutex support is incomplete. | |
9572 | dot_pred_rel () may be a better place to fix it. */ | |
9573 | if (qp_mutexes[i].path == md.path) | |
9574 | { | |
9575 | /* If it is a proper subset of the mutex, create a | |
9576 | new mutex. */ | |
9577 | if (add == 0 | |
9578 | && (qp_mutexes[i].prmask & mask) == mask) | |
9579 | add = 1; | |
9580 | ||
9581 | qp_mutexes[i].prmask &= ~mask; | |
9582 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9583 | { | |
9584 | /* Modify the mutex if there are more than one | |
9585 | PR left. */ | |
9586 | keep = 1; | |
9587 | i++; | |
9588 | } | |
9589 | } | |
9590 | ||
9591 | if (keep == 0) | |
9592 | /* Remove the mutex. */ | |
9593 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9594 | } | |
9595 | } | |
9596 | else | |
9597 | ++i; | |
9598 | } | |
9599 | ||
9600 | if (add == 1) | |
9601 | add_qp_mutex (mask); | |
9602 | ||
9603 | return add; | |
9604 | } | |
9605 | ||
197865e8 | 9606 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9607 | |
542d6675 KH |
9608 | Any changes to a PR clears the mutex relations which include that PR. */ |
9609 | ||
800eeca4 JW |
9610 | static void |
9611 | clear_qp_mutex (mask) | |
542d6675 | 9612 | valueT mask; |
800eeca4 JW |
9613 | { |
9614 | int i; | |
9615 | ||
9616 | i = 0; | |
9617 | while (i < qp_mutexeslen) | |
9618 | { | |
9619 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9620 | { |
9621 | if (md.debug_dv) | |
9622 | { | |
9623 | fprintf (stderr, " Clearing mutex relation"); | |
9624 | print_prmask (qp_mutexes[i].prmask); | |
9625 | fprintf (stderr, "\n"); | |
9626 | } | |
9627 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9628 | } | |
800eeca4 | 9629 | else |
542d6675 | 9630 | ++i; |
800eeca4 JW |
9631 | } |
9632 | } | |
9633 | ||
9634 | /* Clear implies relations which contain PRs in the given masks. | |
9635 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9636 | indicates the implied PR. */ |
9637 | ||
800eeca4 JW |
9638 | static void |
9639 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9640 | valueT p1_mask; |
9641 | valueT p2_mask; | |
800eeca4 JW |
9642 | { |
9643 | int i; | |
9644 | ||
9645 | i = 0; | |
9646 | while (i < qp_implieslen) | |
9647 | { | |
197865e8 | 9648 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9649 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9650 | { | |
9651 | if (md.debug_dv) | |
9652 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9653 | qp_implies[i].p1, qp_implies[i].p2); | |
9654 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9655 | } | |
197865e8 | 9656 | else |
542d6675 | 9657 | ++i; |
800eeca4 JW |
9658 | } |
9659 | } | |
9660 | ||
542d6675 KH |
9661 | /* Add the PRs specified to the list of implied relations. */ |
9662 | ||
800eeca4 JW |
9663 | static void |
9664 | add_qp_imply (p1, p2) | |
542d6675 | 9665 | int p1, p2; |
800eeca4 JW |
9666 | { |
9667 | valueT mask; | |
9668 | valueT bit; | |
9669 | int i; | |
9670 | ||
542d6675 | 9671 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9672 | if (p1 == 0 || p2 == 0) |
9673 | abort (); | |
9674 | ||
9675 | if (p1 == p2) | |
9676 | return; | |
9677 | ||
542d6675 KH |
9678 | /* If it exists already, ignore it. */ |
9679 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9680 | { |
197865e8 | 9681 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9682 | && qp_implies[i].p2 == p2 |
9683 | && qp_implies[i].path == md.path | |
9684 | && !qp_implies[i].p2_branched) | |
9685 | return; | |
800eeca4 JW |
9686 | } |
9687 | ||
9688 | if (qp_implieslen == qp_impliestotlen) | |
9689 | { | |
9690 | qp_impliestotlen += 20; | |
9691 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9692 | xrealloc ((void *) qp_implies, |
9693 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9694 | } |
9695 | if (md.debug_dv) | |
9696 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9697 | qp_implies[qp_implieslen].p1 = p1; | |
9698 | qp_implies[qp_implieslen].p2 = p2; | |
9699 | qp_implies[qp_implieslen].path = md.path; | |
9700 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9701 | ||
9702 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9703 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9704 | as well. */ |
542d6675 | 9705 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9706 | { |
9707 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9708 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9709 | if (qp_implies[i].p2 == p1) |
542d6675 | 9710 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9711 | } |
9712 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9713 | relation containing p2, duplicate it and replace p2 with p1. */ |
9714 | bit = (valueT) 1 << p1; | |
9715 | mask = (valueT) 1 << p2; | |
542d6675 | 9716 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9717 | { |
9718 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9719 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9720 | } |
9721 | } | |
9722 | ||
800eeca4 JW |
9723 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9724 | one of the PRs can be true at any time. PR0 should never be included in | |
9725 | the mask. */ | |
542d6675 | 9726 | |
800eeca4 JW |
9727 | static void |
9728 | add_qp_mutex (mask) | |
542d6675 | 9729 | valueT mask; |
800eeca4 JW |
9730 | { |
9731 | if (mask & 0x1) | |
9732 | abort (); | |
9733 | ||
9734 | if (qp_mutexeslen == qp_mutexestotlen) | |
9735 | { | |
9736 | qp_mutexestotlen += 20; | |
9737 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9738 | xrealloc ((void *) qp_mutexes, |
9739 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9740 | } |
9741 | if (md.debug_dv) | |
9742 | { | |
9743 | fprintf (stderr, " Registering mutex on"); | |
9744 | print_prmask (mask); | |
9745 | fprintf (stderr, "\n"); | |
9746 | } | |
9747 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9748 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9749 | } | |
9750 | ||
cb5301b6 RH |
9751 | static int |
9752 | has_suffix_p (name, suffix) | |
40449e9f KH |
9753 | const char *name; |
9754 | const char *suffix; | |
cb5301b6 RH |
9755 | { |
9756 | size_t namelen = strlen (name); | |
9757 | size_t sufflen = strlen (suffix); | |
9758 | ||
9759 | if (namelen <= sufflen) | |
9760 | return 0; | |
9761 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9762 | } | |
9763 | ||
800eeca4 JW |
9764 | static void |
9765 | clear_register_values () | |
9766 | { | |
9767 | int i; | |
9768 | if (md.debug_dv) | |
9769 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9770 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9771 | gr_values[i].known = 0; |
9772 | } | |
9773 | ||
9774 | /* Keep track of register values/changes which affect DV tracking. | |
9775 | ||
9776 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9777 | have to examine a group of strings to identify them. */ |
800eeca4 | 9778 | |
800eeca4 JW |
9779 | static void |
9780 | note_register_values (idesc) | |
542d6675 | 9781 | struct ia64_opcode *idesc; |
800eeca4 JW |
9782 | { |
9783 | valueT qp_changemask = 0; | |
9784 | int i; | |
9785 | ||
542d6675 KH |
9786 | /* Invalidate values for registers being written to. */ |
9787 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9788 | { |
197865e8 | 9789 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9790 | || idesc->operands[i] == IA64_OPND_R2 |
9791 | || idesc->operands[i] == IA64_OPND_R3) | |
9792 | { | |
9793 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9794 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9795 | gr_values[regno].known = 0; | |
9796 | } | |
50b81f19 JW |
9797 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9798 | { | |
9799 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9800 | if (regno > 0 && regno < 4) | |
9801 | gr_values[regno].known = 0; | |
9802 | } | |
197865e8 | 9803 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9804 | || idesc->operands[i] == IA64_OPND_P2) |
9805 | { | |
9806 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9807 | qp_changemask |= (valueT) 1 << regno; | |
9808 | } | |
800eeca4 | 9809 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9810 | { |
9811 | if (idesc->operands[2] & (valueT) 0x10000) | |
9812 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9813 | else | |
9814 | qp_changemask = idesc->operands[2]; | |
9815 | break; | |
9816 | } | |
800eeca4 | 9817 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9818 | { |
9819 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9820 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9821 | else |
9822 | qp_changemask = idesc->operands[1]; | |
9823 | qp_changemask &= ~(valueT) 0xFFFF; | |
9824 | break; | |
9825 | } | |
9826 | } | |
9827 | ||
9828 | /* Always clear qp branch flags on any PR change. */ | |
9829 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9830 | clear_qp_branch_flag (qp_changemask); |
9831 | ||
542d6675 | 9832 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9833 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9834 | { | |
197865e8 | 9835 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9836 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9837 | { |
9838 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9839 | gr_values[i].known = 0; | |
9840 | } | |
800eeca4 JW |
9841 | clear_qp_mutex (qp_changemask); |
9842 | clear_qp_implies (qp_changemask, qp_changemask); | |
9843 | } | |
542d6675 KH |
9844 | /* After a call, all register values are undefined, except those marked |
9845 | as "safe". */ | |
800eeca4 | 9846 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9847 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9848 | { |
56d27c17 | 9849 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9850 | clear_register_values (); |
9851 | clear_qp_mutex (~qp_safe_across_calls); | |
9852 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9853 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9854 | } | |
e9718fe1 | 9855 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9856 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9857 | { |
9858 | clear_register_values (); | |
197865e8 KH |
9859 | clear_qp_mutex (~(valueT) 0); |
9860 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9861 | } |
542d6675 | 9862 | /* Look for mutex and implies relations. */ |
197865e8 | 9863 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9864 | || idesc->operands[0] == IA64_OPND_P2) |
9865 | && (idesc->operands[1] == IA64_OPND_P1 | |
9866 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9867 | { |
9868 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9869 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9870 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9871 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9872 | |
5e2f6673 L |
9873 | /* If both PRs are PR0, we can't really do anything. */ |
9874 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9875 | { |
9876 | if (md.debug_dv) | |
9877 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9878 | } | |
800eeca4 | 9879 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9880 | with the following exceptions. */ |
cb5301b6 RH |
9881 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9882 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9883 | { |
542d6675 KH |
9884 | clear_qp_implies (p2mask, p1mask); |
9885 | } | |
cb5301b6 RH |
9886 | else if (has_suffix_p (idesc->name, ".andcm") |
9887 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9888 | { |
9889 | clear_qp_implies (0, p1mask | p2mask); | |
9890 | } | |
cb5301b6 RH |
9891 | else if (has_suffix_p (idesc->name, ".orcm") |
9892 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9893 | { |
9894 | clear_qp_mutex (p1mask | p2mask); | |
9895 | clear_qp_implies (p1mask | p2mask, 0); | |
9896 | } | |
800eeca4 | 9897 | else |
542d6675 | 9898 | { |
5e2f6673 L |
9899 | int added = 0; |
9900 | ||
542d6675 | 9901 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9902 | |
9903 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9904 | if (p1 == 0 || p2 == 0) | |
9905 | clear_qp_mutex (p1mask | p2mask); | |
9906 | else | |
9907 | added = update_qp_mutex (p1mask | p2mask); | |
9908 | ||
9909 | if (CURR_SLOT.qp_regno == 0 | |
9910 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9911 | { |
5e2f6673 L |
9912 | if (added == 0 && p1 && p2) |
9913 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9914 | if (CURR_SLOT.qp_regno != 0) |
9915 | { | |
5e2f6673 L |
9916 | if (p1) |
9917 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9918 | if (p2) | |
9919 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9920 | } |
9921 | } | |
542d6675 KH |
9922 | } |
9923 | } | |
9924 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9925 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9926 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9927 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 9928 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
9929 | && (strcmp (idesc->name, "mov") == 0 |
9930 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9931 | { |
9932 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9933 | if (regno > 0 && regno < NELEMS (gr_values)) |
9934 | { | |
9935 | gr_values[regno].known = 1; | |
9936 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9937 | gr_values[regno].path = md.path; | |
9938 | if (md.debug_dv) | |
2434f565 JW |
9939 | { |
9940 | fprintf (stderr, " Know gr%d = ", regno); | |
9941 | fprintf_vma (stderr, gr_values[regno].value); | |
9942 | fputs ("\n", stderr); | |
9943 | } | |
542d6675 | 9944 | } |
800eeca4 | 9945 | } |
a66d2bb7 JB |
9946 | /* Look for dep.z imm insns. */ |
9947 | else if (idesc->operands[0] == IA64_OPND_R1 | |
9948 | && idesc->operands[1] == IA64_OPND_IMM8 | |
9949 | && strcmp (idesc->name, "dep.z") == 0) | |
9950 | { | |
9951 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
9952 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9953 | { | |
9954 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
9955 | ||
9956 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
9957 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
9958 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
9959 | gr_values[regno].known = 1; | |
9960 | gr_values[regno].value = value; | |
9961 | gr_values[regno].path = md.path; | |
9962 | if (md.debug_dv) | |
9963 | { | |
9964 | fprintf (stderr, " Know gr%d = ", regno); | |
9965 | fprintf_vma (stderr, gr_values[regno].value); | |
9966 | fputs ("\n", stderr); | |
9967 | } | |
9968 | } | |
9969 | } | |
197865e8 | 9970 | else |
800eeca4 JW |
9971 | { |
9972 | clear_qp_mutex (qp_changemask); | |
9973 | clear_qp_implies (qp_changemask, qp_changemask); | |
9974 | } | |
9975 | } | |
9976 | ||
542d6675 KH |
9977 | /* Return whether the given predicate registers are currently mutex. */ |
9978 | ||
800eeca4 JW |
9979 | static int |
9980 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9981 | int p1; |
9982 | int p2; | |
9983 | int path; | |
800eeca4 JW |
9984 | { |
9985 | int i; | |
9986 | valueT mask; | |
9987 | ||
9988 | if (p1 != p2) | |
9989 | { | |
542d6675 KH |
9990 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9991 | for (i = 0; i < qp_mutexeslen; i++) | |
9992 | { | |
9993 | if (qp_mutexes[i].path >= path | |
9994 | && (qp_mutexes[i].prmask & mask) == mask) | |
9995 | return 1; | |
9996 | } | |
800eeca4 JW |
9997 | } |
9998 | return 0; | |
9999 | } | |
10000 | ||
10001 | /* Return whether the given resource is in the given insn's list of chks | |
10002 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
10003 | conflict. */ |
10004 | ||
800eeca4 JW |
10005 | static int |
10006 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
10007 | struct rsrc *rs; |
10008 | struct ia64_opcode *idesc; | |
10009 | int note; | |
10010 | int qp_regno; | |
10011 | int path; | |
800eeca4 JW |
10012 | { |
10013 | struct rsrc specs[MAX_SPECS]; | |
10014 | int count; | |
10015 | ||
10016 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
10017 | we don't need to check. One exception is note 11, which indicates that | |
10018 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 10019 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
10020 | && note != 11) |
10021 | return 0; | |
10022 | ||
10023 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
10024 | while (count-- > 0) | |
10025 | { | |
10026 | /* UNAT checking is a bit more specific than other resources */ | |
10027 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
10028 | && specs[count].mem_offset.hint |
10029 | && rs->mem_offset.hint) | |
10030 | { | |
10031 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
10032 | { | |
10033 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
10034 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
10035 | return 1; | |
10036 | else | |
10037 | continue; | |
10038 | } | |
10039 | } | |
800eeca4 | 10040 | |
7484b8e6 | 10041 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 10042 | writes are an OR. */ |
7484b8e6 | 10043 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 10044 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
10045 | || rs->dependency->specifier == IA64_RS_PR63) |
10046 | { | |
10047 | if (specs[count].cmp_type != CMP_NONE | |
10048 | && specs[count].cmp_type == rs->cmp_type) | |
10049 | { | |
10050 | if (md.debug_dv) | |
10051 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10052 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10053 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10054 | specs[count].index : 63); |
10055 | continue; | |
10056 | } | |
10057 | if (md.debug_dv) | |
4a4f25cf | 10058 | fprintf (stderr, |
7484b8e6 TW |
10059 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10060 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10061 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10062 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10063 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10064 | specs[count].index : 63); |
4a4f25cf | 10065 | |
7484b8e6 TW |
10066 | } |
10067 | ||
800eeca4 | 10068 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10069 | */ |
800eeca4 | 10070 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10071 | return 2; |
800eeca4 | 10072 | else if (specs[count].index == rs->index) |
542d6675 | 10073 | return 1; |
800eeca4 | 10074 | } |
800eeca4 JW |
10075 | |
10076 | return 0; | |
10077 | } | |
10078 | ||
10079 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10080 | insert a stop to create the break. Update all resource dependencies | |
10081 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10082 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10083 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10084 | instruction. */ |
800eeca4 JW |
10085 | |
10086 | static void | |
10087 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
10088 | int insert_stop; |
10089 | int qp_regno; | |
10090 | int save_current; | |
800eeca4 JW |
10091 | { |
10092 | int i; | |
10093 | ||
10094 | if (insert_stop && md.num_slots_in_use > 0) | |
10095 | PREV_SLOT.end_of_insn_group = 1; | |
10096 | ||
10097 | if (md.debug_dv) | |
10098 | { | |
197865e8 | 10099 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10100 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10101 | if (qp_regno != 0) |
542d6675 | 10102 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10103 | fprintf (stderr, "\n"); |
10104 | } | |
10105 | ||
10106 | i = 0; | |
10107 | while (i < regdepslen) | |
10108 | { | |
10109 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10110 | ||
10111 | if (qp_regno != 0 | |
542d6675 KH |
10112 | && regdeps[i].qp_regno != qp_regno) |
10113 | { | |
10114 | ++i; | |
10115 | continue; | |
10116 | } | |
800eeca4 JW |
10117 | |
10118 | if (save_current | |
542d6675 KH |
10119 | && CURR_SLOT.src_file == regdeps[i].file |
10120 | && CURR_SLOT.src_line == regdeps[i].line) | |
10121 | { | |
10122 | ++i; | |
10123 | continue; | |
10124 | } | |
800eeca4 JW |
10125 | |
10126 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10127 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10128 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10129 | || dep->semantics == IA64_DVS_IMPLIEDF |
10130 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10131 | { | |
10132 | print_dependency ("Removing", i); | |
10133 | regdeps[i] = regdeps[--regdepslen]; | |
10134 | } | |
800eeca4 | 10135 | else |
542d6675 KH |
10136 | { |
10137 | if (dep->semantics == IA64_DVS_DATA | |
10138 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10139 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10140 | { |
10141 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10142 | regdeps[i].insn_srlz = STATE_STOP; | |
10143 | if (regdeps[i].data_srlz == STATE_NONE) | |
10144 | regdeps[i].data_srlz = STATE_STOP; | |
10145 | } | |
10146 | ++i; | |
10147 | } | |
800eeca4 JW |
10148 | } |
10149 | } | |
10150 | ||
542d6675 KH |
10151 | /* Add the given resource usage spec to the list of active dependencies. */ |
10152 | ||
197865e8 | 10153 | static void |
800eeca4 | 10154 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
10155 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
10156 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
10157 | struct rsrc *spec; |
10158 | int depind; | |
10159 | int path; | |
800eeca4 JW |
10160 | { |
10161 | if (regdepslen == regdepstotlen) | |
10162 | { | |
10163 | regdepstotlen += 20; | |
10164 | regdeps = (struct rsrc *) | |
542d6675 | 10165 | xrealloc ((void *) regdeps, |
bc805888 | 10166 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10167 | } |
10168 | ||
10169 | regdeps[regdepslen] = *spec; | |
10170 | regdeps[regdepslen].depind = depind; | |
10171 | regdeps[regdepslen].path = path; | |
10172 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10173 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10174 | ||
10175 | print_dependency ("Adding", regdepslen); | |
10176 | ||
10177 | ++regdepslen; | |
10178 | } | |
10179 | ||
10180 | static void | |
10181 | print_dependency (action, depind) | |
542d6675 KH |
10182 | const char *action; |
10183 | int depind; | |
800eeca4 JW |
10184 | { |
10185 | if (md.debug_dv) | |
10186 | { | |
197865e8 | 10187 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10188 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10189 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10190 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10191 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10192 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10193 | { |
10194 | fputs (" ", stderr); | |
10195 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10196 | fputs ("+", stderr); | |
10197 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10198 | } | |
800eeca4 JW |
10199 | fprintf (stderr, "\n"); |
10200 | } | |
10201 | } | |
10202 | ||
10203 | static void | |
10204 | instruction_serialization () | |
10205 | { | |
10206 | int i; | |
10207 | if (md.debug_dv) | |
10208 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10209 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10210 | if (regdeps[i].insn_srlz == STATE_STOP) |
10211 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10212 | } | |
10213 | ||
10214 | static void | |
10215 | data_serialization () | |
10216 | { | |
10217 | int i = 0; | |
10218 | if (md.debug_dv) | |
10219 | fprintf (stderr, " Data serialization\n"); | |
10220 | while (i < regdepslen) | |
10221 | { | |
10222 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10223 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10224 | data serialization. This might change with new tables */ | |
10225 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10226 | { | |
10227 | print_dependency ("Removing", i); | |
10228 | regdeps[i] = regdeps[--regdepslen]; | |
10229 | } | |
800eeca4 | 10230 | else |
542d6675 | 10231 | ++i; |
800eeca4 JW |
10232 | } |
10233 | } | |
10234 | ||
542d6675 KH |
10235 | /* Insert stops and serializations as needed to avoid DVs. */ |
10236 | ||
800eeca4 JW |
10237 | static void |
10238 | remove_marked_resource (rs) | |
542d6675 | 10239 | struct rsrc *rs; |
800eeca4 JW |
10240 | { |
10241 | switch (rs->dependency->semantics) | |
10242 | { | |
10243 | case IA64_DVS_SPECIFIC: | |
10244 | if (md.debug_dv) | |
10245 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10246 | /* ...fall through... */ |
800eeca4 JW |
10247 | case IA64_DVS_INSTR: |
10248 | if (md.debug_dv) | |
542d6675 | 10249 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10250 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10251 | insn_group_break (1, 0, 0); |
800eeca4 | 10252 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10253 | { |
888a75be | 10254 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10255 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10256 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10257 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10258 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10259 | instruction_serialization (); | |
10260 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10261 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10262 | emit_one_bundle (); | |
888a75be | 10263 | CURR_SLOT = oldslot; |
542d6675 | 10264 | } |
800eeca4 JW |
10265 | insn_group_break (1, 0, 0); |
10266 | break; | |
10267 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10268 | "other" types of DV are eliminated |
10269 | by a data serialization */ | |
800eeca4 JW |
10270 | case IA64_DVS_DATA: |
10271 | if (md.debug_dv) | |
542d6675 | 10272 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10273 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10274 | insn_group_break (1, 0, 0); |
800eeca4 | 10275 | { |
888a75be | 10276 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10277 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10278 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10279 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10280 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10281 | data_serialization (); | |
10282 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10283 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10284 | emit_one_bundle (); | |
888a75be | 10285 | CURR_SLOT = oldslot; |
800eeca4 JW |
10286 | } |
10287 | break; | |
10288 | case IA64_DVS_IMPLIED: | |
10289 | case IA64_DVS_IMPLIEDF: | |
10290 | if (md.debug_dv) | |
542d6675 | 10291 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10292 | insn_group_break (1, 0, 0); |
10293 | break; | |
10294 | default: | |
10295 | break; | |
10296 | } | |
10297 | } | |
10298 | ||
10299 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10300 | list. |
800eeca4 JW |
10301 | |
10302 | The check is run once for each execution path encountered. In this case, | |
10303 | a unique execution path is the sequence of instructions following a code | |
10304 | entry point, e.g. the following has three execution paths, one starting | |
10305 | at L0, one at L1, and one at L2. | |
197865e8 | 10306 | |
800eeca4 JW |
10307 | L0: nop |
10308 | L1: add | |
10309 | L2: add | |
197865e8 | 10310 | br.ret |
800eeca4 | 10311 | */ |
542d6675 | 10312 | |
800eeca4 JW |
10313 | static void |
10314 | check_dependencies (idesc) | |
542d6675 | 10315 | struct ia64_opcode *idesc; |
800eeca4 JW |
10316 | { |
10317 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10318 | int path; | |
10319 | int i; | |
10320 | ||
10321 | /* Note that the number of marked resources may change within the | |
197865e8 | 10322 | loop if in auto mode. */ |
800eeca4 JW |
10323 | i = 0; |
10324 | while (i < regdepslen) | |
10325 | { | |
10326 | struct rsrc *rs = ®deps[i]; | |
10327 | const struct ia64_dependency *dep = rs->dependency; | |
10328 | int chkind; | |
10329 | int note; | |
10330 | int start_over = 0; | |
10331 | ||
10332 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10333 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10334 | { | |
10335 | ++i; | |
10336 | continue; | |
10337 | } | |
10338 | ||
10339 | note = NOTE (opdeps->chks[chkind]); | |
10340 | ||
10341 | /* Check this resource against each execution path seen thus far. */ | |
10342 | for (path = 0; path <= md.path; path++) | |
10343 | { | |
10344 | int matchtype; | |
10345 | ||
10346 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10347 | if (rs->path < path) | |
10348 | continue; | |
10349 | ||
10350 | /* If the QP for this insn implies a QP which has branched, don't | |
10351 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10352 | useful; what's the point of generating code which will only be | |
10353 | reached if its QP is zero? | |
10354 | This code was specifically inserted to handle the following code, | |
10355 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10356 | ||
10357 | mov r4 = 2 | |
10358 | (p2) br.cond L | |
10359 | (p1) mov r4 = 7 | |
10360 | */ | |
10361 | if (CURR_SLOT.qp_regno != 0) | |
10362 | { | |
10363 | int skip = 0; | |
10364 | int implies; | |
10365 | for (implies = 0; implies < qp_implieslen; implies++) | |
10366 | { | |
10367 | if (qp_implies[implies].path >= path | |
10368 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10369 | && qp_implies[implies].p2_branched) | |
10370 | { | |
10371 | skip = 1; | |
10372 | break; | |
10373 | } | |
10374 | } | |
10375 | if (skip) | |
10376 | continue; | |
10377 | } | |
10378 | ||
10379 | if ((matchtype = resources_match (rs, idesc, note, | |
10380 | CURR_SLOT.qp_regno, path)) != 0) | |
10381 | { | |
10382 | char msg[1024]; | |
10383 | char pathmsg[256] = ""; | |
10384 | char indexmsg[256] = ""; | |
10385 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10386 | ||
10387 | if (path != 0) | |
10388 | sprintf (pathmsg, " when entry is at label '%s'", | |
10389 | md.entry_labels[path - 1]); | |
a66d2bb7 | 10390 | if (matchtype == 1 && rs->index >= 0) |
542d6675 KH |
10391 | sprintf (indexmsg, ", specific resource number is %d", |
10392 | rs->index); | |
10393 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
10394 | idesc->name, | |
10395 | (certain ? "violates" : "may violate"), | |
10396 | dv_mode[dep->mode], dep->name, | |
10397 | dv_sem[dep->semantics], | |
10398 | pathmsg, indexmsg); | |
10399 | ||
10400 | if (md.explicit_mode) | |
10401 | { | |
10402 | as_warn ("%s", msg); | |
10403 | if (path < md.path) | |
10404 | as_warn (_("Only the first path encountering the conflict " | |
10405 | "is reported")); | |
10406 | as_warn_where (rs->file, rs->line, | |
10407 | _("This is the location of the " | |
10408 | "conflicting usage")); | |
10409 | /* Don't bother checking other paths, to avoid duplicating | |
10410 | the same warning */ | |
10411 | break; | |
10412 | } | |
10413 | else | |
10414 | { | |
10415 | if (md.debug_dv) | |
10416 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10417 | ||
10418 | remove_marked_resource (rs); | |
10419 | ||
10420 | /* since the set of dependencies has changed, start over */ | |
10421 | /* FIXME -- since we're removing dvs as we go, we | |
10422 | probably don't really need to start over... */ | |
10423 | start_over = 1; | |
10424 | break; | |
10425 | } | |
10426 | } | |
10427 | } | |
800eeca4 | 10428 | if (start_over) |
542d6675 | 10429 | i = 0; |
800eeca4 | 10430 | else |
542d6675 | 10431 | ++i; |
800eeca4 JW |
10432 | } |
10433 | } | |
10434 | ||
542d6675 KH |
10435 | /* Register new dependencies based on the given opcode. */ |
10436 | ||
800eeca4 JW |
10437 | static void |
10438 | mark_resources (idesc) | |
542d6675 | 10439 | struct ia64_opcode *idesc; |
800eeca4 JW |
10440 | { |
10441 | int i; | |
10442 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10443 | int add_only_qp_reads = 0; | |
10444 | ||
10445 | /* A conditional branch only uses its resources if it is taken; if it is | |
10446 | taken, we stop following that path. The other branch types effectively | |
10447 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10448 | reads. */ |
800eeca4 JW |
10449 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10450 | { | |
10451 | add_only_qp_reads = 1; | |
10452 | } | |
10453 | ||
10454 | if (md.debug_dv) | |
10455 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10456 | ||
542d6675 | 10457 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10458 | { |
10459 | const struct ia64_dependency *dep; | |
10460 | struct rsrc specs[MAX_SPECS]; | |
10461 | int note; | |
10462 | int path; | |
10463 | int count; | |
197865e8 | 10464 | |
800eeca4 | 10465 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10466 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10467 | |
10468 | if (add_only_qp_reads | |
542d6675 KH |
10469 | && !(dep->mode == IA64_DV_WAR |
10470 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10471 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10472 | || dep->specifier == IA64_RS_PR63))) |
10473 | continue; | |
800eeca4 JW |
10474 | |
10475 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10476 | ||
800eeca4 | 10477 | while (count-- > 0) |
542d6675 KH |
10478 | { |
10479 | mark_resource (idesc, dep, &specs[count], | |
10480 | DEP (opdeps->regs[i]), md.path); | |
10481 | } | |
800eeca4 JW |
10482 | |
10483 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10484 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10485 | switch (dep->specifier) |
542d6675 KH |
10486 | { |
10487 | default: | |
10488 | break; | |
10489 | case IA64_RS_CPUID: | |
10490 | case IA64_RS_DBR: | |
10491 | case IA64_RS_IBR: | |
800eeca4 | 10492 | case IA64_RS_MSR: |
542d6675 KH |
10493 | case IA64_RS_PKR: |
10494 | case IA64_RS_PMC: | |
10495 | case IA64_RS_PMD: | |
10496 | case IA64_RS_RR: | |
10497 | for (path = 0; path < md.path; path++) | |
10498 | { | |
10499 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10500 | while (count-- > 0) | |
10501 | mark_resource (idesc, dep, &specs[count], | |
10502 | DEP (opdeps->regs[i]), path); | |
10503 | } | |
10504 | break; | |
10505 | } | |
10506 | } | |
10507 | } | |
10508 | ||
10509 | /* Remove dependencies when they no longer apply. */ | |
10510 | ||
800eeca4 JW |
10511 | static void |
10512 | update_dependencies (idesc) | |
542d6675 | 10513 | struct ia64_opcode *idesc; |
800eeca4 JW |
10514 | { |
10515 | int i; | |
10516 | ||
10517 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10518 | { | |
10519 | instruction_serialization (); | |
10520 | } | |
10521 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10522 | { | |
10523 | data_serialization (); | |
10524 | } | |
10525 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10526 | || is_taken_branch (idesc)) |
800eeca4 | 10527 | { |
542d6675 KH |
10528 | /* Although technically the taken branch doesn't clear dependencies |
10529 | which require a srlz.[id], we don't follow the branch; the next | |
10530 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10531 | regdepslen = 0; |
800eeca4 JW |
10532 | md.path = 0; |
10533 | } | |
10534 | else if (is_conditional_branch (idesc) | |
542d6675 | 10535 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10536 | { |
10537 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10538 | ||
542d6675 KH |
10539 | for (i = 0; i < qp_implieslen; i++) |
10540 | { | |
10541 | /* If the conditional branch's predicate is implied by the predicate | |
10542 | in an existing dependency, remove that dependency. */ | |
10543 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10544 | { | |
10545 | int depind = 0; | |
10546 | /* Note that this implied predicate takes a branch so that if | |
10547 | a later insn generates a DV but its predicate implies this | |
10548 | one, we can avoid the false DV warning. */ | |
10549 | qp_implies[i].p2_branched = 1; | |
10550 | while (depind < regdepslen) | |
10551 | { | |
10552 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10553 | { | |
10554 | print_dependency ("Removing", depind); | |
10555 | regdeps[depind] = regdeps[--regdepslen]; | |
10556 | } | |
10557 | else | |
10558 | ++depind; | |
10559 | } | |
10560 | } | |
10561 | } | |
800eeca4 | 10562 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10563 | cleared, provided that the QP hasn't been modified between the |
10564 | marking instruction and the branch. */ | |
800eeca4 | 10565 | if (is_call) |
542d6675 KH |
10566 | { |
10567 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10568 | } | |
800eeca4 | 10569 | else |
542d6675 KH |
10570 | { |
10571 | i = 0; | |
10572 | while (i < regdepslen) | |
10573 | { | |
10574 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10575 | && regdeps[i].link_to_qp_branch | |
10576 | && (regdeps[i].file != CURR_SLOT.src_file | |
10577 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10578 | { | |
10579 | /* Treat like a taken branch */ | |
10580 | print_dependency ("Removing", i); | |
10581 | regdeps[i] = regdeps[--regdepslen]; | |
10582 | } | |
10583 | else | |
10584 | ++i; | |
10585 | } | |
10586 | } | |
800eeca4 JW |
10587 | } |
10588 | } | |
10589 | ||
10590 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10591 | |
800eeca4 JW |
10592 | static int |
10593 | check_dv (idesc) | |
542d6675 | 10594 | struct ia64_opcode *idesc; |
800eeca4 JW |
10595 | { |
10596 | if (md.debug_dv) | |
10597 | { | |
197865e8 | 10598 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10599 | idesc->name, CURR_SLOT.src_line, |
10600 | idesc->dependencies->nchks, | |
10601 | idesc->dependencies->nregs); | |
800eeca4 JW |
10602 | } |
10603 | ||
197865e8 | 10604 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10605 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10606 | check against the specific resources used. */ |
800eeca4 JW |
10607 | check_dependencies (idesc); |
10608 | ||
542d6675 KH |
10609 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10610 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10611 | mark_resources (idesc); |
10612 | ||
10613 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10614 | requirements for being cleared |
10615 | ||
800eeca4 JW |
10616 | Instruction serialization (insns separated by interruption, rfi, or |
10617 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10618 | ||
10619 | Data serialization (instruction serialization, or writer + srlz.d + | |
10620 | reader, where writer and srlz.d are in separate groups) clears | |
10621 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10622 | always be the case). | |
10623 | ||
10624 | Instruction group break (groups separated by stop, taken branch, | |
10625 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10626 | */ | |
10627 | update_dependencies (idesc); | |
10628 | ||
10629 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10630 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10631 | note_register_values (idesc); |
10632 | ||
197865e8 | 10633 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10634 | md.mem_offset.hint = 0; |
10635 | ||
10636 | return 0; | |
10637 | } | |
10638 | ||
10639 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10640 | here. */ | |
10641 | void | |
10642 | md_assemble (str) | |
10643 | char *str; | |
10644 | { | |
10645 | char *saved_input_line_pointer, *mnemonic; | |
10646 | const struct pseudo_opcode *pdesc; | |
10647 | struct ia64_opcode *idesc; | |
10648 | unsigned char qp_regno; | |
10649 | unsigned int flags; | |
10650 | int ch; | |
10651 | ||
10652 | saved_input_line_pointer = input_line_pointer; | |
10653 | input_line_pointer = str; | |
10654 | ||
542d6675 | 10655 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10656 | |
10657 | mnemonic = input_line_pointer; | |
10658 | ch = get_symbol_end (); | |
10659 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10660 | if (pdesc) | |
10661 | { | |
10662 | *input_line_pointer = ch; | |
10663 | (*pdesc->handler) (pdesc->arg); | |
10664 | goto done; | |
10665 | } | |
10666 | ||
542d6675 | 10667 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10668 | |
10669 | idesc = ia64_find_opcode (mnemonic); | |
10670 | *input_line_pointer = ch; | |
10671 | if (!idesc) | |
10672 | { | |
10673 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10674 | goto done; | |
10675 | } | |
10676 | ||
10677 | idesc = parse_operands (idesc); | |
10678 | if (!idesc) | |
10679 | goto done; | |
10680 | ||
542d6675 | 10681 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10682 | if (idesc->type == IA64_TYPE_DYN) |
10683 | { | |
10684 | if (strcmp (idesc->name, "add") == 0) | |
10685 | { | |
10686 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10687 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10688 | mnemonic = "addl"; | |
10689 | else | |
10690 | mnemonic = "adds"; | |
3d56ab85 | 10691 | ia64_free_opcode (idesc); |
800eeca4 | 10692 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10693 | } |
10694 | else if (strcmp (idesc->name, "mov") == 0) | |
10695 | { | |
10696 | enum ia64_opnd opnd1, opnd2; | |
10697 | int rop; | |
10698 | ||
10699 | opnd1 = idesc->operands[0]; | |
10700 | opnd2 = idesc->operands[1]; | |
10701 | if (opnd1 == IA64_OPND_AR3) | |
10702 | rop = 0; | |
10703 | else if (opnd2 == IA64_OPND_AR3) | |
10704 | rop = 1; | |
10705 | else | |
10706 | abort (); | |
652ca075 L |
10707 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10708 | { | |
10709 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10710 | mnemonic = "mov.i"; | |
97762d08 | 10711 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10712 | mnemonic = "mov.m"; |
97762d08 JB |
10713 | else |
10714 | rop = -1; | |
652ca075 | 10715 | } |
800eeca4 | 10716 | else |
652ca075 | 10717 | abort (); |
97762d08 JB |
10718 | if (rop >= 0) |
10719 | { | |
10720 | ia64_free_opcode (idesc); | |
10721 | idesc = ia64_find_opcode (mnemonic); | |
10722 | while (idesc != NULL | |
10723 | && (idesc->operands[0] != opnd1 | |
10724 | || idesc->operands[1] != opnd2)) | |
10725 | idesc = get_next_opcode (idesc); | |
10726 | } | |
800eeca4 JW |
10727 | } |
10728 | } | |
652ca075 L |
10729 | else if (strcmp (idesc->name, "mov.i") == 0 |
10730 | || strcmp (idesc->name, "mov.m") == 0) | |
10731 | { | |
10732 | enum ia64_opnd opnd1, opnd2; | |
10733 | int rop; | |
10734 | ||
10735 | opnd1 = idesc->operands[0]; | |
10736 | opnd2 = idesc->operands[1]; | |
10737 | if (opnd1 == IA64_OPND_AR3) | |
10738 | rop = 0; | |
10739 | else if (opnd2 == IA64_OPND_AR3) | |
10740 | rop = 1; | |
10741 | else | |
10742 | abort (); | |
10743 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10744 | { | |
10745 | char unit = 'a'; | |
10746 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10747 | unit = 'i'; | |
10748 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10749 | unit = 'm'; | |
10750 | if (unit != 'a' && unit != idesc->name [4]) | |
80b8152b | 10751 | as_bad ("AR %d can only be accessed by %c-unit", |
652ca075 L |
10752 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10753 | TOUPPER (unit)); | |
10754 | } | |
10755 | } | |
91d777ee L |
10756 | else if (strcmp (idesc->name, "hint.b") == 0) |
10757 | { | |
10758 | switch (md.hint_b) | |
10759 | { | |
10760 | case hint_b_ok: | |
10761 | break; | |
10762 | case hint_b_warning: | |
10763 | as_warn ("hint.b may be treated as nop"); | |
10764 | break; | |
10765 | case hint_b_error: | |
10766 | as_bad ("hint.b shouldn't be used"); | |
10767 | break; | |
10768 | } | |
10769 | } | |
800eeca4 JW |
10770 | |
10771 | qp_regno = 0; | |
10772 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10773 | { |
10774 | qp_regno = md.qp.X_add_number - REG_P; | |
10775 | md.qp.X_op = O_absent; | |
10776 | } | |
800eeca4 JW |
10777 | |
10778 | flags = idesc->flags; | |
10779 | ||
10780 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10781 | { |
10782 | /* The alignment frag has to end with a stop bit only if the | |
10783 | next instruction after the alignment directive has to be | |
10784 | the first instruction in an instruction group. */ | |
10785 | if (align_frag) | |
10786 | { | |
10787 | while (align_frag->fr_type != rs_align_code) | |
10788 | { | |
10789 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10790 | if (!align_frag) |
10791 | break; | |
9545c4ce | 10792 | } |
bae25f19 L |
10793 | /* align_frag can be NULL if there are directives in |
10794 | between. */ | |
10795 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10796 | align_frag->tc_frag_data = 1; |
10797 | } | |
10798 | ||
10799 | insn_group_break (1, 0, 0); | |
10800 | } | |
10801 | align_frag = NULL; | |
800eeca4 JW |
10802 | |
10803 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10804 | { | |
10805 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10806 | goto done; | |
10807 | } | |
10808 | ||
542d6675 | 10809 | /* Build the instruction. */ |
800eeca4 JW |
10810 | CURR_SLOT.qp_regno = qp_regno; |
10811 | CURR_SLOT.idesc = idesc; | |
10812 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10813 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
10814 | |
10815 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 10816 | if (unwind.current_entry) |
800eeca4 | 10817 | { |
e0c9811a JW |
10818 | CURR_SLOT.unwind_record = unwind.current_entry; |
10819 | unwind.current_entry = NULL; | |
800eeca4 | 10820 | } |
5656b6b8 | 10821 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10822 | unwind.insn = 1; |
800eeca4 | 10823 | |
542d6675 | 10824 | /* Check for dependency violations. */ |
800eeca4 | 10825 | if (md.detect_dv) |
542d6675 | 10826 | check_dv (idesc); |
800eeca4 JW |
10827 | |
10828 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10829 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10830 | emit_one_bundle (); | |
10831 | ||
10832 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10833 | insn_group_break (1, 0, 0); | |
10834 | ||
10835 | md.last_text_seg = now_seg; | |
10836 | ||
10837 | done: | |
10838 | input_line_pointer = saved_input_line_pointer; | |
10839 | } | |
10840 | ||
10841 | /* Called when symbol NAME cannot be found in the symbol table. | |
10842 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10843 | |
10844 | symbolS * | |
800eeca4 | 10845 | md_undefined_symbol (name) |
2434f565 | 10846 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10847 | { |
10848 | return 0; | |
10849 | } | |
10850 | ||
10851 | /* Called for any expression that can not be recognized. When the | |
10852 | function is called, `input_line_pointer' will point to the start of | |
10853 | the expression. */ | |
542d6675 | 10854 | |
800eeca4 JW |
10855 | void |
10856 | md_operand (e) | |
10857 | expressionS *e; | |
10858 | { | |
800eeca4 JW |
10859 | switch (*input_line_pointer) |
10860 | { | |
800eeca4 JW |
10861 | case '[': |
10862 | ++input_line_pointer; | |
10863 | expression (e); | |
10864 | if (*input_line_pointer != ']') | |
10865 | { | |
16a48f83 | 10866 | as_bad ("Closing bracket missing"); |
800eeca4 JW |
10867 | goto err; |
10868 | } | |
10869 | else | |
10870 | { | |
10871 | if (e->X_op != O_register) | |
10872 | as_bad ("Register expected as index"); | |
10873 | ||
10874 | ++input_line_pointer; | |
10875 | e->X_op = O_index; | |
10876 | } | |
10877 | break; | |
10878 | ||
10879 | default: | |
10880 | break; | |
10881 | } | |
10882 | return; | |
10883 | ||
10884 | err: | |
10885 | ignore_rest_of_line (); | |
10886 | } | |
10887 | ||
10888 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10889 | a section symbol plus some offset. For relocs involving @fptr(), | |
10890 | directives we don't want such adjustments since we need to have the | |
10891 | original symbol's name in the reloc. */ | |
10892 | int | |
10893 | ia64_fix_adjustable (fix) | |
10894 | fixS *fix; | |
10895 | { | |
10896 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 10897 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
10898 | return 0; |
10899 | ||
10900 | switch (fix->fx_r_type) | |
10901 | { | |
10902 | case BFD_RELOC_IA64_FPTR64I: | |
10903 | case BFD_RELOC_IA64_FPTR32MSB: | |
10904 | case BFD_RELOC_IA64_FPTR32LSB: | |
10905 | case BFD_RELOC_IA64_FPTR64MSB: | |
10906 | case BFD_RELOC_IA64_FPTR64LSB: | |
10907 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10908 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10909 | return 0; | |
10910 | default: | |
10911 | break; | |
10912 | } | |
10913 | ||
10914 | return 1; | |
10915 | } | |
10916 | ||
10917 | int | |
10918 | ia64_force_relocation (fix) | |
10919 | fixS *fix; | |
10920 | { | |
10921 | switch (fix->fx_r_type) | |
10922 | { | |
10923 | case BFD_RELOC_IA64_FPTR64I: | |
10924 | case BFD_RELOC_IA64_FPTR32MSB: | |
10925 | case BFD_RELOC_IA64_FPTR32LSB: | |
10926 | case BFD_RELOC_IA64_FPTR64MSB: | |
10927 | case BFD_RELOC_IA64_FPTR64LSB: | |
10928 | ||
10929 | case BFD_RELOC_IA64_LTOFF22: | |
10930 | case BFD_RELOC_IA64_LTOFF64I: | |
10931 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10932 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10933 | case BFD_RELOC_IA64_PLTOFF22: | |
10934 | case BFD_RELOC_IA64_PLTOFF64I: | |
10935 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10936 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10937 | |
10938 | case BFD_RELOC_IA64_LTOFF22X: | |
10939 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10940 | return 1; |
10941 | ||
10942 | default: | |
a161fe53 | 10943 | break; |
800eeca4 | 10944 | } |
a161fe53 | 10945 | |
ae6063d4 | 10946 | return generic_force_reloc (fix); |
800eeca4 JW |
10947 | } |
10948 | ||
10949 | /* Decide from what point a pc-relative relocation is relative to, | |
10950 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10951 | long | |
10952 | ia64_pcrel_from_section (fix, sec) | |
10953 | fixS *fix; | |
10954 | segT sec; | |
10955 | { | |
10956 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10957 | |
800eeca4 JW |
10958 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10959 | off &= ~0xfUL; | |
10960 | ||
10961 | return off; | |
10962 | } | |
10963 | ||
6174d9c8 RH |
10964 | |
10965 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10966 | void | |
10967 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10968 | { | |
10969 | expressionS expr; | |
10970 | ||
10971 | expr.X_op = O_pseudo_fixup; | |
10972 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10973 | expr.X_add_number = 0; | |
10974 | expr.X_add_symbol = symbol; | |
10975 | emit_expr (&expr, size); | |
10976 | } | |
10977 | ||
800eeca4 JW |
10978 | /* This is called whenever some data item (not an instruction) needs a |
10979 | fixup. We pick the right reloc code depending on the byteorder | |
10980 | currently in effect. */ | |
10981 | void | |
10982 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10983 | fragS *f; | |
10984 | int where; | |
10985 | int nbytes; | |
10986 | expressionS *exp; | |
10987 | { | |
10988 | bfd_reloc_code_real_type code; | |
10989 | fixS *fix; | |
10990 | ||
10991 | switch (nbytes) | |
10992 | { | |
10993 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10994 | them here since they will work fine as long as the expression | |
10995 | is fully defined at the end of the pass over the source file. */ | |
10996 | case 1: code = BFD_RELOC_8; break; | |
10997 | case 2: code = BFD_RELOC_16; break; | |
10998 | case 4: | |
10999 | if (target_big_endian) | |
11000 | code = BFD_RELOC_IA64_DIR32MSB; | |
11001 | else | |
11002 | code = BFD_RELOC_IA64_DIR32LSB; | |
11003 | break; | |
11004 | ||
11005 | case 8: | |
40449e9f | 11006 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 11007 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
11008 | && exp->X_op_symbol |
11009 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
11010 | && !(md.flags & EF_IA_64_ABI64)) | |
11011 | { | |
11012 | if (target_big_endian) | |
11013 | code = BFD_RELOC_IA64_IPLTMSB; | |
11014 | else | |
11015 | code = BFD_RELOC_IA64_IPLTLSB; | |
11016 | exp->X_op = O_symbol; | |
11017 | break; | |
11018 | } | |
11019 | else | |
11020 | { | |
11021 | if (target_big_endian) | |
11022 | code = BFD_RELOC_IA64_DIR64MSB; | |
11023 | else | |
11024 | code = BFD_RELOC_IA64_DIR64LSB; | |
11025 | break; | |
11026 | } | |
800eeca4 | 11027 | |
3969b680 RH |
11028 | case 16: |
11029 | if (exp->X_op == O_pseudo_fixup | |
11030 | && exp->X_op_symbol | |
11031 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
11032 | { | |
11033 | if (target_big_endian) | |
11034 | code = BFD_RELOC_IA64_IPLTMSB; | |
11035 | else | |
11036 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
11037 | exp->X_op = O_symbol; |
11038 | break; | |
11039 | } | |
11040 | /* FALLTHRU */ | |
11041 | ||
800eeca4 JW |
11042 | default: |
11043 | as_bad ("Unsupported fixup size %d", nbytes); | |
11044 | ignore_rest_of_line (); | |
11045 | return; | |
11046 | } | |
6174d9c8 | 11047 | |
800eeca4 JW |
11048 | if (exp->X_op == O_pseudo_fixup) |
11049 | { | |
800eeca4 JW |
11050 | exp->X_op = O_symbol; |
11051 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11052 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11053 | } |
3969b680 | 11054 | |
800eeca4 JW |
11055 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11056 | /* We need to store the byte order in effect in case we're going | |
11057 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 11058 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
11059 | fix->tc_fix_data.bigendian = target_big_endian; |
11060 | } | |
11061 | ||
11062 | /* Return the actual relocation we wish to associate with the pseudo | |
11063 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11064 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11065 | |
11066 | static bfd_reloc_code_real_type | |
11067 | ia64_gen_real_reloc_type (sym, r_type) | |
11068 | struct symbol *sym; | |
11069 | bfd_reloc_code_real_type r_type; | |
11070 | { | |
11071 | bfd_reloc_code_real_type new = 0; | |
0ca3e455 | 11072 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11073 | |
11074 | if (sym == NULL) | |
11075 | { | |
11076 | return r_type; | |
11077 | } | |
11078 | ||
11079 | switch (S_GET_VALUE (sym)) | |
11080 | { | |
11081 | case FUNC_FPTR_RELATIVE: | |
11082 | switch (r_type) | |
11083 | { | |
11084 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
11085 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
11086 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
11087 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
11088 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11089 | default: type = "FPTR"; break; |
800eeca4 JW |
11090 | } |
11091 | break; | |
11092 | ||
11093 | case FUNC_GP_RELATIVE: | |
11094 | switch (r_type) | |
11095 | { | |
11096 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
11097 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
11098 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
11099 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
11100 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
11101 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11102 | default: type = "GPREL"; break; |
800eeca4 JW |
11103 | } |
11104 | break; | |
11105 | ||
11106 | case FUNC_LT_RELATIVE: | |
11107 | switch (r_type) | |
11108 | { | |
11109 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
11110 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11111 | default: type = "LTOFF"; break; |
800eeca4 JW |
11112 | } |
11113 | break; | |
11114 | ||
fa2c7eff RH |
11115 | case FUNC_LT_RELATIVE_X: |
11116 | switch (r_type) | |
11117 | { | |
11118 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
0ca3e455 | 11119 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11120 | } |
11121 | break; | |
11122 | ||
c67e42c9 RH |
11123 | case FUNC_PC_RELATIVE: |
11124 | switch (r_type) | |
11125 | { | |
11126 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
11127 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
11128 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
11129 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
11130 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
11131 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11132 | default: type = "PCREL"; break; |
c67e42c9 RH |
11133 | } |
11134 | break; | |
11135 | ||
800eeca4 JW |
11136 | case FUNC_PLT_RELATIVE: |
11137 | switch (r_type) | |
11138 | { | |
11139 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
11140 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
11141 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11142 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11143 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11144 | } |
11145 | break; | |
11146 | ||
11147 | case FUNC_SEC_RELATIVE: | |
11148 | switch (r_type) | |
11149 | { | |
11150 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
11151 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
11152 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
11153 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11154 | default: type = "SECREL"; break; |
800eeca4 JW |
11155 | } |
11156 | break; | |
11157 | ||
11158 | case FUNC_SEG_RELATIVE: | |
11159 | switch (r_type) | |
11160 | { | |
11161 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
11162 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11163 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11164 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11165 | default: type = "SEGREL"; break; |
800eeca4 JW |
11166 | } |
11167 | break; | |
11168 | ||
11169 | case FUNC_LTV_RELATIVE: | |
11170 | switch (r_type) | |
11171 | { | |
11172 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
11173 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
11174 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
11175 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11176 | default: type = "LTV"; break; |
800eeca4 JW |
11177 | } |
11178 | break; | |
11179 | ||
11180 | case FUNC_LT_FPTR_RELATIVE: | |
11181 | switch (r_type) | |
11182 | { | |
11183 | case BFD_RELOC_IA64_IMM22: | |
11184 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
11185 | case BFD_RELOC_IA64_IMM64: | |
11186 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
0ca3e455 JB |
11187 | case BFD_RELOC_IA64_DIR32MSB: |
11188 | new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; | |
11189 | case BFD_RELOC_IA64_DIR32LSB: | |
11190 | new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; | |
11191 | case BFD_RELOC_IA64_DIR64MSB: | |
11192 | new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; | |
11193 | case BFD_RELOC_IA64_DIR64LSB: | |
11194 | new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; | |
800eeca4 | 11195 | default: |
0ca3e455 | 11196 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11197 | } |
11198 | break; | |
3969b680 | 11199 | |
13ae64f3 JJ |
11200 | case FUNC_TP_RELATIVE: |
11201 | switch (r_type) | |
11202 | { | |
0ca3e455 JB |
11203 | case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; |
11204 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; | |
11205 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; | |
11206 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; | |
11207 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; | |
11208 | default: type = "TPREL"; break; | |
13ae64f3 JJ |
11209 | } |
11210 | break; | |
11211 | ||
11212 | case FUNC_LT_TP_RELATIVE: | |
11213 | switch (r_type) | |
11214 | { | |
11215 | case BFD_RELOC_IA64_IMM22: | |
11216 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
11217 | default: | |
0ca3e455 JB |
11218 | type = "LTOFF_TPREL"; break; |
11219 | } | |
11220 | break; | |
11221 | ||
11222 | case FUNC_DTP_MODULE: | |
11223 | switch (r_type) | |
11224 | { | |
11225 | case BFD_RELOC_IA64_DIR64MSB: | |
11226 | new = BFD_RELOC_IA64_DTPMOD64MSB; break; | |
11227 | case BFD_RELOC_IA64_DIR64LSB: | |
11228 | new = BFD_RELOC_IA64_DTPMOD64LSB; break; | |
11229 | default: | |
11230 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11231 | } |
11232 | break; | |
11233 | ||
11234 | case FUNC_LT_DTP_MODULE: | |
11235 | switch (r_type) | |
11236 | { | |
11237 | case BFD_RELOC_IA64_IMM22: | |
11238 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
11239 | default: | |
0ca3e455 | 11240 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11241 | } |
11242 | break; | |
11243 | ||
11244 | case FUNC_DTP_RELATIVE: | |
11245 | switch (r_type) | |
11246 | { | |
0ca3e455 JB |
11247 | case BFD_RELOC_IA64_DIR32MSB: |
11248 | new = BFD_RELOC_IA64_DTPREL32MSB; break; | |
11249 | case BFD_RELOC_IA64_DIR32LSB: | |
11250 | new = BFD_RELOC_IA64_DTPREL32LSB; break; | |
6174d9c8 RH |
11251 | case BFD_RELOC_IA64_DIR64MSB: |
11252 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
11253 | case BFD_RELOC_IA64_DIR64LSB: | |
11254 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
11255 | case BFD_RELOC_IA64_IMM14: |
11256 | new = BFD_RELOC_IA64_DTPREL14; break; | |
11257 | case BFD_RELOC_IA64_IMM22: | |
11258 | new = BFD_RELOC_IA64_DTPREL22; break; | |
11259 | case BFD_RELOC_IA64_IMM64: | |
11260 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
11261 | default: | |
0ca3e455 | 11262 | type = "DTPREL"; break; |
13ae64f3 JJ |
11263 | } |
11264 | break; | |
11265 | ||
11266 | case FUNC_LT_DTP_RELATIVE: | |
11267 | switch (r_type) | |
11268 | { | |
11269 | case BFD_RELOC_IA64_IMM22: | |
11270 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
11271 | default: | |
0ca3e455 | 11272 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11273 | } |
11274 | break; | |
11275 | ||
40449e9f | 11276 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11277 | switch (r_type) |
11278 | { | |
11279 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11280 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11281 | default: type = "IPLT"; break; | |
11282 | } | |
40449e9f | 11283 | break; |
1cd8ff38 | 11284 | |
800eeca4 JW |
11285 | default: |
11286 | abort (); | |
11287 | } | |
6174d9c8 | 11288 | |
800eeca4 JW |
11289 | if (new) |
11290 | return new; | |
11291 | else | |
0ca3e455 JB |
11292 | { |
11293 | int width; | |
11294 | ||
11295 | if (!type) | |
11296 | abort (); | |
11297 | switch (r_type) | |
11298 | { | |
11299 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11300 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11301 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11302 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11303 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11304 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11305 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11306 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11307 | default: abort (); | |
11308 | } | |
11309 | ||
11310 | /* This should be an error, but since previously there wasn't any | |
11311 | diagnostic here, dont't make it fail because of this for now. */ | |
11312 | as_warn ("Cannot express %s%d%s relocation", type, width, suffix); | |
11313 | return r_type; | |
11314 | } | |
800eeca4 JW |
11315 | } |
11316 | ||
11317 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11318 | functions. */ | |
11319 | void | |
11320 | ia64_validate_fix (fix) | |
11321 | fixS *fix; | |
11322 | { | |
11323 | switch (fix->fx_r_type) | |
11324 | { | |
11325 | case BFD_RELOC_IA64_FPTR64I: | |
11326 | case BFD_RELOC_IA64_FPTR32MSB: | |
11327 | case BFD_RELOC_IA64_FPTR64LSB: | |
11328 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11329 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11330 | if (fix->fx_offset != 0) | |
11331 | as_bad_where (fix->fx_file, fix->fx_line, | |
11332 | "No addend allowed in @fptr() relocation"); | |
11333 | break; | |
11334 | default: | |
11335 | break; | |
11336 | } | |
800eeca4 JW |
11337 | } |
11338 | ||
11339 | static void | |
11340 | fix_insn (fix, odesc, value) | |
11341 | fixS *fix; | |
11342 | const struct ia64_operand *odesc; | |
11343 | valueT value; | |
11344 | { | |
11345 | bfd_vma insn[3], t0, t1, control_bits; | |
11346 | const char *err; | |
11347 | char *fixpos; | |
11348 | long slot; | |
11349 | ||
11350 | slot = fix->fx_where & 0x3; | |
11351 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11352 | ||
c67e42c9 | 11353 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11354 | t0 = bfd_getl64 (fixpos); |
11355 | t1 = bfd_getl64 (fixpos + 8); | |
11356 | control_bits = t0 & 0x1f; | |
11357 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11358 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11359 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11360 | ||
c67e42c9 RH |
11361 | err = NULL; |
11362 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11363 | { |
c67e42c9 RH |
11364 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11365 | insn[2] |= (((value & 0x7f) << 13) | |
11366 | | (((value >> 7) & 0x1ff) << 27) | |
11367 | | (((value >> 16) & 0x1f) << 22) | |
11368 | | (((value >> 21) & 0x1) << 21) | |
11369 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11370 | } |
c67e42c9 RH |
11371 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11372 | { | |
11373 | if (value & ~0x3fffffffffffffffULL) | |
11374 | err = "integer operand out of range"; | |
11375 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
11376 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11377 | } | |
11378 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11379 | { | |
11380 | value >>= 4; | |
11381 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11382 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11383 | | (((value >> 0) & 0xfffff) << 13)); | |
11384 | } | |
11385 | else | |
11386 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11387 | ||
11388 | if (err) | |
11389 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
11390 | |
11391 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11392 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11393 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11394 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11395 | } |
11396 | ||
11397 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11398 | ignored; perhaps it was once meaningful, but now it is historical. | |
11399 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11400 | ||
11401 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11402 | (if possible). */ |
94f592af NC |
11403 | |
11404 | void | |
55cf6793 | 11405 | md_apply_fix (fix, valP, seg) |
800eeca4 | 11406 | fixS *fix; |
40449e9f | 11407 | valueT *valP; |
2434f565 | 11408 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
11409 | { |
11410 | char *fixpos; | |
40449e9f | 11411 | valueT value = *valP; |
800eeca4 JW |
11412 | |
11413 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11414 | ||
11415 | if (fix->fx_pcrel) | |
11416 | { | |
7b347e43 JB |
11417 | switch (fix->fx_r_type) |
11418 | { | |
11419 | case BFD_RELOC_IA64_PCREL21B: break; | |
11420 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11421 | case BFD_RELOC_IA64_PCREL21F: break; | |
11422 | case BFD_RELOC_IA64_PCREL21M: break; | |
11423 | case BFD_RELOC_IA64_PCREL60B: break; | |
11424 | case BFD_RELOC_IA64_PCREL22: break; | |
11425 | case BFD_RELOC_IA64_PCREL64I: break; | |
11426 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11427 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11428 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11429 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11430 | default: | |
11431 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11432 | fix->fx_r_type); | |
11433 | break; | |
11434 | } | |
800eeca4 JW |
11435 | } |
11436 | if (fix->fx_addsy) | |
11437 | { | |
00f7efb6 | 11438 | switch (fix->fx_r_type) |
800eeca4 | 11439 | { |
00f7efb6 | 11440 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11441 | /* This must be a TAG13 or TAG13b operand. There are no external |
11442 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
11443 | as_bad_where (fix->fx_file, fix->fx_line, |
11444 | "%s must have a constant value", | |
11445 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 11446 | fix->fx_done = 1; |
94f592af | 11447 | return; |
00f7efb6 JJ |
11448 | |
11449 | case BFD_RELOC_IA64_TPREL14: | |
11450 | case BFD_RELOC_IA64_TPREL22: | |
11451 | case BFD_RELOC_IA64_TPREL64I: | |
11452 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11453 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11454 | case BFD_RELOC_IA64_DTPREL14: | |
11455 | case BFD_RELOC_IA64_DTPREL22: | |
11456 | case BFD_RELOC_IA64_DTPREL64I: | |
11457 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11458 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11459 | break; | |
7925dd68 JJ |
11460 | |
11461 | default: | |
11462 | break; | |
800eeca4 | 11463 | } |
800eeca4 JW |
11464 | } |
11465 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11466 | { | |
11467 | if (fix->tc_fix_data.bigendian) | |
11468 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11469 | else | |
11470 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11471 | fix->fx_done = 1; | |
800eeca4 JW |
11472 | } |
11473 | else | |
11474 | { | |
11475 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11476 | fix->fx_done = 1; | |
800eeca4 | 11477 | } |
800eeca4 JW |
11478 | } |
11479 | ||
11480 | /* Generate the BFD reloc to be stuck in the object file from the | |
11481 | fixup used internally in the assembler. */ | |
542d6675 KH |
11482 | |
11483 | arelent * | |
800eeca4 | 11484 | tc_gen_reloc (sec, fixp) |
2434f565 | 11485 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
11486 | fixS *fixp; |
11487 | { | |
11488 | arelent *reloc; | |
11489 | ||
11490 | reloc = xmalloc (sizeof (*reloc)); | |
11491 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11492 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11493 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11494 | reloc->addend = fixp->fx_offset; | |
11495 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11496 | ||
11497 | if (!reloc->howto) | |
11498 | { | |
11499 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
11500 | "Cannot represent %s relocation in object file", | |
11501 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
11502 | } | |
11503 | return reloc; | |
11504 | } | |
11505 | ||
11506 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11507 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11508 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11509 | returned, or NULL on OK. */ |
11510 | ||
11511 | #define MAX_LITTLENUMS 5 | |
11512 | ||
542d6675 | 11513 | char * |
800eeca4 JW |
11514 | md_atof (type, lit, size) |
11515 | int type; | |
11516 | char *lit; | |
11517 | int *size; | |
11518 | { | |
11519 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11520 | char *t; |
11521 | int prec; | |
11522 | ||
11523 | switch (type) | |
11524 | { | |
11525 | /* IEEE floats */ | |
11526 | case 'f': | |
11527 | case 'F': | |
11528 | case 's': | |
11529 | case 'S': | |
11530 | prec = 2; | |
11531 | break; | |
11532 | ||
11533 | case 'd': | |
11534 | case 'D': | |
11535 | case 'r': | |
11536 | case 'R': | |
11537 | prec = 4; | |
11538 | break; | |
11539 | ||
11540 | case 'x': | |
11541 | case 'X': | |
11542 | case 'p': | |
11543 | case 'P': | |
11544 | prec = 5; | |
11545 | break; | |
11546 | ||
11547 | default: | |
11548 | *size = 0; | |
11549 | return "Bad call to MD_ATOF()"; | |
11550 | } | |
11551 | t = atof_ieee (input_line_pointer, type, words); | |
11552 | if (t) | |
11553 | input_line_pointer = t; | |
800eeca4 | 11554 | |
10a98291 L |
11555 | (*ia64_float_to_chars) (lit, words, prec); |
11556 | ||
165a7f90 L |
11557 | if (type == 'X') |
11558 | { | |
11559 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11560 | memset (&lit [10], 0, 6); |
165a7f90 L |
11561 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11562 | } | |
10a98291 L |
11563 | else |
11564 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11565 | ||
800eeca4 JW |
11566 | return 0; |
11567 | } | |
11568 | ||
800eeca4 JW |
11569 | /* Handle ia64 specific semantics of the align directive. */ |
11570 | ||
0a9ef439 | 11571 | void |
800eeca4 | 11572 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
11573 | int n ATTRIBUTE_UNUSED; |
11574 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 11575 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 11576 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 11577 | { |
0a9ef439 | 11578 | if (subseg_text_p (now_seg)) |
800eeca4 | 11579 | ia64_flush_insns (); |
0a9ef439 | 11580 | } |
800eeca4 | 11581 | |
0a9ef439 RH |
11582 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11583 | of an rs_align_code fragment. */ | |
800eeca4 | 11584 | |
0a9ef439 RH |
11585 | void |
11586 | ia64_handle_align (fragp) | |
11587 | fragS *fragp; | |
11588 | { | |
0a9ef439 RH |
11589 | int bytes; |
11590 | char *p; | |
9545c4ce | 11591 | const unsigned char *nop; |
0a9ef439 RH |
11592 | |
11593 | if (fragp->fr_type != rs_align_code) | |
11594 | return; | |
11595 | ||
9545c4ce L |
11596 | /* Check if this frag has to end with a stop bit. */ |
11597 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11598 | ||
0a9ef439 RH |
11599 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11600 | p = fragp->fr_literal + fragp->fr_fix; | |
11601 | ||
d9201763 L |
11602 | /* If no paddings are needed, we check if we need a stop bit. */ |
11603 | if (!bytes && fragp->tc_frag_data) | |
11604 | { | |
11605 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11606 | #if 1 |
11607 | /* FIXME: It won't work with | |
11608 | .align 16 | |
11609 | alloc r32=ar.pfs,1,2,4,0 | |
11610 | */ | |
11611 | ; | |
11612 | #else | |
d9201763 L |
11613 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11614 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11615 | #endif |
d9201763 L |
11616 | else |
11617 | /* Bundles are always in little-endian byte order. Make sure | |
11618 | the previous bundle has the stop bit. */ | |
11619 | *(p - 16) |= 1; | |
11620 | } | |
11621 | ||
0a9ef439 RH |
11622 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11623 | putting data into a text section. */ | |
11624 | if (bytes & 15) | |
11625 | { | |
11626 | int fix = bytes & 15; | |
11627 | memset (p, 0, fix); | |
11628 | p += fix; | |
11629 | bytes -= fix; | |
11630 | fragp->fr_fix += fix; | |
800eeca4 JW |
11631 | } |
11632 | ||
012a452b | 11633 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11634 | memcpy (p, nop, 16); |
0a9ef439 | 11635 | fragp->fr_var = 16; |
800eeca4 | 11636 | } |
10a98291 L |
11637 | |
11638 | static void | |
11639 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11640 | int prec) | |
11641 | { | |
11642 | while (prec--) | |
11643 | { | |
11644 | number_to_chars_bigendian (lit, (long) (*words++), | |
11645 | sizeof (LITTLENUM_TYPE)); | |
11646 | lit += sizeof (LITTLENUM_TYPE); | |
11647 | } | |
11648 | } | |
11649 | ||
11650 | static void | |
11651 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11652 | int prec) | |
11653 | { | |
11654 | while (prec--) | |
11655 | { | |
11656 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11657 | sizeof (LITTLENUM_TYPE)); | |
11658 | lit += sizeof (LITTLENUM_TYPE); | |
11659 | } | |
11660 | } | |
11661 | ||
11662 | void | |
11663 | ia64_elf_section_change_hook (void) | |
11664 | { | |
38ce5b11 L |
11665 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11666 | && elf_linked_to_section (now_seg) == NULL) | |
11667 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11668 | dot_byteorder (-1); |
11669 | } | |
a645d1eb L |
11670 | |
11671 | /* Check if a label should be made global. */ | |
11672 | void | |
11673 | ia64_check_label (symbolS *label) | |
11674 | { | |
11675 | if (*input_line_pointer == ':') | |
11676 | { | |
11677 | S_SET_EXTERNAL (label); | |
11678 | input_line_pointer++; | |
11679 | } | |
11680 | } | |
35f5df7f L |
11681 | |
11682 | /* Used to remember where .alias and .secalias directives are seen. We | |
11683 | will rename symbol and section names when we are about to output | |
11684 | the relocatable file. */ | |
11685 | struct alias | |
11686 | { | |
11687 | char *file; /* The file where the directive is seen. */ | |
11688 | unsigned int line; /* The line number the directive is at. */ | |
11689 | const char *name; /* The orignale name of the symbol. */ | |
11690 | }; | |
11691 | ||
11692 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11693 | .secalias. Otherwise, it is .alias. */ | |
11694 | static void | |
11695 | dot_alias (int section) | |
11696 | { | |
11697 | char *name, *alias; | |
11698 | char delim; | |
11699 | char *end_name; | |
11700 | int len; | |
11701 | const char *error_string; | |
11702 | struct alias *h; | |
11703 | const char *a; | |
11704 | struct hash_control *ahash, *nhash; | |
11705 | const char *kind; | |
11706 | ||
11707 | name = input_line_pointer; | |
11708 | delim = get_symbol_end (); | |
11709 | end_name = input_line_pointer; | |
11710 | *end_name = delim; | |
11711 | ||
11712 | if (name == end_name) | |
11713 | { | |
11714 | as_bad (_("expected symbol name")); | |
11715 | discard_rest_of_line (); | |
11716 | return; | |
11717 | } | |
11718 | ||
11719 | SKIP_WHITESPACE (); | |
11720 | ||
11721 | if (*input_line_pointer != ',') | |
11722 | { | |
11723 | *end_name = 0; | |
11724 | as_bad (_("expected comma after \"%s\""), name); | |
11725 | *end_name = delim; | |
11726 | ignore_rest_of_line (); | |
11727 | return; | |
11728 | } | |
11729 | ||
11730 | input_line_pointer++; | |
11731 | *end_name = 0; | |
20b36a95 | 11732 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11733 | |
11734 | /* We call demand_copy_C_string to check if alias string is valid. | |
11735 | There should be a closing `"' and no `\0' in the string. */ | |
11736 | alias = demand_copy_C_string (&len); | |
11737 | if (alias == NULL) | |
11738 | { | |
11739 | ignore_rest_of_line (); | |
11740 | return; | |
11741 | } | |
11742 | ||
11743 | /* Make a copy of name string. */ | |
11744 | len = strlen (name) + 1; | |
11745 | obstack_grow (¬es, name, len); | |
11746 | name = obstack_finish (¬es); | |
11747 | ||
11748 | if (section) | |
11749 | { | |
11750 | kind = "section"; | |
11751 | ahash = secalias_hash; | |
11752 | nhash = secalias_name_hash; | |
11753 | } | |
11754 | else | |
11755 | { | |
11756 | kind = "symbol"; | |
11757 | ahash = alias_hash; | |
11758 | nhash = alias_name_hash; | |
11759 | } | |
11760 | ||
11761 | /* Check if alias has been used before. */ | |
11762 | h = (struct alias *) hash_find (ahash, alias); | |
11763 | if (h) | |
11764 | { | |
11765 | if (strcmp (h->name, name)) | |
11766 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11767 | alias, kind, h->name); | |
11768 | goto out; | |
11769 | } | |
11770 | ||
11771 | /* Check if name already has an alias. */ | |
11772 | a = (const char *) hash_find (nhash, name); | |
11773 | if (a) | |
11774 | { | |
11775 | if (strcmp (a, alias)) | |
11776 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11777 | goto out; | |
11778 | } | |
11779 | ||
11780 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11781 | as_where (&h->file, &h->line); | |
11782 | h->name = name; | |
11783 | ||
11784 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11785 | if (error_string) | |
11786 | { | |
11787 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11788 | alias, kind, error_string); | |
11789 | goto out; | |
11790 | } | |
11791 | ||
11792 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11793 | if (error_string) | |
11794 | { | |
11795 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11796 | alias, kind, error_string); | |
11797 | out: | |
11798 | obstack_free (¬es, name); | |
11799 | obstack_free (¬es, alias); | |
11800 | } | |
11801 | ||
11802 | demand_empty_rest_of_line (); | |
11803 | } | |
11804 | ||
11805 | /* It renames the original symbol name to its alias. */ | |
11806 | static void | |
11807 | do_alias (const char *alias, PTR value) | |
11808 | { | |
11809 | struct alias *h = (struct alias *) value; | |
11810 | symbolS *sym = symbol_find (h->name); | |
11811 | ||
11812 | if (sym == NULL) | |
11813 | as_warn_where (h->file, h->line, | |
11814 | _("symbol `%s' aliased to `%s' is not used"), | |
11815 | h->name, alias); | |
11816 | else | |
11817 | S_SET_NAME (sym, (char *) alias); | |
11818 | } | |
11819 | ||
11820 | /* Called from write_object_file. */ | |
11821 | void | |
11822 | ia64_adjust_symtab (void) | |
11823 | { | |
11824 | hash_traverse (alias_hash, do_alias); | |
11825 | } | |
11826 | ||
11827 | /* It renames the original section name to its alias. */ | |
11828 | static void | |
11829 | do_secalias (const char *alias, PTR value) | |
11830 | { | |
11831 | struct alias *h = (struct alias *) value; | |
11832 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11833 | ||
11834 | if (sec == NULL) | |
11835 | as_warn_where (h->file, h->line, | |
11836 | _("section `%s' aliased to `%s' is not used"), | |
11837 | h->name, alias); | |
11838 | else | |
11839 | sec->name = alias; | |
11840 | } | |
11841 | ||
11842 | /* Called from write_object_file. */ | |
11843 | void | |
11844 | ia64_frob_file (void) | |
11845 | { | |
11846 | hash_traverse (secalias_hash, do_secalias); | |
11847 | } |