Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
744b6414 | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 |
d6afba4b | 3 | Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
a66d2bb7 JB |
54 | #ifdef HAVE_LIMITS_H |
55 | #include <limits.h> | |
56 | #endif | |
57 | ||
800eeca4 JW |
58 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
59 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) | |
60 | ||
61 | #define NUM_SLOTS 4 | |
62 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
63 | #define CURR_SLOT md.slot[md.curr_slot] | |
64 | ||
65 | #define O_pseudo_fixup (O_max + 1) | |
66 | ||
67 | enum special_section | |
68 | { | |
557debba | 69 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
70 | SPECIAL_SECTION_BSS = 0, |
71 | SPECIAL_SECTION_SBSS, | |
72 | SPECIAL_SECTION_SDATA, | |
73 | SPECIAL_SECTION_RODATA, | |
74 | SPECIAL_SECTION_COMMENT, | |
75 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
76 | SPECIAL_SECTION_UNWIND_INFO, |
77 | /* HPUX specific section pseudo-ops. */ | |
78 | SPECIAL_SECTION_INIT_ARRAY, | |
79 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
80 | }; |
81 | ||
82 | enum reloc_func | |
83 | { | |
13ae64f3 JJ |
84 | FUNC_DTP_MODULE, |
85 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
86 | FUNC_FPTR_RELATIVE, |
87 | FUNC_GP_RELATIVE, | |
88 | FUNC_LT_RELATIVE, | |
fa2c7eff | 89 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 90 | FUNC_PC_RELATIVE, |
800eeca4 JW |
91 | FUNC_PLT_RELATIVE, |
92 | FUNC_SEC_RELATIVE, | |
93 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 94 | FUNC_TP_RELATIVE, |
800eeca4 JW |
95 | FUNC_LTV_RELATIVE, |
96 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
97 | FUNC_LT_DTP_MODULE, |
98 | FUNC_LT_DTP_RELATIVE, | |
99 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 100 | FUNC_IPLT_RELOC, |
800eeca4 JW |
101 | }; |
102 | ||
103 | enum reg_symbol | |
104 | { | |
105 | REG_GR = 0, | |
106 | REG_FR = (REG_GR + 128), | |
107 | REG_AR = (REG_FR + 128), | |
108 | REG_CR = (REG_AR + 128), | |
109 | REG_P = (REG_CR + 128), | |
110 | REG_BR = (REG_P + 64), | |
111 | REG_IP = (REG_BR + 8), | |
112 | REG_CFM, | |
113 | REG_PR, | |
114 | REG_PR_ROT, | |
115 | REG_PSR, | |
116 | REG_PSR_L, | |
117 | REG_PSR_UM, | |
118 | /* The following are pseudo-registers for use by gas only. */ | |
119 | IND_CPUID, | |
120 | IND_DBR, | |
121 | IND_DTR, | |
122 | IND_ITR, | |
123 | IND_IBR, | |
124 | IND_MEM, | |
125 | IND_MSR, | |
126 | IND_PKR, | |
127 | IND_PMC, | |
128 | IND_PMD, | |
129 | IND_RR, | |
542d6675 | 130 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
131 | REG_PSP, |
132 | REG_PRIUNAT, | |
800eeca4 JW |
133 | REG_NUM |
134 | }; | |
135 | ||
136 | enum dynreg_type | |
137 | { | |
138 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
139 | DYNREG_FR, /* dynamic floating point register */ | |
140 | DYNREG_PR, /* dynamic predicate register */ | |
141 | DYNREG_NUM_TYPES | |
142 | }; | |
143 | ||
87f8eb97 JW |
144 | enum operand_match_result |
145 | { | |
146 | OPERAND_MATCH, | |
147 | OPERAND_OUT_OF_RANGE, | |
148 | OPERAND_MISMATCH | |
149 | }; | |
150 | ||
800eeca4 JW |
151 | /* On the ia64, we can't know the address of a text label until the |
152 | instructions are packed into a bundle. To handle this, we keep | |
153 | track of the list of labels that appear in front of each | |
154 | instruction. */ | |
155 | struct label_fix | |
542d6675 KH |
156 | { |
157 | struct label_fix *next; | |
158 | struct symbol *sym; | |
159 | }; | |
800eeca4 | 160 | |
549f748d | 161 | /* This is the endianness of the current section. */ |
800eeca4 JW |
162 | extern int target_big_endian; |
163 | ||
549f748d JW |
164 | /* This is the default endianness. */ |
165 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
166 | ||
10a98291 L |
167 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
168 | ||
169 | static void ia64_float_to_chars_bigendian | |
170 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
171 | static void ia64_float_to_chars_littleendian | |
172 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
173 | static void (*ia64_float_to_chars) | |
174 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
175 | ||
35f5df7f L |
176 | static struct hash_control *alias_hash; |
177 | static struct hash_control *alias_name_hash; | |
178 | static struct hash_control *secalias_hash; | |
179 | static struct hash_control *secalias_name_hash; | |
180 | ||
2fac3d48 JB |
181 | /* List of chars besides those in app.c:symbol_chars that can start an |
182 | operand. Used to prevent the scrubber eating vital white-space. */ | |
183 | const char ia64_symbol_chars[] = "@?"; | |
184 | ||
800eeca4 JW |
185 | /* Characters which always start a comment. */ |
186 | const char comment_chars[] = ""; | |
187 | ||
188 | /* Characters which start a comment at the beginning of a line. */ | |
189 | const char line_comment_chars[] = "#"; | |
190 | ||
191 | /* Characters which may be used to separate multiple commands on a | |
192 | single line. */ | |
193 | const char line_separator_chars[] = ";"; | |
194 | ||
195 | /* Characters which are used to indicate an exponent in a floating | |
196 | point number. */ | |
197 | const char EXP_CHARS[] = "eE"; | |
198 | ||
199 | /* Characters which mean that a number is a floating point constant, | |
200 | as in 0d1.0. */ | |
201 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
202 | ||
542d6675 | 203 | /* ia64-specific option processing: */ |
800eeca4 | 204 | |
44f5c83a | 205 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
206 | |
207 | struct option md_longopts[] = | |
208 | { | |
c43c2cc5 JW |
209 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
210 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
211 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
212 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
213 | }; |
214 | ||
215 | size_t md_longopts_size = sizeof (md_longopts); | |
216 | ||
217 | static struct | |
218 | { | |
219 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
220 | struct hash_control *reg_hash; /* register name hash table */ | |
221 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
222 | struct hash_control *const_hash; /* constant hash table */ | |
223 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
224 | ||
225 | symbolS *regsym[REG_NUM]; | |
226 | ||
227 | /* If X_op is != O_absent, the registername for the instruction's | |
228 | qualifying predicate. If NULL, p0 is assumed for instructions | |
229 | that are predicatable. */ | |
230 | expressionS qp; | |
231 | ||
8c2fda1d L |
232 | /* Optimize for which CPU. */ |
233 | enum | |
234 | { | |
235 | itanium1, | |
236 | itanium2 | |
237 | } tune; | |
238 | ||
91d777ee L |
239 | /* What to do when hint.b is used. */ |
240 | enum | |
241 | { | |
242 | hint_b_error, | |
243 | hint_b_warning, | |
244 | hint_b_ok | |
245 | } hint_b; | |
246 | ||
800eeca4 | 247 | unsigned int |
197865e8 | 248 | manual_bundling : 1, |
800eeca4 JW |
249 | debug_dv: 1, |
250 | detect_dv: 1, | |
251 | explicit_mode : 1, /* which mode we're in */ | |
252 | default_explicit_mode : 1, /* which mode is the default */ | |
253 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
254 | auto_align : 1, |
255 | keep_pending_output : 1; | |
800eeca4 | 256 | |
970d6792 L |
257 | /* What to do when something is wrong with unwind directives. */ |
258 | enum | |
259 | { | |
260 | unwind_check_warning, | |
261 | unwind_check_error | |
262 | } unwind_check; | |
263 | ||
800eeca4 JW |
264 | /* Each bundle consists of up to three instructions. We keep |
265 | track of four most recent instructions so we can correctly set | |
197865e8 | 266 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
267 | int curr_slot; |
268 | int num_slots_in_use; | |
269 | struct slot | |
270 | { | |
271 | unsigned int | |
272 | end_of_insn_group : 1, | |
273 | manual_bundling_on : 1, | |
196e8040 JW |
274 | manual_bundling_off : 1, |
275 | loc_directive_seen : 1; | |
800eeca4 JW |
276 | signed char user_template; /* user-selected template, if any */ |
277 | unsigned char qp_regno; /* qualifying predicate */ | |
278 | /* This duplicates a good fraction of "struct fix" but we | |
279 | can't use a "struct fix" instead since we can't call | |
280 | fix_new_exp() until we know the address of the instruction. */ | |
281 | int num_fixups; | |
282 | struct insn_fix | |
283 | { | |
284 | bfd_reloc_code_real_type code; | |
285 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
286 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
287 | expressionS expr; /* the value to be inserted */ | |
288 | } | |
289 | fixup[2]; /* at most two fixups per insn */ | |
290 | struct ia64_opcode *idesc; | |
291 | struct label_fix *label_fixups; | |
f1bcba5b | 292 | struct label_fix *tag_fixups; |
800eeca4 JW |
293 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
294 | expressionS opnd[6]; | |
295 | char *src_file; | |
296 | unsigned int src_line; | |
297 | struct dwarf2_line_info debug_line; | |
298 | } | |
299 | slot[NUM_SLOTS]; | |
300 | ||
301 | segT last_text_seg; | |
302 | ||
303 | struct dynreg | |
304 | { | |
305 | struct dynreg *next; /* next dynamic register */ | |
306 | const char *name; | |
307 | unsigned short base; /* the base register number */ | |
308 | unsigned short num_regs; /* # of registers in this set */ | |
309 | } | |
310 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
311 | ||
312 | flagword flags; /* ELF-header flags */ | |
313 | ||
314 | struct mem_offset { | |
315 | unsigned hint:1; /* is this hint currently valid? */ | |
316 | bfd_vma offset; /* mem.offset offset */ | |
317 | bfd_vma base; /* mem.offset base */ | |
318 | } mem_offset; | |
319 | ||
320 | int path; /* number of alt. entry points seen */ | |
321 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 322 | the current DV-checking block. */ |
800eeca4 | 323 | int maxpaths; /* size currently allocated for |
542d6675 | 324 | entry_labels */ |
557debba JW |
325 | |
326 | int pointer_size; /* size in bytes of a pointer */ | |
327 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
328 | } |
329 | md; | |
330 | ||
f6fe78d6 JW |
331 | /* These are not const, because they are modified to MMI for non-itanium1 |
332 | targets below. */ | |
333 | /* MFI bundle of nops. */ | |
334 | static unsigned char le_nop[16] = | |
335 | { | |
336 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
337 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
338 | }; | |
339 | /* MFI bundle of nops with stop-bit. */ | |
340 | static unsigned char le_nop_stop[16] = | |
341 | { | |
342 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
343 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
344 | }; | |
345 | ||
542d6675 | 346 | /* application registers: */ |
800eeca4 | 347 | |
e0c9811a JW |
348 | #define AR_K0 0 |
349 | #define AR_K7 7 | |
350 | #define AR_RSC 16 | |
351 | #define AR_BSP 17 | |
352 | #define AR_BSPSTORE 18 | |
353 | #define AR_RNAT 19 | |
354 | #define AR_UNAT 36 | |
355 | #define AR_FPSR 40 | |
356 | #define AR_ITC 44 | |
357 | #define AR_PFS 64 | |
358 | #define AR_LC 65 | |
800eeca4 JW |
359 | |
360 | static const struct | |
361 | { | |
362 | const char *name; | |
363 | int regnum; | |
364 | } | |
365 | ar[] = | |
366 | { | |
367 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
368 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
369 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
370 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
371 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
372 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
373 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
374 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
375 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
376 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
377 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 378 | {"ar.ec", 66}, |
800eeca4 JW |
379 | }; |
380 | ||
381 | #define CR_IPSR 16 | |
382 | #define CR_ISR 17 | |
383 | #define CR_IIP 19 | |
384 | #define CR_IFA 20 | |
385 | #define CR_ITIR 21 | |
386 | #define CR_IIPA 22 | |
387 | #define CR_IFS 23 | |
388 | #define CR_IIM 24 | |
389 | #define CR_IHA 25 | |
390 | #define CR_IVR 65 | |
391 | #define CR_TPR 66 | |
392 | #define CR_EOI 67 | |
393 | #define CR_IRR0 68 | |
394 | #define CR_IRR3 71 | |
395 | #define CR_LRR0 80 | |
396 | #define CR_LRR1 81 | |
397 | ||
542d6675 | 398 | /* control registers: */ |
800eeca4 JW |
399 | static const struct |
400 | { | |
401 | const char *name; | |
402 | int regnum; | |
403 | } | |
404 | cr[] = | |
405 | { | |
406 | {"cr.dcr", 0}, | |
407 | {"cr.itm", 1}, | |
408 | {"cr.iva", 2}, | |
409 | {"cr.pta", 8}, | |
410 | {"cr.gpta", 9}, | |
411 | {"cr.ipsr", 16}, | |
412 | {"cr.isr", 17}, | |
413 | {"cr.iip", 19}, | |
414 | {"cr.ifa", 20}, | |
415 | {"cr.itir", 21}, | |
416 | {"cr.iipa", 22}, | |
417 | {"cr.ifs", 23}, | |
418 | {"cr.iim", 24}, | |
419 | {"cr.iha", 25}, | |
420 | {"cr.lid", 64}, | |
421 | {"cr.ivr", 65}, | |
422 | {"cr.tpr", 66}, | |
423 | {"cr.eoi", 67}, | |
424 | {"cr.irr0", 68}, | |
425 | {"cr.irr1", 69}, | |
426 | {"cr.irr2", 70}, | |
427 | {"cr.irr3", 71}, | |
428 | {"cr.itv", 72}, | |
429 | {"cr.pmv", 73}, | |
430 | {"cr.cmcv", 74}, | |
431 | {"cr.lrr0", 80}, | |
432 | {"cr.lrr1", 81} | |
433 | }; | |
434 | ||
435 | #define PSR_MFL 4 | |
436 | #define PSR_IC 13 | |
437 | #define PSR_DFL 18 | |
438 | #define PSR_CPL 32 | |
439 | ||
440 | static const struct const_desc | |
441 | { | |
442 | const char *name; | |
443 | valueT value; | |
444 | } | |
445 | const_bits[] = | |
446 | { | |
542d6675 | 447 | /* PSR constant masks: */ |
800eeca4 JW |
448 | |
449 | /* 0: reserved */ | |
450 | {"psr.be", ((valueT) 1) << 1}, | |
451 | {"psr.up", ((valueT) 1) << 2}, | |
452 | {"psr.ac", ((valueT) 1) << 3}, | |
453 | {"psr.mfl", ((valueT) 1) << 4}, | |
454 | {"psr.mfh", ((valueT) 1) << 5}, | |
455 | /* 6-12: reserved */ | |
456 | {"psr.ic", ((valueT) 1) << 13}, | |
457 | {"psr.i", ((valueT) 1) << 14}, | |
458 | {"psr.pk", ((valueT) 1) << 15}, | |
459 | /* 16: reserved */ | |
460 | {"psr.dt", ((valueT) 1) << 17}, | |
461 | {"psr.dfl", ((valueT) 1) << 18}, | |
462 | {"psr.dfh", ((valueT) 1) << 19}, | |
463 | {"psr.sp", ((valueT) 1) << 20}, | |
464 | {"psr.pp", ((valueT) 1) << 21}, | |
465 | {"psr.di", ((valueT) 1) << 22}, | |
466 | {"psr.si", ((valueT) 1) << 23}, | |
467 | {"psr.db", ((valueT) 1) << 24}, | |
468 | {"psr.lp", ((valueT) 1) << 25}, | |
469 | {"psr.tb", ((valueT) 1) << 26}, | |
470 | {"psr.rt", ((valueT) 1) << 27}, | |
471 | /* 28-31: reserved */ | |
472 | /* 32-33: cpl (current privilege level) */ | |
473 | {"psr.is", ((valueT) 1) << 34}, | |
474 | {"psr.mc", ((valueT) 1) << 35}, | |
475 | {"psr.it", ((valueT) 1) << 36}, | |
476 | {"psr.id", ((valueT) 1) << 37}, | |
477 | {"psr.da", ((valueT) 1) << 38}, | |
478 | {"psr.dd", ((valueT) 1) << 39}, | |
479 | {"psr.ss", ((valueT) 1) << 40}, | |
480 | /* 41-42: ri (restart instruction) */ | |
481 | {"psr.ed", ((valueT) 1) << 43}, | |
482 | {"psr.bn", ((valueT) 1) << 44}, | |
483 | }; | |
484 | ||
542d6675 | 485 | /* indirect register-sets/memory: */ |
800eeca4 JW |
486 | |
487 | static const struct | |
488 | { | |
489 | const char *name; | |
490 | int regnum; | |
491 | } | |
492 | indirect_reg[] = | |
493 | { | |
494 | { "CPUID", IND_CPUID }, | |
495 | { "cpuid", IND_CPUID }, | |
496 | { "dbr", IND_DBR }, | |
497 | { "dtr", IND_DTR }, | |
498 | { "itr", IND_ITR }, | |
499 | { "ibr", IND_IBR }, | |
500 | { "msr", IND_MSR }, | |
501 | { "pkr", IND_PKR }, | |
502 | { "pmc", IND_PMC }, | |
503 | { "pmd", IND_PMD }, | |
504 | { "rr", IND_RR }, | |
505 | }; | |
506 | ||
507 | /* Pseudo functions used to indicate relocation types (these functions | |
508 | start with an at sign (@). */ | |
509 | static struct | |
510 | { | |
511 | const char *name; | |
512 | enum pseudo_type | |
513 | { | |
514 | PSEUDO_FUNC_NONE, | |
515 | PSEUDO_FUNC_RELOC, | |
516 | PSEUDO_FUNC_CONST, | |
e0c9811a | 517 | PSEUDO_FUNC_REG, |
800eeca4 JW |
518 | PSEUDO_FUNC_FLOAT |
519 | } | |
520 | type; | |
521 | union | |
522 | { | |
523 | unsigned long ival; | |
524 | symbolS *sym; | |
525 | } | |
526 | u; | |
527 | } | |
528 | pseudo_func[] = | |
529 | { | |
542d6675 | 530 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
531 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
532 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
533 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
534 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
535 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 536 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
537 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
538 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
539 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
540 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 541 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 542 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
543 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
544 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
545 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
546 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 547 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 548 | |
542d6675 | 549 | /* mbtype4 constants: */ |
800eeca4 JW |
550 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
551 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
552 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
553 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
554 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
555 | ||
542d6675 | 556 | /* fclass constants: */ |
bf3ca999 | 557 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
558 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
559 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
560 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
561 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
562 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
563 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
564 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
565 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
566 | |
567 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 568 | |
c10d9d8f JW |
569 | /* hint constants: */ |
570 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
571 | ||
542d6675 | 572 | /* unwind-related constants: */ |
041340ad JW |
573 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
574 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
575 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
576 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
577 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
578 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
579 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 580 | |
542d6675 | 581 | /* unwind-related registers: */ |
e0c9811a | 582 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
583 | }; |
584 | ||
542d6675 | 585 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
586 | static const bfd_vma nop[IA64_NUM_UNITS] = |
587 | { | |
588 | 0x0000000000LL, /* NIL => break 0 */ | |
589 | 0x0008000000LL, /* I-unit nop */ | |
590 | 0x0008000000LL, /* M-unit nop */ | |
591 | 0x4000000000LL, /* B-unit nop */ | |
592 | 0x0008000000LL, /* F-unit nop */ | |
593 | 0x0008000000LL, /* L-"unit" nop */ | |
594 | 0x0008000000LL, /* X-unit nop */ | |
595 | }; | |
596 | ||
597 | /* Can't be `const' as it's passed to input routines (which have the | |
598 | habit of setting temporary sentinels. */ | |
599 | static char special_section_name[][20] = | |
600 | { | |
601 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
602 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
603 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
604 | }; |
605 | ||
606 | /* The best template for a particular sequence of up to three | |
607 | instructions: */ | |
608 | #define N IA64_NUM_TYPES | |
609 | static unsigned char best_template[N][N][N]; | |
610 | #undef N | |
611 | ||
612 | /* Resource dependencies currently in effect */ | |
613 | static struct rsrc { | |
614 | int depind; /* dependency index */ | |
615 | const struct ia64_dependency *dependency; /* actual dependency */ | |
616 | unsigned specific:1, /* is this a specific bit/regno? */ | |
617 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
618 | int index; /* specific regno/bit within dependency */ | |
619 | int note; /* optional qualifying note (0 if none) */ | |
620 | #define STATE_NONE 0 | |
621 | #define STATE_STOP 1 | |
622 | #define STATE_SRLZ 2 | |
623 | int insn_srlz; /* current insn serialization state */ | |
624 | int data_srlz; /* current data serialization state */ | |
625 | int qp_regno; /* qualifying predicate for this usage */ | |
626 | char *file; /* what file marked this dependency */ | |
2434f565 | 627 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 628 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 629 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
630 | int path; /* corresponding code entry index */ |
631 | } *regdeps = NULL; | |
632 | static int regdepslen = 0; | |
633 | static int regdepstotlen = 0; | |
634 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
635 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 636 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 637 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
638 | |
639 | /* Current state of PR mutexation */ | |
640 | static struct qpmutex { | |
641 | valueT prmask; | |
642 | int path; | |
643 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
644 | static int qp_mutexeslen = 0; | |
645 | static int qp_mutexestotlen = 0; | |
197865e8 | 646 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
647 | |
648 | /* Current state of PR implications */ | |
649 | static struct qp_imply { | |
650 | unsigned p1:6; | |
651 | unsigned p2:6; | |
652 | unsigned p2_branched:1; | |
653 | int path; | |
654 | } *qp_implies = NULL; | |
655 | static int qp_implieslen = 0; | |
656 | static int qp_impliestotlen = 0; | |
657 | ||
197865e8 KH |
658 | /* Keep track of static GR values so that indirect register usage can |
659 | sometimes be tracked. */ | |
800eeca4 JW |
660 | static struct gr { |
661 | unsigned known:1; | |
662 | int path; | |
663 | valueT value; | |
a66d2bb7 JB |
664 | } gr_values[128] = { |
665 | { | |
666 | 1, | |
667 | #ifdef INT_MAX | |
668 | INT_MAX, | |
669 | #else | |
670 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
671 | #endif | |
672 | 0 | |
673 | } | |
674 | }; | |
800eeca4 | 675 | |
9545c4ce L |
676 | /* Remember the alignment frag. */ |
677 | static fragS *align_frag; | |
678 | ||
800eeca4 JW |
679 | /* These are the routines required to output the various types of |
680 | unwind records. */ | |
681 | ||
f5a30c2e JW |
682 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
683 | frag address here so that if there is a section switch in the middle of | |
684 | a function, then instructions emitted to a different section are not | |
685 | counted. Since there may be more than one frag for a function, this | |
686 | means we also need to keep track of which frag this address belongs to | |
687 | so we can compute inter-frag distances. This also nicely solves the | |
688 | problem with nops emitted for align directives, which can't easily be | |
689 | counted, but can easily be derived from frag sizes. */ | |
690 | ||
800eeca4 JW |
691 | typedef struct unw_rec_list { |
692 | unwind_record r; | |
e0c9811a | 693 | unsigned long slot_number; |
f5a30c2e | 694 | fragS *slot_frag; |
73f20958 L |
695 | unsigned long next_slot_number; |
696 | fragS *next_slot_frag; | |
800eeca4 JW |
697 | struct unw_rec_list *next; |
698 | } unw_rec_list; | |
699 | ||
2434f565 | 700 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 701 | |
6290819d NC |
702 | /* Linked list of saved prologue counts. A very poor |
703 | implementation of a map from label numbers to prologue counts. */ | |
704 | typedef struct label_prologue_count | |
705 | { | |
706 | struct label_prologue_count *next; | |
707 | unsigned long label_number; | |
708 | unsigned int prologue_count; | |
709 | } label_prologue_count; | |
710 | ||
e0c9811a JW |
711 | static struct |
712 | { | |
e0c9811a JW |
713 | /* Maintain a list of unwind entries for the current function. */ |
714 | unw_rec_list *list; | |
715 | unw_rec_list *tail; | |
800eeca4 | 716 | |
e0c9811a JW |
717 | /* Any unwind entires that should be attached to the current slot |
718 | that an insn is being constructed for. */ | |
719 | unw_rec_list *current_entry; | |
800eeca4 | 720 | |
e0c9811a JW |
721 | /* These are used to create the unwind table entry for this function. */ |
722 | symbolS *proc_start; | |
e0c9811a JW |
723 | symbolS *info; /* pointer to unwind info */ |
724 | symbolS *personality_routine; | |
91a2ae2a RH |
725 | segT saved_text_seg; |
726 | subsegT saved_text_subseg; | |
727 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 728 | |
e0c9811a | 729 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
730 | unsigned int prologue : 1; |
731 | unsigned int prologue_mask : 4; | |
732 | unsigned int body : 1; | |
733 | unsigned int insn : 1; | |
33d01f33 | 734 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
735 | /* Prologue counts at previous .label_state directives. */ |
736 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 737 | } unwind; |
800eeca4 | 738 | |
9f9a069e JW |
739 | /* The input value is a negated offset from psp, and specifies an address |
740 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
741 | must add 16 and divide by 4 to get the encoded value. */ | |
742 | ||
743 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
744 | ||
800eeca4 JW |
745 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
746 | ||
0234cb7c | 747 | /* Forward declarations: */ |
800eeca4 JW |
748 | static void set_section PARAMS ((char *name)); |
749 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
750 | unsigned int, unsigned int)); | |
d9201763 | 751 | static void dot_align (int); |
800eeca4 JW |
752 | static void dot_radix PARAMS ((int)); |
753 | static void dot_special_section PARAMS ((int)); | |
754 | static void dot_proc PARAMS ((int)); | |
755 | static void dot_fframe PARAMS ((int)); | |
756 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
757 | static void dot_vframesp PARAMS ((int)); |
758 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
759 | static void dot_save PARAMS ((int)); |
760 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
761 | static void dot_restorereg PARAMS ((int)); |
762 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
763 | static void dot_handlerdata PARAMS ((int)); |
764 | static void dot_unwentry PARAMS ((int)); | |
765 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 766 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
767 | static void dot_saveg PARAMS ((int)); |
768 | static void dot_savef PARAMS ((int)); | |
769 | static void dot_saveb PARAMS ((int)); | |
770 | static void dot_savegf PARAMS ((int)); | |
771 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
772 | static void dot_spillreg PARAMS ((int)); |
773 | static void dot_spillmem PARAMS ((int)); | |
774 | static void dot_spillreg_p PARAMS ((int)); | |
775 | static void dot_spillmem_p PARAMS ((int)); | |
776 | static void dot_label_state PARAMS ((int)); | |
777 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
778 | static void dot_unwabi PARAMS ((int)); |
779 | static void dot_personality PARAMS ((int)); | |
780 | static void dot_body PARAMS ((int)); | |
781 | static void dot_prologue PARAMS ((int)); | |
782 | static void dot_endp PARAMS ((int)); | |
783 | static void dot_template PARAMS ((int)); | |
784 | static void dot_regstk PARAMS ((int)); | |
785 | static void dot_rot PARAMS ((int)); | |
786 | static void dot_byteorder PARAMS ((int)); | |
787 | static void dot_psr PARAMS ((int)); | |
788 | static void dot_alias PARAMS ((int)); | |
789 | static void dot_ln PARAMS ((int)); | |
ef6a2b41 | 790 | static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua)); |
800eeca4 JW |
791 | static void dot_xdata PARAMS ((int)); |
792 | static void stmt_float_cons PARAMS ((int)); | |
793 | static void stmt_cons_ua PARAMS ((int)); | |
794 | static void dot_xfloat_cons PARAMS ((int)); | |
795 | static void dot_xstringer PARAMS ((int)); | |
796 | static void dot_xdata_ua PARAMS ((int)); | |
797 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 798 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
799 | static void dot_pred_rel PARAMS ((int)); |
800 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 801 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
802 | static void dot_dv_mode PARAMS ((int)); |
803 | static void dot_entry PARAMS ((int)); | |
804 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 805 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 806 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
807 | static void declare_register_set PARAMS ((const char *, int, int)); |
808 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
809 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
810 | int index, | |
811 | expressionS *e)); | |
800eeca4 JW |
812 | static int parse_operand PARAMS ((expressionS *e)); |
813 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
814 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); | |
815 | static void emit_one_bundle PARAMS ((void)); | |
816 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 817 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
818 | bfd_reloc_code_real_type r_type)); |
819 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
820 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
821 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
822 | static void add_qp_mutex PARAMS((valueT mask)); |
823 | static void add_qp_imply PARAMS((int p1, int p2)); | |
824 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
825 | static void clear_qp_mutex PARAMS((valueT mask)); | |
826 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 827 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
828 | static void clear_register_values PARAMS ((void)); |
829 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
830 | static void instruction_serialization PARAMS ((void)); |
831 | static void data_serialization PARAMS ((void)); | |
832 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 833 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 834 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 835 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
836 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
837 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
838 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
839 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
840 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
841 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
842 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
843 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
844 | static int qp_mutex PARAMS ((int, int, int)); |
845 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
846 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
847 | static void count_output PARAMS ((int, char *, char *)); | |
848 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
849 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 850 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
851 | static void output_P1_format PARAMS ((vbyte_func, int)); |
852 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
853 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
854 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
855 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
856 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
857 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
858 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
859 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
860 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
861 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
862 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
863 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
864 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
865 | static char format_ab_reg PARAMS ((int, int)); |
866 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
867 | unsigned long)); | |
868 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
869 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
870 | unsigned long)); | |
871 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 872 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
873 | static unw_rec_list *output_prologue PARAMS ((void)); |
874 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
875 | static unw_rec_list *output_body PARAMS ((void)); | |
876 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
877 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
878 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
879 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
881 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
882 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
883 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
884 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
885 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
886 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
887 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
888 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
889 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
890 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
891 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
892 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
893 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
894 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
895 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
896 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
897 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
898 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
899 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
900 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
901 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
902 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
903 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
904 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
905 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
906 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
907 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
908 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
909 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
910 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
911 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
912 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
913 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
914 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
915 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
916 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
917 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
918 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
919 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
920 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
921 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
922 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
923 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
924 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
925 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
926 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
927 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
928 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
929 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
930 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
931 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
932 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
933 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
934 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
935 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
936 | unsigned int)); | |
937 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
938 | unsigned int)); | |
939 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
940 | unsigned int)); | |
941 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
942 | unsigned int, unsigned int)); | |
943 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
944 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
945 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
946 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 947 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
948 | unsigned long, fragS *, |
949 | int)); | |
91a2ae2a | 950 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 951 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
150f24a2 JW |
952 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
953 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
6290819d NC |
954 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
955 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
956 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 957 | |
652ca075 | 958 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
959 | unit (as opposed to the memory unit). */ |
960 | static int | |
652ca075 | 961 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
962 | { |
963 | reg -= REG_AR; | |
652ca075 L |
964 | return reg >= 64 && reg <= 111; |
965 | } | |
800eeca4 | 966 | |
652ca075 L |
967 | /* Determine if application register REGNUM resides only in the memory |
968 | unit (as opposed to the integer unit). */ | |
969 | static int | |
970 | ar_is_only_in_memory_unit (int reg) | |
971 | { | |
972 | reg -= REG_AR; | |
973 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
974 | } |
975 | ||
976 | /* Switch to section NAME and create section if necessary. It's | |
977 | rather ugly that we have to manipulate input_line_pointer but I | |
978 | don't see any other way to accomplish the same thing without | |
979 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
980 | static void | |
981 | set_section (name) | |
982 | char *name; | |
983 | { | |
984 | char *saved_input_line_pointer; | |
985 | ||
986 | saved_input_line_pointer = input_line_pointer; | |
987 | input_line_pointer = name; | |
988 | obj_elf_section (0); | |
989 | input_line_pointer = saved_input_line_pointer; | |
990 | } | |
991 | ||
d61a78a7 RH |
992 | /* Map 's' to SHF_IA_64_SHORT. */ |
993 | ||
994 | int | |
995 | ia64_elf_section_letter (letter, ptr_msg) | |
996 | int letter; | |
997 | char **ptr_msg; | |
998 | { | |
999 | if (letter == 's') | |
1000 | return SHF_IA_64_SHORT; | |
711ef82f L |
1001 | else if (letter == 'o') |
1002 | return SHF_LINK_ORDER; | |
d61a78a7 | 1003 | |
711ef82f L |
1004 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
1005 | return -1; | |
d61a78a7 RH |
1006 | } |
1007 | ||
800eeca4 JW |
1008 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
1009 | ||
1010 | flagword | |
1011 | ia64_elf_section_flags (flags, attr, type) | |
1012 | flagword flags; | |
2434f565 | 1013 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
1014 | { |
1015 | if (attr & SHF_IA_64_SHORT) | |
1016 | flags |= SEC_SMALL_DATA; | |
1017 | return flags; | |
1018 | } | |
1019 | ||
91a2ae2a RH |
1020 | int |
1021 | ia64_elf_section_type (str, len) | |
40449e9f KH |
1022 | const char *str; |
1023 | size_t len; | |
91a2ae2a | 1024 | { |
1cd8ff38 | 1025 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1026 | |
1cd8ff38 | 1027 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1028 | return SHT_PROGBITS; |
1029 | ||
1cd8ff38 | 1030 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1031 | return SHT_PROGBITS; |
1032 | ||
1cd8ff38 | 1033 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1034 | return SHT_IA_64_UNWIND; |
1035 | ||
1cd8ff38 | 1036 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1037 | return SHT_IA_64_UNWIND; |
1038 | ||
711ef82f L |
1039 | if (STREQ ("unwind")) |
1040 | return SHT_IA_64_UNWIND; | |
1041 | ||
91a2ae2a | 1042 | return -1; |
1cd8ff38 | 1043 | #undef STREQ |
91a2ae2a RH |
1044 | } |
1045 | ||
800eeca4 JW |
1046 | static unsigned int |
1047 | set_regstack (ins, locs, outs, rots) | |
1048 | unsigned int ins, locs, outs, rots; | |
1049 | { | |
542d6675 KH |
1050 | /* Size of frame. */ |
1051 | unsigned int sof; | |
800eeca4 JW |
1052 | |
1053 | sof = ins + locs + outs; | |
1054 | if (sof > 96) | |
1055 | { | |
1056 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1057 | return 0; | |
1058 | } | |
1059 | if (rots > sof) | |
1060 | { | |
1061 | as_warn ("Size of rotating registers exceeds frame size"); | |
1062 | return 0; | |
1063 | } | |
1064 | md.in.base = REG_GR + 32; | |
1065 | md.loc.base = md.in.base + ins; | |
1066 | md.out.base = md.loc.base + locs; | |
1067 | ||
1068 | md.in.num_regs = ins; | |
1069 | md.loc.num_regs = locs; | |
1070 | md.out.num_regs = outs; | |
1071 | md.rot.num_regs = rots; | |
1072 | return sof; | |
1073 | } | |
1074 | ||
1075 | void | |
1076 | ia64_flush_insns () | |
1077 | { | |
1078 | struct label_fix *lfix; | |
1079 | segT saved_seg; | |
1080 | subsegT saved_subseg; | |
b44b1b85 | 1081 | unw_rec_list *ptr; |
800eeca4 JW |
1082 | |
1083 | if (!md.last_text_seg) | |
1084 | return; | |
1085 | ||
1086 | saved_seg = now_seg; | |
1087 | saved_subseg = now_subseg; | |
1088 | ||
1089 | subseg_set (md.last_text_seg, 0); | |
1090 | ||
1091 | while (md.num_slots_in_use > 0) | |
1092 | emit_one_bundle (); /* force out queued instructions */ | |
1093 | ||
1094 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1095 | those now: */ |
800eeca4 JW |
1096 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1097 | { | |
1098 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1099 | symbol_set_frag (lfix->sym, frag_now); | |
1100 | } | |
1101 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1102 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1103 | { | |
1104 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1105 | symbol_set_frag (lfix->sym, frag_now); | |
1106 | } | |
1107 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1108 | |
b44b1b85 | 1109 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1110 | resolve those now. We only handle prologue, body, and endp directives |
1111 | here. Give an error for others. */ | |
b44b1b85 JW |
1112 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1113 | { | |
9c59842f | 1114 | switch (ptr->r.type) |
b44b1b85 | 1115 | { |
9c59842f JW |
1116 | case prologue: |
1117 | case prologue_gr: | |
1118 | case body: | |
1119 | case endp: | |
b44b1b85 JW |
1120 | ptr->slot_number = (unsigned long) frag_more (0); |
1121 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1122 | break; |
1123 | ||
1124 | /* Allow any record which doesn't have a "t" field (i.e., | |
1125 | doesn't relate to a particular instruction). */ | |
1126 | case unwabi: | |
1127 | case br_gr: | |
1128 | case copy_state: | |
1129 | case fr_mem: | |
1130 | case frgr_mem: | |
1131 | case gr_gr: | |
1132 | case gr_mem: | |
1133 | case label_state: | |
1134 | case rp_br: | |
1135 | case spill_base: | |
1136 | case spill_mask: | |
1137 | /* nothing */ | |
1138 | break; | |
1139 | ||
1140 | default: | |
1141 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1142 | break; | |
b44b1b85 | 1143 | } |
b44b1b85 JW |
1144 | } |
1145 | unwind.current_entry = NULL; | |
1146 | ||
800eeca4 | 1147 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1148 | |
1149 | if (md.qp.X_op == O_register) | |
1150 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1151 | } |
1152 | ||
d9201763 L |
1153 | static void |
1154 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1155 | { |
1156 | char *saved_input_line_pointer = input_line_pointer; | |
1157 | ||
1158 | input_line_pointer = ""; | |
1159 | s_align_bytes (nbytes); | |
1160 | input_line_pointer = saved_input_line_pointer; | |
1161 | } | |
1162 | ||
1163 | void | |
1164 | ia64_cons_align (nbytes) | |
1165 | int nbytes; | |
1166 | { | |
1167 | if (md.auto_align) | |
1168 | { | |
1169 | char *saved_input_line_pointer = input_line_pointer; | |
1170 | input_line_pointer = ""; | |
1171 | s_align_bytes (nbytes); | |
1172 | input_line_pointer = saved_input_line_pointer; | |
1173 | } | |
1174 | } | |
1175 | ||
1176 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1177 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1178 | |
197865e8 | 1179 | void |
800eeca4 JW |
1180 | output_vbyte_mem (count, ptr, comment) |
1181 | int count; | |
1182 | char *ptr; | |
2434f565 | 1183 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1184 | { |
1185 | int x; | |
1186 | if (vbyte_mem_ptr == NULL) | |
1187 | abort (); | |
1188 | ||
1189 | if (count == 0) | |
1190 | return; | |
1191 | for (x = 0; x < count; x++) | |
1192 | *(vbyte_mem_ptr++) = ptr[x]; | |
1193 | } | |
1194 | ||
1195 | /* Count the number of bytes required for records. */ | |
1196 | static int vbyte_count = 0; | |
197865e8 | 1197 | void |
800eeca4 JW |
1198 | count_output (count, ptr, comment) |
1199 | int count; | |
2434f565 JW |
1200 | char *ptr ATTRIBUTE_UNUSED; |
1201 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1202 | { |
1203 | vbyte_count += count; | |
1204 | } | |
1205 | ||
1206 | static void | |
1207 | output_R1_format (f, rtype, rlen) | |
1208 | vbyte_func f; | |
1209 | unw_record_type rtype; | |
1210 | int rlen; | |
1211 | { | |
e0c9811a | 1212 | int r = 0; |
800eeca4 JW |
1213 | char byte; |
1214 | if (rlen > 0x1f) | |
1215 | { | |
1216 | output_R3_format (f, rtype, rlen); | |
1217 | return; | |
1218 | } | |
197865e8 | 1219 | |
e0c9811a JW |
1220 | if (rtype == body) |
1221 | r = 1; | |
1222 | else if (rtype != prologue) | |
1223 | as_bad ("record type is not valid"); | |
1224 | ||
800eeca4 JW |
1225 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1226 | (*f) (1, &byte, NULL); | |
1227 | } | |
1228 | ||
1229 | static void | |
1230 | output_R2_format (f, mask, grsave, rlen) | |
1231 | vbyte_func f; | |
1232 | int mask, grsave; | |
1233 | unsigned long rlen; | |
1234 | { | |
1235 | char bytes[20]; | |
1236 | int count = 2; | |
1237 | mask = (mask & 0x0f); | |
1238 | grsave = (grsave & 0x7f); | |
1239 | ||
1240 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1241 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1242 | count += output_leb128 (bytes + 2, rlen, 0); | |
1243 | (*f) (count, bytes, NULL); | |
1244 | } | |
1245 | ||
1246 | static void | |
1247 | output_R3_format (f, rtype, rlen) | |
1248 | vbyte_func f; | |
1249 | unw_record_type rtype; | |
1250 | unsigned long rlen; | |
1251 | { | |
e0c9811a | 1252 | int r = 0, count; |
800eeca4 JW |
1253 | char bytes[20]; |
1254 | if (rlen <= 0x1f) | |
1255 | { | |
1256 | output_R1_format (f, rtype, rlen); | |
1257 | return; | |
1258 | } | |
197865e8 | 1259 | |
e0c9811a JW |
1260 | if (rtype == body) |
1261 | r = 1; | |
1262 | else if (rtype != prologue) | |
1263 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1264 | bytes[0] = (UNW_R3 | r); |
1265 | count = output_leb128 (bytes + 1, rlen, 0); | |
1266 | (*f) (count + 1, bytes, NULL); | |
1267 | } | |
1268 | ||
1269 | static void | |
1270 | output_P1_format (f, brmask) | |
1271 | vbyte_func f; | |
1272 | int brmask; | |
1273 | { | |
1274 | char byte; | |
1275 | byte = UNW_P1 | (brmask & 0x1f); | |
1276 | (*f) (1, &byte, NULL); | |
1277 | } | |
1278 | ||
1279 | static void | |
1280 | output_P2_format (f, brmask, gr) | |
1281 | vbyte_func f; | |
1282 | int brmask; | |
1283 | int gr; | |
1284 | { | |
1285 | char bytes[2]; | |
1286 | brmask = (brmask & 0x1f); | |
1287 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1288 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1289 | (*f) (2, bytes, NULL); | |
1290 | } | |
1291 | ||
1292 | static void | |
1293 | output_P3_format (f, rtype, reg) | |
1294 | vbyte_func f; | |
1295 | unw_record_type rtype; | |
1296 | int reg; | |
1297 | { | |
1298 | char bytes[2]; | |
e0c9811a | 1299 | int r = 0; |
800eeca4 JW |
1300 | reg = (reg & 0x7f); |
1301 | switch (rtype) | |
542d6675 | 1302 | { |
800eeca4 JW |
1303 | case psp_gr: |
1304 | r = 0; | |
1305 | break; | |
1306 | case rp_gr: | |
1307 | r = 1; | |
1308 | break; | |
1309 | case pfs_gr: | |
1310 | r = 2; | |
1311 | break; | |
1312 | case preds_gr: | |
1313 | r = 3; | |
1314 | break; | |
1315 | case unat_gr: | |
1316 | r = 4; | |
1317 | break; | |
1318 | case lc_gr: | |
1319 | r = 5; | |
1320 | break; | |
1321 | case rp_br: | |
1322 | r = 6; | |
1323 | break; | |
1324 | case rnat_gr: | |
1325 | r = 7; | |
1326 | break; | |
1327 | case bsp_gr: | |
1328 | r = 8; | |
1329 | break; | |
1330 | case bspstore_gr: | |
1331 | r = 9; | |
1332 | break; | |
1333 | case fpsr_gr: | |
1334 | r = 10; | |
1335 | break; | |
1336 | case priunat_gr: | |
1337 | r = 11; | |
1338 | break; | |
1339 | default: | |
1340 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1341 | } |
800eeca4 JW |
1342 | bytes[0] = (UNW_P3 | (r >> 1)); |
1343 | bytes[1] = (((r & 1) << 7) | reg); | |
1344 | (*f) (2, bytes, NULL); | |
1345 | } | |
1346 | ||
800eeca4 | 1347 | static void |
e0c9811a | 1348 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1349 | vbyte_func f; |
e0c9811a JW |
1350 | unsigned char *imask; |
1351 | unsigned long imask_size; | |
800eeca4 | 1352 | { |
e0c9811a | 1353 | imask[0] = UNW_P4; |
2132e3a3 | 1354 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1355 | } |
1356 | ||
1357 | static void | |
1358 | output_P5_format (f, grmask, frmask) | |
1359 | vbyte_func f; | |
1360 | int grmask; | |
1361 | unsigned long frmask; | |
1362 | { | |
1363 | char bytes[4]; | |
1364 | grmask = (grmask & 0x0f); | |
1365 | ||
1366 | bytes[0] = UNW_P5; | |
1367 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1368 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1369 | bytes[3] = (frmask & 0x000000ff); | |
1370 | (*f) (4, bytes, NULL); | |
1371 | } | |
1372 | ||
1373 | static void | |
1374 | output_P6_format (f, rtype, rmask) | |
1375 | vbyte_func f; | |
1376 | unw_record_type rtype; | |
1377 | int rmask; | |
1378 | { | |
1379 | char byte; | |
e0c9811a | 1380 | int r = 0; |
197865e8 | 1381 | |
e0c9811a JW |
1382 | if (rtype == gr_mem) |
1383 | r = 1; | |
1384 | else if (rtype != fr_mem) | |
1385 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1386 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1387 | (*f) (1, &byte, NULL); | |
1388 | } | |
1389 | ||
1390 | static void | |
1391 | output_P7_format (f, rtype, w1, w2) | |
1392 | vbyte_func f; | |
1393 | unw_record_type rtype; | |
1394 | unsigned long w1; | |
1395 | unsigned long w2; | |
1396 | { | |
1397 | char bytes[20]; | |
1398 | int count = 1; | |
e0c9811a | 1399 | int r = 0; |
800eeca4 JW |
1400 | count += output_leb128 (bytes + 1, w1, 0); |
1401 | switch (rtype) | |
1402 | { | |
542d6675 KH |
1403 | case mem_stack_f: |
1404 | r = 0; | |
1405 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1406 | break; | |
1407 | case mem_stack_v: | |
1408 | r = 1; | |
1409 | break; | |
1410 | case spill_base: | |
1411 | r = 2; | |
1412 | break; | |
1413 | case psp_sprel: | |
1414 | r = 3; | |
1415 | break; | |
1416 | case rp_when: | |
1417 | r = 4; | |
1418 | break; | |
1419 | case rp_psprel: | |
1420 | r = 5; | |
1421 | break; | |
1422 | case pfs_when: | |
1423 | r = 6; | |
1424 | break; | |
1425 | case pfs_psprel: | |
1426 | r = 7; | |
1427 | break; | |
1428 | case preds_when: | |
1429 | r = 8; | |
1430 | break; | |
1431 | case preds_psprel: | |
1432 | r = 9; | |
1433 | break; | |
1434 | case lc_when: | |
1435 | r = 10; | |
1436 | break; | |
1437 | case lc_psprel: | |
1438 | r = 11; | |
1439 | break; | |
1440 | case unat_when: | |
1441 | r = 12; | |
1442 | break; | |
1443 | case unat_psprel: | |
1444 | r = 13; | |
1445 | break; | |
1446 | case fpsr_when: | |
1447 | r = 14; | |
1448 | break; | |
1449 | case fpsr_psprel: | |
1450 | r = 15; | |
1451 | break; | |
1452 | default: | |
1453 | break; | |
800eeca4 JW |
1454 | } |
1455 | bytes[0] = (UNW_P7 | r); | |
1456 | (*f) (count, bytes, NULL); | |
1457 | } | |
1458 | ||
1459 | static void | |
1460 | output_P8_format (f, rtype, t) | |
1461 | vbyte_func f; | |
1462 | unw_record_type rtype; | |
1463 | unsigned long t; | |
1464 | { | |
1465 | char bytes[20]; | |
e0c9811a | 1466 | int r = 0; |
800eeca4 JW |
1467 | int count = 2; |
1468 | bytes[0] = UNW_P8; | |
1469 | switch (rtype) | |
1470 | { | |
542d6675 KH |
1471 | case rp_sprel: |
1472 | r = 1; | |
1473 | break; | |
1474 | case pfs_sprel: | |
1475 | r = 2; | |
1476 | break; | |
1477 | case preds_sprel: | |
1478 | r = 3; | |
1479 | break; | |
1480 | case lc_sprel: | |
1481 | r = 4; | |
1482 | break; | |
1483 | case unat_sprel: | |
1484 | r = 5; | |
1485 | break; | |
1486 | case fpsr_sprel: | |
1487 | r = 6; | |
1488 | break; | |
1489 | case bsp_when: | |
1490 | r = 7; | |
1491 | break; | |
1492 | case bsp_psprel: | |
1493 | r = 8; | |
1494 | break; | |
1495 | case bsp_sprel: | |
1496 | r = 9; | |
1497 | break; | |
1498 | case bspstore_when: | |
1499 | r = 10; | |
1500 | break; | |
1501 | case bspstore_psprel: | |
1502 | r = 11; | |
1503 | break; | |
1504 | case bspstore_sprel: | |
1505 | r = 12; | |
1506 | break; | |
1507 | case rnat_when: | |
1508 | r = 13; | |
1509 | break; | |
1510 | case rnat_psprel: | |
1511 | r = 14; | |
1512 | break; | |
1513 | case rnat_sprel: | |
1514 | r = 15; | |
1515 | break; | |
1516 | case priunat_when_gr: | |
1517 | r = 16; | |
1518 | break; | |
1519 | case priunat_psprel: | |
1520 | r = 17; | |
1521 | break; | |
1522 | case priunat_sprel: | |
1523 | r = 18; | |
1524 | break; | |
1525 | case priunat_when_mem: | |
1526 | r = 19; | |
1527 | break; | |
1528 | default: | |
1529 | break; | |
800eeca4 JW |
1530 | } |
1531 | bytes[1] = r; | |
1532 | count += output_leb128 (bytes + 2, t, 0); | |
1533 | (*f) (count, bytes, NULL); | |
1534 | } | |
1535 | ||
1536 | static void | |
1537 | output_P9_format (f, grmask, gr) | |
1538 | vbyte_func f; | |
1539 | int grmask; | |
1540 | int gr; | |
1541 | { | |
1542 | char bytes[3]; | |
1543 | bytes[0] = UNW_P9; | |
1544 | bytes[1] = (grmask & 0x0f); | |
1545 | bytes[2] = (gr & 0x7f); | |
1546 | (*f) (3, bytes, NULL); | |
1547 | } | |
1548 | ||
1549 | static void | |
1550 | output_P10_format (f, abi, context) | |
1551 | vbyte_func f; | |
1552 | int abi; | |
1553 | int context; | |
1554 | { | |
1555 | char bytes[3]; | |
1556 | bytes[0] = UNW_P10; | |
1557 | bytes[1] = (abi & 0xff); | |
1558 | bytes[2] = (context & 0xff); | |
1559 | (*f) (3, bytes, NULL); | |
1560 | } | |
1561 | ||
1562 | static void | |
1563 | output_B1_format (f, rtype, label) | |
1564 | vbyte_func f; | |
1565 | unw_record_type rtype; | |
1566 | unsigned long label; | |
1567 | { | |
1568 | char byte; | |
e0c9811a | 1569 | int r = 0; |
197865e8 | 1570 | if (label > 0x1f) |
800eeca4 JW |
1571 | { |
1572 | output_B4_format (f, rtype, label); | |
1573 | return; | |
1574 | } | |
e0c9811a JW |
1575 | if (rtype == copy_state) |
1576 | r = 1; | |
1577 | else if (rtype != label_state) | |
1578 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1579 | |
1580 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1581 | (*f) (1, &byte, NULL); | |
1582 | } | |
1583 | ||
1584 | static void | |
1585 | output_B2_format (f, ecount, t) | |
1586 | vbyte_func f; | |
1587 | unsigned long ecount; | |
1588 | unsigned long t; | |
1589 | { | |
1590 | char bytes[20]; | |
1591 | int count = 1; | |
1592 | if (ecount > 0x1f) | |
1593 | { | |
1594 | output_B3_format (f, ecount, t); | |
1595 | return; | |
1596 | } | |
1597 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1598 | count += output_leb128 (bytes + 1, t, 0); | |
1599 | (*f) (count, bytes, NULL); | |
1600 | } | |
1601 | ||
1602 | static void | |
1603 | output_B3_format (f, ecount, t) | |
1604 | vbyte_func f; | |
1605 | unsigned long ecount; | |
1606 | unsigned long t; | |
1607 | { | |
1608 | char bytes[20]; | |
1609 | int count = 1; | |
1610 | if (ecount <= 0x1f) | |
1611 | { | |
1612 | output_B2_format (f, ecount, t); | |
1613 | return; | |
1614 | } | |
1615 | bytes[0] = UNW_B3; | |
1616 | count += output_leb128 (bytes + 1, t, 0); | |
1617 | count += output_leb128 (bytes + count, ecount, 0); | |
1618 | (*f) (count, bytes, NULL); | |
1619 | } | |
1620 | ||
1621 | static void | |
1622 | output_B4_format (f, rtype, label) | |
1623 | vbyte_func f; | |
1624 | unw_record_type rtype; | |
1625 | unsigned long label; | |
1626 | { | |
1627 | char bytes[20]; | |
e0c9811a | 1628 | int r = 0; |
800eeca4 | 1629 | int count = 1; |
197865e8 | 1630 | if (label <= 0x1f) |
800eeca4 JW |
1631 | { |
1632 | output_B1_format (f, rtype, label); | |
1633 | return; | |
1634 | } | |
197865e8 | 1635 | |
e0c9811a JW |
1636 | if (rtype == copy_state) |
1637 | r = 1; | |
1638 | else if (rtype != label_state) | |
1639 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1640 | |
1641 | bytes[0] = (UNW_B4 | (r << 3)); | |
1642 | count += output_leb128 (bytes + 1, label, 0); | |
1643 | (*f) (count, bytes, NULL); | |
1644 | } | |
1645 | ||
1646 | static char | |
e0c9811a | 1647 | format_ab_reg (ab, reg) |
542d6675 KH |
1648 | int ab; |
1649 | int reg; | |
800eeca4 JW |
1650 | { |
1651 | int ret; | |
e0c9811a | 1652 | ab = (ab & 3); |
800eeca4 | 1653 | reg = (reg & 0x1f); |
e0c9811a | 1654 | ret = (ab << 5) | reg; |
800eeca4 JW |
1655 | return ret; |
1656 | } | |
1657 | ||
1658 | static void | |
e0c9811a | 1659 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1660 | vbyte_func f; |
1661 | unw_record_type rtype; | |
e0c9811a | 1662 | int ab, reg; |
800eeca4 JW |
1663 | unsigned long t; |
1664 | unsigned long w1; | |
1665 | { | |
1666 | char bytes[20]; | |
e0c9811a | 1667 | int r = 0; |
800eeca4 JW |
1668 | int count = 2; |
1669 | bytes[0] = UNW_X1; | |
197865e8 | 1670 | |
e0c9811a JW |
1671 | if (rtype == spill_sprel) |
1672 | r = 1; | |
1673 | else if (rtype != spill_psprel) | |
1674 | as_bad ("Invalid record type for format X1"); | |
1675 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1676 | count += output_leb128 (bytes + 2, t, 0); |
1677 | count += output_leb128 (bytes + count, w1, 0); | |
1678 | (*f) (count, bytes, NULL); | |
1679 | } | |
1680 | ||
1681 | static void | |
e0c9811a | 1682 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1683 | vbyte_func f; |
e0c9811a | 1684 | int ab, reg; |
800eeca4 JW |
1685 | int x, y, treg; |
1686 | unsigned long t; | |
1687 | { | |
1688 | char bytes[20]; | |
800eeca4 JW |
1689 | int count = 3; |
1690 | bytes[0] = UNW_X2; | |
e0c9811a | 1691 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1692 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1693 | count += output_leb128 (bytes + 3, t, 0); | |
1694 | (*f) (count, bytes, NULL); | |
1695 | } | |
1696 | ||
1697 | static void | |
e0c9811a | 1698 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1699 | vbyte_func f; |
1700 | unw_record_type rtype; | |
1701 | int qp; | |
e0c9811a | 1702 | int ab, reg; |
800eeca4 JW |
1703 | unsigned long t; |
1704 | unsigned long w1; | |
1705 | { | |
1706 | char bytes[20]; | |
e0c9811a | 1707 | int r = 0; |
800eeca4 | 1708 | int count = 3; |
e0c9811a JW |
1709 | bytes[0] = UNW_X3; |
1710 | ||
1711 | if (rtype == spill_sprel_p) | |
1712 | r = 1; | |
1713 | else if (rtype != spill_psprel_p) | |
1714 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1715 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1716 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1717 | count += output_leb128 (bytes + 3, t, 0); |
1718 | count += output_leb128 (bytes + count, w1, 0); | |
1719 | (*f) (count, bytes, NULL); | |
1720 | } | |
1721 | ||
1722 | static void | |
e0c9811a | 1723 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1724 | vbyte_func f; |
1725 | int qp; | |
e0c9811a | 1726 | int ab, reg; |
800eeca4 JW |
1727 | int x, y, treg; |
1728 | unsigned long t; | |
1729 | { | |
1730 | char bytes[20]; | |
800eeca4 | 1731 | int count = 4; |
e0c9811a | 1732 | bytes[0] = UNW_X4; |
800eeca4 | 1733 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1734 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1735 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1736 | count += output_leb128 (bytes + 4, t, 0); | |
1737 | (*f) (count, bytes, NULL); | |
1738 | } | |
1739 | ||
1740 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1741 | |
800eeca4 | 1742 | static unw_rec_list * |
197865e8 | 1743 | alloc_record (unw_record_type t) |
800eeca4 JW |
1744 | { |
1745 | unw_rec_list *ptr; | |
1746 | ptr = xmalloc (sizeof (*ptr)); | |
1747 | ptr->next = NULL; | |
1748 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1749 | ptr->r.type = t; | |
73f20958 L |
1750 | ptr->next_slot_number = 0; |
1751 | ptr->next_slot_frag = 0; | |
800eeca4 JW |
1752 | return ptr; |
1753 | } | |
1754 | ||
5738bc24 JW |
1755 | /* Dummy unwind record used for calculating the length of the last prologue or |
1756 | body region. */ | |
1757 | ||
1758 | static unw_rec_list * | |
1759 | output_endp () | |
1760 | { | |
1761 | unw_rec_list *ptr = alloc_record (endp); | |
1762 | return ptr; | |
1763 | } | |
1764 | ||
800eeca4 JW |
1765 | static unw_rec_list * |
1766 | output_prologue () | |
1767 | { | |
1768 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1769 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1770 | return ptr; |
1771 | } | |
1772 | ||
1773 | static unw_rec_list * | |
1774 | output_prologue_gr (saved_mask, reg) | |
1775 | unsigned int saved_mask; | |
1776 | unsigned int reg; | |
1777 | { | |
1778 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1779 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1780 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1781 | ptr->r.record.r.grsave = reg; |
1782 | return ptr; | |
1783 | } | |
1784 | ||
1785 | static unw_rec_list * | |
1786 | output_body () | |
1787 | { | |
1788 | unw_rec_list *ptr = alloc_record (body); | |
1789 | return ptr; | |
1790 | } | |
1791 | ||
1792 | static unw_rec_list * | |
1793 | output_mem_stack_f (size) | |
1794 | unsigned int size; | |
1795 | { | |
1796 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1797 | ptr->r.record.p.size = size; | |
1798 | return ptr; | |
1799 | } | |
1800 | ||
1801 | static unw_rec_list * | |
1802 | output_mem_stack_v () | |
1803 | { | |
1804 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1805 | return ptr; | |
1806 | } | |
1807 | ||
1808 | static unw_rec_list * | |
1809 | output_psp_gr (gr) | |
1810 | unsigned int gr; | |
1811 | { | |
1812 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1813 | ptr->r.record.p.gr = gr; | |
1814 | return ptr; | |
1815 | } | |
1816 | ||
1817 | static unw_rec_list * | |
1818 | output_psp_sprel (offset) | |
1819 | unsigned int offset; | |
1820 | { | |
1821 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1822 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1823 | return ptr; |
1824 | } | |
1825 | ||
1826 | static unw_rec_list * | |
1827 | output_rp_when () | |
1828 | { | |
1829 | unw_rec_list *ptr = alloc_record (rp_when); | |
1830 | return ptr; | |
1831 | } | |
1832 | ||
1833 | static unw_rec_list * | |
1834 | output_rp_gr (gr) | |
1835 | unsigned int gr; | |
1836 | { | |
1837 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1838 | ptr->r.record.p.gr = gr; | |
1839 | return ptr; | |
1840 | } | |
1841 | ||
1842 | static unw_rec_list * | |
1843 | output_rp_br (br) | |
1844 | unsigned int br; | |
1845 | { | |
1846 | unw_rec_list *ptr = alloc_record (rp_br); | |
1847 | ptr->r.record.p.br = br; | |
1848 | return ptr; | |
1849 | } | |
1850 | ||
1851 | static unw_rec_list * | |
1852 | output_rp_psprel (offset) | |
1853 | unsigned int offset; | |
1854 | { | |
1855 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
9f9a069e | 1856 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1857 | return ptr; |
1858 | } | |
1859 | ||
1860 | static unw_rec_list * | |
1861 | output_rp_sprel (offset) | |
1862 | unsigned int offset; | |
1863 | { | |
1864 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1865 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1866 | return ptr; |
1867 | } | |
1868 | ||
1869 | static unw_rec_list * | |
1870 | output_pfs_when () | |
1871 | { | |
1872 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1873 | return ptr; | |
1874 | } | |
1875 | ||
1876 | static unw_rec_list * | |
1877 | output_pfs_gr (gr) | |
1878 | unsigned int gr; | |
1879 | { | |
1880 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1881 | ptr->r.record.p.gr = gr; | |
1882 | return ptr; | |
1883 | } | |
1884 | ||
1885 | static unw_rec_list * | |
1886 | output_pfs_psprel (offset) | |
1887 | unsigned int offset; | |
1888 | { | |
1889 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
9f9a069e | 1890 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1891 | return ptr; |
1892 | } | |
1893 | ||
1894 | static unw_rec_list * | |
1895 | output_pfs_sprel (offset) | |
1896 | unsigned int offset; | |
1897 | { | |
1898 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1899 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1900 | return ptr; |
1901 | } | |
1902 | ||
1903 | static unw_rec_list * | |
1904 | output_preds_when () | |
1905 | { | |
1906 | unw_rec_list *ptr = alloc_record (preds_when); | |
1907 | return ptr; | |
1908 | } | |
1909 | ||
1910 | static unw_rec_list * | |
1911 | output_preds_gr (gr) | |
1912 | unsigned int gr; | |
1913 | { | |
1914 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1915 | ptr->r.record.p.gr = gr; | |
1916 | return ptr; | |
1917 | } | |
1918 | ||
1919 | static unw_rec_list * | |
1920 | output_preds_psprel (offset) | |
1921 | unsigned int offset; | |
1922 | { | |
1923 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
9f9a069e | 1924 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1925 | return ptr; |
1926 | } | |
1927 | ||
1928 | static unw_rec_list * | |
1929 | output_preds_sprel (offset) | |
1930 | unsigned int offset; | |
1931 | { | |
1932 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1933 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1934 | return ptr; |
1935 | } | |
1936 | ||
1937 | static unw_rec_list * | |
1938 | output_fr_mem (mask) | |
1939 | unsigned int mask; | |
1940 | { | |
1941 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1942 | ptr->r.record.p.rmask = mask; | |
1943 | return ptr; | |
1944 | } | |
1945 | ||
1946 | static unw_rec_list * | |
1947 | output_frgr_mem (gr_mask, fr_mask) | |
1948 | unsigned int gr_mask; | |
1949 | unsigned int fr_mask; | |
1950 | { | |
1951 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1952 | ptr->r.record.p.grmask = gr_mask; | |
1953 | ptr->r.record.p.frmask = fr_mask; | |
1954 | return ptr; | |
1955 | } | |
1956 | ||
1957 | static unw_rec_list * | |
1958 | output_gr_gr (mask, reg) | |
1959 | unsigned int mask; | |
1960 | unsigned int reg; | |
1961 | { | |
1962 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1963 | ptr->r.record.p.grmask = mask; | |
1964 | ptr->r.record.p.gr = reg; | |
1965 | return ptr; | |
1966 | } | |
1967 | ||
1968 | static unw_rec_list * | |
1969 | output_gr_mem (mask) | |
1970 | unsigned int mask; | |
1971 | { | |
1972 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1973 | ptr->r.record.p.rmask = mask; | |
1974 | return ptr; | |
1975 | } | |
1976 | ||
1977 | static unw_rec_list * | |
1978 | output_br_mem (unsigned int mask) | |
1979 | { | |
1980 | unw_rec_list *ptr = alloc_record (br_mem); | |
1981 | ptr->r.record.p.brmask = mask; | |
1982 | return ptr; | |
1983 | } | |
1984 | ||
1985 | static unw_rec_list * | |
1986 | output_br_gr (save_mask, reg) | |
1987 | unsigned int save_mask; | |
1988 | unsigned int reg; | |
1989 | { | |
1990 | unw_rec_list *ptr = alloc_record (br_gr); | |
1991 | ptr->r.record.p.brmask = save_mask; | |
1992 | ptr->r.record.p.gr = reg; | |
1993 | return ptr; | |
1994 | } | |
1995 | ||
1996 | static unw_rec_list * | |
1997 | output_spill_base (offset) | |
1998 | unsigned int offset; | |
1999 | { | |
2000 | unw_rec_list *ptr = alloc_record (spill_base); | |
9f9a069e | 2001 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2002 | return ptr; |
2003 | } | |
2004 | ||
2005 | static unw_rec_list * | |
2006 | output_unat_when () | |
2007 | { | |
2008 | unw_rec_list *ptr = alloc_record (unat_when); | |
2009 | return ptr; | |
2010 | } | |
2011 | ||
2012 | static unw_rec_list * | |
2013 | output_unat_gr (gr) | |
2014 | unsigned int gr; | |
2015 | { | |
2016 | unw_rec_list *ptr = alloc_record (unat_gr); | |
2017 | ptr->r.record.p.gr = gr; | |
2018 | return ptr; | |
2019 | } | |
2020 | ||
2021 | static unw_rec_list * | |
2022 | output_unat_psprel (offset) | |
2023 | unsigned int offset; | |
2024 | { | |
2025 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
9f9a069e | 2026 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2027 | return ptr; |
2028 | } | |
2029 | ||
2030 | static unw_rec_list * | |
2031 | output_unat_sprel (offset) | |
2032 | unsigned int offset; | |
2033 | { | |
2034 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 2035 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2036 | return ptr; |
2037 | } | |
2038 | ||
2039 | static unw_rec_list * | |
2040 | output_lc_when () | |
2041 | { | |
2042 | unw_rec_list *ptr = alloc_record (lc_when); | |
2043 | return ptr; | |
2044 | } | |
2045 | ||
2046 | static unw_rec_list * | |
2047 | output_lc_gr (gr) | |
2048 | unsigned int gr; | |
2049 | { | |
2050 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2051 | ptr->r.record.p.gr = gr; | |
2052 | return ptr; | |
2053 | } | |
2054 | ||
2055 | static unw_rec_list * | |
2056 | output_lc_psprel (offset) | |
2057 | unsigned int offset; | |
2058 | { | |
2059 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
9f9a069e | 2060 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2061 | return ptr; |
2062 | } | |
2063 | ||
2064 | static unw_rec_list * | |
2065 | output_lc_sprel (offset) | |
2066 | unsigned int offset; | |
2067 | { | |
2068 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2069 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2070 | return ptr; |
2071 | } | |
2072 | ||
2073 | static unw_rec_list * | |
2074 | output_fpsr_when () | |
2075 | { | |
2076 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2077 | return ptr; | |
2078 | } | |
2079 | ||
2080 | static unw_rec_list * | |
2081 | output_fpsr_gr (gr) | |
2082 | unsigned int gr; | |
2083 | { | |
2084 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2085 | ptr->r.record.p.gr = gr; | |
2086 | return ptr; | |
2087 | } | |
2088 | ||
2089 | static unw_rec_list * | |
2090 | output_fpsr_psprel (offset) | |
2091 | unsigned int offset; | |
2092 | { | |
2093 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
9f9a069e | 2094 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2095 | return ptr; |
2096 | } | |
2097 | ||
2098 | static unw_rec_list * | |
2099 | output_fpsr_sprel (offset) | |
2100 | unsigned int offset; | |
2101 | { | |
2102 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2103 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2104 | return ptr; |
2105 | } | |
2106 | ||
2107 | static unw_rec_list * | |
2108 | output_priunat_when_gr () | |
2109 | { | |
2110 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2111 | return ptr; | |
2112 | } | |
2113 | ||
2114 | static unw_rec_list * | |
2115 | output_priunat_when_mem () | |
2116 | { | |
2117 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2118 | return ptr; | |
2119 | } | |
2120 | ||
2121 | static unw_rec_list * | |
2122 | output_priunat_gr (gr) | |
2123 | unsigned int gr; | |
2124 | { | |
2125 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2126 | ptr->r.record.p.gr = gr; | |
2127 | return ptr; | |
2128 | } | |
2129 | ||
2130 | static unw_rec_list * | |
2131 | output_priunat_psprel (offset) | |
2132 | unsigned int offset; | |
2133 | { | |
2134 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
9f9a069e | 2135 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2136 | return ptr; |
2137 | } | |
2138 | ||
2139 | static unw_rec_list * | |
2140 | output_priunat_sprel (offset) | |
2141 | unsigned int offset; | |
2142 | { | |
2143 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2144 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2145 | return ptr; |
2146 | } | |
2147 | ||
2148 | static unw_rec_list * | |
2149 | output_bsp_when () | |
2150 | { | |
2151 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2152 | return ptr; | |
2153 | } | |
2154 | ||
2155 | static unw_rec_list * | |
2156 | output_bsp_gr (gr) | |
2157 | unsigned int gr; | |
2158 | { | |
2159 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2160 | ptr->r.record.p.gr = gr; | |
2161 | return ptr; | |
2162 | } | |
2163 | ||
2164 | static unw_rec_list * | |
2165 | output_bsp_psprel (offset) | |
2166 | unsigned int offset; | |
2167 | { | |
2168 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
9f9a069e | 2169 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2170 | return ptr; |
2171 | } | |
2172 | ||
2173 | static unw_rec_list * | |
2174 | output_bsp_sprel (offset) | |
2175 | unsigned int offset; | |
2176 | { | |
2177 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2178 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2179 | return ptr; |
2180 | } | |
2181 | ||
2182 | static unw_rec_list * | |
2183 | output_bspstore_when () | |
2184 | { | |
2185 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2186 | return ptr; | |
2187 | } | |
2188 | ||
2189 | static unw_rec_list * | |
2190 | output_bspstore_gr (gr) | |
2191 | unsigned int gr; | |
2192 | { | |
2193 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2194 | ptr->r.record.p.gr = gr; | |
2195 | return ptr; | |
2196 | } | |
2197 | ||
2198 | static unw_rec_list * | |
2199 | output_bspstore_psprel (offset) | |
2200 | unsigned int offset; | |
2201 | { | |
2202 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
9f9a069e | 2203 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2204 | return ptr; |
2205 | } | |
2206 | ||
2207 | static unw_rec_list * | |
2208 | output_bspstore_sprel (offset) | |
2209 | unsigned int offset; | |
2210 | { | |
2211 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2212 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2213 | return ptr; |
2214 | } | |
2215 | ||
2216 | static unw_rec_list * | |
2217 | output_rnat_when () | |
2218 | { | |
2219 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2220 | return ptr; | |
2221 | } | |
2222 | ||
2223 | static unw_rec_list * | |
2224 | output_rnat_gr (gr) | |
2225 | unsigned int gr; | |
2226 | { | |
2227 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2228 | ptr->r.record.p.gr = gr; | |
2229 | return ptr; | |
2230 | } | |
2231 | ||
2232 | static unw_rec_list * | |
2233 | output_rnat_psprel (offset) | |
2234 | unsigned int offset; | |
2235 | { | |
2236 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
9f9a069e | 2237 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2238 | return ptr; |
2239 | } | |
2240 | ||
2241 | static unw_rec_list * | |
2242 | output_rnat_sprel (offset) | |
2243 | unsigned int offset; | |
2244 | { | |
2245 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2246 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2247 | return ptr; |
2248 | } | |
2249 | ||
2250 | static unw_rec_list * | |
e0c9811a JW |
2251 | output_unwabi (abi, context) |
2252 | unsigned long abi; | |
2253 | unsigned long context; | |
800eeca4 | 2254 | { |
e0c9811a JW |
2255 | unw_rec_list *ptr = alloc_record (unwabi); |
2256 | ptr->r.record.p.abi = abi; | |
2257 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2258 | return ptr; |
2259 | } | |
2260 | ||
2261 | static unw_rec_list * | |
e0c9811a | 2262 | output_epilogue (unsigned long ecount) |
800eeca4 | 2263 | { |
e0c9811a JW |
2264 | unw_rec_list *ptr = alloc_record (epilogue); |
2265 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2266 | return ptr; |
2267 | } | |
2268 | ||
2269 | static unw_rec_list * | |
e0c9811a | 2270 | output_label_state (unsigned long label) |
800eeca4 | 2271 | { |
e0c9811a JW |
2272 | unw_rec_list *ptr = alloc_record (label_state); |
2273 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2274 | return ptr; |
2275 | } | |
2276 | ||
2277 | static unw_rec_list * | |
e0c9811a JW |
2278 | output_copy_state (unsigned long label) |
2279 | { | |
2280 | unw_rec_list *ptr = alloc_record (copy_state); | |
2281 | ptr->r.record.b.label = label; | |
2282 | return ptr; | |
2283 | } | |
2284 | ||
2285 | static unw_rec_list * | |
2286 | output_spill_psprel (ab, reg, offset) | |
2287 | unsigned int ab; | |
800eeca4 JW |
2288 | unsigned int reg; |
2289 | unsigned int offset; | |
2290 | { | |
2291 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2292 | ptr->r.record.x.ab = ab; |
800eeca4 | 2293 | ptr->r.record.x.reg = reg; |
9f9a069e | 2294 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2295 | return ptr; |
2296 | } | |
2297 | ||
2298 | static unw_rec_list * | |
e0c9811a JW |
2299 | output_spill_sprel (ab, reg, offset) |
2300 | unsigned int ab; | |
800eeca4 JW |
2301 | unsigned int reg; |
2302 | unsigned int offset; | |
2303 | { | |
2304 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2305 | ptr->r.record.x.ab = ab; |
800eeca4 | 2306 | ptr->r.record.x.reg = reg; |
542d6675 | 2307 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2308 | return ptr; |
2309 | } | |
2310 | ||
2311 | static unw_rec_list * | |
e0c9811a JW |
2312 | output_spill_psprel_p (ab, reg, offset, predicate) |
2313 | unsigned int ab; | |
800eeca4 JW |
2314 | unsigned int reg; |
2315 | unsigned int offset; | |
2316 | unsigned int predicate; | |
2317 | { | |
2318 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2319 | ptr->r.record.x.ab = ab; |
800eeca4 | 2320 | ptr->r.record.x.reg = reg; |
9f9a069e | 2321 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2322 | ptr->r.record.x.qp = predicate; |
2323 | return ptr; | |
2324 | } | |
2325 | ||
2326 | static unw_rec_list * | |
e0c9811a JW |
2327 | output_spill_sprel_p (ab, reg, offset, predicate) |
2328 | unsigned int ab; | |
800eeca4 JW |
2329 | unsigned int reg; |
2330 | unsigned int offset; | |
2331 | unsigned int predicate; | |
2332 | { | |
2333 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2334 | ptr->r.record.x.ab = ab; |
800eeca4 | 2335 | ptr->r.record.x.reg = reg; |
542d6675 | 2336 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2337 | ptr->r.record.x.qp = predicate; |
2338 | return ptr; | |
2339 | } | |
2340 | ||
2341 | static unw_rec_list * | |
e0c9811a JW |
2342 | output_spill_reg (ab, reg, targ_reg, xy) |
2343 | unsigned int ab; | |
800eeca4 JW |
2344 | unsigned int reg; |
2345 | unsigned int targ_reg; | |
2346 | unsigned int xy; | |
2347 | { | |
2348 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2349 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2350 | ptr->r.record.x.reg = reg; |
2351 | ptr->r.record.x.treg = targ_reg; | |
2352 | ptr->r.record.x.xy = xy; | |
2353 | return ptr; | |
2354 | } | |
2355 | ||
2356 | static unw_rec_list * | |
e0c9811a JW |
2357 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2358 | unsigned int ab; | |
800eeca4 JW |
2359 | unsigned int reg; |
2360 | unsigned int targ_reg; | |
2361 | unsigned int xy; | |
2362 | unsigned int predicate; | |
2363 | { | |
2364 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2365 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2366 | ptr->r.record.x.reg = reg; |
2367 | ptr->r.record.x.treg = targ_reg; | |
2368 | ptr->r.record.x.xy = xy; | |
2369 | ptr->r.record.x.qp = predicate; | |
2370 | return ptr; | |
2371 | } | |
2372 | ||
197865e8 | 2373 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2374 | specified function. */ |
542d6675 | 2375 | |
800eeca4 JW |
2376 | static void |
2377 | process_one_record (ptr, f) | |
2378 | unw_rec_list *ptr; | |
2379 | vbyte_func f; | |
2380 | { | |
e0c9811a JW |
2381 | unsigned long fr_mask, gr_mask; |
2382 | ||
197865e8 | 2383 | switch (ptr->r.type) |
800eeca4 | 2384 | { |
5738bc24 JW |
2385 | /* This is a dummy record that takes up no space in the output. */ |
2386 | case endp: | |
2387 | break; | |
2388 | ||
542d6675 KH |
2389 | case gr_mem: |
2390 | case fr_mem: | |
2391 | case br_mem: | |
2392 | case frgr_mem: | |
2393 | /* These are taken care of by prologue/prologue_gr. */ | |
2394 | break; | |
e0c9811a | 2395 | |
542d6675 KH |
2396 | case prologue_gr: |
2397 | case prologue: | |
2398 | if (ptr->r.type == prologue_gr) | |
2399 | output_R2_format (f, ptr->r.record.r.grmask, | |
2400 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2401 | else | |
800eeca4 | 2402 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2403 | |
2404 | /* Output descriptor(s) for union of register spills (if any). */ | |
2405 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2406 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2407 | if (fr_mask) | |
2408 | { | |
2409 | if ((fr_mask & ~0xfUL) == 0) | |
2410 | output_P6_format (f, fr_mem, fr_mask); | |
2411 | else | |
2412 | { | |
2413 | output_P5_format (f, gr_mask, fr_mask); | |
2414 | gr_mask = 0; | |
2415 | } | |
2416 | } | |
2417 | if (gr_mask) | |
2418 | output_P6_format (f, gr_mem, gr_mask); | |
2419 | if (ptr->r.record.r.mask.br_mem) | |
2420 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2421 | ||
2422 | /* output imask descriptor if necessary: */ | |
2423 | if (ptr->r.record.r.mask.i) | |
2424 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2425 | ptr->r.record.r.imask_size); | |
2426 | break; | |
2427 | ||
2428 | case body: | |
2429 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2430 | break; | |
2431 | case mem_stack_f: | |
2432 | case mem_stack_v: | |
2433 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2434 | ptr->r.record.p.size); | |
2435 | break; | |
2436 | case psp_gr: | |
2437 | case rp_gr: | |
2438 | case pfs_gr: | |
2439 | case preds_gr: | |
2440 | case unat_gr: | |
2441 | case lc_gr: | |
2442 | case fpsr_gr: | |
2443 | case priunat_gr: | |
2444 | case bsp_gr: | |
2445 | case bspstore_gr: | |
2446 | case rnat_gr: | |
2447 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2448 | break; | |
2449 | case rp_br: | |
2450 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2451 | break; | |
2452 | case psp_sprel: | |
2453 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2454 | break; | |
2455 | case rp_when: | |
2456 | case pfs_when: | |
2457 | case preds_when: | |
2458 | case unat_when: | |
2459 | case lc_when: | |
2460 | case fpsr_when: | |
2461 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2462 | break; | |
2463 | case rp_psprel: | |
2464 | case pfs_psprel: | |
2465 | case preds_psprel: | |
2466 | case unat_psprel: | |
2467 | case lc_psprel: | |
2468 | case fpsr_psprel: | |
2469 | case spill_base: | |
2470 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2471 | break; | |
2472 | case rp_sprel: | |
2473 | case pfs_sprel: | |
2474 | case preds_sprel: | |
2475 | case unat_sprel: | |
2476 | case lc_sprel: | |
2477 | case fpsr_sprel: | |
2478 | case priunat_sprel: | |
2479 | case bsp_sprel: | |
2480 | case bspstore_sprel: | |
2481 | case rnat_sprel: | |
2482 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2483 | break; | |
2484 | case gr_gr: | |
2485 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2486 | break; | |
2487 | case br_gr: | |
2488 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2489 | break; | |
2490 | case spill_mask: | |
2491 | as_bad ("spill_mask record unimplemented."); | |
2492 | break; | |
2493 | case priunat_when_gr: | |
2494 | case priunat_when_mem: | |
2495 | case bsp_when: | |
2496 | case bspstore_when: | |
2497 | case rnat_when: | |
2498 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2499 | break; | |
2500 | case priunat_psprel: | |
2501 | case bsp_psprel: | |
2502 | case bspstore_psprel: | |
2503 | case rnat_psprel: | |
2504 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2505 | break; | |
2506 | case unwabi: | |
2507 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2508 | break; | |
2509 | case epilogue: | |
2510 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2511 | break; | |
2512 | case label_state: | |
2513 | case copy_state: | |
2514 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2515 | break; | |
2516 | case spill_psprel: | |
2517 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2518 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2519 | ptr->r.record.x.pspoff); | |
2520 | break; | |
2521 | case spill_sprel: | |
2522 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2523 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2524 | ptr->r.record.x.spoff); | |
2525 | break; | |
2526 | case spill_reg: | |
2527 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2528 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2529 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2530 | break; | |
2531 | case spill_psprel_p: | |
2532 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2533 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2534 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2535 | break; | |
2536 | case spill_sprel_p: | |
2537 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2538 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2539 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2540 | break; | |
2541 | case spill_reg_p: | |
2542 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2543 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2544 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2545 | ptr->r.record.x.t); | |
2546 | break; | |
2547 | default: | |
2548 | as_bad ("record_type_not_valid"); | |
2549 | break; | |
800eeca4 JW |
2550 | } |
2551 | } | |
2552 | ||
197865e8 | 2553 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2554 | the specified function. */ |
2555 | static void | |
2556 | process_unw_records (list, f) | |
2557 | unw_rec_list *list; | |
2558 | vbyte_func f; | |
2559 | { | |
2560 | unw_rec_list *ptr; | |
2561 | for (ptr = list; ptr; ptr = ptr->next) | |
2562 | process_one_record (ptr, f); | |
2563 | } | |
2564 | ||
2565 | /* Determine the size of a record list in bytes. */ | |
2566 | static int | |
2567 | calc_record_size (list) | |
2568 | unw_rec_list *list; | |
2569 | { | |
2570 | vbyte_count = 0; | |
2571 | process_unw_records (list, count_output); | |
2572 | return vbyte_count; | |
2573 | } | |
2574 | ||
e0c9811a JW |
2575 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2576 | of type TYPE are saved starting at instruction with index T. If N | |
2577 | bits are set in REGMASK, it is assumed that instructions T through | |
2578 | T+N-1 save these registers. | |
2579 | ||
2580 | TYPE values: | |
2581 | 0: no save | |
2582 | 1: instruction saves next fp reg | |
2583 | 2: instruction saves next general reg | |
2584 | 3: instruction saves next branch reg */ | |
2585 | static void | |
2586 | set_imask (region, regmask, t, type) | |
2587 | unw_rec_list *region; | |
2588 | unsigned long regmask; | |
2589 | unsigned long t; | |
2590 | unsigned int type; | |
2591 | { | |
2592 | unsigned char *imask; | |
2593 | unsigned long imask_size; | |
2594 | unsigned int i; | |
2595 | int pos; | |
2596 | ||
2597 | imask = region->r.record.r.mask.i; | |
2598 | imask_size = region->r.record.r.imask_size; | |
2599 | if (!imask) | |
2600 | { | |
542d6675 | 2601 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2602 | imask = xmalloc (imask_size); |
2603 | memset (imask, 0, imask_size); | |
2604 | ||
2605 | region->r.record.r.imask_size = imask_size; | |
2606 | region->r.record.r.mask.i = imask; | |
2607 | } | |
2608 | ||
542d6675 KH |
2609 | i = (t / 4) + 1; |
2610 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2611 | while (regmask) |
2612 | { | |
2613 | if (i >= imask_size) | |
2614 | { | |
2615 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2616 | return; | |
2617 | } | |
2618 | ||
2619 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2620 | |
e0c9811a JW |
2621 | regmask &= (regmask - 1); |
2622 | pos -= 2; | |
2623 | if (pos < 0) | |
2624 | { | |
2625 | pos = 0; | |
2626 | ++i; | |
2627 | } | |
2628 | } | |
2629 | } | |
2630 | ||
f5a30c2e JW |
2631 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2632 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2633 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2634 | for frag sizes. */ | |
f5a30c2e | 2635 | |
e0c9811a | 2636 | unsigned long |
b5e0fabd | 2637 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2638 | unsigned long slot_addr; |
2639 | fragS *slot_frag; | |
2640 | unsigned long first_addr; | |
2641 | fragS *first_frag; | |
b5e0fabd | 2642 | int before_relax; |
e0c9811a | 2643 | { |
f5a30c2e JW |
2644 | unsigned long index = 0; |
2645 | ||
2646 | /* First time we are called, the initial address and frag are invalid. */ | |
2647 | if (first_addr == 0) | |
2648 | return 0; | |
2649 | ||
2650 | /* If the two addresses are in different frags, then we need to add in | |
2651 | the remaining size of this frag, and then the entire size of intermediate | |
2652 | frags. */ | |
2653 | while (slot_frag != first_frag) | |
2654 | { | |
2655 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2656 | ||
b5e0fabd | 2657 | if (! before_relax) |
73f20958 | 2658 | { |
b5e0fabd JW |
2659 | /* We can get the final addresses only during and after |
2660 | relaxation. */ | |
73f20958 L |
2661 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2662 | index += 3 * ((first_frag->fr_next->fr_address | |
2663 | - first_frag->fr_address | |
2664 | - first_frag->fr_fix) >> 4); | |
2665 | } | |
2666 | else | |
2667 | /* We don't know what the final addresses will be. We try our | |
2668 | best to estimate. */ | |
2669 | switch (first_frag->fr_type) | |
2670 | { | |
2671 | default: | |
2672 | break; | |
2673 | ||
2674 | case rs_space: | |
2675 | as_fatal ("only constant space allocation is supported"); | |
2676 | break; | |
2677 | ||
2678 | case rs_align: | |
2679 | case rs_align_code: | |
2680 | case rs_align_test: | |
2681 | /* Take alignment into account. Assume the worst case | |
2682 | before relaxation. */ | |
2683 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2684 | break; | |
2685 | ||
2686 | case rs_org: | |
2687 | if (first_frag->fr_symbol) | |
2688 | { | |
2689 | as_fatal ("only constant offsets are supported"); | |
2690 | break; | |
2691 | } | |
2692 | case rs_fill: | |
2693 | index += 3 * (first_frag->fr_offset >> 4); | |
2694 | break; | |
2695 | } | |
2696 | ||
f5a30c2e JW |
2697 | /* Add in the full size of the frag converted to instruction slots. */ |
2698 | index += 3 * (first_frag->fr_fix >> 4); | |
2699 | /* Subtract away the initial part before first_addr. */ | |
2700 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2701 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2702 | |
f5a30c2e JW |
2703 | /* Move to the beginning of the next frag. */ |
2704 | first_frag = first_frag->fr_next; | |
2705 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2706 | } | |
2707 | ||
2708 | /* Add in the used part of the last frag. */ | |
2709 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2710 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2711 | return index; | |
2712 | } | |
4a1805b1 | 2713 | |
91a2ae2a RH |
2714 | /* Optimize unwind record directives. */ |
2715 | ||
2716 | static unw_rec_list * | |
2717 | optimize_unw_records (list) | |
2718 | unw_rec_list *list; | |
2719 | { | |
2720 | if (!list) | |
2721 | return NULL; | |
2722 | ||
2723 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2724 | by ".body", then we can optimize the unwind directives away. */ | |
2725 | if (list->r.type == prologue | |
5738bc24 JW |
2726 | && (list->next->r.type == endp |
2727 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2728 | return NULL; |
2729 | ||
2730 | return list; | |
2731 | } | |
2732 | ||
800eeca4 JW |
2733 | /* Given a complete record list, process any records which have |
2734 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2735 | this has been run, all necessary information should be available |
800eeca4 | 2736 | within each record to generate an image. */ |
542d6675 | 2737 | |
800eeca4 | 2738 | static void |
b5e0fabd | 2739 | fixup_unw_records (list, before_relax) |
800eeca4 | 2740 | unw_rec_list *list; |
b5e0fabd | 2741 | int before_relax; |
800eeca4 | 2742 | { |
e0c9811a JW |
2743 | unw_rec_list *ptr, *region = 0; |
2744 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2745 | fragS *first_frag = 0; |
e0c9811a | 2746 | |
800eeca4 JW |
2747 | for (ptr = list; ptr; ptr = ptr->next) |
2748 | { | |
2749 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2750 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2751 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2752 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2753 | switch (ptr->r.type) |
2754 | { | |
542d6675 KH |
2755 | case prologue: |
2756 | case prologue_gr: | |
2757 | case body: | |
2758 | { | |
2759 | unw_rec_list *last; | |
5738bc24 JW |
2760 | int size; |
2761 | unsigned long last_addr = 0; | |
2762 | fragS *last_frag = NULL; | |
542d6675 KH |
2763 | |
2764 | first_addr = ptr->slot_number; | |
f5a30c2e | 2765 | first_frag = ptr->slot_frag; |
542d6675 | 2766 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2767 | the function, and determine the size of the region. */ |
542d6675 KH |
2768 | for (last = ptr->next; last != NULL; last = last->next) |
2769 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2770 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2771 | { |
2772 | last_addr = last->slot_number; | |
f5a30c2e | 2773 | last_frag = last->slot_frag; |
542d6675 KH |
2774 | break; |
2775 | } | |
b5e0fabd JW |
2776 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2777 | before_relax); | |
542d6675 | 2778 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2779 | if (ptr->r.type == body) |
2780 | /* End of region. */ | |
2781 | region = 0; | |
2782 | else | |
2783 | region = ptr; | |
e0c9811a | 2784 | break; |
542d6675 KH |
2785 | } |
2786 | case epilogue: | |
ed7af9f9 L |
2787 | if (t < rlen) |
2788 | ptr->r.record.b.t = rlen - 1 - t; | |
2789 | else | |
2790 | /* This happens when a memory-stack-less procedure uses a | |
2791 | ".restore sp" directive at the end of a region to pop | |
2792 | the frame state. */ | |
2793 | ptr->r.record.b.t = 0; | |
542d6675 | 2794 | break; |
e0c9811a | 2795 | |
542d6675 KH |
2796 | case mem_stack_f: |
2797 | case mem_stack_v: | |
2798 | case rp_when: | |
2799 | case pfs_when: | |
2800 | case preds_when: | |
2801 | case unat_when: | |
2802 | case lc_when: | |
2803 | case fpsr_when: | |
2804 | case priunat_when_gr: | |
2805 | case priunat_when_mem: | |
2806 | case bsp_when: | |
2807 | case bspstore_when: | |
2808 | case rnat_when: | |
2809 | ptr->r.record.p.t = t; | |
2810 | break; | |
e0c9811a | 2811 | |
542d6675 KH |
2812 | case spill_reg: |
2813 | case spill_sprel: | |
2814 | case spill_psprel: | |
2815 | case spill_reg_p: | |
2816 | case spill_sprel_p: | |
2817 | case spill_psprel_p: | |
2818 | ptr->r.record.x.t = t; | |
2819 | break; | |
e0c9811a | 2820 | |
542d6675 KH |
2821 | case frgr_mem: |
2822 | if (!region) | |
2823 | { | |
75e09913 | 2824 | as_bad ("frgr_mem record before region record!"); |
542d6675 KH |
2825 | return; |
2826 | } | |
2827 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2828 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2829 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2830 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2831 | break; | |
2832 | case fr_mem: | |
2833 | if (!region) | |
2834 | { | |
75e09913 | 2835 | as_bad ("fr_mem record before region record!"); |
542d6675 KH |
2836 | return; |
2837 | } | |
2838 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2839 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2840 | break; | |
2841 | case gr_mem: | |
2842 | if (!region) | |
2843 | { | |
75e09913 | 2844 | as_bad ("gr_mem record before region record!"); |
542d6675 KH |
2845 | return; |
2846 | } | |
2847 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2848 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2849 | break; | |
2850 | case br_mem: | |
2851 | if (!region) | |
2852 | { | |
75e09913 | 2853 | as_bad ("br_mem record before region record!"); |
542d6675 KH |
2854 | return; |
2855 | } | |
2856 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2857 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2858 | break; | |
e0c9811a | 2859 | |
542d6675 KH |
2860 | case gr_gr: |
2861 | if (!region) | |
2862 | { | |
75e09913 | 2863 | as_bad ("gr_gr record before region record!"); |
542d6675 KH |
2864 | return; |
2865 | } | |
2866 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2867 | break; | |
2868 | case br_gr: | |
2869 | if (!region) | |
2870 | { | |
75e09913 | 2871 | as_bad ("br_gr record before region record!"); |
542d6675 KH |
2872 | return; |
2873 | } | |
2874 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2875 | break; | |
e0c9811a | 2876 | |
542d6675 KH |
2877 | default: |
2878 | break; | |
800eeca4 JW |
2879 | } |
2880 | } | |
2881 | } | |
2882 | ||
b5e0fabd JW |
2883 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2884 | to handle here, which is the unwind info frag. */ | |
2885 | ||
2886 | int | |
2887 | ia64_estimate_size_before_relax (fragS *frag, | |
2888 | asection *segtype ATTRIBUTE_UNUSED) | |
2889 | { | |
2890 | unw_rec_list *list; | |
2891 | int len, size, pad; | |
2892 | ||
2893 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2894 | list = (unw_rec_list *) frag->fr_opcode; | |
2895 | fixup_unw_records (list, 0); | |
2896 | ||
2897 | len = calc_record_size (list); | |
2898 | /* pad to pointer-size boundary. */ | |
2899 | pad = len % md.pointer_size; | |
2900 | if (pad != 0) | |
2901 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2902 | /* Add 8 for the header. */ |
2903 | size = len + 8; | |
2904 | /* Add a pointer for the personality offset. */ | |
2905 | if (frag->fr_offset) | |
2906 | size += md.pointer_size; | |
b5e0fabd JW |
2907 | |
2908 | /* fr_var carries the max_chars that we created the fragment with. | |
2909 | We must, of course, have allocated enough memory earlier. */ | |
2910 | assert (frag->fr_var >= size); | |
2911 | ||
2912 | return frag->fr_fix + size; | |
2913 | } | |
2914 | ||
73f20958 L |
2915 | /* This function converts a rs_machine_dependent variant frag into a |
2916 | normal fill frag with the unwind image from the the record list. */ | |
2917 | void | |
2918 | ia64_convert_frag (fragS *frag) | |
557debba | 2919 | { |
73f20958 L |
2920 | unw_rec_list *list; |
2921 | int len, size, pad; | |
1cd8ff38 | 2922 | valueT flag_value; |
557debba | 2923 | |
b5e0fabd | 2924 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2925 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2926 | fixup_unw_records (list, 0); |
1cd8ff38 | 2927 | |
73f20958 L |
2928 | len = calc_record_size (list); |
2929 | /* pad to pointer-size boundary. */ | |
2930 | pad = len % md.pointer_size; | |
2931 | if (pad != 0) | |
2932 | len += md.pointer_size - pad; | |
f7e323d5 JB |
2933 | /* Add 8 for the header. */ |
2934 | size = len + 8; | |
2935 | /* Add a pointer for the personality offset. */ | |
2936 | if (frag->fr_offset) | |
2937 | size += md.pointer_size; | |
73f20958 L |
2938 | |
2939 | /* fr_var carries the max_chars that we created the fragment with. | |
2940 | We must, of course, have allocated enough memory earlier. */ | |
2941 | assert (frag->fr_var >= size); | |
2942 | ||
2943 | /* Initialize the header area. fr_offset is initialized with | |
2944 | unwind.personality_routine. */ | |
2945 | if (frag->fr_offset) | |
1cd8ff38 NC |
2946 | { |
2947 | if (md.flags & EF_IA_64_ABI64) | |
2948 | flag_value = (bfd_vma) 3 << 32; | |
2949 | else | |
2950 | /* 32-bit unwind info block. */ | |
2951 | flag_value = (bfd_vma) 0x1003 << 32; | |
2952 | } | |
2953 | else | |
2954 | flag_value = 0; | |
557debba | 2955 | |
73f20958 L |
2956 | md_number_to_chars (frag->fr_literal, |
2957 | (((bfd_vma) 1 << 48) /* Version. */ | |
2958 | | flag_value /* U & E handler flags. */ | |
2959 | | (len / md.pointer_size)), /* Length. */ | |
2960 | 8); | |
557debba | 2961 | |
73f20958 L |
2962 | /* Skip the header. */ |
2963 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2964 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2965 | |
2966 | /* Fill the padding bytes with zeros. */ | |
2967 | if (pad != 0) | |
2968 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2969 | md.pointer_size - pad); | |
2970 | ||
73f20958 L |
2971 | frag->fr_fix += size; |
2972 | frag->fr_type = rs_fill; | |
2973 | frag->fr_var = 0; | |
2974 | frag->fr_offset = 0; | |
800eeca4 JW |
2975 | } |
2976 | ||
e0c9811a JW |
2977 | static int |
2978 | convert_expr_to_ab_reg (e, ab, regp) | |
2979 | expressionS *e; | |
2980 | unsigned int *ab; | |
2981 | unsigned int *regp; | |
2982 | { | |
2983 | unsigned int reg; | |
2984 | ||
2985 | if (e->X_op != O_register) | |
2986 | return 0; | |
2987 | ||
2988 | reg = e->X_add_number; | |
2434f565 | 2989 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2990 | { |
2991 | *ab = 0; | |
2992 | *regp = reg - REG_GR; | |
2993 | } | |
2434f565 JW |
2994 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2995 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2996 | { |
2997 | *ab = 1; | |
2998 | *regp = reg - REG_FR; | |
2999 | } | |
2434f565 | 3000 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3001 | { |
3002 | *ab = 2; | |
3003 | *regp = reg - REG_BR; | |
3004 | } | |
3005 | else | |
3006 | { | |
3007 | *ab = 3; | |
3008 | switch (reg) | |
3009 | { | |
3010 | case REG_PR: *regp = 0; break; | |
3011 | case REG_PSP: *regp = 1; break; | |
3012 | case REG_PRIUNAT: *regp = 2; break; | |
3013 | case REG_BR + 0: *regp = 3; break; | |
3014 | case REG_AR + AR_BSP: *regp = 4; break; | |
3015 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3016 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3017 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3018 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3019 | case REG_AR + AR_PFS: *regp = 9; break; | |
3020 | case REG_AR + AR_LC: *regp = 10; break; | |
3021 | ||
3022 | default: | |
3023 | return 0; | |
3024 | } | |
3025 | } | |
3026 | return 1; | |
197865e8 | 3027 | } |
e0c9811a JW |
3028 | |
3029 | static int | |
3030 | convert_expr_to_xy_reg (e, xy, regp) | |
3031 | expressionS *e; | |
3032 | unsigned int *xy; | |
3033 | unsigned int *regp; | |
3034 | { | |
3035 | unsigned int reg; | |
3036 | ||
3037 | if (e->X_op != O_register) | |
3038 | return 0; | |
3039 | ||
3040 | reg = e->X_add_number; | |
3041 | ||
2434f565 | 3042 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
3043 | { |
3044 | *xy = 0; | |
3045 | *regp = reg - REG_GR; | |
3046 | } | |
2434f565 | 3047 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
3048 | { |
3049 | *xy = 1; | |
3050 | *regp = reg - REG_FR; | |
3051 | } | |
2434f565 | 3052 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3053 | { |
3054 | *xy = 2; | |
3055 | *regp = reg - REG_BR; | |
3056 | } | |
3057 | else | |
3058 | return -1; | |
3059 | return 1; | |
197865e8 | 3060 | } |
e0c9811a | 3061 | |
d9201763 L |
3062 | static void |
3063 | dot_align (int arg) | |
3064 | { | |
3065 | /* The current frag is an alignment frag. */ | |
3066 | align_frag = frag_now; | |
3067 | s_align_bytes (arg); | |
3068 | } | |
3069 | ||
800eeca4 JW |
3070 | static void |
3071 | dot_radix (dummy) | |
2434f565 | 3072 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3073 | { |
3074 | int radix; | |
3075 | ||
3076 | SKIP_WHITESPACE (); | |
3077 | radix = *input_line_pointer++; | |
3078 | ||
3079 | if (radix != 'C' && !is_end_of_line[(unsigned char) radix]) | |
3080 | { | |
3081 | as_bad ("Radix `%c' unsupported", *input_line_pointer); | |
542d6675 | 3082 | ignore_rest_of_line (); |
800eeca4 JW |
3083 | return; |
3084 | } | |
3085 | } | |
3086 | ||
196e8040 JW |
3087 | /* Helper function for .loc directives. If the assembler is not generating |
3088 | line number info, then we need to remember which instructions have a .loc | |
3089 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3090 | ||
3091 | static void | |
3092 | dot_loc (int x) | |
3093 | { | |
3094 | CURR_SLOT.loc_directive_seen = 1; | |
3095 | dwarf2_directive_loc (x); | |
3096 | } | |
3097 | ||
800eeca4 JW |
3098 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3099 | static void | |
3100 | dot_special_section (which) | |
3101 | int which; | |
3102 | { | |
3103 | set_section ((char *) special_section_name[which]); | |
3104 | } | |
3105 | ||
07450571 L |
3106 | /* Return -1 for warning and 0 for error. */ |
3107 | ||
3108 | static int | |
970d6792 L |
3109 | unwind_diagnostic (const char * region, const char *directive) |
3110 | { | |
3111 | if (md.unwind_check == unwind_check_warning) | |
07450571 L |
3112 | { |
3113 | as_warn (".%s outside of %s", directive, region); | |
3114 | return -1; | |
3115 | } | |
970d6792 L |
3116 | else |
3117 | { | |
3118 | as_bad (".%s outside of %s", directive, region); | |
3119 | ignore_rest_of_line (); | |
07450571 | 3120 | return 0; |
970d6792 L |
3121 | } |
3122 | } | |
3123 | ||
07450571 L |
3124 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3125 | a procedure but the unwind directive check is set to warning, 0 if | |
3126 | a directive isn't in a procedure and the unwind directive check is set | |
3127 | to error. */ | |
3128 | ||
75e09913 JB |
3129 | static int |
3130 | in_procedure (const char *directive) | |
3131 | { | |
3132 | if (unwind.proc_start | |
3133 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) | |
3134 | return 1; | |
07450571 | 3135 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3136 | } |
3137 | ||
07450571 L |
3138 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3139 | a prologue but the unwind directive check is set to warning, 0 if | |
3140 | a directive isn't in a prologue and the unwind directive check is set | |
3141 | to error. */ | |
3142 | ||
75e09913 JB |
3143 | static int |
3144 | in_prologue (const char *directive) | |
3145 | { | |
07450571 L |
3146 | int in = in_procedure (directive); |
3147 | if (in) | |
75e09913 | 3148 | { |
970d6792 | 3149 | /* We are in a procedure. Check if we are in a prologue. */ |
75e09913 JB |
3150 | if (unwind.prologue) |
3151 | return 1; | |
07450571 L |
3152 | /* We only want to issue one message. */ |
3153 | if (in == 1) | |
3154 | return unwind_diagnostic ("prologue", directive); | |
3155 | else | |
3156 | return -1; | |
75e09913 JB |
3157 | } |
3158 | return 0; | |
3159 | } | |
3160 | ||
07450571 L |
3161 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3162 | a body but the unwind directive check is set to warning, 0 if | |
3163 | a directive isn't in a body and the unwind directive check is set | |
3164 | to error. */ | |
3165 | ||
75e09913 JB |
3166 | static int |
3167 | in_body (const char *directive) | |
3168 | { | |
07450571 L |
3169 | int in = in_procedure (directive); |
3170 | if (in) | |
75e09913 | 3171 | { |
970d6792 | 3172 | /* We are in a procedure. Check if we are in a body. */ |
75e09913 JB |
3173 | if (unwind.body) |
3174 | return 1; | |
07450571 L |
3175 | /* We only want to issue one message. */ |
3176 | if (in == 1) | |
3177 | return unwind_diagnostic ("body region", directive); | |
3178 | else | |
3179 | return -1; | |
75e09913 JB |
3180 | } |
3181 | return 0; | |
3182 | } | |
3183 | ||
800eeca4 JW |
3184 | static void |
3185 | add_unwind_entry (ptr) | |
3186 | unw_rec_list *ptr; | |
3187 | { | |
e0c9811a JW |
3188 | if (unwind.tail) |
3189 | unwind.tail->next = ptr; | |
800eeca4 | 3190 | else |
e0c9811a JW |
3191 | unwind.list = ptr; |
3192 | unwind.tail = ptr; | |
800eeca4 JW |
3193 | |
3194 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3195 | if (unwind.current_entry == NULL) |
3196 | unwind.current_entry = ptr; | |
800eeca4 JW |
3197 | } |
3198 | ||
197865e8 | 3199 | static void |
800eeca4 | 3200 | dot_fframe (dummy) |
2434f565 | 3201 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3202 | { |
3203 | expressionS e; | |
e0c9811a | 3204 | |
75e09913 JB |
3205 | if (!in_prologue ("fframe")) |
3206 | return; | |
3207 | ||
800eeca4 | 3208 | parse_operand (&e); |
197865e8 | 3209 | |
800eeca4 JW |
3210 | if (e.X_op != O_constant) |
3211 | as_bad ("Operand to .fframe must be a constant"); | |
3212 | else | |
e0c9811a JW |
3213 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3214 | } | |
3215 | ||
197865e8 | 3216 | static void |
e0c9811a | 3217 | dot_vframe (dummy) |
2434f565 | 3218 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3219 | { |
3220 | expressionS e; | |
3221 | unsigned reg; | |
3222 | ||
75e09913 JB |
3223 | if (!in_prologue ("vframe")) |
3224 | return; | |
3225 | ||
e0c9811a JW |
3226 | parse_operand (&e); |
3227 | reg = e.X_add_number - REG_GR; | |
3228 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3229 | { |
e0c9811a | 3230 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3231 | if (! (unwind.prologue_mask & 2)) |
3232 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3233 | } |
e0c9811a JW |
3234 | else |
3235 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3236 | } |
3237 | ||
197865e8 | 3238 | static void |
e0c9811a | 3239 | dot_vframesp (dummy) |
2434f565 | 3240 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3241 | { |
e0c9811a JW |
3242 | expressionS e; |
3243 | ||
75e09913 JB |
3244 | if (!in_prologue ("vframesp")) |
3245 | return; | |
3246 | ||
e0c9811a JW |
3247 | parse_operand (&e); |
3248 | if (e.X_op == O_constant) | |
3249 | { | |
3250 | add_unwind_entry (output_mem_stack_v ()); | |
3251 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3252 | } | |
3253 | else | |
69906a9b | 3254 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3255 | } |
3256 | ||
197865e8 | 3257 | static void |
e0c9811a | 3258 | dot_vframepsp (dummy) |
2434f565 | 3259 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3260 | { |
3261 | expressionS e; | |
3262 | ||
75e09913 JB |
3263 | if (!in_prologue ("vframepsp")) |
3264 | return; | |
3265 | ||
e0c9811a JW |
3266 | parse_operand (&e); |
3267 | if (e.X_op == O_constant) | |
3268 | { | |
3269 | add_unwind_entry (output_mem_stack_v ()); | |
3270 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3271 | } | |
3272 | else | |
69906a9b | 3273 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3274 | } |
3275 | ||
197865e8 | 3276 | static void |
800eeca4 | 3277 | dot_save (dummy) |
2434f565 | 3278 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3279 | { |
3280 | expressionS e1, e2; | |
3281 | int sep; | |
3282 | int reg1, reg2; | |
3283 | ||
75e09913 JB |
3284 | if (!in_prologue ("save")) |
3285 | return; | |
3286 | ||
800eeca4 JW |
3287 | sep = parse_operand (&e1); |
3288 | if (sep != ',') | |
3289 | as_bad ("No second operand to .save"); | |
3290 | sep = parse_operand (&e2); | |
3291 | ||
e0c9811a | 3292 | reg1 = e1.X_add_number; |
800eeca4 | 3293 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3294 | |
800eeca4 | 3295 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3296 | if (e1.X_op == O_register) |
800eeca4 | 3297 | { |
542d6675 | 3298 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3299 | { |
3300 | switch (reg1) | |
3301 | { | |
542d6675 KH |
3302 | case REG_AR + AR_BSP: |
3303 | add_unwind_entry (output_bsp_when ()); | |
3304 | add_unwind_entry (output_bsp_gr (reg2)); | |
3305 | break; | |
3306 | case REG_AR + AR_BSPSTORE: | |
3307 | add_unwind_entry (output_bspstore_when ()); | |
3308 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3309 | break; | |
3310 | case REG_AR + AR_RNAT: | |
3311 | add_unwind_entry (output_rnat_when ()); | |
3312 | add_unwind_entry (output_rnat_gr (reg2)); | |
3313 | break; | |
3314 | case REG_AR + AR_UNAT: | |
3315 | add_unwind_entry (output_unat_when ()); | |
3316 | add_unwind_entry (output_unat_gr (reg2)); | |
3317 | break; | |
3318 | case REG_AR + AR_FPSR: | |
3319 | add_unwind_entry (output_fpsr_when ()); | |
3320 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3321 | break; | |
3322 | case REG_AR + AR_PFS: | |
3323 | add_unwind_entry (output_pfs_when ()); | |
3324 | if (! (unwind.prologue_mask & 4)) | |
3325 | add_unwind_entry (output_pfs_gr (reg2)); | |
3326 | break; | |
3327 | case REG_AR + AR_LC: | |
3328 | add_unwind_entry (output_lc_when ()); | |
3329 | add_unwind_entry (output_lc_gr (reg2)); | |
3330 | break; | |
3331 | case REG_BR: | |
3332 | add_unwind_entry (output_rp_when ()); | |
3333 | if (! (unwind.prologue_mask & 8)) | |
3334 | add_unwind_entry (output_rp_gr (reg2)); | |
3335 | break; | |
3336 | case REG_PR: | |
3337 | add_unwind_entry (output_preds_when ()); | |
3338 | if (! (unwind.prologue_mask & 1)) | |
3339 | add_unwind_entry (output_preds_gr (reg2)); | |
3340 | break; | |
3341 | case REG_PRIUNAT: | |
3342 | add_unwind_entry (output_priunat_when_gr ()); | |
3343 | add_unwind_entry (output_priunat_gr (reg2)); | |
3344 | break; | |
3345 | default: | |
3346 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3347 | } |
3348 | } | |
3349 | else | |
3350 | as_bad (" Second operand not a valid register"); | |
3351 | } | |
3352 | else | |
e0c9811a | 3353 | as_bad ("First operand not a register"); |
800eeca4 JW |
3354 | } |
3355 | ||
197865e8 | 3356 | static void |
800eeca4 | 3357 | dot_restore (dummy) |
2434f565 | 3358 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3359 | { |
e0c9811a | 3360 | expressionS e1, e2; |
33d01f33 | 3361 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3362 | int sep; |
3363 | ||
75e09913 JB |
3364 | if (!in_body ("restore")) |
3365 | return; | |
3366 | ||
e0c9811a JW |
3367 | sep = parse_operand (&e1); |
3368 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3369 | { | |
3370 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3371 | return; | |
3372 | } | |
3373 | ||
3374 | if (sep == ',') | |
3375 | { | |
3376 | parse_operand (&e2); | |
33d01f33 | 3377 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3378 | { |
33d01f33 | 3379 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3380 | return; |
3381 | } | |
33d01f33 | 3382 | ecount = e2.X_add_number; |
e0c9811a | 3383 | } |
33d01f33 JW |
3384 | else |
3385 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3386 | |
3387 | if (ecount >= unwind.prologue_count) | |
3388 | { | |
3389 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3390 | ecount + 1, unwind.prologue_count); | |
3391 | return; | |
3392 | } | |
3393 | ||
e0c9811a | 3394 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3395 | |
3396 | if (ecount < unwind.prologue_count) | |
3397 | unwind.prologue_count -= ecount + 1; | |
3398 | else | |
3399 | unwind.prologue_count = 0; | |
e0c9811a JW |
3400 | } |
3401 | ||
197865e8 | 3402 | static void |
e0c9811a | 3403 | dot_restorereg (dummy) |
2434f565 | 3404 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3405 | { |
3406 | unsigned int ab, reg; | |
3407 | expressionS e; | |
3408 | ||
75e09913 JB |
3409 | if (!in_procedure ("restorereg")) |
3410 | return; | |
3411 | ||
e0c9811a JW |
3412 | parse_operand (&e); |
3413 | ||
3414 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3415 | { | |
3416 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3417 | return; | |
3418 | } | |
3419 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3420 | } | |
3421 | ||
197865e8 | 3422 | static void |
e0c9811a | 3423 | dot_restorereg_p (dummy) |
2434f565 | 3424 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3425 | { |
3426 | unsigned int qp, ab, reg; | |
3427 | expressionS e1, e2; | |
3428 | int sep; | |
3429 | ||
75e09913 JB |
3430 | if (!in_procedure ("restorereg.p")) |
3431 | return; | |
3432 | ||
e0c9811a JW |
3433 | sep = parse_operand (&e1); |
3434 | if (sep != ',') | |
3435 | { | |
3436 | as_bad ("No second operand to .restorereg.p"); | |
3437 | return; | |
3438 | } | |
3439 | ||
3440 | parse_operand (&e2); | |
3441 | ||
3442 | qp = e1.X_add_number - REG_P; | |
3443 | if (e1.X_op != O_register || qp > 63) | |
3444 | { | |
3445 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3446 | return; | |
3447 | } | |
3448 | ||
3449 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3450 | { | |
3451 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3452 | return; | |
3453 | } | |
3454 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3455 | } |
3456 | ||
2d6ed997 L |
3457 | static char *special_linkonce_name[] = |
3458 | { | |
3459 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3460 | }; | |
3461 | ||
3462 | static void | |
d6afba4b | 3463 | start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty) |
2d6ed997 L |
3464 | { |
3465 | /* | |
3466 | Use a slightly ugly scheme to derive the unwind section names from | |
3467 | the text section name: | |
3468 | ||
3469 | text sect. unwind table sect. | |
3470 | name: name: comments: | |
3471 | ---------- ----------------- -------------------------------- | |
3472 | .text .IA_64.unwind | |
3473 | .text.foo .IA_64.unwind.text.foo | |
3474 | .foo .IA_64.unwind.foo | |
3475 | .gnu.linkonce.t.foo | |
3476 | .gnu.linkonce.ia64unw.foo | |
3477 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3478 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3479 | ||
3480 | This mapping is done so that: | |
3481 | ||
3482 | (a) An object file with unwind info only in .text will use | |
3483 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3484 | This follows the letter of the ABI and also ensures backwards | |
3485 | compatibility with older toolchains. | |
3486 | ||
3487 | (b) An object file with unwind info in multiple text sections | |
3488 | will use separate unwind sections for each text section. | |
3489 | This allows us to properly set the "sh_info" and "sh_link" | |
3490 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3491 | lets GNU ld support programs with multiple segments | |
3492 | containing unwind info (as might be the case for certain | |
3493 | embedded applications). | |
3494 | ||
3495 | (c) An error is issued if there would be a name clash. | |
3496 | */ | |
3497 | ||
3498 | const char *text_name, *sec_text_name; | |
3499 | char *sec_name; | |
3500 | const char *prefix = special_section_name [sec_index]; | |
3501 | const char *suffix; | |
3502 | size_t prefix_len, suffix_len, sec_name_len; | |
3503 | ||
3504 | sec_text_name = segment_name (text_seg); | |
3505 | text_name = sec_text_name; | |
3506 | if (strncmp (text_name, "_info", 5) == 0) | |
3507 | { | |
3508 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3509 | text_name); | |
3510 | ignore_rest_of_line (); | |
3511 | return; | |
3512 | } | |
3513 | if (strcmp (text_name, ".text") == 0) | |
3514 | text_name = ""; | |
3515 | ||
3516 | /* Build the unwind section name by appending the (possibly stripped) | |
3517 | text section name to the unwind prefix. */ | |
3518 | suffix = text_name; | |
3519 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3520 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3521 | { | |
3522 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3523 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3524 | } | |
d6afba4b JJ |
3525 | else if (linkonce_empty) |
3526 | return; | |
2d6ed997 L |
3527 | |
3528 | prefix_len = strlen (prefix); | |
3529 | suffix_len = strlen (suffix); | |
3530 | sec_name_len = prefix_len + suffix_len; | |
3531 | sec_name = alloca (sec_name_len + 1); | |
3532 | memcpy (sec_name, prefix, prefix_len); | |
3533 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3534 | sec_name [sec_name_len] = '\0'; | |
3535 | ||
3536 | /* Handle COMDAT group. */ | |
3537 | if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0) | |
3538 | { | |
3539 | char *section; | |
3540 | size_t len, group_name_len; | |
3541 | const char *group_name = elf_group_name (text_seg); | |
3542 | ||
3543 | if (group_name == NULL) | |
3544 | { | |
3545 | as_bad ("Group section `%s' has no group signature", | |
3546 | sec_text_name); | |
3547 | ignore_rest_of_line (); | |
3548 | return; | |
3549 | } | |
3550 | /* We have to construct a fake section directive. */ | |
3551 | group_name_len = strlen (group_name); | |
3552 | len = (sec_name_len | |
3553 | + 16 /* ,"aG",@progbits, */ | |
3554 | + group_name_len /* ,group_name */ | |
3555 | + 7); /* ,comdat */ | |
3556 | ||
3557 | section = alloca (len + 1); | |
3558 | memcpy (section, sec_name, sec_name_len); | |
3559 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3560 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3561 | memcpy (section + len - 7, ",comdat", 7); | |
3562 | section [len] = '\0'; | |
3563 | set_section (section); | |
3564 | } | |
3565 | else | |
3566 | { | |
3567 | set_section (sec_name); | |
3568 | bfd_set_section_flags (stdoutput, now_seg, | |
3569 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3570 | } | |
38ce5b11 L |
3571 | |
3572 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3573 | } |
3574 | ||
73f20958 | 3575 | static void |
2d6ed997 | 3576 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3577 | { |
73f20958 L |
3578 | int size, pad; |
3579 | unw_rec_list *list; | |
800eeca4 | 3580 | |
c97b7ef6 JW |
3581 | /* Mark the end of the unwind info, so that we can compute the size of the |
3582 | last unwind region. */ | |
3583 | add_unwind_entry (output_endp ()); | |
3584 | ||
10850f29 JW |
3585 | /* Force out pending instructions, to make sure all unwind records have |
3586 | a valid slot_number field. */ | |
3587 | ia64_flush_insns (); | |
3588 | ||
800eeca4 | 3589 | /* Generate the unwind record. */ |
73f20958 | 3590 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3591 | fixup_unw_records (list, 1); |
73f20958 L |
3592 | size = calc_record_size (list); |
3593 | ||
3594 | if (size > 0 || unwind.force_unwind_entry) | |
3595 | { | |
3596 | unwind.force_unwind_entry = 0; | |
3597 | /* pad to pointer-size boundary. */ | |
3598 | pad = size % md.pointer_size; | |
3599 | if (pad != 0) | |
3600 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3601 | /* Add 8 for the header. */ |
3602 | size += 8; | |
3603 | /* Add a pointer for the personality offset. */ | |
3604 | if (unwind.personality_routine) | |
3605 | size += md.pointer_size; | |
73f20958 | 3606 | } |
6290819d | 3607 | |
800eeca4 JW |
3608 | /* If there are unwind records, switch sections, and output the info. */ |
3609 | if (size != 0) | |
3610 | { | |
800eeca4 | 3611 | expressionS exp; |
1cd8ff38 | 3612 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3613 | |
d6afba4b | 3614 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0); |
800eeca4 | 3615 | |
557debba JW |
3616 | /* Make sure the section has 4 byte alignment for ILP32 and |
3617 | 8 byte alignment for LP64. */ | |
3618 | frag_align (md.pointer_size_shift, 0, 0); | |
3619 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3620 | |
800eeca4 | 3621 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3622 | unwind.info = expr_build_dot (); |
73f20958 L |
3623 | |
3624 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3625 | (offsetT) (long) unwind.personality_routine, |
3626 | (char *) list); | |
91a2ae2a | 3627 | |
800eeca4 | 3628 | /* Add the personality address to the image. */ |
e0c9811a | 3629 | if (unwind.personality_routine != 0) |
542d6675 | 3630 | { |
40449e9f | 3631 | exp.X_op = O_symbol; |
e0c9811a | 3632 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3633 | exp.X_add_number = 0; |
1cd8ff38 NC |
3634 | |
3635 | if (md.flags & EF_IA_64_BE) | |
3636 | { | |
3637 | if (md.flags & EF_IA_64_ABI64) | |
3638 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3639 | else | |
3640 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3641 | } | |
40449e9f | 3642 | else |
1cd8ff38 NC |
3643 | { |
3644 | if (md.flags & EF_IA_64_ABI64) | |
3645 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3646 | else | |
3647 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3648 | } | |
3649 | ||
3650 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3651 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3652 | unwind.personality_routine = 0; |
542d6675 | 3653 | } |
800eeca4 | 3654 | } |
d6afba4b JJ |
3655 | else |
3656 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1); | |
800eeca4 | 3657 | |
6290819d | 3658 | free_saved_prologue_counts (); |
e0c9811a | 3659 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3660 | } |
3661 | ||
197865e8 | 3662 | static void |
542d6675 | 3663 | dot_handlerdata (dummy) |
2434f565 | 3664 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3665 | { |
75e09913 JB |
3666 | if (!in_procedure ("handlerdata")) |
3667 | return; | |
91a2ae2a RH |
3668 | unwind.force_unwind_entry = 1; |
3669 | ||
3670 | /* Remember which segment we're in so we can switch back after .endp */ | |
3671 | unwind.saved_text_seg = now_seg; | |
3672 | unwind.saved_text_subseg = now_subseg; | |
3673 | ||
3674 | /* Generate unwind info into unwind-info section and then leave that | |
3675 | section as the currently active one so dataXX directives go into | |
3676 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3677 | generate_unwind_image (now_seg); |
e0c9811a | 3678 | demand_empty_rest_of_line (); |
800eeca4 JW |
3679 | } |
3680 | ||
197865e8 | 3681 | static void |
800eeca4 | 3682 | dot_unwentry (dummy) |
2434f565 | 3683 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3684 | { |
75e09913 JB |
3685 | if (!in_procedure ("unwentry")) |
3686 | return; | |
91a2ae2a | 3687 | unwind.force_unwind_entry = 1; |
e0c9811a | 3688 | demand_empty_rest_of_line (); |
800eeca4 JW |
3689 | } |
3690 | ||
197865e8 | 3691 | static void |
800eeca4 | 3692 | dot_altrp (dummy) |
2434f565 | 3693 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3694 | { |
e0c9811a JW |
3695 | expressionS e; |
3696 | unsigned reg; | |
3697 | ||
75e09913 JB |
3698 | if (!in_prologue ("altrp")) |
3699 | return; | |
3700 | ||
e0c9811a JW |
3701 | parse_operand (&e); |
3702 | reg = e.X_add_number - REG_BR; | |
3703 | if (e.X_op == O_register && reg < 8) | |
3704 | add_unwind_entry (output_rp_br (reg)); | |
3705 | else | |
3706 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3707 | } |
3708 | ||
197865e8 | 3709 | static void |
e0c9811a JW |
3710 | dot_savemem (psprel) |
3711 | int psprel; | |
800eeca4 JW |
3712 | { |
3713 | expressionS e1, e2; | |
3714 | int sep; | |
3715 | int reg1, val; | |
3716 | ||
75e09913 JB |
3717 | if (!in_prologue (psprel ? "savepsp" : "savesp")) |
3718 | return; | |
3719 | ||
800eeca4 JW |
3720 | sep = parse_operand (&e1); |
3721 | if (sep != ',') | |
e0c9811a | 3722 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3723 | sep = parse_operand (&e2); |
3724 | ||
e0c9811a | 3725 | reg1 = e1.X_add_number; |
800eeca4 | 3726 | val = e2.X_add_number; |
197865e8 | 3727 | |
800eeca4 | 3728 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3729 | if (e1.X_op == O_register) |
800eeca4 JW |
3730 | { |
3731 | if (e2.X_op == O_constant) | |
3732 | { | |
3733 | switch (reg1) | |
3734 | { | |
542d6675 KH |
3735 | case REG_AR + AR_BSP: |
3736 | add_unwind_entry (output_bsp_when ()); | |
3737 | add_unwind_entry ((psprel | |
3738 | ? output_bsp_psprel | |
3739 | : output_bsp_sprel) (val)); | |
3740 | break; | |
3741 | case REG_AR + AR_BSPSTORE: | |
3742 | add_unwind_entry (output_bspstore_when ()); | |
3743 | add_unwind_entry ((psprel | |
3744 | ? output_bspstore_psprel | |
3745 | : output_bspstore_sprel) (val)); | |
3746 | break; | |
3747 | case REG_AR + AR_RNAT: | |
3748 | add_unwind_entry (output_rnat_when ()); | |
3749 | add_unwind_entry ((psprel | |
3750 | ? output_rnat_psprel | |
3751 | : output_rnat_sprel) (val)); | |
3752 | break; | |
3753 | case REG_AR + AR_UNAT: | |
3754 | add_unwind_entry (output_unat_when ()); | |
3755 | add_unwind_entry ((psprel | |
3756 | ? output_unat_psprel | |
3757 | : output_unat_sprel) (val)); | |
3758 | break; | |
3759 | case REG_AR + AR_FPSR: | |
3760 | add_unwind_entry (output_fpsr_when ()); | |
3761 | add_unwind_entry ((psprel | |
3762 | ? output_fpsr_psprel | |
3763 | : output_fpsr_sprel) (val)); | |
3764 | break; | |
3765 | case REG_AR + AR_PFS: | |
3766 | add_unwind_entry (output_pfs_when ()); | |
3767 | add_unwind_entry ((psprel | |
3768 | ? output_pfs_psprel | |
3769 | : output_pfs_sprel) (val)); | |
3770 | break; | |
3771 | case REG_AR + AR_LC: | |
3772 | add_unwind_entry (output_lc_when ()); | |
3773 | add_unwind_entry ((psprel | |
3774 | ? output_lc_psprel | |
3775 | : output_lc_sprel) (val)); | |
3776 | break; | |
3777 | case REG_BR: | |
3778 | add_unwind_entry (output_rp_when ()); | |
3779 | add_unwind_entry ((psprel | |
3780 | ? output_rp_psprel | |
3781 | : output_rp_sprel) (val)); | |
3782 | break; | |
3783 | case REG_PR: | |
3784 | add_unwind_entry (output_preds_when ()); | |
3785 | add_unwind_entry ((psprel | |
3786 | ? output_preds_psprel | |
3787 | : output_preds_sprel) (val)); | |
3788 | break; | |
3789 | case REG_PRIUNAT: | |
3790 | add_unwind_entry (output_priunat_when_mem ()); | |
3791 | add_unwind_entry ((psprel | |
3792 | ? output_priunat_psprel | |
3793 | : output_priunat_sprel) (val)); | |
3794 | break; | |
3795 | default: | |
3796 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3797 | } |
3798 | } | |
3799 | else | |
3800 | as_bad (" Second operand not a valid constant"); | |
3801 | } | |
3802 | else | |
e0c9811a | 3803 | as_bad ("First operand not a register"); |
800eeca4 JW |
3804 | } |
3805 | ||
197865e8 | 3806 | static void |
800eeca4 | 3807 | dot_saveg (dummy) |
2434f565 | 3808 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3809 | { |
3810 | expressionS e1, e2; | |
3811 | int sep; | |
75e09913 JB |
3812 | |
3813 | if (!in_prologue ("save.g")) | |
3814 | return; | |
3815 | ||
800eeca4 JW |
3816 | sep = parse_operand (&e1); |
3817 | if (sep == ',') | |
3818 | parse_operand (&e2); | |
197865e8 | 3819 | |
800eeca4 JW |
3820 | if (e1.X_op != O_constant) |
3821 | as_bad ("First operand to .save.g must be a constant."); | |
3822 | else | |
3823 | { | |
3824 | int grmask = e1.X_add_number; | |
3825 | if (sep != ',') | |
3826 | add_unwind_entry (output_gr_mem (grmask)); | |
3827 | else | |
542d6675 | 3828 | { |
800eeca4 | 3829 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3830 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3831 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3832 | else | |
3833 | as_bad ("Second operand is an invalid register."); | |
3834 | } | |
3835 | } | |
3836 | } | |
3837 | ||
197865e8 | 3838 | static void |
800eeca4 | 3839 | dot_savef (dummy) |
2434f565 | 3840 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3841 | { |
e0c9811a | 3842 | expressionS e1; |
800eeca4 | 3843 | int sep; |
75e09913 JB |
3844 | |
3845 | if (!in_prologue ("save.f")) | |
3846 | return; | |
3847 | ||
800eeca4 | 3848 | sep = parse_operand (&e1); |
197865e8 | 3849 | |
800eeca4 JW |
3850 | if (e1.X_op != O_constant) |
3851 | as_bad ("Operand to .save.f must be a constant."); | |
3852 | else | |
e0c9811a | 3853 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3854 | } |
3855 | ||
197865e8 | 3856 | static void |
800eeca4 | 3857 | dot_saveb (dummy) |
2434f565 | 3858 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3859 | { |
e0c9811a JW |
3860 | expressionS e1, e2; |
3861 | unsigned int reg; | |
3862 | unsigned char sep; | |
3863 | int brmask; | |
3864 | ||
75e09913 JB |
3865 | if (!in_prologue ("save.b")) |
3866 | return; | |
3867 | ||
800eeca4 | 3868 | sep = parse_operand (&e1); |
800eeca4 | 3869 | if (e1.X_op != O_constant) |
800eeca4 | 3870 | { |
e0c9811a JW |
3871 | as_bad ("First operand to .save.b must be a constant."); |
3872 | return; | |
800eeca4 | 3873 | } |
e0c9811a JW |
3874 | brmask = e1.X_add_number; |
3875 | ||
3876 | if (sep == ',') | |
3877 | { | |
3878 | sep = parse_operand (&e2); | |
3879 | reg = e2.X_add_number - REG_GR; | |
3880 | if (e2.X_op != O_register || reg > 127) | |
3881 | { | |
3882 | as_bad ("Second operand to .save.b must be a general register."); | |
3883 | return; | |
3884 | } | |
3885 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3886 | } | |
3887 | else | |
3888 | add_unwind_entry (output_br_mem (brmask)); | |
3889 | ||
3890 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3891 | demand_empty_rest_of_line (); |
800eeca4 JW |
3892 | } |
3893 | ||
197865e8 | 3894 | static void |
800eeca4 | 3895 | dot_savegf (dummy) |
2434f565 | 3896 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3897 | { |
3898 | expressionS e1, e2; | |
3899 | int sep; | |
75e09913 JB |
3900 | |
3901 | if (!in_prologue ("save.gf")) | |
3902 | return; | |
3903 | ||
800eeca4 JW |
3904 | sep = parse_operand (&e1); |
3905 | if (sep == ',') | |
3906 | parse_operand (&e2); | |
197865e8 | 3907 | |
800eeca4 JW |
3908 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3909 | as_bad ("Both operands of .save.gf must be constants."); | |
3910 | else | |
3911 | { | |
3912 | int grmask = e1.X_add_number; | |
3913 | int frmask = e2.X_add_number; | |
3914 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3915 | } | |
3916 | } | |
3917 | ||
197865e8 | 3918 | static void |
800eeca4 | 3919 | dot_spill (dummy) |
2434f565 | 3920 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3921 | { |
3922 | expressionS e; | |
e0c9811a JW |
3923 | unsigned char sep; |
3924 | ||
75e09913 JB |
3925 | if (!in_prologue ("spill")) |
3926 | return; | |
3927 | ||
e0c9811a JW |
3928 | sep = parse_operand (&e); |
3929 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3930 | demand_empty_rest_of_line (); |
197865e8 | 3931 | |
800eeca4 JW |
3932 | if (e.X_op != O_constant) |
3933 | as_bad ("Operand to .spill must be a constant"); | |
3934 | else | |
e0c9811a JW |
3935 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3936 | } | |
3937 | ||
3938 | static void | |
3939 | dot_spillreg (dummy) | |
2434f565 | 3940 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a | 3941 | { |
2132e3a3 AM |
3942 | int sep; |
3943 | unsigned int ab, xy, reg, treg; | |
e0c9811a JW |
3944 | expressionS e1, e2; |
3945 | ||
75e09913 JB |
3946 | if (!in_procedure ("spillreg")) |
3947 | return; | |
3948 | ||
e0c9811a JW |
3949 | sep = parse_operand (&e1); |
3950 | if (sep != ',') | |
3951 | { | |
3952 | as_bad ("No second operand to .spillreg"); | |
3953 | return; | |
3954 | } | |
3955 | ||
3956 | parse_operand (&e2); | |
3957 | ||
3958 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3959 | { |
e0c9811a JW |
3960 | as_bad ("First operand to .spillreg must be a preserved register"); |
3961 | return; | |
800eeca4 | 3962 | } |
e0c9811a JW |
3963 | |
3964 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3965 | { | |
3966 | as_bad ("Second operand to .spillreg must be a register"); | |
3967 | return; | |
3968 | } | |
3969 | ||
3970 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3971 | } | |
3972 | ||
3973 | static void | |
3974 | dot_spillmem (psprel) | |
3975 | int psprel; | |
3976 | { | |
3977 | expressionS e1, e2; | |
2132e3a3 AM |
3978 | int sep; |
3979 | unsigned int ab, reg; | |
e0c9811a | 3980 | |
75e09913 JB |
3981 | if (!in_procedure ("spillmem")) |
3982 | return; | |
3983 | ||
e0c9811a JW |
3984 | sep = parse_operand (&e1); |
3985 | if (sep != ',') | |
3986 | { | |
3987 | as_bad ("Second operand missing"); | |
3988 | return; | |
3989 | } | |
3990 | ||
3991 | parse_operand (&e2); | |
3992 | ||
3993 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3994 | { | |
3995 | as_bad ("First operand to .spill%s must be a preserved register", | |
3996 | psprel ? "psp" : "sp"); | |
3997 | return; | |
3998 | } | |
3999 | ||
4000 | if (e2.X_op != O_constant) | |
4001 | { | |
4002 | as_bad ("Second operand to .spill%s must be a constant", | |
4003 | psprel ? "psp" : "sp"); | |
4004 | return; | |
4005 | } | |
4006 | ||
4007 | if (psprel) | |
4008 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
4009 | else | |
4010 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
4011 | } | |
4012 | ||
4013 | static void | |
4014 | dot_spillreg_p (dummy) | |
2434f565 | 4015 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a | 4016 | { |
2132e3a3 AM |
4017 | int sep; |
4018 | unsigned int ab, xy, reg, treg; | |
e0c9811a JW |
4019 | expressionS e1, e2, e3; |
4020 | unsigned int qp; | |
4021 | ||
75e09913 JB |
4022 | if (!in_procedure ("spillreg.p")) |
4023 | return; | |
4024 | ||
e0c9811a JW |
4025 | sep = parse_operand (&e1); |
4026 | if (sep != ',') | |
4027 | { | |
4028 | as_bad ("No second and third operand to .spillreg.p"); | |
4029 | return; | |
4030 | } | |
4031 | ||
4032 | sep = parse_operand (&e2); | |
4033 | if (sep != ',') | |
4034 | { | |
4035 | as_bad ("No third operand to .spillreg.p"); | |
4036 | return; | |
4037 | } | |
4038 | ||
4039 | parse_operand (&e3); | |
4040 | ||
4041 | qp = e1.X_add_number - REG_P; | |
4042 | ||
4043 | if (e1.X_op != O_register || qp > 63) | |
4044 | { | |
4045 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
4046 | return; | |
4047 | } | |
4048 | ||
4049 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4050 | { | |
4051 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
4052 | return; | |
4053 | } | |
4054 | ||
4055 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
4056 | { | |
4057 | as_bad ("Third operand to .spillreg.p must be a register"); | |
4058 | return; | |
4059 | } | |
4060 | ||
4061 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
4062 | } | |
4063 | ||
4064 | static void | |
4065 | dot_spillmem_p (psprel) | |
4066 | int psprel; | |
4067 | { | |
4068 | expressionS e1, e2, e3; | |
2132e3a3 AM |
4069 | int sep; |
4070 | unsigned int ab, reg; | |
e0c9811a JW |
4071 | unsigned int qp; |
4072 | ||
75e09913 JB |
4073 | if (!in_procedure ("spillmem.p")) |
4074 | return; | |
4075 | ||
e0c9811a JW |
4076 | sep = parse_operand (&e1); |
4077 | if (sep != ',') | |
4078 | { | |
4079 | as_bad ("Second operand missing"); | |
4080 | return; | |
4081 | } | |
4082 | ||
4083 | parse_operand (&e2); | |
4084 | if (sep != ',') | |
4085 | { | |
4086 | as_bad ("Second operand missing"); | |
4087 | return; | |
4088 | } | |
4089 | ||
4090 | parse_operand (&e3); | |
4091 | ||
4092 | qp = e1.X_add_number - REG_P; | |
4093 | if (e1.X_op != O_register || qp > 63) | |
4094 | { | |
4095 | as_bad ("First operand to .spill%s_p must be a predicate", | |
4096 | psprel ? "psp" : "sp"); | |
4097 | return; | |
4098 | } | |
4099 | ||
4100 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
4101 | { | |
4102 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
4103 | psprel ? "psp" : "sp"); | |
4104 | return; | |
4105 | } | |
4106 | ||
4107 | if (e3.X_op != O_constant) | |
4108 | { | |
4109 | as_bad ("Third operand to .spill%s_p must be a constant", | |
4110 | psprel ? "psp" : "sp"); | |
4111 | return; | |
4112 | } | |
4113 | ||
4114 | if (psprel) | |
fa7fda74 | 4115 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 4116 | else |
fa7fda74 | 4117 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
4118 | } |
4119 | ||
6290819d NC |
4120 | static unsigned int |
4121 | get_saved_prologue_count (lbl) | |
4122 | unsigned long lbl; | |
4123 | { | |
4124 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4125 | ||
4126 | while (lpc != NULL && lpc->label_number != lbl) | |
4127 | lpc = lpc->next; | |
4128 | ||
4129 | if (lpc != NULL) | |
4130 | return lpc->prologue_count; | |
4131 | ||
4132 | as_bad ("Missing .label_state %ld", lbl); | |
4133 | return 1; | |
4134 | } | |
4135 | ||
4136 | static void | |
4137 | save_prologue_count (lbl, count) | |
4138 | unsigned long lbl; | |
4139 | unsigned int count; | |
4140 | { | |
4141 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4142 | ||
4143 | while (lpc != NULL && lpc->label_number != lbl) | |
4144 | lpc = lpc->next; | |
4145 | ||
4146 | if (lpc != NULL) | |
4147 | lpc->prologue_count = count; | |
4148 | else | |
4149 | { | |
40449e9f | 4150 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4151 | |
4152 | new_lpc->next = unwind.saved_prologue_counts; | |
4153 | new_lpc->label_number = lbl; | |
4154 | new_lpc->prologue_count = count; | |
4155 | unwind.saved_prologue_counts = new_lpc; | |
4156 | } | |
4157 | } | |
4158 | ||
4159 | static void | |
4160 | free_saved_prologue_counts () | |
4161 | { | |
40449e9f KH |
4162 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4163 | label_prologue_count *next; | |
6290819d NC |
4164 | |
4165 | while (lpc != NULL) | |
4166 | { | |
4167 | next = lpc->next; | |
4168 | free (lpc); | |
4169 | lpc = next; | |
4170 | } | |
4171 | ||
4172 | unwind.saved_prologue_counts = NULL; | |
4173 | } | |
4174 | ||
e0c9811a JW |
4175 | static void |
4176 | dot_label_state (dummy) | |
2434f565 | 4177 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4178 | { |
4179 | expressionS e; | |
4180 | ||
75e09913 JB |
4181 | if (!in_body ("label_state")) |
4182 | return; | |
4183 | ||
e0c9811a JW |
4184 | parse_operand (&e); |
4185 | if (e.X_op != O_constant) | |
4186 | { | |
4187 | as_bad ("Operand to .label_state must be a constant"); | |
4188 | return; | |
4189 | } | |
4190 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 4191 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
4192 | } |
4193 | ||
4194 | static void | |
4195 | dot_copy_state (dummy) | |
2434f565 | 4196 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4197 | { |
4198 | expressionS e; | |
4199 | ||
75e09913 JB |
4200 | if (!in_body ("copy_state")) |
4201 | return; | |
4202 | ||
e0c9811a JW |
4203 | parse_operand (&e); |
4204 | if (e.X_op != O_constant) | |
4205 | { | |
4206 | as_bad ("Operand to .copy_state must be a constant"); | |
4207 | return; | |
4208 | } | |
4209 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 4210 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
4211 | } |
4212 | ||
197865e8 | 4213 | static void |
800eeca4 | 4214 | dot_unwabi (dummy) |
2434f565 | 4215 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4216 | { |
e0c9811a JW |
4217 | expressionS e1, e2; |
4218 | unsigned char sep; | |
4219 | ||
75e09913 JB |
4220 | if (!in_procedure ("unwabi")) |
4221 | return; | |
4222 | ||
e0c9811a JW |
4223 | sep = parse_operand (&e1); |
4224 | if (sep != ',') | |
4225 | { | |
4226 | as_bad ("Second operand to .unwabi missing"); | |
4227 | return; | |
4228 | } | |
4229 | sep = parse_operand (&e2); | |
4230 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 4231 | demand_empty_rest_of_line (); |
e0c9811a JW |
4232 | |
4233 | if (e1.X_op != O_constant) | |
4234 | { | |
4235 | as_bad ("First operand to .unwabi must be a constant"); | |
4236 | return; | |
4237 | } | |
4238 | ||
4239 | if (e2.X_op != O_constant) | |
4240 | { | |
4241 | as_bad ("Second operand to .unwabi must be a constant"); | |
4242 | return; | |
4243 | } | |
4244 | ||
4245 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
4246 | } |
4247 | ||
197865e8 | 4248 | static void |
800eeca4 | 4249 | dot_personality (dummy) |
2434f565 | 4250 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4251 | { |
4252 | char *name, *p, c; | |
75e09913 JB |
4253 | if (!in_procedure ("personality")) |
4254 | return; | |
800eeca4 JW |
4255 | SKIP_WHITESPACE (); |
4256 | name = input_line_pointer; | |
4257 | c = get_symbol_end (); | |
4258 | p = input_line_pointer; | |
e0c9811a | 4259 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4260 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4261 | *p = c; |
4262 | SKIP_WHITESPACE (); | |
4263 | demand_empty_rest_of_line (); | |
4264 | } | |
4265 | ||
4266 | static void | |
4267 | dot_proc (dummy) | |
2434f565 | 4268 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4269 | { |
4270 | char *name, *p, c; | |
4271 | symbolS *sym; | |
4272 | ||
75e09913 | 4273 | unwind.proc_start = 0; |
e0c9811a | 4274 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4275 | function symbols: */ |
800eeca4 JW |
4276 | while (1) |
4277 | { | |
4278 | SKIP_WHITESPACE (); | |
4279 | name = input_line_pointer; | |
4280 | c = get_symbol_end (); | |
4281 | p = input_line_pointer; | |
75e09913 JB |
4282 | if (!*name) |
4283 | as_bad ("Empty argument of .proc"); | |
4284 | else | |
542d6675 | 4285 | { |
75e09913 JB |
4286 | sym = symbol_find_or_make (name); |
4287 | if (S_IS_DEFINED (sym)) | |
4288 | as_bad ("`%s' was already defined", name); | |
4289 | else if (unwind.proc_start == 0) | |
4290 | { | |
4291 | unwind.proc_start = sym; | |
4292 | } | |
4293 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4294 | } |
800eeca4 JW |
4295 | *p = c; |
4296 | SKIP_WHITESPACE (); | |
4297 | if (*input_line_pointer != ',') | |
4298 | break; | |
4299 | ++input_line_pointer; | |
4300 | } | |
75e09913 JB |
4301 | if (unwind.proc_start == 0) |
4302 | unwind.proc_start = expr_build_dot (); | |
800eeca4 JW |
4303 | demand_empty_rest_of_line (); |
4304 | ia64_do_align (16); | |
4305 | ||
75e09913 | 4306 | unwind.prologue = 0; |
33d01f33 | 4307 | unwind.prologue_count = 0; |
75e09913 JB |
4308 | unwind.body = 0; |
4309 | unwind.insn = 0; | |
e0c9811a JW |
4310 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4311 | unwind.personality_routine = 0; | |
800eeca4 JW |
4312 | } |
4313 | ||
4314 | static void | |
4315 | dot_body (dummy) | |
2434f565 | 4316 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4317 | { |
75e09913 JB |
4318 | if (!in_procedure ("body")) |
4319 | return; | |
4320 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
4321 | as_warn ("Initial .body should precede any instructions"); | |
4322 | ||
e0c9811a | 4323 | unwind.prologue = 0; |
30d25259 | 4324 | unwind.prologue_mask = 0; |
75e09913 | 4325 | unwind.body = 1; |
30d25259 | 4326 | |
800eeca4 | 4327 | add_unwind_entry (output_body ()); |
e0c9811a | 4328 | demand_empty_rest_of_line (); |
800eeca4 JW |
4329 | } |
4330 | ||
4331 | static void | |
4332 | dot_prologue (dummy) | |
2434f565 | 4333 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4334 | { |
e0c9811a | 4335 | unsigned char sep; |
2434f565 | 4336 | int mask = 0, grsave = 0; |
e0c9811a | 4337 | |
75e09913 JB |
4338 | if (!in_procedure ("prologue")) |
4339 | return; | |
4340 | if (unwind.prologue) | |
4341 | { | |
4342 | as_bad (".prologue within prologue"); | |
4343 | ignore_rest_of_line (); | |
4344 | return; | |
4345 | } | |
4346 | if (!unwind.body && unwind.insn) | |
4347 | as_warn ("Initial .prologue should precede any instructions"); | |
4348 | ||
e0c9811a | 4349 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
4350 | { |
4351 | expressionS e1, e2; | |
800eeca4 JW |
4352 | sep = parse_operand (&e1); |
4353 | if (sep != ',') | |
4354 | as_bad ("No second operand to .prologue"); | |
4355 | sep = parse_operand (&e2); | |
e0c9811a | 4356 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
c95b35a9 | 4357 | demand_empty_rest_of_line (); |
800eeca4 JW |
4358 | |
4359 | if (e1.X_op == O_constant) | |
542d6675 | 4360 | { |
30d25259 RH |
4361 | mask = e1.X_add_number; |
4362 | ||
800eeca4 | 4363 | if (e2.X_op == O_constant) |
30d25259 RH |
4364 | grsave = e2.X_add_number; |
4365 | else if (e2.X_op == O_register | |
4366 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
4367 | ; | |
800eeca4 | 4368 | else |
30d25259 RH |
4369 | as_bad ("Second operand not a constant or general register"); |
4370 | ||
4371 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
4372 | } |
4373 | else | |
4374 | as_bad ("First operand not a constant"); | |
4375 | } | |
4376 | else | |
4377 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4378 | |
4379 | unwind.prologue = 1; | |
4380 | unwind.prologue_mask = mask; | |
75e09913 | 4381 | unwind.body = 0; |
33d01f33 | 4382 | ++unwind.prologue_count; |
800eeca4 JW |
4383 | } |
4384 | ||
4385 | static void | |
4386 | dot_endp (dummy) | |
2434f565 | 4387 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4388 | { |
4389 | expressionS e; | |
2132e3a3 | 4390 | char *ptr; |
44f5c83a | 4391 | int bytes_per_address; |
800eeca4 JW |
4392 | long where; |
4393 | segT saved_seg; | |
4394 | subsegT saved_subseg; | |
970d6792 | 4395 | char *name, *default_name, *p, c; |
c538998c | 4396 | symbolS *sym; |
970d6792 | 4397 | int unwind_check = md.unwind_check; |
800eeca4 | 4398 | |
970d6792 | 4399 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4400 | if (!in_procedure ("endp")) |
4401 | return; | |
970d6792 | 4402 | md.unwind_check = unwind_check; |
75e09913 | 4403 | |
91a2ae2a RH |
4404 | if (unwind.saved_text_seg) |
4405 | { | |
4406 | saved_seg = unwind.saved_text_seg; | |
4407 | saved_subseg = unwind.saved_text_subseg; | |
4408 | unwind.saved_text_seg = NULL; | |
4409 | } | |
4410 | else | |
4411 | { | |
4412 | saved_seg = now_seg; | |
4413 | saved_subseg = now_subseg; | |
4414 | } | |
4415 | ||
800eeca4 | 4416 | insn_group_break (1, 0, 0); |
800eeca4 | 4417 | |
91a2ae2a RH |
4418 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4419 | if (!unwind.info) | |
2d6ed997 | 4420 | generate_unwind_image (saved_seg); |
800eeca4 | 4421 | |
91a2ae2a RH |
4422 | if (unwind.info || unwind.force_unwind_entry) |
4423 | { | |
75e09913 JB |
4424 | symbolS *proc_end; |
4425 | ||
91a2ae2a | 4426 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4427 | proc_end = expr_build_dot (); |
5e7474a7 | 4428 | |
d6afba4b | 4429 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0); |
5e7474a7 | 4430 | |
557debba JW |
4431 | /* Make sure that section has 4 byte alignment for ILP32 and |
4432 | 8 byte alignment for LP64. */ | |
4433 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4434 | |
557debba JW |
4435 | /* Need space for 3 pointers for procedure start, procedure end, |
4436 | and unwind info. */ | |
4437 | ptr = frag_more (3 * md.pointer_size); | |
4438 | where = frag_now_fix () - (3 * md.pointer_size); | |
91a2ae2a | 4439 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4440 | |
40449e9f | 4441 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4442 | e.X_op = O_pseudo_fixup; |
4443 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4444 | e.X_add_number = 0; | |
4445 | e.X_add_symbol = unwind.proc_start; | |
4446 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); | |
800eeca4 | 4447 | |
800eeca4 JW |
4448 | e.X_op = O_pseudo_fixup; |
4449 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4450 | e.X_add_number = 0; | |
75e09913 | 4451 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4452 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4453 | bytes_per_address, &e); | |
4454 | ||
4455 | if (unwind.info) | |
4456 | { | |
4457 | e.X_op = O_pseudo_fixup; | |
4458 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4459 | e.X_add_number = 0; | |
4460 | e.X_add_symbol = unwind.info; | |
4461 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4462 | bytes_per_address, &e); | |
4463 | } | |
4464 | else | |
4465 | md_number_to_chars (ptr + (bytes_per_address * 2), 0, | |
4466 | bytes_per_address); | |
800eeca4 | 4467 | |
91a2ae2a | 4468 | } |
d6afba4b JJ |
4469 | else |
4470 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1); | |
4471 | ||
800eeca4 | 4472 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4473 | |
970d6792 L |
4474 | if (unwind.proc_start) |
4475 | default_name = (char *) S_GET_NAME (unwind.proc_start); | |
4476 | else | |
4477 | default_name = NULL; | |
4478 | ||
c538998c JJ |
4479 | /* Parse names of main and alternate entry points and set symbol sizes. */ |
4480 | while (1) | |
4481 | { | |
4482 | SKIP_WHITESPACE (); | |
4483 | name = input_line_pointer; | |
4484 | c = get_symbol_end (); | |
4485 | p = input_line_pointer; | |
75e09913 | 4486 | if (!*name) |
970d6792 L |
4487 | { |
4488 | if (md.unwind_check == unwind_check_warning) | |
4489 | { | |
4490 | if (default_name) | |
4491 | { | |
4492 | as_warn ("Empty argument of .endp. Use the default name `%s'", | |
4493 | default_name); | |
4494 | name = default_name; | |
4495 | } | |
4496 | else | |
4497 | as_warn ("Empty argument of .endp"); | |
4498 | } | |
4499 | else | |
4500 | as_bad ("Empty argument of .endp"); | |
4501 | } | |
4502 | if (*name) | |
75e09913 JB |
4503 | { |
4504 | sym = symbol_find (name); | |
970d6792 L |
4505 | if (!sym |
4506 | && md.unwind_check == unwind_check_warning | |
4507 | && default_name | |
4508 | && default_name != name) | |
4509 | { | |
4510 | /* We have a bad name. Try the default one if needed. */ | |
4511 | as_warn ("`%s' was not defined within procedure. Use the default name `%s'", | |
4512 | name, default_name); | |
4513 | name = default_name; | |
4514 | sym = symbol_find (name); | |
4515 | } | |
75e09913 JB |
4516 | if (!sym || !S_IS_DEFINED (sym)) |
4517 | as_bad ("`%s' was not defined within procedure", name); | |
4518 | else if (unwind.proc_start | |
4519 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4520 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4521 | { | |
4522 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4523 | fragS *frag = symbol_get_frag (sym); | |
4524 | ||
4525 | /* Check whether the function label is at or beyond last | |
4526 | .proc directive. */ | |
4527 | while (fr && fr != frag) | |
4528 | fr = fr->fr_next; | |
4529 | if (fr) | |
c538998c | 4530 | { |
75e09913 JB |
4531 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4532 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4533 | else | |
4534 | { | |
4535 | symbol_get_obj (sym)->size = | |
4536 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4537 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4538 | symbol_get_obj (sym)->size->X_add_symbol | |
4539 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4540 | frag_now_fix (), frag_now); | |
4541 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4542 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4543 | } | |
c538998c JJ |
4544 | } |
4545 | } | |
4546 | } | |
4547 | *p = c; | |
4548 | SKIP_WHITESPACE (); | |
4549 | if (*input_line_pointer != ',') | |
4550 | break; | |
4551 | ++input_line_pointer; | |
4552 | } | |
4553 | demand_empty_rest_of_line (); | |
75e09913 | 4554 | unwind.proc_start = unwind.info = 0; |
800eeca4 JW |
4555 | } |
4556 | ||
4557 | static void | |
4558 | dot_template (template) | |
4559 | int template; | |
4560 | { | |
4561 | CURR_SLOT.user_template = template; | |
4562 | } | |
4563 | ||
4564 | static void | |
4565 | dot_regstk (dummy) | |
2434f565 | 4566 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4567 | { |
4568 | int ins, locs, outs, rots; | |
4569 | ||
4570 | if (is_it_end_of_statement ()) | |
4571 | ins = locs = outs = rots = 0; | |
4572 | else | |
4573 | { | |
4574 | ins = get_absolute_expression (); | |
4575 | if (*input_line_pointer++ != ',') | |
4576 | goto err; | |
4577 | locs = get_absolute_expression (); | |
4578 | if (*input_line_pointer++ != ',') | |
4579 | goto err; | |
4580 | outs = get_absolute_expression (); | |
4581 | if (*input_line_pointer++ != ',') | |
4582 | goto err; | |
4583 | rots = get_absolute_expression (); | |
4584 | } | |
4585 | set_regstack (ins, locs, outs, rots); | |
4586 | return; | |
4587 | ||
4588 | err: | |
4589 | as_bad ("Comma expected"); | |
4590 | ignore_rest_of_line (); | |
4591 | } | |
4592 | ||
4593 | static void | |
4594 | dot_rot (type) | |
4595 | int type; | |
4596 | { | |
4597 | unsigned num_regs, num_alloced = 0; | |
4598 | struct dynreg **drpp, *dr; | |
4599 | int ch, base_reg = 0; | |
4600 | char *name, *start; | |
4601 | size_t len; | |
4602 | ||
4603 | switch (type) | |
4604 | { | |
4605 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4606 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4607 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4608 | default: break; | |
4609 | } | |
4610 | ||
542d6675 | 4611 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4612 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4613 | { | |
4614 | hash_delete (md.dynreg_hash, dr->name); | |
20b36a95 | 4615 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4616 | dr->num_regs = 0; |
4617 | } | |
4618 | ||
4619 | drpp = &md.dynreg[type]; | |
4620 | while (1) | |
4621 | { | |
4622 | start = input_line_pointer; | |
4623 | ch = get_symbol_end (); | |
20b36a95 | 4624 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4625 | *input_line_pointer = ch; |
800eeca4 JW |
4626 | |
4627 | SKIP_WHITESPACE (); | |
4628 | if (*input_line_pointer != '[') | |
4629 | { | |
4630 | as_bad ("Expected '['"); | |
4631 | goto err; | |
4632 | } | |
4633 | ++input_line_pointer; /* skip '[' */ | |
4634 | ||
4635 | num_regs = get_absolute_expression (); | |
4636 | ||
4637 | if (*input_line_pointer++ != ']') | |
4638 | { | |
4639 | as_bad ("Expected ']'"); | |
4640 | goto err; | |
4641 | } | |
4642 | SKIP_WHITESPACE (); | |
4643 | ||
4644 | num_alloced += num_regs; | |
4645 | switch (type) | |
4646 | { | |
4647 | case DYNREG_GR: | |
4648 | if (num_alloced > md.rot.num_regs) | |
4649 | { | |
4650 | as_bad ("Used more than the declared %d rotating registers", | |
4651 | md.rot.num_regs); | |
4652 | goto err; | |
4653 | } | |
4654 | break; | |
4655 | case DYNREG_FR: | |
4656 | if (num_alloced > 96) | |
4657 | { | |
4658 | as_bad ("Used more than the available 96 rotating registers"); | |
4659 | goto err; | |
4660 | } | |
4661 | break; | |
4662 | case DYNREG_PR: | |
4663 | if (num_alloced > 48) | |
4664 | { | |
4665 | as_bad ("Used more than the available 48 rotating registers"); | |
4666 | goto err; | |
4667 | } | |
4668 | break; | |
4669 | ||
4670 | default: | |
4671 | break; | |
4672 | } | |
4673 | ||
800eeca4 JW |
4674 | if (!*drpp) |
4675 | { | |
4676 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4677 | memset (*drpp, 0, sizeof (*dr)); | |
4678 | } | |
4679 | ||
20b36a95 JB |
4680 | name = obstack_alloc (¬es, len + 1); |
4681 | memcpy (name, start, len); | |
4682 | name[len] = '\0'; | |
4683 | ||
800eeca4 JW |
4684 | dr = *drpp; |
4685 | dr->name = name; | |
4686 | dr->num_regs = num_regs; | |
4687 | dr->base = base_reg; | |
4688 | drpp = &dr->next; | |
4689 | base_reg += num_regs; | |
4690 | ||
4691 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4692 | { | |
4693 | as_bad ("Attempt to redefine register set `%s'", name); | |
20b36a95 | 4694 | obstack_free (¬es, name); |
800eeca4 JW |
4695 | goto err; |
4696 | } | |
4697 | ||
4698 | if (*input_line_pointer != ',') | |
4699 | break; | |
4700 | ++input_line_pointer; /* skip comma */ | |
4701 | SKIP_WHITESPACE (); | |
4702 | } | |
4703 | demand_empty_rest_of_line (); | |
4704 | return; | |
4705 | ||
4706 | err: | |
4707 | ignore_rest_of_line (); | |
4708 | } | |
4709 | ||
4710 | static void | |
4711 | dot_byteorder (byteorder) | |
4712 | int byteorder; | |
4713 | { | |
10a98291 L |
4714 | segment_info_type *seginfo = seg_info (now_seg); |
4715 | ||
4716 | if (byteorder == -1) | |
4717 | { | |
4718 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4719 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4720 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4721 | } | |
4722 | else | |
4723 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4724 | ||
4725 | if (target_big_endian != byteorder) | |
4726 | { | |
4727 | target_big_endian = byteorder; | |
4728 | if (target_big_endian) | |
4729 | { | |
4730 | ia64_number_to_chars = number_to_chars_bigendian; | |
4731 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4732 | } | |
4733 | else | |
4734 | { | |
4735 | ia64_number_to_chars = number_to_chars_littleendian; | |
4736 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4737 | } | |
4738 | } | |
800eeca4 JW |
4739 | } |
4740 | ||
4741 | static void | |
4742 | dot_psr (dummy) | |
2434f565 | 4743 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4744 | { |
4745 | char *option; | |
4746 | int ch; | |
4747 | ||
4748 | while (1) | |
4749 | { | |
4750 | option = input_line_pointer; | |
4751 | ch = get_symbol_end (); | |
4752 | if (strcmp (option, "lsb") == 0) | |
4753 | md.flags &= ~EF_IA_64_BE; | |
4754 | else if (strcmp (option, "msb") == 0) | |
4755 | md.flags |= EF_IA_64_BE; | |
4756 | else if (strcmp (option, "abi32") == 0) | |
4757 | md.flags &= ~EF_IA_64_ABI64; | |
4758 | else if (strcmp (option, "abi64") == 0) | |
4759 | md.flags |= EF_IA_64_ABI64; | |
4760 | else | |
4761 | as_bad ("Unknown psr option `%s'", option); | |
4762 | *input_line_pointer = ch; | |
4763 | ||
4764 | SKIP_WHITESPACE (); | |
4765 | if (*input_line_pointer != ',') | |
4766 | break; | |
4767 | ||
4768 | ++input_line_pointer; | |
4769 | SKIP_WHITESPACE (); | |
4770 | } | |
4771 | demand_empty_rest_of_line (); | |
4772 | } | |
4773 | ||
800eeca4 JW |
4774 | static void |
4775 | dot_ln (dummy) | |
2434f565 | 4776 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4777 | { |
4778 | new_logical_line (0, get_absolute_expression ()); | |
4779 | demand_empty_rest_of_line (); | |
4780 | } | |
4781 | ||
ef6a2b41 JB |
4782 | static void |
4783 | cross_section (ref, cons, ua) | |
4784 | int ref; | |
4785 | void (*cons) PARAMS((int)); | |
4786 | int ua; | |
800eeca4 | 4787 | { |
ef6a2b41 JB |
4788 | char *start, *end; |
4789 | int saved_auto_align; | |
4790 | unsigned int section_count; | |
800eeca4 JW |
4791 | |
4792 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4793 | start = input_line_pointer; |
4794 | if (*start == '"') | |
4795 | { | |
4796 | int len; | |
4797 | char *name; | |
4798 | ||
b3f19c14 | 4799 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4800 | obstack_free(¬es, name); |
4801 | if (!name) | |
4802 | { | |
4803 | ignore_rest_of_line (); | |
4804 | return; | |
4805 | } | |
4806 | } | |
b3f19c14 | 4807 | else |
800eeca4 | 4808 | { |
b3f19c14 JB |
4809 | char c = get_symbol_end (); |
4810 | ||
4811 | if (input_line_pointer == start) | |
4812 | { | |
4813 | as_bad ("Missing section name"); | |
4814 | ignore_rest_of_line (); | |
ef6a2b41 | 4815 | return; |
b3f19c14 | 4816 | } |
b3f19c14 | 4817 | *input_line_pointer = c; |
800eeca4 | 4818 | } |
ef6a2b41 | 4819 | end = input_line_pointer; |
800eeca4 JW |
4820 | SKIP_WHITESPACE (); |
4821 | if (*input_line_pointer != ',') | |
4822 | { | |
4823 | as_bad ("Comma expected after section name"); | |
4824 | ignore_rest_of_line (); | |
ef6a2b41 | 4825 | return; |
800eeca4 | 4826 | } |
ef6a2b41 JB |
4827 | *end = '\0'; |
4828 | end = input_line_pointer + 1; /* skip comma */ | |
4829 | input_line_pointer = start; | |
4830 | md.keep_pending_output = 1; | |
4831 | section_count = bfd_count_sections(stdoutput); | |
4832 | obj_elf_section (0); | |
4833 | if (section_count != bfd_count_sections(stdoutput)) | |
4834 | as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."); | |
4835 | input_line_pointer = end; | |
4836 | saved_auto_align = md.auto_align; | |
4837 | if (ua) | |
4838 | md.auto_align = 0; | |
4839 | (*cons) (ref); | |
4840 | if (ua) | |
4841 | md.auto_align = saved_auto_align; | |
4842 | obj_elf_previous (0); | |
4843 | md.keep_pending_output = 0; | |
800eeca4 JW |
4844 | } |
4845 | ||
4846 | static void | |
4847 | dot_xdata (size) | |
4848 | int size; | |
4849 | { | |
ef6a2b41 | 4850 | cross_section (size, cons, 0); |
800eeca4 JW |
4851 | } |
4852 | ||
4853 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4854 | |
800eeca4 JW |
4855 | static void |
4856 | stmt_float_cons (kind) | |
4857 | int kind; | |
4858 | { | |
165a7f90 | 4859 | size_t alignment; |
800eeca4 JW |
4860 | |
4861 | switch (kind) | |
4862 | { | |
165a7f90 L |
4863 | case 'd': |
4864 | alignment = 8; | |
4865 | break; | |
4866 | ||
4867 | case 'x': | |
4868 | case 'X': | |
4869 | alignment = 16; | |
4870 | break; | |
800eeca4 JW |
4871 | |
4872 | case 'f': | |
4873 | default: | |
165a7f90 | 4874 | alignment = 4; |
800eeca4 JW |
4875 | break; |
4876 | } | |
165a7f90 | 4877 | ia64_do_align (alignment); |
800eeca4 JW |
4878 | float_cons (kind); |
4879 | } | |
4880 | ||
4881 | static void | |
4882 | stmt_cons_ua (size) | |
4883 | int size; | |
4884 | { | |
4885 | int saved_auto_align = md.auto_align; | |
4886 | ||
4887 | md.auto_align = 0; | |
4888 | cons (size); | |
4889 | md.auto_align = saved_auto_align; | |
4890 | } | |
4891 | ||
4892 | static void | |
4893 | dot_xfloat_cons (kind) | |
4894 | int kind; | |
4895 | { | |
ef6a2b41 | 4896 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
4897 | } |
4898 | ||
4899 | static void | |
4900 | dot_xstringer (zero) | |
4901 | int zero; | |
4902 | { | |
ef6a2b41 | 4903 | cross_section (zero, stringer, 0); |
800eeca4 JW |
4904 | } |
4905 | ||
4906 | static void | |
4907 | dot_xdata_ua (size) | |
4908 | int size; | |
4909 | { | |
ef6a2b41 | 4910 | cross_section (size, cons, 1); |
800eeca4 JW |
4911 | } |
4912 | ||
4913 | static void | |
4914 | dot_xfloat_cons_ua (kind) | |
4915 | int kind; | |
4916 | { | |
ef6a2b41 | 4917 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
4918 | } |
4919 | ||
4920 | /* .reg.val <regname>,value */ | |
542d6675 | 4921 | |
800eeca4 JW |
4922 | static void |
4923 | dot_reg_val (dummy) | |
2434f565 | 4924 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4925 | { |
4926 | expressionS reg; | |
4927 | ||
4928 | expression (®); | |
4929 | if (reg.X_op != O_register) | |
4930 | { | |
4931 | as_bad (_("Register name expected")); | |
4932 | ignore_rest_of_line (); | |
4933 | } | |
4934 | else if (*input_line_pointer++ != ',') | |
4935 | { | |
4936 | as_bad (_("Comma expected")); | |
4937 | ignore_rest_of_line (); | |
4938 | } | |
197865e8 | 4939 | else |
800eeca4 JW |
4940 | { |
4941 | valueT value = get_absolute_expression (); | |
4942 | int regno = reg.X_add_number; | |
a66d2bb7 | 4943 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 4944 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 4945 | else |
542d6675 KH |
4946 | { |
4947 | gr_values[regno - REG_GR].known = 1; | |
4948 | gr_values[regno - REG_GR].value = value; | |
4949 | gr_values[regno - REG_GR].path = md.path; | |
4950 | } | |
800eeca4 JW |
4951 | } |
4952 | demand_empty_rest_of_line (); | |
4953 | } | |
4954 | ||
5e819f9c JW |
4955 | /* |
4956 | .serialize.data | |
4957 | .serialize.instruction | |
4958 | */ | |
4959 | static void | |
4960 | dot_serialize (type) | |
4961 | int type; | |
4962 | { | |
4963 | insn_group_break (0, 0, 0); | |
4964 | if (type) | |
4965 | instruction_serialization (); | |
4966 | else | |
4967 | data_serialization (); | |
4968 | insn_group_break (0, 0, 0); | |
4969 | demand_empty_rest_of_line (); | |
4970 | } | |
4971 | ||
197865e8 | 4972 | /* select dv checking mode |
800eeca4 JW |
4973 | .auto |
4974 | .explicit | |
4975 | .default | |
4976 | ||
197865e8 | 4977 | A stop is inserted when changing modes |
800eeca4 | 4978 | */ |
542d6675 | 4979 | |
800eeca4 JW |
4980 | static void |
4981 | dot_dv_mode (type) | |
542d6675 | 4982 | int type; |
800eeca4 JW |
4983 | { |
4984 | if (md.manual_bundling) | |
4985 | as_warn (_("Directive invalid within a bundle")); | |
4986 | ||
4987 | if (type == 'E' || type == 'A') | |
4988 | md.mode_explicitly_set = 0; | |
4989 | else | |
4990 | md.mode_explicitly_set = 1; | |
4991 | ||
4992 | md.detect_dv = 1; | |
4993 | switch (type) | |
4994 | { | |
4995 | case 'A': | |
4996 | case 'a': | |
4997 | if (md.explicit_mode) | |
542d6675 | 4998 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4999 | md.explicit_mode = 0; |
5000 | break; | |
5001 | case 'E': | |
5002 | case 'e': | |
5003 | if (!md.explicit_mode) | |
542d6675 | 5004 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5005 | md.explicit_mode = 1; |
5006 | break; | |
5007 | default: | |
5008 | case 'd': | |
5009 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5010 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5011 | md.explicit_mode = md.default_explicit_mode; |
5012 | md.mode_explicitly_set = 0; | |
5013 | break; | |
5014 | } | |
5015 | } | |
5016 | ||
5017 | static void | |
5018 | print_prmask (mask) | |
542d6675 | 5019 | valueT mask; |
800eeca4 JW |
5020 | { |
5021 | int regno; | |
5022 | char *comma = ""; | |
542d6675 | 5023 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5024 | { |
542d6675 KH |
5025 | if (mask & ((valueT) 1 << regno)) |
5026 | { | |
5027 | fprintf (stderr, "%s p%d", comma, regno); | |
5028 | comma = ","; | |
5029 | } | |
800eeca4 JW |
5030 | } |
5031 | } | |
5032 | ||
5033 | /* | |
05ee4b0f JB |
5034 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5035 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5036 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5037 | .pred.safe_across_calls p1 [, p2 [,...]] |
5038 | */ | |
542d6675 | 5039 | |
800eeca4 JW |
5040 | static void |
5041 | dot_pred_rel (type) | |
542d6675 | 5042 | int type; |
800eeca4 JW |
5043 | { |
5044 | valueT mask = 0; | |
5045 | int count = 0; | |
5046 | int p1 = -1, p2 = -1; | |
5047 | ||
5048 | if (type == 0) | |
5049 | { | |
05ee4b0f | 5050 | if (*input_line_pointer == '"') |
542d6675 KH |
5051 | { |
5052 | int len; | |
5053 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5054 | |
542d6675 KH |
5055 | if (strcmp (form, "mutex") == 0) |
5056 | type = 'm'; | |
5057 | else if (strcmp (form, "clear") == 0) | |
5058 | type = 'c'; | |
5059 | else if (strcmp (form, "imply") == 0) | |
5060 | type = 'i'; | |
05ee4b0f JB |
5061 | obstack_free (¬es, form); |
5062 | } | |
5063 | else if (*input_line_pointer == '@') | |
5064 | { | |
5065 | char *form = ++input_line_pointer; | |
5066 | char c = get_symbol_end(); | |
5067 | ||
5068 | if (strcmp (form, "mutex") == 0) | |
5069 | type = 'm'; | |
5070 | else if (strcmp (form, "clear") == 0) | |
5071 | type = 'c'; | |
5072 | else if (strcmp (form, "imply") == 0) | |
5073 | type = 'i'; | |
5074 | *input_line_pointer = c; | |
5075 | } | |
5076 | else | |
5077 | { | |
5078 | as_bad (_("Missing predicate relation type")); | |
5079 | ignore_rest_of_line (); | |
5080 | return; | |
5081 | } | |
5082 | if (type == 0) | |
5083 | { | |
5084 | as_bad (_("Unrecognized predicate relation type")); | |
5085 | ignore_rest_of_line (); | |
5086 | return; | |
542d6675 | 5087 | } |
800eeca4 | 5088 | if (*input_line_pointer == ',') |
542d6675 | 5089 | ++input_line_pointer; |
800eeca4 JW |
5090 | SKIP_WHITESPACE (); |
5091 | } | |
5092 | ||
5093 | SKIP_WHITESPACE (); | |
5094 | while (1) | |
5095 | { | |
20b36a95 | 5096 | valueT bits = 1; |
800eeca4 | 5097 | int regno; |
20b36a95 JB |
5098 | expressionS pr, *pr1, *pr2; |
5099 | ||
5100 | expression (&pr); | |
5101 | if (pr.X_op == O_register | |
5102 | && pr.X_add_number >= REG_P | |
5103 | && pr.X_add_number <= REG_P + 63) | |
5104 | { | |
5105 | regno = pr.X_add_number - REG_P; | |
5106 | bits <<= regno; | |
5107 | count++; | |
5108 | if (p1 == -1) | |
5109 | p1 = regno; | |
5110 | else if (p2 == -1) | |
5111 | p2 = regno; | |
5112 | } | |
5113 | else if (type != 'i' | |
5114 | && pr.X_op == O_subtract | |
5115 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5116 | && pr1->X_op == O_register | |
5117 | && pr1->X_add_number >= REG_P | |
5118 | && pr1->X_add_number <= REG_P + 63 | |
5119 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5120 | && pr2->X_op == O_register | |
5121 | && pr2->X_add_number >= REG_P | |
5122 | && pr2->X_add_number <= REG_P + 63) | |
5123 | { | |
5124 | /* It's a range. */ | |
5125 | int stop; | |
5126 | ||
5127 | regno = pr1->X_add_number - REG_P; | |
5128 | stop = pr2->X_add_number - REG_P; | |
5129 | if (regno >= stop) | |
542d6675 KH |
5130 | { |
5131 | as_bad (_("Bad register range")); | |
5132 | ignore_rest_of_line (); | |
5133 | return; | |
5134 | } | |
20b36a95 JB |
5135 | bits = ((bits << stop) << 1) - (bits << regno); |
5136 | count += stop - regno + 1; | |
5137 | } | |
5138 | else | |
5139 | { | |
5140 | as_bad (_("Predicate register expected")); | |
5141 | ignore_rest_of_line (); | |
5142 | return; | |
542d6675 | 5143 | } |
20b36a95 JB |
5144 | if (mask & bits) |
5145 | as_warn (_("Duplicate predicate register ignored")); | |
5146 | mask |= bits; | |
800eeca4 | 5147 | if (*input_line_pointer != ',') |
542d6675 | 5148 | break; |
800eeca4 JW |
5149 | ++input_line_pointer; |
5150 | SKIP_WHITESPACE (); | |
5151 | } | |
5152 | ||
5153 | switch (type) | |
5154 | { | |
5155 | case 'c': | |
5156 | if (count == 0) | |
542d6675 | 5157 | mask = ~(valueT) 0; |
800eeca4 | 5158 | clear_qp_mutex (mask); |
197865e8 | 5159 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5160 | break; |
5161 | case 'i': | |
5162 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5163 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5164 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5165 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5166 | else |
542d6675 | 5167 | add_qp_imply (p1, p2); |
800eeca4 JW |
5168 | break; |
5169 | case 'm': | |
5170 | if (count < 2) | |
542d6675 KH |
5171 | { |
5172 | as_bad (_("At least two PR arguments expected")); | |
5173 | break; | |
5174 | } | |
800eeca4 | 5175 | else if (mask & 1) |
542d6675 KH |
5176 | { |
5177 | as_bad (_("Use of p0 is not valid in this context")); | |
5178 | break; | |
5179 | } | |
800eeca4 JW |
5180 | add_qp_mutex (mask); |
5181 | break; | |
5182 | case 's': | |
5183 | /* note that we don't override any existing relations */ | |
5184 | if (count == 0) | |
542d6675 KH |
5185 | { |
5186 | as_bad (_("At least one PR argument expected")); | |
5187 | break; | |
5188 | } | |
800eeca4 | 5189 | if (md.debug_dv) |
542d6675 KH |
5190 | { |
5191 | fprintf (stderr, "Safe across calls: "); | |
5192 | print_prmask (mask); | |
5193 | fprintf (stderr, "\n"); | |
5194 | } | |
800eeca4 JW |
5195 | qp_safe_across_calls = mask; |
5196 | break; | |
5197 | } | |
5198 | demand_empty_rest_of_line (); | |
5199 | } | |
5200 | ||
5201 | /* .entry label [, label [, ...]] | |
5202 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5203 | Otherwise, only global labels are considered entry points. */ |
5204 | ||
800eeca4 JW |
5205 | static void |
5206 | dot_entry (dummy) | |
2434f565 | 5207 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5208 | { |
5209 | const char *err; | |
5210 | char *name; | |
5211 | int c; | |
5212 | symbolS *symbolP; | |
5213 | ||
5214 | do | |
5215 | { | |
5216 | name = input_line_pointer; | |
5217 | c = get_symbol_end (); | |
5218 | symbolP = symbol_find_or_make (name); | |
5219 | ||
5220 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
5221 | if (err) | |
542d6675 KH |
5222 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5223 | name, err); | |
800eeca4 JW |
5224 | |
5225 | *input_line_pointer = c; | |
5226 | SKIP_WHITESPACE (); | |
5227 | c = *input_line_pointer; | |
5228 | if (c == ',') | |
5229 | { | |
5230 | input_line_pointer++; | |
5231 | SKIP_WHITESPACE (); | |
5232 | if (*input_line_pointer == '\n') | |
5233 | c = '\n'; | |
5234 | } | |
5235 | } | |
5236 | while (c == ','); | |
5237 | ||
5238 | demand_empty_rest_of_line (); | |
5239 | } | |
5240 | ||
197865e8 | 5241 | /* .mem.offset offset, base |
542d6675 KH |
5242 | "base" is used to distinguish between offsets from a different base. */ |
5243 | ||
800eeca4 JW |
5244 | static void |
5245 | dot_mem_offset (dummy) | |
2434f565 | 5246 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5247 | { |
5248 | md.mem_offset.hint = 1; | |
5249 | md.mem_offset.offset = get_absolute_expression (); | |
5250 | if (*input_line_pointer != ',') | |
5251 | { | |
5252 | as_bad (_("Comma expected")); | |
5253 | ignore_rest_of_line (); | |
5254 | return; | |
5255 | } | |
5256 | ++input_line_pointer; | |
5257 | md.mem_offset.base = get_absolute_expression (); | |
5258 | demand_empty_rest_of_line (); | |
5259 | } | |
5260 | ||
542d6675 | 5261 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5262 | const pseudo_typeS md_pseudo_table[] = |
5263 | { | |
5264 | { "radix", dot_radix, 0 }, | |
5265 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5266 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5267 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5268 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5269 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5270 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5271 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5272 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5273 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5274 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5275 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5276 | { "proc", dot_proc, 0 }, |
5277 | { "body", dot_body, 0 }, | |
5278 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5279 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5280 | |
5281 | { "fframe", dot_fframe, 0 }, | |
5282 | { "vframe", dot_vframe, 0 }, | |
5283 | { "vframesp", dot_vframesp, 0 }, | |
5284 | { "vframepsp", dot_vframepsp, 0 }, | |
5285 | { "save", dot_save, 0 }, | |
5286 | { "restore", dot_restore, 0 }, | |
5287 | { "restorereg", dot_restorereg, 0 }, | |
5288 | { "restorereg.p", dot_restorereg_p, 0 }, | |
5289 | { "handlerdata", dot_handlerdata, 0 }, | |
5290 | { "unwentry", dot_unwentry, 0 }, | |
5291 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5292 | { "savesp", dot_savemem, 0 }, |
5293 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5294 | { "save.g", dot_saveg, 0 }, |
5295 | { "save.f", dot_savef, 0 }, | |
5296 | { "save.b", dot_saveb, 0 }, | |
5297 | { "save.gf", dot_savegf, 0 }, | |
5298 | { "spill", dot_spill, 0 }, | |
5299 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5300 | { "spillsp", dot_spillmem, 0 }, |
5301 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 5302 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
5303 | { "spillsp.p", dot_spillmem_p, 0 }, |
5304 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
5305 | { "label_state", dot_label_state, 0 }, |
5306 | { "copy_state", dot_copy_state, 0 }, | |
5307 | { "unwabi", dot_unwabi, 0 }, | |
5308 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5309 | { "mii", dot_template, 0x0 }, |
5310 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5311 | { "mlx", dot_template, 0x2 }, | |
5312 | { "mmi", dot_template, 0x4 }, | |
5313 | { "mfi", dot_template, 0x6 }, | |
5314 | { "mmf", dot_template, 0x7 }, | |
5315 | { "mib", dot_template, 0x8 }, | |
5316 | { "mbb", dot_template, 0x9 }, | |
5317 | { "bbb", dot_template, 0xb }, | |
5318 | { "mmb", dot_template, 0xc }, | |
5319 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5320 | { "align", dot_align, 0 }, |
800eeca4 JW |
5321 | { "regstk", dot_regstk, 0 }, |
5322 | { "rotr", dot_rot, DYNREG_GR }, | |
5323 | { "rotf", dot_rot, DYNREG_FR }, | |
5324 | { "rotp", dot_rot, DYNREG_PR }, | |
5325 | { "lsb", dot_byteorder, 0 }, | |
5326 | { "msb", dot_byteorder, 1 }, | |
5327 | { "psr", dot_psr, 0 }, | |
5328 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5329 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5330 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5331 | ||
5332 | { "xdata1", dot_xdata, 1 }, | |
5333 | { "xdata2", dot_xdata, 2 }, | |
5334 | { "xdata4", dot_xdata, 4 }, | |
5335 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5336 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5337 | { "xreal4", dot_xfloat_cons, 'f' }, |
5338 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5339 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5340 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5341 | { "xstring", dot_xstringer, 0 }, |
5342 | { "xstringz", dot_xstringer, 1 }, | |
5343 | ||
542d6675 | 5344 | /* unaligned versions: */ |
800eeca4 JW |
5345 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5346 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5347 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5348 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5349 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5350 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5351 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5352 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5353 | |
5354 | /* annotations/DV checking support */ | |
5355 | { "entry", dot_entry, 0 }, | |
2434f565 | 5356 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5357 | { "pred.rel", dot_pred_rel, 0 }, |
5358 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5359 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5360 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5361 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5362 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5363 | { "serialize.data", dot_serialize, 0 }, |
5364 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5365 | { "auto", dot_dv_mode, 'a' }, |
5366 | { "explicit", dot_dv_mode, 'e' }, | |
5367 | { "default", dot_dv_mode, 'd' }, | |
5368 | ||
87885043 JW |
5369 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5370 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5371 | tell it that these ones are supposed to be unaligned. Long term, | |
5372 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5373 | are aligned by default. */ | |
5374 | {"2byte", stmt_cons_ua, 2}, | |
5375 | {"4byte", stmt_cons_ua, 4}, | |
5376 | {"8byte", stmt_cons_ua, 8}, | |
5377 | ||
800eeca4 JW |
5378 | { NULL, 0, 0 } |
5379 | }; | |
5380 | ||
5381 | static const struct pseudo_opcode | |
5382 | { | |
5383 | const char *name; | |
5384 | void (*handler) (int); | |
5385 | int arg; | |
5386 | } | |
5387 | pseudo_opcode[] = | |
5388 | { | |
5389 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5390 | { "data1", cons, 1 }, | |
5391 | { "data2", cons, 2 }, | |
5392 | { "data4", cons, 4 }, | |
5393 | { "data8", cons, 8 }, | |
3969b680 | 5394 | { "data16", cons, 16 }, |
800eeca4 JW |
5395 | { "real4", stmt_float_cons, 'f' }, |
5396 | { "real8", stmt_float_cons, 'd' }, | |
5397 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5398 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5399 | { "string", stringer, 0 }, |
5400 | { "stringz", stringer, 1 }, | |
5401 | ||
542d6675 | 5402 | /* unaligned versions: */ |
800eeca4 JW |
5403 | { "data2.ua", stmt_cons_ua, 2 }, |
5404 | { "data4.ua", stmt_cons_ua, 4 }, | |
5405 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5406 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5407 | { "real4.ua", float_cons, 'f' }, |
5408 | { "real8.ua", float_cons, 'd' }, | |
5409 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5410 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5411 | }; |
5412 | ||
5413 | /* Declare a register by creating a symbol for it and entering it in | |
5414 | the symbol table. */ | |
542d6675 KH |
5415 | |
5416 | static symbolS * | |
800eeca4 JW |
5417 | declare_register (name, regnum) |
5418 | const char *name; | |
5419 | int regnum; | |
5420 | { | |
5421 | const char *err; | |
5422 | symbolS *sym; | |
5423 | ||
5424 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5425 | ||
5426 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5427 | if (err) | |
5428 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5429 | name, err); | |
5430 | ||
5431 | return sym; | |
5432 | } | |
5433 | ||
5434 | static void | |
5435 | declare_register_set (prefix, num_regs, base_regnum) | |
5436 | const char *prefix; | |
5437 | int num_regs; | |
5438 | int base_regnum; | |
5439 | { | |
5440 | char name[8]; | |
5441 | int i; | |
5442 | ||
5443 | for (i = 0; i < num_regs; ++i) | |
5444 | { | |
5445 | sprintf (name, "%s%u", prefix, i); | |
5446 | declare_register (name, base_regnum + i); | |
5447 | } | |
5448 | } | |
5449 | ||
5450 | static unsigned int | |
5451 | operand_width (opnd) | |
5452 | enum ia64_opnd opnd; | |
5453 | { | |
5454 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5455 | unsigned int bits = 0; | |
5456 | int i; | |
5457 | ||
5458 | bits = 0; | |
5459 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5460 | bits += odesc->field[i].bits; | |
5461 | ||
5462 | return bits; | |
5463 | } | |
5464 | ||
87f8eb97 | 5465 | static enum operand_match_result |
800eeca4 JW |
5466 | operand_match (idesc, index, e) |
5467 | const struct ia64_opcode *idesc; | |
5468 | int index; | |
5469 | expressionS *e; | |
5470 | { | |
5471 | enum ia64_opnd opnd = idesc->operands[index]; | |
5472 | int bits, relocatable = 0; | |
5473 | struct insn_fix *fix; | |
5474 | bfd_signed_vma val; | |
5475 | ||
5476 | switch (opnd) | |
5477 | { | |
542d6675 | 5478 | /* constants: */ |
800eeca4 JW |
5479 | |
5480 | case IA64_OPND_AR_CCV: | |
5481 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5482 | return OPERAND_MATCH; |
800eeca4 JW |
5483 | break; |
5484 | ||
c10d9d8f JW |
5485 | case IA64_OPND_AR_CSD: |
5486 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5487 | return OPERAND_MATCH; | |
5488 | break; | |
5489 | ||
800eeca4 JW |
5490 | case IA64_OPND_AR_PFS: |
5491 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5492 | return OPERAND_MATCH; |
800eeca4 JW |
5493 | break; |
5494 | ||
5495 | case IA64_OPND_GR0: | |
5496 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5497 | return OPERAND_MATCH; |
800eeca4 JW |
5498 | break; |
5499 | ||
5500 | case IA64_OPND_IP: | |
5501 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5502 | return OPERAND_MATCH; |
800eeca4 JW |
5503 | break; |
5504 | ||
5505 | case IA64_OPND_PR: | |
5506 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5507 | return OPERAND_MATCH; |
800eeca4 JW |
5508 | break; |
5509 | ||
5510 | case IA64_OPND_PR_ROT: | |
5511 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5512 | return OPERAND_MATCH; |
800eeca4 JW |
5513 | break; |
5514 | ||
5515 | case IA64_OPND_PSR: | |
5516 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5517 | return OPERAND_MATCH; |
800eeca4 JW |
5518 | break; |
5519 | ||
5520 | case IA64_OPND_PSR_L: | |
5521 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5522 | return OPERAND_MATCH; |
800eeca4 JW |
5523 | break; |
5524 | ||
5525 | case IA64_OPND_PSR_UM: | |
5526 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5527 | return OPERAND_MATCH; |
800eeca4 JW |
5528 | break; |
5529 | ||
5530 | case IA64_OPND_C1: | |
87f8eb97 JW |
5531 | if (e->X_op == O_constant) |
5532 | { | |
5533 | if (e->X_add_number == 1) | |
5534 | return OPERAND_MATCH; | |
5535 | else | |
5536 | return OPERAND_OUT_OF_RANGE; | |
5537 | } | |
800eeca4 JW |
5538 | break; |
5539 | ||
5540 | case IA64_OPND_C8: | |
87f8eb97 JW |
5541 | if (e->X_op == O_constant) |
5542 | { | |
5543 | if (e->X_add_number == 8) | |
5544 | return OPERAND_MATCH; | |
5545 | else | |
5546 | return OPERAND_OUT_OF_RANGE; | |
5547 | } | |
800eeca4 JW |
5548 | break; |
5549 | ||
5550 | case IA64_OPND_C16: | |
87f8eb97 JW |
5551 | if (e->X_op == O_constant) |
5552 | { | |
5553 | if (e->X_add_number == 16) | |
5554 | return OPERAND_MATCH; | |
5555 | else | |
5556 | return OPERAND_OUT_OF_RANGE; | |
5557 | } | |
800eeca4 JW |
5558 | break; |
5559 | ||
542d6675 | 5560 | /* register operands: */ |
800eeca4 JW |
5561 | |
5562 | case IA64_OPND_AR3: | |
5563 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5564 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5565 | return OPERAND_MATCH; |
800eeca4 JW |
5566 | break; |
5567 | ||
5568 | case IA64_OPND_B1: | |
5569 | case IA64_OPND_B2: | |
5570 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5571 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5572 | return OPERAND_MATCH; |
800eeca4 JW |
5573 | break; |
5574 | ||
5575 | case IA64_OPND_CR3: | |
5576 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5577 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5578 | return OPERAND_MATCH; |
800eeca4 JW |
5579 | break; |
5580 | ||
5581 | case IA64_OPND_F1: | |
5582 | case IA64_OPND_F2: | |
5583 | case IA64_OPND_F3: | |
5584 | case IA64_OPND_F4: | |
5585 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5586 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5587 | return OPERAND_MATCH; |
800eeca4 JW |
5588 | break; |
5589 | ||
5590 | case IA64_OPND_P1: | |
5591 | case IA64_OPND_P2: | |
5592 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5593 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5594 | return OPERAND_MATCH; |
800eeca4 JW |
5595 | break; |
5596 | ||
5597 | case IA64_OPND_R1: | |
5598 | case IA64_OPND_R2: | |
5599 | case IA64_OPND_R3: | |
5600 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5601 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5602 | return OPERAND_MATCH; |
800eeca4 JW |
5603 | break; |
5604 | ||
5605 | case IA64_OPND_R3_2: | |
87f8eb97 | 5606 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5607 | { |
87f8eb97 JW |
5608 | if (e->X_add_number < REG_GR + 4) |
5609 | return OPERAND_MATCH; | |
5610 | else if (e->X_add_number < REG_GR + 128) | |
5611 | return OPERAND_OUT_OF_RANGE; | |
5612 | } | |
800eeca4 JW |
5613 | break; |
5614 | ||
542d6675 | 5615 | /* indirect operands: */ |
800eeca4 JW |
5616 | case IA64_OPND_CPUID_R3: |
5617 | case IA64_OPND_DBR_R3: | |
5618 | case IA64_OPND_DTR_R3: | |
5619 | case IA64_OPND_ITR_R3: | |
5620 | case IA64_OPND_IBR_R3: | |
5621 | case IA64_OPND_MSR_R3: | |
5622 | case IA64_OPND_PKR_R3: | |
5623 | case IA64_OPND_PMC_R3: | |
5624 | case IA64_OPND_PMD_R3: | |
5625 | case IA64_OPND_RR_R3: | |
5626 | if (e->X_op == O_index && e->X_op_symbol | |
5627 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5628 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5629 | return OPERAND_MATCH; |
800eeca4 JW |
5630 | break; |
5631 | ||
5632 | case IA64_OPND_MR3: | |
5633 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5634 | return OPERAND_MATCH; |
800eeca4 JW |
5635 | break; |
5636 | ||
542d6675 | 5637 | /* immediate operands: */ |
800eeca4 JW |
5638 | case IA64_OPND_CNT2a: |
5639 | case IA64_OPND_LEN4: | |
5640 | case IA64_OPND_LEN6: | |
5641 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5642 | if (e->X_op == O_constant) |
5643 | { | |
5644 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5645 | return OPERAND_MATCH; | |
5646 | else | |
5647 | return OPERAND_OUT_OF_RANGE; | |
5648 | } | |
800eeca4 JW |
5649 | break; |
5650 | ||
5651 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5652 | if (e->X_op == O_constant) |
5653 | { | |
5654 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5655 | return OPERAND_MATCH; | |
5656 | else | |
5657 | return OPERAND_OUT_OF_RANGE; | |
5658 | } | |
800eeca4 JW |
5659 | break; |
5660 | ||
5661 | case IA64_OPND_CNT2c: | |
5662 | val = e->X_add_number; | |
87f8eb97 JW |
5663 | if (e->X_op == O_constant) |
5664 | { | |
5665 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5666 | return OPERAND_MATCH; | |
5667 | else | |
5668 | return OPERAND_OUT_OF_RANGE; | |
5669 | } | |
800eeca4 JW |
5670 | break; |
5671 | ||
5672 | case IA64_OPND_SOR: | |
5673 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5674 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5675 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5676 | case IA64_OPND_SOF: |
5677 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5678 | if (e->X_op == O_constant) |
5679 | { | |
5680 | if ((bfd_vma) e->X_add_number <= 96) | |
5681 | return OPERAND_MATCH; | |
5682 | else | |
5683 | return OPERAND_OUT_OF_RANGE; | |
5684 | } | |
800eeca4 JW |
5685 | break; |
5686 | ||
5687 | case IA64_OPND_IMMU62: | |
5688 | if (e->X_op == O_constant) | |
542d6675 | 5689 | { |
800eeca4 | 5690 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5691 | return OPERAND_MATCH; |
5692 | else | |
5693 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5694 | } |
197865e8 | 5695 | else |
542d6675 KH |
5696 | { |
5697 | /* FIXME -- need 62-bit relocation type */ | |
5698 | as_bad (_("62-bit relocation not yet implemented")); | |
5699 | } | |
800eeca4 JW |
5700 | break; |
5701 | ||
5702 | case IA64_OPND_IMMU64: | |
5703 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5704 | || e->X_op == O_subtract) | |
5705 | { | |
5706 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5707 | fix->code = BFD_RELOC_IA64_IMM64; | |
5708 | if (e->X_op != O_subtract) | |
5709 | { | |
5710 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5711 | if (e->X_op == O_pseudo_fixup) | |
5712 | e->X_op = O_symbol; | |
5713 | } | |
5714 | ||
5715 | fix->opnd = idesc->operands[index]; | |
5716 | fix->expr = *e; | |
5717 | fix->is_pcrel = 0; | |
5718 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5719 | return OPERAND_MATCH; |
800eeca4 JW |
5720 | } |
5721 | else if (e->X_op == O_constant) | |
87f8eb97 | 5722 | return OPERAND_MATCH; |
800eeca4 JW |
5723 | break; |
5724 | ||
5725 | case IA64_OPND_CCNT5: | |
5726 | case IA64_OPND_CNT5: | |
5727 | case IA64_OPND_CNT6: | |
5728 | case IA64_OPND_CPOS6a: | |
5729 | case IA64_OPND_CPOS6b: | |
5730 | case IA64_OPND_CPOS6c: | |
5731 | case IA64_OPND_IMMU2: | |
5732 | case IA64_OPND_IMMU7a: | |
5733 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5734 | case IA64_OPND_IMMU21: |
5735 | case IA64_OPND_IMMU24: | |
5736 | case IA64_OPND_MBTYPE4: | |
5737 | case IA64_OPND_MHTYPE8: | |
5738 | case IA64_OPND_POS6: | |
5739 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5740 | if (e->X_op == O_constant) |
5741 | { | |
5742 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5743 | return OPERAND_MATCH; | |
5744 | else | |
5745 | return OPERAND_OUT_OF_RANGE; | |
5746 | } | |
800eeca4 JW |
5747 | break; |
5748 | ||
bf3ca999 TW |
5749 | case IA64_OPND_IMMU9: |
5750 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5751 | if (e->X_op == O_constant) |
542d6675 | 5752 | { |
87f8eb97 JW |
5753 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5754 | { | |
5755 | int lobits = e->X_add_number & 0x3; | |
5756 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5757 | e->X_add_number |= (bfd_vma) 0x3; | |
5758 | return OPERAND_MATCH; | |
5759 | } | |
5760 | else | |
5761 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5762 | } |
bf3ca999 TW |
5763 | break; |
5764 | ||
800eeca4 JW |
5765 | case IA64_OPND_IMM44: |
5766 | /* least 16 bits must be zero */ | |
5767 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5768 | /* XXX technically, this is wrong: we should not be issuing warning |
5769 | messages until we're sure this instruction pattern is going to | |
5770 | be used! */ | |
542d6675 | 5771 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5772 | |
87f8eb97 | 5773 | if (e->X_op == O_constant) |
542d6675 | 5774 | { |
87f8eb97 JW |
5775 | if (((e->X_add_number >= 0 |
5776 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5777 | || (e->X_add_number < 0 | |
5778 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5779 | { |
87f8eb97 JW |
5780 | /* sign-extend */ |
5781 | if (e->X_add_number >= 0 | |
5782 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5783 | { | |
5784 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5785 | } | |
5786 | return OPERAND_MATCH; | |
542d6675 | 5787 | } |
87f8eb97 JW |
5788 | else |
5789 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5790 | } |
800eeca4 JW |
5791 | break; |
5792 | ||
5793 | case IA64_OPND_IMM17: | |
5794 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5795 | if (e->X_op == O_constant) |
542d6675 | 5796 | { |
87f8eb97 JW |
5797 | if (((e->X_add_number >= 0 |
5798 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5799 | || (e->X_add_number < 0 | |
5800 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5801 | { |
87f8eb97 JW |
5802 | /* sign-extend */ |
5803 | if (e->X_add_number >= 0 | |
5804 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5805 | { | |
5806 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5807 | } | |
5808 | return OPERAND_MATCH; | |
542d6675 | 5809 | } |
87f8eb97 JW |
5810 | else |
5811 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5812 | } |
800eeca4 JW |
5813 | break; |
5814 | ||
5815 | case IA64_OPND_IMM14: | |
5816 | case IA64_OPND_IMM22: | |
5817 | relocatable = 1; | |
5818 | case IA64_OPND_IMM1: | |
5819 | case IA64_OPND_IMM8: | |
5820 | case IA64_OPND_IMM8U4: | |
5821 | case IA64_OPND_IMM8M1: | |
5822 | case IA64_OPND_IMM8M1U4: | |
5823 | case IA64_OPND_IMM8M1U8: | |
5824 | case IA64_OPND_IMM9a: | |
5825 | case IA64_OPND_IMM9b: | |
5826 | bits = operand_width (idesc->operands[index]); | |
5827 | if (relocatable && (e->X_op == O_symbol | |
5828 | || e->X_op == O_subtract | |
5829 | || e->X_op == O_pseudo_fixup)) | |
5830 | { | |
5831 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5832 | ||
5833 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5834 | fix->code = BFD_RELOC_IA64_IMM14; | |
5835 | else | |
5836 | fix->code = BFD_RELOC_IA64_IMM22; | |
5837 | ||
5838 | if (e->X_op != O_subtract) | |
5839 | { | |
5840 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5841 | if (e->X_op == O_pseudo_fixup) | |
5842 | e->X_op = O_symbol; | |
5843 | } | |
5844 | ||
5845 | fix->opnd = idesc->operands[index]; | |
5846 | fix->expr = *e; | |
5847 | fix->is_pcrel = 0; | |
5848 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5849 | return OPERAND_MATCH; |
800eeca4 JW |
5850 | } |
5851 | else if (e->X_op != O_constant | |
5852 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5853 | return OPERAND_MISMATCH; |
800eeca4 JW |
5854 | |
5855 | if (opnd == IA64_OPND_IMM8M1U4) | |
5856 | { | |
5857 | /* Zero is not valid for unsigned compares that take an adjusted | |
5858 | constant immediate range. */ | |
5859 | if (e->X_add_number == 0) | |
87f8eb97 | 5860 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5861 | |
5862 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5863 | checks will work. */ | |
5864 | val = e->X_add_number; | |
197865e8 KH |
5865 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5866 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5867 | val = ((val << 32) >> 32); |
5868 | ||
5869 | /* Check for 0x100000000. This is valid because | |
5870 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5871 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5872 | return OPERAND_MATCH; |
800eeca4 JW |
5873 | |
5874 | val = val - 1; | |
5875 | } | |
5876 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5877 | { | |
5878 | /* Zero is not valid for unsigned compares that take an adjusted | |
5879 | constant immediate range. */ | |
5880 | if (e->X_add_number == 0) | |
87f8eb97 | 5881 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5882 | |
5883 | /* Check for 0x10000000000000000. */ | |
5884 | if (e->X_op == O_big) | |
5885 | { | |
5886 | if (generic_bignum[0] == 0 | |
5887 | && generic_bignum[1] == 0 | |
5888 | && generic_bignum[2] == 0 | |
5889 | && generic_bignum[3] == 0 | |
5890 | && generic_bignum[4] == 1) | |
87f8eb97 | 5891 | return OPERAND_MATCH; |
800eeca4 | 5892 | else |
87f8eb97 | 5893 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5894 | } |
5895 | else | |
5896 | val = e->X_add_number - 1; | |
5897 | } | |
5898 | else if (opnd == IA64_OPND_IMM8M1) | |
5899 | val = e->X_add_number - 1; | |
5900 | else if (opnd == IA64_OPND_IMM8U4) | |
5901 | { | |
5902 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5903 | checks will work. */ | |
5904 | val = e->X_add_number; | |
197865e8 KH |
5905 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5906 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5907 | val = ((val << 32) >> 32); |
5908 | } | |
5909 | else | |
5910 | val = e->X_add_number; | |
5911 | ||
2434f565 JW |
5912 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5913 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5914 | return OPERAND_MATCH; |
5915 | else | |
5916 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5917 | |
5918 | case IA64_OPND_INC3: | |
5919 | /* +/- 1, 4, 8, 16 */ | |
5920 | val = e->X_add_number; | |
5921 | if (val < 0) | |
5922 | val = -val; | |
87f8eb97 JW |
5923 | if (e->X_op == O_constant) |
5924 | { | |
5925 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5926 | return OPERAND_MATCH; | |
5927 | else | |
5928 | return OPERAND_OUT_OF_RANGE; | |
5929 | } | |
800eeca4 JW |
5930 | break; |
5931 | ||
5932 | case IA64_OPND_TGT25: | |
5933 | case IA64_OPND_TGT25b: | |
5934 | case IA64_OPND_TGT25c: | |
5935 | case IA64_OPND_TGT64: | |
5936 | if (e->X_op == O_symbol) | |
5937 | { | |
5938 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5939 | if (opnd == IA64_OPND_TGT25) | |
5940 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5941 | else if (opnd == IA64_OPND_TGT25b) | |
5942 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5943 | else if (opnd == IA64_OPND_TGT25c) | |
5944 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5945 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5946 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5947 | else | |
5948 | abort (); | |
5949 | ||
800eeca4 JW |
5950 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5951 | fix->opnd = idesc->operands[index]; | |
5952 | fix->expr = *e; | |
5953 | fix->is_pcrel = 1; | |
5954 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5955 | return OPERAND_MATCH; |
800eeca4 JW |
5956 | } |
5957 | case IA64_OPND_TAG13: | |
5958 | case IA64_OPND_TAG13b: | |
5959 | switch (e->X_op) | |
5960 | { | |
5961 | case O_constant: | |
87f8eb97 | 5962 | return OPERAND_MATCH; |
800eeca4 JW |
5963 | |
5964 | case O_symbol: | |
5965 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5966 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5967 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5968 | fix->code = BFD_RELOC_UNUSED; | |
5969 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5970 | fix->opnd = idesc->operands[index]; |
5971 | fix->expr = *e; | |
5972 | fix->is_pcrel = 1; | |
5973 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5974 | return OPERAND_MATCH; |
800eeca4 JW |
5975 | |
5976 | default: | |
5977 | break; | |
5978 | } | |
5979 | break; | |
5980 | ||
a823923b RH |
5981 | case IA64_OPND_LDXMOV: |
5982 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5983 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5984 | fix->opnd = idesc->operands[index]; | |
5985 | fix->expr = *e; | |
5986 | fix->is_pcrel = 0; | |
5987 | ++CURR_SLOT.num_fixups; | |
5988 | return OPERAND_MATCH; | |
5989 | ||
800eeca4 JW |
5990 | default: |
5991 | break; | |
5992 | } | |
87f8eb97 | 5993 | return OPERAND_MISMATCH; |
800eeca4 JW |
5994 | } |
5995 | ||
5996 | static int | |
5997 | parse_operand (e) | |
5998 | expressionS *e; | |
5999 | { | |
6000 | int sep = '\0'; | |
6001 | ||
6002 | memset (e, 0, sizeof (*e)); | |
6003 | e->X_op = O_absent; | |
6004 | SKIP_WHITESPACE (); | |
6005 | if (*input_line_pointer != '}') | |
6006 | expression (e); | |
6007 | sep = *input_line_pointer++; | |
6008 | ||
6009 | if (sep == '}') | |
6010 | { | |
6011 | if (!md.manual_bundling) | |
6012 | as_warn ("Found '}' when manual bundling is off"); | |
6013 | else | |
6014 | CURR_SLOT.manual_bundling_off = 1; | |
6015 | md.manual_bundling = 0; | |
6016 | sep = '\0'; | |
6017 | } | |
6018 | return sep; | |
6019 | } | |
6020 | ||
6021 | /* Returns the next entry in the opcode table that matches the one in | |
6022 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6023 | found, NULL is returned instead. */ |
800eeca4 JW |
6024 | |
6025 | static struct ia64_opcode * | |
6026 | get_next_opcode (struct ia64_opcode *idesc) | |
6027 | { | |
6028 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6029 | ia64_free_opcode (idesc); | |
6030 | return next; | |
6031 | } | |
6032 | ||
6033 | /* Parse the operands for the opcode and find the opcode variant that | |
6034 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6035 | |
6036 | static struct ia64_opcode * | |
800eeca4 JW |
6037 | parse_operands (idesc) |
6038 | struct ia64_opcode *idesc; | |
6039 | { | |
6040 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6041 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6042 | int reg1, reg2; |
6043 | char reg_class; | |
800eeca4 | 6044 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6045 | enum operand_match_result result; |
800eeca4 JW |
6046 | char mnemonic[129]; |
6047 | char *first_arg = 0, *end, *saved_input_pointer; | |
6048 | unsigned int sof; | |
6049 | ||
6050 | assert (strlen (idesc->name) <= 128); | |
6051 | ||
6052 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6053 | if (idesc->operands[2] == IA64_OPND_SOF |
6054 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6055 | { |
6056 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6057 | can't parse the first operand until we have parsed the | |
6058 | remaining operands of the "alloc" instruction. */ | |
6059 | SKIP_WHITESPACE (); | |
6060 | first_arg = input_line_pointer; | |
6061 | end = strchr (input_line_pointer, '='); | |
6062 | if (!end) | |
6063 | { | |
6064 | as_bad ("Expected separator `='"); | |
6065 | return 0; | |
6066 | } | |
6067 | input_line_pointer = end + 1; | |
6068 | ++i; | |
6069 | ++num_outputs; | |
6070 | } | |
6071 | ||
d3156ecc | 6072 | for (; ; ++i) |
800eeca4 | 6073 | { |
d3156ecc JB |
6074 | if (i < NELEMS (CURR_SLOT.opnd)) |
6075 | { | |
6076 | sep = parse_operand (CURR_SLOT.opnd + i); | |
6077 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
6078 | break; | |
6079 | } | |
6080 | else | |
6081 | { | |
6082 | expressionS dummy; | |
6083 | ||
6084 | sep = parse_operand (&dummy); | |
6085 | if (dummy.X_op == O_absent) | |
6086 | break; | |
6087 | } | |
800eeca4 JW |
6088 | |
6089 | ++num_operands; | |
6090 | ||
6091 | if (sep != '=' && sep != ',') | |
6092 | break; | |
6093 | ||
6094 | if (sep == '=') | |
6095 | { | |
6096 | if (num_outputs > 0) | |
6097 | as_bad ("Duplicate equal sign (=) in instruction"); | |
6098 | else | |
6099 | num_outputs = i + 1; | |
6100 | } | |
6101 | } | |
6102 | if (sep != '\0') | |
6103 | { | |
6104 | as_bad ("Illegal operand separator `%c'", sep); | |
6105 | return 0; | |
6106 | } | |
197865e8 | 6107 | |
60b9a617 JB |
6108 | if (idesc->operands[2] == IA64_OPND_SOF |
6109 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6110 | { |
6111 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
6112 | know (strcmp (idesc->name, "alloc") == 0); | |
60b9a617 JB |
6113 | i = (CURR_SLOT.opnd[1].X_op == O_register |
6114 | && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1; | |
6115 | if (num_operands == i + 3 /* first_arg not included in this count! */ | |
6116 | && CURR_SLOT.opnd[i].X_op == O_constant | |
6117 | && CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6118 | && CURR_SLOT.opnd[i + 2].X_op == O_constant | |
6119 | && CURR_SLOT.opnd[i + 3].X_op == O_constant) | |
800eeca4 | 6120 | { |
60b9a617 JB |
6121 | sof = set_regstack (CURR_SLOT.opnd[i].X_add_number, |
6122 | CURR_SLOT.opnd[i + 1].X_add_number, | |
6123 | CURR_SLOT.opnd[i + 2].X_add_number, | |
6124 | CURR_SLOT.opnd[i + 3].X_add_number); | |
800eeca4 | 6125 | |
542d6675 | 6126 | /* now we can parse the first arg: */ |
800eeca4 JW |
6127 | saved_input_pointer = input_line_pointer; |
6128 | input_line_pointer = first_arg; | |
6129 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
6130 | if (sep != '=') | |
6131 | --num_outputs; /* force error */ | |
6132 | input_line_pointer = saved_input_pointer; | |
6133 | ||
60b9a617 JB |
6134 | CURR_SLOT.opnd[i].X_add_number = sof; |
6135 | CURR_SLOT.opnd[i + 1].X_add_number | |
6136 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6137 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6138 | } |
6139 | } | |
6140 | ||
d3156ecc | 6141 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6142 | curr_out_of_range_pos = -1; |
6143 | error_pos = 0; | |
800eeca4 JW |
6144 | for (; idesc; idesc = get_next_opcode (idesc)) |
6145 | { | |
6146 | if (num_outputs != idesc->num_outputs) | |
6147 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6148 | if (highest_unmatched_operand < 0) |
6149 | highest_unmatched_operand |= 1; | |
6150 | if (num_operands > NELEMS (idesc->operands) | |
6151 | || (num_operands < NELEMS (idesc->operands) | |
6152 | && idesc->operands[num_operands]) | |
6153 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6154 | continue; /* mismatch in number of arguments */ | |
6155 | if (highest_unmatched_operand < 0) | |
6156 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6157 | |
6158 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6159 | |
6160 | /* Try to match all operands. If we see an out-of-range operand, | |
6161 | then continue trying to match the rest of the operands, since if | |
6162 | the rest match, then this idesc will give the best error message. */ | |
6163 | ||
6164 | out_of_range_pos = -1; | |
800eeca4 | 6165 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6166 | { |
6167 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6168 | if (result != OPERAND_MATCH) | |
6169 | { | |
6170 | if (result != OPERAND_OUT_OF_RANGE) | |
6171 | break; | |
6172 | if (out_of_range_pos < 0) | |
6173 | /* remember position of the first out-of-range operand: */ | |
6174 | out_of_range_pos = i; | |
6175 | } | |
6176 | } | |
800eeca4 | 6177 | |
87f8eb97 JW |
6178 | /* If we did not match all operands, or if at least one operand was |
6179 | out-of-range, then this idesc does not match. Keep track of which | |
6180 | idesc matched the most operands before failing. If we have two | |
6181 | idescs that failed at the same position, and one had an out-of-range | |
6182 | operand, then prefer the out-of-range operand. Thus if we have | |
6183 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6184 | of range instead of an error saying that the constant should have been | |
6185 | a register. */ | |
6186 | ||
6187 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6188 | { |
87f8eb97 JW |
6189 | if (i > highest_unmatched_operand |
6190 | || (i == highest_unmatched_operand | |
6191 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6192 | { |
6193 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6194 | if (out_of_range_pos >= 0) |
6195 | { | |
6196 | expected_operand = idesc->operands[out_of_range_pos]; | |
6197 | error_pos = out_of_range_pos; | |
6198 | } | |
6199 | else | |
6200 | { | |
6201 | expected_operand = idesc->operands[i]; | |
6202 | error_pos = i; | |
6203 | } | |
6204 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6205 | } |
6206 | continue; | |
6207 | } | |
6208 | ||
800eeca4 JW |
6209 | break; |
6210 | } | |
6211 | if (!idesc) | |
6212 | { | |
6213 | if (expected_operand) | |
6214 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 6215 | error_pos + 1, mnemonic, |
800eeca4 | 6216 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc JB |
6217 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
6218 | as_bad ("Wrong number of output operands"); | |
6219 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) | |
6220 | as_bad ("Wrong number of input operands"); | |
800eeca4 JW |
6221 | else |
6222 | as_bad ("Operand mismatch"); | |
6223 | return 0; | |
6224 | } | |
4b09e828 JB |
6225 | |
6226 | /* Check that the instruction doesn't use | |
6227 | - r0, f0, or f1 as output operands | |
6228 | - the same predicate twice as output operands | |
6229 | - r0 as address of a base update load or store | |
6230 | - the same GR as output and address of a base update load | |
6231 | - two even- or two odd-numbered FRs as output operands of a floating | |
6232 | point parallel load. | |
6233 | At most two (conflicting) output (or output-like) operands can exist, | |
6234 | (floating point parallel loads have three outputs, but the base register, | |
6235 | if updated, cannot conflict with the actual outputs). */ | |
6236 | reg2 = reg1 = -1; | |
6237 | for (i = 0; i < num_operands; ++i) | |
6238 | { | |
6239 | int regno = 0; | |
6240 | ||
6241 | reg_class = 0; | |
6242 | switch (idesc->operands[i]) | |
6243 | { | |
6244 | case IA64_OPND_R1: | |
6245 | case IA64_OPND_R2: | |
6246 | case IA64_OPND_R3: | |
6247 | if (i < num_outputs) | |
6248 | { | |
6249 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6250 | reg_class = 'r'; | |
6251 | else if (reg1 < 0) | |
6252 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6253 | else if (reg2 < 0) | |
6254 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6255 | } | |
6256 | break; | |
6257 | case IA64_OPND_P1: | |
6258 | case IA64_OPND_P2: | |
6259 | if (i < num_outputs) | |
6260 | { | |
6261 | if (reg1 < 0) | |
6262 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6263 | else if (reg2 < 0) | |
6264 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6265 | } | |
6266 | break; | |
6267 | case IA64_OPND_F1: | |
6268 | case IA64_OPND_F2: | |
6269 | case IA64_OPND_F3: | |
6270 | case IA64_OPND_F4: | |
6271 | if (i < num_outputs) | |
6272 | { | |
6273 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6274 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6275 | { | |
6276 | reg_class = 'f'; | |
6277 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6278 | } | |
6279 | else if (reg1 < 0) | |
6280 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6281 | else if (reg2 < 0) | |
6282 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6283 | } | |
6284 | break; | |
6285 | case IA64_OPND_MR3: | |
6286 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6287 | { | |
6288 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6289 | reg_class = 'm'; | |
6290 | else if (reg1 < 0) | |
6291 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6292 | else if (reg2 < 0) | |
6293 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6294 | } | |
6295 | break; | |
6296 | default: | |
6297 | break; | |
6298 | } | |
6299 | switch (reg_class) | |
6300 | { | |
6301 | case 0: | |
6302 | break; | |
6303 | default: | |
6304 | as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno); | |
6305 | break; | |
6306 | case 'm': | |
6307 | as_warn ("Invalid use of `r%d' as base update address operand", regno); | |
6308 | break; | |
6309 | } | |
6310 | } | |
6311 | if (reg1 == reg2) | |
6312 | { | |
6313 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6314 | { | |
6315 | reg1 -= REG_GR; | |
6316 | reg_class = 'r'; | |
6317 | } | |
6318 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6319 | { | |
6320 | reg1 -= REG_P; | |
6321 | reg_class = 'p'; | |
6322 | } | |
6323 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6324 | { | |
6325 | reg1 -= REG_FR; | |
6326 | reg_class = 'f'; | |
6327 | } | |
6328 | else | |
6329 | reg_class = 0; | |
6330 | if (reg_class) | |
6331 | as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1); | |
6332 | } | |
6333 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6334 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6335 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6336 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6337 | && ! ((reg1 ^ reg2) & 1)) | |
6338 | as_warn ("Invalid simultaneous use of `f%d' and `f%d'", | |
6339 | reg1 - REG_FR, reg2 - REG_FR); | |
6340 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6341 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6342 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6343 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
6344 | as_warn ("Dangerous simultaneous use of `f%d' and `f%d'", | |
6345 | reg1 - REG_FR, reg2 - REG_FR); | |
800eeca4 JW |
6346 | return idesc; |
6347 | } | |
6348 | ||
6349 | static void | |
6350 | build_insn (slot, insnp) | |
6351 | struct slot *slot; | |
6352 | bfd_vma *insnp; | |
6353 | { | |
6354 | const struct ia64_operand *odesc, *o2desc; | |
6355 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6356 | bfd_vma insn; |
6357 | bfd_signed_vma val; | |
800eeca4 JW |
6358 | const char *err; |
6359 | int i; | |
6360 | ||
6361 | insn = idesc->opcode | slot->qp_regno; | |
6362 | ||
6363 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6364 | { | |
c67e42c9 RH |
6365 | if (slot->opnd[i].X_op == O_register |
6366 | || slot->opnd[i].X_op == O_constant | |
6367 | || slot->opnd[i].X_op == O_index) | |
6368 | val = slot->opnd[i].X_add_number; | |
6369 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6370 | { |
c67e42c9 RH |
6371 | /* This must be the value 0x10000000000000000. */ |
6372 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6373 | val = 0; | |
6374 | } | |
6375 | else | |
6376 | val = 0; | |
6377 | ||
6378 | switch (idesc->operands[i]) | |
6379 | { | |
6380 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6381 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6382 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6383 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6384 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6385 | continue; |
6386 | ||
6387 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6388 | val &= 0x3fffffffffffffffULL; |
6389 | if (val != slot->opnd[i].X_add_number) | |
6390 | as_warn (_("Value truncated to 62 bits")); | |
6391 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6392 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6393 | continue; |
800eeca4 | 6394 | |
c67e42c9 RH |
6395 | case IA64_OPND_TGT64: |
6396 | val >>= 4; | |
6397 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6398 | insn |= ((((val >> 59) & 0x1) << 36) | |
6399 | | (((val >> 0) & 0xfffff) << 13)); | |
6400 | continue; | |
800eeca4 | 6401 | |
c67e42c9 RH |
6402 | case IA64_OPND_AR3: |
6403 | val -= REG_AR; | |
6404 | break; | |
6405 | ||
6406 | case IA64_OPND_B1: | |
6407 | case IA64_OPND_B2: | |
6408 | val -= REG_BR; | |
6409 | break; | |
6410 | ||
6411 | case IA64_OPND_CR3: | |
6412 | val -= REG_CR; | |
6413 | break; | |
6414 | ||
6415 | case IA64_OPND_F1: | |
6416 | case IA64_OPND_F2: | |
6417 | case IA64_OPND_F3: | |
6418 | case IA64_OPND_F4: | |
6419 | val -= REG_FR; | |
6420 | break; | |
6421 | ||
6422 | case IA64_OPND_P1: | |
6423 | case IA64_OPND_P2: | |
6424 | val -= REG_P; | |
6425 | break; | |
6426 | ||
6427 | case IA64_OPND_R1: | |
6428 | case IA64_OPND_R2: | |
6429 | case IA64_OPND_R3: | |
6430 | case IA64_OPND_R3_2: | |
6431 | case IA64_OPND_CPUID_R3: | |
6432 | case IA64_OPND_DBR_R3: | |
6433 | case IA64_OPND_DTR_R3: | |
6434 | case IA64_OPND_ITR_R3: | |
6435 | case IA64_OPND_IBR_R3: | |
6436 | case IA64_OPND_MR3: | |
6437 | case IA64_OPND_MSR_R3: | |
6438 | case IA64_OPND_PKR_R3: | |
6439 | case IA64_OPND_PMC_R3: | |
6440 | case IA64_OPND_PMD_R3: | |
197865e8 | 6441 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6442 | val -= REG_GR; |
6443 | break; | |
6444 | ||
6445 | default: | |
6446 | break; | |
6447 | } | |
6448 | ||
6449 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6450 | err = (*odesc->insert) (odesc, val, &insn); | |
6451 | if (err) | |
6452 | as_bad_where (slot->src_file, slot->src_line, | |
6453 | "Bad operand value: %s", err); | |
6454 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6455 | { | |
6456 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6457 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6458 | { | |
6459 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6460 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6461 | } |
c67e42c9 RH |
6462 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6463 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6464 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6465 | { |
c67e42c9 RH |
6466 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6467 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6468 | } |
6469 | } | |
6470 | } | |
6471 | *insnp = insn; | |
6472 | } | |
6473 | ||
6474 | static void | |
6475 | emit_one_bundle () | |
6476 | { | |
f4660e2c | 6477 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6478 | enum ia64_unit required_unit, insn_unit = 0; |
6479 | enum ia64_insn_type type[3], insn_type; | |
6480 | unsigned int template, orig_template; | |
542d6675 | 6481 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6482 | struct ia64_opcode *idesc; |
6483 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6484 | int n, i, j, first, curr, last_slot; |
d6e78c11 | 6485 | unw_rec_list *ptr, *last_ptr, *end_ptr; |
800eeca4 JW |
6486 | bfd_vma t0 = 0, t1 = 0; |
6487 | struct label_fix *lfix; | |
6488 | struct insn_fix *ifix; | |
6489 | char mnemonic[16]; | |
6490 | fixS *fix; | |
6491 | char *f; | |
5a9ff93d | 6492 | int addr_mod; |
800eeca4 JW |
6493 | |
6494 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6495 | know (first >= 0 & first < NUM_SLOTS); | |
6496 | n = MIN (3, md.num_slots_in_use); | |
6497 | ||
6498 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6499 | otherwise: */ |
800eeca4 JW |
6500 | |
6501 | if (md.slot[first].user_template >= 0) | |
6502 | user_template = template = md.slot[first].user_template; | |
6503 | else | |
6504 | { | |
032efc85 | 6505 | /* Auto select appropriate template. */ |
800eeca4 JW |
6506 | memset (type, 0, sizeof (type)); |
6507 | curr = first; | |
6508 | for (i = 0; i < n; ++i) | |
6509 | { | |
032efc85 RH |
6510 | if (md.slot[curr].label_fixups && i != 0) |
6511 | break; | |
800eeca4 JW |
6512 | type[i] = md.slot[curr].idesc->type; |
6513 | curr = (curr + 1) % NUM_SLOTS; | |
6514 | } | |
6515 | template = best_template[type[0]][type[1]][type[2]]; | |
6516 | } | |
6517 | ||
542d6675 | 6518 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6519 | for (i = 0; i < 3; ++i) |
6520 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6521 | ||
6522 | f = frag_more (16); | |
6523 | ||
5a9ff93d JW |
6524 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6525 | from the start of the frag. */ | |
6526 | addr_mod = frag_now_fix () & 15; | |
6527 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6528 | as_bad (_("instruction address is not a multiple of 16")); | |
6529 | frag_now->insn_addr = addr_mod; | |
6530 | frag_now->has_code = 1; | |
6531 | ||
542d6675 | 6532 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6533 | curr = first; |
6534 | idesc = md.slot[curr].idesc; | |
6535 | end_of_insn_group = 0; | |
9b505842 | 6536 | last_slot = -1; |
800eeca4 JW |
6537 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6538 | { | |
d6e78c11 JW |
6539 | /* If we have unwind records, we may need to update some now. */ |
6540 | ptr = md.slot[curr].unwind_record; | |
6541 | if (ptr) | |
6542 | { | |
6543 | /* Find the last prologue/body record in the list for the current | |
6544 | insn, and set the slot number for all records up to that point. | |
6545 | This needs to be done now, because prologue/body records refer to | |
6546 | the current point, not the point after the instruction has been | |
6547 | issued. This matters because there may have been nops emitted | |
6548 | meanwhile. Any non-prologue non-body record followed by a | |
6549 | prologue/body record must also refer to the current point. */ | |
6550 | last_ptr = NULL; | |
6551 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6552 | for (; ptr != end_ptr; ptr = ptr->next) | |
6553 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
6554 | || ptr->r.type == body) | |
6555 | last_ptr = ptr; | |
6556 | if (last_ptr) | |
6557 | { | |
6558 | /* Make last_ptr point one after the last prologue/body | |
6559 | record. */ | |
6560 | last_ptr = last_ptr->next; | |
6561 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6562 | ptr = ptr->next) | |
6563 | { | |
6564 | ptr->slot_number = (unsigned long) f + i; | |
6565 | ptr->slot_frag = frag_now; | |
6566 | } | |
6567 | /* Remove the initialized records, so that we won't accidentally | |
6568 | update them again if we insert a nop and continue. */ | |
6569 | md.slot[curr].unwind_record = last_ptr; | |
6570 | } | |
6571 | } | |
e0c9811a | 6572 | |
f4660e2c JB |
6573 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6574 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6575 | { |
f4660e2c JB |
6576 | if (curr == first) |
6577 | manual_bundling = 1; | |
800eeca4 | 6578 | else |
f4660e2c JB |
6579 | break; /* Need to start a new bundle. */ |
6580 | } | |
6581 | ||
744b6414 JW |
6582 | /* If this instruction specifies a template, then it must be the first |
6583 | instruction of a bundle. */ | |
6584 | if (curr != first && md.slot[curr].user_template >= 0) | |
6585 | break; | |
6586 | ||
f4660e2c JB |
6587 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6588 | { | |
6589 | if (manual_bundling && !manual_bundling_off) | |
6590 | { | |
6591 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6592 | "`%s' must be last in bundle", idesc->name); | |
6593 | if (i < 2) | |
6594 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6595 | } | |
6596 | i = 2; | |
800eeca4 JW |
6597 | } |
6598 | if (idesc->flags & IA64_OPCODE_LAST) | |
6599 | { | |
2434f565 JW |
6600 | int required_slot; |
6601 | unsigned int required_template; | |
800eeca4 JW |
6602 | |
6603 | /* If we need a stop bit after an M slot, our only choice is | |
6604 | template 5 (M;;MI). If we need a stop bit after a B | |
6605 | slot, our only choice is to place it at the end of the | |
6606 | bundle, because the only available templates are MIB, | |
6607 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6608 | than M and B slots because these are the only kind of | |
6609 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6610 | required_template = template; | |
6611 | switch (idesc->type) | |
6612 | { | |
6613 | case IA64_TYPE_M: | |
6614 | required_slot = 0; | |
6615 | required_template = 5; | |
6616 | break; | |
6617 | ||
6618 | case IA64_TYPE_B: | |
6619 | required_slot = 2; | |
6620 | break; | |
6621 | ||
6622 | default: | |
6623 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6624 | "Internal error: don't know how to force %s to end" | |
6625 | "of instruction group", idesc->name); | |
6626 | required_slot = i; | |
6627 | break; | |
6628 | } | |
f4660e2c JB |
6629 | if (manual_bundling |
6630 | && (i > required_slot | |
6631 | || (required_slot == 2 && !manual_bundling_off) | |
6632 | || (user_template >= 0 | |
6633 | /* Changing from MMI to M;MI is OK. */ | |
6634 | && (template ^ required_template) > 1))) | |
6635 | { | |
6636 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6637 | "`%s' must be last in instruction group", | |
6638 | idesc->name); | |
6639 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6640 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6641 | } | |
800eeca4 JW |
6642 | if (required_slot < i) |
6643 | /* Can't fit this instruction. */ | |
6644 | break; | |
6645 | ||
6646 | i = required_slot; | |
6647 | if (required_template != template) | |
6648 | { | |
6649 | /* If we switch the template, we need to reset the NOPs | |
6650 | after slot i. The slot-types of the instructions ahead | |
6651 | of i never change, so we don't need to worry about | |
6652 | changing NOPs in front of this slot. */ | |
6653 | for (j = i; j < 3; ++j) | |
6654 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6655 | } | |
6656 | template = required_template; | |
6657 | } | |
6658 | if (curr != first && md.slot[curr].label_fixups) | |
6659 | { | |
f4660e2c JB |
6660 | if (manual_bundling) |
6661 | { | |
6662 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
800eeca4 | 6663 | "Label must be first in a bundle"); |
f4660e2c JB |
6664 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6665 | } | |
800eeca4 JW |
6666 | /* This insn must go into the first slot of a bundle. */ |
6667 | break; | |
6668 | } | |
6669 | ||
800eeca4 JW |
6670 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6671 | { | |
6672 | /* We need an instruction group boundary in the middle of a | |
6673 | bundle. See if we can switch to an other template with | |
6674 | an appropriate boundary. */ | |
6675 | ||
6676 | orig_template = template; | |
6677 | if (i == 1 && (user_template == 4 | |
6678 | || (user_template < 0 | |
6679 | && (ia64_templ_desc[template].exec_unit[0] | |
6680 | == IA64_UNIT_M)))) | |
6681 | { | |
6682 | template = 5; | |
6683 | end_of_insn_group = 0; | |
6684 | } | |
6685 | else if (i == 2 && (user_template == 0 | |
6686 | || (user_template < 0 | |
6687 | && (ia64_templ_desc[template].exec_unit[1] | |
6688 | == IA64_UNIT_I))) | |
6689 | /* This test makes sure we don't switch the template if | |
6690 | the next instruction is one that needs to be first in | |
6691 | an instruction group. Since all those instructions are | |
6692 | in the M group, there is no way such an instruction can | |
6693 | fit in this bundle even if we switch the template. The | |
6694 | reason we have to check for this is that otherwise we | |
6695 | may end up generating "MI;;I M.." which has the deadly | |
6696 | effect that the second M instruction is no longer the | |
f4660e2c | 6697 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6698 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6699 | { | |
6700 | template = 1; | |
6701 | end_of_insn_group = 0; | |
6702 | } | |
f4660e2c JB |
6703 | else if (i == 1 |
6704 | && user_template == 0 | |
6705 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6706 | /* Use the next slot. */ | |
6707 | continue; | |
800eeca4 JW |
6708 | else if (curr != first) |
6709 | /* can't fit this insn */ | |
6710 | break; | |
6711 | ||
6712 | if (template != orig_template) | |
6713 | /* if we switch the template, we need to reset the NOPs | |
6714 | after slot i. The slot-types of the instructions ahead | |
6715 | of i never change, so we don't need to worry about | |
6716 | changing NOPs in front of this slot. */ | |
6717 | for (j = i; j < 3; ++j) | |
6718 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6719 | } | |
6720 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6721 | ||
c10d9d8f | 6722 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6723 | if (idesc->type == IA64_TYPE_DYN) |
6724 | { | |
97762d08 JB |
6725 | enum ia64_opnd opnd1, opnd2; |
6726 | ||
800eeca4 JW |
6727 | if ((strcmp (idesc->name, "nop") == 0) |
6728 | || (strcmp (idesc->name, "break") == 0)) | |
6729 | insn_unit = required_unit; | |
91d777ee L |
6730 | else if (strcmp (idesc->name, "hint") == 0) |
6731 | { | |
6732 | insn_unit = required_unit; | |
6733 | if (required_unit == IA64_UNIT_B) | |
6734 | { | |
6735 | switch (md.hint_b) | |
6736 | { | |
6737 | case hint_b_ok: | |
6738 | break; | |
6739 | case hint_b_warning: | |
6740 | as_warn ("hint in B unit may be treated as nop"); | |
6741 | break; | |
6742 | case hint_b_error: | |
6743 | /* When manual bundling is off and there is no | |
6744 | user template, we choose a different unit so | |
6745 | that hint won't go into the current slot. We | |
6746 | will fill the current bundle with nops and | |
6747 | try to put hint into the next bundle. */ | |
6748 | if (!manual_bundling && user_template < 0) | |
6749 | insn_unit = IA64_UNIT_I; | |
6750 | else | |
6751 | as_bad ("hint in B unit can't be used"); | |
6752 | break; | |
6753 | } | |
6754 | } | |
6755 | } | |
97762d08 JB |
6756 | else if (strcmp (idesc->name, "chk.s") == 0 |
6757 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6758 | { |
6759 | insn_unit = IA64_UNIT_M; | |
97762d08 JB |
6760 | if (required_unit == IA64_UNIT_I |
6761 | || (required_unit == IA64_UNIT_F && template == 6)) | |
800eeca4 JW |
6762 | insn_unit = IA64_UNIT_I; |
6763 | } | |
6764 | else | |
6765 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6766 | ||
09124b3f | 6767 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]); |
97762d08 JB |
6768 | opnd1 = idesc->operands[0]; |
6769 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6770 | ia64_free_opcode (idesc); |
97762d08 JB |
6771 | idesc = ia64_find_opcode (mnemonic); |
6772 | /* moves to/from ARs have collisions */ | |
6773 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6774 | { | |
6775 | while (idesc != NULL | |
6776 | && (idesc->operands[0] != opnd1 | |
6777 | || idesc->operands[1] != opnd2)) | |
6778 | idesc = get_next_opcode (idesc); | |
6779 | } | |
97762d08 | 6780 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6781 | } |
6782 | else | |
6783 | { | |
6784 | insn_type = idesc->type; | |
6785 | insn_unit = IA64_UNIT_NIL; | |
6786 | switch (insn_type) | |
6787 | { | |
6788 | case IA64_TYPE_A: | |
6789 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6790 | insn_unit = required_unit; | |
6791 | break; | |
542d6675 | 6792 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6793 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6794 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6795 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6796 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6797 | default: break; | |
6798 | } | |
6799 | } | |
6800 | ||
6801 | if (insn_unit != required_unit) | |
9b505842 | 6802 | continue; /* Try next slot. */ |
800eeca4 | 6803 | |
196e8040 JW |
6804 | if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen) |
6805 | { | |
6806 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6807 | |
196e8040 JW |
6808 | md.slot[curr].loc_directive_seen = 0; |
6809 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6810 | } | |
800eeca4 JW |
6811 | |
6812 | build_insn (md.slot + curr, insn + i); | |
6813 | ||
d6e78c11 JW |
6814 | ptr = md.slot[curr].unwind_record; |
6815 | if (ptr) | |
6816 | { | |
6817 | /* Set slot numbers for all remaining unwind records belonging to the | |
6818 | current insn. There can not be any prologue/body unwind records | |
6819 | here. */ | |
6820 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6821 | for (; ptr != end_ptr; ptr = ptr->next) | |
6822 | { | |
6823 | ptr->slot_number = (unsigned long) f + i; | |
6824 | ptr->slot_frag = frag_now; | |
6825 | } | |
6826 | md.slot[curr].unwind_record = NULL; | |
6827 | } | |
10850f29 | 6828 | |
800eeca4 JW |
6829 | if (required_unit == IA64_UNIT_L) |
6830 | { | |
6831 | know (i == 1); | |
6832 | /* skip one slot for long/X-unit instructions */ | |
6833 | ++i; | |
6834 | } | |
6835 | --md.num_slots_in_use; | |
9b505842 | 6836 | last_slot = i; |
800eeca4 | 6837 | |
542d6675 | 6838 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6839 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6840 | { | |
6841 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6842 | symbol_set_frag (lfix->sym, frag_now); | |
6843 | } | |
f1bcba5b JW |
6844 | /* and fix up the tags also. */ |
6845 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6846 | { | |
6847 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6848 | symbol_set_frag (lfix->sym, frag_now); | |
6849 | } | |
800eeca4 JW |
6850 | |
6851 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6852 | { | |
6853 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6854 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6855 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6856 | fix->tc_fix_data.opnd = ifix->opnd; | |
6857 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6858 | fix->fx_file = md.slot[curr].src_file; | |
6859 | fix->fx_line = md.slot[curr].src_line; | |
6860 | } | |
6861 | ||
6862 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6863 | ||
542d6675 | 6864 | /* clear slot: */ |
800eeca4 JW |
6865 | ia64_free_opcode (md.slot[curr].idesc); |
6866 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6867 | md.slot[curr].user_template = -1; | |
6868 | ||
6869 | if (manual_bundling_off) | |
6870 | { | |
6871 | manual_bundling = 0; | |
6872 | break; | |
6873 | } | |
6874 | curr = (curr + 1) % NUM_SLOTS; | |
6875 | idesc = md.slot[curr].idesc; | |
6876 | } | |
f4660e2c | 6877 | if (manual_bundling > 0) |
800eeca4 JW |
6878 | { |
6879 | if (md.num_slots_in_use > 0) | |
ac025970 | 6880 | { |
9b505842 JB |
6881 | if (last_slot >= 2) |
6882 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6883 | "`%s' does not fit into bundle", idesc->name); | |
6884 | else if (last_slot < 0) | |
6885 | { | |
6886 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6887 | "`%s' does not fit into %s template", | |
6888 | idesc->name, ia64_templ_desc[template].name); | |
6889 | /* Drop first insn so we don't livelock. */ | |
6890 | --md.num_slots_in_use; | |
6891 | know (curr == first); | |
6892 | ia64_free_opcode (md.slot[curr].idesc); | |
6893 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6894 | md.slot[curr].user_template = -1; | |
6895 | } | |
6896 | else | |
6897 | { | |
6898 | const char *where; | |
6899 | ||
6900 | if (template == 2) | |
6901 | where = "X slot"; | |
6902 | else if (last_slot == 0) | |
6903 | where = "slots 2 or 3"; | |
6904 | else | |
6905 | where = "slot 3"; | |
6906 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6907 | "`%s' can't go in %s of %s template", | |
6908 | idesc->name, where, ia64_templ_desc[template].name); | |
6909 | } | |
ac025970 | 6910 | } |
800eeca4 JW |
6911 | else |
6912 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6913 | "Missing '}' at end of file"); | |
6914 | } | |
6915 | know (md.num_slots_in_use < NUM_SLOTS); | |
6916 | ||
6917 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6918 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6919 | ||
44f5c83a JW |
6920 | number_to_chars_littleendian (f + 0, t0, 8); |
6921 | number_to_chars_littleendian (f + 8, t1, 8); | |
f5a30c2e | 6922 | |
73f20958 L |
6923 | if (unwind.list) |
6924 | { | |
127cab00 L |
6925 | unwind.list->next_slot_number = (unsigned long) f + 16; |
6926 | unwind.list->next_slot_frag = frag_now; | |
73f20958 | 6927 | } |
800eeca4 JW |
6928 | } |
6929 | ||
6930 | int | |
6931 | md_parse_option (c, arg) | |
6932 | int c; | |
6933 | char *arg; | |
6934 | { | |
7463c317 | 6935 | |
800eeca4 JW |
6936 | switch (c) |
6937 | { | |
c43c2cc5 | 6938 | /* Switches from the Intel assembler. */ |
44f5c83a | 6939 | case 'm': |
800eeca4 JW |
6940 | if (strcmp (arg, "ilp64") == 0 |
6941 | || strcmp (arg, "lp64") == 0 | |
6942 | || strcmp (arg, "p64") == 0) | |
6943 | { | |
6944 | md.flags |= EF_IA_64_ABI64; | |
6945 | } | |
6946 | else if (strcmp (arg, "ilp32") == 0) | |
6947 | { | |
6948 | md.flags &= ~EF_IA_64_ABI64; | |
6949 | } | |
6950 | else if (strcmp (arg, "le") == 0) | |
6951 | { | |
6952 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6953 | default_big_endian = 0; |
800eeca4 JW |
6954 | } |
6955 | else if (strcmp (arg, "be") == 0) | |
6956 | { | |
6957 | md.flags |= EF_IA_64_BE; | |
549f748d | 6958 | default_big_endian = 1; |
800eeca4 | 6959 | } |
970d6792 L |
6960 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
6961 | { | |
6962 | arg += 13; | |
6963 | if (strcmp (arg, "warning") == 0) | |
6964 | md.unwind_check = unwind_check_warning; | |
6965 | else if (strcmp (arg, "error") == 0) | |
6966 | md.unwind_check = unwind_check_error; | |
6967 | else | |
6968 | return 0; | |
6969 | } | |
91d777ee L |
6970 | else if (strncmp (arg, "hint.b=", 7) == 0) |
6971 | { | |
6972 | arg += 7; | |
6973 | if (strcmp (arg, "ok") == 0) | |
6974 | md.hint_b = hint_b_ok; | |
6975 | else if (strcmp (arg, "warning") == 0) | |
6976 | md.hint_b = hint_b_warning; | |
6977 | else if (strcmp (arg, "error") == 0) | |
6978 | md.hint_b = hint_b_error; | |
6979 | else | |
6980 | return 0; | |
6981 | } | |
8c2fda1d L |
6982 | else if (strncmp (arg, "tune=", 5) == 0) |
6983 | { | |
6984 | arg += 5; | |
6985 | if (strcmp (arg, "itanium1") == 0) | |
6986 | md.tune = itanium1; | |
6987 | else if (strcmp (arg, "itanium2") == 0) | |
6988 | md.tune = itanium2; | |
6989 | else | |
6990 | return 0; | |
6991 | } | |
800eeca4 JW |
6992 | else |
6993 | return 0; | |
6994 | break; | |
6995 | ||
6996 | case 'N': | |
6997 | if (strcmp (arg, "so") == 0) | |
6998 | { | |
542d6675 | 6999 | /* Suppress signon message. */ |
800eeca4 JW |
7000 | } |
7001 | else if (strcmp (arg, "pi") == 0) | |
7002 | { | |
7003 | /* Reject privileged instructions. FIXME */ | |
7004 | } | |
7005 | else if (strcmp (arg, "us") == 0) | |
7006 | { | |
7007 | /* Allow union of signed and unsigned range. FIXME */ | |
7008 | } | |
7009 | else if (strcmp (arg, "close_fcalls") == 0) | |
7010 | { | |
7011 | /* Do not resolve global function calls. */ | |
7012 | } | |
7013 | else | |
7014 | return 0; | |
7015 | break; | |
7016 | ||
7017 | case 'C': | |
7018 | /* temp[="prefix"] Insert temporary labels into the object file | |
7019 | symbol table prefixed by "prefix". | |
7020 | Default prefix is ":temp:". | |
7021 | */ | |
7022 | break; | |
7023 | ||
7024 | case 'a': | |
800eeca4 JW |
7025 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7026 | according to <tgt> -- | |
7027 | exit: branch out from the current context (default) | |
7028 | labels: all labels in context may be branch targets | |
7029 | */ | |
85b40035 L |
7030 | if (strncmp (arg, "indirect=", 9) != 0) |
7031 | return 0; | |
800eeca4 JW |
7032 | break; |
7033 | ||
7034 | case 'x': | |
7035 | /* -X conflicts with an ignored option, use -x instead */ | |
7036 | md.detect_dv = 1; | |
7037 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7038 | { |
7039 | /* set default mode to explicit */ | |
7040 | md.default_explicit_mode = 1; | |
7041 | break; | |
7042 | } | |
800eeca4 | 7043 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7044 | { |
7045 | md.default_explicit_mode = 0; | |
7046 | } | |
f1dab70d JB |
7047 | else if (strcmp (arg, "none") == 0) |
7048 | { | |
7049 | md.detect_dv = 0; | |
7050 | } | |
800eeca4 | 7051 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7052 | { |
7053 | md.debug_dv = 1; | |
7054 | } | |
800eeca4 | 7055 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7056 | { |
7057 | md.default_explicit_mode = 1; | |
7058 | md.debug_dv = 1; | |
7059 | } | |
f1dab70d JB |
7060 | else if (strcmp (arg, "debugn") == 0) |
7061 | { | |
7062 | md.debug_dv = 1; | |
7063 | md.detect_dv = 0; | |
7064 | } | |
800eeca4 | 7065 | else |
542d6675 KH |
7066 | { |
7067 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7068 | } | |
800eeca4 JW |
7069 | break; |
7070 | ||
7071 | case 'S': | |
7072 | /* nops Print nops statistics. */ | |
7073 | break; | |
7074 | ||
c43c2cc5 JW |
7075 | /* GNU specific switches for gcc. */ |
7076 | case OPTION_MCONSTANT_GP: | |
7077 | md.flags |= EF_IA_64_CONS_GP; | |
7078 | break; | |
7079 | ||
7080 | case OPTION_MAUTO_PIC: | |
7081 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7082 | break; | |
7083 | ||
800eeca4 JW |
7084 | default: |
7085 | return 0; | |
7086 | } | |
7087 | ||
7088 | return 1; | |
7089 | } | |
7090 | ||
7091 | void | |
7092 | md_show_usage (stream) | |
7093 | FILE *stream; | |
7094 | { | |
542d6675 | 7095 | fputs (_("\ |
800eeca4 | 7096 | IA-64 options:\n\ |
6290819d NC |
7097 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7098 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7099 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7100 | without function descriptors (sets ELF header flag\n\ | |
7101 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7102 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7103 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7104 | -mtune=[itanium1|itanium2]\n\ |
7105 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7106 | -munwind-check=[warning|error]\n\ |
7107 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7108 | -mhint.b=[ok|warning|error]\n\ |
7109 | hint.b check (default -mhint.b=error)\n\ | |
f1dab70d JB |
7110 | -x | -xexplicit turn on dependency violation checking\n\ |
7111 | -xauto automagically remove dependency violations (default)\n\ | |
7112 | -xnone turn off dependency violation checking\n\ | |
7113 | -xdebug debug dependency violation checker\n\ | |
7114 | -xdebugn debug dependency violation checker but turn off\n\ | |
7115 | dependency violation checking\n\ | |
7116 | -xdebugx debug dependency violation checker and turn on\n\ | |
7117 | dependency violation checking\n"), | |
800eeca4 JW |
7118 | stream); |
7119 | } | |
7120 | ||
acebd4ce AS |
7121 | void |
7122 | ia64_after_parse_args () | |
7123 | { | |
7124 | if (debug_type == DEBUG_STABS) | |
7125 | as_fatal (_("--gstabs is not supported for ia64")); | |
7126 | } | |
7127 | ||
44576e1f RH |
7128 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7129 | ||
7130 | static int | |
800eeca4 JW |
7131 | match (int templ, int type, int slot) |
7132 | { | |
7133 | enum ia64_unit unit; | |
7134 | int result; | |
7135 | ||
7136 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7137 | switch (type) | |
7138 | { | |
7139 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7140 | case IA64_TYPE_A: | |
7141 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7142 | break; | |
7143 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7144 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7145 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7146 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7147 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7148 | default: result = 0; break; | |
7149 | } | |
7150 | return result; | |
7151 | } | |
7152 | ||
44576e1f RH |
7153 | /* Add a bit of extra goodness if a nop of type F or B would fit |
7154 | in TEMPL at SLOT. */ | |
7155 | ||
7156 | static inline int | |
7157 | extra_goodness (int templ, int slot) | |
7158 | { | |
8c2fda1d L |
7159 | switch (md.tune) |
7160 | { | |
7161 | case itanium1: | |
7162 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7163 | return 2; | |
7164 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7165 | return 1; | |
7166 | else | |
7167 | return 0; | |
7168 | break; | |
7169 | case itanium2: | |
7170 | if (match (templ, IA64_TYPE_M, slot) | |
7171 | || match (templ, IA64_TYPE_I, slot)) | |
7172 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7173 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7174 | branch-prediction. */ | |
7175 | return 2; | |
7176 | else | |
7177 | return 0; | |
7178 | break; | |
7179 | default: | |
7180 | abort (); | |
7181 | return 0; | |
7182 | } | |
44576e1f RH |
7183 | } |
7184 | ||
800eeca4 JW |
7185 | /* This function is called once, at assembler startup time. It sets |
7186 | up all the tables, etc. that the MD part of the assembler will need | |
7187 | that can be determined before arguments are parsed. */ | |
7188 | void | |
7189 | md_begin () | |
7190 | { | |
44f5c83a | 7191 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
7192 | const char *err; |
7193 | char name[8]; | |
7194 | ||
7195 | md.auto_align = 1; | |
7196 | md.explicit_mode = md.default_explicit_mode; | |
7197 | ||
7198 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7199 | ||
0234cb7c | 7200 | /* Make sure function pointers get initialized. */ |
10a98291 | 7201 | target_big_endian = -1; |
549f748d | 7202 | dot_byteorder (default_big_endian); |
10a98291 | 7203 | |
35f5df7f L |
7204 | alias_hash = hash_new (); |
7205 | alias_name_hash = hash_new (); | |
7206 | secalias_hash = hash_new (); | |
7207 | secalias_name_hash = hash_new (); | |
7208 | ||
13ae64f3 JJ |
7209 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7210 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7211 | &zero_address_frag); | |
7212 | ||
7213 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7214 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7215 | &zero_address_frag); | |
7216 | ||
800eeca4 | 7217 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7218 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7219 | &zero_address_frag); | |
800eeca4 JW |
7220 | |
7221 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7222 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7223 | &zero_address_frag); | |
800eeca4 JW |
7224 | |
7225 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7226 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7227 | &zero_address_frag); | |
800eeca4 | 7228 | |
fa2c7eff RH |
7229 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7230 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7231 | &zero_address_frag); | |
7232 | ||
c67e42c9 | 7233 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7234 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7235 | &zero_address_frag); | |
c67e42c9 | 7236 | |
800eeca4 | 7237 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7238 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7239 | &zero_address_frag); | |
800eeca4 JW |
7240 | |
7241 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7242 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7243 | &zero_address_frag); | |
800eeca4 JW |
7244 | |
7245 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7246 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7247 | &zero_address_frag); | |
800eeca4 | 7248 | |
13ae64f3 JJ |
7249 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7250 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7251 | &zero_address_frag); | |
7252 | ||
800eeca4 | 7253 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7254 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7255 | &zero_address_frag); | |
800eeca4 JW |
7256 | |
7257 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7258 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7259 | &zero_address_frag); | |
800eeca4 | 7260 | |
13ae64f3 JJ |
7261 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7262 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7263 | &zero_address_frag); | |
7264 | ||
7265 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7266 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7267 | &zero_address_frag); | |
7268 | ||
7269 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7270 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7271 | &zero_address_frag); | |
7272 | ||
3969b680 RH |
7273 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7274 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7275 | &zero_address_frag); | |
7276 | ||
f6fe78d6 JW |
7277 | if (md.tune != itanium1) |
7278 | { | |
7279 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7280 | le_nop[0] = 0x8; | |
7281 | le_nop_stop[0] = 0x9; | |
7282 | } | |
7283 | ||
197865e8 | 7284 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7285 | base 4 value, in which each match counts for 3. Match-failures |
7286 | result in NOPs and we use extra_goodness() to pick the execution | |
7287 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7288 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7289 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7290 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7291 | { | |
7292 | best = 0; | |
7293 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7294 | { | |
7295 | goodness = 0; | |
7296 | if (match (t, i, 0)) | |
7297 | { | |
7298 | if (match (t, j, 1)) | |
7299 | { | |
7300 | if (match (t, k, 2)) | |
44576e1f | 7301 | goodness = 3 + 3 + 3; |
800eeca4 | 7302 | else |
44576e1f | 7303 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7304 | } |
7305 | else if (match (t, j, 2)) | |
44576e1f | 7306 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7307 | else |
44576e1f RH |
7308 | { |
7309 | goodness = 3; | |
7310 | goodness += extra_goodness (t, 1); | |
7311 | goodness += extra_goodness (t, 2); | |
7312 | } | |
800eeca4 JW |
7313 | } |
7314 | else if (match (t, i, 1)) | |
7315 | { | |
7316 | if (match (t, j, 2)) | |
44576e1f | 7317 | goodness = 3 + 3; |
800eeca4 | 7318 | else |
44576e1f | 7319 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7320 | } |
7321 | else if (match (t, i, 2)) | |
44576e1f | 7322 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7323 | |
7324 | if (goodness > best) | |
7325 | { | |
7326 | best = goodness; | |
7327 | best_template[i][j][k] = t; | |
7328 | } | |
7329 | } | |
7330 | } | |
7331 | ||
7332 | for (i = 0; i < NUM_SLOTS; ++i) | |
7333 | md.slot[i].user_template = -1; | |
7334 | ||
7335 | md.pseudo_hash = hash_new (); | |
7336 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7337 | { | |
7338 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7339 | (void *) (pseudo_opcode + i)); | |
7340 | if (err) | |
7341 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
7342 | pseudo_opcode[i].name, err); | |
7343 | } | |
7344 | ||
7345 | md.reg_hash = hash_new (); | |
7346 | md.dynreg_hash = hash_new (); | |
7347 | md.const_hash = hash_new (); | |
7348 | md.entry_hash = hash_new (); | |
7349 | ||
542d6675 | 7350 | /* general registers: */ |
800eeca4 JW |
7351 | |
7352 | total = 128; | |
7353 | for (i = 0; i < total; ++i) | |
7354 | { | |
7355 | sprintf (name, "r%d", i - REG_GR); | |
7356 | md.regsym[i] = declare_register (name, i); | |
7357 | } | |
7358 | ||
542d6675 | 7359 | /* floating point registers: */ |
800eeca4 JW |
7360 | total += 128; |
7361 | for (; i < total; ++i) | |
7362 | { | |
7363 | sprintf (name, "f%d", i - REG_FR); | |
7364 | md.regsym[i] = declare_register (name, i); | |
7365 | } | |
7366 | ||
542d6675 | 7367 | /* application registers: */ |
800eeca4 JW |
7368 | total += 128; |
7369 | ar_base = i; | |
7370 | for (; i < total; ++i) | |
7371 | { | |
7372 | sprintf (name, "ar%d", i - REG_AR); | |
7373 | md.regsym[i] = declare_register (name, i); | |
7374 | } | |
7375 | ||
542d6675 | 7376 | /* control registers: */ |
800eeca4 JW |
7377 | total += 128; |
7378 | cr_base = i; | |
7379 | for (; i < total; ++i) | |
7380 | { | |
7381 | sprintf (name, "cr%d", i - REG_CR); | |
7382 | md.regsym[i] = declare_register (name, i); | |
7383 | } | |
7384 | ||
542d6675 | 7385 | /* predicate registers: */ |
800eeca4 JW |
7386 | total += 64; |
7387 | for (; i < total; ++i) | |
7388 | { | |
7389 | sprintf (name, "p%d", i - REG_P); | |
7390 | md.regsym[i] = declare_register (name, i); | |
7391 | } | |
7392 | ||
542d6675 | 7393 | /* branch registers: */ |
800eeca4 JW |
7394 | total += 8; |
7395 | for (; i < total; ++i) | |
7396 | { | |
7397 | sprintf (name, "b%d", i - REG_BR); | |
7398 | md.regsym[i] = declare_register (name, i); | |
7399 | } | |
7400 | ||
7401 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
7402 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
7403 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
7404 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
7405 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
7406 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
7407 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
7408 | ||
7409 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7410 | { | |
7411 | regnum = indirect_reg[i].regnum; | |
7412 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
7413 | } | |
7414 | ||
542d6675 | 7415 | /* define synonyms for application registers: */ |
800eeca4 JW |
7416 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
7417 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
7418 | REG_AR + ar[i - REG_AR].regnum); | |
7419 | ||
542d6675 | 7420 | /* define synonyms for control registers: */ |
800eeca4 JW |
7421 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
7422 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
7423 | REG_CR + cr[i - REG_CR].regnum); | |
7424 | ||
7425 | declare_register ("gp", REG_GR + 1); | |
7426 | declare_register ("sp", REG_GR + 12); | |
7427 | declare_register ("rp", REG_BR + 0); | |
7428 | ||
542d6675 | 7429 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7430 | declare_register ("psp", REG_PSP); |
7431 | ||
800eeca4 JW |
7432 | declare_register_set ("ret", 4, REG_GR + 8); |
7433 | declare_register_set ("farg", 8, REG_FR + 8); | |
7434 | declare_register_set ("fret", 8, REG_FR + 8); | |
7435 | ||
7436 | for (i = 0; i < NELEMS (const_bits); ++i) | |
7437 | { | |
7438 | err = hash_insert (md.const_hash, const_bits[i].name, | |
7439 | (PTR) (const_bits + i)); | |
7440 | if (err) | |
7441 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
7442 | name, err); | |
7443 | } | |
7444 | ||
44f5c83a JW |
7445 | /* Set the architecture and machine depending on defaults and command line |
7446 | options. */ | |
7447 | if (md.flags & EF_IA_64_ABI64) | |
7448 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7449 | else | |
7450 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7451 | ||
7452 | if (! ok) | |
7453 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7454 | |
557debba JW |
7455 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7456 | ||
7457 | if (md.flags & EF_IA_64_ABI64) | |
7458 | { | |
7459 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7460 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7461 | } | |
7462 | else | |
7463 | { | |
7464 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7465 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7466 | } | |
7467 | ||
800eeca4 JW |
7468 | md.mem_offset.hint = 0; |
7469 | md.path = 0; | |
7470 | md.maxpaths = 0; | |
7471 | md.entry_labels = NULL; | |
7472 | } | |
7473 | ||
970d6792 L |
7474 | /* Set the default options in md. Cannot do this in md_begin because |
7475 | that is called after md_parse_option which is where we set the | |
7476 | options in md based on command line options. */ | |
44f5c83a JW |
7477 | |
7478 | void | |
7479 | ia64_init (argc, argv) | |
2434f565 JW |
7480 | int argc ATTRIBUTE_UNUSED; |
7481 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7482 | { |
1cd8ff38 | 7483 | md.flags = MD_FLAGS_DEFAULT; |
f1dab70d | 7484 | md.detect_dv = 1; |
970d6792 L |
7485 | /* FIXME: We should change it to unwind_check_error someday. */ |
7486 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7487 | md.hint_b = hint_b_error; |
8c2fda1d | 7488 | md.tune = itanium2; |
44f5c83a JW |
7489 | } |
7490 | ||
7491 | /* Return a string for the target object file format. */ | |
7492 | ||
7493 | const char * | |
7494 | ia64_target_format () | |
7495 | { | |
7496 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7497 | { | |
72a76794 JW |
7498 | if (md.flags & EF_IA_64_BE) |
7499 | { | |
7500 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7501 | #if defined(TE_AIX50) |
7463c317 | 7502 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7503 | #elif defined(TE_HPUX) |
7504 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7505 | #else |
72a76794 | 7506 | return "elf64-ia64-big"; |
7463c317 | 7507 | #endif |
72a76794 | 7508 | else |
1cd8ff38 | 7509 | #if defined(TE_AIX50) |
7463c317 | 7510 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7511 | #elif defined(TE_HPUX) |
7512 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7513 | #else |
72a76794 | 7514 | return "elf32-ia64-big"; |
7463c317 | 7515 | #endif |
72a76794 | 7516 | } |
44f5c83a | 7517 | else |
72a76794 JW |
7518 | { |
7519 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7520 | #ifdef TE_AIX50 |
7521 | return "elf64-ia64-aix-little"; | |
7522 | #else | |
72a76794 | 7523 | return "elf64-ia64-little"; |
7463c317 | 7524 | #endif |
72a76794 | 7525 | else |
7463c317 TW |
7526 | #ifdef TE_AIX50 |
7527 | return "elf32-ia64-aix-little"; | |
7528 | #else | |
72a76794 | 7529 | return "elf32-ia64-little"; |
7463c317 | 7530 | #endif |
72a76794 | 7531 | } |
44f5c83a JW |
7532 | } |
7533 | else | |
7534 | return "unknown-format"; | |
7535 | } | |
7536 | ||
800eeca4 JW |
7537 | void |
7538 | ia64_end_of_source () | |
7539 | { | |
542d6675 | 7540 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7541 | insn_group_break (1, 0, 0); |
7542 | ||
542d6675 | 7543 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7544 | ia64_flush_insns (); |
7545 | ||
7546 | bfd_set_private_flags (stdoutput, md.flags); | |
7547 | ||
800eeca4 JW |
7548 | md.mem_offset.hint = 0; |
7549 | } | |
7550 | ||
7551 | void | |
7552 | ia64_start_line () | |
7553 | { | |
f1bcba5b JW |
7554 | if (md.qp.X_op == O_register) |
7555 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7556 | md.qp.X_op = O_absent; |
7557 | ||
7558 | if (ignore_input ()) | |
7559 | return; | |
7560 | ||
7561 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7562 | { | |
7563 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7564 | { |
7565 | static int warned; | |
7566 | ||
7567 | if (!warned) | |
7568 | { | |
7569 | warned = 1; | |
7570 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7571 | } | |
7572 | } | |
800eeca4 | 7573 | else |
542d6675 | 7574 | insn_group_break (1, 0, 0); |
800eeca4 JW |
7575 | } |
7576 | } | |
7577 | ||
f1bcba5b JW |
7578 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7579 | labels. */ | |
7580 | static int defining_tag = 0; | |
7581 | ||
800eeca4 JW |
7582 | int |
7583 | ia64_unrecognized_line (ch) | |
7584 | int ch; | |
7585 | { | |
7586 | switch (ch) | |
7587 | { | |
7588 | case '(': | |
7589 | expression (&md.qp); | |
7590 | if (*input_line_pointer++ != ')') | |
7591 | { | |
7592 | as_bad ("Expected ')'"); | |
7593 | return 0; | |
7594 | } | |
7595 | if (md.qp.X_op != O_register) | |
7596 | { | |
7597 | as_bad ("Qualifying predicate expected"); | |
7598 | return 0; | |
7599 | } | |
7600 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7601 | { | |
7602 | as_bad ("Predicate register expected"); | |
7603 | return 0; | |
7604 | } | |
7605 | return 1; | |
7606 | ||
7607 | case '{': | |
7608 | if (md.manual_bundling) | |
7609 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7610 | else | |
7611 | CURR_SLOT.manual_bundling_on = 1; | |
7612 | md.manual_bundling = 1; | |
7613 | ||
542d6675 KH |
7614 | /* Bundling is only acceptable in explicit mode |
7615 | or when in default automatic mode. */ | |
800eeca4 | 7616 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7617 | { |
7618 | if (!md.mode_explicitly_set | |
7619 | && !md.default_explicit_mode) | |
7620 | dot_dv_mode ('E'); | |
7621 | else | |
7622 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7623 | } | |
800eeca4 JW |
7624 | return 1; |
7625 | ||
7626 | case '}': | |
7627 | if (!md.manual_bundling) | |
7628 | as_warn ("Found '}' when manual bundling is off"); | |
7629 | else | |
7630 | PREV_SLOT.manual_bundling_off = 1; | |
7631 | md.manual_bundling = 0; | |
7632 | ||
7633 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7634 | if (md.detect_dv |
542d6675 KH |
7635 | && md.explicit_mode |
7636 | && !md.mode_explicitly_set | |
7637 | && !md.default_explicit_mode) | |
7638 | dot_dv_mode ('A'); | |
800eeca4 JW |
7639 | |
7640 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7641 | happens automatically because ';' is an end of line marker. */ | |
7642 | SKIP_WHITESPACE (); | |
7643 | if (input_line_pointer[0] == '{') | |
7644 | { | |
7645 | input_line_pointer++; | |
7646 | return ia64_unrecognized_line ('{'); | |
7647 | } | |
7648 | ||
7649 | demand_empty_rest_of_line (); | |
7650 | return 1; | |
7651 | ||
f1bcba5b JW |
7652 | case '[': |
7653 | { | |
7654 | char *s; | |
7655 | char c; | |
7656 | symbolS *tag; | |
4d5a53ff | 7657 | int temp; |
f1bcba5b JW |
7658 | |
7659 | if (md.qp.X_op == O_register) | |
7660 | { | |
7661 | as_bad ("Tag must come before qualifying predicate."); | |
7662 | return 0; | |
7663 | } | |
4d5a53ff JW |
7664 | |
7665 | /* This implements just enough of read_a_source_file in read.c to | |
7666 | recognize labels. */ | |
7667 | if (is_name_beginner (*input_line_pointer)) | |
7668 | { | |
7669 | s = input_line_pointer; | |
7670 | c = get_symbol_end (); | |
7671 | } | |
7672 | else if (LOCAL_LABELS_FB | |
3882b010 | 7673 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7674 | { |
7675 | temp = 0; | |
3882b010 | 7676 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7677 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7678 | fb_label_instance_inc (temp); | |
7679 | s = fb_label_name (temp, 0); | |
7680 | c = *input_line_pointer; | |
7681 | } | |
7682 | else | |
7683 | { | |
7684 | s = NULL; | |
7685 | c = '\0'; | |
7686 | } | |
f1bcba5b JW |
7687 | if (c != ':') |
7688 | { | |
7689 | /* Put ':' back for error messages' sake. */ | |
7690 | *input_line_pointer++ = ':'; | |
7691 | as_bad ("Expected ':'"); | |
7692 | return 0; | |
7693 | } | |
4d5a53ff | 7694 | |
f1bcba5b JW |
7695 | defining_tag = 1; |
7696 | tag = colon (s); | |
7697 | defining_tag = 0; | |
7698 | /* Put ':' back for error messages' sake. */ | |
7699 | *input_line_pointer++ = ':'; | |
7700 | if (*input_line_pointer++ != ']') | |
7701 | { | |
7702 | as_bad ("Expected ']'"); | |
7703 | return 0; | |
7704 | } | |
7705 | if (! tag) | |
7706 | { | |
7707 | as_bad ("Tag name expected"); | |
7708 | return 0; | |
7709 | } | |
7710 | return 1; | |
7711 | } | |
7712 | ||
800eeca4 JW |
7713 | default: |
7714 | break; | |
7715 | } | |
542d6675 KH |
7716 | |
7717 | /* Not a valid line. */ | |
7718 | return 0; | |
800eeca4 JW |
7719 | } |
7720 | ||
7721 | void | |
7722 | ia64_frob_label (sym) | |
7723 | struct symbol *sym; | |
7724 | { | |
7725 | struct label_fix *fix; | |
7726 | ||
f1bcba5b JW |
7727 | /* Tags need special handling since they are not bundle breaks like |
7728 | labels. */ | |
7729 | if (defining_tag) | |
7730 | { | |
7731 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7732 | fix->sym = sym; | |
7733 | fix->next = CURR_SLOT.tag_fixups; | |
7734 | CURR_SLOT.tag_fixups = fix; | |
7735 | ||
7736 | return; | |
7737 | } | |
7738 | ||
800eeca4 JW |
7739 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7740 | { | |
7741 | md.last_text_seg = now_seg; | |
7742 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7743 | fix->sym = sym; | |
7744 | fix->next = CURR_SLOT.label_fixups; | |
7745 | CURR_SLOT.label_fixups = fix; | |
7746 | ||
542d6675 | 7747 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7748 | if (md.path == md.maxpaths) |
542d6675 KH |
7749 | { |
7750 | md.maxpaths += 20; | |
7751 | md.entry_labels = (const char **) | |
7752 | xrealloc ((void *) md.entry_labels, | |
7753 | md.maxpaths * sizeof (char *)); | |
7754 | } | |
800eeca4 JW |
7755 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7756 | } | |
7757 | } | |
7758 | ||
936cf02e JW |
7759 | #ifdef TE_HPUX |
7760 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7761 | that are declared but unused. This routine removes declared, | |
7762 | unused symbols from an object. */ | |
7763 | int | |
7764 | ia64_frob_symbol (sym) | |
7765 | struct symbol *sym; | |
7766 | { | |
7767 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7768 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7769 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7770 | && ! S_IS_EXTERNAL (sym))) | |
7771 | return 1; | |
7772 | return 0; | |
7773 | } | |
7774 | #endif | |
7775 | ||
800eeca4 JW |
7776 | void |
7777 | ia64_flush_pending_output () | |
7778 | { | |
4d5a53ff JW |
7779 | if (!md.keep_pending_output |
7780 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7781 | { |
7782 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7783 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7784 | insn_group_break (1, 0, 0); | |
7785 | ia64_flush_insns (); | |
7786 | } | |
7787 | } | |
7788 | ||
7789 | /* Do ia64-specific expression optimization. All that's done here is | |
7790 | to transform index expressions that are either due to the indexing | |
7791 | of rotating registers or due to the indexing of indirect register | |
7792 | sets. */ | |
7793 | int | |
7794 | ia64_optimize_expr (l, op, r) | |
7795 | expressionS *l; | |
7796 | operatorT op; | |
7797 | expressionS *r; | |
7798 | { | |
7799 | unsigned num_regs; | |
7800 | ||
7801 | if (op == O_index) | |
7802 | { | |
7803 | if (l->X_op == O_register && r->X_op == O_constant) | |
7804 | { | |
7805 | num_regs = (l->X_add_number >> 16); | |
7806 | if ((unsigned) r->X_add_number >= num_regs) | |
7807 | { | |
7808 | if (!num_regs) | |
7809 | as_bad ("No current frame"); | |
7810 | else | |
7811 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7812 | r->X_add_number = 0; | |
7813 | } | |
7814 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7815 | return 1; | |
7816 | } | |
7817 | else if (l->X_op == O_register && r->X_op == O_register) | |
7818 | { | |
7819 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7820 | || l->X_add_number == IND_MEM) | |
7821 | { | |
7822 | as_bad ("Indirect register set name expected"); | |
7823 | l->X_add_number = IND_CPUID; | |
7824 | } | |
7825 | l->X_op = O_index; | |
7826 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7827 | l->X_add_number = r->X_add_number; | |
7828 | return 1; | |
7829 | } | |
7830 | } | |
7831 | return 0; | |
7832 | } | |
7833 | ||
7834 | int | |
16a48f83 | 7835 | ia64_parse_name (name, e, nextcharP) |
800eeca4 JW |
7836 | char *name; |
7837 | expressionS *e; | |
16a48f83 | 7838 | char *nextcharP; |
800eeca4 JW |
7839 | { |
7840 | struct const_desc *cdesc; | |
7841 | struct dynreg *dr = 0; | |
16a48f83 | 7842 | unsigned int idx; |
800eeca4 JW |
7843 | struct symbol *sym; |
7844 | char *end; | |
7845 | ||
16a48f83 JB |
7846 | if (*name == '@') |
7847 | { | |
7848 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
7849 | ||
7850 | /* Find what relocation pseudo-function we're dealing with. */ | |
7851 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
7852 | if (pseudo_func[idx].name | |
7853 | && pseudo_func[idx].name[0] == name[1] | |
7854 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
7855 | { | |
7856 | pseudo_type = pseudo_func[idx].type; | |
7857 | break; | |
7858 | } | |
7859 | switch (pseudo_type) | |
7860 | { | |
7861 | case PSEUDO_FUNC_RELOC: | |
7862 | end = input_line_pointer; | |
7863 | if (*nextcharP != '(') | |
7864 | { | |
7865 | as_bad ("Expected '('"); | |
2f6d622e | 7866 | break; |
16a48f83 JB |
7867 | } |
7868 | /* Skip '('. */ | |
7869 | ++input_line_pointer; | |
7870 | expression (e); | |
7871 | if (*input_line_pointer != ')') | |
7872 | { | |
7873 | as_bad ("Missing ')'"); | |
7874 | goto done; | |
7875 | } | |
7876 | /* Skip ')'. */ | |
7877 | ++input_line_pointer; | |
7878 | if (e->X_op != O_symbol) | |
7879 | { | |
7880 | if (e->X_op != O_pseudo_fixup) | |
7881 | { | |
7882 | as_bad ("Not a symbolic expression"); | |
7883 | goto done; | |
7884 | } | |
7885 | if (idx != FUNC_LT_RELATIVE) | |
7886 | { | |
7887 | as_bad ("Illegal combination of relocation functions"); | |
7888 | goto done; | |
7889 | } | |
7890 | switch (S_GET_VALUE (e->X_op_symbol)) | |
7891 | { | |
7892 | case FUNC_FPTR_RELATIVE: | |
7893 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
7894 | case FUNC_DTP_MODULE: | |
7895 | idx = FUNC_LT_DTP_MODULE; break; | |
7896 | case FUNC_DTP_RELATIVE: | |
7897 | idx = FUNC_LT_DTP_RELATIVE; break; | |
7898 | case FUNC_TP_RELATIVE: | |
7899 | idx = FUNC_LT_TP_RELATIVE; break; | |
7900 | default: | |
7901 | as_bad ("Illegal combination of relocation functions"); | |
7902 | goto done; | |
7903 | } | |
7904 | } | |
7905 | /* Make sure gas doesn't get rid of local symbols that are used | |
7906 | in relocs. */ | |
7907 | e->X_op = O_pseudo_fixup; | |
7908 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
7909 | done: |
7910 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
7911 | break; |
7912 | ||
7913 | case PSEUDO_FUNC_CONST: | |
7914 | e->X_op = O_constant; | |
7915 | e->X_add_number = pseudo_func[idx].u.ival; | |
7916 | break; | |
7917 | ||
7918 | case PSEUDO_FUNC_REG: | |
7919 | e->X_op = O_register; | |
7920 | e->X_add_number = pseudo_func[idx].u.ival; | |
7921 | break; | |
7922 | ||
7923 | default: | |
7924 | return 0; | |
7925 | } | |
16a48f83 JB |
7926 | return 1; |
7927 | } | |
7928 | ||
542d6675 | 7929 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7930 | sym = hash_find (md.reg_hash, name); |
7931 | if (sym) | |
7932 | { | |
7933 | e->X_op = O_register; | |
7934 | e->X_add_number = S_GET_VALUE (sym); | |
7935 | return 1; | |
7936 | } | |
7937 | ||
7938 | cdesc = hash_find (md.const_hash, name); | |
7939 | if (cdesc) | |
7940 | { | |
7941 | e->X_op = O_constant; | |
7942 | e->X_add_number = cdesc->value; | |
7943 | return 1; | |
7944 | } | |
7945 | ||
542d6675 | 7946 | /* check for inN, locN, or outN: */ |
26b810ce | 7947 | idx = 0; |
800eeca4 JW |
7948 | switch (name[0]) |
7949 | { | |
7950 | case 'i': | |
3882b010 | 7951 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7952 | { |
7953 | dr = &md.in; | |
26b810ce | 7954 | idx = 2; |
800eeca4 JW |
7955 | } |
7956 | break; | |
7957 | ||
7958 | case 'l': | |
3882b010 | 7959 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7960 | { |
7961 | dr = &md.loc; | |
26b810ce | 7962 | idx = 3; |
800eeca4 JW |
7963 | } |
7964 | break; | |
7965 | ||
7966 | case 'o': | |
3882b010 | 7967 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7968 | { |
7969 | dr = &md.out; | |
26b810ce | 7970 | idx = 3; |
800eeca4 JW |
7971 | } |
7972 | break; | |
7973 | ||
7974 | default: | |
7975 | break; | |
7976 | } | |
7977 | ||
26b810ce JB |
7978 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
7979 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 7980 | { |
26b810ce JB |
7981 | unsigned long regnum; |
7982 | ||
542d6675 | 7983 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
7984 | regnum = strtoul (name + idx, &end, 10); |
7985 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 7986 | { |
26b810ce | 7987 | if (regnum >= dr->num_regs) |
800eeca4 JW |
7988 | { |
7989 | if (!dr->num_regs) | |
7990 | as_bad ("No current frame"); | |
7991 | else | |
542d6675 KH |
7992 | as_bad ("Register number out of range 0..%u", |
7993 | dr->num_regs - 1); | |
800eeca4 JW |
7994 | regnum = 0; |
7995 | } | |
7996 | e->X_op = O_register; | |
7997 | e->X_add_number = dr->base + regnum; | |
7998 | return 1; | |
7999 | } | |
8000 | } | |
8001 | ||
20b36a95 JB |
8002 | end = alloca (strlen (name) + 1); |
8003 | strcpy (end, name); | |
8004 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8005 | if ((dr = hash_find (md.dynreg_hash, name))) |
8006 | { | |
8007 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8008 | Store the base register number in the low 16 bits of |
8009 | X_add_number and the size of the register set in the top 16 | |
8010 | bits. */ | |
800eeca4 JW |
8011 | e->X_op = O_register; |
8012 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8013 | return 1; | |
8014 | } | |
8015 | return 0; | |
8016 | } | |
8017 | ||
8018 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8019 | ||
8020 | char * | |
8021 | ia64_canonicalize_symbol_name (name) | |
8022 | char *name; | |
8023 | { | |
20b36a95 JB |
8024 | size_t len = strlen (name), full = len; |
8025 | ||
8026 | while (len > 0 && name[len - 1] == '#') | |
8027 | --len; | |
8028 | if (len <= 0) | |
8029 | { | |
8030 | if (full > 0) | |
8031 | as_bad ("Standalone `#' is illegal"); | |
8032 | else | |
8033 | as_bad ("Zero-length symbol is illegal"); | |
8034 | } | |
8035 | else if (len < full - 1) | |
8036 | as_warn ("Redundant `#' suffix operators"); | |
8037 | name[len] = '\0'; | |
800eeca4 JW |
8038 | return name; |
8039 | } | |
8040 | ||
3e37788f JW |
8041 | /* Return true if idesc is a conditional branch instruction. This excludes |
8042 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8043 | because they always read/write resources regardless of the value of the | |
8044 | qualifying predicate. br.ia must always use p0, and hence is always | |
8045 | taken. Thus this function returns true for branches which can fall | |
8046 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8047 | |
800eeca4 JW |
8048 | static int |
8049 | is_conditional_branch (idesc) | |
542d6675 | 8050 | struct ia64_opcode *idesc; |
800eeca4 | 8051 | { |
1deb8127 | 8052 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8053 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8054 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8055 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8056 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8057 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8058 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8059 | || idesc->name[2] == 'l' | |
8060 | /* br.cond, br.call, br.clr */ | |
8061 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8062 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8063 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8064 | } |
8065 | ||
8066 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8067 | returns zero. */ |
8068 | ||
800eeca4 JW |
8069 | static int |
8070 | is_taken_branch (idesc) | |
542d6675 | 8071 | struct ia64_opcode *idesc; |
800eeca4 JW |
8072 | { |
8073 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8074 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8075 | } |
8076 | ||
8077 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8078 | doubt, returns zero. */ |
8079 | ||
800eeca4 JW |
8080 | static int |
8081 | is_interruption_or_rfi (idesc) | |
542d6675 | 8082 | struct ia64_opcode *idesc; |
800eeca4 JW |
8083 | { |
8084 | if (strcmp (idesc->name, "rfi") == 0) | |
8085 | return 1; | |
8086 | return 0; | |
8087 | } | |
8088 | ||
8089 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8090 | -1 if there is no dependency. */ | |
542d6675 | 8091 | |
800eeca4 JW |
8092 | static int |
8093 | depends_on (depind, idesc) | |
542d6675 KH |
8094 | int depind; |
8095 | struct ia64_opcode *idesc; | |
800eeca4 JW |
8096 | { |
8097 | int i; | |
8098 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8099 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8100 | { |
542d6675 KH |
8101 | if (depind == DEP (dep->chks[i])) |
8102 | return i; | |
800eeca4 JW |
8103 | } |
8104 | return -1; | |
8105 | } | |
8106 | ||
8107 | /* Determine a set of specific resources used for a particular resource | |
8108 | class. Returns the number of specific resources identified For those | |
8109 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8110 | marked nonspecific. |
800eeca4 JW |
8111 | |
8112 | Meanings of value in 'NOTE': | |
8113 | 1) only read/write when the register number is explicitly encoded in the | |
8114 | insn. | |
8115 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8116 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8117 | 3) general register value is used to specify an indirect register; not |
8118 | determinable statically. | |
8119 | 4) only read the given resource when bits 7:0 of the indirect index | |
8120 | register value does not match the register number of the resource; not | |
8121 | determinable statically. | |
8122 | 5) all rules are implementation specific. | |
8123 | 6) only when both the index specified by the reader and the index specified | |
8124 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8125 | statically. |
800eeca4 | 8126 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8127 | set |
800eeca4 JW |
8128 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8129 | only read when these insns reference FR2-31 | |
8130 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8131 | written when these insns write FR32-127 | |
8132 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8133 | instruction | |
8134 | 11) The target predicates are written independently of PR[qp], but source | |
8135 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8136 | cannot statically be determined, all source registers are marked used. | |
8137 | 12) This insn only reads the specified predicate register when that | |
8138 | register is the PR[qp]. | |
8139 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 8140 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8141 | 14) The RSE resource includes the implementation-specific RSE internal |
8142 | state resources. At least one (and possibly more) of these resources are | |
8143 | read by each instruction listed in IC:rse-readers. At least one (and | |
8144 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8145 | IC:rse-writers. |
800eeca4 | 8146 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8147 | generate. |
800eeca4 JW |
8148 | |
8149 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8150 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8151 | */ |
8152 | ||
8153 | #define MAX_SPECS 256 | |
8154 | #define DV_CHK 1 | |
8155 | #define DV_REG 0 | |
8156 | ||
8157 | static int | |
8158 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
8159 | const struct ia64_dependency *dep; |
8160 | struct ia64_opcode *idesc; | |
8161 | int type; /* is this a DV chk or a DV reg? */ | |
8162 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
8163 | int note; /* resource note for this insn's usage */ | |
8164 | int path; /* which execution path to examine */ | |
800eeca4 JW |
8165 | { |
8166 | int count = 0; | |
8167 | int i; | |
8168 | int rsrc_write = 0; | |
8169 | struct rsrc tmpl; | |
197865e8 | 8170 | |
800eeca4 JW |
8171 | if (dep->mode == IA64_DV_WAW |
8172 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8173 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8174 | rsrc_write = 1; | |
8175 | ||
8176 | /* template for any resources we identify */ | |
8177 | tmpl.dependency = dep; | |
8178 | tmpl.note = note; | |
8179 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8180 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8181 | tmpl.link_to_qp_branch = 1; | |
8182 | tmpl.mem_offset.hint = 0; | |
8183 | tmpl.specific = 1; | |
a66d2bb7 | 8184 | tmpl.index = -1; |
7484b8e6 | 8185 | tmpl.cmp_type = CMP_NONE; |
800eeca4 JW |
8186 | |
8187 | #define UNHANDLED \ | |
8188 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8189 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8190 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8191 | ||
8192 | /* we don't need to track these */ | |
8193 | if (dep->semantics == IA64_DVS_NONE) | |
8194 | return 0; | |
8195 | ||
8196 | switch (dep->specifier) | |
8197 | { | |
8198 | case IA64_RS_AR_K: | |
8199 | if (note == 1) | |
542d6675 KH |
8200 | { |
8201 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8202 | { | |
8203 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8204 | if (regno >= 0 && regno <= 7) | |
8205 | { | |
8206 | specs[count] = tmpl; | |
8207 | specs[count++].index = regno; | |
8208 | } | |
8209 | } | |
8210 | } | |
800eeca4 | 8211 | else if (note == 0) |
542d6675 KH |
8212 | { |
8213 | for (i = 0; i < 8; i++) | |
8214 | { | |
8215 | specs[count] = tmpl; | |
8216 | specs[count++].index = i; | |
8217 | } | |
8218 | } | |
800eeca4 | 8219 | else |
542d6675 KH |
8220 | { |
8221 | UNHANDLED; | |
8222 | } | |
800eeca4 JW |
8223 | break; |
8224 | ||
8225 | case IA64_RS_AR_UNAT: | |
8226 | /* This is a mov =AR or mov AR= instruction. */ | |
8227 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8228 | { | |
8229 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8230 | if (regno == AR_UNAT) | |
8231 | { | |
8232 | specs[count++] = tmpl; | |
8233 | } | |
8234 | } | |
8235 | else | |
8236 | { | |
8237 | /* This is a spill/fill, or other instruction that modifies the | |
8238 | unat register. */ | |
8239 | ||
8240 | /* Unless we can determine the specific bits used, mark the whole | |
8241 | thing; bits 8:3 of the memory address indicate the bit used in | |
8242 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8243 | subset of conflicts. */ | |
8244 | specs[count] = tmpl; | |
8245 | if (md.mem_offset.hint) | |
8246 | { | |
542d6675 KH |
8247 | if (md.debug_dv) |
8248 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8249 | /* The index isn't actually used, just set it to something | |
8250 | approximating the bit index. */ | |
800eeca4 JW |
8251 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8252 | specs[count].mem_offset.hint = 1; | |
8253 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8254 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8255 | } | |
8256 | else | |
8257 | { | |
8258 | specs[count++].specific = 0; | |
8259 | } | |
8260 | } | |
8261 | break; | |
8262 | ||
8263 | case IA64_RS_AR: | |
8264 | if (note == 1) | |
542d6675 KH |
8265 | { |
8266 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8267 | { | |
8268 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8269 | if ((regno >= 8 && regno <= 15) | |
8270 | || (regno >= 20 && regno <= 23) | |
8271 | || (regno >= 31 && regno <= 39) | |
8272 | || (regno >= 41 && regno <= 47) | |
8273 | || (regno >= 67 && regno <= 111)) | |
8274 | { | |
8275 | specs[count] = tmpl; | |
8276 | specs[count++].index = regno; | |
8277 | } | |
8278 | } | |
8279 | } | |
800eeca4 | 8280 | else |
542d6675 KH |
8281 | { |
8282 | UNHANDLED; | |
8283 | } | |
800eeca4 JW |
8284 | break; |
8285 | ||
8286 | case IA64_RS_ARb: | |
8287 | if (note == 1) | |
542d6675 KH |
8288 | { |
8289 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8290 | { | |
8291 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8292 | if ((regno >= 48 && regno <= 63) | |
8293 | || (regno >= 112 && regno <= 127)) | |
8294 | { | |
8295 | specs[count] = tmpl; | |
8296 | specs[count++].index = regno; | |
8297 | } | |
8298 | } | |
8299 | } | |
800eeca4 | 8300 | else if (note == 0) |
542d6675 KH |
8301 | { |
8302 | for (i = 48; i < 64; i++) | |
8303 | { | |
8304 | specs[count] = tmpl; | |
8305 | specs[count++].index = i; | |
8306 | } | |
8307 | for (i = 112; i < 128; i++) | |
8308 | { | |
8309 | specs[count] = tmpl; | |
8310 | specs[count++].index = i; | |
8311 | } | |
8312 | } | |
197865e8 | 8313 | else |
542d6675 KH |
8314 | { |
8315 | UNHANDLED; | |
8316 | } | |
800eeca4 JW |
8317 | break; |
8318 | ||
8319 | case IA64_RS_BR: | |
8320 | if (note != 1) | |
542d6675 KH |
8321 | { |
8322 | UNHANDLED; | |
8323 | } | |
800eeca4 | 8324 | else |
542d6675 KH |
8325 | { |
8326 | if (rsrc_write) | |
8327 | { | |
8328 | for (i = 0; i < idesc->num_outputs; i++) | |
8329 | if (idesc->operands[i] == IA64_OPND_B1 | |
8330 | || idesc->operands[i] == IA64_OPND_B2) | |
8331 | { | |
8332 | specs[count] = tmpl; | |
8333 | specs[count++].index = | |
8334 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8335 | } | |
8336 | } | |
8337 | else | |
8338 | { | |
40449e9f | 8339 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8340 | if (idesc->operands[i] == IA64_OPND_B1 |
8341 | || idesc->operands[i] == IA64_OPND_B2) | |
8342 | { | |
8343 | specs[count] = tmpl; | |
8344 | specs[count++].index = | |
8345 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8346 | } | |
8347 | } | |
8348 | } | |
800eeca4 JW |
8349 | break; |
8350 | ||
8351 | case IA64_RS_CPUID: /* four or more registers */ | |
8352 | if (note == 3) | |
542d6675 KH |
8353 | { |
8354 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8355 | { | |
8356 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8357 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8358 | && KNOWN (regno)) | |
8359 | { | |
8360 | specs[count] = tmpl; | |
8361 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8362 | } | |
8363 | else | |
8364 | { | |
8365 | specs[count] = tmpl; | |
8366 | specs[count++].specific = 0; | |
8367 | } | |
8368 | } | |
8369 | } | |
800eeca4 | 8370 | else |
542d6675 KH |
8371 | { |
8372 | UNHANDLED; | |
8373 | } | |
800eeca4 JW |
8374 | break; |
8375 | ||
8376 | case IA64_RS_DBR: /* four or more registers */ | |
8377 | if (note == 3) | |
542d6675 KH |
8378 | { |
8379 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8380 | { | |
8381 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8382 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8383 | && KNOWN (regno)) | |
8384 | { | |
8385 | specs[count] = tmpl; | |
8386 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8387 | } | |
8388 | else | |
8389 | { | |
8390 | specs[count] = tmpl; | |
8391 | specs[count++].specific = 0; | |
8392 | } | |
8393 | } | |
8394 | } | |
800eeca4 | 8395 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8396 | { |
8397 | specs[count] = tmpl; | |
8398 | specs[count++].specific = 0; | |
8399 | } | |
800eeca4 | 8400 | else |
542d6675 KH |
8401 | { |
8402 | UNHANDLED; | |
8403 | } | |
800eeca4 JW |
8404 | break; |
8405 | ||
8406 | case IA64_RS_IBR: /* four or more registers */ | |
8407 | if (note == 3) | |
542d6675 KH |
8408 | { |
8409 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8410 | { | |
8411 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8412 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8413 | && KNOWN (regno)) | |
8414 | { | |
8415 | specs[count] = tmpl; | |
8416 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8417 | } | |
8418 | else | |
8419 | { | |
8420 | specs[count] = tmpl; | |
8421 | specs[count++].specific = 0; | |
8422 | } | |
8423 | } | |
8424 | } | |
800eeca4 | 8425 | else |
542d6675 KH |
8426 | { |
8427 | UNHANDLED; | |
8428 | } | |
800eeca4 JW |
8429 | break; |
8430 | ||
8431 | case IA64_RS_MSR: | |
8432 | if (note == 5) | |
8433 | { | |
8434 | /* These are implementation specific. Force all references to | |
8435 | conflict with all other references. */ | |
8436 | specs[count] = tmpl; | |
8437 | specs[count++].specific = 0; | |
8438 | } | |
8439 | else | |
8440 | { | |
8441 | UNHANDLED; | |
8442 | } | |
8443 | break; | |
8444 | ||
8445 | case IA64_RS_PKR: /* 16 or more registers */ | |
8446 | if (note == 3 || note == 4) | |
542d6675 KH |
8447 | { |
8448 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8449 | { | |
8450 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8451 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8452 | && KNOWN (regno)) | |
8453 | { | |
8454 | if (note == 3) | |
8455 | { | |
8456 | specs[count] = tmpl; | |
8457 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8458 | } | |
8459 | else | |
8460 | for (i = 0; i < NELEMS (gr_values); i++) | |
8461 | { | |
8462 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8463 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8464 | { |
8465 | specs[count] = tmpl; | |
8466 | specs[count++].index = i; | |
8467 | } | |
8468 | } | |
8469 | } | |
8470 | else | |
8471 | { | |
8472 | specs[count] = tmpl; | |
8473 | specs[count++].specific = 0; | |
8474 | } | |
8475 | } | |
8476 | } | |
8477 | else if (note == 0) | |
8478 | { | |
8479 | /* probe et al. */ | |
8480 | specs[count] = tmpl; | |
8481 | specs[count++].specific = 0; | |
8482 | } | |
8483 | break; | |
8484 | ||
8485 | case IA64_RS_PMC: /* four or more registers */ | |
8486 | if (note == 3) | |
8487 | { | |
8488 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8489 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8490 | ||
8491 | { | |
8492 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8493 | ? 1 : !rsrc_write); | |
8494 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8495 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8496 | && KNOWN (regno)) | |
8497 | { | |
8498 | specs[count] = tmpl; | |
8499 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8500 | } | |
8501 | else | |
8502 | { | |
8503 | specs[count] = tmpl; | |
8504 | specs[count++].specific = 0; | |
8505 | } | |
8506 | } | |
8507 | } | |
8508 | else | |
8509 | { | |
8510 | UNHANDLED; | |
8511 | } | |
800eeca4 JW |
8512 | break; |
8513 | ||
8514 | case IA64_RS_PMD: /* four or more registers */ | |
8515 | if (note == 3) | |
542d6675 KH |
8516 | { |
8517 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8518 | { | |
8519 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8520 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8521 | && KNOWN (regno)) | |
8522 | { | |
8523 | specs[count] = tmpl; | |
8524 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8525 | } | |
8526 | else | |
8527 | { | |
8528 | specs[count] = tmpl; | |
8529 | specs[count++].specific = 0; | |
8530 | } | |
8531 | } | |
8532 | } | |
800eeca4 | 8533 | else |
542d6675 KH |
8534 | { |
8535 | UNHANDLED; | |
8536 | } | |
800eeca4 JW |
8537 | break; |
8538 | ||
8539 | case IA64_RS_RR: /* eight registers */ | |
8540 | if (note == 6) | |
542d6675 KH |
8541 | { |
8542 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8543 | { | |
8544 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8545 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8546 | && KNOWN (regno)) | |
8547 | { | |
8548 | specs[count] = tmpl; | |
8549 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8550 | } | |
8551 | else | |
8552 | { | |
8553 | specs[count] = tmpl; | |
8554 | specs[count++].specific = 0; | |
8555 | } | |
8556 | } | |
8557 | } | |
800eeca4 | 8558 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8559 | { |
8560 | specs[count] = tmpl; | |
8561 | specs[count++].specific = 0; | |
8562 | } | |
197865e8 | 8563 | else |
542d6675 KH |
8564 | { |
8565 | UNHANDLED; | |
8566 | } | |
800eeca4 JW |
8567 | break; |
8568 | ||
8569 | case IA64_RS_CR_IRR: | |
197865e8 | 8570 | if (note == 0) |
542d6675 KH |
8571 | { |
8572 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8573 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8574 | if (rsrc_write | |
8575 | && idesc->operands[1] == IA64_OPND_CR3 | |
8576 | && regno == CR_IVR) | |
8577 | { | |
8578 | for (i = 0; i < 4; i++) | |
8579 | { | |
8580 | specs[count] = tmpl; | |
8581 | specs[count++].index = CR_IRR0 + i; | |
8582 | } | |
8583 | } | |
8584 | } | |
800eeca4 | 8585 | else if (note == 1) |
542d6675 KH |
8586 | { |
8587 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8588 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8589 | && regno >= CR_IRR0 | |
8590 | && regno <= CR_IRR3) | |
8591 | { | |
8592 | specs[count] = tmpl; | |
8593 | specs[count++].index = regno; | |
8594 | } | |
8595 | } | |
800eeca4 | 8596 | else |
542d6675 KH |
8597 | { |
8598 | UNHANDLED; | |
8599 | } | |
800eeca4 JW |
8600 | break; |
8601 | ||
8602 | case IA64_RS_CR_LRR: | |
8603 | if (note != 1) | |
542d6675 KH |
8604 | { |
8605 | UNHANDLED; | |
8606 | } | |
197865e8 | 8607 | else |
542d6675 KH |
8608 | { |
8609 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8610 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8611 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8612 | { | |
8613 | specs[count] = tmpl; | |
8614 | specs[count++].index = regno; | |
8615 | } | |
8616 | } | |
800eeca4 JW |
8617 | break; |
8618 | ||
8619 | case IA64_RS_CR: | |
8620 | if (note == 1) | |
542d6675 KH |
8621 | { |
8622 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8623 | { | |
8624 | specs[count] = tmpl; | |
8625 | specs[count++].index = | |
8626 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8627 | } | |
8628 | } | |
800eeca4 | 8629 | else |
542d6675 KH |
8630 | { |
8631 | UNHANDLED; | |
8632 | } | |
800eeca4 JW |
8633 | break; |
8634 | ||
8635 | case IA64_RS_FR: | |
8636 | case IA64_RS_FRb: | |
8637 | if (note != 1) | |
542d6675 KH |
8638 | { |
8639 | UNHANDLED; | |
8640 | } | |
800eeca4 | 8641 | else if (rsrc_write) |
542d6675 KH |
8642 | { |
8643 | if (dep->specifier == IA64_RS_FRb | |
8644 | && idesc->operands[0] == IA64_OPND_F1) | |
8645 | { | |
8646 | specs[count] = tmpl; | |
8647 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8648 | } | |
8649 | } | |
800eeca4 | 8650 | else |
542d6675 KH |
8651 | { |
8652 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8653 | { | |
8654 | if (idesc->operands[i] == IA64_OPND_F2 | |
8655 | || idesc->operands[i] == IA64_OPND_F3 | |
8656 | || idesc->operands[i] == IA64_OPND_F4) | |
8657 | { | |
8658 | specs[count] = tmpl; | |
8659 | specs[count++].index = | |
8660 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8661 | } | |
8662 | } | |
8663 | } | |
800eeca4 JW |
8664 | break; |
8665 | ||
8666 | case IA64_RS_GR: | |
8667 | if (note == 13) | |
542d6675 KH |
8668 | { |
8669 | /* This reference applies only to the GR whose value is loaded with | |
8670 | data returned from memory. */ | |
8671 | specs[count] = tmpl; | |
8672 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8673 | } | |
800eeca4 | 8674 | else if (note == 1) |
542d6675 KH |
8675 | { |
8676 | if (rsrc_write) | |
8677 | { | |
8678 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8679 | if (idesc->operands[i] == IA64_OPND_R1 |
8680 | || idesc->operands[i] == IA64_OPND_R2 | |
8681 | || idesc->operands[i] == IA64_OPND_R3) | |
8682 | { | |
8683 | specs[count] = tmpl; | |
197865e8 | 8684 | specs[count++].index = |
50b81f19 JW |
8685 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8686 | } | |
8687 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8688 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8689 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8690 | { | |
8691 | specs[count] = tmpl; | |
8692 | specs[count++].index = | |
8693 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8694 | } | |
542d6675 KH |
8695 | } |
8696 | else | |
8697 | { | |
8698 | /* Look for anything that reads a GR. */ | |
8699 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8700 | { | |
8701 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8702 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8703 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8704 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8705 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8706 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8707 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8708 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8709 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8710 | || ((i >= idesc->num_outputs) | |
8711 | && (idesc->operands[i] == IA64_OPND_R1 | |
8712 | || idesc->operands[i] == IA64_OPND_R2 | |
8713 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8714 | /* addl source register. */ |
8715 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8716 | { |
8717 | specs[count] = tmpl; | |
8718 | specs[count++].index = | |
8719 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8720 | } | |
8721 | } | |
8722 | } | |
8723 | } | |
197865e8 | 8724 | else |
542d6675 KH |
8725 | { |
8726 | UNHANDLED; | |
8727 | } | |
800eeca4 JW |
8728 | break; |
8729 | ||
139368c9 JW |
8730 | /* This is the same as IA64_RS_PRr, except that the register range is |
8731 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8732 | case IA64_RS_PR: |
8733 | if (note == 0) | |
542d6675 | 8734 | { |
139368c9 | 8735 | for (i = 1; i < 16; i++) |
542d6675 | 8736 | { |
139368c9 JW |
8737 | specs[count] = tmpl; |
8738 | specs[count++].index = i; | |
8739 | } | |
8740 | } | |
8741 | else if (note == 7) | |
8742 | { | |
8743 | valueT mask = 0; | |
8744 | /* Mark only those registers indicated by the mask. */ | |
8745 | if (rsrc_write) | |
8746 | { | |
8747 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8748 | for (i = 1; i < 16; i++) | |
8749 | if (mask & ((valueT) 1 << i)) | |
8750 | { | |
8751 | specs[count] = tmpl; | |
8752 | specs[count++].index = i; | |
8753 | } | |
8754 | } | |
8755 | else | |
8756 | { | |
8757 | UNHANDLED; | |
8758 | } | |
8759 | } | |
8760 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8761 | { | |
8762 | if (rsrc_write) | |
8763 | { | |
8764 | for (i = 0; i < idesc->num_outputs; i++) | |
8765 | { | |
8766 | if (idesc->operands[i] == IA64_OPND_P1 | |
8767 | || idesc->operands[i] == IA64_OPND_P2) | |
8768 | { | |
8769 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8770 | if (regno >= 1 && regno < 16) | |
8771 | { | |
8772 | specs[count] = tmpl; | |
8773 | specs[count++].index = regno; | |
8774 | } | |
8775 | } | |
8776 | } | |
8777 | } | |
8778 | else | |
8779 | { | |
8780 | UNHANDLED; | |
8781 | } | |
8782 | } | |
8783 | else if (note == 12) | |
8784 | { | |
8785 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8786 | { | |
8787 | specs[count] = tmpl; | |
8788 | specs[count++].index = CURR_SLOT.qp_regno; | |
8789 | } | |
8790 | } | |
8791 | else if (note == 1) | |
8792 | { | |
8793 | if (rsrc_write) | |
8794 | { | |
8795 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8796 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8797 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8798 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8799 | |
8800 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8801 | || idesc->operands[0] == IA64_OPND_P2) | |
8802 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8803 | { |
8804 | specs[count] = tmpl; | |
139368c9 JW |
8805 | specs[count].cmp_type = |
8806 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8807 | specs[count++].index = p1; | |
8808 | } | |
8809 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8810 | || idesc->operands[1] == IA64_OPND_P2) | |
8811 | && p2 >= 1 && p2 < 16) | |
8812 | { | |
8813 | specs[count] = tmpl; | |
8814 | specs[count].cmp_type = | |
8815 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8816 | specs[count++].index = p2; | |
542d6675 KH |
8817 | } |
8818 | } | |
8819 | else | |
8820 | { | |
139368c9 | 8821 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8822 | { |
8823 | specs[count] = tmpl; | |
139368c9 JW |
8824 | specs[count++].index = CURR_SLOT.qp_regno; |
8825 | } | |
8826 | if (idesc->operands[1] == IA64_OPND_PR) | |
8827 | { | |
8828 | for (i = 1; i < 16; i++) | |
8829 | { | |
8830 | specs[count] = tmpl; | |
8831 | specs[count++].index = i; | |
8832 | } | |
542d6675 KH |
8833 | } |
8834 | } | |
8835 | } | |
139368c9 JW |
8836 | else |
8837 | { | |
8838 | UNHANDLED; | |
8839 | } | |
8840 | break; | |
8841 | ||
8842 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8843 | simplified cases of this. */ | |
8844 | case IA64_RS_PRr: | |
8845 | if (note == 0) | |
8846 | { | |
8847 | for (i = 16; i < 63; i++) | |
8848 | { | |
8849 | specs[count] = tmpl; | |
8850 | specs[count++].index = i; | |
8851 | } | |
8852 | } | |
800eeca4 | 8853 | else if (note == 7) |
542d6675 KH |
8854 | { |
8855 | valueT mask = 0; | |
8856 | /* Mark only those registers indicated by the mask. */ | |
8857 | if (rsrc_write | |
8858 | && idesc->operands[0] == IA64_OPND_PR) | |
8859 | { | |
8860 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8861 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8862 | for (i = 16; i < 63; i++) |
8863 | { | |
8864 | specs[count] = tmpl; | |
8865 | specs[count++].index = i; | |
8866 | } | |
542d6675 KH |
8867 | } |
8868 | else if (rsrc_write | |
8869 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8870 | { | |
8871 | for (i = 16; i < 63; i++) | |
8872 | { | |
8873 | specs[count] = tmpl; | |
8874 | specs[count++].index = i; | |
8875 | } | |
8876 | } | |
8877 | else | |
8878 | { | |
8879 | UNHANDLED; | |
8880 | } | |
8881 | } | |
800eeca4 | 8882 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8883 | { |
8884 | if (rsrc_write) | |
8885 | { | |
8886 | for (i = 0; i < idesc->num_outputs; i++) | |
8887 | { | |
8888 | if (idesc->operands[i] == IA64_OPND_P1 | |
8889 | || idesc->operands[i] == IA64_OPND_P2) | |
8890 | { | |
8891 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8892 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8893 | { |
8894 | specs[count] = tmpl; | |
8895 | specs[count++].index = regno; | |
8896 | } | |
8897 | } | |
8898 | } | |
8899 | } | |
8900 | else | |
8901 | { | |
8902 | UNHANDLED; | |
8903 | } | |
8904 | } | |
800eeca4 | 8905 | else if (note == 12) |
542d6675 | 8906 | { |
139368c9 | 8907 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8908 | { |
8909 | specs[count] = tmpl; | |
8910 | specs[count++].index = CURR_SLOT.qp_regno; | |
8911 | } | |
8912 | } | |
800eeca4 | 8913 | else if (note == 1) |
542d6675 KH |
8914 | { |
8915 | if (rsrc_write) | |
8916 | { | |
8917 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8918 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8919 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8920 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8921 | |
542d6675 KH |
8922 | if ((idesc->operands[0] == IA64_OPND_P1 |
8923 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8924 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8925 | { |
8926 | specs[count] = tmpl; | |
4a4f25cf | 8927 | specs[count].cmp_type = |
7484b8e6 | 8928 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8929 | specs[count++].index = p1; |
8930 | } | |
8931 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8932 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8933 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8934 | { |
8935 | specs[count] = tmpl; | |
4a4f25cf | 8936 | specs[count].cmp_type = |
7484b8e6 | 8937 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8938 | specs[count++].index = p2; |
8939 | } | |
8940 | } | |
8941 | else | |
8942 | { | |
139368c9 | 8943 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8944 | { |
8945 | specs[count] = tmpl; | |
8946 | specs[count++].index = CURR_SLOT.qp_regno; | |
8947 | } | |
8948 | if (idesc->operands[1] == IA64_OPND_PR) | |
8949 | { | |
139368c9 | 8950 | for (i = 16; i < 63; i++) |
542d6675 KH |
8951 | { |
8952 | specs[count] = tmpl; | |
8953 | specs[count++].index = i; | |
8954 | } | |
8955 | } | |
8956 | } | |
8957 | } | |
197865e8 | 8958 | else |
542d6675 KH |
8959 | { |
8960 | UNHANDLED; | |
8961 | } | |
800eeca4 JW |
8962 | break; |
8963 | ||
8964 | case IA64_RS_PSR: | |
197865e8 | 8965 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8966 | dep->regindex. */ |
800eeca4 | 8967 | if (note == 0) |
542d6675 KH |
8968 | { |
8969 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8970 | { | |
8971 | if (dep->regindex < 6) | |
8972 | { | |
8973 | specs[count++] = tmpl; | |
8974 | } | |
8975 | } | |
8976 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8977 | { | |
8978 | if (dep->regindex < 32 | |
8979 | || dep->regindex == 35 | |
8980 | || dep->regindex == 36 | |
8981 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8982 | { | |
8983 | specs[count++] = tmpl; | |
8984 | } | |
8985 | } | |
8986 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8987 | { | |
8988 | if (dep->regindex < 32 | |
8989 | || dep->regindex == 35 | |
8990 | || dep->regindex == 36 | |
8991 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8992 | { | |
8993 | specs[count++] = tmpl; | |
8994 | } | |
8995 | } | |
8996 | else | |
8997 | { | |
8998 | /* Several PSR bits have very specific dependencies. */ | |
8999 | switch (dep->regindex) | |
9000 | { | |
9001 | default: | |
9002 | specs[count++] = tmpl; | |
9003 | break; | |
9004 | case PSR_IC: | |
9005 | if (rsrc_write) | |
9006 | { | |
9007 | specs[count++] = tmpl; | |
9008 | } | |
9009 | else | |
9010 | { | |
9011 | /* Only certain CR accesses use PSR.ic */ | |
9012 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9013 | || idesc->operands[1] == IA64_OPND_CR3) | |
9014 | { | |
9015 | int index = | |
9016 | ((idesc->operands[0] == IA64_OPND_CR3) | |
9017 | ? 0 : 1); | |
9018 | int regno = | |
9019 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
9020 | ||
9021 | switch (regno) | |
9022 | { | |
9023 | default: | |
9024 | break; | |
9025 | case CR_ITIR: | |
9026 | case CR_IFS: | |
9027 | case CR_IIM: | |
9028 | case CR_IIP: | |
9029 | case CR_IPSR: | |
9030 | case CR_ISR: | |
9031 | case CR_IFA: | |
9032 | case CR_IHA: | |
9033 | case CR_IIPA: | |
9034 | specs[count++] = tmpl; | |
9035 | break; | |
9036 | } | |
9037 | } | |
9038 | } | |
9039 | break; | |
9040 | case PSR_CPL: | |
9041 | if (rsrc_write) | |
9042 | { | |
9043 | specs[count++] = tmpl; | |
9044 | } | |
9045 | else | |
9046 | { | |
9047 | /* Only some AR accesses use cpl */ | |
9048 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9049 | || idesc->operands[1] == IA64_OPND_AR3) | |
9050 | { | |
9051 | int index = | |
9052 | ((idesc->operands[0] == IA64_OPND_AR3) | |
9053 | ? 0 : 1); | |
9054 | int regno = | |
9055 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
9056 | ||
9057 | if (regno == AR_ITC | |
9058 | || (index == 0 | |
9059 | && (regno == AR_ITC | |
9060 | || regno == AR_RSC | |
9061 | || (regno >= AR_K0 | |
9062 | && regno <= AR_K7)))) | |
9063 | { | |
9064 | specs[count++] = tmpl; | |
9065 | } | |
9066 | } | |
9067 | else | |
9068 | { | |
9069 | specs[count++] = tmpl; | |
9070 | } | |
9071 | break; | |
9072 | } | |
9073 | } | |
9074 | } | |
9075 | } | |
800eeca4 | 9076 | else if (note == 7) |
542d6675 KH |
9077 | { |
9078 | valueT mask = 0; | |
9079 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9080 | { | |
9081 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9082 | } | |
9083 | else | |
9084 | { | |
9085 | UNHANDLED; | |
9086 | } | |
9087 | if (mask & ((valueT) 1 << dep->regindex)) | |
9088 | { | |
9089 | specs[count++] = tmpl; | |
9090 | } | |
9091 | } | |
800eeca4 | 9092 | else if (note == 8) |
542d6675 KH |
9093 | { |
9094 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9095 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9096 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9097 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9098 | { | |
9099 | if (idesc->operands[i] == IA64_OPND_F1 | |
9100 | || idesc->operands[i] == IA64_OPND_F2 | |
9101 | || idesc->operands[i] == IA64_OPND_F3 | |
9102 | || idesc->operands[i] == IA64_OPND_F4) | |
9103 | { | |
9104 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9105 | if (reg >= min && reg <= max) | |
9106 | { | |
9107 | specs[count++] = tmpl; | |
9108 | } | |
9109 | } | |
9110 | } | |
9111 | } | |
800eeca4 | 9112 | else if (note == 9) |
542d6675 KH |
9113 | { |
9114 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9115 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9116 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9117 | FR2-31 */ | |
9118 | for (i = 0; i < idesc->num_outputs; i++) | |
9119 | { | |
9120 | if (idesc->operands[i] == IA64_OPND_F1) | |
9121 | { | |
9122 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9123 | if (reg >= min && reg <= max) | |
9124 | { | |
9125 | specs[count++] = tmpl; | |
9126 | } | |
9127 | } | |
9128 | } | |
9129 | } | |
800eeca4 | 9130 | else if (note == 10) |
542d6675 KH |
9131 | { |
9132 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9133 | { | |
9134 | if (idesc->operands[i] == IA64_OPND_R1 | |
9135 | || idesc->operands[i] == IA64_OPND_R2 | |
9136 | || idesc->operands[i] == IA64_OPND_R3) | |
9137 | { | |
9138 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9139 | if (regno >= 16 && regno <= 31) | |
9140 | { | |
9141 | specs[count++] = tmpl; | |
9142 | } | |
9143 | } | |
9144 | } | |
9145 | } | |
800eeca4 | 9146 | else |
542d6675 KH |
9147 | { |
9148 | UNHANDLED; | |
9149 | } | |
800eeca4 JW |
9150 | break; |
9151 | ||
9152 | case IA64_RS_AR_FPSR: | |
9153 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9154 | { |
9155 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9156 | if (regno == AR_FPSR) | |
9157 | { | |
9158 | specs[count++] = tmpl; | |
9159 | } | |
9160 | } | |
800eeca4 | 9161 | else |
542d6675 KH |
9162 | { |
9163 | specs[count++] = tmpl; | |
9164 | } | |
800eeca4 JW |
9165 | break; |
9166 | ||
197865e8 | 9167 | case IA64_RS_ARX: |
800eeca4 JW |
9168 | /* Handle all AR[REG] resources */ |
9169 | if (note == 0 || note == 1) | |
542d6675 KH |
9170 | { |
9171 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9172 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9173 | && regno == dep->regindex) | |
9174 | { | |
9175 | specs[count++] = tmpl; | |
9176 | } | |
9177 | /* other AR[REG] resources may be affected by AR accesses */ | |
9178 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9179 | { | |
9180 | /* AR[] writes */ | |
9181 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9182 | switch (dep->regindex) | |
9183 | { | |
9184 | default: | |
9185 | break; | |
9186 | case AR_BSP: | |
9187 | case AR_RNAT: | |
9188 | if (regno == AR_BSPSTORE) | |
9189 | { | |
9190 | specs[count++] = tmpl; | |
9191 | } | |
9192 | case AR_RSC: | |
9193 | if (!rsrc_write && | |
9194 | (regno == AR_BSPSTORE | |
9195 | || regno == AR_RNAT)) | |
9196 | { | |
9197 | specs[count++] = tmpl; | |
9198 | } | |
9199 | break; | |
9200 | } | |
9201 | } | |
9202 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9203 | { | |
9204 | /* AR[] reads */ | |
9205 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9206 | switch (dep->regindex) | |
9207 | { | |
9208 | default: | |
9209 | break; | |
9210 | case AR_RSC: | |
9211 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9212 | { | |
9213 | specs[count++] = tmpl; | |
9214 | } | |
9215 | break; | |
9216 | } | |
9217 | } | |
9218 | else | |
9219 | { | |
9220 | specs[count++] = tmpl; | |
9221 | } | |
9222 | } | |
800eeca4 | 9223 | else |
542d6675 KH |
9224 | { |
9225 | UNHANDLED; | |
9226 | } | |
800eeca4 JW |
9227 | break; |
9228 | ||
9229 | case IA64_RS_CRX: | |
9230 | /* Handle all CR[REG] resources */ | |
9231 | if (note == 0 || note == 1) | |
542d6675 KH |
9232 | { |
9233 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9234 | { | |
9235 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9236 | if (regno == dep->regindex) | |
9237 | { | |
9238 | specs[count++] = tmpl; | |
9239 | } | |
9240 | else if (!rsrc_write) | |
9241 | { | |
9242 | /* Reads from CR[IVR] affect other resources. */ | |
9243 | if (regno == CR_IVR) | |
9244 | { | |
9245 | if ((dep->regindex >= CR_IRR0 | |
9246 | && dep->regindex <= CR_IRR3) | |
9247 | || dep->regindex == CR_TPR) | |
9248 | { | |
9249 | specs[count++] = tmpl; | |
9250 | } | |
9251 | } | |
9252 | } | |
9253 | } | |
9254 | else | |
9255 | { | |
9256 | specs[count++] = tmpl; | |
9257 | } | |
9258 | } | |
800eeca4 | 9259 | else |
542d6675 KH |
9260 | { |
9261 | UNHANDLED; | |
9262 | } | |
800eeca4 JW |
9263 | break; |
9264 | ||
9265 | case IA64_RS_INSERVICE: | |
9266 | /* look for write of EOI (67) or read of IVR (65) */ | |
9267 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9268 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9269 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9270 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9271 | { | |
9272 | specs[count++] = tmpl; | |
9273 | } | |
800eeca4 JW |
9274 | break; |
9275 | ||
9276 | case IA64_RS_GR0: | |
9277 | if (note == 1) | |
542d6675 KH |
9278 | { |
9279 | specs[count++] = tmpl; | |
9280 | } | |
800eeca4 | 9281 | else |
542d6675 KH |
9282 | { |
9283 | UNHANDLED; | |
9284 | } | |
800eeca4 JW |
9285 | break; |
9286 | ||
9287 | case IA64_RS_CFM: | |
9288 | if (note != 2) | |
542d6675 KH |
9289 | { |
9290 | specs[count++] = tmpl; | |
9291 | } | |
800eeca4 | 9292 | else |
542d6675 KH |
9293 | { |
9294 | /* Check if any of the registers accessed are in the rotating region. | |
9295 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9296 | region */ | |
9297 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9298 | { | |
9299 | if (idesc->operands[i] == IA64_OPND_R1 | |
9300 | || idesc->operands[i] == IA64_OPND_R2 | |
9301 | || idesc->operands[i] == IA64_OPND_R3) | |
9302 | { | |
9303 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9304 | /* Assumes that md.rot.num_regs is always valid */ | |
9305 | if (md.rot.num_regs > 0 | |
9306 | && num > 31 | |
9307 | && num < 31 + md.rot.num_regs) | |
9308 | { | |
9309 | specs[count] = tmpl; | |
9310 | specs[count++].specific = 0; | |
9311 | } | |
9312 | } | |
9313 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9314 | || idesc->operands[i] == IA64_OPND_F2 | |
9315 | || idesc->operands[i] == IA64_OPND_F3 | |
9316 | || idesc->operands[i] == IA64_OPND_F4) | |
9317 | { | |
9318 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9319 | if (num > 31) | |
9320 | { | |
9321 | specs[count] = tmpl; | |
9322 | specs[count++].specific = 0; | |
9323 | } | |
9324 | } | |
9325 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9326 | || idesc->operands[i] == IA64_OPND_P2) | |
9327 | { | |
9328 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9329 | if (num > 15) | |
9330 | { | |
9331 | specs[count] = tmpl; | |
9332 | specs[count++].specific = 0; | |
9333 | } | |
9334 | } | |
9335 | } | |
9336 | if (CURR_SLOT.qp_regno > 15) | |
9337 | { | |
9338 | specs[count] = tmpl; | |
9339 | specs[count++].specific = 0; | |
9340 | } | |
9341 | } | |
800eeca4 JW |
9342 | break; |
9343 | ||
139368c9 JW |
9344 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9345 | the fact that there is only one register. */ | |
800eeca4 JW |
9346 | case IA64_RS_PR63: |
9347 | if (note == 0) | |
542d6675 KH |
9348 | { |
9349 | specs[count++] = tmpl; | |
9350 | } | |
139368c9 | 9351 | else if (note == 7) |
40449e9f KH |
9352 | { |
9353 | valueT mask = 0; | |
9354 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9355 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9356 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9357 | specs[count++] = tmpl; |
40449e9f | 9358 | } |
800eeca4 | 9359 | else if (note == 11) |
542d6675 KH |
9360 | { |
9361 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9362 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9363 | || (idesc->operands[1] == IA64_OPND_P2 | |
9364 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9365 | { | |
9366 | specs[count++] = tmpl; | |
9367 | } | |
9368 | } | |
800eeca4 | 9369 | else if (note == 12) |
542d6675 KH |
9370 | { |
9371 | if (CURR_SLOT.qp_regno == 63) | |
9372 | { | |
9373 | specs[count++] = tmpl; | |
9374 | } | |
9375 | } | |
800eeca4 | 9376 | else if (note == 1) |
542d6675 KH |
9377 | { |
9378 | if (rsrc_write) | |
9379 | { | |
40449e9f KH |
9380 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9381 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9382 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9383 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9384 | |
4a4f25cf | 9385 | if (p1 == 63 |
7484b8e6 TW |
9386 | && (idesc->operands[0] == IA64_OPND_P1 |
9387 | || idesc->operands[0] == IA64_OPND_P2)) | |
9388 | { | |
40449e9f | 9389 | specs[count] = tmpl; |
4a4f25cf | 9390 | specs[count++].cmp_type = |
7484b8e6 TW |
9391 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9392 | } | |
9393 | if (p2 == 63 | |
9394 | && (idesc->operands[1] == IA64_OPND_P1 | |
9395 | || idesc->operands[1] == IA64_OPND_P2)) | |
9396 | { | |
40449e9f | 9397 | specs[count] = tmpl; |
4a4f25cf | 9398 | specs[count++].cmp_type = |
7484b8e6 TW |
9399 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9400 | } | |
542d6675 KH |
9401 | } |
9402 | else | |
9403 | { | |
9404 | if (CURR_SLOT.qp_regno == 63) | |
9405 | { | |
9406 | specs[count++] = tmpl; | |
9407 | } | |
9408 | } | |
9409 | } | |
800eeca4 | 9410 | else |
542d6675 KH |
9411 | { |
9412 | UNHANDLED; | |
9413 | } | |
800eeca4 JW |
9414 | break; |
9415 | ||
9416 | case IA64_RS_RSE: | |
9417 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9418 | read resources have not yet been completely identified, so for now |
9419 | treat RSE as a single resource */ | |
800eeca4 | 9420 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9421 | { |
9422 | if (rsrc_write) | |
9423 | { | |
9424 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9425 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9426 | { | |
a66d2bb7 | 9427 | specs[count++] = tmpl; |
542d6675 KH |
9428 | } |
9429 | } | |
9430 | else | |
9431 | { | |
9432 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9433 | { | |
9434 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9435 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9436 | { | |
9437 | specs[count++] = tmpl; | |
9438 | } | |
9439 | } | |
9440 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9441 | { | |
9442 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9443 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9444 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9445 | { | |
9446 | specs[count++] = tmpl; | |
9447 | } | |
9448 | } | |
9449 | } | |
9450 | } | |
197865e8 | 9451 | else |
542d6675 KH |
9452 | { |
9453 | specs[count++] = tmpl; | |
9454 | } | |
800eeca4 JW |
9455 | break; |
9456 | ||
9457 | case IA64_RS_ANY: | |
9458 | /* FIXME -- do any of these need to be non-specific? */ | |
9459 | specs[count++] = tmpl; | |
9460 | break; | |
9461 | ||
9462 | default: | |
9463 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9464 | break; | |
9465 | } | |
9466 | ||
9467 | return count; | |
9468 | } | |
9469 | ||
9470 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9471 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9472 | ||
800eeca4 JW |
9473 | static void |
9474 | clear_qp_branch_flag (mask) | |
542d6675 | 9475 | valueT mask; |
800eeca4 JW |
9476 | { |
9477 | int i; | |
542d6675 | 9478 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9479 | { |
197865e8 | 9480 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9481 | if ((bit & mask) != 0) |
542d6675 KH |
9482 | { |
9483 | regdeps[i].link_to_qp_branch = 0; | |
9484 | } | |
800eeca4 JW |
9485 | } |
9486 | } | |
9487 | ||
5e2f6673 L |
9488 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9489 | any mutexes which contain one of the PRs and create new ones when | |
9490 | needed. */ | |
9491 | ||
9492 | static int | |
9493 | update_qp_mutex (valueT mask) | |
9494 | { | |
9495 | int i; | |
9496 | int add = 0; | |
9497 | ||
9498 | i = 0; | |
9499 | while (i < qp_mutexeslen) | |
9500 | { | |
9501 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9502 | { | |
9503 | /* If it destroys and creates the same mutex, do nothing. */ | |
9504 | if (qp_mutexes[i].prmask == mask | |
9505 | && qp_mutexes[i].path == md.path) | |
9506 | { | |
9507 | i++; | |
9508 | add = -1; | |
9509 | } | |
9510 | else | |
9511 | { | |
9512 | int keep = 0; | |
9513 | ||
9514 | if (md.debug_dv) | |
9515 | { | |
9516 | fprintf (stderr, " Clearing mutex relation"); | |
9517 | print_prmask (qp_mutexes[i].prmask); | |
9518 | fprintf (stderr, "\n"); | |
9519 | } | |
9520 | ||
9521 | /* Deal with the old mutex with more than 3+ PRs only if | |
9522 | the new mutex on the same execution path with it. | |
9523 | ||
9524 | FIXME: The 3+ mutex support is incomplete. | |
9525 | dot_pred_rel () may be a better place to fix it. */ | |
9526 | if (qp_mutexes[i].path == md.path) | |
9527 | { | |
9528 | /* If it is a proper subset of the mutex, create a | |
9529 | new mutex. */ | |
9530 | if (add == 0 | |
9531 | && (qp_mutexes[i].prmask & mask) == mask) | |
9532 | add = 1; | |
9533 | ||
9534 | qp_mutexes[i].prmask &= ~mask; | |
9535 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9536 | { | |
9537 | /* Modify the mutex if there are more than one | |
9538 | PR left. */ | |
9539 | keep = 1; | |
9540 | i++; | |
9541 | } | |
9542 | } | |
9543 | ||
9544 | if (keep == 0) | |
9545 | /* Remove the mutex. */ | |
9546 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9547 | } | |
9548 | } | |
9549 | else | |
9550 | ++i; | |
9551 | } | |
9552 | ||
9553 | if (add == 1) | |
9554 | add_qp_mutex (mask); | |
9555 | ||
9556 | return add; | |
9557 | } | |
9558 | ||
197865e8 | 9559 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9560 | |
542d6675 KH |
9561 | Any changes to a PR clears the mutex relations which include that PR. */ |
9562 | ||
800eeca4 JW |
9563 | static void |
9564 | clear_qp_mutex (mask) | |
542d6675 | 9565 | valueT mask; |
800eeca4 JW |
9566 | { |
9567 | int i; | |
9568 | ||
9569 | i = 0; | |
9570 | while (i < qp_mutexeslen) | |
9571 | { | |
9572 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9573 | { |
9574 | if (md.debug_dv) | |
9575 | { | |
9576 | fprintf (stderr, " Clearing mutex relation"); | |
9577 | print_prmask (qp_mutexes[i].prmask); | |
9578 | fprintf (stderr, "\n"); | |
9579 | } | |
9580 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9581 | } | |
800eeca4 | 9582 | else |
542d6675 | 9583 | ++i; |
800eeca4 JW |
9584 | } |
9585 | } | |
9586 | ||
9587 | /* Clear implies relations which contain PRs in the given masks. | |
9588 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9589 | indicates the implied PR. */ |
9590 | ||
800eeca4 JW |
9591 | static void |
9592 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9593 | valueT p1_mask; |
9594 | valueT p2_mask; | |
800eeca4 JW |
9595 | { |
9596 | int i; | |
9597 | ||
9598 | i = 0; | |
9599 | while (i < qp_implieslen) | |
9600 | { | |
197865e8 | 9601 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9602 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9603 | { | |
9604 | if (md.debug_dv) | |
9605 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9606 | qp_implies[i].p1, qp_implies[i].p2); | |
9607 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9608 | } | |
197865e8 | 9609 | else |
542d6675 | 9610 | ++i; |
800eeca4 JW |
9611 | } |
9612 | } | |
9613 | ||
542d6675 KH |
9614 | /* Add the PRs specified to the list of implied relations. */ |
9615 | ||
800eeca4 JW |
9616 | static void |
9617 | add_qp_imply (p1, p2) | |
542d6675 | 9618 | int p1, p2; |
800eeca4 JW |
9619 | { |
9620 | valueT mask; | |
9621 | valueT bit; | |
9622 | int i; | |
9623 | ||
542d6675 | 9624 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9625 | if (p1 == 0 || p2 == 0) |
9626 | abort (); | |
9627 | ||
9628 | if (p1 == p2) | |
9629 | return; | |
9630 | ||
542d6675 KH |
9631 | /* If it exists already, ignore it. */ |
9632 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9633 | { |
197865e8 | 9634 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9635 | && qp_implies[i].p2 == p2 |
9636 | && qp_implies[i].path == md.path | |
9637 | && !qp_implies[i].p2_branched) | |
9638 | return; | |
800eeca4 JW |
9639 | } |
9640 | ||
9641 | if (qp_implieslen == qp_impliestotlen) | |
9642 | { | |
9643 | qp_impliestotlen += 20; | |
9644 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9645 | xrealloc ((void *) qp_implies, |
9646 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9647 | } |
9648 | if (md.debug_dv) | |
9649 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9650 | qp_implies[qp_implieslen].p1 = p1; | |
9651 | qp_implies[qp_implieslen].p2 = p2; | |
9652 | qp_implies[qp_implieslen].path = md.path; | |
9653 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9654 | ||
9655 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9656 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9657 | as well. */ |
542d6675 | 9658 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9659 | { |
9660 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9661 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9662 | if (qp_implies[i].p2 == p1) |
542d6675 | 9663 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9664 | } |
9665 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9666 | relation containing p2, duplicate it and replace p2 with p1. */ |
9667 | bit = (valueT) 1 << p1; | |
9668 | mask = (valueT) 1 << p2; | |
542d6675 | 9669 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9670 | { |
9671 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9672 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9673 | } |
9674 | } | |
9675 | ||
800eeca4 JW |
9676 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9677 | one of the PRs can be true at any time. PR0 should never be included in | |
9678 | the mask. */ | |
542d6675 | 9679 | |
800eeca4 JW |
9680 | static void |
9681 | add_qp_mutex (mask) | |
542d6675 | 9682 | valueT mask; |
800eeca4 JW |
9683 | { |
9684 | if (mask & 0x1) | |
9685 | abort (); | |
9686 | ||
9687 | if (qp_mutexeslen == qp_mutexestotlen) | |
9688 | { | |
9689 | qp_mutexestotlen += 20; | |
9690 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9691 | xrealloc ((void *) qp_mutexes, |
9692 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9693 | } |
9694 | if (md.debug_dv) | |
9695 | { | |
9696 | fprintf (stderr, " Registering mutex on"); | |
9697 | print_prmask (mask); | |
9698 | fprintf (stderr, "\n"); | |
9699 | } | |
9700 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9701 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9702 | } | |
9703 | ||
cb5301b6 RH |
9704 | static int |
9705 | has_suffix_p (name, suffix) | |
40449e9f KH |
9706 | const char *name; |
9707 | const char *suffix; | |
cb5301b6 RH |
9708 | { |
9709 | size_t namelen = strlen (name); | |
9710 | size_t sufflen = strlen (suffix); | |
9711 | ||
9712 | if (namelen <= sufflen) | |
9713 | return 0; | |
9714 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9715 | } | |
9716 | ||
800eeca4 JW |
9717 | static void |
9718 | clear_register_values () | |
9719 | { | |
9720 | int i; | |
9721 | if (md.debug_dv) | |
9722 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9723 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9724 | gr_values[i].known = 0; |
9725 | } | |
9726 | ||
9727 | /* Keep track of register values/changes which affect DV tracking. | |
9728 | ||
9729 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9730 | have to examine a group of strings to identify them. */ |
800eeca4 | 9731 | |
800eeca4 JW |
9732 | static void |
9733 | note_register_values (idesc) | |
542d6675 | 9734 | struct ia64_opcode *idesc; |
800eeca4 JW |
9735 | { |
9736 | valueT qp_changemask = 0; | |
9737 | int i; | |
9738 | ||
542d6675 KH |
9739 | /* Invalidate values for registers being written to. */ |
9740 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9741 | { |
197865e8 | 9742 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9743 | || idesc->operands[i] == IA64_OPND_R2 |
9744 | || idesc->operands[i] == IA64_OPND_R3) | |
9745 | { | |
9746 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9747 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9748 | gr_values[regno].known = 0; | |
9749 | } | |
50b81f19 JW |
9750 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9751 | { | |
9752 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9753 | if (regno > 0 && regno < 4) | |
9754 | gr_values[regno].known = 0; | |
9755 | } | |
197865e8 | 9756 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9757 | || idesc->operands[i] == IA64_OPND_P2) |
9758 | { | |
9759 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9760 | qp_changemask |= (valueT) 1 << regno; | |
9761 | } | |
800eeca4 | 9762 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9763 | { |
9764 | if (idesc->operands[2] & (valueT) 0x10000) | |
9765 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9766 | else | |
9767 | qp_changemask = idesc->operands[2]; | |
9768 | break; | |
9769 | } | |
800eeca4 | 9770 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9771 | { |
9772 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9773 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9774 | else |
9775 | qp_changemask = idesc->operands[1]; | |
9776 | qp_changemask &= ~(valueT) 0xFFFF; | |
9777 | break; | |
9778 | } | |
9779 | } | |
9780 | ||
9781 | /* Always clear qp branch flags on any PR change. */ | |
9782 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9783 | clear_qp_branch_flag (qp_changemask); |
9784 | ||
542d6675 | 9785 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9786 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9787 | { | |
197865e8 | 9788 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9789 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9790 | { |
9791 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9792 | gr_values[i].known = 0; | |
9793 | } | |
800eeca4 JW |
9794 | clear_qp_mutex (qp_changemask); |
9795 | clear_qp_implies (qp_changemask, qp_changemask); | |
9796 | } | |
542d6675 KH |
9797 | /* After a call, all register values are undefined, except those marked |
9798 | as "safe". */ | |
800eeca4 | 9799 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9800 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9801 | { |
56d27c17 | 9802 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9803 | clear_register_values (); |
9804 | clear_qp_mutex (~qp_safe_across_calls); | |
9805 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9806 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9807 | } | |
e9718fe1 | 9808 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9809 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9810 | { |
9811 | clear_register_values (); | |
197865e8 KH |
9812 | clear_qp_mutex (~(valueT) 0); |
9813 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9814 | } |
542d6675 | 9815 | /* Look for mutex and implies relations. */ |
197865e8 | 9816 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9817 | || idesc->operands[0] == IA64_OPND_P2) |
9818 | && (idesc->operands[1] == IA64_OPND_P1 | |
9819 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9820 | { |
9821 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9822 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9823 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9824 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9825 | |
5e2f6673 L |
9826 | /* If both PRs are PR0, we can't really do anything. */ |
9827 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9828 | { |
9829 | if (md.debug_dv) | |
9830 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9831 | } | |
800eeca4 | 9832 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9833 | with the following exceptions. */ |
cb5301b6 RH |
9834 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9835 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9836 | { |
542d6675 KH |
9837 | clear_qp_implies (p2mask, p1mask); |
9838 | } | |
cb5301b6 RH |
9839 | else if (has_suffix_p (idesc->name, ".andcm") |
9840 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9841 | { |
9842 | clear_qp_implies (0, p1mask | p2mask); | |
9843 | } | |
cb5301b6 RH |
9844 | else if (has_suffix_p (idesc->name, ".orcm") |
9845 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9846 | { |
9847 | clear_qp_mutex (p1mask | p2mask); | |
9848 | clear_qp_implies (p1mask | p2mask, 0); | |
9849 | } | |
800eeca4 | 9850 | else |
542d6675 | 9851 | { |
5e2f6673 L |
9852 | int added = 0; |
9853 | ||
542d6675 | 9854 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9855 | |
9856 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9857 | if (p1 == 0 || p2 == 0) | |
9858 | clear_qp_mutex (p1mask | p2mask); | |
9859 | else | |
9860 | added = update_qp_mutex (p1mask | p2mask); | |
9861 | ||
9862 | if (CURR_SLOT.qp_regno == 0 | |
9863 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9864 | { |
5e2f6673 L |
9865 | if (added == 0 && p1 && p2) |
9866 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9867 | if (CURR_SLOT.qp_regno != 0) |
9868 | { | |
5e2f6673 L |
9869 | if (p1) |
9870 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9871 | if (p2) | |
9872 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9873 | } |
9874 | } | |
542d6675 KH |
9875 | } |
9876 | } | |
9877 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9878 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9879 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9880 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 9881 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
9882 | && (strcmp (idesc->name, "mov") == 0 |
9883 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9884 | { |
9885 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9886 | if (regno > 0 && regno < NELEMS (gr_values)) |
9887 | { | |
9888 | gr_values[regno].known = 1; | |
9889 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9890 | gr_values[regno].path = md.path; | |
9891 | if (md.debug_dv) | |
2434f565 JW |
9892 | { |
9893 | fprintf (stderr, " Know gr%d = ", regno); | |
9894 | fprintf_vma (stderr, gr_values[regno].value); | |
9895 | fputs ("\n", stderr); | |
9896 | } | |
542d6675 | 9897 | } |
800eeca4 | 9898 | } |
a66d2bb7 JB |
9899 | /* Look for dep.z imm insns. */ |
9900 | else if (idesc->operands[0] == IA64_OPND_R1 | |
9901 | && idesc->operands[1] == IA64_OPND_IMM8 | |
9902 | && strcmp (idesc->name, "dep.z") == 0) | |
9903 | { | |
9904 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
9905 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9906 | { | |
9907 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
9908 | ||
9909 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
9910 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
9911 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
9912 | gr_values[regno].known = 1; | |
9913 | gr_values[regno].value = value; | |
9914 | gr_values[regno].path = md.path; | |
9915 | if (md.debug_dv) | |
9916 | { | |
9917 | fprintf (stderr, " Know gr%d = ", regno); | |
9918 | fprintf_vma (stderr, gr_values[regno].value); | |
9919 | fputs ("\n", stderr); | |
9920 | } | |
9921 | } | |
9922 | } | |
197865e8 | 9923 | else |
800eeca4 JW |
9924 | { |
9925 | clear_qp_mutex (qp_changemask); | |
9926 | clear_qp_implies (qp_changemask, qp_changemask); | |
9927 | } | |
9928 | } | |
9929 | ||
542d6675 KH |
9930 | /* Return whether the given predicate registers are currently mutex. */ |
9931 | ||
800eeca4 JW |
9932 | static int |
9933 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9934 | int p1; |
9935 | int p2; | |
9936 | int path; | |
800eeca4 JW |
9937 | { |
9938 | int i; | |
9939 | valueT mask; | |
9940 | ||
9941 | if (p1 != p2) | |
9942 | { | |
542d6675 KH |
9943 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9944 | for (i = 0; i < qp_mutexeslen; i++) | |
9945 | { | |
9946 | if (qp_mutexes[i].path >= path | |
9947 | && (qp_mutexes[i].prmask & mask) == mask) | |
9948 | return 1; | |
9949 | } | |
800eeca4 JW |
9950 | } |
9951 | return 0; | |
9952 | } | |
9953 | ||
9954 | /* Return whether the given resource is in the given insn's list of chks | |
9955 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9956 | conflict. */ |
9957 | ||
800eeca4 JW |
9958 | static int |
9959 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9960 | struct rsrc *rs; |
9961 | struct ia64_opcode *idesc; | |
9962 | int note; | |
9963 | int qp_regno; | |
9964 | int path; | |
800eeca4 JW |
9965 | { |
9966 | struct rsrc specs[MAX_SPECS]; | |
9967 | int count; | |
9968 | ||
9969 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9970 | we don't need to check. One exception is note 11, which indicates that | |
9971 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9972 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9973 | && note != 11) |
9974 | return 0; | |
9975 | ||
9976 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9977 | while (count-- > 0) | |
9978 | { | |
9979 | /* UNAT checking is a bit more specific than other resources */ | |
9980 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9981 | && specs[count].mem_offset.hint |
9982 | && rs->mem_offset.hint) | |
9983 | { | |
9984 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9985 | { | |
9986 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9987 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9988 | return 1; | |
9989 | else | |
9990 | continue; | |
9991 | } | |
9992 | } | |
800eeca4 | 9993 | |
7484b8e6 | 9994 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9995 | writes are an OR. */ |
7484b8e6 | 9996 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9997 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9998 | || rs->dependency->specifier == IA64_RS_PR63) |
9999 | { | |
10000 | if (specs[count].cmp_type != CMP_NONE | |
10001 | && specs[count].cmp_type == rs->cmp_type) | |
10002 | { | |
10003 | if (md.debug_dv) | |
10004 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10005 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10006 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10007 | specs[count].index : 63); |
10008 | continue; | |
10009 | } | |
10010 | if (md.debug_dv) | |
4a4f25cf | 10011 | fprintf (stderr, |
7484b8e6 TW |
10012 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10013 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10014 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10015 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10016 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10017 | specs[count].index : 63); |
4a4f25cf | 10018 | |
7484b8e6 TW |
10019 | } |
10020 | ||
800eeca4 | 10021 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10022 | */ |
800eeca4 | 10023 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10024 | return 2; |
800eeca4 | 10025 | else if (specs[count].index == rs->index) |
542d6675 | 10026 | return 1; |
800eeca4 | 10027 | } |
800eeca4 JW |
10028 | |
10029 | return 0; | |
10030 | } | |
10031 | ||
10032 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10033 | insert a stop to create the break. Update all resource dependencies | |
10034 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10035 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10036 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10037 | instruction. */ |
800eeca4 JW |
10038 | |
10039 | static void | |
10040 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
10041 | int insert_stop; |
10042 | int qp_regno; | |
10043 | int save_current; | |
800eeca4 JW |
10044 | { |
10045 | int i; | |
10046 | ||
10047 | if (insert_stop && md.num_slots_in_use > 0) | |
10048 | PREV_SLOT.end_of_insn_group = 1; | |
10049 | ||
10050 | if (md.debug_dv) | |
10051 | { | |
197865e8 | 10052 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10053 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10054 | if (qp_regno != 0) |
542d6675 | 10055 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10056 | fprintf (stderr, "\n"); |
10057 | } | |
10058 | ||
10059 | i = 0; | |
10060 | while (i < regdepslen) | |
10061 | { | |
10062 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10063 | ||
10064 | if (qp_regno != 0 | |
542d6675 KH |
10065 | && regdeps[i].qp_regno != qp_regno) |
10066 | { | |
10067 | ++i; | |
10068 | continue; | |
10069 | } | |
800eeca4 JW |
10070 | |
10071 | if (save_current | |
542d6675 KH |
10072 | && CURR_SLOT.src_file == regdeps[i].file |
10073 | && CURR_SLOT.src_line == regdeps[i].line) | |
10074 | { | |
10075 | ++i; | |
10076 | continue; | |
10077 | } | |
800eeca4 JW |
10078 | |
10079 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10080 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10081 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10082 | || dep->semantics == IA64_DVS_IMPLIEDF |
10083 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10084 | { | |
10085 | print_dependency ("Removing", i); | |
10086 | regdeps[i] = regdeps[--regdepslen]; | |
10087 | } | |
800eeca4 | 10088 | else |
542d6675 KH |
10089 | { |
10090 | if (dep->semantics == IA64_DVS_DATA | |
10091 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10092 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10093 | { |
10094 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10095 | regdeps[i].insn_srlz = STATE_STOP; | |
10096 | if (regdeps[i].data_srlz == STATE_NONE) | |
10097 | regdeps[i].data_srlz = STATE_STOP; | |
10098 | } | |
10099 | ++i; | |
10100 | } | |
800eeca4 JW |
10101 | } |
10102 | } | |
10103 | ||
542d6675 KH |
10104 | /* Add the given resource usage spec to the list of active dependencies. */ |
10105 | ||
197865e8 | 10106 | static void |
800eeca4 | 10107 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
10108 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
10109 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
10110 | struct rsrc *spec; |
10111 | int depind; | |
10112 | int path; | |
800eeca4 JW |
10113 | { |
10114 | if (regdepslen == regdepstotlen) | |
10115 | { | |
10116 | regdepstotlen += 20; | |
10117 | regdeps = (struct rsrc *) | |
542d6675 | 10118 | xrealloc ((void *) regdeps, |
bc805888 | 10119 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10120 | } |
10121 | ||
10122 | regdeps[regdepslen] = *spec; | |
10123 | regdeps[regdepslen].depind = depind; | |
10124 | regdeps[regdepslen].path = path; | |
10125 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10126 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10127 | ||
10128 | print_dependency ("Adding", regdepslen); | |
10129 | ||
10130 | ++regdepslen; | |
10131 | } | |
10132 | ||
10133 | static void | |
10134 | print_dependency (action, depind) | |
542d6675 KH |
10135 | const char *action; |
10136 | int depind; | |
800eeca4 JW |
10137 | { |
10138 | if (md.debug_dv) | |
10139 | { | |
197865e8 | 10140 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10141 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10142 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10143 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10144 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10145 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10146 | { |
10147 | fputs (" ", stderr); | |
10148 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10149 | fputs ("+", stderr); | |
10150 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10151 | } | |
800eeca4 JW |
10152 | fprintf (stderr, "\n"); |
10153 | } | |
10154 | } | |
10155 | ||
10156 | static void | |
10157 | instruction_serialization () | |
10158 | { | |
10159 | int i; | |
10160 | if (md.debug_dv) | |
10161 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10162 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10163 | if (regdeps[i].insn_srlz == STATE_STOP) |
10164 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10165 | } | |
10166 | ||
10167 | static void | |
10168 | data_serialization () | |
10169 | { | |
10170 | int i = 0; | |
10171 | if (md.debug_dv) | |
10172 | fprintf (stderr, " Data serialization\n"); | |
10173 | while (i < regdepslen) | |
10174 | { | |
10175 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10176 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10177 | data serialization. This might change with new tables */ | |
10178 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10179 | { | |
10180 | print_dependency ("Removing", i); | |
10181 | regdeps[i] = regdeps[--regdepslen]; | |
10182 | } | |
800eeca4 | 10183 | else |
542d6675 | 10184 | ++i; |
800eeca4 JW |
10185 | } |
10186 | } | |
10187 | ||
542d6675 KH |
10188 | /* Insert stops and serializations as needed to avoid DVs. */ |
10189 | ||
800eeca4 JW |
10190 | static void |
10191 | remove_marked_resource (rs) | |
542d6675 | 10192 | struct rsrc *rs; |
800eeca4 JW |
10193 | { |
10194 | switch (rs->dependency->semantics) | |
10195 | { | |
10196 | case IA64_DVS_SPECIFIC: | |
10197 | if (md.debug_dv) | |
10198 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10199 | /* ...fall through... */ |
800eeca4 JW |
10200 | case IA64_DVS_INSTR: |
10201 | if (md.debug_dv) | |
542d6675 | 10202 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10203 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10204 | insn_group_break (1, 0, 0); |
800eeca4 | 10205 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10206 | { |
888a75be | 10207 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10208 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10209 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10210 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10211 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10212 | instruction_serialization (); | |
10213 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10214 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10215 | emit_one_bundle (); | |
888a75be | 10216 | CURR_SLOT = oldslot; |
542d6675 | 10217 | } |
800eeca4 JW |
10218 | insn_group_break (1, 0, 0); |
10219 | break; | |
10220 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10221 | "other" types of DV are eliminated |
10222 | by a data serialization */ | |
800eeca4 JW |
10223 | case IA64_DVS_DATA: |
10224 | if (md.debug_dv) | |
542d6675 | 10225 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10226 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10227 | insn_group_break (1, 0, 0); |
800eeca4 | 10228 | { |
888a75be | 10229 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10230 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10231 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10232 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10233 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10234 | data_serialization (); | |
10235 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10236 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10237 | emit_one_bundle (); | |
888a75be | 10238 | CURR_SLOT = oldslot; |
800eeca4 JW |
10239 | } |
10240 | break; | |
10241 | case IA64_DVS_IMPLIED: | |
10242 | case IA64_DVS_IMPLIEDF: | |
10243 | if (md.debug_dv) | |
542d6675 | 10244 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10245 | insn_group_break (1, 0, 0); |
10246 | break; | |
10247 | default: | |
10248 | break; | |
10249 | } | |
10250 | } | |
10251 | ||
10252 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10253 | list. |
800eeca4 JW |
10254 | |
10255 | The check is run once for each execution path encountered. In this case, | |
10256 | a unique execution path is the sequence of instructions following a code | |
10257 | entry point, e.g. the following has three execution paths, one starting | |
10258 | at L0, one at L1, and one at L2. | |
197865e8 | 10259 | |
800eeca4 JW |
10260 | L0: nop |
10261 | L1: add | |
10262 | L2: add | |
197865e8 | 10263 | br.ret |
800eeca4 | 10264 | */ |
542d6675 | 10265 | |
800eeca4 JW |
10266 | static void |
10267 | check_dependencies (idesc) | |
542d6675 | 10268 | struct ia64_opcode *idesc; |
800eeca4 JW |
10269 | { |
10270 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10271 | int path; | |
10272 | int i; | |
10273 | ||
10274 | /* Note that the number of marked resources may change within the | |
197865e8 | 10275 | loop if in auto mode. */ |
800eeca4 JW |
10276 | i = 0; |
10277 | while (i < regdepslen) | |
10278 | { | |
10279 | struct rsrc *rs = ®deps[i]; | |
10280 | const struct ia64_dependency *dep = rs->dependency; | |
10281 | int chkind; | |
10282 | int note; | |
10283 | int start_over = 0; | |
10284 | ||
10285 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10286 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10287 | { | |
10288 | ++i; | |
10289 | continue; | |
10290 | } | |
10291 | ||
10292 | note = NOTE (opdeps->chks[chkind]); | |
10293 | ||
10294 | /* Check this resource against each execution path seen thus far. */ | |
10295 | for (path = 0; path <= md.path; path++) | |
10296 | { | |
10297 | int matchtype; | |
10298 | ||
10299 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10300 | if (rs->path < path) | |
10301 | continue; | |
10302 | ||
10303 | /* If the QP for this insn implies a QP which has branched, don't | |
10304 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10305 | useful; what's the point of generating code which will only be | |
10306 | reached if its QP is zero? | |
10307 | This code was specifically inserted to handle the following code, | |
10308 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10309 | ||
10310 | mov r4 = 2 | |
10311 | (p2) br.cond L | |
10312 | (p1) mov r4 = 7 | |
10313 | */ | |
10314 | if (CURR_SLOT.qp_regno != 0) | |
10315 | { | |
10316 | int skip = 0; | |
10317 | int implies; | |
10318 | for (implies = 0; implies < qp_implieslen; implies++) | |
10319 | { | |
10320 | if (qp_implies[implies].path >= path | |
10321 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10322 | && qp_implies[implies].p2_branched) | |
10323 | { | |
10324 | skip = 1; | |
10325 | break; | |
10326 | } | |
10327 | } | |
10328 | if (skip) | |
10329 | continue; | |
10330 | } | |
10331 | ||
10332 | if ((matchtype = resources_match (rs, idesc, note, | |
10333 | CURR_SLOT.qp_regno, path)) != 0) | |
10334 | { | |
10335 | char msg[1024]; | |
10336 | char pathmsg[256] = ""; | |
10337 | char indexmsg[256] = ""; | |
10338 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10339 | ||
10340 | if (path != 0) | |
10341 | sprintf (pathmsg, " when entry is at label '%s'", | |
10342 | md.entry_labels[path - 1]); | |
a66d2bb7 | 10343 | if (matchtype == 1 && rs->index >= 0) |
542d6675 KH |
10344 | sprintf (indexmsg, ", specific resource number is %d", |
10345 | rs->index); | |
10346 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
10347 | idesc->name, | |
10348 | (certain ? "violates" : "may violate"), | |
10349 | dv_mode[dep->mode], dep->name, | |
10350 | dv_sem[dep->semantics], | |
10351 | pathmsg, indexmsg); | |
10352 | ||
10353 | if (md.explicit_mode) | |
10354 | { | |
10355 | as_warn ("%s", msg); | |
10356 | if (path < md.path) | |
10357 | as_warn (_("Only the first path encountering the conflict " | |
10358 | "is reported")); | |
10359 | as_warn_where (rs->file, rs->line, | |
10360 | _("This is the location of the " | |
10361 | "conflicting usage")); | |
10362 | /* Don't bother checking other paths, to avoid duplicating | |
10363 | the same warning */ | |
10364 | break; | |
10365 | } | |
10366 | else | |
10367 | { | |
10368 | if (md.debug_dv) | |
10369 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10370 | ||
10371 | remove_marked_resource (rs); | |
10372 | ||
10373 | /* since the set of dependencies has changed, start over */ | |
10374 | /* FIXME -- since we're removing dvs as we go, we | |
10375 | probably don't really need to start over... */ | |
10376 | start_over = 1; | |
10377 | break; | |
10378 | } | |
10379 | } | |
10380 | } | |
800eeca4 | 10381 | if (start_over) |
542d6675 | 10382 | i = 0; |
800eeca4 | 10383 | else |
542d6675 | 10384 | ++i; |
800eeca4 JW |
10385 | } |
10386 | } | |
10387 | ||
542d6675 KH |
10388 | /* Register new dependencies based on the given opcode. */ |
10389 | ||
800eeca4 JW |
10390 | static void |
10391 | mark_resources (idesc) | |
542d6675 | 10392 | struct ia64_opcode *idesc; |
800eeca4 JW |
10393 | { |
10394 | int i; | |
10395 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10396 | int add_only_qp_reads = 0; | |
10397 | ||
10398 | /* A conditional branch only uses its resources if it is taken; if it is | |
10399 | taken, we stop following that path. The other branch types effectively | |
10400 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10401 | reads. */ |
800eeca4 JW |
10402 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10403 | { | |
10404 | add_only_qp_reads = 1; | |
10405 | } | |
10406 | ||
10407 | if (md.debug_dv) | |
10408 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10409 | ||
542d6675 | 10410 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10411 | { |
10412 | const struct ia64_dependency *dep; | |
10413 | struct rsrc specs[MAX_SPECS]; | |
10414 | int note; | |
10415 | int path; | |
10416 | int count; | |
197865e8 | 10417 | |
800eeca4 | 10418 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10419 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10420 | |
10421 | if (add_only_qp_reads | |
542d6675 KH |
10422 | && !(dep->mode == IA64_DV_WAR |
10423 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10424 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10425 | || dep->specifier == IA64_RS_PR63))) |
10426 | continue; | |
800eeca4 JW |
10427 | |
10428 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10429 | ||
800eeca4 | 10430 | while (count-- > 0) |
542d6675 KH |
10431 | { |
10432 | mark_resource (idesc, dep, &specs[count], | |
10433 | DEP (opdeps->regs[i]), md.path); | |
10434 | } | |
800eeca4 JW |
10435 | |
10436 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10437 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10438 | switch (dep->specifier) |
542d6675 KH |
10439 | { |
10440 | default: | |
10441 | break; | |
10442 | case IA64_RS_CPUID: | |
10443 | case IA64_RS_DBR: | |
10444 | case IA64_RS_IBR: | |
800eeca4 | 10445 | case IA64_RS_MSR: |
542d6675 KH |
10446 | case IA64_RS_PKR: |
10447 | case IA64_RS_PMC: | |
10448 | case IA64_RS_PMD: | |
10449 | case IA64_RS_RR: | |
10450 | for (path = 0; path < md.path; path++) | |
10451 | { | |
10452 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10453 | while (count-- > 0) | |
10454 | mark_resource (idesc, dep, &specs[count], | |
10455 | DEP (opdeps->regs[i]), path); | |
10456 | } | |
10457 | break; | |
10458 | } | |
10459 | } | |
10460 | } | |
10461 | ||
10462 | /* Remove dependencies when they no longer apply. */ | |
10463 | ||
800eeca4 JW |
10464 | static void |
10465 | update_dependencies (idesc) | |
542d6675 | 10466 | struct ia64_opcode *idesc; |
800eeca4 JW |
10467 | { |
10468 | int i; | |
10469 | ||
10470 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10471 | { | |
10472 | instruction_serialization (); | |
10473 | } | |
10474 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10475 | { | |
10476 | data_serialization (); | |
10477 | } | |
10478 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10479 | || is_taken_branch (idesc)) |
800eeca4 | 10480 | { |
542d6675 KH |
10481 | /* Although technically the taken branch doesn't clear dependencies |
10482 | which require a srlz.[id], we don't follow the branch; the next | |
10483 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10484 | regdepslen = 0; |
800eeca4 JW |
10485 | md.path = 0; |
10486 | } | |
10487 | else if (is_conditional_branch (idesc) | |
542d6675 | 10488 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10489 | { |
10490 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10491 | ||
542d6675 KH |
10492 | for (i = 0; i < qp_implieslen; i++) |
10493 | { | |
10494 | /* If the conditional branch's predicate is implied by the predicate | |
10495 | in an existing dependency, remove that dependency. */ | |
10496 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10497 | { | |
10498 | int depind = 0; | |
10499 | /* Note that this implied predicate takes a branch so that if | |
10500 | a later insn generates a DV but its predicate implies this | |
10501 | one, we can avoid the false DV warning. */ | |
10502 | qp_implies[i].p2_branched = 1; | |
10503 | while (depind < regdepslen) | |
10504 | { | |
10505 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10506 | { | |
10507 | print_dependency ("Removing", depind); | |
10508 | regdeps[depind] = regdeps[--regdepslen]; | |
10509 | } | |
10510 | else | |
10511 | ++depind; | |
10512 | } | |
10513 | } | |
10514 | } | |
800eeca4 | 10515 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10516 | cleared, provided that the QP hasn't been modified between the |
10517 | marking instruction and the branch. */ | |
800eeca4 | 10518 | if (is_call) |
542d6675 KH |
10519 | { |
10520 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10521 | } | |
800eeca4 | 10522 | else |
542d6675 KH |
10523 | { |
10524 | i = 0; | |
10525 | while (i < regdepslen) | |
10526 | { | |
10527 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10528 | && regdeps[i].link_to_qp_branch | |
10529 | && (regdeps[i].file != CURR_SLOT.src_file | |
10530 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10531 | { | |
10532 | /* Treat like a taken branch */ | |
10533 | print_dependency ("Removing", i); | |
10534 | regdeps[i] = regdeps[--regdepslen]; | |
10535 | } | |
10536 | else | |
10537 | ++i; | |
10538 | } | |
10539 | } | |
800eeca4 JW |
10540 | } |
10541 | } | |
10542 | ||
10543 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10544 | |
800eeca4 JW |
10545 | static int |
10546 | check_dv (idesc) | |
542d6675 | 10547 | struct ia64_opcode *idesc; |
800eeca4 JW |
10548 | { |
10549 | if (md.debug_dv) | |
10550 | { | |
197865e8 | 10551 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10552 | idesc->name, CURR_SLOT.src_line, |
10553 | idesc->dependencies->nchks, | |
10554 | idesc->dependencies->nregs); | |
800eeca4 JW |
10555 | } |
10556 | ||
197865e8 | 10557 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10558 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10559 | check against the specific resources used. */ |
800eeca4 JW |
10560 | check_dependencies (idesc); |
10561 | ||
542d6675 KH |
10562 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10563 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10564 | mark_resources (idesc); |
10565 | ||
10566 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10567 | requirements for being cleared |
10568 | ||
800eeca4 JW |
10569 | Instruction serialization (insns separated by interruption, rfi, or |
10570 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10571 | ||
10572 | Data serialization (instruction serialization, or writer + srlz.d + | |
10573 | reader, where writer and srlz.d are in separate groups) clears | |
10574 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10575 | always be the case). | |
10576 | ||
10577 | Instruction group break (groups separated by stop, taken branch, | |
10578 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10579 | */ | |
10580 | update_dependencies (idesc); | |
10581 | ||
10582 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10583 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10584 | note_register_values (idesc); |
10585 | ||
197865e8 | 10586 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10587 | md.mem_offset.hint = 0; |
10588 | ||
10589 | return 0; | |
10590 | } | |
10591 | ||
10592 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10593 | here. */ | |
10594 | void | |
10595 | md_assemble (str) | |
10596 | char *str; | |
10597 | { | |
10598 | char *saved_input_line_pointer, *mnemonic; | |
10599 | const struct pseudo_opcode *pdesc; | |
10600 | struct ia64_opcode *idesc; | |
10601 | unsigned char qp_regno; | |
10602 | unsigned int flags; | |
10603 | int ch; | |
10604 | ||
10605 | saved_input_line_pointer = input_line_pointer; | |
10606 | input_line_pointer = str; | |
10607 | ||
542d6675 | 10608 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10609 | |
10610 | mnemonic = input_line_pointer; | |
10611 | ch = get_symbol_end (); | |
10612 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10613 | if (pdesc) | |
10614 | { | |
10615 | *input_line_pointer = ch; | |
10616 | (*pdesc->handler) (pdesc->arg); | |
10617 | goto done; | |
10618 | } | |
10619 | ||
542d6675 | 10620 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10621 | |
10622 | idesc = ia64_find_opcode (mnemonic); | |
10623 | *input_line_pointer = ch; | |
10624 | if (!idesc) | |
10625 | { | |
10626 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10627 | goto done; | |
10628 | } | |
10629 | ||
10630 | idesc = parse_operands (idesc); | |
10631 | if (!idesc) | |
10632 | goto done; | |
10633 | ||
542d6675 | 10634 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10635 | if (idesc->type == IA64_TYPE_DYN) |
10636 | { | |
10637 | if (strcmp (idesc->name, "add") == 0) | |
10638 | { | |
10639 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10640 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10641 | mnemonic = "addl"; | |
10642 | else | |
10643 | mnemonic = "adds"; | |
3d56ab85 | 10644 | ia64_free_opcode (idesc); |
800eeca4 | 10645 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10646 | } |
10647 | else if (strcmp (idesc->name, "mov") == 0) | |
10648 | { | |
10649 | enum ia64_opnd opnd1, opnd2; | |
10650 | int rop; | |
10651 | ||
10652 | opnd1 = idesc->operands[0]; | |
10653 | opnd2 = idesc->operands[1]; | |
10654 | if (opnd1 == IA64_OPND_AR3) | |
10655 | rop = 0; | |
10656 | else if (opnd2 == IA64_OPND_AR3) | |
10657 | rop = 1; | |
10658 | else | |
10659 | abort (); | |
652ca075 L |
10660 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10661 | { | |
10662 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10663 | mnemonic = "mov.i"; | |
97762d08 | 10664 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10665 | mnemonic = "mov.m"; |
97762d08 JB |
10666 | else |
10667 | rop = -1; | |
652ca075 | 10668 | } |
800eeca4 | 10669 | else |
652ca075 | 10670 | abort (); |
97762d08 JB |
10671 | if (rop >= 0) |
10672 | { | |
10673 | ia64_free_opcode (idesc); | |
10674 | idesc = ia64_find_opcode (mnemonic); | |
10675 | while (idesc != NULL | |
10676 | && (idesc->operands[0] != opnd1 | |
10677 | || idesc->operands[1] != opnd2)) | |
10678 | idesc = get_next_opcode (idesc); | |
10679 | } | |
800eeca4 JW |
10680 | } |
10681 | } | |
652ca075 L |
10682 | else if (strcmp (idesc->name, "mov.i") == 0 |
10683 | || strcmp (idesc->name, "mov.m") == 0) | |
10684 | { | |
10685 | enum ia64_opnd opnd1, opnd2; | |
10686 | int rop; | |
10687 | ||
10688 | opnd1 = idesc->operands[0]; | |
10689 | opnd2 = idesc->operands[1]; | |
10690 | if (opnd1 == IA64_OPND_AR3) | |
10691 | rop = 0; | |
10692 | else if (opnd2 == IA64_OPND_AR3) | |
10693 | rop = 1; | |
10694 | else | |
10695 | abort (); | |
10696 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10697 | { | |
10698 | char unit = 'a'; | |
10699 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10700 | unit = 'i'; | |
10701 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10702 | unit = 'm'; | |
10703 | if (unit != 'a' && unit != idesc->name [4]) | |
10704 | as_bad ("AR %d cannot be accessed by %c-unit", | |
10705 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), | |
10706 | TOUPPER (unit)); | |
10707 | } | |
10708 | } | |
91d777ee L |
10709 | else if (strcmp (idesc->name, "hint.b") == 0) |
10710 | { | |
10711 | switch (md.hint_b) | |
10712 | { | |
10713 | case hint_b_ok: | |
10714 | break; | |
10715 | case hint_b_warning: | |
10716 | as_warn ("hint.b may be treated as nop"); | |
10717 | break; | |
10718 | case hint_b_error: | |
10719 | as_bad ("hint.b shouldn't be used"); | |
10720 | break; | |
10721 | } | |
10722 | } | |
800eeca4 JW |
10723 | |
10724 | qp_regno = 0; | |
10725 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10726 | { |
10727 | qp_regno = md.qp.X_add_number - REG_P; | |
10728 | md.qp.X_op = O_absent; | |
10729 | } | |
800eeca4 JW |
10730 | |
10731 | flags = idesc->flags; | |
10732 | ||
10733 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10734 | { |
10735 | /* The alignment frag has to end with a stop bit only if the | |
10736 | next instruction after the alignment directive has to be | |
10737 | the first instruction in an instruction group. */ | |
10738 | if (align_frag) | |
10739 | { | |
10740 | while (align_frag->fr_type != rs_align_code) | |
10741 | { | |
10742 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10743 | if (!align_frag) |
10744 | break; | |
9545c4ce | 10745 | } |
bae25f19 L |
10746 | /* align_frag can be NULL if there are directives in |
10747 | between. */ | |
10748 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10749 | align_frag->tc_frag_data = 1; |
10750 | } | |
10751 | ||
10752 | insn_group_break (1, 0, 0); | |
10753 | } | |
10754 | align_frag = NULL; | |
800eeca4 JW |
10755 | |
10756 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10757 | { | |
10758 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10759 | goto done; | |
10760 | } | |
10761 | ||
542d6675 | 10762 | /* Build the instruction. */ |
800eeca4 JW |
10763 | CURR_SLOT.qp_regno = qp_regno; |
10764 | CURR_SLOT.idesc = idesc; | |
10765 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10766 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
10767 | |
10768 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 10769 | if (unwind.current_entry) |
800eeca4 | 10770 | { |
e0c9811a JW |
10771 | CURR_SLOT.unwind_record = unwind.current_entry; |
10772 | unwind.current_entry = NULL; | |
800eeca4 | 10773 | } |
75e09913 JB |
10774 | if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start)) |
10775 | unwind.insn = 1; | |
800eeca4 | 10776 | |
542d6675 | 10777 | /* Check for dependency violations. */ |
800eeca4 | 10778 | if (md.detect_dv) |
542d6675 | 10779 | check_dv (idesc); |
800eeca4 JW |
10780 | |
10781 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10782 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10783 | emit_one_bundle (); | |
10784 | ||
10785 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10786 | insn_group_break (1, 0, 0); | |
10787 | ||
10788 | md.last_text_seg = now_seg; | |
10789 | ||
10790 | done: | |
10791 | input_line_pointer = saved_input_line_pointer; | |
10792 | } | |
10793 | ||
10794 | /* Called when symbol NAME cannot be found in the symbol table. | |
10795 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10796 | |
10797 | symbolS * | |
800eeca4 | 10798 | md_undefined_symbol (name) |
2434f565 | 10799 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10800 | { |
10801 | return 0; | |
10802 | } | |
10803 | ||
10804 | /* Called for any expression that can not be recognized. When the | |
10805 | function is called, `input_line_pointer' will point to the start of | |
10806 | the expression. */ | |
542d6675 | 10807 | |
800eeca4 JW |
10808 | void |
10809 | md_operand (e) | |
10810 | expressionS *e; | |
10811 | { | |
800eeca4 JW |
10812 | switch (*input_line_pointer) |
10813 | { | |
800eeca4 JW |
10814 | case '[': |
10815 | ++input_line_pointer; | |
10816 | expression (e); | |
10817 | if (*input_line_pointer != ']') | |
10818 | { | |
16a48f83 | 10819 | as_bad ("Closing bracket missing"); |
800eeca4 JW |
10820 | goto err; |
10821 | } | |
10822 | else | |
10823 | { | |
10824 | if (e->X_op != O_register) | |
10825 | as_bad ("Register expected as index"); | |
10826 | ||
10827 | ++input_line_pointer; | |
10828 | e->X_op = O_index; | |
10829 | } | |
10830 | break; | |
10831 | ||
10832 | default: | |
10833 | break; | |
10834 | } | |
10835 | return; | |
10836 | ||
10837 | err: | |
10838 | ignore_rest_of_line (); | |
10839 | } | |
10840 | ||
10841 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10842 | a section symbol plus some offset. For relocs involving @fptr(), | |
10843 | directives we don't want such adjustments since we need to have the | |
10844 | original symbol's name in the reloc. */ | |
10845 | int | |
10846 | ia64_fix_adjustable (fix) | |
10847 | fixS *fix; | |
10848 | { | |
10849 | /* Prevent all adjustments to global symbols */ | |
10850 | if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) | |
10851 | return 0; | |
10852 | ||
10853 | switch (fix->fx_r_type) | |
10854 | { | |
10855 | case BFD_RELOC_IA64_FPTR64I: | |
10856 | case BFD_RELOC_IA64_FPTR32MSB: | |
10857 | case BFD_RELOC_IA64_FPTR32LSB: | |
10858 | case BFD_RELOC_IA64_FPTR64MSB: | |
10859 | case BFD_RELOC_IA64_FPTR64LSB: | |
10860 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10861 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10862 | return 0; | |
10863 | default: | |
10864 | break; | |
10865 | } | |
10866 | ||
10867 | return 1; | |
10868 | } | |
10869 | ||
10870 | int | |
10871 | ia64_force_relocation (fix) | |
10872 | fixS *fix; | |
10873 | { | |
10874 | switch (fix->fx_r_type) | |
10875 | { | |
10876 | case BFD_RELOC_IA64_FPTR64I: | |
10877 | case BFD_RELOC_IA64_FPTR32MSB: | |
10878 | case BFD_RELOC_IA64_FPTR32LSB: | |
10879 | case BFD_RELOC_IA64_FPTR64MSB: | |
10880 | case BFD_RELOC_IA64_FPTR64LSB: | |
10881 | ||
10882 | case BFD_RELOC_IA64_LTOFF22: | |
10883 | case BFD_RELOC_IA64_LTOFF64I: | |
10884 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10885 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10886 | case BFD_RELOC_IA64_PLTOFF22: | |
10887 | case BFD_RELOC_IA64_PLTOFF64I: | |
10888 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10889 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10890 | |
10891 | case BFD_RELOC_IA64_LTOFF22X: | |
10892 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10893 | return 1; |
10894 | ||
10895 | default: | |
a161fe53 | 10896 | break; |
800eeca4 | 10897 | } |
a161fe53 | 10898 | |
ae6063d4 | 10899 | return generic_force_reloc (fix); |
800eeca4 JW |
10900 | } |
10901 | ||
10902 | /* Decide from what point a pc-relative relocation is relative to, | |
10903 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10904 | long | |
10905 | ia64_pcrel_from_section (fix, sec) | |
10906 | fixS *fix; | |
10907 | segT sec; | |
10908 | { | |
10909 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10910 | |
800eeca4 JW |
10911 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10912 | off &= ~0xfUL; | |
10913 | ||
10914 | return off; | |
10915 | } | |
10916 | ||
6174d9c8 RH |
10917 | |
10918 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10919 | void | |
10920 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10921 | { | |
10922 | expressionS expr; | |
10923 | ||
10924 | expr.X_op = O_pseudo_fixup; | |
10925 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10926 | expr.X_add_number = 0; | |
10927 | expr.X_add_symbol = symbol; | |
10928 | emit_expr (&expr, size); | |
10929 | } | |
10930 | ||
800eeca4 JW |
10931 | /* This is called whenever some data item (not an instruction) needs a |
10932 | fixup. We pick the right reloc code depending on the byteorder | |
10933 | currently in effect. */ | |
10934 | void | |
10935 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10936 | fragS *f; | |
10937 | int where; | |
10938 | int nbytes; | |
10939 | expressionS *exp; | |
10940 | { | |
10941 | bfd_reloc_code_real_type code; | |
10942 | fixS *fix; | |
10943 | ||
10944 | switch (nbytes) | |
10945 | { | |
10946 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10947 | them here since they will work fine as long as the expression | |
10948 | is fully defined at the end of the pass over the source file. */ | |
10949 | case 1: code = BFD_RELOC_8; break; | |
10950 | case 2: code = BFD_RELOC_16; break; | |
10951 | case 4: | |
10952 | if (target_big_endian) | |
10953 | code = BFD_RELOC_IA64_DIR32MSB; | |
10954 | else | |
10955 | code = BFD_RELOC_IA64_DIR32LSB; | |
10956 | break; | |
10957 | ||
10958 | case 8: | |
40449e9f | 10959 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10960 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10961 | && exp->X_op_symbol |
10962 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10963 | && !(md.flags & EF_IA_64_ABI64)) | |
10964 | { | |
10965 | if (target_big_endian) | |
10966 | code = BFD_RELOC_IA64_IPLTMSB; | |
10967 | else | |
10968 | code = BFD_RELOC_IA64_IPLTLSB; | |
10969 | exp->X_op = O_symbol; | |
10970 | break; | |
10971 | } | |
10972 | else | |
10973 | { | |
10974 | if (target_big_endian) | |
10975 | code = BFD_RELOC_IA64_DIR64MSB; | |
10976 | else | |
10977 | code = BFD_RELOC_IA64_DIR64LSB; | |
10978 | break; | |
10979 | } | |
800eeca4 | 10980 | |
3969b680 RH |
10981 | case 16: |
10982 | if (exp->X_op == O_pseudo_fixup | |
10983 | && exp->X_op_symbol | |
10984 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10985 | { | |
10986 | if (target_big_endian) | |
10987 | code = BFD_RELOC_IA64_IPLTMSB; | |
10988 | else | |
10989 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10990 | exp->X_op = O_symbol; |
10991 | break; | |
10992 | } | |
10993 | /* FALLTHRU */ | |
10994 | ||
800eeca4 JW |
10995 | default: |
10996 | as_bad ("Unsupported fixup size %d", nbytes); | |
10997 | ignore_rest_of_line (); | |
10998 | return; | |
10999 | } | |
6174d9c8 | 11000 | |
800eeca4 JW |
11001 | if (exp->X_op == O_pseudo_fixup) |
11002 | { | |
800eeca4 JW |
11003 | exp->X_op = O_symbol; |
11004 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11005 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11006 | } |
3969b680 | 11007 | |
800eeca4 JW |
11008 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11009 | /* We need to store the byte order in effect in case we're going | |
11010 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 11011 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
11012 | fix->tc_fix_data.bigendian = target_big_endian; |
11013 | } | |
11014 | ||
11015 | /* Return the actual relocation we wish to associate with the pseudo | |
11016 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11017 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11018 | |
11019 | static bfd_reloc_code_real_type | |
11020 | ia64_gen_real_reloc_type (sym, r_type) | |
11021 | struct symbol *sym; | |
11022 | bfd_reloc_code_real_type r_type; | |
11023 | { | |
11024 | bfd_reloc_code_real_type new = 0; | |
0ca3e455 | 11025 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11026 | |
11027 | if (sym == NULL) | |
11028 | { | |
11029 | return r_type; | |
11030 | } | |
11031 | ||
11032 | switch (S_GET_VALUE (sym)) | |
11033 | { | |
11034 | case FUNC_FPTR_RELATIVE: | |
11035 | switch (r_type) | |
11036 | { | |
11037 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
11038 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
11039 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
11040 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
11041 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11042 | default: type = "FPTR"; break; |
800eeca4 JW |
11043 | } |
11044 | break; | |
11045 | ||
11046 | case FUNC_GP_RELATIVE: | |
11047 | switch (r_type) | |
11048 | { | |
11049 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
11050 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
11051 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
11052 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
11053 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
11054 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11055 | default: type = "GPREL"; break; |
800eeca4 JW |
11056 | } |
11057 | break; | |
11058 | ||
11059 | case FUNC_LT_RELATIVE: | |
11060 | switch (r_type) | |
11061 | { | |
11062 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
11063 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11064 | default: type = "LTOFF"; break; |
800eeca4 JW |
11065 | } |
11066 | break; | |
11067 | ||
fa2c7eff RH |
11068 | case FUNC_LT_RELATIVE_X: |
11069 | switch (r_type) | |
11070 | { | |
11071 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
0ca3e455 | 11072 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11073 | } |
11074 | break; | |
11075 | ||
c67e42c9 RH |
11076 | case FUNC_PC_RELATIVE: |
11077 | switch (r_type) | |
11078 | { | |
11079 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
11080 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
11081 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
11082 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
11083 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
11084 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11085 | default: type = "PCREL"; break; |
c67e42c9 RH |
11086 | } |
11087 | break; | |
11088 | ||
800eeca4 JW |
11089 | case FUNC_PLT_RELATIVE: |
11090 | switch (r_type) | |
11091 | { | |
11092 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
11093 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
11094 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11095 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11096 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11097 | } |
11098 | break; | |
11099 | ||
11100 | case FUNC_SEC_RELATIVE: | |
11101 | switch (r_type) | |
11102 | { | |
11103 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
11104 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
11105 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
11106 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11107 | default: type = "SECREL"; break; |
800eeca4 JW |
11108 | } |
11109 | break; | |
11110 | ||
11111 | case FUNC_SEG_RELATIVE: | |
11112 | switch (r_type) | |
11113 | { | |
11114 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
11115 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11116 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11117 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11118 | default: type = "SEGREL"; break; |
800eeca4 JW |
11119 | } |
11120 | break; | |
11121 | ||
11122 | case FUNC_LTV_RELATIVE: | |
11123 | switch (r_type) | |
11124 | { | |
11125 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
11126 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
11127 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
11128 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11129 | default: type = "LTV"; break; |
800eeca4 JW |
11130 | } |
11131 | break; | |
11132 | ||
11133 | case FUNC_LT_FPTR_RELATIVE: | |
11134 | switch (r_type) | |
11135 | { | |
11136 | case BFD_RELOC_IA64_IMM22: | |
11137 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
11138 | case BFD_RELOC_IA64_IMM64: | |
11139 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
0ca3e455 JB |
11140 | case BFD_RELOC_IA64_DIR32MSB: |
11141 | new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; | |
11142 | case BFD_RELOC_IA64_DIR32LSB: | |
11143 | new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; | |
11144 | case BFD_RELOC_IA64_DIR64MSB: | |
11145 | new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; | |
11146 | case BFD_RELOC_IA64_DIR64LSB: | |
11147 | new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; | |
800eeca4 | 11148 | default: |
0ca3e455 | 11149 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11150 | } |
11151 | break; | |
3969b680 | 11152 | |
13ae64f3 JJ |
11153 | case FUNC_TP_RELATIVE: |
11154 | switch (r_type) | |
11155 | { | |
0ca3e455 JB |
11156 | case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; |
11157 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; | |
11158 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; | |
11159 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; | |
11160 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; | |
11161 | default: type = "TPREL"; break; | |
13ae64f3 JJ |
11162 | } |
11163 | break; | |
11164 | ||
11165 | case FUNC_LT_TP_RELATIVE: | |
11166 | switch (r_type) | |
11167 | { | |
11168 | case BFD_RELOC_IA64_IMM22: | |
11169 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
11170 | default: | |
0ca3e455 JB |
11171 | type = "LTOFF_TPREL"; break; |
11172 | } | |
11173 | break; | |
11174 | ||
11175 | case FUNC_DTP_MODULE: | |
11176 | switch (r_type) | |
11177 | { | |
11178 | case BFD_RELOC_IA64_DIR64MSB: | |
11179 | new = BFD_RELOC_IA64_DTPMOD64MSB; break; | |
11180 | case BFD_RELOC_IA64_DIR64LSB: | |
11181 | new = BFD_RELOC_IA64_DTPMOD64LSB; break; | |
11182 | default: | |
11183 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11184 | } |
11185 | break; | |
11186 | ||
11187 | case FUNC_LT_DTP_MODULE: | |
11188 | switch (r_type) | |
11189 | { | |
11190 | case BFD_RELOC_IA64_IMM22: | |
11191 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
11192 | default: | |
0ca3e455 | 11193 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11194 | } |
11195 | break; | |
11196 | ||
11197 | case FUNC_DTP_RELATIVE: | |
11198 | switch (r_type) | |
11199 | { | |
0ca3e455 JB |
11200 | case BFD_RELOC_IA64_DIR32MSB: |
11201 | new = BFD_RELOC_IA64_DTPREL32MSB; break; | |
11202 | case BFD_RELOC_IA64_DIR32LSB: | |
11203 | new = BFD_RELOC_IA64_DTPREL32LSB; break; | |
6174d9c8 RH |
11204 | case BFD_RELOC_IA64_DIR64MSB: |
11205 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
11206 | case BFD_RELOC_IA64_DIR64LSB: | |
11207 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
11208 | case BFD_RELOC_IA64_IMM14: |
11209 | new = BFD_RELOC_IA64_DTPREL14; break; | |
11210 | case BFD_RELOC_IA64_IMM22: | |
11211 | new = BFD_RELOC_IA64_DTPREL22; break; | |
11212 | case BFD_RELOC_IA64_IMM64: | |
11213 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
11214 | default: | |
0ca3e455 | 11215 | type = "DTPREL"; break; |
13ae64f3 JJ |
11216 | } |
11217 | break; | |
11218 | ||
11219 | case FUNC_LT_DTP_RELATIVE: | |
11220 | switch (r_type) | |
11221 | { | |
11222 | case BFD_RELOC_IA64_IMM22: | |
11223 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
11224 | default: | |
0ca3e455 | 11225 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11226 | } |
11227 | break; | |
11228 | ||
40449e9f | 11229 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11230 | switch (r_type) |
11231 | { | |
11232 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11233 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11234 | default: type = "IPLT"; break; | |
11235 | } | |
40449e9f | 11236 | break; |
1cd8ff38 | 11237 | |
800eeca4 JW |
11238 | default: |
11239 | abort (); | |
11240 | } | |
6174d9c8 | 11241 | |
800eeca4 JW |
11242 | if (new) |
11243 | return new; | |
11244 | else | |
0ca3e455 JB |
11245 | { |
11246 | int width; | |
11247 | ||
11248 | if (!type) | |
11249 | abort (); | |
11250 | switch (r_type) | |
11251 | { | |
11252 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11253 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11254 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11255 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
11256 | case BFD_RELOC_IA64_IMM14: width = 14; break; | |
11257 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11258 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11259 | default: abort (); | |
11260 | } | |
11261 | ||
11262 | /* This should be an error, but since previously there wasn't any | |
11263 | diagnostic here, dont't make it fail because of this for now. */ | |
11264 | as_warn ("Cannot express %s%d%s relocation", type, width, suffix); | |
11265 | return r_type; | |
11266 | } | |
800eeca4 JW |
11267 | } |
11268 | ||
11269 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11270 | functions. */ | |
11271 | void | |
11272 | ia64_validate_fix (fix) | |
11273 | fixS *fix; | |
11274 | { | |
11275 | switch (fix->fx_r_type) | |
11276 | { | |
11277 | case BFD_RELOC_IA64_FPTR64I: | |
11278 | case BFD_RELOC_IA64_FPTR32MSB: | |
11279 | case BFD_RELOC_IA64_FPTR64LSB: | |
11280 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11281 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11282 | if (fix->fx_offset != 0) | |
11283 | as_bad_where (fix->fx_file, fix->fx_line, | |
11284 | "No addend allowed in @fptr() relocation"); | |
11285 | break; | |
11286 | default: | |
11287 | break; | |
11288 | } | |
800eeca4 JW |
11289 | } |
11290 | ||
11291 | static void | |
11292 | fix_insn (fix, odesc, value) | |
11293 | fixS *fix; | |
11294 | const struct ia64_operand *odesc; | |
11295 | valueT value; | |
11296 | { | |
11297 | bfd_vma insn[3], t0, t1, control_bits; | |
11298 | const char *err; | |
11299 | char *fixpos; | |
11300 | long slot; | |
11301 | ||
11302 | slot = fix->fx_where & 0x3; | |
11303 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11304 | ||
c67e42c9 | 11305 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11306 | t0 = bfd_getl64 (fixpos); |
11307 | t1 = bfd_getl64 (fixpos + 8); | |
11308 | control_bits = t0 & 0x1f; | |
11309 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11310 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11311 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11312 | ||
c67e42c9 RH |
11313 | err = NULL; |
11314 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11315 | { |
c67e42c9 RH |
11316 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11317 | insn[2] |= (((value & 0x7f) << 13) | |
11318 | | (((value >> 7) & 0x1ff) << 27) | |
11319 | | (((value >> 16) & 0x1f) << 22) | |
11320 | | (((value >> 21) & 0x1) << 21) | |
11321 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11322 | } |
c67e42c9 RH |
11323 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11324 | { | |
11325 | if (value & ~0x3fffffffffffffffULL) | |
11326 | err = "integer operand out of range"; | |
11327 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
11328 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11329 | } | |
11330 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11331 | { | |
11332 | value >>= 4; | |
11333 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11334 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11335 | | (((value >> 0) & 0xfffff) << 13)); | |
11336 | } | |
11337 | else | |
11338 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11339 | ||
11340 | if (err) | |
11341 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
11342 | |
11343 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11344 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11345 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11346 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11347 | } |
11348 | ||
11349 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11350 | ignored; perhaps it was once meaningful, but now it is historical. | |
11351 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11352 | ||
11353 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11354 | (if possible). */ |
94f592af NC |
11355 | |
11356 | void | |
11357 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 11358 | fixS *fix; |
40449e9f | 11359 | valueT *valP; |
2434f565 | 11360 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
11361 | { |
11362 | char *fixpos; | |
40449e9f | 11363 | valueT value = *valP; |
800eeca4 JW |
11364 | |
11365 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11366 | ||
11367 | if (fix->fx_pcrel) | |
11368 | { | |
7b347e43 JB |
11369 | switch (fix->fx_r_type) |
11370 | { | |
11371 | case BFD_RELOC_IA64_PCREL21B: break; | |
11372 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11373 | case BFD_RELOC_IA64_PCREL21F: break; | |
11374 | case BFD_RELOC_IA64_PCREL21M: break; | |
11375 | case BFD_RELOC_IA64_PCREL60B: break; | |
11376 | case BFD_RELOC_IA64_PCREL22: break; | |
11377 | case BFD_RELOC_IA64_PCREL64I: break; | |
11378 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11379 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11380 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11381 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11382 | default: | |
11383 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11384 | fix->fx_r_type); | |
11385 | break; | |
11386 | } | |
800eeca4 JW |
11387 | } |
11388 | if (fix->fx_addsy) | |
11389 | { | |
00f7efb6 | 11390 | switch (fix->fx_r_type) |
800eeca4 | 11391 | { |
00f7efb6 | 11392 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11393 | /* This must be a TAG13 or TAG13b operand. There are no external |
11394 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
11395 | as_bad_where (fix->fx_file, fix->fx_line, |
11396 | "%s must have a constant value", | |
11397 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 11398 | fix->fx_done = 1; |
94f592af | 11399 | return; |
00f7efb6 JJ |
11400 | |
11401 | case BFD_RELOC_IA64_TPREL14: | |
11402 | case BFD_RELOC_IA64_TPREL22: | |
11403 | case BFD_RELOC_IA64_TPREL64I: | |
11404 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11405 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11406 | case BFD_RELOC_IA64_DTPREL14: | |
11407 | case BFD_RELOC_IA64_DTPREL22: | |
11408 | case BFD_RELOC_IA64_DTPREL64I: | |
11409 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11410 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11411 | break; | |
7925dd68 JJ |
11412 | |
11413 | default: | |
11414 | break; | |
800eeca4 | 11415 | } |
800eeca4 JW |
11416 | } |
11417 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11418 | { | |
11419 | if (fix->tc_fix_data.bigendian) | |
11420 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11421 | else | |
11422 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11423 | fix->fx_done = 1; | |
800eeca4 JW |
11424 | } |
11425 | else | |
11426 | { | |
11427 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11428 | fix->fx_done = 1; | |
800eeca4 | 11429 | } |
800eeca4 JW |
11430 | } |
11431 | ||
11432 | /* Generate the BFD reloc to be stuck in the object file from the | |
11433 | fixup used internally in the assembler. */ | |
542d6675 KH |
11434 | |
11435 | arelent * | |
800eeca4 | 11436 | tc_gen_reloc (sec, fixp) |
2434f565 | 11437 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
11438 | fixS *fixp; |
11439 | { | |
11440 | arelent *reloc; | |
11441 | ||
11442 | reloc = xmalloc (sizeof (*reloc)); | |
11443 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11444 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11445 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11446 | reloc->addend = fixp->fx_offset; | |
11447 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11448 | ||
11449 | if (!reloc->howto) | |
11450 | { | |
11451 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
11452 | "Cannot represent %s relocation in object file", | |
11453 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
11454 | } | |
11455 | return reloc; | |
11456 | } | |
11457 | ||
11458 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11459 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11460 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11461 | returned, or NULL on OK. */ |
11462 | ||
11463 | #define MAX_LITTLENUMS 5 | |
11464 | ||
542d6675 | 11465 | char * |
800eeca4 JW |
11466 | md_atof (type, lit, size) |
11467 | int type; | |
11468 | char *lit; | |
11469 | int *size; | |
11470 | { | |
11471 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11472 | char *t; |
11473 | int prec; | |
11474 | ||
11475 | switch (type) | |
11476 | { | |
11477 | /* IEEE floats */ | |
11478 | case 'f': | |
11479 | case 'F': | |
11480 | case 's': | |
11481 | case 'S': | |
11482 | prec = 2; | |
11483 | break; | |
11484 | ||
11485 | case 'd': | |
11486 | case 'D': | |
11487 | case 'r': | |
11488 | case 'R': | |
11489 | prec = 4; | |
11490 | break; | |
11491 | ||
11492 | case 'x': | |
11493 | case 'X': | |
11494 | case 'p': | |
11495 | case 'P': | |
11496 | prec = 5; | |
11497 | break; | |
11498 | ||
11499 | default: | |
11500 | *size = 0; | |
11501 | return "Bad call to MD_ATOF()"; | |
11502 | } | |
11503 | t = atof_ieee (input_line_pointer, type, words); | |
11504 | if (t) | |
11505 | input_line_pointer = t; | |
800eeca4 | 11506 | |
10a98291 L |
11507 | (*ia64_float_to_chars) (lit, words, prec); |
11508 | ||
165a7f90 L |
11509 | if (type == 'X') |
11510 | { | |
11511 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11512 | memset (&lit [10], 0, 6); |
165a7f90 L |
11513 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11514 | } | |
10a98291 L |
11515 | else |
11516 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11517 | ||
800eeca4 JW |
11518 | return 0; |
11519 | } | |
11520 | ||
800eeca4 JW |
11521 | /* Handle ia64 specific semantics of the align directive. */ |
11522 | ||
0a9ef439 | 11523 | void |
800eeca4 | 11524 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
11525 | int n ATTRIBUTE_UNUSED; |
11526 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 11527 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 11528 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 11529 | { |
0a9ef439 | 11530 | if (subseg_text_p (now_seg)) |
800eeca4 | 11531 | ia64_flush_insns (); |
0a9ef439 | 11532 | } |
800eeca4 | 11533 | |
0a9ef439 RH |
11534 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11535 | of an rs_align_code fragment. */ | |
800eeca4 | 11536 | |
0a9ef439 RH |
11537 | void |
11538 | ia64_handle_align (fragp) | |
11539 | fragS *fragp; | |
11540 | { | |
0a9ef439 RH |
11541 | int bytes; |
11542 | char *p; | |
9545c4ce | 11543 | const unsigned char *nop; |
0a9ef439 RH |
11544 | |
11545 | if (fragp->fr_type != rs_align_code) | |
11546 | return; | |
11547 | ||
9545c4ce L |
11548 | /* Check if this frag has to end with a stop bit. */ |
11549 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11550 | ||
0a9ef439 RH |
11551 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11552 | p = fragp->fr_literal + fragp->fr_fix; | |
11553 | ||
d9201763 L |
11554 | /* If no paddings are needed, we check if we need a stop bit. */ |
11555 | if (!bytes && fragp->tc_frag_data) | |
11556 | { | |
11557 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11558 | #if 1 |
11559 | /* FIXME: It won't work with | |
11560 | .align 16 | |
11561 | alloc r32=ar.pfs,1,2,4,0 | |
11562 | */ | |
11563 | ; | |
11564 | #else | |
d9201763 L |
11565 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11566 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11567 | #endif |
d9201763 L |
11568 | else |
11569 | /* Bundles are always in little-endian byte order. Make sure | |
11570 | the previous bundle has the stop bit. */ | |
11571 | *(p - 16) |= 1; | |
11572 | } | |
11573 | ||
0a9ef439 RH |
11574 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11575 | putting data into a text section. */ | |
11576 | if (bytes & 15) | |
11577 | { | |
11578 | int fix = bytes & 15; | |
11579 | memset (p, 0, fix); | |
11580 | p += fix; | |
11581 | bytes -= fix; | |
11582 | fragp->fr_fix += fix; | |
800eeca4 JW |
11583 | } |
11584 | ||
012a452b | 11585 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11586 | memcpy (p, nop, 16); |
0a9ef439 | 11587 | fragp->fr_var = 16; |
800eeca4 | 11588 | } |
10a98291 L |
11589 | |
11590 | static void | |
11591 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11592 | int prec) | |
11593 | { | |
11594 | while (prec--) | |
11595 | { | |
11596 | number_to_chars_bigendian (lit, (long) (*words++), | |
11597 | sizeof (LITTLENUM_TYPE)); | |
11598 | lit += sizeof (LITTLENUM_TYPE); | |
11599 | } | |
11600 | } | |
11601 | ||
11602 | static void | |
11603 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11604 | int prec) | |
11605 | { | |
11606 | while (prec--) | |
11607 | { | |
11608 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11609 | sizeof (LITTLENUM_TYPE)); | |
11610 | lit += sizeof (LITTLENUM_TYPE); | |
11611 | } | |
11612 | } | |
11613 | ||
11614 | void | |
11615 | ia64_elf_section_change_hook (void) | |
11616 | { | |
38ce5b11 L |
11617 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11618 | && elf_linked_to_section (now_seg) == NULL) | |
11619 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11620 | dot_byteorder (-1); |
11621 | } | |
a645d1eb L |
11622 | |
11623 | /* Check if a label should be made global. */ | |
11624 | void | |
11625 | ia64_check_label (symbolS *label) | |
11626 | { | |
11627 | if (*input_line_pointer == ':') | |
11628 | { | |
11629 | S_SET_EXTERNAL (label); | |
11630 | input_line_pointer++; | |
11631 | } | |
11632 | } | |
35f5df7f L |
11633 | |
11634 | /* Used to remember where .alias and .secalias directives are seen. We | |
11635 | will rename symbol and section names when we are about to output | |
11636 | the relocatable file. */ | |
11637 | struct alias | |
11638 | { | |
11639 | char *file; /* The file where the directive is seen. */ | |
11640 | unsigned int line; /* The line number the directive is at. */ | |
11641 | const char *name; /* The orignale name of the symbol. */ | |
11642 | }; | |
11643 | ||
11644 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11645 | .secalias. Otherwise, it is .alias. */ | |
11646 | static void | |
11647 | dot_alias (int section) | |
11648 | { | |
11649 | char *name, *alias; | |
11650 | char delim; | |
11651 | char *end_name; | |
11652 | int len; | |
11653 | const char *error_string; | |
11654 | struct alias *h; | |
11655 | const char *a; | |
11656 | struct hash_control *ahash, *nhash; | |
11657 | const char *kind; | |
11658 | ||
11659 | name = input_line_pointer; | |
11660 | delim = get_symbol_end (); | |
11661 | end_name = input_line_pointer; | |
11662 | *end_name = delim; | |
11663 | ||
11664 | if (name == end_name) | |
11665 | { | |
11666 | as_bad (_("expected symbol name")); | |
11667 | discard_rest_of_line (); | |
11668 | return; | |
11669 | } | |
11670 | ||
11671 | SKIP_WHITESPACE (); | |
11672 | ||
11673 | if (*input_line_pointer != ',') | |
11674 | { | |
11675 | *end_name = 0; | |
11676 | as_bad (_("expected comma after \"%s\""), name); | |
11677 | *end_name = delim; | |
11678 | ignore_rest_of_line (); | |
11679 | return; | |
11680 | } | |
11681 | ||
11682 | input_line_pointer++; | |
11683 | *end_name = 0; | |
20b36a95 | 11684 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11685 | |
11686 | /* We call demand_copy_C_string to check if alias string is valid. | |
11687 | There should be a closing `"' and no `\0' in the string. */ | |
11688 | alias = demand_copy_C_string (&len); | |
11689 | if (alias == NULL) | |
11690 | { | |
11691 | ignore_rest_of_line (); | |
11692 | return; | |
11693 | } | |
11694 | ||
11695 | /* Make a copy of name string. */ | |
11696 | len = strlen (name) + 1; | |
11697 | obstack_grow (¬es, name, len); | |
11698 | name = obstack_finish (¬es); | |
11699 | ||
11700 | if (section) | |
11701 | { | |
11702 | kind = "section"; | |
11703 | ahash = secalias_hash; | |
11704 | nhash = secalias_name_hash; | |
11705 | } | |
11706 | else | |
11707 | { | |
11708 | kind = "symbol"; | |
11709 | ahash = alias_hash; | |
11710 | nhash = alias_name_hash; | |
11711 | } | |
11712 | ||
11713 | /* Check if alias has been used before. */ | |
11714 | h = (struct alias *) hash_find (ahash, alias); | |
11715 | if (h) | |
11716 | { | |
11717 | if (strcmp (h->name, name)) | |
11718 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11719 | alias, kind, h->name); | |
11720 | goto out; | |
11721 | } | |
11722 | ||
11723 | /* Check if name already has an alias. */ | |
11724 | a = (const char *) hash_find (nhash, name); | |
11725 | if (a) | |
11726 | { | |
11727 | if (strcmp (a, alias)) | |
11728 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11729 | goto out; | |
11730 | } | |
11731 | ||
11732 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11733 | as_where (&h->file, &h->line); | |
11734 | h->name = name; | |
11735 | ||
11736 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11737 | if (error_string) | |
11738 | { | |
11739 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11740 | alias, kind, error_string); | |
11741 | goto out; | |
11742 | } | |
11743 | ||
11744 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11745 | if (error_string) | |
11746 | { | |
11747 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11748 | alias, kind, error_string); | |
11749 | out: | |
11750 | obstack_free (¬es, name); | |
11751 | obstack_free (¬es, alias); | |
11752 | } | |
11753 | ||
11754 | demand_empty_rest_of_line (); | |
11755 | } | |
11756 | ||
11757 | /* It renames the original symbol name to its alias. */ | |
11758 | static void | |
11759 | do_alias (const char *alias, PTR value) | |
11760 | { | |
11761 | struct alias *h = (struct alias *) value; | |
11762 | symbolS *sym = symbol_find (h->name); | |
11763 | ||
11764 | if (sym == NULL) | |
11765 | as_warn_where (h->file, h->line, | |
11766 | _("symbol `%s' aliased to `%s' is not used"), | |
11767 | h->name, alias); | |
11768 | else | |
11769 | S_SET_NAME (sym, (char *) alias); | |
11770 | } | |
11771 | ||
11772 | /* Called from write_object_file. */ | |
11773 | void | |
11774 | ia64_adjust_symtab (void) | |
11775 | { | |
11776 | hash_traverse (alias_hash, do_alias); | |
11777 | } | |
11778 | ||
11779 | /* It renames the original section name to its alias. */ | |
11780 | static void | |
11781 | do_secalias (const char *alias, PTR value) | |
11782 | { | |
11783 | struct alias *h = (struct alias *) value; | |
11784 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11785 | ||
11786 | if (sec == NULL) | |
11787 | as_warn_where (h->file, h->line, | |
11788 | _("section `%s' aliased to `%s' is not used"), | |
11789 | h->name, alias); | |
11790 | else | |
11791 | sec->name = alias; | |
11792 | } | |
11793 | ||
11794 | /* Called from write_object_file. */ | |
11795 | void | |
11796 | ia64_frob_file (void) | |
11797 | { | |
11798 | hash_traverse (secalias_hash, do_secalias); | |
11799 | } |