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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
d6afba4b
JJ		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
54#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55#define MIN(a,b) ((a) < (b) ? (a) : (b))
56
57#define NUM_SLOTS 4
58#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59#define CURR_SLOT md.slot[md.curr_slot]
60
61#define O_pseudo_fixup (O_max + 1)
62
63enum special_section
64 {
557debba 65 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 66 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SBSS,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
557debba
JW		 72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 76 };
77
78enum reloc_func
79 {
13ae64f3
JJ		 80 FUNC_DTP_MODULE,
81 FUNC_DTP_RELATIVE,
800eeca4
JW		 82 FUNC_FPTR_RELATIVE,
83 FUNC_GP_RELATIVE,
84 FUNC_LT_RELATIVE,
fa2c7eff 85 FUNC_LT_RELATIVE_X,
c67e42c9 86 FUNC_PC_RELATIVE,
800eeca4
JW		 87 FUNC_PLT_RELATIVE,
88 FUNC_SEC_RELATIVE,
89 FUNC_SEG_RELATIVE,
13ae64f3 90 FUNC_TP_RELATIVE,
800eeca4
JW		 91 FUNC_LTV_RELATIVE,
92 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 93 FUNC_LT_DTP_MODULE,
94 FUNC_LT_DTP_RELATIVE,
95 FUNC_LT_TP_RELATIVE,
3969b680 96 FUNC_IPLT_RELOC,
800eeca4
JW		 97 };
98
99enum reg_symbol
100 {
101 REG_GR = 0,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
108 REG_CFM,
109 REG_PR,
110 REG_PR_ROT,
111 REG_PSR,
112 REG_PSR_L,
113 REG_PSR_UM,
114 /* The following are pseudo-registers for use by gas only. */
115 IND_CPUID,
116 IND_DBR,
117 IND_DTR,
118 IND_ITR,
119 IND_IBR,
120 IND_MEM,
121 IND_MSR,
122 IND_PKR,
123 IND_PMC,
124 IND_PMD,
125 IND_RR,
542d6675 126 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 127 REG_PSP,
128 REG_PRIUNAT,
800eeca4
JW		 129 REG_NUM
130 };
131
132enum dynreg_type
133 {
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
137 DYNREG_NUM_TYPES
138 };
139
87f8eb97
JW		 140enum operand_match_result
141 {
142 OPERAND_MATCH,
143 OPERAND_OUT_OF_RANGE,
144 OPERAND_MISMATCH
145 };
146
800eeca4
JW		 147/* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
150 instruction. */
151struct label_fix
542d6675
KH		 152{
153 struct label_fix *next;
154 struct symbol *sym;
155};
800eeca4 156
549f748d 157/* This is the endianness of the current section. */
800eeca4
JW		 158extern int target_big_endian;
159
549f748d
JW		 160/* This is the default endianness. */
161static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
162
10a98291
L		 163void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
164
165static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
171
35f5df7f
L		 172static struct hash_control *alias_hash;
173static struct hash_control *alias_name_hash;
174static struct hash_control *secalias_hash;
175static struct hash_control *secalias_name_hash;
176
800eeca4
JW		 177/* Characters which always start a comment. */
178const char comment_chars[] = "";
179
180/* Characters which start a comment at the beginning of a line. */
181const char line_comment_chars[] = "#";
182
183/* Characters which may be used to separate multiple commands on a
184 single line. */
185const char line_separator_chars[] = ";";
186
187/* Characters which are used to indicate an exponent in a floating
188 point number. */
189const char EXP_CHARS[] = "eE";
190
191/* Characters which mean that a number is a floating point constant,
192 as in 0d1.0. */
193const char FLT_CHARS[] = "rRsSfFdDxXpP";
194
542d6675 195/* ia64-specific option processing: */
800eeca4 196
44f5c83a 197const char *md_shortopts = "m:N:x::";
800eeca4
JW		 198
199struct option md_longopts[] =
200 {
c43c2cc5
JW		 201#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
203#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 205 };
206
207size_t md_longopts_size = sizeof (md_longopts);
208
209static struct
210 {
211 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
212 struct hash_control *reg_hash; /* register name hash table */
213 struct hash_control *dynreg_hash; /* dynamic register hash table */
214 struct hash_control *const_hash; /* constant hash table */
215 struct hash_control *entry_hash; /* code entry hint hash table */
216
217 symbolS *regsym[REG_NUM];
218
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
222 expressionS qp;
223
224 unsigned int
197865e8 225 manual_bundling : 1,
800eeca4
JW		 226 debug_dv: 1,
227 detect_dv: 1,
228 explicit_mode : 1, /* which mode we're in */
229 default_explicit_mode : 1, /* which mode is the default */
230 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 231 auto_align : 1,
232 keep_pending_output : 1;
800eeca4
JW		 233
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
197865e8 236 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 237 int curr_slot;
238 int num_slots_in_use;
239 struct slot
240 {
241 unsigned int
242 end_of_insn_group : 1,
243 manual_bundling_on : 1,
196e8040
JW		 244 manual_bundling_off : 1,
245 loc_directive_seen : 1;
800eeca4
JW		 246 signed char user_template; /* user-selected template, if any */
247 unsigned char qp_regno; /* qualifying predicate */
248 /* This duplicates a good fraction of "struct fix" but we
249 can't use a "struct fix" instead since we can't call
250 fix_new_exp() until we know the address of the instruction. */
251 int num_fixups;
252 struct insn_fix
253 {
254 bfd_reloc_code_real_type code;
255 enum ia64_opnd opnd; /* type of operand in need of fix */
256 unsigned int is_pcrel : 1; /* is operand pc-relative? */
257 expressionS expr; /* the value to be inserted */
258 }
259 fixup[2]; /* at most two fixups per insn */
260 struct ia64_opcode *idesc;
261 struct label_fix *label_fixups;
f1bcba5b 262 struct label_fix *tag_fixups;
800eeca4
JW		 263 struct unw_rec_list *unwind_record; /* Unwind directive. */
264 expressionS opnd[6];
265 char *src_file;
266 unsigned int src_line;
267 struct dwarf2_line_info debug_line;
268 }
269 slot[NUM_SLOTS];
270
271 segT last_text_seg;
272
273 struct dynreg
274 {
275 struct dynreg *next; /* next dynamic register */
276 const char *name;
277 unsigned short base; /* the base register number */
278 unsigned short num_regs; /* # of registers in this set */
279 }
280 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
281
282 flagword flags; /* ELF-header flags */
283
284 struct mem_offset {
285 unsigned hint:1; /* is this hint currently valid? */
286 bfd_vma offset; /* mem.offset offset */
287 bfd_vma base; /* mem.offset base */
288 } mem_offset;
289
290 int path; /* number of alt. entry points seen */
291 const char **entry_labels; /* labels of all alternate paths in
542d6675 292 the current DV-checking block. */
800eeca4 293 int maxpaths; /* size currently allocated for
542d6675 294 entry_labels */
557debba
JW		 295
296 int pointer_size; /* size in bytes of a pointer */
297 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 298 }
299md;
300
542d6675 301/* application registers: */
800eeca4 302
e0c9811a
JW		 303#define AR_K0 0
304#define AR_K7 7
305#define AR_RSC 16
306#define AR_BSP 17
307#define AR_BSPSTORE 18
308#define AR_RNAT 19
309#define AR_UNAT 36
310#define AR_FPSR 40
311#define AR_ITC 44
312#define AR_PFS 64
313#define AR_LC 65
800eeca4
JW		 314
315static const struct
316 {
317 const char *name;
318 int regnum;
319 }
320ar[] =
321 {
322 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
323 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
324 {"ar.rsc", 16}, {"ar.bsp", 17},
325 {"ar.bspstore", 18}, {"ar.rnat", 19},
326 {"ar.fcr", 21}, {"ar.eflag", 24},
327 {"ar.csd", 25}, {"ar.ssd", 26},
328 {"ar.cflg", 27}, {"ar.fsr", 28},
329 {"ar.fir", 29}, {"ar.fdr", 30},
330 {"ar.ccv", 32}, {"ar.unat", 36},
331 {"ar.fpsr", 40}, {"ar.itc", 44},
332 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 333 {"ar.ec", 66},
800eeca4
JW		 334 };
335
336#define CR_IPSR 16
337#define CR_ISR 17
338#define CR_IIP 19
339#define CR_IFA 20
340#define CR_ITIR 21
341#define CR_IIPA 22
342#define CR_IFS 23
343#define CR_IIM 24
344#define CR_IHA 25
345#define CR_IVR 65
346#define CR_TPR 66
347#define CR_EOI 67
348#define CR_IRR0 68
349#define CR_IRR3 71
350#define CR_LRR0 80
351#define CR_LRR1 81
352
542d6675 353/* control registers: */
800eeca4
JW		 354static const struct
355 {
356 const char *name;
357 int regnum;
358 }
359cr[] =
360 {
361 {"cr.dcr", 0},
362 {"cr.itm", 1},
363 {"cr.iva", 2},
364 {"cr.pta", 8},
365 {"cr.gpta", 9},
366 {"cr.ipsr", 16},
367 {"cr.isr", 17},
368 {"cr.iip", 19},
369 {"cr.ifa", 20},
370 {"cr.itir", 21},
371 {"cr.iipa", 22},
372 {"cr.ifs", 23},
373 {"cr.iim", 24},
374 {"cr.iha", 25},
375 {"cr.lid", 64},
376 {"cr.ivr", 65},
377 {"cr.tpr", 66},
378 {"cr.eoi", 67},
379 {"cr.irr0", 68},
380 {"cr.irr1", 69},
381 {"cr.irr2", 70},
382 {"cr.irr3", 71},
383 {"cr.itv", 72},
384 {"cr.pmv", 73},
385 {"cr.cmcv", 74},
386 {"cr.lrr0", 80},
387 {"cr.lrr1", 81}
388 };
389
390#define PSR_MFL 4
391#define PSR_IC 13
392#define PSR_DFL 18
393#define PSR_CPL 32
394
395static const struct const_desc
396 {
397 const char *name;
398 valueT value;
399 }
400const_bits[] =
401 {
542d6675 402 /* PSR constant masks: */
800eeca4
JW		 403
404 /* 0: reserved */
405 {"psr.be", ((valueT) 1) << 1},
406 {"psr.up", ((valueT) 1) << 2},
407 {"psr.ac", ((valueT) 1) << 3},
408 {"psr.mfl", ((valueT) 1) << 4},
409 {"psr.mfh", ((valueT) 1) << 5},
410 /* 6-12: reserved */
411 {"psr.ic", ((valueT) 1) << 13},
412 {"psr.i", ((valueT) 1) << 14},
413 {"psr.pk", ((valueT) 1) << 15},
414 /* 16: reserved */
415 {"psr.dt", ((valueT) 1) << 17},
416 {"psr.dfl", ((valueT) 1) << 18},
417 {"psr.dfh", ((valueT) 1) << 19},
418 {"psr.sp", ((valueT) 1) << 20},
419 {"psr.pp", ((valueT) 1) << 21},
420 {"psr.di", ((valueT) 1) << 22},
421 {"psr.si", ((valueT) 1) << 23},
422 {"psr.db", ((valueT) 1) << 24},
423 {"psr.lp", ((valueT) 1) << 25},
424 {"psr.tb", ((valueT) 1) << 26},
425 {"psr.rt", ((valueT) 1) << 27},
426 /* 28-31: reserved */
427 /* 32-33: cpl (current privilege level) */
428 {"psr.is", ((valueT) 1) << 34},
429 {"psr.mc", ((valueT) 1) << 35},
430 {"psr.it", ((valueT) 1) << 36},
431 {"psr.id", ((valueT) 1) << 37},
432 {"psr.da", ((valueT) 1) << 38},
433 {"psr.dd", ((valueT) 1) << 39},
434 {"psr.ss", ((valueT) 1) << 40},
435 /* 41-42: ri (restart instruction) */
436 {"psr.ed", ((valueT) 1) << 43},
437 {"psr.bn", ((valueT) 1) << 44},
438 };
439
542d6675 440/* indirect register-sets/memory: */
800eeca4
JW		 441
442static const struct
443 {
444 const char *name;
445 int regnum;
446 }
447indirect_reg[] =
448 {
449 { "CPUID", IND_CPUID },
450 { "cpuid", IND_CPUID },
451 { "dbr", IND_DBR },
452 { "dtr", IND_DTR },
453 { "itr", IND_ITR },
454 { "ibr", IND_IBR },
455 { "msr", IND_MSR },
456 { "pkr", IND_PKR },
457 { "pmc", IND_PMC },
458 { "pmd", IND_PMD },
459 { "rr", IND_RR },
460 };
461
462/* Pseudo functions used to indicate relocation types (these functions
463 start with an at sign (@). */
464static struct
465 {
466 const char *name;
467 enum pseudo_type
468 {
469 PSEUDO_FUNC_NONE,
470 PSEUDO_FUNC_RELOC,
471 PSEUDO_FUNC_CONST,
e0c9811a 472 PSEUDO_FUNC_REG,
800eeca4
JW		 473 PSEUDO_FUNC_FLOAT
474 }
475 type;
476 union
477 {
478 unsigned long ival;
479 symbolS *sym;
480 }
481 u;
482 }
483pseudo_func[] =
484 {
542d6675 485 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 486 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
487 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 488 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
489 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
490 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 491 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 492 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
493 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
494 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
495 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 496 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 497 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
498 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
13ae64f3
JJ		 499 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
500 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
501 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 502 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 503
542d6675 504 /* mbtype4 constants: */
800eeca4
JW		 505 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
506 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
507 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
508 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
509 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
510
542d6675 511 /* fclass constants: */
bf3ca999 512 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 513 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
514 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
515 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
516 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
517 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
518 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
519 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
520 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 521
522 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 523
c10d9d8f
JW		 524 /* hint constants: */
525 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
526
542d6675 527 /* unwind-related constants: */
041340ad
JW		 528 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
529 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
530 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
531 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
532 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
533 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
534 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 535
542d6675 536 /* unwind-related registers: */
e0c9811a 537 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 538 };
539
542d6675 540/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 541static const bfd_vma nop[IA64_NUM_UNITS] =
542 {
543 0x0000000000LL, /* NIL => break 0 */
544 0x0008000000LL, /* I-unit nop */
545 0x0008000000LL, /* M-unit nop */
546 0x4000000000LL, /* B-unit nop */
547 0x0008000000LL, /* F-unit nop */
548 0x0008000000LL, /* L-"unit" nop */
549 0x0008000000LL, /* X-unit nop */
550 };
551
552/* Can't be `const' as it's passed to input routines (which have the
553 habit of setting temporary sentinels. */
554static char special_section_name[][20] =
555 {
556 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 557 {".IA_64.unwind"}, {".IA_64.unwind_info"},
558 {".init_array"}, {".fini_array"}
800eeca4
JW		 559 };
560
561/* The best template for a particular sequence of up to three
562 instructions: */
563#define N IA64_NUM_TYPES
564static unsigned char best_template[N][N][N];
565#undef N
566
567/* Resource dependencies currently in effect */
568static struct rsrc {
569 int depind; /* dependency index */
570 const struct ia64_dependency *dependency; /* actual dependency */
571 unsigned specific:1, /* is this a specific bit/regno? */
572 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
573 int index; /* specific regno/bit within dependency */
574 int note; /* optional qualifying note (0 if none) */
575#define STATE_NONE 0
576#define STATE_STOP 1
577#define STATE_SRLZ 2
578 int insn_srlz; /* current insn serialization state */
579 int data_srlz; /* current data serialization state */
580 int qp_regno; /* qualifying predicate for this usage */
581 char *file; /* what file marked this dependency */
2434f565 582 unsigned int line; /* what line marked this dependency */
800eeca4 583 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 584 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 585 int path; /* corresponding code entry index */
586} *regdeps = NULL;
587static int regdepslen = 0;
588static int regdepstotlen = 0;
589static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
590static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 591 "data", "instr", "specific", "stop", "other" };
7484b8e6 592static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 593
594/* Current state of PR mutexation */
595static struct qpmutex {
596 valueT prmask;
597 int path;
598} *qp_mutexes = NULL; /* QP mutex bitmasks */
599static int qp_mutexeslen = 0;
600static int qp_mutexestotlen = 0;
197865e8 601static valueT qp_safe_across_calls = 0;
800eeca4
JW		 602
603/* Current state of PR implications */
604static struct qp_imply {
605 unsigned p1:6;
606 unsigned p2:6;
607 unsigned p2_branched:1;
608 int path;
609} *qp_implies = NULL;
610static int qp_implieslen = 0;
611static int qp_impliestotlen = 0;
612
197865e8
KH		 613/* Keep track of static GR values so that indirect register usage can
614 sometimes be tracked. */
800eeca4
JW		 615static struct gr {
616 unsigned known:1;
617 int path;
618 valueT value;
2434f565 619} gr_values[128] = {{ 1, 0, 0 }};
800eeca4 620
9545c4ce
L		 621/* Remember the alignment frag. */
622static fragS *align_frag;
623
800eeca4
JW		 624/* These are the routines required to output the various types of
625 unwind records. */
626
f5a30c2e
JW		 627/* A slot_number is a frag address plus the slot index (0-2). We use the
628 frag address here so that if there is a section switch in the middle of
629 a function, then instructions emitted to a different section are not
630 counted. Since there may be more than one frag for a function, this
631 means we also need to keep track of which frag this address belongs to
632 so we can compute inter-frag distances. This also nicely solves the
633 problem with nops emitted for align directives, which can't easily be
634 counted, but can easily be derived from frag sizes. */
635
800eeca4
JW		 636typedef struct unw_rec_list {
637 unwind_record r;
e0c9811a 638 unsigned long slot_number;
f5a30c2e 639 fragS *slot_frag;
73f20958
L		 640 unsigned long next_slot_number;
641 fragS *next_slot_frag;
800eeca4
JW		 642 struct unw_rec_list *next;
643} unw_rec_list;
644
2434f565 645#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 646
6290819d
NC		 647/* Linked list of saved prologue counts. A very poor
648 implementation of a map from label numbers to prologue counts. */
649typedef struct label_prologue_count
650{
651 struct label_prologue_count *next;
652 unsigned long label_number;
653 unsigned int prologue_count;
654} label_prologue_count;
655
e0c9811a
JW		 656static struct
657{
e0c9811a
JW		 658 /* Maintain a list of unwind entries for the current function. */
659 unw_rec_list *list;
660 unw_rec_list *tail;
800eeca4 661
e0c9811a
JW		 662 /* Any unwind entires that should be attached to the current slot
663 that an insn is being constructed for. */
664 unw_rec_list *current_entry;
800eeca4 665
e0c9811a
JW		 666 /* These are used to create the unwind table entry for this function. */
667 symbolS *proc_start;
e0c9811a
JW		 668 symbolS *info; /* pointer to unwind info */
669 symbolS *personality_routine;
91a2ae2a
RH		 670 segT saved_text_seg;
671 subsegT saved_text_subseg;
672 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 673
e0c9811a 674 /* TRUE if processing unwind directives in a prologue region. */
75e09913
JB		 675 unsigned int prologue : 1;
676 unsigned int prologue_mask : 4;
677 unsigned int body : 1;
678 unsigned int insn : 1;
33d01f33 679 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 680 /* Prologue counts at previous .label_state directives. */
681 struct label_prologue_count * saved_prologue_counts;
e0c9811a 682} unwind;
800eeca4 683
9f9a069e
JW		 684/* The input value is a negated offset from psp, and specifies an address
685 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
686 must add 16 and divide by 4 to get the encoded value. */
687
688#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
689
800eeca4
JW		 690typedef void (*vbyte_func) PARAMS ((int, char *, char *));
691
0234cb7c 692/* Forward declarations: */
800eeca4
JW		 693static void set_section PARAMS ((char *name));
694static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
695 unsigned int, unsigned int));
d9201763 696static void dot_align (int);
800eeca4
JW		 697static void dot_radix PARAMS ((int));
698static void dot_special_section PARAMS ((int));
699static void dot_proc PARAMS ((int));
700static void dot_fframe PARAMS ((int));
701static void dot_vframe PARAMS ((int));
150f24a2
JW		 702static void dot_vframesp PARAMS ((int));
703static void dot_vframepsp PARAMS ((int));
800eeca4
JW		 704static void dot_save PARAMS ((int));
705static void dot_restore PARAMS ((int));
150f24a2
JW		 706static void dot_restorereg PARAMS ((int));
707static void dot_restorereg_p PARAMS ((int));
800eeca4
JW		 708static void dot_handlerdata PARAMS ((int));
709static void dot_unwentry PARAMS ((int));
710static void dot_altrp PARAMS ((int));
e0c9811a 711static void dot_savemem PARAMS ((int));
800eeca4
JW		 712static void dot_saveg PARAMS ((int));
713static void dot_savef PARAMS ((int));
714static void dot_saveb PARAMS ((int));
715static void dot_savegf PARAMS ((int));
716static void dot_spill PARAMS ((int));
150f24a2
JW		 717static void dot_spillreg PARAMS ((int));
718static void dot_spillmem PARAMS ((int));
719static void dot_spillreg_p PARAMS ((int));
720static void dot_spillmem_p PARAMS ((int));
721static void dot_label_state PARAMS ((int));
722static void dot_copy_state PARAMS ((int));
800eeca4
JW		 723static void dot_unwabi PARAMS ((int));
724static void dot_personality PARAMS ((int));
725static void dot_body PARAMS ((int));
726static void dot_prologue PARAMS ((int));
727static void dot_endp PARAMS ((int));
728static void dot_template PARAMS ((int));
729static void dot_regstk PARAMS ((int));
730static void dot_rot PARAMS ((int));
731static void dot_byteorder PARAMS ((int));
732static void dot_psr PARAMS ((int));
733static void dot_alias PARAMS ((int));
734static void dot_ln PARAMS ((int));
735static char *parse_section_name PARAMS ((void));
736static void dot_xdata PARAMS ((int));
737static void stmt_float_cons PARAMS ((int));
738static void stmt_cons_ua PARAMS ((int));
739static void dot_xfloat_cons PARAMS ((int));
740static void dot_xstringer PARAMS ((int));
741static void dot_xdata_ua PARAMS ((int));
742static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 743static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 744static void dot_pred_rel PARAMS ((int));
745static void dot_reg_val PARAMS ((int));
5e819f9c 746static void dot_serialize PARAMS ((int));
800eeca4
JW		 747static void dot_dv_mode PARAMS ((int));
748static void dot_entry PARAMS ((int));
749static void dot_mem_offset PARAMS ((int));
e0c9811a 750static void add_unwind_entry PARAMS((unw_rec_list *ptr));
542d6675 751static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 752static void declare_register_set PARAMS ((const char *, int, int));
753static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 754static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
755 int index,
756 expressionS *e));
800eeca4
JW		 757static int parse_operand PARAMS ((expressionS *e));
758static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
759static void build_insn PARAMS ((struct slot *, bfd_vma *));
760static void emit_one_bundle PARAMS ((void));
761static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 762static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 763 bfd_reloc_code_real_type r_type));
764static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 765static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
766 struct rsrc *, int depind, int path));
800eeca4
JW		 767static void add_qp_mutex PARAMS((valueT mask));
768static void add_qp_imply PARAMS((int p1, int p2));
769static void clear_qp_branch_flag PARAMS((valueT mask));
770static void clear_qp_mutex PARAMS((valueT mask));
771static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 772static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 773static void clear_register_values PARAMS ((void));
774static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 775static void instruction_serialization PARAMS ((void));
776static void data_serialization PARAMS ((void));
777static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 778static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 779static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 780static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 781static int depends_on PARAMS ((int, struct ia64_opcode *));
782static int specify_resource PARAMS ((const struct ia64_dependency *,
783 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 784static int check_dv PARAMS((struct ia64_opcode *idesc));
785static void check_dependencies PARAMS((struct ia64_opcode *));
786static void mark_resources PARAMS((struct ia64_opcode *));
787static void update_dependencies PARAMS((struct ia64_opcode *));
788static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 789static int qp_mutex PARAMS ((int, int, int));
790static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
791static void output_vbyte_mem PARAMS ((int, char *, char *));
792static void count_output PARAMS ((int, char *, char *));
793static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
794static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 795static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 796static void output_P1_format PARAMS ((vbyte_func, int));
797static void output_P2_format PARAMS ((vbyte_func, int, int));
798static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
799static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
800static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
801static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
802static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
803static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
804static void output_P9_format PARAMS ((vbyte_func, int, int));
805static void output_P10_format PARAMS ((vbyte_func, int, int));
806static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
807static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 808static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
809static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 810static char format_ab_reg PARAMS ((int, int));
811static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
812 unsigned long));
813static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
814static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
815 unsigned long));
816static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 817static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 818static unw_rec_list *output_prologue PARAMS ((void));
819static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
820static unw_rec_list *output_body PARAMS ((void));
821static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
822static unw_rec_list *output_mem_stack_v PARAMS ((void));
823static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
824static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
825static unw_rec_list *output_rp_when PARAMS ((void));
826static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
827static unw_rec_list *output_rp_br PARAMS ((unsigned int));
828static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
829static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
830static unw_rec_list *output_pfs_when PARAMS ((void));
831static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
832static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
833static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
834static unw_rec_list *output_preds_when PARAMS ((void));
835static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
836static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
837static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
838static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
839static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
840static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
841static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
842static unw_rec_list *output_br_mem PARAMS ((unsigned int));
843static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
844static unw_rec_list *output_spill_base PARAMS ((unsigned int));
845static unw_rec_list *output_unat_when PARAMS ((void));
846static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
847static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
848static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
849static unw_rec_list *output_lc_when PARAMS ((void));
850static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
851static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
852static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
853static unw_rec_list *output_fpsr_when PARAMS ((void));
854static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
855static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
856static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
857static unw_rec_list *output_priunat_when_gr PARAMS ((void));
858static unw_rec_list *output_priunat_when_mem PARAMS ((void));
859static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
860static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
861static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
862static unw_rec_list *output_bsp_when PARAMS ((void));
863static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
864static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
865static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
866static unw_rec_list *output_bspstore_when PARAMS ((void));
867static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
868static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
869static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
870static unw_rec_list *output_rnat_when PARAMS ((void));
871static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
872static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
873static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
874static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
875static unw_rec_list *output_epilogue PARAMS ((unsigned long));
876static unw_rec_list *output_label_state PARAMS ((unsigned long));
877static unw_rec_list *output_copy_state PARAMS ((unsigned long));
878static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
879static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
880static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
881 unsigned int));
882static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
883 unsigned int));
884static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
885 unsigned int));
886static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
887 unsigned int, unsigned int));
888static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
889static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
890static int calc_record_size PARAMS ((unw_rec_list *));
891static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 892static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 893 unsigned long, fragS *,
894 int));
91a2ae2a 895static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 896static void fixup_unw_records PARAMS ((unw_rec_list *, int));
150f24a2
JW		 897static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
898static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
6290819d
NC		 899static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
900static void save_prologue_count PARAMS ((unsigned long, unsigned int));
901static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 902
652ca075 903/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 904 unit (as opposed to the memory unit). */
905static int
652ca075 906ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 907{
908 reg -= REG_AR;
652ca075
L		 909 return reg >= 64 && reg <= 111;
910}
800eeca4 911
652ca075
L		 912/* Determine if application register REGNUM resides only in the memory
913 unit (as opposed to the integer unit). */
914static int
915ar_is_only_in_memory_unit (int reg)
916{
917 reg -= REG_AR;
918 return reg >= 0 && reg <= 47;
800eeca4
JW		 919}
920
921/* Switch to section NAME and create section if necessary. It's
922 rather ugly that we have to manipulate input_line_pointer but I
923 don't see any other way to accomplish the same thing without
924 changing obj-elf.c (which may be the Right Thing, in the end). */
925static void
926set_section (name)
927 char *name;
928{
929 char *saved_input_line_pointer;
930
931 saved_input_line_pointer = input_line_pointer;
932 input_line_pointer = name;
933 obj_elf_section (0);
934 input_line_pointer = saved_input_line_pointer;
935}
936
d61a78a7
RH		 937/* Map 's' to SHF_IA_64_SHORT. */
938
939int
940ia64_elf_section_letter (letter, ptr_msg)
941 int letter;
942 char **ptr_msg;
943{
944 if (letter == 's')
945 return SHF_IA_64_SHORT;
711ef82f
L		 946 else if (letter == 'o')
947 return SHF_LINK_ORDER;
d61a78a7 948
711ef82f
L		 949 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
950 return -1;
d61a78a7
RH		 951}
952
800eeca4
JW		 953/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
954
955flagword
956ia64_elf_section_flags (flags, attr, type)
957 flagword flags;
2434f565 958 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 959{
960 if (attr & SHF_IA_64_SHORT)
961 flags |= SEC_SMALL_DATA;
962 return flags;
963}
964
91a2ae2a
RH		 965int
966ia64_elf_section_type (str, len)
40449e9f
KH		 967 const char *str;
968 size_t len;
91a2ae2a 969{
1cd8ff38 970#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 971
1cd8ff38 972 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 973 return SHT_PROGBITS;
974
1cd8ff38 975 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 976 return SHT_PROGBITS;
977
1cd8ff38 978 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 979 return SHT_IA_64_UNWIND;
980
1cd8ff38 981 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 982 return SHT_IA_64_UNWIND;
983
711ef82f
L		 984 if (STREQ ("unwind"))
985 return SHT_IA_64_UNWIND;
986
91a2ae2a 987 return -1;
1cd8ff38 988#undef STREQ
91a2ae2a
RH		 989}
990
800eeca4
JW		 991static unsigned int
992set_regstack (ins, locs, outs, rots)
993 unsigned int ins, locs, outs, rots;
994{
542d6675
KH		 995 /* Size of frame. */
996 unsigned int sof;
800eeca4
JW		 997
998 sof = ins + locs + outs;
999 if (sof > 96)
1000 {
1001 as_bad ("Size of frame exceeds maximum of 96 registers");
1002 return 0;
1003 }
1004 if (rots > sof)
1005 {
1006 as_warn ("Size of rotating registers exceeds frame size");
1007 return 0;
1008 }
1009 md.in.base = REG_GR + 32;
1010 md.loc.base = md.in.base + ins;
1011 md.out.base = md.loc.base + locs;
1012
1013 md.in.num_regs = ins;
1014 md.loc.num_regs = locs;
1015 md.out.num_regs = outs;
1016 md.rot.num_regs = rots;
1017 return sof;
1018}
1019
1020void
1021ia64_flush_insns ()
1022{
1023 struct label_fix *lfix;
1024 segT saved_seg;
1025 subsegT saved_subseg;
b44b1b85 1026 unw_rec_list *ptr;
800eeca4
JW		 1027
1028 if (!md.last_text_seg)
1029 return;
1030
1031 saved_seg = now_seg;
1032 saved_subseg = now_subseg;
1033
1034 subseg_set (md.last_text_seg, 0);
1035
1036 while (md.num_slots_in_use > 0)
1037 emit_one_bundle (); /* force out queued instructions */
1038
1039 /* In case there are labels following the last instruction, resolve
542d6675 1040 those now: */
800eeca4
JW		 1041 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1042 {
1043 S_SET_VALUE (lfix->sym, frag_now_fix ());
1044 symbol_set_frag (lfix->sym, frag_now);
1045 }
1046 CURR_SLOT.label_fixups = 0;
f1bcba5b
JW		 1047 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1048 {
1049 S_SET_VALUE (lfix->sym, frag_now_fix ());
1050 symbol_set_frag (lfix->sym, frag_now);
1051 }
1052 CURR_SLOT.tag_fixups = 0;
800eeca4 1053
b44b1b85 1054 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1055 resolve those now. We only handle prologue, body, and endp directives
1056 here. Give an error for others. */
b44b1b85
JW		 1057 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1058 {
9c59842f 1059 switch (ptr->r.type)
b44b1b85 1060 {
9c59842f
JW		 1061 case prologue:
1062 case prologue_gr:
1063 case body:
1064 case endp:
b44b1b85
JW		 1065 ptr->slot_number = (unsigned long) frag_more (0);
1066 ptr->slot_frag = frag_now;
9c59842f
JW		 1067 break;
1068
1069 /* Allow any record which doesn't have a "t" field (i.e.,
1070 doesn't relate to a particular instruction). */
1071 case unwabi:
1072 case br_gr:
1073 case copy_state:
1074 case fr_mem:
1075 case frgr_mem:
1076 case gr_gr:
1077 case gr_mem:
1078 case label_state:
1079 case rp_br:
1080 case spill_base:
1081 case spill_mask:
1082 /* nothing */
1083 break;
1084
1085 default:
1086 as_bad (_("Unwind directive not followed by an instruction."));
1087 break;
b44b1b85 1088 }
b44b1b85
JW		 1089 }
1090 unwind.current_entry = NULL;
1091
800eeca4 1092 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1093
1094 if (md.qp.X_op == O_register)
1095 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1096}
1097
d9201763
L		 1098static void
1099ia64_do_align (int nbytes)
800eeca4
JW		 1100{
1101 char *saved_input_line_pointer = input_line_pointer;
1102
1103 input_line_pointer = "";
1104 s_align_bytes (nbytes);
1105 input_line_pointer = saved_input_line_pointer;
1106}
1107
1108void
1109ia64_cons_align (nbytes)
1110 int nbytes;
1111{
1112 if (md.auto_align)
1113 {
1114 char *saved_input_line_pointer = input_line_pointer;
1115 input_line_pointer = "";
1116 s_align_bytes (nbytes);
1117 input_line_pointer = saved_input_line_pointer;
1118 }
1119}
1120
1121/* Output COUNT bytes to a memory location. */
1122static unsigned char *vbyte_mem_ptr = NULL;
1123
197865e8 1124void
800eeca4
JW		 1125output_vbyte_mem (count, ptr, comment)
1126 int count;
1127 char *ptr;
2434f565 1128 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1129{
1130 int x;
1131 if (vbyte_mem_ptr == NULL)
1132 abort ();
1133
1134 if (count == 0)
1135 return;
1136 for (x = 0; x < count; x++)
1137 *(vbyte_mem_ptr++) = ptr[x];
1138}
1139
1140/* Count the number of bytes required for records. */
1141static int vbyte_count = 0;
197865e8 1142void
800eeca4
JW		 1143count_output (count, ptr, comment)
1144 int count;
2434f565
JW		 1145 char *ptr ATTRIBUTE_UNUSED;
1146 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1147{
1148 vbyte_count += count;
1149}
1150
1151static void
1152output_R1_format (f, rtype, rlen)
1153 vbyte_func f;
1154 unw_record_type rtype;
1155 int rlen;
1156{
e0c9811a 1157 int r = 0;
800eeca4
JW		 1158 char byte;
1159 if (rlen > 0x1f)
1160 {
1161 output_R3_format (f, rtype, rlen);
1162 return;
1163 }
197865e8 1164
e0c9811a
JW		 1165 if (rtype == body)
1166 r = 1;
1167 else if (rtype != prologue)
1168 as_bad ("record type is not valid");
1169
800eeca4
JW		 1170 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1171 (*f) (1, &byte, NULL);
1172}
1173
1174static void
1175output_R2_format (f, mask, grsave, rlen)
1176 vbyte_func f;
1177 int mask, grsave;
1178 unsigned long rlen;
1179{
1180 char bytes[20];
1181 int count = 2;
1182 mask = (mask & 0x0f);
1183 grsave = (grsave & 0x7f);
1184
1185 bytes[0] = (UNW_R2 | (mask >> 1));
1186 bytes[1] = (((mask & 0x01) << 7) | grsave);
1187 count += output_leb128 (bytes + 2, rlen, 0);
1188 (*f) (count, bytes, NULL);
1189}
1190
1191static void
1192output_R3_format (f, rtype, rlen)
1193 vbyte_func f;
1194 unw_record_type rtype;
1195 unsigned long rlen;
1196{
e0c9811a 1197 int r = 0, count;
800eeca4
JW		 1198 char bytes[20];
1199 if (rlen <= 0x1f)
1200 {
1201 output_R1_format (f, rtype, rlen);
1202 return;
1203 }
197865e8 1204
e0c9811a
JW		 1205 if (rtype == body)
1206 r = 1;
1207 else if (rtype != prologue)
1208 as_bad ("record type is not valid");
800eeca4
JW		 1209 bytes[0] = (UNW_R3 | r);
1210 count = output_leb128 (bytes + 1, rlen, 0);
1211 (*f) (count + 1, bytes, NULL);
1212}
1213
1214static void
1215output_P1_format (f, brmask)
1216 vbyte_func f;
1217 int brmask;
1218{
1219 char byte;
1220 byte = UNW_P1 | (brmask & 0x1f);
1221 (*f) (1, &byte, NULL);
1222}
1223
1224static void
1225output_P2_format (f, brmask, gr)
1226 vbyte_func f;
1227 int brmask;
1228 int gr;
1229{
1230 char bytes[2];
1231 brmask = (brmask & 0x1f);
1232 bytes[0] = UNW_P2 | (brmask >> 1);
1233 bytes[1] = (((brmask & 1) << 7) | gr);
1234 (*f) (2, bytes, NULL);
1235}
1236
1237static void
1238output_P3_format (f, rtype, reg)
1239 vbyte_func f;
1240 unw_record_type rtype;
1241 int reg;
1242{
1243 char bytes[2];
e0c9811a 1244 int r = 0;
800eeca4
JW		 1245 reg = (reg & 0x7f);
1246 switch (rtype)
542d6675 1247 {
800eeca4
JW		 1248 case psp_gr:
1249 r = 0;
1250 break;
1251 case rp_gr:
1252 r = 1;
1253 break;
1254 case pfs_gr:
1255 r = 2;
1256 break;
1257 case preds_gr:
1258 r = 3;
1259 break;
1260 case unat_gr:
1261 r = 4;
1262 break;
1263 case lc_gr:
1264 r = 5;
1265 break;
1266 case rp_br:
1267 r = 6;
1268 break;
1269 case rnat_gr:
1270 r = 7;
1271 break;
1272 case bsp_gr:
1273 r = 8;
1274 break;
1275 case bspstore_gr:
1276 r = 9;
1277 break;
1278 case fpsr_gr:
1279 r = 10;
1280 break;
1281 case priunat_gr:
1282 r = 11;
1283 break;
1284 default:
1285 as_bad ("Invalid record type for P3 format.");
542d6675 1286 }
800eeca4
JW		 1287 bytes[0] = (UNW_P3 | (r >> 1));
1288 bytes[1] = (((r & 1) << 7) | reg);
1289 (*f) (2, bytes, NULL);
1290}
1291
800eeca4 1292static void
e0c9811a 1293output_P4_format (f, imask, imask_size)
800eeca4 1294 vbyte_func f;
e0c9811a
JW		 1295 unsigned char *imask;
1296 unsigned long imask_size;
800eeca4 1297{
e0c9811a
JW		 1298 imask[0] = UNW_P4;
1299 (*f) (imask_size, imask, NULL);
800eeca4
JW		 1300}
1301
1302static void
1303output_P5_format (f, grmask, frmask)
1304 vbyte_func f;
1305 int grmask;
1306 unsigned long frmask;
1307{
1308 char bytes[4];
1309 grmask = (grmask & 0x0f);
1310
1311 bytes[0] = UNW_P5;
1312 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1313 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1314 bytes[3] = (frmask & 0x000000ff);
1315 (*f) (4, bytes, NULL);
1316}
1317
1318static void
1319output_P6_format (f, rtype, rmask)
1320 vbyte_func f;
1321 unw_record_type rtype;
1322 int rmask;
1323{
1324 char byte;
e0c9811a 1325 int r = 0;
197865e8 1326
e0c9811a
JW		 1327 if (rtype == gr_mem)
1328 r = 1;
1329 else if (rtype != fr_mem)
1330 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1331 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1332 (*f) (1, &byte, NULL);
1333}
1334
1335static void
1336output_P7_format (f, rtype, w1, w2)
1337 vbyte_func f;
1338 unw_record_type rtype;
1339 unsigned long w1;
1340 unsigned long w2;
1341{
1342 char bytes[20];
1343 int count = 1;
e0c9811a 1344 int r = 0;
800eeca4
JW		 1345 count += output_leb128 (bytes + 1, w1, 0);
1346 switch (rtype)
1347 {
542d6675
KH		 1348 case mem_stack_f:
1349 r = 0;
1350 count += output_leb128 (bytes + count, w2 >> 4, 0);
1351 break;
1352 case mem_stack_v:
1353 r = 1;
1354 break;
1355 case spill_base:
1356 r = 2;
1357 break;
1358 case psp_sprel:
1359 r = 3;
1360 break;
1361 case rp_when:
1362 r = 4;
1363 break;
1364 case rp_psprel:
1365 r = 5;
1366 break;
1367 case pfs_when:
1368 r = 6;
1369 break;
1370 case pfs_psprel:
1371 r = 7;
1372 break;
1373 case preds_when:
1374 r = 8;
1375 break;
1376 case preds_psprel:
1377 r = 9;
1378 break;
1379 case lc_when:
1380 r = 10;
1381 break;
1382 case lc_psprel:
1383 r = 11;
1384 break;
1385 case unat_when:
1386 r = 12;
1387 break;
1388 case unat_psprel:
1389 r = 13;
1390 break;
1391 case fpsr_when:
1392 r = 14;
1393 break;
1394 case fpsr_psprel:
1395 r = 15;
1396 break;
1397 default:
1398 break;
800eeca4
JW		 1399 }
1400 bytes[0] = (UNW_P7 | r);
1401 (*f) (count, bytes, NULL);
1402}
1403
1404static void
1405output_P8_format (f, rtype, t)
1406 vbyte_func f;
1407 unw_record_type rtype;
1408 unsigned long t;
1409{
1410 char bytes[20];
e0c9811a 1411 int r = 0;
800eeca4
JW		 1412 int count = 2;
1413 bytes[0] = UNW_P8;
1414 switch (rtype)
1415 {
542d6675
KH		 1416 case rp_sprel:
1417 r = 1;
1418 break;
1419 case pfs_sprel:
1420 r = 2;
1421 break;
1422 case preds_sprel:
1423 r = 3;
1424 break;
1425 case lc_sprel:
1426 r = 4;
1427 break;
1428 case unat_sprel:
1429 r = 5;
1430 break;
1431 case fpsr_sprel:
1432 r = 6;
1433 break;
1434 case bsp_when:
1435 r = 7;
1436 break;
1437 case bsp_psprel:
1438 r = 8;
1439 break;
1440 case bsp_sprel:
1441 r = 9;
1442 break;
1443 case bspstore_when:
1444 r = 10;
1445 break;
1446 case bspstore_psprel:
1447 r = 11;
1448 break;
1449 case bspstore_sprel:
1450 r = 12;
1451 break;
1452 case rnat_when:
1453 r = 13;
1454 break;
1455 case rnat_psprel:
1456 r = 14;
1457 break;
1458 case rnat_sprel:
1459 r = 15;
1460 break;
1461 case priunat_when_gr:
1462 r = 16;
1463 break;
1464 case priunat_psprel:
1465 r = 17;
1466 break;
1467 case priunat_sprel:
1468 r = 18;
1469 break;
1470 case priunat_when_mem:
1471 r = 19;
1472 break;
1473 default:
1474 break;
800eeca4
JW		 1475 }
1476 bytes[1] = r;
1477 count += output_leb128 (bytes + 2, t, 0);
1478 (*f) (count, bytes, NULL);
1479}
1480
1481static void
1482output_P9_format (f, grmask, gr)
1483 vbyte_func f;
1484 int grmask;
1485 int gr;
1486{
1487 char bytes[3];
1488 bytes[0] = UNW_P9;
1489 bytes[1] = (grmask & 0x0f);
1490 bytes[2] = (gr & 0x7f);
1491 (*f) (3, bytes, NULL);
1492}
1493
1494static void
1495output_P10_format (f, abi, context)
1496 vbyte_func f;
1497 int abi;
1498 int context;
1499{
1500 char bytes[3];
1501 bytes[0] = UNW_P10;
1502 bytes[1] = (abi & 0xff);
1503 bytes[2] = (context & 0xff);
1504 (*f) (3, bytes, NULL);
1505}
1506
1507static void
1508output_B1_format (f, rtype, label)
1509 vbyte_func f;
1510 unw_record_type rtype;
1511 unsigned long label;
1512{
1513 char byte;
e0c9811a 1514 int r = 0;
197865e8 1515 if (label > 0x1f)
800eeca4
JW		 1516 {
1517 output_B4_format (f, rtype, label);
1518 return;
1519 }
e0c9811a
JW		 1520 if (rtype == copy_state)
1521 r = 1;
1522 else if (rtype != label_state)
1523 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1524
1525 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1526 (*f) (1, &byte, NULL);
1527}
1528
1529static void
1530output_B2_format (f, ecount, t)
1531 vbyte_func f;
1532 unsigned long ecount;
1533 unsigned long t;
1534{
1535 char bytes[20];
1536 int count = 1;
1537 if (ecount > 0x1f)
1538 {
1539 output_B3_format (f, ecount, t);
1540 return;
1541 }
1542 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1543 count += output_leb128 (bytes + 1, t, 0);
1544 (*f) (count, bytes, NULL);
1545}
1546
1547static void
1548output_B3_format (f, ecount, t)
1549 vbyte_func f;
1550 unsigned long ecount;
1551 unsigned long t;
1552{
1553 char bytes[20];
1554 int count = 1;
1555 if (ecount <= 0x1f)
1556 {
1557 output_B2_format (f, ecount, t);
1558 return;
1559 }
1560 bytes[0] = UNW_B3;
1561 count += output_leb128 (bytes + 1, t, 0);
1562 count += output_leb128 (bytes + count, ecount, 0);
1563 (*f) (count, bytes, NULL);
1564}
1565
1566static void
1567output_B4_format (f, rtype, label)
1568 vbyte_func f;
1569 unw_record_type rtype;
1570 unsigned long label;
1571{
1572 char bytes[20];
e0c9811a 1573 int r = 0;
800eeca4 1574 int count = 1;
197865e8 1575 if (label <= 0x1f)
800eeca4
JW		 1576 {
1577 output_B1_format (f, rtype, label);
1578 return;
1579 }
197865e8 1580
e0c9811a
JW		 1581 if (rtype == copy_state)
1582 r = 1;
1583 else if (rtype != label_state)
1584 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1585
1586 bytes[0] = (UNW_B4 | (r << 3));
1587 count += output_leb128 (bytes + 1, label, 0);
1588 (*f) (count, bytes, NULL);
1589}
1590
1591static char
e0c9811a 1592format_ab_reg (ab, reg)
542d6675
KH		 1593 int ab;
1594 int reg;
800eeca4
JW		 1595{
1596 int ret;
e0c9811a 1597 ab = (ab & 3);
800eeca4 1598 reg = (reg & 0x1f);
e0c9811a 1599 ret = (ab << 5) | reg;
800eeca4
JW		 1600 return ret;
1601}
1602
1603static void
e0c9811a 1604output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1605 vbyte_func f;
1606 unw_record_type rtype;
e0c9811a 1607 int ab, reg;
800eeca4
JW		 1608 unsigned long t;
1609 unsigned long w1;
1610{
1611 char bytes[20];
e0c9811a 1612 int r = 0;
800eeca4
JW		 1613 int count = 2;
1614 bytes[0] = UNW_X1;
197865e8 1615
e0c9811a
JW		 1616 if (rtype == spill_sprel)
1617 r = 1;
1618 else if (rtype != spill_psprel)
1619 as_bad ("Invalid record type for format X1");
1620 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1621 count += output_leb128 (bytes + 2, t, 0);
1622 count += output_leb128 (bytes + count, w1, 0);
1623 (*f) (count, bytes, NULL);
1624}
1625
1626static void
e0c9811a 1627output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1628 vbyte_func f;
e0c9811a 1629 int ab, reg;
800eeca4
JW		 1630 int x, y, treg;
1631 unsigned long t;
1632{
1633 char bytes[20];
800eeca4
JW		 1634 int count = 3;
1635 bytes[0] = UNW_X2;
e0c9811a 1636 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1637 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1638 count += output_leb128 (bytes + 3, t, 0);
1639 (*f) (count, bytes, NULL);
1640}
1641
1642static void
e0c9811a 1643output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1644 vbyte_func f;
1645 unw_record_type rtype;
1646 int qp;
e0c9811a 1647 int ab, reg;
800eeca4
JW		 1648 unsigned long t;
1649 unsigned long w1;
1650{
1651 char bytes[20];
e0c9811a 1652 int r = 0;
800eeca4 1653 int count = 3;
e0c9811a
JW		 1654 bytes[0] = UNW_X3;
1655
1656 if (rtype == spill_sprel_p)
1657 r = 1;
1658 else if (rtype != spill_psprel_p)
1659 as_bad ("Invalid record type for format X3");
800eeca4 1660 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1661 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1662 count += output_leb128 (bytes + 3, t, 0);
1663 count += output_leb128 (bytes + count, w1, 0);
1664 (*f) (count, bytes, NULL);
1665}
1666
1667static void
e0c9811a 1668output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1669 vbyte_func f;
1670 int qp;
e0c9811a 1671 int ab, reg;
800eeca4
JW		 1672 int x, y, treg;
1673 unsigned long t;
1674{
1675 char bytes[20];
800eeca4 1676 int count = 4;
e0c9811a 1677 bytes[0] = UNW_X4;
800eeca4 1678 bytes[1] = (qp & 0x3f);
e0c9811a 1679 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1680 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1681 count += output_leb128 (bytes + 4, t, 0);
1682 (*f) (count, bytes, NULL);
1683}
1684
1685/* This function allocates a record list structure, and initializes fields. */
542d6675 1686
800eeca4 1687static unw_rec_list *
197865e8 1688alloc_record (unw_record_type t)
800eeca4
JW		 1689{
1690 unw_rec_list *ptr;
1691 ptr = xmalloc (sizeof (*ptr));
1692 ptr->next = NULL;
1693 ptr->slot_number = SLOT_NUM_NOT_SET;
1694 ptr->r.type = t;
73f20958
L		 1695 ptr->next_slot_number = 0;
1696 ptr->next_slot_frag = 0;
800eeca4
JW		 1697 return ptr;
1698}
1699
5738bc24
JW		 1700/* Dummy unwind record used for calculating the length of the last prologue or
1701 body region. */
1702
1703static unw_rec_list *
1704output_endp ()
1705{
1706 unw_rec_list *ptr = alloc_record (endp);
1707 return ptr;
1708}
1709
800eeca4
JW		 1710static unw_rec_list *
1711output_prologue ()
1712{
1713 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1714 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1715 return ptr;
1716}
1717
1718static unw_rec_list *
1719output_prologue_gr (saved_mask, reg)
1720 unsigned int saved_mask;
1721 unsigned int reg;
1722{
1723 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1724 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1725 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1726 ptr->r.record.r.grsave = reg;
1727 return ptr;
1728}
1729
1730static unw_rec_list *
1731output_body ()
1732{
1733 unw_rec_list *ptr = alloc_record (body);
1734 return ptr;
1735}
1736
1737static unw_rec_list *
1738output_mem_stack_f (size)
1739 unsigned int size;
1740{
1741 unw_rec_list *ptr = alloc_record (mem_stack_f);
1742 ptr->r.record.p.size = size;
1743 return ptr;
1744}
1745
1746static unw_rec_list *
1747output_mem_stack_v ()
1748{
1749 unw_rec_list *ptr = alloc_record (mem_stack_v);
1750 return ptr;
1751}
1752
1753static unw_rec_list *
1754output_psp_gr (gr)
1755 unsigned int gr;
1756{
1757 unw_rec_list *ptr = alloc_record (psp_gr);
1758 ptr->r.record.p.gr = gr;
1759 return ptr;
1760}
1761
1762static unw_rec_list *
1763output_psp_sprel (offset)
1764 unsigned int offset;
1765{
1766 unw_rec_list *ptr = alloc_record (psp_sprel);
542d6675 1767 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1768 return ptr;
1769}
1770
1771static unw_rec_list *
1772output_rp_when ()
1773{
1774 unw_rec_list *ptr = alloc_record (rp_when);
1775 return ptr;
1776}
1777
1778static unw_rec_list *
1779output_rp_gr (gr)
1780 unsigned int gr;
1781{
1782 unw_rec_list *ptr = alloc_record (rp_gr);
1783 ptr->r.record.p.gr = gr;
1784 return ptr;
1785}
1786
1787static unw_rec_list *
1788output_rp_br (br)
1789 unsigned int br;
1790{
1791 unw_rec_list *ptr = alloc_record (rp_br);
1792 ptr->r.record.p.br = br;
1793 return ptr;
1794}
1795
1796static unw_rec_list *
1797output_rp_psprel (offset)
1798 unsigned int offset;
1799{
1800 unw_rec_list *ptr = alloc_record (rp_psprel);
9f9a069e 1801 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1802 return ptr;
1803}
1804
1805static unw_rec_list *
1806output_rp_sprel (offset)
1807 unsigned int offset;
1808{
1809 unw_rec_list *ptr = alloc_record (rp_sprel);
542d6675 1810 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1811 return ptr;
1812}
1813
1814static unw_rec_list *
1815output_pfs_when ()
1816{
1817 unw_rec_list *ptr = alloc_record (pfs_when);
1818 return ptr;
1819}
1820
1821static unw_rec_list *
1822output_pfs_gr (gr)
1823 unsigned int gr;
1824{
1825 unw_rec_list *ptr = alloc_record (pfs_gr);
1826 ptr->r.record.p.gr = gr;
1827 return ptr;
1828}
1829
1830static unw_rec_list *
1831output_pfs_psprel (offset)
1832 unsigned int offset;
1833{
1834 unw_rec_list *ptr = alloc_record (pfs_psprel);
9f9a069e 1835 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1836 return ptr;
1837}
1838
1839static unw_rec_list *
1840output_pfs_sprel (offset)
1841 unsigned int offset;
1842{
1843 unw_rec_list *ptr = alloc_record (pfs_sprel);
542d6675 1844 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1845 return ptr;
1846}
1847
1848static unw_rec_list *
1849output_preds_when ()
1850{
1851 unw_rec_list *ptr = alloc_record (preds_when);
1852 return ptr;
1853}
1854
1855static unw_rec_list *
1856output_preds_gr (gr)
1857 unsigned int gr;
1858{
1859 unw_rec_list *ptr = alloc_record (preds_gr);
1860 ptr->r.record.p.gr = gr;
1861 return ptr;
1862}
1863
1864static unw_rec_list *
1865output_preds_psprel (offset)
1866 unsigned int offset;
1867{
1868 unw_rec_list *ptr = alloc_record (preds_psprel);
9f9a069e 1869 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1870 return ptr;
1871}
1872
1873static unw_rec_list *
1874output_preds_sprel (offset)
1875 unsigned int offset;
1876{
1877 unw_rec_list *ptr = alloc_record (preds_sprel);
542d6675 1878 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1879 return ptr;
1880}
1881
1882static unw_rec_list *
1883output_fr_mem (mask)
1884 unsigned int mask;
1885{
1886 unw_rec_list *ptr = alloc_record (fr_mem);
1887 ptr->r.record.p.rmask = mask;
1888 return ptr;
1889}
1890
1891static unw_rec_list *
1892output_frgr_mem (gr_mask, fr_mask)
1893 unsigned int gr_mask;
1894 unsigned int fr_mask;
1895{
1896 unw_rec_list *ptr = alloc_record (frgr_mem);
1897 ptr->r.record.p.grmask = gr_mask;
1898 ptr->r.record.p.frmask = fr_mask;
1899 return ptr;
1900}
1901
1902static unw_rec_list *
1903output_gr_gr (mask, reg)
1904 unsigned int mask;
1905 unsigned int reg;
1906{
1907 unw_rec_list *ptr = alloc_record (gr_gr);
1908 ptr->r.record.p.grmask = mask;
1909 ptr->r.record.p.gr = reg;
1910 return ptr;
1911}
1912
1913static unw_rec_list *
1914output_gr_mem (mask)
1915 unsigned int mask;
1916{
1917 unw_rec_list *ptr = alloc_record (gr_mem);
1918 ptr->r.record.p.rmask = mask;
1919 return ptr;
1920}
1921
1922static unw_rec_list *
1923output_br_mem (unsigned int mask)
1924{
1925 unw_rec_list *ptr = alloc_record (br_mem);
1926 ptr->r.record.p.brmask = mask;
1927 return ptr;
1928}
1929
1930static unw_rec_list *
1931output_br_gr (save_mask, reg)
1932 unsigned int save_mask;
1933 unsigned int reg;
1934{
1935 unw_rec_list *ptr = alloc_record (br_gr);
1936 ptr->r.record.p.brmask = save_mask;
1937 ptr->r.record.p.gr = reg;
1938 return ptr;
1939}
1940
1941static unw_rec_list *
1942output_spill_base (offset)
1943 unsigned int offset;
1944{
1945 unw_rec_list *ptr = alloc_record (spill_base);
9f9a069e 1946 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1947 return ptr;
1948}
1949
1950static unw_rec_list *
1951output_unat_when ()
1952{
1953 unw_rec_list *ptr = alloc_record (unat_when);
1954 return ptr;
1955}
1956
1957static unw_rec_list *
1958output_unat_gr (gr)
1959 unsigned int gr;
1960{
1961 unw_rec_list *ptr = alloc_record (unat_gr);
1962 ptr->r.record.p.gr = gr;
1963 return ptr;
1964}
1965
1966static unw_rec_list *
1967output_unat_psprel (offset)
1968 unsigned int offset;
1969{
1970 unw_rec_list *ptr = alloc_record (unat_psprel);
9f9a069e 1971 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1972 return ptr;
1973}
1974
1975static unw_rec_list *
1976output_unat_sprel (offset)
1977 unsigned int offset;
1978{
1979 unw_rec_list *ptr = alloc_record (unat_sprel);
542d6675 1980 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1981 return ptr;
1982}
1983
1984static unw_rec_list *
1985output_lc_when ()
1986{
1987 unw_rec_list *ptr = alloc_record (lc_when);
1988 return ptr;
1989}
1990
1991static unw_rec_list *
1992output_lc_gr (gr)
1993 unsigned int gr;
1994{
1995 unw_rec_list *ptr = alloc_record (lc_gr);
1996 ptr->r.record.p.gr = gr;
1997 return ptr;
1998}
1999
2000static unw_rec_list *
2001output_lc_psprel (offset)
2002 unsigned int offset;
2003{
2004 unw_rec_list *ptr = alloc_record (lc_psprel);
9f9a069e 2005 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2006 return ptr;
2007}
2008
2009static unw_rec_list *
2010output_lc_sprel (offset)
2011 unsigned int offset;
2012{
2013 unw_rec_list *ptr = alloc_record (lc_sprel);
542d6675 2014 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2015 return ptr;
2016}
2017
2018static unw_rec_list *
2019output_fpsr_when ()
2020{
2021 unw_rec_list *ptr = alloc_record (fpsr_when);
2022 return ptr;
2023}
2024
2025static unw_rec_list *
2026output_fpsr_gr (gr)
2027 unsigned int gr;
2028{
2029 unw_rec_list *ptr = alloc_record (fpsr_gr);
2030 ptr->r.record.p.gr = gr;
2031 return ptr;
2032}
2033
2034static unw_rec_list *
2035output_fpsr_psprel (offset)
2036 unsigned int offset;
2037{
2038 unw_rec_list *ptr = alloc_record (fpsr_psprel);
9f9a069e 2039 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2040 return ptr;
2041}
2042
2043static unw_rec_list *
2044output_fpsr_sprel (offset)
2045 unsigned int offset;
2046{
2047 unw_rec_list *ptr = alloc_record (fpsr_sprel);
542d6675 2048 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2049 return ptr;
2050}
2051
2052static unw_rec_list *
2053output_priunat_when_gr ()
2054{
2055 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2056 return ptr;
2057}
2058
2059static unw_rec_list *
2060output_priunat_when_mem ()
2061{
2062 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2063 return ptr;
2064}
2065
2066static unw_rec_list *
2067output_priunat_gr (gr)
2068 unsigned int gr;
2069{
2070 unw_rec_list *ptr = alloc_record (priunat_gr);
2071 ptr->r.record.p.gr = gr;
2072 return ptr;
2073}
2074
2075static unw_rec_list *
2076output_priunat_psprel (offset)
2077 unsigned int offset;
2078{
2079 unw_rec_list *ptr = alloc_record (priunat_psprel);
9f9a069e 2080 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2081 return ptr;
2082}
2083
2084static unw_rec_list *
2085output_priunat_sprel (offset)
2086 unsigned int offset;
2087{
2088 unw_rec_list *ptr = alloc_record (priunat_sprel);
542d6675 2089 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2090 return ptr;
2091}
2092
2093static unw_rec_list *
2094output_bsp_when ()
2095{
2096 unw_rec_list *ptr = alloc_record (bsp_when);
2097 return ptr;
2098}
2099
2100static unw_rec_list *
2101output_bsp_gr (gr)
2102 unsigned int gr;
2103{
2104 unw_rec_list *ptr = alloc_record (bsp_gr);
2105 ptr->r.record.p.gr = gr;
2106 return ptr;
2107}
2108
2109static unw_rec_list *
2110output_bsp_psprel (offset)
2111 unsigned int offset;
2112{
2113 unw_rec_list *ptr = alloc_record (bsp_psprel);
9f9a069e 2114 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2115 return ptr;
2116}
2117
2118static unw_rec_list *
2119output_bsp_sprel (offset)
2120 unsigned int offset;
2121{
2122 unw_rec_list *ptr = alloc_record (bsp_sprel);
542d6675 2123 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2124 return ptr;
2125}
2126
2127static unw_rec_list *
2128output_bspstore_when ()
2129{
2130 unw_rec_list *ptr = alloc_record (bspstore_when);
2131 return ptr;
2132}
2133
2134static unw_rec_list *
2135output_bspstore_gr (gr)
2136 unsigned int gr;
2137{
2138 unw_rec_list *ptr = alloc_record (bspstore_gr);
2139 ptr->r.record.p.gr = gr;
2140 return ptr;
2141}
2142
2143static unw_rec_list *
2144output_bspstore_psprel (offset)
2145 unsigned int offset;
2146{
2147 unw_rec_list *ptr = alloc_record (bspstore_psprel);
9f9a069e 2148 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2149 return ptr;
2150}
2151
2152static unw_rec_list *
2153output_bspstore_sprel (offset)
2154 unsigned int offset;
2155{
2156 unw_rec_list *ptr = alloc_record (bspstore_sprel);
542d6675 2157 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2158 return ptr;
2159}
2160
2161static unw_rec_list *
2162output_rnat_when ()
2163{
2164 unw_rec_list *ptr = alloc_record (rnat_when);
2165 return ptr;
2166}
2167
2168static unw_rec_list *
2169output_rnat_gr (gr)
2170 unsigned int gr;
2171{
2172 unw_rec_list *ptr = alloc_record (rnat_gr);
2173 ptr->r.record.p.gr = gr;
2174 return ptr;
2175}
2176
2177static unw_rec_list *
2178output_rnat_psprel (offset)
2179 unsigned int offset;
2180{
2181 unw_rec_list *ptr = alloc_record (rnat_psprel);
9f9a069e 2182 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2183 return ptr;
2184}
2185
2186static unw_rec_list *
2187output_rnat_sprel (offset)
2188 unsigned int offset;
2189{
2190 unw_rec_list *ptr = alloc_record (rnat_sprel);
542d6675 2191 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2192 return ptr;
2193}
2194
2195static unw_rec_list *
e0c9811a
JW		 2196output_unwabi (abi, context)
2197 unsigned long abi;
2198 unsigned long context;
800eeca4 2199{
e0c9811a
JW		 2200 unw_rec_list *ptr = alloc_record (unwabi);
2201 ptr->r.record.p.abi = abi;
2202 ptr->r.record.p.context = context;
800eeca4
JW		 2203 return ptr;
2204}
2205
2206static unw_rec_list *
e0c9811a 2207output_epilogue (unsigned long ecount)
800eeca4 2208{
e0c9811a
JW		 2209 unw_rec_list *ptr = alloc_record (epilogue);
2210 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2211 return ptr;
2212}
2213
2214static unw_rec_list *
e0c9811a 2215output_label_state (unsigned long label)
800eeca4 2216{
e0c9811a
JW		 2217 unw_rec_list *ptr = alloc_record (label_state);
2218 ptr->r.record.b.label = label;
800eeca4
JW		 2219 return ptr;
2220}
2221
2222static unw_rec_list *
e0c9811a
JW		 2223output_copy_state (unsigned long label)
2224{
2225 unw_rec_list *ptr = alloc_record (copy_state);
2226 ptr->r.record.b.label = label;
2227 return ptr;
2228}
2229
2230static unw_rec_list *
2231output_spill_psprel (ab, reg, offset)
2232 unsigned int ab;
800eeca4
JW		 2233 unsigned int reg;
2234 unsigned int offset;
2235{
2236 unw_rec_list *ptr = alloc_record (spill_psprel);
e0c9811a 2237 ptr->r.record.x.ab = ab;
800eeca4 2238 ptr->r.record.x.reg = reg;
9f9a069e 2239 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2240 return ptr;
2241}
2242
2243static unw_rec_list *
e0c9811a
JW		 2244output_spill_sprel (ab, reg, offset)
2245 unsigned int ab;
800eeca4
JW		 2246 unsigned int reg;
2247 unsigned int offset;
2248{
2249 unw_rec_list *ptr = alloc_record (spill_sprel);
e0c9811a 2250 ptr->r.record.x.ab = ab;
800eeca4 2251 ptr->r.record.x.reg = reg;
542d6675 2252 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2253 return ptr;
2254}
2255
2256static unw_rec_list *
e0c9811a
JW		 2257output_spill_psprel_p (ab, reg, offset, predicate)
2258 unsigned int ab;
800eeca4
JW		 2259 unsigned int reg;
2260 unsigned int offset;
2261 unsigned int predicate;
2262{
2263 unw_rec_list *ptr = alloc_record (spill_psprel_p);
e0c9811a 2264 ptr->r.record.x.ab = ab;
800eeca4 2265 ptr->r.record.x.reg = reg;
9f9a069e 2266 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2267 ptr->r.record.x.qp = predicate;
2268 return ptr;
2269}
2270
2271static unw_rec_list *
e0c9811a
JW		 2272output_spill_sprel_p (ab, reg, offset, predicate)
2273 unsigned int ab;
800eeca4
JW		 2274 unsigned int reg;
2275 unsigned int offset;
2276 unsigned int predicate;
2277{
2278 unw_rec_list *ptr = alloc_record (spill_sprel_p);
e0c9811a 2279 ptr->r.record.x.ab = ab;
800eeca4 2280 ptr->r.record.x.reg = reg;
542d6675 2281 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2282 ptr->r.record.x.qp = predicate;
2283 return ptr;
2284}
2285
2286static unw_rec_list *
e0c9811a
JW		 2287output_spill_reg (ab, reg, targ_reg, xy)
2288 unsigned int ab;
800eeca4
JW		 2289 unsigned int reg;
2290 unsigned int targ_reg;
2291 unsigned int xy;
2292{
2293 unw_rec_list *ptr = alloc_record (spill_reg);
e0c9811a 2294 ptr->r.record.x.ab = ab;
800eeca4
JW		 2295 ptr->r.record.x.reg = reg;
2296 ptr->r.record.x.treg = targ_reg;
2297 ptr->r.record.x.xy = xy;
2298 return ptr;
2299}
2300
2301static unw_rec_list *
e0c9811a
JW		 2302output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2303 unsigned int ab;
800eeca4
JW		 2304 unsigned int reg;
2305 unsigned int targ_reg;
2306 unsigned int xy;
2307 unsigned int predicate;
2308{
2309 unw_rec_list *ptr = alloc_record (spill_reg_p);
e0c9811a 2310 ptr->r.record.x.ab = ab;
800eeca4
JW		 2311 ptr->r.record.x.reg = reg;
2312 ptr->r.record.x.treg = targ_reg;
2313 ptr->r.record.x.xy = xy;
2314 ptr->r.record.x.qp = predicate;
2315 return ptr;
2316}
2317
197865e8 2318/* Given a unw_rec_list process the correct format with the
800eeca4 2319 specified function. */
542d6675 2320
800eeca4
JW		 2321static void
2322process_one_record (ptr, f)
2323 unw_rec_list *ptr;
2324 vbyte_func f;
2325{
e0c9811a
JW		 2326 unsigned long fr_mask, gr_mask;
2327
197865e8 2328 switch (ptr->r.type)
800eeca4 2329 {
5738bc24
JW		 2330 /* This is a dummy record that takes up no space in the output. */
2331 case endp:
2332 break;
2333
542d6675
KH		 2334 case gr_mem:
2335 case fr_mem:
2336 case br_mem:
2337 case frgr_mem:
2338 /* These are taken care of by prologue/prologue_gr. */
2339 break;
e0c9811a 2340
542d6675
KH		 2341 case prologue_gr:
2342 case prologue:
2343 if (ptr->r.type == prologue_gr)
2344 output_R2_format (f, ptr->r.record.r.grmask,
2345 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2346 else
800eeca4 2347 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2348
2349 /* Output descriptor(s) for union of register spills (if any). */
2350 gr_mask = ptr->r.record.r.mask.gr_mem;
2351 fr_mask = ptr->r.record.r.mask.fr_mem;
2352 if (fr_mask)
2353 {
2354 if ((fr_mask & ~0xfUL) == 0)
2355 output_P6_format (f, fr_mem, fr_mask);
2356 else
2357 {
2358 output_P5_format (f, gr_mask, fr_mask);
2359 gr_mask = 0;
2360 }
2361 }
2362 if (gr_mask)
2363 output_P6_format (f, gr_mem, gr_mask);
2364 if (ptr->r.record.r.mask.br_mem)
2365 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2366
2367 /* output imask descriptor if necessary: */
2368 if (ptr->r.record.r.mask.i)
2369 output_P4_format (f, ptr->r.record.r.mask.i,
2370 ptr->r.record.r.imask_size);
2371 break;
2372
2373 case body:
2374 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2375 break;
2376 case mem_stack_f:
2377 case mem_stack_v:
2378 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2379 ptr->r.record.p.size);
2380 break;
2381 case psp_gr:
2382 case rp_gr:
2383 case pfs_gr:
2384 case preds_gr:
2385 case unat_gr:
2386 case lc_gr:
2387 case fpsr_gr:
2388 case priunat_gr:
2389 case bsp_gr:
2390 case bspstore_gr:
2391 case rnat_gr:
2392 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2393 break;
2394 case rp_br:
2395 output_P3_format (f, rp_br, ptr->r.record.p.br);
2396 break;
2397 case psp_sprel:
2398 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2399 break;
2400 case rp_when:
2401 case pfs_when:
2402 case preds_when:
2403 case unat_when:
2404 case lc_when:
2405 case fpsr_when:
2406 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2407 break;
2408 case rp_psprel:
2409 case pfs_psprel:
2410 case preds_psprel:
2411 case unat_psprel:
2412 case lc_psprel:
2413 case fpsr_psprel:
2414 case spill_base:
2415 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2416 break;
2417 case rp_sprel:
2418 case pfs_sprel:
2419 case preds_sprel:
2420 case unat_sprel:
2421 case lc_sprel:
2422 case fpsr_sprel:
2423 case priunat_sprel:
2424 case bsp_sprel:
2425 case bspstore_sprel:
2426 case rnat_sprel:
2427 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2428 break;
2429 case gr_gr:
2430 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2431 break;
2432 case br_gr:
2433 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2434 break;
2435 case spill_mask:
2436 as_bad ("spill_mask record unimplemented.");
2437 break;
2438 case priunat_when_gr:
2439 case priunat_when_mem:
2440 case bsp_when:
2441 case bspstore_when:
2442 case rnat_when:
2443 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2444 break;
2445 case priunat_psprel:
2446 case bsp_psprel:
2447 case bspstore_psprel:
2448 case rnat_psprel:
2449 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2450 break;
2451 case unwabi:
2452 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2453 break;
2454 case epilogue:
2455 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2456 break;
2457 case label_state:
2458 case copy_state:
2459 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2460 break;
2461 case spill_psprel:
2462 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2463 ptr->r.record.x.reg, ptr->r.record.x.t,
2464 ptr->r.record.x.pspoff);
2465 break;
2466 case spill_sprel:
2467 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2468 ptr->r.record.x.reg, ptr->r.record.x.t,
2469 ptr->r.record.x.spoff);
2470 break;
2471 case spill_reg:
2472 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2473 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2474 ptr->r.record.x.treg, ptr->r.record.x.t);
2475 break;
2476 case spill_psprel_p:
2477 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2478 ptr->r.record.x.ab, ptr->r.record.x.reg,
2479 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2480 break;
2481 case spill_sprel_p:
2482 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2483 ptr->r.record.x.ab, ptr->r.record.x.reg,
2484 ptr->r.record.x.t, ptr->r.record.x.spoff);
2485 break;
2486 case spill_reg_p:
2487 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2488 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2489 ptr->r.record.x.xy, ptr->r.record.x.treg,
2490 ptr->r.record.x.t);
2491 break;
2492 default:
2493 as_bad ("record_type_not_valid");
2494 break;
800eeca4
JW		 2495 }
2496}
2497
197865e8 2498/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2499 the specified function. */
2500static void
2501process_unw_records (list, f)
2502 unw_rec_list *list;
2503 vbyte_func f;
2504{
2505 unw_rec_list *ptr;
2506 for (ptr = list; ptr; ptr = ptr->next)
2507 process_one_record (ptr, f);
2508}
2509
2510/* Determine the size of a record list in bytes. */
2511static int
2512calc_record_size (list)
2513 unw_rec_list *list;
2514{
2515 vbyte_count = 0;
2516 process_unw_records (list, count_output);
2517 return vbyte_count;
2518}
2519
e0c9811a
JW		 2520/* Update IMASK bitmask to reflect the fact that one or more registers
2521 of type TYPE are saved starting at instruction with index T. If N
2522 bits are set in REGMASK, it is assumed that instructions T through
2523 T+N-1 save these registers.
2524
2525 TYPE values:
2526 0: no save
2527 1: instruction saves next fp reg
2528 2: instruction saves next general reg
2529 3: instruction saves next branch reg */
2530static void
2531set_imask (region, regmask, t, type)
2532 unw_rec_list *region;
2533 unsigned long regmask;
2534 unsigned long t;
2535 unsigned int type;
2536{
2537 unsigned char *imask;
2538 unsigned long imask_size;
2539 unsigned int i;
2540 int pos;
2541
2542 imask = region->r.record.r.mask.i;
2543 imask_size = region->r.record.r.imask_size;
2544 if (!imask)
2545 {
542d6675 2546 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2547 imask = xmalloc (imask_size);
2548 memset (imask, 0, imask_size);
2549
2550 region->r.record.r.imask_size = imask_size;
2551 region->r.record.r.mask.i = imask;
2552 }
2553
542d6675
KH		 2554 i = (t / 4) + 1;
2555 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2556 while (regmask)
2557 {
2558 if (i >= imask_size)
2559 {
2560 as_bad ("Ignoring attempt to spill beyond end of region");
2561 return;
2562 }
2563
2564 imask[i] |= (type & 0x3) << pos;
197865e8 2565
e0c9811a
JW		 2566 regmask &= (regmask - 1);
2567 pos -= 2;
2568 if (pos < 0)
2569 {
2570 pos = 0;
2571 ++i;
2572 }
2573 }
2574}
2575
f5a30c2e
JW		 2576/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2577 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2578 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2579 for frag sizes. */
f5a30c2e 2580
e0c9811a 2581unsigned long
b5e0fabd 2582slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2583 unsigned long slot_addr;
2584 fragS *slot_frag;
2585 unsigned long first_addr;
2586 fragS *first_frag;
b5e0fabd 2587 int before_relax;
e0c9811a 2588{
f5a30c2e
JW		 2589 unsigned long index = 0;
2590
2591 /* First time we are called, the initial address and frag are invalid. */
2592 if (first_addr == 0)
2593 return 0;
2594
2595 /* If the two addresses are in different frags, then we need to add in
2596 the remaining size of this frag, and then the entire size of intermediate
2597 frags. */
2598 while (slot_frag != first_frag)
2599 {
2600 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2601
b5e0fabd 2602 if (! before_relax)
73f20958 2603 {
b5e0fabd
JW		 2604 /* We can get the final addresses only during and after
2605 relaxation. */
73f20958
L		 2606 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2607 index += 3 * ((first_frag->fr_next->fr_address
2608 - first_frag->fr_address
2609 - first_frag->fr_fix) >> 4);
2610 }
2611 else
2612 /* We don't know what the final addresses will be. We try our
2613 best to estimate. */
2614 switch (first_frag->fr_type)
2615 {
2616 default:
2617 break;
2618
2619 case rs_space:
2620 as_fatal ("only constant space allocation is supported");
2621 break;
2622
2623 case rs_align:
2624 case rs_align_code:
2625 case rs_align_test:
2626 /* Take alignment into account. Assume the worst case
2627 before relaxation. */
2628 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2629 break;
2630
2631 case rs_org:
2632 if (first_frag->fr_symbol)
2633 {
2634 as_fatal ("only constant offsets are supported");
2635 break;
2636 }
2637 case rs_fill:
2638 index += 3 * (first_frag->fr_offset >> 4);
2639 break;
2640 }
2641
f5a30c2e
JW		 2642 /* Add in the full size of the frag converted to instruction slots. */
2643 index += 3 * (first_frag->fr_fix >> 4);
2644 /* Subtract away the initial part before first_addr. */
2645 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2646 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2647
f5a30c2e
JW		 2648 /* Move to the beginning of the next frag. */
2649 first_frag = first_frag->fr_next;
2650 first_addr = (unsigned long) &first_frag->fr_literal;
2651 }
2652
2653 /* Add in the used part of the last frag. */
2654 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2655 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2656 return index;
2657}
4a1805b1 2658
91a2ae2a
RH		 2659/* Optimize unwind record directives. */
2660
2661static unw_rec_list *
2662optimize_unw_records (list)
2663 unw_rec_list *list;
2664{
2665 if (!list)
2666 return NULL;
2667
2668 /* If the only unwind record is ".prologue" or ".prologue" followed
2669 by ".body", then we can optimize the unwind directives away. */
2670 if (list->r.type == prologue
5738bc24
JW		 2671 && (list->next->r.type == endp
2672 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2673 return NULL;
2674
2675 return list;
2676}
2677
800eeca4
JW		 2678/* Given a complete record list, process any records which have
2679 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2680 this has been run, all necessary information should be available
800eeca4 2681 within each record to generate an image. */
542d6675 2682
800eeca4 2683static void
b5e0fabd 2684fixup_unw_records (list, before_relax)
800eeca4 2685 unw_rec_list *list;
b5e0fabd 2686 int before_relax;
800eeca4 2687{
e0c9811a
JW		 2688 unw_rec_list *ptr, *region = 0;
2689 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2690 fragS *first_frag = 0;
e0c9811a 2691
800eeca4
JW		 2692 for (ptr = list; ptr; ptr = ptr->next)
2693 {
2694 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2695 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2696 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2697 first_addr, first_frag, before_relax);
800eeca4
JW		 2698 switch (ptr->r.type)
2699 {
542d6675
KH		 2700 case prologue:
2701 case prologue_gr:
2702 case body:
2703 {
2704 unw_rec_list *last;
5738bc24
JW		 2705 int size;
2706 unsigned long last_addr = 0;
2707 fragS *last_frag = NULL;
542d6675
KH		 2708
2709 first_addr = ptr->slot_number;
f5a30c2e 2710 first_frag = ptr->slot_frag;
542d6675 2711 /* Find either the next body/prologue start, or the end of
5738bc24 2712 the function, and determine the size of the region. */
542d6675
KH		 2713 for (last = ptr->next; last != NULL; last = last->next)
2714 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2715 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2716 {
2717 last_addr = last->slot_number;
f5a30c2e 2718 last_frag = last->slot_frag;
542d6675
KH		 2719 break;
2720 }
b5e0fabd
JW		 2721 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2722 before_relax);
542d6675 2723 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2724 if (ptr->r.type == body)
2725 /* End of region. */
2726 region = 0;
2727 else
2728 region = ptr;
e0c9811a 2729 break;
542d6675
KH		 2730 }
2731 case epilogue:
ed7af9f9
L		 2732 if (t < rlen)
2733 ptr->r.record.b.t = rlen - 1 - t;
2734 else
2735 /* This happens when a memory-stack-less procedure uses a
2736 ".restore sp" directive at the end of a region to pop
2737 the frame state. */
2738 ptr->r.record.b.t = 0;
542d6675 2739 break;
e0c9811a 2740
542d6675
KH		 2741 case mem_stack_f:
2742 case mem_stack_v:
2743 case rp_when:
2744 case pfs_when:
2745 case preds_when:
2746 case unat_when:
2747 case lc_when:
2748 case fpsr_when:
2749 case priunat_when_gr:
2750 case priunat_when_mem:
2751 case bsp_when:
2752 case bspstore_when:
2753 case rnat_when:
2754 ptr->r.record.p.t = t;
2755 break;
e0c9811a 2756
542d6675
KH		 2757 case spill_reg:
2758 case spill_sprel:
2759 case spill_psprel:
2760 case spill_reg_p:
2761 case spill_sprel_p:
2762 case spill_psprel_p:
2763 ptr->r.record.x.t = t;
2764 break;
e0c9811a 2765
542d6675
KH		 2766 case frgr_mem:
2767 if (!region)
2768 {
75e09913 2769 as_bad ("frgr_mem record before region record!");
542d6675
KH		 2770 return;
2771 }
2772 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2773 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2774 set_imask (region, ptr->r.record.p.frmask, t, 1);
2775 set_imask (region, ptr->r.record.p.grmask, t, 2);
2776 break;
2777 case fr_mem:
2778 if (!region)
2779 {
75e09913 2780 as_bad ("fr_mem record before region record!");
542d6675
KH		 2781 return;
2782 }
2783 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2784 set_imask (region, ptr->r.record.p.rmask, t, 1);
2785 break;
2786 case gr_mem:
2787 if (!region)
2788 {
75e09913 2789 as_bad ("gr_mem record before region record!");
542d6675
KH		 2790 return;
2791 }
2792 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2793 set_imask (region, ptr->r.record.p.rmask, t, 2);
2794 break;
2795 case br_mem:
2796 if (!region)
2797 {
75e09913 2798 as_bad ("br_mem record before region record!");
542d6675
KH		 2799 return;
2800 }
2801 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2802 set_imask (region, ptr->r.record.p.brmask, t, 3);
2803 break;
e0c9811a 2804
542d6675
KH		 2805 case gr_gr:
2806 if (!region)
2807 {
75e09913 2808 as_bad ("gr_gr record before region record!");
542d6675
KH		 2809 return;
2810 }
2811 set_imask (region, ptr->r.record.p.grmask, t, 2);
2812 break;
2813 case br_gr:
2814 if (!region)
2815 {
75e09913 2816 as_bad ("br_gr record before region record!");
542d6675
KH		 2817 return;
2818 }
2819 set_imask (region, ptr->r.record.p.brmask, t, 3);
2820 break;
e0c9811a 2821
542d6675
KH		 2822 default:
2823 break;
800eeca4
JW		 2824 }
2825 }
2826}
2827
b5e0fabd
JW		 2828/* Estimate the size of a frag before relaxing. We only have one type of frag
2829 to handle here, which is the unwind info frag. */
2830
2831int
2832ia64_estimate_size_before_relax (fragS *frag,
2833 asection *segtype ATTRIBUTE_UNUSED)
2834{
2835 unw_rec_list *list;
2836 int len, size, pad;
2837
2838 /* ??? This code is identical to the first part of ia64_convert_frag. */
2839 list = (unw_rec_list *) frag->fr_opcode;
2840 fixup_unw_records (list, 0);
2841
2842 len = calc_record_size (list);
2843 /* pad to pointer-size boundary. */
2844 pad = len % md.pointer_size;
2845 if (pad != 0)
2846 len += md.pointer_size - pad;
f7e323d5
JB		 2847 /* Add 8 for the header. */
2848 size = len + 8;
2849 /* Add a pointer for the personality offset. */
2850 if (frag->fr_offset)
2851 size += md.pointer_size;
b5e0fabd
JW		 2852
2853 /* fr_var carries the max_chars that we created the fragment with.
2854 We must, of course, have allocated enough memory earlier. */
2855 assert (frag->fr_var >= size);
2856
2857 return frag->fr_fix + size;
2858}
2859
73f20958
L		 2860/* This function converts a rs_machine_dependent variant frag into a
2861 normal fill frag with the unwind image from the the record list. */
2862void
2863ia64_convert_frag (fragS *frag)
557debba 2864{
73f20958
L		 2865 unw_rec_list *list;
2866 int len, size, pad;
1cd8ff38 2867 valueT flag_value;
557debba 2868
b5e0fabd 2869 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 2870 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 2871 fixup_unw_records (list, 0);
1cd8ff38 2872
73f20958
L		 2873 len = calc_record_size (list);
2874 /* pad to pointer-size boundary. */
2875 pad = len % md.pointer_size;
2876 if (pad != 0)
2877 len += md.pointer_size - pad;
f7e323d5
JB		 2878 /* Add 8 for the header. */
2879 size = len + 8;
2880 /* Add a pointer for the personality offset. */
2881 if (frag->fr_offset)
2882 size += md.pointer_size;
73f20958
L		 2883
2884 /* fr_var carries the max_chars that we created the fragment with.
2885 We must, of course, have allocated enough memory earlier. */
2886 assert (frag->fr_var >= size);
2887
2888 /* Initialize the header area. fr_offset is initialized with
2889 unwind.personality_routine. */
2890 if (frag->fr_offset)
1cd8ff38
NC		 2891 {
2892 if (md.flags & EF_IA_64_ABI64)
2893 flag_value = (bfd_vma) 3 << 32;
2894 else
2895 /* 32-bit unwind info block. */
2896 flag_value = (bfd_vma) 0x1003 << 32;
2897 }
2898 else
2899 flag_value = 0;
557debba 2900
73f20958
L		 2901 md_number_to_chars (frag->fr_literal,
2902 (((bfd_vma) 1 << 48) /* Version. */
2903 | flag_value /* U & E handler flags. */
2904 | (len / md.pointer_size)), /* Length. */
2905 8);
557debba 2906
73f20958
L		 2907 /* Skip the header. */
2908 vbyte_mem_ptr = frag->fr_literal + 8;
2909 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 2910
2911 /* Fill the padding bytes with zeros. */
2912 if (pad != 0)
2913 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2914 md.pointer_size - pad);
2915
73f20958
L		 2916 frag->fr_fix += size;
2917 frag->fr_type = rs_fill;
2918 frag->fr_var = 0;
2919 frag->fr_offset = 0;
800eeca4
JW		 2920}
2921
e0c9811a
JW		 2922static int
2923convert_expr_to_ab_reg (e, ab, regp)
2924 expressionS *e;
2925 unsigned int *ab;
2926 unsigned int *regp;
2927{
2928 unsigned int reg;
2929
2930 if (e->X_op != O_register)
2931 return 0;
2932
2933 reg = e->X_add_number;
2434f565 2934 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 2935 {
2936 *ab = 0;
2937 *regp = reg - REG_GR;
2938 }
2434f565
JW		 2939 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2940 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 2941 {
2942 *ab = 1;
2943 *regp = reg - REG_FR;
2944 }
2434f565 2945 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 2946 {
2947 *ab = 2;
2948 *regp = reg - REG_BR;
2949 }
2950 else
2951 {
2952 *ab = 3;
2953 switch (reg)
2954 {
2955 case REG_PR: *regp = 0; break;
2956 case REG_PSP: *regp = 1; break;
2957 case REG_PRIUNAT: *regp = 2; break;
2958 case REG_BR + 0: *regp = 3; break;
2959 case REG_AR + AR_BSP: *regp = 4; break;
2960 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2961 case REG_AR + AR_RNAT: *regp = 6; break;
2962 case REG_AR + AR_UNAT: *regp = 7; break;
2963 case REG_AR + AR_FPSR: *regp = 8; break;
2964 case REG_AR + AR_PFS: *regp = 9; break;
2965 case REG_AR + AR_LC: *regp = 10; break;
2966
2967 default:
2968 return 0;
2969 }
2970 }
2971 return 1;
197865e8 2972}
e0c9811a
JW		 2973
2974static int
2975convert_expr_to_xy_reg (e, xy, regp)
2976 expressionS *e;
2977 unsigned int *xy;
2978 unsigned int *regp;
2979{
2980 unsigned int reg;
2981
2982 if (e->X_op != O_register)
2983 return 0;
2984
2985 reg = e->X_add_number;
2986
2434f565 2987 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
e0c9811a
JW		 2988 {
2989 *xy = 0;
2990 *regp = reg - REG_GR;
2991 }
2434f565 2992 else if (reg >= REG_FR && reg <= (REG_FR + 127))
e0c9811a
JW		 2993 {
2994 *xy = 1;
2995 *regp = reg - REG_FR;
2996 }
2434f565 2997 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 2998 {
2999 *xy = 2;
3000 *regp = reg - REG_BR;
3001 }
3002 else
3003 return -1;
3004 return 1;
197865e8 3005}
e0c9811a 3006
d9201763
L		 3007static void
3008dot_align (int arg)
3009{
3010 /* The current frag is an alignment frag. */
3011 align_frag = frag_now;
3012 s_align_bytes (arg);
3013}
3014
800eeca4
JW		 3015static void
3016dot_radix (dummy)
2434f565 3017 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3018{
3019 int radix;
3020
3021 SKIP_WHITESPACE ();
3022 radix = *input_line_pointer++;
3023
3024 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3025 {
3026 as_bad ("Radix `%c' unsupported", *input_line_pointer);
542d6675 3027 ignore_rest_of_line ();
800eeca4
JW		 3028 return;
3029 }
3030}
3031
196e8040
JW		 3032/* Helper function for .loc directives. If the assembler is not generating
3033 line number info, then we need to remember which instructions have a .loc
3034 directive, and only call dwarf2_gen_line_info for those instructions. */
3035
3036static void
3037dot_loc (int x)
3038{
3039 CURR_SLOT.loc_directive_seen = 1;
3040 dwarf2_directive_loc (x);
3041}
3042
800eeca4
JW		 3043/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3044static void
3045dot_special_section (which)
3046 int which;
3047{
3048 set_section ((char *) special_section_name[which]);
3049}
3050
75e09913
JB		 3051static int
3052in_procedure (const char *directive)
3053{
3054 if (unwind.proc_start
3055 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3056 return 1;
3057 as_bad (".%s outside of procedure", directive);
3058 ignore_rest_of_line ();
3059 return 0;
3060}
3061
3062static int
3063in_prologue (const char *directive)
3064{
3065 if (in_procedure (directive))
3066 {
3067 if (unwind.prologue)
3068 return 1;
3069 as_bad (".%s outside of prologue", directive);
3070 ignore_rest_of_line ();
3071 }
3072 return 0;
3073}
3074
3075static int
3076in_body (const char *directive)
3077{
3078 if (in_procedure (directive))
3079 {
3080 if (unwind.body)
3081 return 1;
3082 as_bad (".%s outside of body region", directive);
3083 ignore_rest_of_line ();
3084 }
3085 return 0;
3086}
3087
800eeca4
JW		 3088static void
3089add_unwind_entry (ptr)
3090 unw_rec_list *ptr;
3091{
e0c9811a
JW		 3092 if (unwind.tail)
3093 unwind.tail->next = ptr;
800eeca4 3094 else
e0c9811a
JW		 3095 unwind.list = ptr;
3096 unwind.tail = ptr;
800eeca4
JW		 3097
3098 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3099 if (unwind.current_entry == NULL)
3100 unwind.current_entry = ptr;
800eeca4
JW		 3101}
3102
197865e8 3103static void
800eeca4 3104dot_fframe (dummy)
2434f565 3105 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3106{
3107 expressionS e;
e0c9811a 3108
75e09913
JB		 3109 if (!in_prologue ("fframe"))
3110 return;
3111
800eeca4 3112 parse_operand (&e);
197865e8 3113
800eeca4
JW		 3114 if (e.X_op != O_constant)
3115 as_bad ("Operand to .fframe must be a constant");
3116 else
e0c9811a
JW		 3117 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3118}
3119
197865e8 3120static void
e0c9811a 3121dot_vframe (dummy)
2434f565 3122 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3123{
3124 expressionS e;
3125 unsigned reg;
3126
75e09913
JB		 3127 if (!in_prologue ("vframe"))
3128 return;
3129
e0c9811a
JW		 3130 parse_operand (&e);
3131 reg = e.X_add_number - REG_GR;
3132 if (e.X_op == O_register && reg < 128)
800eeca4 3133 {
e0c9811a 3134 add_unwind_entry (output_mem_stack_v ());
30d25259
RH		 3135 if (! (unwind.prologue_mask & 2))
3136 add_unwind_entry (output_psp_gr (reg));
800eeca4 3137 }
e0c9811a
JW		 3138 else
3139 as_bad ("First operand to .vframe must be a general register");
800eeca4
JW		 3140}
3141
197865e8 3142static void
e0c9811a 3143dot_vframesp (dummy)
2434f565 3144 int dummy ATTRIBUTE_UNUSED;
800eeca4 3145{
e0c9811a
JW		 3146 expressionS e;
3147
75e09913
JB		 3148 if (!in_prologue ("vframesp"))
3149 return;
3150
e0c9811a
JW		 3151 parse_operand (&e);
3152 if (e.X_op == O_constant)
3153 {
3154 add_unwind_entry (output_mem_stack_v ());
3155 add_unwind_entry (output_psp_sprel (e.X_add_number));
3156 }
3157 else
69906a9b 3158 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
e0c9811a
JW		 3159}
3160
197865e8 3161static void
e0c9811a 3162dot_vframepsp (dummy)
2434f565 3163 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3164{
3165 expressionS e;
3166
75e09913
JB		 3167 if (!in_prologue ("vframepsp"))
3168 return;
3169
e0c9811a
JW		 3170 parse_operand (&e);
3171 if (e.X_op == O_constant)
3172 {
3173 add_unwind_entry (output_mem_stack_v ());
3174 add_unwind_entry (output_psp_sprel (e.X_add_number));
3175 }
3176 else
69906a9b 3177 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
800eeca4
JW		 3178}
3179
197865e8 3180static void
800eeca4 3181dot_save (dummy)
2434f565 3182 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3183{
3184 expressionS e1, e2;
3185 int sep;
3186 int reg1, reg2;
3187
75e09913
JB		 3188 if (!in_prologue ("save"))
3189 return;
3190
800eeca4
JW		 3191 sep = parse_operand (&e1);
3192 if (sep != ',')
3193 as_bad ("No second operand to .save");
3194 sep = parse_operand (&e2);
3195
e0c9811a 3196 reg1 = e1.X_add_number;
800eeca4 3197 reg2 = e2.X_add_number - REG_GR;
197865e8 3198
800eeca4 3199 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3200 if (e1.X_op == O_register)
800eeca4 3201 {
542d6675 3202 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
800eeca4
JW		 3203 {
3204 switch (reg1)
3205 {
542d6675
KH		 3206 case REG_AR + AR_BSP:
3207 add_unwind_entry (output_bsp_when ());
3208 add_unwind_entry (output_bsp_gr (reg2));
3209 break;
3210 case REG_AR + AR_BSPSTORE:
3211 add_unwind_entry (output_bspstore_when ());
3212 add_unwind_entry (output_bspstore_gr (reg2));
3213 break;
3214 case REG_AR + AR_RNAT:
3215 add_unwind_entry (output_rnat_when ());
3216 add_unwind_entry (output_rnat_gr (reg2));
3217 break;
3218 case REG_AR + AR_UNAT:
3219 add_unwind_entry (output_unat_when ());
3220 add_unwind_entry (output_unat_gr (reg2));
3221 break;
3222 case REG_AR + AR_FPSR:
3223 add_unwind_entry (output_fpsr_when ());
3224 add_unwind_entry (output_fpsr_gr (reg2));
3225 break;
3226 case REG_AR + AR_PFS:
3227 add_unwind_entry (output_pfs_when ());
3228 if (! (unwind.prologue_mask & 4))
3229 add_unwind_entry (output_pfs_gr (reg2));
3230 break;
3231 case REG_AR + AR_LC:
3232 add_unwind_entry (output_lc_when ());
3233 add_unwind_entry (output_lc_gr (reg2));
3234 break;
3235 case REG_BR:
3236 add_unwind_entry (output_rp_when ());
3237 if (! (unwind.prologue_mask & 8))
3238 add_unwind_entry (output_rp_gr (reg2));
3239 break;
3240 case REG_PR:
3241 add_unwind_entry (output_preds_when ());
3242 if (! (unwind.prologue_mask & 1))
3243 add_unwind_entry (output_preds_gr (reg2));
3244 break;
3245 case REG_PRIUNAT:
3246 add_unwind_entry (output_priunat_when_gr ());
3247 add_unwind_entry (output_priunat_gr (reg2));
3248 break;
3249 default:
3250 as_bad ("First operand not a valid register");
800eeca4
JW		 3251 }
3252 }
3253 else
3254 as_bad (" Second operand not a valid register");
3255 }
3256 else
e0c9811a 3257 as_bad ("First operand not a register");
800eeca4
JW		 3258}
3259
197865e8 3260static void
800eeca4 3261dot_restore (dummy)
2434f565 3262 int dummy ATTRIBUTE_UNUSED;
800eeca4 3263{
e0c9811a 3264 expressionS e1, e2;
33d01f33 3265 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3266 int sep;
3267
75e09913
JB		 3268 if (!in_body ("restore"))
3269 return;
3270
e0c9811a
JW		 3271 sep = parse_operand (&e1);
3272 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3273 {
3274 as_bad ("First operand to .restore must be stack pointer (sp)");
3275 return;
3276 }
3277
3278 if (sep == ',')
3279 {
3280 parse_operand (&e2);
33d01f33 3281 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3282 {
33d01f33 3283 as_bad ("Second operand to .restore must be a constant >= 0");
e0c9811a
JW		 3284 return;
3285 }
33d01f33 3286 ecount = e2.X_add_number;
e0c9811a 3287 }
33d01f33
JW		 3288 else
3289 ecount = unwind.prologue_count - 1;
6290819d
NC		 3290
3291 if (ecount >= unwind.prologue_count)
3292 {
3293 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3294 ecount + 1, unwind.prologue_count);
3295 return;
3296 }
3297
e0c9811a 3298 add_unwind_entry (output_epilogue (ecount));
33d01f33
JW		 3299
3300 if (ecount < unwind.prologue_count)
3301 unwind.prologue_count -= ecount + 1;
3302 else
3303 unwind.prologue_count = 0;
e0c9811a
JW		 3304}
3305
197865e8 3306static void
e0c9811a 3307dot_restorereg (dummy)
2434f565 3308 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3309{
3310 unsigned int ab, reg;
3311 expressionS e;
3312
75e09913
JB		 3313 if (!in_procedure ("restorereg"))
3314 return;
3315
e0c9811a
JW		 3316 parse_operand (&e);
3317
3318 if (!convert_expr_to_ab_reg (&e, &ab, &reg))
3319 {
3320 as_bad ("First operand to .restorereg must be a preserved register");
3321 return;
3322 }
3323 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3324}
3325
197865e8 3326static void
e0c9811a 3327dot_restorereg_p (dummy)
2434f565 3328 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3329{
3330 unsigned int qp, ab, reg;
3331 expressionS e1, e2;
3332 int sep;
3333
75e09913
JB		 3334 if (!in_procedure ("restorereg.p"))
3335 return;
3336
e0c9811a
JW		 3337 sep = parse_operand (&e1);
3338 if (sep != ',')
3339 {
3340 as_bad ("No second operand to .restorereg.p");
3341 return;
3342 }
3343
3344 parse_operand (&e2);
3345
3346 qp = e1.X_add_number - REG_P;
3347 if (e1.X_op != O_register || qp > 63)
3348 {
3349 as_bad ("First operand to .restorereg.p must be a predicate");
3350 return;
3351 }
3352
3353 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3354 {
3355 as_bad ("Second operand to .restorereg.p must be a preserved register");
3356 return;
3357 }
3358 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
800eeca4
JW		 3359}
3360
2d6ed997
L		 3361static char *special_linkonce_name[] =
3362 {
3363 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3364 };
3365
3366static void
d6afba4b 3367start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
2d6ed997
L		 3368{
3369 /*
3370 Use a slightly ugly scheme to derive the unwind section names from
3371 the text section name:
3372
3373 text sect. unwind table sect.
3374 name: name: comments:
3375 ---------- ----------------- --------------------------------
3376 .text .IA_64.unwind
3377 .text.foo .IA_64.unwind.text.foo
3378 .foo .IA_64.unwind.foo
3379 .gnu.linkonce.t.foo
3380 .gnu.linkonce.ia64unw.foo
3381 _info .IA_64.unwind_info gas issues error message (ditto)
3382 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3383
3384 This mapping is done so that:
3385
3386 (a) An object file with unwind info only in .text will use
3387 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3388 This follows the letter of the ABI and also ensures backwards
3389 compatibility with older toolchains.
3390
3391 (b) An object file with unwind info in multiple text sections
3392 will use separate unwind sections for each text section.
3393 This allows us to properly set the "sh_info" and "sh_link"
3394 fields in SHT_IA_64_UNWIND as required by the ABI and also
3395 lets GNU ld support programs with multiple segments
3396 containing unwind info (as might be the case for certain
3397 embedded applications).
3398
3399 (c) An error is issued if there would be a name clash.
3400 */
3401
3402 const char *text_name, *sec_text_name;
3403 char *sec_name;
3404 const char *prefix = special_section_name [sec_index];
3405 const char *suffix;
3406 size_t prefix_len, suffix_len, sec_name_len;
3407
3408 sec_text_name = segment_name (text_seg);
3409 text_name = sec_text_name;
3410 if (strncmp (text_name, "_info", 5) == 0)
3411 {
3412 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3413 text_name);
3414 ignore_rest_of_line ();
3415 return;
3416 }
3417 if (strcmp (text_name, ".text") == 0)
3418 text_name = "";
3419
3420 /* Build the unwind section name by appending the (possibly stripped)
3421 text section name to the unwind prefix. */
3422 suffix = text_name;
3423 if (strncmp (text_name, ".gnu.linkonce.t.",
3424 sizeof (".gnu.linkonce.t.") - 1) == 0)
3425 {
3426 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3427 suffix += sizeof (".gnu.linkonce.t.") - 1;
3428 }
d6afba4b
JJ		 3429 else if (linkonce_empty)
3430 return;
2d6ed997
L		 3431
3432 prefix_len = strlen (prefix);
3433 suffix_len = strlen (suffix);
3434 sec_name_len = prefix_len + suffix_len;
3435 sec_name = alloca (sec_name_len + 1);
3436 memcpy (sec_name, prefix, prefix_len);
3437 memcpy (sec_name + prefix_len, suffix, suffix_len);
3438 sec_name [sec_name_len] = '\0';
3439
3440 /* Handle COMDAT group. */
3441 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3442 {
3443 char *section;
3444 size_t len, group_name_len;
3445 const char *group_name = elf_group_name (text_seg);
3446
3447 if (group_name == NULL)
3448 {
3449 as_bad ("Group section `%s' has no group signature",
3450 sec_text_name);
3451 ignore_rest_of_line ();
3452 return;
3453 }
3454 /* We have to construct a fake section directive. */
3455 group_name_len = strlen (group_name);
3456 len = (sec_name_len
3457 + 16 /* ,"aG",@progbits, */
3458 + group_name_len /* ,group_name */
3459 + 7); /* ,comdat */
3460
3461 section = alloca (len + 1);
3462 memcpy (section, sec_name, sec_name_len);
3463 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3464 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3465 memcpy (section + len - 7, ",comdat", 7);
3466 section [len] = '\0';
3467 set_section (section);
3468 }
3469 else
3470 {
3471 set_section (sec_name);
3472 bfd_set_section_flags (stdoutput, now_seg,
3473 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3474 }
38ce5b11
L		 3475
3476 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3477}
3478
73f20958 3479static void
2d6ed997 3480generate_unwind_image (const segT text_seg)
800eeca4 3481{
73f20958
L		 3482 int size, pad;
3483 unw_rec_list *list;
800eeca4 3484
c97b7ef6
JW		 3485 /* Mark the end of the unwind info, so that we can compute the size of the
3486 last unwind region. */
3487 add_unwind_entry (output_endp ());
3488
10850f29
JW		 3489 /* Force out pending instructions, to make sure all unwind records have
3490 a valid slot_number field. */
3491 ia64_flush_insns ();
3492
800eeca4 3493 /* Generate the unwind record. */
73f20958 3494 list = optimize_unw_records (unwind.list);
b5e0fabd 3495 fixup_unw_records (list, 1);
73f20958
L		 3496 size = calc_record_size (list);
3497
3498 if (size > 0 || unwind.force_unwind_entry)
3499 {
3500 unwind.force_unwind_entry = 0;
3501 /* pad to pointer-size boundary. */
3502 pad = size % md.pointer_size;
3503 if (pad != 0)
3504 size += md.pointer_size - pad;
f7e323d5
JB		 3505 /* Add 8 for the header. */
3506 size += 8;
3507 /* Add a pointer for the personality offset. */
3508 if (unwind.personality_routine)
3509 size += md.pointer_size;
73f20958 3510 }
6290819d 3511
800eeca4
JW		 3512 /* If there are unwind records, switch sections, and output the info. */
3513 if (size != 0)
3514 {
800eeca4 3515 expressionS exp;
1cd8ff38 3516 bfd_reloc_code_real_type reloc;
91a2ae2a 3517
d6afba4b 3518 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
800eeca4 3519
557debba
JW		 3520 /* Make sure the section has 4 byte alignment for ILP32 and
3521 8 byte alignment for LP64. */
3522 frag_align (md.pointer_size_shift, 0, 0);
3523 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3524
800eeca4 3525 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3526 unwind.info = expr_build_dot ();
73f20958
L		 3527
3528 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3529 (offsetT) (long) unwind.personality_routine,
3530 (char *) list);
91a2ae2a 3531
800eeca4 3532 /* Add the personality address to the image. */
e0c9811a 3533 if (unwind.personality_routine != 0)
542d6675 3534 {
40449e9f 3535 exp.X_op = O_symbol;
e0c9811a 3536 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3537 exp.X_add_number = 0;
1cd8ff38
NC		 3538
3539 if (md.flags & EF_IA_64_BE)
3540 {
3541 if (md.flags & EF_IA_64_ABI64)
3542 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3543 else
3544 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3545 }
40449e9f 3546 else
1cd8ff38
NC		 3547 {
3548 if (md.flags & EF_IA_64_ABI64)
3549 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3550 else
3551 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3552 }
3553
3554 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3555 md.pointer_size, &exp, 0, reloc);
e0c9811a 3556 unwind.personality_routine = 0;
542d6675 3557 }
800eeca4 3558 }
d6afba4b
JJ		 3559 else
3560 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
800eeca4 3561
6290819d 3562 free_saved_prologue_counts ();
e0c9811a 3563 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3564}
3565
197865e8 3566static void
542d6675 3567dot_handlerdata (dummy)
2434f565 3568 int dummy ATTRIBUTE_UNUSED;
800eeca4 3569{
75e09913
JB		 3570 if (!in_procedure ("handlerdata"))
3571 return;
91a2ae2a
RH		 3572 unwind.force_unwind_entry = 1;
3573
3574 /* Remember which segment we're in so we can switch back after .endp */
3575 unwind.saved_text_seg = now_seg;
3576 unwind.saved_text_subseg = now_subseg;
3577
3578 /* Generate unwind info into unwind-info section and then leave that
3579 section as the currently active one so dataXX directives go into
3580 the language specific data area of the unwind info block. */
2d6ed997 3581 generate_unwind_image (now_seg);
e0c9811a 3582 demand_empty_rest_of_line ();
800eeca4
JW		 3583}
3584
197865e8 3585static void
800eeca4 3586dot_unwentry (dummy)
2434f565 3587 int dummy ATTRIBUTE_UNUSED;
800eeca4 3588{
75e09913
JB		 3589 if (!in_procedure ("unwentry"))
3590 return;
91a2ae2a 3591 unwind.force_unwind_entry = 1;
e0c9811a 3592 demand_empty_rest_of_line ();
800eeca4
JW		 3593}
3594
197865e8 3595static void
800eeca4 3596dot_altrp (dummy)
2434f565 3597 int dummy ATTRIBUTE_UNUSED;
800eeca4 3598{
e0c9811a
JW		 3599 expressionS e;
3600 unsigned reg;
3601
75e09913
JB		 3602 if (!in_prologue ("altrp"))
3603 return;
3604
e0c9811a
JW		 3605 parse_operand (&e);
3606 reg = e.X_add_number - REG_BR;
3607 if (e.X_op == O_register && reg < 8)
3608 add_unwind_entry (output_rp_br (reg));
3609 else
3610 as_bad ("First operand not a valid branch register");
800eeca4
JW		 3611}
3612
197865e8 3613static void
e0c9811a
JW		 3614dot_savemem (psprel)
3615 int psprel;
800eeca4
JW		 3616{
3617 expressionS e1, e2;
3618 int sep;
3619 int reg1, val;
3620
75e09913
JB		 3621 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3622 return;
3623
800eeca4
JW		 3624 sep = parse_operand (&e1);
3625 if (sep != ',')
e0c9811a 3626 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
800eeca4
JW		 3627 sep = parse_operand (&e2);
3628
e0c9811a 3629 reg1 = e1.X_add_number;
800eeca4 3630 val = e2.X_add_number;
197865e8 3631
800eeca4 3632 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3633 if (e1.X_op == O_register)
800eeca4
JW		 3634 {
3635 if (e2.X_op == O_constant)
3636 {
3637 switch (reg1)
3638 {
542d6675
KH		 3639 case REG_AR + AR_BSP:
3640 add_unwind_entry (output_bsp_when ());
3641 add_unwind_entry ((psprel
3642 ? output_bsp_psprel
3643 : output_bsp_sprel) (val));
3644 break;
3645 case REG_AR + AR_BSPSTORE:
3646 add_unwind_entry (output_bspstore_when ());
3647 add_unwind_entry ((psprel
3648 ? output_bspstore_psprel
3649 : output_bspstore_sprel) (val));
3650 break;
3651 case REG_AR + AR_RNAT:
3652 add_unwind_entry (output_rnat_when ());
3653 add_unwind_entry ((psprel
3654 ? output_rnat_psprel
3655 : output_rnat_sprel) (val));
3656 break;
3657 case REG_AR + AR_UNAT:
3658 add_unwind_entry (output_unat_when ());
3659 add_unwind_entry ((psprel
3660 ? output_unat_psprel
3661 : output_unat_sprel) (val));
3662 break;
3663 case REG_AR + AR_FPSR:
3664 add_unwind_entry (output_fpsr_when ());
3665 add_unwind_entry ((psprel
3666 ? output_fpsr_psprel
3667 : output_fpsr_sprel) (val));
3668 break;
3669 case REG_AR + AR_PFS:
3670 add_unwind_entry (output_pfs_when ());
3671 add_unwind_entry ((psprel
3672 ? output_pfs_psprel
3673 : output_pfs_sprel) (val));
3674 break;
3675 case REG_AR + AR_LC:
3676 add_unwind_entry (output_lc_when ());
3677 add_unwind_entry ((psprel
3678 ? output_lc_psprel
3679 : output_lc_sprel) (val));
3680 break;
3681 case REG_BR:
3682 add_unwind_entry (output_rp_when ());
3683 add_unwind_entry ((psprel
3684 ? output_rp_psprel
3685 : output_rp_sprel) (val));
3686 break;
3687 case REG_PR:
3688 add_unwind_entry (output_preds_when ());
3689 add_unwind_entry ((psprel
3690 ? output_preds_psprel
3691 : output_preds_sprel) (val));
3692 break;
3693 case REG_PRIUNAT:
3694 add_unwind_entry (output_priunat_when_mem ());
3695 add_unwind_entry ((psprel
3696 ? output_priunat_psprel
3697 : output_priunat_sprel) (val));
3698 break;
3699 default:
3700 as_bad ("First operand not a valid register");
800eeca4
JW		 3701 }
3702 }
3703 else
3704 as_bad (" Second operand not a valid constant");
3705 }
3706 else
e0c9811a 3707 as_bad ("First operand not a register");
800eeca4
JW		 3708}
3709
197865e8 3710static void
800eeca4 3711dot_saveg (dummy)
2434f565 3712 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3713{
3714 expressionS e1, e2;
3715 int sep;
75e09913
JB		 3716
3717 if (!in_prologue ("save.g"))
3718 return;
3719
800eeca4
JW		 3720 sep = parse_operand (&e1);
3721 if (sep == ',')
3722 parse_operand (&e2);
197865e8 3723
800eeca4
JW		 3724 if (e1.X_op != O_constant)
3725 as_bad ("First operand to .save.g must be a constant.");
3726 else
3727 {
3728 int grmask = e1.X_add_number;
3729 if (sep != ',')
3730 add_unwind_entry (output_gr_mem (grmask));
3731 else
542d6675 3732 {
800eeca4 3733 int reg = e2.X_add_number - REG_GR;
542d6675 3734 if (e2.X_op == O_register && reg >= 0 && reg < 128)
800eeca4
JW		 3735 add_unwind_entry (output_gr_gr (grmask, reg));
3736 else
3737 as_bad ("Second operand is an invalid register.");
3738 }
3739 }
3740}
3741
197865e8 3742static void
800eeca4 3743dot_savef (dummy)
2434f565 3744 int dummy ATTRIBUTE_UNUSED;
800eeca4 3745{
e0c9811a 3746 expressionS e1;
800eeca4 3747 int sep;
75e09913
JB		 3748
3749 if (!in_prologue ("save.f"))
3750 return;
3751
800eeca4 3752 sep = parse_operand (&e1);
197865e8 3753
800eeca4
JW		 3754 if (e1.X_op != O_constant)
3755 as_bad ("Operand to .save.f must be a constant.");
3756 else
e0c9811a 3757 add_unwind_entry (output_fr_mem (e1.X_add_number));
800eeca4
JW		 3758}
3759
197865e8 3760static void
800eeca4 3761dot_saveb (dummy)
2434f565 3762 int dummy ATTRIBUTE_UNUSED;
800eeca4 3763{
e0c9811a
JW		 3764 expressionS e1, e2;
3765 unsigned int reg;
3766 unsigned char sep;
3767 int brmask;
3768
75e09913
JB		 3769 if (!in_prologue ("save.b"))
3770 return;
3771
800eeca4 3772 sep = parse_operand (&e1);
800eeca4 3773 if (e1.X_op != O_constant)
800eeca4 3774 {
e0c9811a
JW		 3775 as_bad ("First operand to .save.b must be a constant.");
3776 return;
800eeca4 3777 }
e0c9811a
JW		 3778 brmask = e1.X_add_number;
3779
3780 if (sep == ',')
3781 {
3782 sep = parse_operand (&e2);
3783 reg = e2.X_add_number - REG_GR;
3784 if (e2.X_op != O_register || reg > 127)
3785 {
3786 as_bad ("Second operand to .save.b must be a general register.");
3787 return;
3788 }
3789 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3790 }
3791 else
3792 add_unwind_entry (output_br_mem (brmask));
3793
3794 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3795 demand_empty_rest_of_line ();
800eeca4
JW		 3796}
3797
197865e8 3798static void
800eeca4 3799dot_savegf (dummy)
2434f565 3800 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3801{
3802 expressionS e1, e2;
3803 int sep;
75e09913
JB		 3804
3805 if (!in_prologue ("save.gf"))
3806 return;
3807
800eeca4
JW		 3808 sep = parse_operand (&e1);
3809 if (sep == ',')
3810 parse_operand (&e2);
197865e8 3811
800eeca4
JW		 3812 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3813 as_bad ("Both operands of .save.gf must be constants.");
3814 else
3815 {
3816 int grmask = e1.X_add_number;
3817 int frmask = e2.X_add_number;
3818 add_unwind_entry (output_frgr_mem (grmask, frmask));
3819 }
3820}
3821
197865e8 3822static void
800eeca4 3823dot_spill (dummy)
2434f565 3824 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3825{
3826 expressionS e;
e0c9811a
JW		 3827 unsigned char sep;
3828
75e09913
JB		 3829 if (!in_prologue ("spill"))
3830 return;
3831
e0c9811a
JW		 3832 sep = parse_operand (&e);
3833 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3834 demand_empty_rest_of_line ();
197865e8 3835
800eeca4
JW		 3836 if (e.X_op != O_constant)
3837 as_bad ("Operand to .spill must be a constant");
3838 else
e0c9811a
JW		 3839 add_unwind_entry (output_spill_base (e.X_add_number));
3840}
3841
3842static void
3843dot_spillreg (dummy)
2434f565 3844 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3845{
3846 int sep, ab, xy, reg, treg;
3847 expressionS e1, e2;
3848
75e09913
JB		 3849 if (!in_procedure ("spillreg"))
3850 return;
3851
e0c9811a
JW		 3852 sep = parse_operand (&e1);
3853 if (sep != ',')
3854 {
3855 as_bad ("No second operand to .spillreg");
3856 return;
3857 }
3858
3859 parse_operand (&e2);
3860
3861 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
800eeca4 3862 {
e0c9811a
JW		 3863 as_bad ("First operand to .spillreg must be a preserved register");
3864 return;
800eeca4 3865 }
e0c9811a
JW		 3866
3867 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3868 {
3869 as_bad ("Second operand to .spillreg must be a register");
3870 return;
3871 }
3872
3873 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3874}
3875
3876static void
3877dot_spillmem (psprel)
3878 int psprel;
3879{
3880 expressionS e1, e2;
3881 int sep, ab, reg;
3882
75e09913
JB		 3883 if (!in_procedure ("spillmem"))
3884 return;
3885
e0c9811a
JW		 3886 sep = parse_operand (&e1);
3887 if (sep != ',')
3888 {
3889 as_bad ("Second operand missing");
3890 return;
3891 }
3892
3893 parse_operand (&e2);
3894
3895 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
3896 {
3897 as_bad ("First operand to .spill%s must be a preserved register",
3898 psprel ? "psp" : "sp");
3899 return;
3900 }
3901
3902 if (e2.X_op != O_constant)
3903 {
3904 as_bad ("Second operand to .spill%s must be a constant",
3905 psprel ? "psp" : "sp");
3906 return;
3907 }
3908
3909 if (psprel)
3910 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3911 else
3912 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3913}
3914
3915static void
3916dot_spillreg_p (dummy)
2434f565 3917 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3918{
3919 int sep, ab, xy, reg, treg;
3920 expressionS e1, e2, e3;
3921 unsigned int qp;
3922
75e09913
JB		 3923 if (!in_procedure ("spillreg.p"))
3924 return;
3925
e0c9811a
JW		 3926 sep = parse_operand (&e1);
3927 if (sep != ',')
3928 {
3929 as_bad ("No second and third operand to .spillreg.p");
3930 return;
3931 }
3932
3933 sep = parse_operand (&e2);
3934 if (sep != ',')
3935 {
3936 as_bad ("No third operand to .spillreg.p");
3937 return;
3938 }
3939
3940 parse_operand (&e3);
3941
3942 qp = e1.X_add_number - REG_P;
3943
3944 if (e1.X_op != O_register || qp > 63)
3945 {
3946 as_bad ("First operand to .spillreg.p must be a predicate");
3947 return;
3948 }
3949
3950 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3951 {
3952 as_bad ("Second operand to .spillreg.p must be a preserved register");
3953 return;
3954 }
3955
3956 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3957 {
3958 as_bad ("Third operand to .spillreg.p must be a register");
3959 return;
3960 }
3961
3962 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3963}
3964
3965static void
3966dot_spillmem_p (psprel)
3967 int psprel;
3968{
3969 expressionS e1, e2, e3;
3970 int sep, ab, reg;
3971 unsigned int qp;
3972
75e09913
JB		 3973 if (!in_procedure ("spillmem.p"))
3974 return;
3975
e0c9811a
JW		 3976 sep = parse_operand (&e1);
3977 if (sep != ',')
3978 {
3979 as_bad ("Second operand missing");
3980 return;
3981 }
3982
3983 parse_operand (&e2);
3984 if (sep != ',')
3985 {
3986 as_bad ("Second operand missing");
3987 return;
3988 }
3989
3990 parse_operand (&e3);
3991
3992 qp = e1.X_add_number - REG_P;
3993 if (e1.X_op != O_register || qp > 63)
3994 {
3995 as_bad ("First operand to .spill%s_p must be a predicate",
3996 psprel ? "psp" : "sp");
3997 return;
3998 }
3999
4000 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
4001 {
4002 as_bad ("Second operand to .spill%s_p must be a preserved register",
4003 psprel ? "psp" : "sp");
4004 return;
4005 }
4006
4007 if (e3.X_op != O_constant)
4008 {
4009 as_bad ("Third operand to .spill%s_p must be a constant",
4010 psprel ? "psp" : "sp");
4011 return;
4012 }
4013
4014 if (psprel)
fa7fda74 4015 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a 4016 else
fa7fda74 4017 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a
JW		 4018}
4019
6290819d
NC		 4020static unsigned int
4021get_saved_prologue_count (lbl)
4022 unsigned long lbl;
4023{
4024 label_prologue_count *lpc = unwind.saved_prologue_counts;
4025
4026 while (lpc != NULL && lpc->label_number != lbl)
4027 lpc = lpc->next;
4028
4029 if (lpc != NULL)
4030 return lpc->prologue_count;
4031
4032 as_bad ("Missing .label_state %ld", lbl);
4033 return 1;
4034}
4035
4036static void
4037save_prologue_count (lbl, count)
4038 unsigned long lbl;
4039 unsigned int count;
4040{
4041 label_prologue_count *lpc = unwind.saved_prologue_counts;
4042
4043 while (lpc != NULL && lpc->label_number != lbl)
4044 lpc = lpc->next;
4045
4046 if (lpc != NULL)
4047 lpc->prologue_count = count;
4048 else
4049 {
40449e9f 4050 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 4051
4052 new_lpc->next = unwind.saved_prologue_counts;
4053 new_lpc->label_number = lbl;
4054 new_lpc->prologue_count = count;
4055 unwind.saved_prologue_counts = new_lpc;
4056 }
4057}
4058
4059static void
4060free_saved_prologue_counts ()
4061{
40449e9f
KH		 4062 label_prologue_count *lpc = unwind.saved_prologue_counts;
4063 label_prologue_count *next;
6290819d
NC		 4064
4065 while (lpc != NULL)
4066 {
4067 next = lpc->next;
4068 free (lpc);
4069 lpc = next;
4070 }
4071
4072 unwind.saved_prologue_counts = NULL;
4073}
4074
e0c9811a
JW		 4075static void
4076dot_label_state (dummy)
2434f565 4077 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4078{
4079 expressionS e;
4080
75e09913
JB		 4081 if (!in_body ("label_state"))
4082 return;
4083
e0c9811a
JW		 4084 parse_operand (&e);
4085 if (e.X_op != O_constant)
4086 {
4087 as_bad ("Operand to .label_state must be a constant");
4088 return;
4089 }
4090 add_unwind_entry (output_label_state (e.X_add_number));
6290819d 4091 save_prologue_count (e.X_add_number, unwind.prologue_count);
e0c9811a
JW		 4092}
4093
4094static void
4095dot_copy_state (dummy)
2434f565 4096 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4097{
4098 expressionS e;
4099
75e09913
JB		 4100 if (!in_body ("copy_state"))
4101 return;
4102
e0c9811a
JW		 4103 parse_operand (&e);
4104 if (e.X_op != O_constant)
4105 {
4106 as_bad ("Operand to .copy_state must be a constant");
4107 return;
4108 }
4109 add_unwind_entry (output_copy_state (e.X_add_number));
6290819d 4110 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
800eeca4
JW		 4111}
4112
197865e8 4113static void
800eeca4 4114dot_unwabi (dummy)
2434f565 4115 int dummy ATTRIBUTE_UNUSED;
800eeca4 4116{
e0c9811a
JW		 4117 expressionS e1, e2;
4118 unsigned char sep;
4119
75e09913
JB		 4120 if (!in_procedure ("unwabi"))
4121 return;
4122
e0c9811a
JW		 4123 sep = parse_operand (&e1);
4124 if (sep != ',')
4125 {
4126 as_bad ("Second operand to .unwabi missing");
4127 return;
4128 }
4129 sep = parse_operand (&e2);
4130 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4131 demand_empty_rest_of_line ();
e0c9811a
JW		 4132
4133 if (e1.X_op != O_constant)
4134 {
4135 as_bad ("First operand to .unwabi must be a constant");
4136 return;
4137 }
4138
4139 if (e2.X_op != O_constant)
4140 {
4141 as_bad ("Second operand to .unwabi must be a constant");
4142 return;
4143 }
4144
4145 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
800eeca4
JW		 4146}
4147
197865e8 4148static void
800eeca4 4149dot_personality (dummy)
2434f565 4150 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4151{
4152 char *name, *p, c;
75e09913
JB		 4153 if (!in_procedure ("personality"))
4154 return;
800eeca4
JW		 4155 SKIP_WHITESPACE ();
4156 name = input_line_pointer;
4157 c = get_symbol_end ();
4158 p = input_line_pointer;
e0c9811a 4159 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4160 unwind.force_unwind_entry = 1;
800eeca4
JW		 4161 *p = c;
4162 SKIP_WHITESPACE ();
4163 demand_empty_rest_of_line ();
4164}
4165
4166static void
4167dot_proc (dummy)
2434f565 4168 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4169{
4170 char *name, *p, c;
4171 symbolS *sym;
4172
75e09913 4173 unwind.proc_start = 0;
e0c9811a 4174 /* Parse names of main and alternate entry points and mark them as
542d6675 4175 function symbols: */
800eeca4
JW		 4176 while (1)
4177 {
4178 SKIP_WHITESPACE ();
4179 name = input_line_pointer;
4180 c = get_symbol_end ();
4181 p = input_line_pointer;
75e09913
JB		 4182 if (!*name)
4183 as_bad ("Empty argument of .proc");
4184 else
542d6675 4185 {
75e09913
JB		 4186 sym = symbol_find_or_make (name);
4187 if (S_IS_DEFINED (sym))
4188 as_bad ("`%s' was already defined", name);
4189 else if (unwind.proc_start == 0)
4190 {
4191 unwind.proc_start = sym;
4192 }
4193 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
800eeca4 4194 }
800eeca4
JW		 4195 *p = c;
4196 SKIP_WHITESPACE ();
4197 if (*input_line_pointer != ',')
4198 break;
4199 ++input_line_pointer;
4200 }
75e09913
JB		 4201 if (unwind.proc_start == 0)
4202 unwind.proc_start = expr_build_dot ();
800eeca4
JW		 4203 demand_empty_rest_of_line ();
4204 ia64_do_align (16);
4205
75e09913 4206 unwind.prologue = 0;
33d01f33 4207 unwind.prologue_count = 0;
75e09913
JB		 4208 unwind.body = 0;
4209 unwind.insn = 0;
e0c9811a
JW		 4210 unwind.list = unwind.tail = unwind.current_entry = NULL;
4211 unwind.personality_routine = 0;
800eeca4
JW		 4212}
4213
4214static void
4215dot_body (dummy)
2434f565 4216 int dummy ATTRIBUTE_UNUSED;
800eeca4 4217{
75e09913
JB		 4218 if (!in_procedure ("body"))
4219 return;
4220 if (!unwind.prologue && !unwind.body && unwind.insn)
4221 as_warn ("Initial .body should precede any instructions");
4222
e0c9811a 4223 unwind.prologue = 0;
30d25259 4224 unwind.prologue_mask = 0;
75e09913 4225 unwind.body = 1;
30d25259 4226
800eeca4 4227 add_unwind_entry (output_body ());
e0c9811a 4228 demand_empty_rest_of_line ();
800eeca4
JW		 4229}
4230
4231static void
4232dot_prologue (dummy)
2434f565 4233 int dummy ATTRIBUTE_UNUSED;
800eeca4 4234{
e0c9811a 4235 unsigned char sep;
2434f565 4236 int mask = 0, grsave = 0;
e0c9811a 4237
75e09913
JB		 4238 if (!in_procedure ("prologue"))
4239 return;
4240 if (unwind.prologue)
4241 {
4242 as_bad (".prologue within prologue");
4243 ignore_rest_of_line ();
4244 return;
4245 }
4246 if (!unwind.body && unwind.insn)
4247 as_warn ("Initial .prologue should precede any instructions");
4248
e0c9811a 4249 if (!is_it_end_of_statement ())
800eeca4
JW		 4250 {
4251 expressionS e1, e2;
800eeca4
JW		 4252 sep = parse_operand (&e1);
4253 if (sep != ',')
4254 as_bad ("No second operand to .prologue");
4255 sep = parse_operand (&e2);
e0c9811a 4256 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4257 demand_empty_rest_of_line ();
800eeca4
JW		 4258
4259 if (e1.X_op == O_constant)
542d6675 4260 {
30d25259
RH		 4261 mask = e1.X_add_number;
4262
800eeca4 4263 if (e2.X_op == O_constant)
30d25259
RH		 4264 grsave = e2.X_add_number;
4265 else if (e2.X_op == O_register
4266 && (grsave = e2.X_add_number - REG_GR) < 128)
4267 ;
800eeca4 4268 else
30d25259
RH		 4269 as_bad ("Second operand not a constant or general register");
4270
4271 add_unwind_entry (output_prologue_gr (mask, grsave));
800eeca4
JW		 4272 }
4273 else
4274 as_bad ("First operand not a constant");
4275 }
4276 else
4277 add_unwind_entry (output_prologue ());
30d25259
RH		 4278
4279 unwind.prologue = 1;
4280 unwind.prologue_mask = mask;
75e09913 4281 unwind.body = 0;
33d01f33 4282 ++unwind.prologue_count;
800eeca4
JW		 4283}
4284
4285static void
4286dot_endp (dummy)
2434f565 4287 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4288{
4289 expressionS e;
4290 unsigned char *ptr;
44f5c83a 4291 int bytes_per_address;
800eeca4
JW		 4292 long where;
4293 segT saved_seg;
4294 subsegT saved_subseg;
c538998c
JJ		 4295 char *name, *p, c;
4296 symbolS *sym;
800eeca4 4297
75e09913
JB		 4298 if (!in_procedure ("endp"))
4299 return;
4300
91a2ae2a
RH		 4301 if (unwind.saved_text_seg)
4302 {
4303 saved_seg = unwind.saved_text_seg;
4304 saved_subseg = unwind.saved_text_subseg;
4305 unwind.saved_text_seg = NULL;
4306 }
4307 else
4308 {
4309 saved_seg = now_seg;
4310 saved_subseg = now_subseg;
4311 }
4312
800eeca4 4313 insn_group_break (1, 0, 0);
800eeca4 4314
91a2ae2a
RH		 4315 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4316 if (!unwind.info)
2d6ed997 4317 generate_unwind_image (saved_seg);
800eeca4 4318
91a2ae2a
RH		 4319 if (unwind.info || unwind.force_unwind_entry)
4320 {
75e09913
JB		 4321 symbolS *proc_end;
4322
91a2ae2a 4323 subseg_set (md.last_text_seg, 0);
75e09913 4324 proc_end = expr_build_dot ();
5e7474a7 4325
d6afba4b 4326 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
5e7474a7 4327
557debba
JW		 4328 /* Make sure that section has 4 byte alignment for ILP32 and
4329 8 byte alignment for LP64. */
4330 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4331
557debba
JW		 4332 /* Need space for 3 pointers for procedure start, procedure end,
4333 and unwind info. */
4334 ptr = frag_more (3 * md.pointer_size);
4335 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4336 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4337
40449e9f 4338 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4339 e.X_op = O_pseudo_fixup;
4340 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4341 e.X_add_number = 0;
4342 e.X_add_symbol = unwind.proc_start;
4343 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4344
800eeca4
JW		 4345 e.X_op = O_pseudo_fixup;
4346 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4347 e.X_add_number = 0;
75e09913 4348 e.X_add_symbol = proc_end;
91a2ae2a
RH		 4349 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4350 bytes_per_address, &e);
4351
4352 if (unwind.info)
4353 {
4354 e.X_op = O_pseudo_fixup;
4355 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4356 e.X_add_number = 0;
4357 e.X_add_symbol = unwind.info;
4358 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4359 bytes_per_address, &e);
4360 }
4361 else
4362 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4363 bytes_per_address);
800eeca4 4364
91a2ae2a 4365 }
d6afba4b
JJ		 4366 else
4367 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4368
800eeca4 4369 subseg_set (saved_seg, saved_subseg);
c538998c
JJ		 4370
4371 /* Parse names of main and alternate entry points and set symbol sizes. */
4372 while (1)
4373 {
4374 SKIP_WHITESPACE ();
4375 name = input_line_pointer;
4376 c = get_symbol_end ();
4377 p = input_line_pointer;
75e09913
JB		 4378 if (!*name)
4379 as_bad ("Empty argument of .endp");
4380 else
4381 {
4382 sym = symbol_find (name);
4383 if (!sym || !S_IS_DEFINED (sym))
4384 as_bad ("`%s' was not defined within procedure", name);
4385 else if (unwind.proc_start
4386 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4387 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4388 {
4389 fragS *fr = symbol_get_frag (unwind.proc_start);
4390 fragS *frag = symbol_get_frag (sym);
4391
4392 /* Check whether the function label is at or beyond last
4393 .proc directive. */
4394 while (fr && fr != frag)
4395 fr = fr->fr_next;
4396 if (fr)
c538998c 4397 {
75e09913
JB		 4398 if (frag == frag_now && SEG_NORMAL (now_seg))
4399 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4400 else
4401 {
4402 symbol_get_obj (sym)->size =
4403 (expressionS *) xmalloc (sizeof (expressionS));
4404 symbol_get_obj (sym)->size->X_op = O_subtract;
4405 symbol_get_obj (sym)->size->X_add_symbol
4406 = symbol_new (FAKE_LABEL_NAME, now_seg,
4407 frag_now_fix (), frag_now);
4408 symbol_get_obj (sym)->size->X_op_symbol = sym;
4409 symbol_get_obj (sym)->size->X_add_number = 0;
4410 }
c538998c
JJ		 4411 }
4412 }
4413 }
4414 *p = c;
4415 SKIP_WHITESPACE ();
4416 if (*input_line_pointer != ',')
4417 break;
4418 ++input_line_pointer;
4419 }
4420 demand_empty_rest_of_line ();
75e09913 4421 unwind.proc_start = unwind.info = 0;
800eeca4
JW		 4422}
4423
4424static void
4425dot_template (template)
4426 int template;
4427{
4428 CURR_SLOT.user_template = template;
4429}
4430
4431static void
4432dot_regstk (dummy)
2434f565 4433 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4434{
4435 int ins, locs, outs, rots;
4436
4437 if (is_it_end_of_statement ())
4438 ins = locs = outs = rots = 0;
4439 else
4440 {
4441 ins = get_absolute_expression ();
4442 if (*input_line_pointer++ != ',')
4443 goto err;
4444 locs = get_absolute_expression ();
4445 if (*input_line_pointer++ != ',')
4446 goto err;
4447 outs = get_absolute_expression ();
4448 if (*input_line_pointer++ != ',')
4449 goto err;
4450 rots = get_absolute_expression ();
4451 }
4452 set_regstack (ins, locs, outs, rots);
4453 return;
4454
4455 err:
4456 as_bad ("Comma expected");
4457 ignore_rest_of_line ();
4458}
4459
4460static void
4461dot_rot (type)
4462 int type;
4463{
4464 unsigned num_regs, num_alloced = 0;
4465 struct dynreg **drpp, *dr;
4466 int ch, base_reg = 0;
4467 char *name, *start;
4468 size_t len;
4469
4470 switch (type)
4471 {
4472 case DYNREG_GR: base_reg = REG_GR + 32; break;
4473 case DYNREG_FR: base_reg = REG_FR + 32; break;
4474 case DYNREG_PR: base_reg = REG_P + 16; break;
4475 default: break;
4476 }
4477
542d6675 4478 /* First, remove existing names from hash table. */
800eeca4
JW		 4479 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4480 {
4481 hash_delete (md.dynreg_hash, dr->name);
4482 dr->num_regs = 0;
4483 }
4484
4485 drpp = &md.dynreg[type];
4486 while (1)
4487 {
4488 start = input_line_pointer;
4489 ch = get_symbol_end ();
4490 *input_line_pointer = ch;
4491 len = (input_line_pointer - start);
4492
4493 SKIP_WHITESPACE ();
4494 if (*input_line_pointer != '[')
4495 {
4496 as_bad ("Expected '['");
4497 goto err;
4498 }
4499 ++input_line_pointer; /* skip '[' */
4500
4501 num_regs = get_absolute_expression ();
4502
4503 if (*input_line_pointer++ != ']')
4504 {
4505 as_bad ("Expected ']'");
4506 goto err;
4507 }
4508 SKIP_WHITESPACE ();
4509
4510 num_alloced += num_regs;
4511 switch (type)
4512 {
4513 case DYNREG_GR:
4514 if (num_alloced > md.rot.num_regs)
4515 {
4516 as_bad ("Used more than the declared %d rotating registers",
4517 md.rot.num_regs);
4518 goto err;
4519 }
4520 break;
4521 case DYNREG_FR:
4522 if (num_alloced > 96)
4523 {
4524 as_bad ("Used more than the available 96 rotating registers");
4525 goto err;
4526 }
4527 break;
4528 case DYNREG_PR:
4529 if (num_alloced > 48)
4530 {
4531 as_bad ("Used more than the available 48 rotating registers");
4532 goto err;
4533 }
4534 break;
4535
4536 default:
4537 break;
4538 }
4539
4540 name = obstack_alloc (&notes, len + 1);
4541 memcpy (name, start, len);
4542 name[len] = '\0';
4543
4544 if (!*drpp)
4545 {
4546 *drpp = obstack_alloc (&notes, sizeof (*dr));
4547 memset (*drpp, 0, sizeof (*dr));
4548 }
4549
4550 dr = *drpp;
4551 dr->name = name;
4552 dr->num_regs = num_regs;
4553 dr->base = base_reg;
4554 drpp = &dr->next;
4555 base_reg += num_regs;
4556
4557 if (hash_insert (md.dynreg_hash, name, dr))
4558 {
4559 as_bad ("Attempt to redefine register set `%s'", name);
4560 goto err;
4561 }
4562
4563 if (*input_line_pointer != ',')
4564 break;
4565 ++input_line_pointer; /* skip comma */
4566 SKIP_WHITESPACE ();
4567 }
4568 demand_empty_rest_of_line ();
4569 return;
4570
4571 err:
4572 ignore_rest_of_line ();
4573}
4574
4575static void
4576dot_byteorder (byteorder)
4577 int byteorder;
4578{
10a98291
L		 4579 segment_info_type *seginfo = seg_info (now_seg);
4580
4581 if (byteorder == -1)
4582 {
4583 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4584 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4585 byteorder = seginfo->tc_segment_info_data.endian == 1;
4586 }
4587 else
4588 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4589
4590 if (target_big_endian != byteorder)
4591 {
4592 target_big_endian = byteorder;
4593 if (target_big_endian)
4594 {
4595 ia64_number_to_chars = number_to_chars_bigendian;
4596 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4597 }
4598 else
4599 {
4600 ia64_number_to_chars = number_to_chars_littleendian;
4601 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4602 }
4603 }
800eeca4
JW		 4604}
4605
4606static void
4607dot_psr (dummy)
2434f565 4608 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4609{
4610 char *option;
4611 int ch;
4612
4613 while (1)
4614 {
4615 option = input_line_pointer;
4616 ch = get_symbol_end ();
4617 if (strcmp (option, "lsb") == 0)
4618 md.flags &= ~EF_IA_64_BE;
4619 else if (strcmp (option, "msb") == 0)
4620 md.flags |= EF_IA_64_BE;
4621 else if (strcmp (option, "abi32") == 0)
4622 md.flags &= ~EF_IA_64_ABI64;
4623 else if (strcmp (option, "abi64") == 0)
4624 md.flags |= EF_IA_64_ABI64;
4625 else
4626 as_bad ("Unknown psr option `%s'", option);
4627 *input_line_pointer = ch;
4628
4629 SKIP_WHITESPACE ();
4630 if (*input_line_pointer != ',')
4631 break;
4632
4633 ++input_line_pointer;
4634 SKIP_WHITESPACE ();
4635 }
4636 demand_empty_rest_of_line ();
4637}
4638
800eeca4
JW		 4639static void
4640dot_ln (dummy)
2434f565 4641 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4642{
4643 new_logical_line (0, get_absolute_expression ());
4644 demand_empty_rest_of_line ();
4645}
4646
542d6675 4647static char *
800eeca4
JW		 4648parse_section_name ()
4649{
4650 char *name;
4651 int len;
4652
4653 SKIP_WHITESPACE ();
b3f19c14
JB		 4654 if (*input_line_pointer == '"')
4655 name = demand_copy_C_string (&len);
4656 else
800eeca4 4657 {
b3f19c14
JB		 4658 char *start = input_line_pointer;
4659 char c = get_symbol_end ();
4660
4661 if (input_line_pointer == start)
4662 {
4663 as_bad ("Missing section name");
4664 ignore_rest_of_line ();
4665 return 0;
4666 }
4667 name = obstack_copy (&notes, start, input_line_pointer - start + 1);
4668 *input_line_pointer = c;
800eeca4 4669 }
800eeca4
JW		 4670 if (!name)
4671 {
4672 ignore_rest_of_line ();
4673 return 0;
4674 }
4675 SKIP_WHITESPACE ();
4676 if (*input_line_pointer != ',')
4677 {
4678 as_bad ("Comma expected after section name");
4679 ignore_rest_of_line ();
4680 return 0;
4681 }
4682 ++input_line_pointer; /* skip comma */
4683 return name;
4684}
4685
4686static void
4687dot_xdata (size)
4688 int size;
4689{
4690 char *name = parse_section_name ();
4691 if (!name)
4692 return;
4693
4d5a53ff 4694 md.keep_pending_output = 1;
800eeca4 4695 set_section (name);
b3f19c14 4696 obstack_free (&notes, name);
800eeca4
JW		 4697 cons (size);
4698 obj_elf_previous (0);
4d5a53ff 4699 md.keep_pending_output = 0;
800eeca4
JW		 4700}
4701
4702/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 4703
800eeca4
JW		 4704static void
4705stmt_float_cons (kind)
4706 int kind;
4707{
165a7f90 4708 size_t alignment;
800eeca4
JW		 4709
4710 switch (kind)
4711 {
165a7f90
L		 4712 case 'd':
4713 alignment = 8;
4714 break;
4715
4716 case 'x':
4717 case 'X':
4718 alignment = 16;
4719 break;
800eeca4
JW		 4720
4721 case 'f':
4722 default:
165a7f90 4723 alignment = 4;
800eeca4
JW		 4724 break;
4725 }
165a7f90 4726 ia64_do_align (alignment);
800eeca4
JW		 4727 float_cons (kind);
4728}
4729
4730static void
4731stmt_cons_ua (size)
4732 int size;
4733{
4734 int saved_auto_align = md.auto_align;
4735
4736 md.auto_align = 0;
4737 cons (size);
4738 md.auto_align = saved_auto_align;
4739}
4740
4741static void
4742dot_xfloat_cons (kind)
4743 int kind;
4744{
4745 char *name = parse_section_name ();
4746 if (!name)
4747 return;
4748
4d5a53ff 4749 md.keep_pending_output = 1;
800eeca4 4750 set_section (name);
b3f19c14 4751 obstack_free (&notes, name);
800eeca4
JW		 4752 stmt_float_cons (kind);
4753 obj_elf_previous (0);
4d5a53ff 4754 md.keep_pending_output = 0;
800eeca4
JW		 4755}
4756
4757static void
4758dot_xstringer (zero)
4759 int zero;
4760{
4761 char *name = parse_section_name ();
4762 if (!name)
4763 return;
4764
4d5a53ff 4765 md.keep_pending_output = 1;
800eeca4 4766 set_section (name);
b3f19c14 4767 obstack_free (&notes, name);
800eeca4
JW		 4768 stringer (zero);
4769 obj_elf_previous (0);
4d5a53ff 4770 md.keep_pending_output = 0;
800eeca4
JW		 4771}
4772
4773static void
4774dot_xdata_ua (size)
4775 int size;
4776{
4777 int saved_auto_align = md.auto_align;
4778 char *name = parse_section_name ();
4779 if (!name)
4780 return;
4781
4d5a53ff 4782 md.keep_pending_output = 1;
800eeca4 4783 set_section (name);
b3f19c14 4784 obstack_free (&notes, name);
800eeca4
JW		 4785 md.auto_align = 0;
4786 cons (size);
4787 md.auto_align = saved_auto_align;
4788 obj_elf_previous (0);
4d5a53ff 4789 md.keep_pending_output = 0;
800eeca4
JW		 4790}
4791
4792static void
4793dot_xfloat_cons_ua (kind)
4794 int kind;
4795{
4796 int saved_auto_align = md.auto_align;
4797 char *name = parse_section_name ();
4798 if (!name)
4799 return;
4800
4d5a53ff 4801 md.keep_pending_output = 1;
800eeca4 4802 set_section (name);
b3f19c14 4803 obstack_free (&notes, name);
800eeca4
JW		 4804 md.auto_align = 0;
4805 stmt_float_cons (kind);
4806 md.auto_align = saved_auto_align;
4807 obj_elf_previous (0);
4d5a53ff 4808 md.keep_pending_output = 0;
800eeca4
JW		 4809}
4810
4811/* .reg.val <regname>,value */
542d6675 4812
800eeca4
JW		 4813static void
4814dot_reg_val (dummy)
2434f565 4815 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4816{
4817 expressionS reg;
4818
4819 expression (&reg);
4820 if (reg.X_op != O_register)
4821 {
4822 as_bad (_("Register name expected"));
4823 ignore_rest_of_line ();
4824 }
4825 else if (*input_line_pointer++ != ',')
4826 {
4827 as_bad (_("Comma expected"));
4828 ignore_rest_of_line ();
4829 }
197865e8 4830 else
800eeca4
JW		 4831 {
4832 valueT value = get_absolute_expression ();
4833 int regno = reg.X_add_number;
542d6675
KH		 4834 if (regno < REG_GR || regno > REG_GR + 128)
4835 as_warn (_("Register value annotation ignored"));
800eeca4 4836 else
542d6675
KH		 4837 {
4838 gr_values[regno - REG_GR].known = 1;
4839 gr_values[regno - REG_GR].value = value;
4840 gr_values[regno - REG_GR].path = md.path;
4841 }
800eeca4
JW		 4842 }
4843 demand_empty_rest_of_line ();
4844}
4845
5e819f9c
JW		 4846/*
4847 .serialize.data
4848 .serialize.instruction
4849 */
4850static void
4851dot_serialize (type)
4852 int type;
4853{
4854 insn_group_break (0, 0, 0);
4855 if (type)
4856 instruction_serialization ();
4857 else
4858 data_serialization ();
4859 insn_group_break (0, 0, 0);
4860 demand_empty_rest_of_line ();
4861}
4862
197865e8 4863/* select dv checking mode
800eeca4
JW		 4864 .auto
4865 .explicit
4866 .default
4867
197865e8 4868 A stop is inserted when changing modes
800eeca4 4869 */
542d6675 4870
800eeca4
JW		 4871static void
4872dot_dv_mode (type)
542d6675 4873 int type;
800eeca4
JW		 4874{
4875 if (md.manual_bundling)
4876 as_warn (_("Directive invalid within a bundle"));
4877
4878 if (type == 'E' || type == 'A')
4879 md.mode_explicitly_set = 0;
4880 else
4881 md.mode_explicitly_set = 1;
4882
4883 md.detect_dv = 1;
4884 switch (type)
4885 {
4886 case 'A':
4887 case 'a':
4888 if (md.explicit_mode)
542d6675 4889 insn_group_break (1, 0, 0);
800eeca4
JW		 4890 md.explicit_mode = 0;
4891 break;
4892 case 'E':
4893 case 'e':
4894 if (!md.explicit_mode)
542d6675 4895 insn_group_break (1, 0, 0);
800eeca4
JW		 4896 md.explicit_mode = 1;
4897 break;
4898 default:
4899 case 'd':
4900 if (md.explicit_mode != md.default_explicit_mode)
542d6675 4901 insn_group_break (1, 0, 0);
800eeca4
JW		 4902 md.explicit_mode = md.default_explicit_mode;
4903 md.mode_explicitly_set = 0;
4904 break;
4905 }
4906}
4907
4908static void
4909print_prmask (mask)
542d6675 4910 valueT mask;
800eeca4
JW		 4911{
4912 int regno;
4913 char *comma = "";
542d6675 4914 for (regno = 0; regno < 64; regno++)
800eeca4 4915 {
542d6675
KH		 4916 if (mask & ((valueT) 1 << regno))
4917 {
4918 fprintf (stderr, "%s p%d", comma, regno);
4919 comma = ",";
4920 }
800eeca4
JW		 4921 }
4922}
4923
4924/*
05ee4b0f
JB		 4925 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4926 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4927 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
800eeca4
JW		 4928 .pred.safe_across_calls p1 [, p2 [,...]]
4929 */
542d6675 4930
800eeca4
JW		 4931static void
4932dot_pred_rel (type)
542d6675 4933 int type;
800eeca4
JW		 4934{
4935 valueT mask = 0;
4936 int count = 0;
4937 int p1 = -1, p2 = -1;
4938
4939 if (type == 0)
4940 {
05ee4b0f 4941 if (*input_line_pointer == '"')
542d6675
KH		 4942 {
4943 int len;
4944 char *form = demand_copy_C_string (&len);
05ee4b0f 4945
542d6675
KH		 4946 if (strcmp (form, "mutex") == 0)
4947 type = 'm';
4948 else if (strcmp (form, "clear") == 0)
4949 type = 'c';
4950 else if (strcmp (form, "imply") == 0)
4951 type = 'i';
05ee4b0f
JB		 4952 obstack_free (&notes, form);
4953 }
4954 else if (*input_line_pointer == '@')
4955 {
4956 char *form = ++input_line_pointer;
4957 char c = get_symbol_end();
4958
4959 if (strcmp (form, "mutex") == 0)
4960 type = 'm';
4961 else if (strcmp (form, "clear") == 0)
4962 type = 'c';
4963 else if (strcmp (form, "imply") == 0)
4964 type = 'i';
4965 *input_line_pointer = c;
4966 }
4967 else
4968 {
4969 as_bad (_("Missing predicate relation type"));
4970 ignore_rest_of_line ();
4971 return;
4972 }
4973 if (type == 0)
4974 {
4975 as_bad (_("Unrecognized predicate relation type"));
4976 ignore_rest_of_line ();
4977 return;
542d6675 4978 }
800eeca4 4979 if (*input_line_pointer == ',')
542d6675 4980 ++input_line_pointer;
800eeca4
JW		 4981 SKIP_WHITESPACE ();
4982 }
4983
4984 SKIP_WHITESPACE ();
4985 while (1)
4986 {
4987 valueT bit = 1;
4988 int regno;
197865e8 4989
3882b010 4990 if (TOUPPER (*input_line_pointer) != 'P'
542d6675
KH		 4991 || (regno = atoi (++input_line_pointer)) < 0
4992 || regno > 63)
4993 {
4994 as_bad (_("Predicate register expected"));
4995 ignore_rest_of_line ();
4996 return;
4997 }
3882b010 4998 while (ISDIGIT (*input_line_pointer))
542d6675 4999 ++input_line_pointer;
800eeca4 5000 if (p1 == -1)
542d6675 5001 p1 = regno;
800eeca4 5002 else if (p2 == -1)
542d6675 5003 p2 = regno;
800eeca4
JW		 5004 bit <<= regno;
5005 if (mask & bit)
542d6675
KH		 5006 as_warn (_("Duplicate predicate register ignored"));
5007 mask |= bit;
5008 count++;
5009 /* See if it's a range. */
800eeca4 5010 if (*input_line_pointer == '-')
542d6675
KH		 5011 {
5012 valueT stop = 1;
5013 ++input_line_pointer;
5014
3882b010 5015 if (TOUPPER (*input_line_pointer) != 'P'
542d6675
KH		 5016 || (regno = atoi (++input_line_pointer)) < 0
5017 || regno > 63)
5018 {
5019 as_bad (_("Predicate register expected"));
5020 ignore_rest_of_line ();
5021 return;
5022 }
3882b010 5023 while (ISDIGIT (*input_line_pointer))
542d6675
KH		 5024 ++input_line_pointer;
5025 stop <<= regno;
5026 if (bit >= stop)
5027 {
5028 as_bad (_("Bad register range"));
5029 ignore_rest_of_line ();
5030 return;
5031 }
5032 while (bit < stop)
5033 {
5034 bit <<= 1;
5035 mask |= bit;
5036 count++;
5037 }
5038 SKIP_WHITESPACE ();
5039 }
800eeca4 5040 if (*input_line_pointer != ',')
542d6675 5041 break;
800eeca4
JW		 5042 ++input_line_pointer;
5043 SKIP_WHITESPACE ();
5044 }
5045
5046 switch (type)
5047 {
5048 case 'c':
5049 if (count == 0)
542d6675 5050 mask = ~(valueT) 0;
800eeca4 5051 clear_qp_mutex (mask);
197865e8 5052 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 5053 break;
5054 case 'i':
5055 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 5056 as_bad (_("Predicate source and target required"));
800eeca4 5057 else if (p1 == 0 || p2 == 0)
542d6675 5058 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 5059 else
542d6675 5060 add_qp_imply (p1, p2);
800eeca4
JW		 5061 break;
5062 case 'm':
5063 if (count < 2)
542d6675
KH		 5064 {
5065 as_bad (_("At least two PR arguments expected"));
5066 break;
5067 }
800eeca4 5068 else if (mask & 1)
542d6675
KH		 5069 {
5070 as_bad (_("Use of p0 is not valid in this context"));
5071 break;
5072 }
800eeca4
JW		 5073 add_qp_mutex (mask);
5074 break;
5075 case 's':
5076 /* note that we don't override any existing relations */
5077 if (count == 0)
542d6675
KH		 5078 {
5079 as_bad (_("At least one PR argument expected"));
5080 break;
5081 }
800eeca4 5082 if (md.debug_dv)
542d6675
KH		 5083 {
5084 fprintf (stderr, "Safe across calls: ");
5085 print_prmask (mask);
5086 fprintf (stderr, "\n");
5087 }
800eeca4
JW		 5088 qp_safe_across_calls = mask;
5089 break;
5090 }
5091 demand_empty_rest_of_line ();
5092}
5093
5094/* .entry label [, label [, ...]]
5095 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 5096 Otherwise, only global labels are considered entry points. */
5097
800eeca4
JW		 5098static void
5099dot_entry (dummy)
2434f565 5100 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5101{
5102 const char *err;
5103 char *name;
5104 int c;
5105 symbolS *symbolP;
5106
5107 do
5108 {
5109 name = input_line_pointer;
5110 c = get_symbol_end ();
5111 symbolP = symbol_find_or_make (name);
5112
5113 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5114 if (err)
542d6675
KH		 5115 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5116 name, err);
800eeca4
JW		 5117
5118 *input_line_pointer = c;
5119 SKIP_WHITESPACE ();
5120 c = *input_line_pointer;
5121 if (c == ',')
5122 {
5123 input_line_pointer++;
5124 SKIP_WHITESPACE ();
5125 if (*input_line_pointer == '\n')
5126 c = '\n';
5127 }
5128 }
5129 while (c == ',');
5130
5131 demand_empty_rest_of_line ();
5132}
5133
197865e8 5134/* .mem.offset offset, base
542d6675
KH		 5135 "base" is used to distinguish between offsets from a different base. */
5136
800eeca4
JW		 5137static void
5138dot_mem_offset (dummy)
2434f565 5139 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 5140{
5141 md.mem_offset.hint = 1;
5142 md.mem_offset.offset = get_absolute_expression ();
5143 if (*input_line_pointer != ',')
5144 {
5145 as_bad (_("Comma expected"));
5146 ignore_rest_of_line ();
5147 return;
5148 }
5149 ++input_line_pointer;
5150 md.mem_offset.base = get_absolute_expression ();
5151 demand_empty_rest_of_line ();
5152}
5153
542d6675 5154/* ia64-specific pseudo-ops: */
800eeca4
JW		 5155const pseudo_typeS md_pseudo_table[] =
5156 {
5157 { "radix", dot_radix, 0 },
5158 { "lcomm", s_lcomm_bytes, 1 },
196e8040 5159 { "loc", dot_loc, 0 },
800eeca4
JW		 5160 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5161 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5162 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5163 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5164 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5165 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5166 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5167 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5168 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5169 { "proc", dot_proc, 0 },
5170 { "body", dot_body, 0 },
5171 { "prologue", dot_prologue, 0 },
2434f565 5172 { "endp", dot_endp, 0 },
2434f565
JW		 5173
5174 { "fframe", dot_fframe, 0 },
5175 { "vframe", dot_vframe, 0 },
5176 { "vframesp", dot_vframesp, 0 },
5177 { "vframepsp", dot_vframepsp, 0 },
5178 { "save", dot_save, 0 },
5179 { "restore", dot_restore, 0 },
5180 { "restorereg", dot_restorereg, 0 },
5181 { "restorereg.p", dot_restorereg_p, 0 },
5182 { "handlerdata", dot_handlerdata, 0 },
5183 { "unwentry", dot_unwentry, 0 },
5184 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5185 { "savesp", dot_savemem, 0 },
5186 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5187 { "save.g", dot_saveg, 0 },
5188 { "save.f", dot_savef, 0 },
5189 { "save.b", dot_saveb, 0 },
5190 { "save.gf", dot_savegf, 0 },
5191 { "spill", dot_spill, 0 },
5192 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5193 { "spillsp", dot_spillmem, 0 },
5194 { "spillpsp", dot_spillmem, 1 },
2434f565 5195 { "spillreg.p", dot_spillreg_p, 0 },
e0c9811a
JW		 5196 { "spillsp.p", dot_spillmem_p, 0 },
5197 { "spillpsp.p", dot_spillmem_p, 1 },
2434f565
JW		 5198 { "label_state", dot_label_state, 0 },
5199 { "copy_state", dot_copy_state, 0 },
5200 { "unwabi", dot_unwabi, 0 },
5201 { "personality", dot_personality, 0 },
800eeca4
JW		 5202 { "mii", dot_template, 0x0 },
5203 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5204 { "mlx", dot_template, 0x2 },
5205 { "mmi", dot_template, 0x4 },
5206 { "mfi", dot_template, 0x6 },
5207 { "mmf", dot_template, 0x7 },
5208 { "mib", dot_template, 0x8 },
5209 { "mbb", dot_template, 0x9 },
5210 { "bbb", dot_template, 0xb },
5211 { "mmb", dot_template, 0xc },
5212 { "mfb", dot_template, 0xe },
d9201763 5213 { "align", dot_align, 0 },
800eeca4
JW		 5214 { "regstk", dot_regstk, 0 },
5215 { "rotr", dot_rot, DYNREG_GR },
5216 { "rotf", dot_rot, DYNREG_FR },
5217 { "rotp", dot_rot, DYNREG_PR },
5218 { "lsb", dot_byteorder, 0 },
5219 { "msb", dot_byteorder, 1 },
5220 { "psr", dot_psr, 0 },
5221 { "alias", dot_alias, 0 },
35f5df7f 5222 { "secalias", dot_alias, 1 },
800eeca4
JW		 5223 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5224
5225 { "xdata1", dot_xdata, 1 },
5226 { "xdata2", dot_xdata, 2 },
5227 { "xdata4", dot_xdata, 4 },
5228 { "xdata8", dot_xdata, 8 },
b3f19c14 5229 { "xdata16", dot_xdata, 16 },
800eeca4
JW		 5230 { "xreal4", dot_xfloat_cons, 'f' },
5231 { "xreal8", dot_xfloat_cons, 'd' },
5232 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5233 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5234 { "xstring", dot_xstringer, 0 },
5235 { "xstringz", dot_xstringer, 1 },
5236
542d6675 5237 /* unaligned versions: */
800eeca4
JW		 5238 { "xdata2.ua", dot_xdata_ua, 2 },
5239 { "xdata4.ua", dot_xdata_ua, 4 },
5240 { "xdata8.ua", dot_xdata_ua, 8 },
b3f19c14 5241 { "xdata16.ua", dot_xdata_ua, 16 },
800eeca4
JW		 5242 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5243 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5244 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5245 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5246
5247 /* annotations/DV checking support */
5248 { "entry", dot_entry, 0 },
2434f565 5249 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5250 { "pred.rel", dot_pred_rel, 0 },
5251 { "pred.rel.clear", dot_pred_rel, 'c' },
5252 { "pred.rel.imply", dot_pred_rel, 'i' },
5253 { "pred.rel.mutex", dot_pred_rel, 'm' },
5254 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5255 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5256 { "serialize.data", dot_serialize, 0 },
5257 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5258 { "auto", dot_dv_mode, 'a' },
5259 { "explicit", dot_dv_mode, 'e' },
5260 { "default", dot_dv_mode, 'd' },
5261
87885043
JW		 5262 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5263 IA-64 aligns data allocation pseudo-ops by default, so we have to
5264 tell it that these ones are supposed to be unaligned. Long term,
5265 should rewrite so that only IA-64 specific data allocation pseudo-ops
5266 are aligned by default. */
5267 {"2byte", stmt_cons_ua, 2},
5268 {"4byte", stmt_cons_ua, 4},
5269 {"8byte", stmt_cons_ua, 8},
5270
800eeca4
JW		 5271 { NULL, 0, 0 }
5272 };
5273
5274static const struct pseudo_opcode
5275 {
5276 const char *name;
5277 void (*handler) (int);
5278 int arg;
5279 }
5280pseudo_opcode[] =
5281 {
5282 /* these are more like pseudo-ops, but don't start with a dot */
5283 { "data1", cons, 1 },
5284 { "data2", cons, 2 },
5285 { "data4", cons, 4 },
5286 { "data8", cons, 8 },
3969b680 5287 { "data16", cons, 16 },
800eeca4
JW		 5288 { "real4", stmt_float_cons, 'f' },
5289 { "real8", stmt_float_cons, 'd' },
5290 { "real10", stmt_float_cons, 'x' },
165a7f90 5291 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5292 { "string", stringer, 0 },
5293 { "stringz", stringer, 1 },
5294
542d6675 5295 /* unaligned versions: */
800eeca4
JW		 5296 { "data2.ua", stmt_cons_ua, 2 },
5297 { "data4.ua", stmt_cons_ua, 4 },
5298 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5299 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5300 { "real4.ua", float_cons, 'f' },
5301 { "real8.ua", float_cons, 'd' },
5302 { "real10.ua", float_cons, 'x' },
165a7f90 5303 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5304 };
5305
5306/* Declare a register by creating a symbol for it and entering it in
5307 the symbol table. */
542d6675
KH		 5308
5309static symbolS *
800eeca4
JW		 5310declare_register (name, regnum)
5311 const char *name;
5312 int regnum;
5313{
5314 const char *err;
5315 symbolS *sym;
5316
5317 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5318
5319 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5320 if (err)
5321 as_fatal ("Inserting \"%s\" into register table failed: %s",
5322 name, err);
5323
5324 return sym;
5325}
5326
5327static void
5328declare_register_set (prefix, num_regs, base_regnum)
5329 const char *prefix;
5330 int num_regs;
5331 int base_regnum;
5332{
5333 char name[8];
5334 int i;
5335
5336 for (i = 0; i < num_regs; ++i)
5337 {
5338 sprintf (name, "%s%u", prefix, i);
5339 declare_register (name, base_regnum + i);
5340 }
5341}
5342
5343static unsigned int
5344operand_width (opnd)
5345 enum ia64_opnd opnd;
5346{
5347 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5348 unsigned int bits = 0;
5349 int i;
5350
5351 bits = 0;
5352 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5353 bits += odesc->field[i].bits;
5354
5355 return bits;
5356}
5357
87f8eb97 5358static enum operand_match_result
800eeca4
JW		 5359operand_match (idesc, index, e)
5360 const struct ia64_opcode *idesc;
5361 int index;
5362 expressionS *e;
5363{
5364 enum ia64_opnd opnd = idesc->operands[index];
5365 int bits, relocatable = 0;
5366 struct insn_fix *fix;
5367 bfd_signed_vma val;
5368
5369 switch (opnd)
5370 {
542d6675 5371 /* constants: */
800eeca4
JW		 5372
5373 case IA64_OPND_AR_CCV:
5374 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5375 return OPERAND_MATCH;
800eeca4
JW		 5376 break;
5377
c10d9d8f
JW		 5378 case IA64_OPND_AR_CSD:
5379 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5380 return OPERAND_MATCH;
5381 break;
5382
800eeca4
JW		 5383 case IA64_OPND_AR_PFS:
5384 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5385 return OPERAND_MATCH;
800eeca4
JW		 5386 break;
5387
5388 case IA64_OPND_GR0:
5389 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5390 return OPERAND_MATCH;
800eeca4
JW		 5391 break;
5392
5393 case IA64_OPND_IP:
5394 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5395 return OPERAND_MATCH;
800eeca4
JW		 5396 break;
5397
5398 case IA64_OPND_PR:
5399 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5400 return OPERAND_MATCH;
800eeca4
JW		 5401 break;
5402
5403 case IA64_OPND_PR_ROT:
5404 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5405 return OPERAND_MATCH;
800eeca4
JW		 5406 break;
5407
5408 case IA64_OPND_PSR:
5409 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5410 return OPERAND_MATCH;
800eeca4
JW		 5411 break;
5412
5413 case IA64_OPND_PSR_L:
5414 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5415 return OPERAND_MATCH;
800eeca4
JW		 5416 break;
5417
5418 case IA64_OPND_PSR_UM:
5419 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5420 return OPERAND_MATCH;
800eeca4
JW		 5421 break;
5422
5423 case IA64_OPND_C1:
87f8eb97
JW		 5424 if (e->X_op == O_constant)
5425 {
5426 if (e->X_add_number == 1)
5427 return OPERAND_MATCH;
5428 else
5429 return OPERAND_OUT_OF_RANGE;
5430 }
800eeca4
JW		 5431 break;
5432
5433 case IA64_OPND_C8:
87f8eb97
JW		 5434 if (e->X_op == O_constant)
5435 {
5436 if (e->X_add_number == 8)
5437 return OPERAND_MATCH;
5438 else
5439 return OPERAND_OUT_OF_RANGE;
5440 }
800eeca4
JW		 5441 break;
5442
5443 case IA64_OPND_C16:
87f8eb97
JW		 5444 if (e->X_op == O_constant)
5445 {
5446 if (e->X_add_number == 16)
5447 return OPERAND_MATCH;
5448 else
5449 return OPERAND_OUT_OF_RANGE;
5450 }
800eeca4
JW		 5451 break;
5452
542d6675 5453 /* register operands: */
800eeca4
JW		 5454
5455 case IA64_OPND_AR3:
5456 if (e->X_op == O_register && e->X_add_number >= REG_AR
5457 && e->X_add_number < REG_AR + 128)
87f8eb97 5458 return OPERAND_MATCH;
800eeca4
JW		 5459 break;
5460
5461 case IA64_OPND_B1:
5462 case IA64_OPND_B2:
5463 if (e->X_op == O_register && e->X_add_number >= REG_BR
5464 && e->X_add_number < REG_BR + 8)
87f8eb97 5465 return OPERAND_MATCH;
800eeca4
JW		 5466 break;
5467
5468 case IA64_OPND_CR3:
5469 if (e->X_op == O_register && e->X_add_number >= REG_CR
5470 && e->X_add_number < REG_CR + 128)
87f8eb97 5471 return OPERAND_MATCH;
800eeca4
JW		 5472 break;
5473
5474 case IA64_OPND_F1:
5475 case IA64_OPND_F2:
5476 case IA64_OPND_F3:
5477 case IA64_OPND_F4:
5478 if (e->X_op == O_register && e->X_add_number >= REG_FR
5479 && e->X_add_number < REG_FR + 128)
87f8eb97 5480 return OPERAND_MATCH;
800eeca4
JW		 5481 break;
5482
5483 case IA64_OPND_P1:
5484 case IA64_OPND_P2:
5485 if (e->X_op == O_register && e->X_add_number >= REG_P
5486 && e->X_add_number < REG_P + 64)
87f8eb97 5487 return OPERAND_MATCH;
800eeca4
JW		 5488 break;
5489
5490 case IA64_OPND_R1:
5491 case IA64_OPND_R2:
5492 case IA64_OPND_R3:
5493 if (e->X_op == O_register && e->X_add_number >= REG_GR
5494 && e->X_add_number < REG_GR + 128)
87f8eb97 5495 return OPERAND_MATCH;
800eeca4
JW		 5496 break;
5497
5498 case IA64_OPND_R3_2:
87f8eb97 5499 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5500 {
87f8eb97
JW		 5501 if (e->X_add_number < REG_GR + 4)
5502 return OPERAND_MATCH;
5503 else if (e->X_add_number < REG_GR + 128)
5504 return OPERAND_OUT_OF_RANGE;
5505 }
800eeca4
JW		 5506 break;
5507
542d6675 5508 /* indirect operands: */
800eeca4
JW		 5509 case IA64_OPND_CPUID_R3:
5510 case IA64_OPND_DBR_R3:
5511 case IA64_OPND_DTR_R3:
5512 case IA64_OPND_ITR_R3:
5513 case IA64_OPND_IBR_R3:
5514 case IA64_OPND_MSR_R3:
5515 case IA64_OPND_PKR_R3:
5516 case IA64_OPND_PMC_R3:
5517 case IA64_OPND_PMD_R3:
5518 case IA64_OPND_RR_R3:
5519 if (e->X_op == O_index && e->X_op_symbol
5520 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5521 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5522 return OPERAND_MATCH;
800eeca4
JW		 5523 break;
5524
5525 case IA64_OPND_MR3:
5526 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5527 return OPERAND_MATCH;
800eeca4
JW		 5528 break;
5529
542d6675 5530 /* immediate operands: */
800eeca4
JW		 5531 case IA64_OPND_CNT2a:
5532 case IA64_OPND_LEN4:
5533 case IA64_OPND_LEN6:
5534 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5535 if (e->X_op == O_constant)
5536 {
5537 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5538 return OPERAND_MATCH;
5539 else
5540 return OPERAND_OUT_OF_RANGE;
5541 }
800eeca4
JW		 5542 break;
5543
5544 case IA64_OPND_CNT2b:
87f8eb97
JW		 5545 if (e->X_op == O_constant)
5546 {
5547 if ((bfd_vma) (e->X_add_number - 1) < 3)
5548 return OPERAND_MATCH;
5549 else
5550 return OPERAND_OUT_OF_RANGE;
5551 }
800eeca4
JW		 5552 break;
5553
5554 case IA64_OPND_CNT2c:
5555 val = e->X_add_number;
87f8eb97
JW		 5556 if (e->X_op == O_constant)
5557 {
5558 if ((val == 0 || val == 7 || val == 15 || val == 16))
5559 return OPERAND_MATCH;
5560 else
5561 return OPERAND_OUT_OF_RANGE;
5562 }
800eeca4
JW		 5563 break;
5564
5565 case IA64_OPND_SOR:
5566 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5567 if (e->X_op == O_constant && e->X_add_number & 0x7)
5568 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5569 case IA64_OPND_SOF:
5570 case IA64_OPND_SOL:
87f8eb97
JW		 5571 if (e->X_op == O_constant)
5572 {
5573 if ((bfd_vma) e->X_add_number <= 96)
5574 return OPERAND_MATCH;
5575 else
5576 return OPERAND_OUT_OF_RANGE;
5577 }
800eeca4
JW		 5578 break;
5579
5580 case IA64_OPND_IMMU62:
5581 if (e->X_op == O_constant)
542d6675 5582 {
800eeca4 5583 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5584 return OPERAND_MATCH;
5585 else
5586 return OPERAND_OUT_OF_RANGE;
542d6675 5587 }
197865e8 5588 else
542d6675
KH		 5589 {
5590 /* FIXME -- need 62-bit relocation type */
5591 as_bad (_("62-bit relocation not yet implemented"));
5592 }
800eeca4
JW		 5593 break;
5594
5595 case IA64_OPND_IMMU64:
5596 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5597 || e->X_op == O_subtract)
5598 {
5599 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5600 fix->code = BFD_RELOC_IA64_IMM64;
5601 if (e->X_op != O_subtract)
5602 {
5603 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5604 if (e->X_op == O_pseudo_fixup)
5605 e->X_op = O_symbol;
5606 }
5607
5608 fix->opnd = idesc->operands[index];
5609 fix->expr = *e;
5610 fix->is_pcrel = 0;
5611 ++CURR_SLOT.num_fixups;
87f8eb97 5612 return OPERAND_MATCH;
800eeca4
JW		 5613 }
5614 else if (e->X_op == O_constant)
87f8eb97 5615 return OPERAND_MATCH;
800eeca4
JW		 5616 break;
5617
5618 case IA64_OPND_CCNT5:
5619 case IA64_OPND_CNT5:
5620 case IA64_OPND_CNT6:
5621 case IA64_OPND_CPOS6a:
5622 case IA64_OPND_CPOS6b:
5623 case IA64_OPND_CPOS6c:
5624 case IA64_OPND_IMMU2:
5625 case IA64_OPND_IMMU7a:
5626 case IA64_OPND_IMMU7b:
800eeca4
JW		 5627 case IA64_OPND_IMMU21:
5628 case IA64_OPND_IMMU24:
5629 case IA64_OPND_MBTYPE4:
5630 case IA64_OPND_MHTYPE8:
5631 case IA64_OPND_POS6:
5632 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5633 if (e->X_op == O_constant)
5634 {
5635 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5636 return OPERAND_MATCH;
5637 else
5638 return OPERAND_OUT_OF_RANGE;
5639 }
800eeca4
JW		 5640 break;
5641
bf3ca999
TW		 5642 case IA64_OPND_IMMU9:
5643 bits = operand_width (idesc->operands[index]);
87f8eb97 5644 if (e->X_op == O_constant)
542d6675 5645 {
87f8eb97
JW		 5646 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5647 {
5648 int lobits = e->X_add_number & 0x3;
5649 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5650 e->X_add_number |= (bfd_vma) 0x3;
5651 return OPERAND_MATCH;
5652 }
5653 else
5654 return OPERAND_OUT_OF_RANGE;
542d6675 5655 }
bf3ca999
TW		 5656 break;
5657
800eeca4
JW		 5658 case IA64_OPND_IMM44:
5659 /* least 16 bits must be zero */
5660 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5661 /* XXX technically, this is wrong: we should not be issuing warning
5662 messages until we're sure this instruction pattern is going to
5663 be used! */
542d6675 5664 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5665
87f8eb97 5666 if (e->X_op == O_constant)
542d6675 5667 {
87f8eb97
JW		 5668 if (((e->X_add_number >= 0
5669 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5670 || (e->X_add_number < 0
5671 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5672 {
87f8eb97
JW		 5673 /* sign-extend */
5674 if (e->X_add_number >= 0
5675 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5676 {
5677 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5678 }
5679 return OPERAND_MATCH;
542d6675 5680 }
87f8eb97
JW		 5681 else
5682 return OPERAND_OUT_OF_RANGE;
542d6675 5683 }
800eeca4
JW		 5684 break;
5685
5686 case IA64_OPND_IMM17:
5687 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5688 if (e->X_op == O_constant)
542d6675 5689 {
87f8eb97
JW		 5690 if (((e->X_add_number >= 0
5691 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5692 || (e->X_add_number < 0
5693 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5694 {
87f8eb97
JW		 5695 /* sign-extend */
5696 if (e->X_add_number >= 0
5697 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5698 {
5699 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5700 }
5701 return OPERAND_MATCH;
542d6675 5702 }
87f8eb97
JW		 5703 else
5704 return OPERAND_OUT_OF_RANGE;
542d6675 5705 }
800eeca4
JW		 5706 break;
5707
5708 case IA64_OPND_IMM14:
5709 case IA64_OPND_IMM22:
5710 relocatable = 1;
5711 case IA64_OPND_IMM1:
5712 case IA64_OPND_IMM8:
5713 case IA64_OPND_IMM8U4:
5714 case IA64_OPND_IMM8M1:
5715 case IA64_OPND_IMM8M1U4:
5716 case IA64_OPND_IMM8M1U8:
5717 case IA64_OPND_IMM9a:
5718 case IA64_OPND_IMM9b:
5719 bits = operand_width (idesc->operands[index]);
5720 if (relocatable && (e->X_op == O_symbol
5721 || e->X_op == O_subtract
5722 || e->X_op == O_pseudo_fixup))
5723 {
5724 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5725
5726 if (idesc->operands[index] == IA64_OPND_IMM14)
5727 fix->code = BFD_RELOC_IA64_IMM14;
5728 else
5729 fix->code = BFD_RELOC_IA64_IMM22;
5730
5731 if (e->X_op != O_subtract)
5732 {
5733 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5734 if (e->X_op == O_pseudo_fixup)
5735 e->X_op = O_symbol;
5736 }
5737
5738 fix->opnd = idesc->operands[index];
5739 fix->expr = *e;
5740 fix->is_pcrel = 0;
5741 ++CURR_SLOT.num_fixups;
87f8eb97 5742 return OPERAND_MATCH;
800eeca4
JW		 5743 }
5744 else if (e->X_op != O_constant
5745 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 5746 return OPERAND_MISMATCH;
800eeca4
JW		 5747
5748 if (opnd == IA64_OPND_IMM8M1U4)
5749 {
5750 /* Zero is not valid for unsigned compares that take an adjusted
5751 constant immediate range. */
5752 if (e->X_add_number == 0)
87f8eb97 5753 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5754
5755 /* Sign-extend 32-bit unsigned numbers, so that the following range
5756 checks will work. */
5757 val = e->X_add_number;
197865e8
KH		 5758 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5759 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5760 val = ((val << 32) >> 32);
5761
5762 /* Check for 0x100000000. This is valid because
5763 0x100000000-1 is the same as ((uint32_t) -1). */
5764 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 5765 return OPERAND_MATCH;
800eeca4
JW		 5766
5767 val = val - 1;
5768 }
5769 else if (opnd == IA64_OPND_IMM8M1U8)
5770 {
5771 /* Zero is not valid for unsigned compares that take an adjusted
5772 constant immediate range. */
5773 if (e->X_add_number == 0)
87f8eb97 5774 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5775
5776 /* Check for 0x10000000000000000. */
5777 if (e->X_op == O_big)
5778 {
5779 if (generic_bignum[0] == 0
5780 && generic_bignum[1] == 0
5781 && generic_bignum[2] == 0
5782 && generic_bignum[3] == 0
5783 && generic_bignum[4] == 1)
87f8eb97 5784 return OPERAND_MATCH;
800eeca4 5785 else
87f8eb97 5786 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5787 }
5788 else
5789 val = e->X_add_number - 1;
5790 }
5791 else if (opnd == IA64_OPND_IMM8M1)
5792 val = e->X_add_number - 1;
5793 else if (opnd == IA64_OPND_IMM8U4)
5794 {
5795 /* Sign-extend 32-bit unsigned numbers, so that the following range
5796 checks will work. */
5797 val = e->X_add_number;
197865e8
KH		 5798 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5799 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5800 val = ((val << 32) >> 32);
5801 }
5802 else
5803 val = e->X_add_number;
5804
2434f565
JW		 5805 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5806 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 5807 return OPERAND_MATCH;
5808 else
5809 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5810
5811 case IA64_OPND_INC3:
5812 /* +/- 1, 4, 8, 16 */
5813 val = e->X_add_number;
5814 if (val < 0)
5815 val = -val;
87f8eb97
JW		 5816 if (e->X_op == O_constant)
5817 {
5818 if ((val == 1 || val == 4 || val == 8 || val == 16))
5819 return OPERAND_MATCH;
5820 else
5821 return OPERAND_OUT_OF_RANGE;
5822 }
800eeca4
JW		 5823 break;
5824
5825 case IA64_OPND_TGT25:
5826 case IA64_OPND_TGT25b:
5827 case IA64_OPND_TGT25c:
5828 case IA64_OPND_TGT64:
5829 if (e->X_op == O_symbol)
5830 {
5831 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5832 if (opnd == IA64_OPND_TGT25)
5833 fix->code = BFD_RELOC_IA64_PCREL21F;
5834 else if (opnd == IA64_OPND_TGT25b)
5835 fix->code = BFD_RELOC_IA64_PCREL21M;
5836 else if (opnd == IA64_OPND_TGT25c)
5837 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 5838 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 5839 fix->code = BFD_RELOC_IA64_PCREL60B;
5840 else
5841 abort ();
5842
800eeca4
JW		 5843 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5844 fix->opnd = idesc->operands[index];
5845 fix->expr = *e;
5846 fix->is_pcrel = 1;
5847 ++CURR_SLOT.num_fixups;
87f8eb97 5848 return OPERAND_MATCH;
800eeca4
JW		 5849 }
5850 case IA64_OPND_TAG13:
5851 case IA64_OPND_TAG13b:
5852 switch (e->X_op)
5853 {
5854 case O_constant:
87f8eb97 5855 return OPERAND_MATCH;
800eeca4
JW		 5856
5857 case O_symbol:
5858 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c
JW		 5859 /* There are no external relocs for TAG13/TAG13b fields, so we
5860 create a dummy reloc. This will not live past md_apply_fix3. */
5861 fix->code = BFD_RELOC_UNUSED;
5862 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 5863 fix->opnd = idesc->operands[index];
5864 fix->expr = *e;
5865 fix->is_pcrel = 1;
5866 ++CURR_SLOT.num_fixups;
87f8eb97 5867 return OPERAND_MATCH;
800eeca4
JW		 5868
5869 default:
5870 break;
5871 }
5872 break;
5873
a823923b
RH		 5874 case IA64_OPND_LDXMOV:
5875 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5876 fix->code = BFD_RELOC_IA64_LDXMOV;
5877 fix->opnd = idesc->operands[index];
5878 fix->expr = *e;
5879 fix->is_pcrel = 0;
5880 ++CURR_SLOT.num_fixups;
5881 return OPERAND_MATCH;
5882
800eeca4
JW		 5883 default:
5884 break;
5885 }
87f8eb97 5886 return OPERAND_MISMATCH;
800eeca4
JW		 5887}
5888
5889static int
5890parse_operand (e)
5891 expressionS *e;
5892{
5893 int sep = '\0';
5894
5895 memset (e, 0, sizeof (*e));
5896 e->X_op = O_absent;
5897 SKIP_WHITESPACE ();
5898 if (*input_line_pointer != '}')
5899 expression (e);
5900 sep = *input_line_pointer++;
5901
5902 if (sep == '}')
5903 {
5904 if (!md.manual_bundling)
5905 as_warn ("Found '}' when manual bundling is off");
5906 else
5907 CURR_SLOT.manual_bundling_off = 1;
5908 md.manual_bundling = 0;
5909 sep = '\0';
5910 }
5911 return sep;
5912}
5913
5914/* Returns the next entry in the opcode table that matches the one in
5915 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 5916 found, NULL is returned instead. */
800eeca4
JW		 5917
5918static struct ia64_opcode *
5919get_next_opcode (struct ia64_opcode *idesc)
5920{
5921 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5922 ia64_free_opcode (idesc);
5923 return next;
5924}
5925
5926/* Parse the operands for the opcode and find the opcode variant that
5927 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 5928
5929static struct ia64_opcode *
800eeca4
JW		 5930parse_operands (idesc)
5931 struct ia64_opcode *idesc;
5932{
5933 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 5934 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
800eeca4 5935 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 5936 enum operand_match_result result;
800eeca4
JW		 5937 char mnemonic[129];
5938 char *first_arg = 0, *end, *saved_input_pointer;
5939 unsigned int sof;
5940
5941 assert (strlen (idesc->name) <= 128);
5942
5943 strcpy (mnemonic, idesc->name);
60b9a617
JB		 5944 if (idesc->operands[2] == IA64_OPND_SOF
5945 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 5946 {
5947 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5948 can't parse the first operand until we have parsed the
5949 remaining operands of the "alloc" instruction. */
5950 SKIP_WHITESPACE ();
5951 first_arg = input_line_pointer;
5952 end = strchr (input_line_pointer, '=');
5953 if (!end)
5954 {
5955 as_bad ("Expected separator `='");
5956 return 0;
5957 }
5958 input_line_pointer = end + 1;
5959 ++i;
5960 ++num_outputs;
5961 }
5962
d3156ecc 5963 for (; ; ++i)
800eeca4 5964 {
d3156ecc
JB		 5965 if (i < NELEMS (CURR_SLOT.opnd))
5966 {
5967 sep = parse_operand (CURR_SLOT.opnd + i);
5968 if (CURR_SLOT.opnd[i].X_op == O_absent)
5969 break;
5970 }
5971 else
5972 {
5973 expressionS dummy;
5974
5975 sep = parse_operand (&dummy);
5976 if (dummy.X_op == O_absent)
5977 break;
5978 }
800eeca4
JW		 5979
5980 ++num_operands;
5981
5982 if (sep != '=' && sep != ',')
5983 break;
5984
5985 if (sep == '=')
5986 {
5987 if (num_outputs > 0)
5988 as_bad ("Duplicate equal sign (=) in instruction");
5989 else
5990 num_outputs = i + 1;
5991 }
5992 }
5993 if (sep != '\0')
5994 {
5995 as_bad ("Illegal operand separator `%c'", sep);
5996 return 0;
5997 }
197865e8 5998
60b9a617
JB		 5999 if (idesc->operands[2] == IA64_OPND_SOF
6000 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 6001 {
6002 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6003 know (strcmp (idesc->name, "alloc") == 0);
60b9a617
JB		 6004 i = (CURR_SLOT.opnd[1].X_op == O_register
6005 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6006 if (num_operands == i + 3 /* first_arg not included in this count! */
6007 && CURR_SLOT.opnd[i].X_op == O_constant
6008 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6009 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6010 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
800eeca4 6011 {
60b9a617
JB		 6012 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6013 CURR_SLOT.opnd[i + 1].X_add_number,
6014 CURR_SLOT.opnd[i + 2].X_add_number,
6015 CURR_SLOT.opnd[i + 3].X_add_number);
800eeca4 6016
542d6675 6017 /* now we can parse the first arg: */
800eeca4
JW		 6018 saved_input_pointer = input_line_pointer;
6019 input_line_pointer = first_arg;
6020 sep = parse_operand (CURR_SLOT.opnd + 0);
6021 if (sep != '=')
6022 --num_outputs; /* force error */
6023 input_line_pointer = saved_input_pointer;
6024
60b9a617
JB		 6025 CURR_SLOT.opnd[i].X_add_number = sof;
6026 CURR_SLOT.opnd[i + 1].X_add_number
6027 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6028 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 6029 }
6030 }
6031
d3156ecc 6032 highest_unmatched_operand = -4;
87f8eb97
JW		 6033 curr_out_of_range_pos = -1;
6034 error_pos = 0;
800eeca4
JW		 6035 for (; idesc; idesc = get_next_opcode (idesc))
6036 {
6037 if (num_outputs != idesc->num_outputs)
6038 continue; /* mismatch in # of outputs */
d3156ecc
JB		 6039 if (highest_unmatched_operand < 0)
6040 highest_unmatched_operand |= 1;
6041 if (num_operands > NELEMS (idesc->operands)
6042 || (num_operands < NELEMS (idesc->operands)
6043 && idesc->operands[num_operands])
6044 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6045 continue; /* mismatch in number of arguments */
6046 if (highest_unmatched_operand < 0)
6047 highest_unmatched_operand |= 2;
800eeca4
JW		 6048
6049 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 6050
6051 /* Try to match all operands. If we see an out-of-range operand,
6052 then continue trying to match the rest of the operands, since if
6053 the rest match, then this idesc will give the best error message. */
6054
6055 out_of_range_pos = -1;
800eeca4 6056 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 6057 {
6058 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6059 if (result != OPERAND_MATCH)
6060 {
6061 if (result != OPERAND_OUT_OF_RANGE)
6062 break;
6063 if (out_of_range_pos < 0)
6064 /* remember position of the first out-of-range operand: */
6065 out_of_range_pos = i;
6066 }
6067 }
800eeca4 6068
87f8eb97
JW		 6069 /* If we did not match all operands, or if at least one operand was
6070 out-of-range, then this idesc does not match. Keep track of which
6071 idesc matched the most operands before failing. If we have two
6072 idescs that failed at the same position, and one had an out-of-range
6073 operand, then prefer the out-of-range operand. Thus if we have
6074 "add r0=0x1000000,r1" we get an error saying the constant is out
6075 of range instead of an error saying that the constant should have been
6076 a register. */
6077
6078 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 6079 {
87f8eb97
JW		 6080 if (i > highest_unmatched_operand
6081 || (i == highest_unmatched_operand
6082 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 6083 {
6084 highest_unmatched_operand = i;
87f8eb97
JW		 6085 if (out_of_range_pos >= 0)
6086 {
6087 expected_operand = idesc->operands[out_of_range_pos];
6088 error_pos = out_of_range_pos;
6089 }
6090 else
6091 {
6092 expected_operand = idesc->operands[i];
6093 error_pos = i;
6094 }
6095 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 6096 }
6097 continue;
6098 }
6099
800eeca4
JW		 6100 break;
6101 }
6102 if (!idesc)
6103 {
6104 if (expected_operand)
6105 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 6106 error_pos + 1, mnemonic,
800eeca4 6107 elf64_ia64_operands[expected_operand].desc);
d3156ecc
JB		 6108 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6109 as_bad ("Wrong number of output operands");
6110 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6111 as_bad ("Wrong number of input operands");
800eeca4
JW		 6112 else
6113 as_bad ("Operand mismatch");
6114 return 0;
6115 }
6116 return idesc;
6117}
6118
6119static void
6120build_insn (slot, insnp)
6121 struct slot *slot;
6122 bfd_vma *insnp;
6123{
6124 const struct ia64_operand *odesc, *o2desc;
6125 struct ia64_opcode *idesc = slot->idesc;
6126 bfd_signed_vma insn, val;
6127 const char *err;
6128 int i;
6129
6130 insn = idesc->opcode | slot->qp_regno;
6131
6132 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6133 {
c67e42c9
RH		 6134 if (slot->opnd[i].X_op == O_register
6135 || slot->opnd[i].X_op == O_constant
6136 || slot->opnd[i].X_op == O_index)
6137 val = slot->opnd[i].X_add_number;
6138 else if (slot->opnd[i].X_op == O_big)
800eeca4 6139 {
c67e42c9
RH		 6140 /* This must be the value 0x10000000000000000. */
6141 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6142 val = 0;
6143 }
6144 else
6145 val = 0;
6146
6147 switch (idesc->operands[i])
6148 {
6149 case IA64_OPND_IMMU64:
800eeca4
JW		 6150 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6151 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6152 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6153 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6154 continue;
6155
6156 case IA64_OPND_IMMU62:
542d6675
KH		 6157 val &= 0x3fffffffffffffffULL;
6158 if (val != slot->opnd[i].X_add_number)
6159 as_warn (_("Value truncated to 62 bits"));
6160 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6161 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6162 continue;
800eeca4 6163
c67e42c9
RH		 6164 case IA64_OPND_TGT64:
6165 val >>= 4;
6166 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6167 insn |= ((((val >> 59) & 0x1) << 36)
6168 | (((val >> 0) & 0xfffff) << 13));
6169 continue;
800eeca4 6170
c67e42c9
RH		 6171 case IA64_OPND_AR3:
6172 val -= REG_AR;
6173 break;
6174
6175 case IA64_OPND_B1:
6176 case IA64_OPND_B2:
6177 val -= REG_BR;
6178 break;
6179
6180 case IA64_OPND_CR3:
6181 val -= REG_CR;
6182 break;
6183
6184 case IA64_OPND_F1:
6185 case IA64_OPND_F2:
6186 case IA64_OPND_F3:
6187 case IA64_OPND_F4:
6188 val -= REG_FR;
6189 break;
6190
6191 case IA64_OPND_P1:
6192 case IA64_OPND_P2:
6193 val -= REG_P;
6194 break;
6195
6196 case IA64_OPND_R1:
6197 case IA64_OPND_R2:
6198 case IA64_OPND_R3:
6199 case IA64_OPND_R3_2:
6200 case IA64_OPND_CPUID_R3:
6201 case IA64_OPND_DBR_R3:
6202 case IA64_OPND_DTR_R3:
6203 case IA64_OPND_ITR_R3:
6204 case IA64_OPND_IBR_R3:
6205 case IA64_OPND_MR3:
6206 case IA64_OPND_MSR_R3:
6207 case IA64_OPND_PKR_R3:
6208 case IA64_OPND_PMC_R3:
6209 case IA64_OPND_PMD_R3:
197865e8 6210 case IA64_OPND_RR_R3:
c67e42c9
RH		 6211 val -= REG_GR;
6212 break;
6213
6214 default:
6215 break;
6216 }
6217
6218 odesc = elf64_ia64_operands + idesc->operands[i];
6219 err = (*odesc->insert) (odesc, val, &insn);
6220 if (err)
6221 as_bad_where (slot->src_file, slot->src_line,
6222 "Bad operand value: %s", err);
6223 if (idesc->flags & IA64_OPCODE_PSEUDO)
6224 {
6225 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6226 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6227 {
6228 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6229 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6230 }
c67e42c9
RH		 6231 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6232 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6233 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6234 {
c67e42c9
RH		 6235 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6236 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6237 }
6238 }
6239 }
6240 *insnp = insn;
6241}
6242
6243static void
6244emit_one_bundle ()
6245{
f4660e2c 6246 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6247 enum ia64_unit required_unit, insn_unit = 0;
6248 enum ia64_insn_type type[3], insn_type;
6249 unsigned int template, orig_template;
542d6675 6250 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6251 struct ia64_opcode *idesc;
6252 int end_of_insn_group = 0, user_template = -1;
6253 int n, i, j, first, curr;
d6e78c11 6254 unw_rec_list *ptr, *last_ptr, *end_ptr;
800eeca4
JW		 6255 bfd_vma t0 = 0, t1 = 0;
6256 struct label_fix *lfix;
6257 struct insn_fix *ifix;
6258 char mnemonic[16];
6259 fixS *fix;
6260 char *f;
5a9ff93d 6261 int addr_mod;
800eeca4
JW		 6262
6263 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6264 know (first >= 0 & first < NUM_SLOTS);
6265 n = MIN (3, md.num_slots_in_use);
6266
6267 /* Determine template: user user_template if specified, best match
542d6675 6268 otherwise: */
800eeca4
JW		 6269
6270 if (md.slot[first].user_template >= 0)
6271 user_template = template = md.slot[first].user_template;
6272 else
6273 {
032efc85 6274 /* Auto select appropriate template. */
800eeca4
JW		 6275 memset (type, 0, sizeof (type));
6276 curr = first;
6277 for (i = 0; i < n; ++i)
6278 {
032efc85
RH		 6279 if (md.slot[curr].label_fixups && i != 0)
6280 break;
800eeca4
JW		 6281 type[i] = md.slot[curr].idesc->type;
6282 curr = (curr + 1) % NUM_SLOTS;
6283 }
6284 template = best_template[type[0]][type[1]][type[2]];
6285 }
6286
542d6675 6287 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6288 for (i = 0; i < 3; ++i)
6289 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6290
6291 f = frag_more (16);
6292
5a9ff93d
JW		 6293 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6294 from the start of the frag. */
6295 addr_mod = frag_now_fix () & 15;
6296 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6297 as_bad (_("instruction address is not a multiple of 16"));
6298 frag_now->insn_addr = addr_mod;
6299 frag_now->has_code = 1;
6300
542d6675 6301 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6302 curr = first;
6303 idesc = md.slot[curr].idesc;
6304 end_of_insn_group = 0;
6305 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6306 {
d6e78c11
JW		 6307 /* If we have unwind records, we may need to update some now. */
6308 ptr = md.slot[curr].unwind_record;
6309 if (ptr)
6310 {
6311 /* Find the last prologue/body record in the list for the current
6312 insn, and set the slot number for all records up to that point.
6313 This needs to be done now, because prologue/body records refer to
6314 the current point, not the point after the instruction has been
6315 issued. This matters because there may have been nops emitted
6316 meanwhile. Any non-prologue non-body record followed by a
6317 prologue/body record must also refer to the current point. */
6318 last_ptr = NULL;
6319 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6320 for (; ptr != end_ptr; ptr = ptr->next)
6321 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6322 || ptr->r.type == body)
6323 last_ptr = ptr;
6324 if (last_ptr)
6325 {
6326 /* Make last_ptr point one after the last prologue/body
6327 record. */
6328 last_ptr = last_ptr->next;
6329 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6330 ptr = ptr->next)
6331 {
6332 ptr->slot_number = (unsigned long) f + i;
6333 ptr->slot_frag = frag_now;
6334 }
6335 /* Remove the initialized records, so that we won't accidentally
6336 update them again if we insert a nop and continue. */
6337 md.slot[curr].unwind_record = last_ptr;
6338 }
6339 }
e0c9811a 6340
f4660e2c
JB		 6341 manual_bundling_off = md.slot[curr].manual_bundling_off;
6342 if (md.slot[curr].manual_bundling_on)
800eeca4 6343 {
f4660e2c
JB		 6344 if (curr == first)
6345 manual_bundling = 1;
800eeca4 6346 else
f4660e2c
JB		 6347 break; /* Need to start a new bundle. */
6348 }
6349
6350 if (idesc->flags & IA64_OPCODE_SLOT2)
6351 {
6352 if (manual_bundling && !manual_bundling_off)
6353 {
6354 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6355 "`%s' must be last in bundle", idesc->name);
6356 if (i < 2)
6357 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6358 }
6359 i = 2;
800eeca4
JW		 6360 }
6361 if (idesc->flags & IA64_OPCODE_LAST)
6362 {
2434f565
JW		 6363 int required_slot;
6364 unsigned int required_template;
800eeca4
JW		 6365
6366 /* If we need a stop bit after an M slot, our only choice is
6367 template 5 (M;;MI). If we need a stop bit after a B
6368 slot, our only choice is to place it at the end of the
6369 bundle, because the only available templates are MIB,
6370 MBB, BBB, MMB, and MFB. We don't handle anything other
6371 than M and B slots because these are the only kind of
6372 instructions that can have the IA64_OPCODE_LAST bit set. */
6373 required_template = template;
6374 switch (idesc->type)
6375 {
6376 case IA64_TYPE_M:
6377 required_slot = 0;
6378 required_template = 5;
6379 break;
6380
6381 case IA64_TYPE_B:
6382 required_slot = 2;
6383 break;
6384
6385 default:
6386 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6387 "Internal error: don't know how to force %s to end"
6388 "of instruction group", idesc->name);
6389 required_slot = i;
6390 break;
6391 }
f4660e2c
JB		 6392 if (manual_bundling
6393 && (i > required_slot
6394 || (required_slot == 2 && !manual_bundling_off)
6395 || (user_template >= 0
6396 /* Changing from MMI to M;MI is OK. */
6397 && (template ^ required_template) > 1)))
6398 {
6399 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6400 "`%s' must be last in instruction group",
6401 idesc->name);
6402 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6403 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6404 }
800eeca4
JW		 6405 if (required_slot < i)
6406 /* Can't fit this instruction. */
6407 break;
6408
6409 i = required_slot;
6410 if (required_template != template)
6411 {
6412 /* If we switch the template, we need to reset the NOPs
6413 after slot i. The slot-types of the instructions ahead
6414 of i never change, so we don't need to worry about
6415 changing NOPs in front of this slot. */
6416 for (j = i; j < 3; ++j)
6417 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6418 }
6419 template = required_template;
6420 }
6421 if (curr != first && md.slot[curr].label_fixups)
6422 {
f4660e2c
JB		 6423 if (manual_bundling)
6424 {
6425 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6426 "Label must be first in a bundle");
f4660e2c
JB		 6427 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6428 }
800eeca4
JW		 6429 /* This insn must go into the first slot of a bundle. */
6430 break;
6431 }
6432
800eeca4
JW		 6433 if (end_of_insn_group && md.num_slots_in_use >= 1)
6434 {
6435 /* We need an instruction group boundary in the middle of a
6436 bundle. See if we can switch to an other template with
6437 an appropriate boundary. */
6438
6439 orig_template = template;
6440 if (i == 1 && (user_template == 4
6441 || (user_template < 0
6442 && (ia64_templ_desc[template].exec_unit[0]
6443 == IA64_UNIT_M))))
6444 {
6445 template = 5;
6446 end_of_insn_group = 0;
6447 }
6448 else if (i == 2 && (user_template == 0
6449 || (user_template < 0
6450 && (ia64_templ_desc[template].exec_unit[1]
6451 == IA64_UNIT_I)))
6452 /* This test makes sure we don't switch the template if
6453 the next instruction is one that needs to be first in
6454 an instruction group. Since all those instructions are
6455 in the M group, there is no way such an instruction can
6456 fit in this bundle even if we switch the template. The
6457 reason we have to check for this is that otherwise we
6458 may end up generating "MI;;I M.." which has the deadly
6459 effect that the second M instruction is no longer the
f4660e2c 6460 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6461 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6462 {
6463 template = 1;
6464 end_of_insn_group = 0;
6465 }
f4660e2c
JB		 6466 else if (i == 1
6467 && user_template == 0
6468 && !(idesc->flags & IA64_OPCODE_FIRST))
6469 /* Use the next slot. */
6470 continue;
800eeca4
JW		 6471 else if (curr != first)
6472 /* can't fit this insn */
6473 break;
6474
6475 if (template != orig_template)
6476 /* if we switch the template, we need to reset the NOPs
6477 after slot i. The slot-types of the instructions ahead
6478 of i never change, so we don't need to worry about
6479 changing NOPs in front of this slot. */
6480 for (j = i; j < 3; ++j)
6481 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6482 }
6483 required_unit = ia64_templ_desc[template].exec_unit[i];
6484
c10d9d8f 6485 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6486 if (idesc->type == IA64_TYPE_DYN)
6487 {
97762d08
JB		 6488 enum ia64_opnd opnd1, opnd2;
6489
800eeca4 6490 if ((strcmp (idesc->name, "nop") == 0)
c10d9d8f 6491 || (strcmp (idesc->name, "hint") == 0)
800eeca4
JW		 6492 || (strcmp (idesc->name, "break") == 0))
6493 insn_unit = required_unit;
97762d08
JB		 6494 else if (strcmp (idesc->name, "chk.s") == 0
6495 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6496 {
6497 insn_unit = IA64_UNIT_M;
97762d08
JB		 6498 if (required_unit == IA64_UNIT_I
6499 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6500 insn_unit = IA64_UNIT_I;
6501 }
6502 else
6503 as_fatal ("emit_one_bundle: unexpected dynamic op");
6504
09124b3f 6505 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6506 opnd1 = idesc->operands[0];
6507 opnd2 = idesc->operands[1];
3d56ab85 6508 ia64_free_opcode (idesc);
97762d08
JB		 6509 idesc = ia64_find_opcode (mnemonic);
6510 /* moves to/from ARs have collisions */
6511 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6512 {
6513 while (idesc != NULL
6514 && (idesc->operands[0] != opnd1
6515 || idesc->operands[1] != opnd2))
6516 idesc = get_next_opcode (idesc);
6517 }
97762d08 6518 md.slot[curr].idesc = idesc;
800eeca4
JW		 6519 }
6520 else
6521 {
6522 insn_type = idesc->type;
6523 insn_unit = IA64_UNIT_NIL;
6524 switch (insn_type)
6525 {
6526 case IA64_TYPE_A:
6527 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6528 insn_unit = required_unit;
6529 break;
542d6675 6530 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6531 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6532 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6533 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6534 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6535 default: break;
6536 }
6537 }
6538
6539 if (insn_unit != required_unit)
6540 {
6541 if (required_unit == IA64_UNIT_L
542d6675 6542 && insn_unit == IA64_UNIT_I
800eeca4
JW		 6543 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6544 {
6545 /* we got ourselves an MLX template but the current
197865e8 6546 instruction isn't an X-unit, or an I-unit instruction
800eeca4
JW		 6547 that can go into the X slot of an MLX template. Duh. */
6548 if (md.num_slots_in_use >= NUM_SLOTS)
6549 {
6550 as_bad_where (md.slot[curr].src_file,
6551 md.slot[curr].src_line,
6552 "`%s' can't go in X slot of "
6553 "MLX template", idesc->name);
542d6675 6554 /* drop this insn so we don't livelock: */
800eeca4
JW		 6555 --md.num_slots_in_use;
6556 }
6557 break;
6558 }
6559 continue; /* try next slot */
6560 }
6561
196e8040
JW		 6562 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6563 {
6564 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 6565
196e8040
JW		 6566 md.slot[curr].loc_directive_seen = 0;
6567 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6568 }
800eeca4
JW		 6569
6570 build_insn (md.slot + curr, insn + i);
6571
d6e78c11
JW		 6572 ptr = md.slot[curr].unwind_record;
6573 if (ptr)
6574 {
6575 /* Set slot numbers for all remaining unwind records belonging to the
6576 current insn. There can not be any prologue/body unwind records
6577 here. */
6578 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6579 for (; ptr != end_ptr; ptr = ptr->next)
6580 {
6581 ptr->slot_number = (unsigned long) f + i;
6582 ptr->slot_frag = frag_now;
6583 }
6584 md.slot[curr].unwind_record = NULL;
6585 }
10850f29 6586
800eeca4
JW		 6587 if (required_unit == IA64_UNIT_L)
6588 {
6589 know (i == 1);
6590 /* skip one slot for long/X-unit instructions */
6591 ++i;
6592 }
6593 --md.num_slots_in_use;
6594
542d6675 6595 /* now is a good time to fix up the labels for this insn: */
800eeca4
JW		 6596 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6597 {
6598 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6599 symbol_set_frag (lfix->sym, frag_now);
6600 }
f1bcba5b
JW		 6601 /* and fix up the tags also. */
6602 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6603 {
6604 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6605 symbol_set_frag (lfix->sym, frag_now);
6606 }
800eeca4
JW		 6607
6608 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6609 {
6610 ifix = md.slot[curr].fixup + j;
5a080f89 6611 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 6612 &ifix->expr, ifix->is_pcrel, ifix->code);
6613 fix->tc_fix_data.opnd = ifix->opnd;
6614 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6615 fix->fx_file = md.slot[curr].src_file;
6616 fix->fx_line = md.slot[curr].src_line;
6617 }
6618
6619 end_of_insn_group = md.slot[curr].end_of_insn_group;
6620
542d6675 6621 /* clear slot: */
800eeca4
JW		 6622 ia64_free_opcode (md.slot[curr].idesc);
6623 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6624 md.slot[curr].user_template = -1;
6625
6626 if (manual_bundling_off)
6627 {
6628 manual_bundling = 0;
6629 break;
6630 }
6631 curr = (curr + 1) % NUM_SLOTS;
6632 idesc = md.slot[curr].idesc;
6633 }
f4660e2c 6634 if (manual_bundling > 0)
800eeca4
JW		 6635 {
6636 if (md.num_slots_in_use > 0)
ac025970
L		 6637 {
6638 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6639 "`%s' does not fit into %s template",
6640 idesc->name, ia64_templ_desc[template].name);
6641 --md.num_slots_in_use;
6642 }
800eeca4
JW		 6643 else
6644 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6645 "Missing '}' at end of file");
6646 }
6647 know (md.num_slots_in_use < NUM_SLOTS);
6648
6649 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6650 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6651
44f5c83a
JW		 6652 number_to_chars_littleendian (f + 0, t0, 8);
6653 number_to_chars_littleendian (f + 8, t1, 8);
f5a30c2e 6654
73f20958
L		 6655 if (unwind.list)
6656 {
127cab00
L		 6657 unwind.list->next_slot_number = (unsigned long) f + 16;
6658 unwind.list->next_slot_frag = frag_now;
73f20958 6659 }
800eeca4
JW		 6660}
6661
6662int
6663md_parse_option (c, arg)
6664 int c;
6665 char *arg;
6666{
7463c317 6667
800eeca4
JW		 6668 switch (c)
6669 {
c43c2cc5 6670 /* Switches from the Intel assembler. */
44f5c83a 6671 case 'm':
800eeca4
JW		 6672 if (strcmp (arg, "ilp64") == 0
6673 || strcmp (arg, "lp64") == 0
6674 || strcmp (arg, "p64") == 0)
6675 {
6676 md.flags |= EF_IA_64_ABI64;
6677 }
6678 else if (strcmp (arg, "ilp32") == 0)
6679 {
6680 md.flags &= ~EF_IA_64_ABI64;
6681 }
6682 else if (strcmp (arg, "le") == 0)
6683 {
6684 md.flags &= ~EF_IA_64_BE;
549f748d 6685 default_big_endian = 0;
800eeca4
JW		 6686 }
6687 else if (strcmp (arg, "be") == 0)
6688 {
6689 md.flags |= EF_IA_64_BE;
549f748d 6690 default_big_endian = 1;
800eeca4
JW		 6691 }
6692 else
6693 return 0;
6694 break;
6695
6696 case 'N':
6697 if (strcmp (arg, "so") == 0)
6698 {
542d6675 6699 /* Suppress signon message. */
800eeca4
JW		 6700 }
6701 else if (strcmp (arg, "pi") == 0)
6702 {
6703 /* Reject privileged instructions. FIXME */
6704 }
6705 else if (strcmp (arg, "us") == 0)
6706 {
6707 /* Allow union of signed and unsigned range. FIXME */
6708 }
6709 else if (strcmp (arg, "close_fcalls") == 0)
6710 {
6711 /* Do not resolve global function calls. */
6712 }
6713 else
6714 return 0;
6715 break;
6716
6717 case 'C':
6718 /* temp[="prefix"] Insert temporary labels into the object file
6719 symbol table prefixed by "prefix".
6720 Default prefix is ":temp:".
6721 */
6722 break;
6723
6724 case 'a':
800eeca4
JW		 6725 /* indirect=<tgt> Assume unannotated indirect branches behavior
6726 according to <tgt> --
6727 exit: branch out from the current context (default)
6728 labels: all labels in context may be branch targets
6729 */
85b40035
L		 6730 if (strncmp (arg, "indirect=", 9) != 0)
6731 return 0;
800eeca4
JW		 6732 break;
6733
6734 case 'x':
6735 /* -X conflicts with an ignored option, use -x instead */
6736 md.detect_dv = 1;
6737 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 6738 {
6739 /* set default mode to explicit */
6740 md.default_explicit_mode = 1;
6741 break;
6742 }
800eeca4 6743 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 6744 {
6745 md.default_explicit_mode = 0;
6746 }
800eeca4 6747 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 6748 {
6749 md.debug_dv = 1;
6750 }
800eeca4 6751 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 6752 {
6753 md.default_explicit_mode = 1;
6754 md.debug_dv = 1;
6755 }
800eeca4 6756 else
542d6675
KH		 6757 {
6758 as_bad (_("Unrecognized option '-x%s'"), arg);
6759 }
800eeca4
JW		 6760 break;
6761
6762 case 'S':
6763 /* nops Print nops statistics. */
6764 break;
6765
c43c2cc5
JW		 6766 /* GNU specific switches for gcc. */
6767 case OPTION_MCONSTANT_GP:
6768 md.flags |= EF_IA_64_CONS_GP;
6769 break;
6770
6771 case OPTION_MAUTO_PIC:
6772 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6773 break;
6774
800eeca4
JW		 6775 default:
6776 return 0;
6777 }
6778
6779 return 1;
6780}
6781
6782void
6783md_show_usage (stream)
6784 FILE *stream;
6785{
542d6675 6786 fputs (_("\
800eeca4 6787IA-64 options:\n\
6290819d
NC		 6788 --mconstant-gp mark output file as using the constant-GP model\n\
6789 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6790 --mauto-pic mark output file as using the constant-GP model\n\
6791 without function descriptors (sets ELF header flag\n\
6792 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 6793 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6794 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
800eeca4
JW		 6795 -x | -xexplicit turn on dependency violation checking (default)\n\
6796 -xauto automagically remove dependency violations\n\
6797 -xdebug debug dependency violation checker\n"),
6798 stream);
6799}
6800
acebd4ce
AS		 6801void
6802ia64_after_parse_args ()
6803{
6804 if (debug_type == DEBUG_STABS)
6805 as_fatal (_("--gstabs is not supported for ia64"));
6806}
6807
44576e1f
RH		 6808/* Return true if TYPE fits in TEMPL at SLOT. */
6809
6810static int
800eeca4
JW		 6811match (int templ, int type, int slot)
6812{
6813 enum ia64_unit unit;
6814 int result;
6815
6816 unit = ia64_templ_desc[templ].exec_unit[slot];
6817 switch (type)
6818 {
6819 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6820 case IA64_TYPE_A:
6821 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6822 break;
6823 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6824 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6825 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6826 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6827 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6828 default: result = 0; break;
6829 }
6830 return result;
6831}
6832
44576e1f
RH		 6833/* Add a bit of extra goodness if a nop of type F or B would fit
6834 in TEMPL at SLOT. */
6835
6836static inline int
6837extra_goodness (int templ, int slot)
6838{
ebeeafe6 6839 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
44576e1f 6840 return 2;
ebeeafe6 6841 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
44576e1f
RH		 6842 return 1;
6843 return 0;
6844}
6845
800eeca4
JW		 6846/* This function is called once, at assembler startup time. It sets
6847 up all the tables, etc. that the MD part of the assembler will need
6848 that can be determined before arguments are parsed. */
6849void
6850md_begin ()
6851{
44f5c83a 6852 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
800eeca4
JW		 6853 const char *err;
6854 char name[8];
6855
6856 md.auto_align = 1;
6857 md.explicit_mode = md.default_explicit_mode;
6858
6859 bfd_set_section_alignment (stdoutput, text_section, 4);
6860
0234cb7c 6861 /* Make sure function pointers get initialized. */
10a98291 6862 target_big_endian = -1;
549f748d 6863 dot_byteorder (default_big_endian);
10a98291 6864
35f5df7f
L		 6865 alias_hash = hash_new ();
6866 alias_name_hash = hash_new ();
6867 secalias_hash = hash_new ();
6868 secalias_name_hash = hash_new ();
6869
13ae64f3
JJ		 6870 pseudo_func[FUNC_DTP_MODULE].u.sym =
6871 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6872 &zero_address_frag);
6873
6874 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6875 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6876 &zero_address_frag);
6877
800eeca4 6878 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 6879 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6880 &zero_address_frag);
800eeca4
JW		 6881
6882 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 6883 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6884 &zero_address_frag);
800eeca4
JW		 6885
6886 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 6887 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6888 &zero_address_frag);
800eeca4 6889
fa2c7eff
RH		 6890 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6891 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6892 &zero_address_frag);
6893
c67e42c9 6894 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 6895 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6896 &zero_address_frag);
c67e42c9 6897
800eeca4 6898 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 6899 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6900 &zero_address_frag);
800eeca4
JW		 6901
6902 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 6903 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6904 &zero_address_frag);
800eeca4
JW		 6905
6906 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 6907 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6908 &zero_address_frag);
800eeca4 6909
13ae64f3
JJ		 6910 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6911 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6912 &zero_address_frag);
6913
800eeca4 6914 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 6915 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6916 &zero_address_frag);
800eeca4
JW		 6917
6918 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 6919 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6920 &zero_address_frag);
800eeca4 6921
13ae64f3
JJ		 6922 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6923 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6924 &zero_address_frag);
6925
6926 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6927 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6928 &zero_address_frag);
6929
6930 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6931 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6932 &zero_address_frag);
6933
3969b680
RH		 6934 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6935 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6936 &zero_address_frag);
6937
197865e8 6938 /* Compute the table of best templates. We compute goodness as a
44576e1f
RH		 6939 base 4 value, in which each match counts for 3, each F counts
6940 for 2, each B counts for 1. This should maximize the number of
6941 F and B nops in the chosen bundles, which is good because these
6942 pipelines are least likely to be overcommitted. */
800eeca4
JW		 6943 for (i = 0; i < IA64_NUM_TYPES; ++i)
6944 for (j = 0; j < IA64_NUM_TYPES; ++j)
6945 for (k = 0; k < IA64_NUM_TYPES; ++k)
6946 {
6947 best = 0;
6948 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6949 {
6950 goodness = 0;
6951 if (match (t, i, 0))
6952 {
6953 if (match (t, j, 1))
6954 {
6955 if (match (t, k, 2))
44576e1f 6956 goodness = 3 + 3 + 3;
800eeca4 6957 else
44576e1f 6958 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 6959 }
6960 else if (match (t, j, 2))
44576e1f 6961 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 6962 else
44576e1f
RH		 6963 {
6964 goodness = 3;
6965 goodness += extra_goodness (t, 1);
6966 goodness += extra_goodness (t, 2);
6967 }
800eeca4
JW		 6968 }
6969 else if (match (t, i, 1))
6970 {
6971 if (match (t, j, 2))
44576e1f 6972 goodness = 3 + 3;
800eeca4 6973 else
44576e1f 6974 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 6975 }
6976 else if (match (t, i, 2))
44576e1f 6977 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 6978
6979 if (goodness > best)
6980 {
6981 best = goodness;
6982 best_template[i][j][k] = t;
6983 }
6984 }
6985 }
6986
6987 for (i = 0; i < NUM_SLOTS; ++i)
6988 md.slot[i].user_template = -1;
6989
6990 md.pseudo_hash = hash_new ();
6991 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6992 {
6993 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6994 (void *) (pseudo_opcode + i));
6995 if (err)
6996 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6997 pseudo_opcode[i].name, err);
6998 }
6999
7000 md.reg_hash = hash_new ();
7001 md.dynreg_hash = hash_new ();
7002 md.const_hash = hash_new ();
7003 md.entry_hash = hash_new ();
7004
542d6675 7005 /* general registers: */
800eeca4
JW		 7006
7007 total = 128;
7008 for (i = 0; i < total; ++i)
7009 {
7010 sprintf (name, "r%d", i - REG_GR);
7011 md.regsym[i] = declare_register (name, i);
7012 }
7013
542d6675 7014 /* floating point registers: */
800eeca4
JW		 7015 total += 128;
7016 for (; i < total; ++i)
7017 {
7018 sprintf (name, "f%d", i - REG_FR);
7019 md.regsym[i] = declare_register (name, i);
7020 }
7021
542d6675 7022 /* application registers: */
800eeca4
JW		 7023 total += 128;
7024 ar_base = i;
7025 for (; i < total; ++i)
7026 {
7027 sprintf (name, "ar%d", i - REG_AR);
7028 md.regsym[i] = declare_register (name, i);
7029 }
7030
542d6675 7031 /* control registers: */
800eeca4
JW		 7032 total += 128;
7033 cr_base = i;
7034 for (; i < total; ++i)
7035 {
7036 sprintf (name, "cr%d", i - REG_CR);
7037 md.regsym[i] = declare_register (name, i);
7038 }
7039
542d6675 7040 /* predicate registers: */
800eeca4
JW		 7041 total += 64;
7042 for (; i < total; ++i)
7043 {
7044 sprintf (name, "p%d", i - REG_P);
7045 md.regsym[i] = declare_register (name, i);
7046 }
7047
542d6675 7048 /* branch registers: */
800eeca4
JW		 7049 total += 8;
7050 for (; i < total; ++i)
7051 {
7052 sprintf (name, "b%d", i - REG_BR);
7053 md.regsym[i] = declare_register (name, i);
7054 }
7055
7056 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7057 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7058 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7059 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7060 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7061 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7062 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7063
7064 for (i = 0; i < NELEMS (indirect_reg); ++i)
7065 {
7066 regnum = indirect_reg[i].regnum;
7067 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7068 }
7069
542d6675 7070 /* define synonyms for application registers: */
800eeca4
JW		 7071 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7072 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7073 REG_AR + ar[i - REG_AR].regnum);
7074
542d6675 7075 /* define synonyms for control registers: */
800eeca4
JW		 7076 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7077 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7078 REG_CR + cr[i - REG_CR].regnum);
7079
7080 declare_register ("gp", REG_GR + 1);
7081 declare_register ("sp", REG_GR + 12);
7082 declare_register ("rp", REG_BR + 0);
7083
542d6675 7084 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7085 declare_register ("psp", REG_PSP);
7086
800eeca4
JW		 7087 declare_register_set ("ret", 4, REG_GR + 8);
7088 declare_register_set ("farg", 8, REG_FR + 8);
7089 declare_register_set ("fret", 8, REG_FR + 8);
7090
7091 for (i = 0; i < NELEMS (const_bits); ++i)
7092 {
7093 err = hash_insert (md.const_hash, const_bits[i].name,
7094 (PTR) (const_bits + i));
7095 if (err)
7096 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7097 name, err);
7098 }
7099
44f5c83a
JW		 7100 /* Set the architecture and machine depending on defaults and command line
7101 options. */
7102 if (md.flags & EF_IA_64_ABI64)
7103 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7104 else
7105 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7106
7107 if (! ok)
7108 as_warn (_("Could not set architecture and machine"));
800eeca4 7109
557debba
JW		 7110 /* Set the pointer size and pointer shift size depending on md.flags */
7111
7112 if (md.flags & EF_IA_64_ABI64)
7113 {
7114 md.pointer_size = 8; /* pointers are 8 bytes */
7115 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7116 }
7117 else
7118 {
7119 md.pointer_size = 4; /* pointers are 4 bytes */
7120 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7121 }
7122
800eeca4
JW		 7123 md.mem_offset.hint = 0;
7124 md.path = 0;
7125 md.maxpaths = 0;
7126 md.entry_labels = NULL;
7127}
7128
44f5c83a
JW		 7129/* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
7130 because that is called after md_parse_option which is where we do the
7131 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7132 default endianness. */
7133
7134void
7135ia64_init (argc, argv)
2434f565
JW		 7136 int argc ATTRIBUTE_UNUSED;
7137 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7138{
1cd8ff38 7139 md.flags = MD_FLAGS_DEFAULT;
44f5c83a
JW		 7140}
7141
7142/* Return a string for the target object file format. */
7143
7144const char *
7145ia64_target_format ()
7146{
7147 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7148 {
72a76794
JW		 7149 if (md.flags & EF_IA_64_BE)
7150 {
7151 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7152#if defined(TE_AIX50)
7463c317 7153 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7154#elif defined(TE_HPUX)
7155 return "elf64-ia64-hpux-big";
7463c317 7156#else
72a76794 7157 return "elf64-ia64-big";
7463c317 7158#endif
72a76794 7159 else
1cd8ff38 7160#if defined(TE_AIX50)
7463c317 7161 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7162#elif defined(TE_HPUX)
7163 return "elf32-ia64-hpux-big";
7463c317 7164#else
72a76794 7165 return "elf32-ia64-big";
7463c317 7166#endif
72a76794 7167 }
44f5c83a 7168 else
72a76794
JW		 7169 {
7170 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7171#ifdef TE_AIX50
7172 return "elf64-ia64-aix-little";
7173#else
72a76794 7174 return "elf64-ia64-little";
7463c317 7175#endif
72a76794 7176 else
7463c317
TW		 7177#ifdef TE_AIX50
7178 return "elf32-ia64-aix-little";
7179#else
72a76794 7180 return "elf32-ia64-little";
7463c317 7181#endif
72a76794 7182 }
44f5c83a
JW		 7183 }
7184 else
7185 return "unknown-format";
7186}
7187
800eeca4
JW		 7188void
7189ia64_end_of_source ()
7190{
542d6675 7191 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7192 insn_group_break (1, 0, 0);
7193
542d6675 7194 /* emits slots we haven't written yet: */
800eeca4
JW		 7195 ia64_flush_insns ();
7196
7197 bfd_set_private_flags (stdoutput, md.flags);
7198
800eeca4
JW		 7199 md.mem_offset.hint = 0;
7200}
7201
7202void
7203ia64_start_line ()
7204{
f1bcba5b
JW		 7205 if (md.qp.X_op == O_register)
7206 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7207 md.qp.X_op = O_absent;
7208
7209 if (ignore_input ())
7210 return;
7211
7212 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7213 {
7214 if (md.detect_dv && !md.explicit_mode)
542d6675 7215 as_warn (_("Explicit stops are ignored in auto mode"));
800eeca4 7216 else
542d6675 7217 insn_group_break (1, 0, 0);
800eeca4
JW		 7218 }
7219}
7220
f1bcba5b
JW		 7221/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7222 labels. */
7223static int defining_tag = 0;
7224
800eeca4
JW		 7225int
7226ia64_unrecognized_line (ch)
7227 int ch;
7228{
7229 switch (ch)
7230 {
7231 case '(':
7232 expression (&md.qp);
7233 if (*input_line_pointer++ != ')')
7234 {
7235 as_bad ("Expected ')'");
7236 return 0;
7237 }
7238 if (md.qp.X_op != O_register)
7239 {
7240 as_bad ("Qualifying predicate expected");
7241 return 0;
7242 }
7243 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7244 {
7245 as_bad ("Predicate register expected");
7246 return 0;
7247 }
7248 return 1;
7249
7250 case '{':
7251 if (md.manual_bundling)
7252 as_warn ("Found '{' when manual bundling is already turned on");
7253 else
7254 CURR_SLOT.manual_bundling_on = 1;
7255 md.manual_bundling = 1;
7256
542d6675
KH		 7257 /* Bundling is only acceptable in explicit mode
7258 or when in default automatic mode. */
800eeca4 7259 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7260 {
7261 if (!md.mode_explicitly_set
7262 && !md.default_explicit_mode)
7263 dot_dv_mode ('E');
7264 else
7265 as_warn (_("Found '{' after explicit switch to automatic mode"));
7266 }
800eeca4
JW		 7267 return 1;
7268
7269 case '}':
7270 if (!md.manual_bundling)
7271 as_warn ("Found '}' when manual bundling is off");
7272 else
7273 PREV_SLOT.manual_bundling_off = 1;
7274 md.manual_bundling = 0;
7275
7276 /* switch back to automatic mode, if applicable */
197865e8 7277 if (md.detect_dv
542d6675
KH		 7278 && md.explicit_mode
7279 && !md.mode_explicitly_set
7280 && !md.default_explicit_mode)
7281 dot_dv_mode ('A');
800eeca4
JW		 7282
7283 /* Allow '{' to follow on the same line. We also allow ";;", but that
7284 happens automatically because ';' is an end of line marker. */
7285 SKIP_WHITESPACE ();
7286 if (input_line_pointer[0] == '{')
7287 {
7288 input_line_pointer++;
7289 return ia64_unrecognized_line ('{');
7290 }
7291
7292 demand_empty_rest_of_line ();
7293 return 1;
7294
f1bcba5b
JW		 7295 case '[':
7296 {
7297 char *s;
7298 char c;
7299 symbolS *tag;
4d5a53ff 7300 int temp;
f1bcba5b
JW		 7301
7302 if (md.qp.X_op == O_register)
7303 {
7304 as_bad ("Tag must come before qualifying predicate.");
7305 return 0;
7306 }
4d5a53ff
JW		 7307
7308 /* This implements just enough of read_a_source_file in read.c to
7309 recognize labels. */
7310 if (is_name_beginner (*input_line_pointer))
7311 {
7312 s = input_line_pointer;
7313 c = get_symbol_end ();
7314 }
7315 else if (LOCAL_LABELS_FB
3882b010 7316 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7317 {
7318 temp = 0;
3882b010 7319 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7320 temp = (temp * 10) + *input_line_pointer++ - '0';
7321 fb_label_instance_inc (temp);
7322 s = fb_label_name (temp, 0);
7323 c = *input_line_pointer;
7324 }
7325 else
7326 {
7327 s = NULL;
7328 c = '\0';
7329 }
f1bcba5b
JW		 7330 if (c != ':')
7331 {
7332 /* Put ':' back for error messages' sake. */
7333 *input_line_pointer++ = ':';
7334 as_bad ("Expected ':'");
7335 return 0;
7336 }
4d5a53ff 7337
f1bcba5b
JW		 7338 defining_tag = 1;
7339 tag = colon (s);
7340 defining_tag = 0;
7341 /* Put ':' back for error messages' sake. */
7342 *input_line_pointer++ = ':';
7343 if (*input_line_pointer++ != ']')
7344 {
7345 as_bad ("Expected ']'");
7346 return 0;
7347 }
7348 if (! tag)
7349 {
7350 as_bad ("Tag name expected");
7351 return 0;
7352 }
7353 return 1;
7354 }
7355
800eeca4
JW		 7356 default:
7357 break;
7358 }
542d6675
KH		 7359
7360 /* Not a valid line. */
7361 return 0;
800eeca4
JW		 7362}
7363
7364void
7365ia64_frob_label (sym)
7366 struct symbol *sym;
7367{
7368 struct label_fix *fix;
7369
f1bcba5b
JW		 7370 /* Tags need special handling since they are not bundle breaks like
7371 labels. */
7372 if (defining_tag)
7373 {
7374 fix = obstack_alloc (&notes, sizeof (*fix));
7375 fix->sym = sym;
7376 fix->next = CURR_SLOT.tag_fixups;
7377 CURR_SLOT.tag_fixups = fix;
7378
7379 return;
7380 }
7381
800eeca4
JW		 7382 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7383 {
7384 md.last_text_seg = now_seg;
7385 fix = obstack_alloc (&notes, sizeof (*fix));
7386 fix->sym = sym;
7387 fix->next = CURR_SLOT.label_fixups;
7388 CURR_SLOT.label_fixups = fix;
7389
542d6675 7390 /* Keep track of how many code entry points we've seen. */
800eeca4 7391 if (md.path == md.maxpaths)
542d6675
KH		 7392 {
7393 md.maxpaths += 20;
7394 md.entry_labels = (const char **)
7395 xrealloc ((void *) md.entry_labels,
7396 md.maxpaths * sizeof (char *));
7397 }
800eeca4
JW		 7398 md.entry_labels[md.path++] = S_GET_NAME (sym);
7399 }
7400}
7401
936cf02e
JW		 7402#ifdef TE_HPUX
7403/* The HP-UX linker will give unresolved symbol errors for symbols
7404 that are declared but unused. This routine removes declared,
7405 unused symbols from an object. */
7406int
7407ia64_frob_symbol (sym)
7408 struct symbol *sym;
7409{
7410 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7411 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7412 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7413 && ! S_IS_EXTERNAL (sym)))
7414 return 1;
7415 return 0;
7416}
7417#endif
7418
800eeca4
JW		 7419void
7420ia64_flush_pending_output ()
7421{
4d5a53ff
JW		 7422 if (!md.keep_pending_output
7423 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7424 {
7425 /* ??? This causes many unnecessary stop bits to be emitted.
7426 Unfortunately, it isn't clear if it is safe to remove this. */
7427 insn_group_break (1, 0, 0);
7428 ia64_flush_insns ();
7429 }
7430}
7431
7432/* Do ia64-specific expression optimization. All that's done here is
7433 to transform index expressions that are either due to the indexing
7434 of rotating registers or due to the indexing of indirect register
7435 sets. */
7436int
7437ia64_optimize_expr (l, op, r)
7438 expressionS *l;
7439 operatorT op;
7440 expressionS *r;
7441{
7442 unsigned num_regs;
7443
7444 if (op == O_index)
7445 {
7446 if (l->X_op == O_register && r->X_op == O_constant)
7447 {
7448 num_regs = (l->X_add_number >> 16);
7449 if ((unsigned) r->X_add_number >= num_regs)
7450 {
7451 if (!num_regs)
7452 as_bad ("No current frame");
7453 else
7454 as_bad ("Index out of range 0..%u", num_regs - 1);
7455 r->X_add_number = 0;
7456 }
7457 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7458 return 1;
7459 }
7460 else if (l->X_op == O_register && r->X_op == O_register)
7461 {
7462 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7463 || l->X_add_number == IND_MEM)
7464 {
7465 as_bad ("Indirect register set name expected");
7466 l->X_add_number = IND_CPUID;
7467 }
7468 l->X_op = O_index;
7469 l->X_op_symbol = md.regsym[l->X_add_number];
7470 l->X_add_number = r->X_add_number;
7471 return 1;
7472 }
7473 }
7474 return 0;
7475}
7476
7477int
7478ia64_parse_name (name, e)
7479 char *name;
7480 expressionS *e;
7481{
7482 struct const_desc *cdesc;
7483 struct dynreg *dr = 0;
7484 unsigned int regnum;
7485 struct symbol *sym;
7486 char *end;
7487
542d6675 7488 /* first see if NAME is a known register name: */
800eeca4
JW		 7489 sym = hash_find (md.reg_hash, name);
7490 if (sym)
7491 {
7492 e->X_op = O_register;
7493 e->X_add_number = S_GET_VALUE (sym);
7494 return 1;
7495 }
7496
7497 cdesc = hash_find (md.const_hash, name);
7498 if (cdesc)
7499 {
7500 e->X_op = O_constant;
7501 e->X_add_number = cdesc->value;
7502 return 1;
7503 }
7504
542d6675 7505 /* check for inN, locN, or outN: */
800eeca4
JW		 7506 switch (name[0])
7507 {
7508 case 'i':
3882b010 7509 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 7510 {
7511 dr = &md.in;
7512 name += 2;
7513 }
7514 break;
7515
7516 case 'l':
3882b010 7517 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 7518 {
7519 dr = &md.loc;
7520 name += 3;
7521 }
7522 break;
7523
7524 case 'o':
3882b010 7525 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 7526 {
7527 dr = &md.out;
7528 name += 3;
7529 }
7530 break;
7531
7532 default:
7533 break;
7534 }
7535
7536 if (dr)
7537 {
542d6675 7538 /* The name is inN, locN, or outN; parse the register number. */
800eeca4
JW		 7539 regnum = strtoul (name, &end, 10);
7540 if (end > name && *end == '\0')
7541 {
7542 if ((unsigned) regnum >= dr->num_regs)
7543 {
7544 if (!dr->num_regs)
7545 as_bad ("No current frame");
7546 else
542d6675
KH		 7547 as_bad ("Register number out of range 0..%u",
7548 dr->num_regs - 1);
800eeca4
JW		 7549 regnum = 0;
7550 }
7551 e->X_op = O_register;
7552 e->X_add_number = dr->base + regnum;
7553 return 1;
7554 }
7555 }
7556
7557 if ((dr = hash_find (md.dynreg_hash, name)))
7558 {
7559 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 7560 Store the base register number in the low 16 bits of
7561 X_add_number and the size of the register set in the top 16
7562 bits. */
800eeca4
JW		 7563 e->X_op = O_register;
7564 e->X_add_number = dr->base | (dr->num_regs << 16);
7565 return 1;
7566 }
7567 return 0;
7568}
7569
7570/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7571
7572char *
7573ia64_canonicalize_symbol_name (name)
7574 char *name;
7575{
542d6675
KH		 7576 size_t len = strlen (name);
7577 if (len > 1 && name[len - 1] == '#')
7578 name[len - 1] = '\0';
800eeca4
JW		 7579 return name;
7580}
7581
3e37788f
JW		 7582/* Return true if idesc is a conditional branch instruction. This excludes
7583 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7584 because they always read/write resources regardless of the value of the
7585 qualifying predicate. br.ia must always use p0, and hence is always
7586 taken. Thus this function returns true for branches which can fall
7587 through, and which use no resources if they do fall through. */
1deb8127 7588
800eeca4
JW		 7589static int
7590is_conditional_branch (idesc)
542d6675 7591 struct ia64_opcode *idesc;
800eeca4 7592{
1deb8127 7593 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 7594 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7595 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 7596 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7597 && (idesc->name[2] == '\0'
3e37788f
JW		 7598 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7599 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7600 || idesc->name[2] == 'l'
7601 /* br.cond, br.call, br.clr */
7602 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7603 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7604 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 7605}
7606
7607/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 7608 returns zero. */
7609
800eeca4
JW		 7610static int
7611is_taken_branch (idesc)
542d6675 7612 struct ia64_opcode *idesc;
800eeca4
JW		 7613{
7614 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 7615 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 7616}
7617
7618/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 7619 doubt, returns zero. */
7620
800eeca4
JW		 7621static int
7622is_interruption_or_rfi (idesc)
542d6675 7623 struct ia64_opcode *idesc;
800eeca4
JW		 7624{
7625 if (strcmp (idesc->name, "rfi") == 0)
7626 return 1;
7627 return 0;
7628}
7629
7630/* Returns the index of the given dependency in the opcode's list of chks, or
7631 -1 if there is no dependency. */
542d6675 7632
800eeca4
JW		 7633static int
7634depends_on (depind, idesc)
542d6675
KH		 7635 int depind;
7636 struct ia64_opcode *idesc;
800eeca4
JW		 7637{
7638 int i;
7639 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 7640 for (i = 0; i < dep->nchks; i++)
800eeca4 7641 {
542d6675
KH		 7642 if (depind == DEP (dep->chks[i]))
7643 return i;
800eeca4
JW		 7644 }
7645 return -1;
7646}
7647
7648/* Determine a set of specific resources used for a particular resource
7649 class. Returns the number of specific resources identified For those
7650 cases which are not determinable statically, the resource returned is
197865e8 7651 marked nonspecific.
800eeca4
JW		 7652
7653 Meanings of value in 'NOTE':
7654 1) only read/write when the register number is explicitly encoded in the
7655 insn.
7656 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 7657 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 7658 3) general register value is used to specify an indirect register; not
7659 determinable statically.
7660 4) only read the given resource when bits 7:0 of the indirect index
7661 register value does not match the register number of the resource; not
7662 determinable statically.
7663 5) all rules are implementation specific.
7664 6) only when both the index specified by the reader and the index specified
7665 by the writer have the same value in bits 63:61; not determinable
197865e8 7666 statically.
800eeca4 7667 7) only access the specified resource when the corresponding mask bit is
197865e8 7668 set
800eeca4
JW		 7669 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7670 only read when these insns reference FR2-31
7671 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7672 written when these insns write FR32-127
7673 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7674 instruction
7675 11) The target predicates are written independently of PR[qp], but source
7676 registers are only read if PR[qp] is true. Since the state of PR[qp]
7677 cannot statically be determined, all source registers are marked used.
7678 12) This insn only reads the specified predicate register when that
7679 register is the PR[qp].
7680 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 7681 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 7682 14) The RSE resource includes the implementation-specific RSE internal
7683 state resources. At least one (and possibly more) of these resources are
7684 read by each instruction listed in IC:rse-readers. At least one (and
7685 possibly more) of these resources are written by each insn listed in
197865e8 7686 IC:rse-writers.
800eeca4 7687 15+16) Represents reserved instructions, which the assembler does not
197865e8 7688 generate.
800eeca4
JW		 7689
7690 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7691 this code; there are no dependency violations based on memory access.
800eeca4
JW		 7692*/
7693
7694#define MAX_SPECS 256
7695#define DV_CHK 1
7696#define DV_REG 0
7697
7698static int
7699specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 7700 const struct ia64_dependency *dep;
7701 struct ia64_opcode *idesc;
7702 int type; /* is this a DV chk or a DV reg? */
7703 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7704 int note; /* resource note for this insn's usage */
7705 int path; /* which execution path to examine */
800eeca4
JW		 7706{
7707 int count = 0;
7708 int i;
7709 int rsrc_write = 0;
7710 struct rsrc tmpl;
197865e8 7711
800eeca4
JW		 7712 if (dep->mode == IA64_DV_WAW
7713 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7714 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7715 rsrc_write = 1;
7716
7717 /* template for any resources we identify */
7718 tmpl.dependency = dep;
7719 tmpl.note = note;
7720 tmpl.insn_srlz = tmpl.data_srlz = 0;
7721 tmpl.qp_regno = CURR_SLOT.qp_regno;
7722 tmpl.link_to_qp_branch = 1;
7723 tmpl.mem_offset.hint = 0;
7724 tmpl.specific = 1;
7725 tmpl.index = 0;
7484b8e6 7726 tmpl.cmp_type = CMP_NONE;
800eeca4
JW		 7727
7728#define UNHANDLED \
7729as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7730dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7731#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7732
7733 /* we don't need to track these */
7734 if (dep->semantics == IA64_DVS_NONE)
7735 return 0;
7736
7737 switch (dep->specifier)
7738 {
7739 case IA64_RS_AR_K:
7740 if (note == 1)
542d6675
KH		 7741 {
7742 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7743 {
7744 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7745 if (regno >= 0 && regno <= 7)
7746 {
7747 specs[count] = tmpl;
7748 specs[count++].index = regno;
7749 }
7750 }
7751 }
800eeca4 7752 else if (note == 0)
542d6675
KH		 7753 {
7754 for (i = 0; i < 8; i++)
7755 {
7756 specs[count] = tmpl;
7757 specs[count++].index = i;
7758 }
7759 }
800eeca4 7760 else
542d6675
KH		 7761 {
7762 UNHANDLED;
7763 }
800eeca4
JW		 7764 break;
7765
7766 case IA64_RS_AR_UNAT:
7767 /* This is a mov =AR or mov AR= instruction. */
7768 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7769 {
7770 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7771 if (regno == AR_UNAT)
7772 {
7773 specs[count++] = tmpl;
7774 }
7775 }
7776 else
7777 {
7778 /* This is a spill/fill, or other instruction that modifies the
7779 unat register. */
7780
7781 /* Unless we can determine the specific bits used, mark the whole
7782 thing; bits 8:3 of the memory address indicate the bit used in
7783 UNAT. The .mem.offset hint may be used to eliminate a small
7784 subset of conflicts. */
7785 specs[count] = tmpl;
7786 if (md.mem_offset.hint)
7787 {
542d6675
KH		 7788 if (md.debug_dv)
7789 fprintf (stderr, " Using hint for spill/fill\n");
7790 /* The index isn't actually used, just set it to something
7791 approximating the bit index. */
800eeca4
JW		 7792 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7793 specs[count].mem_offset.hint = 1;
7794 specs[count].mem_offset.offset = md.mem_offset.offset;
7795 specs[count++].mem_offset.base = md.mem_offset.base;
7796 }
7797 else
7798 {
7799 specs[count++].specific = 0;
7800 }
7801 }
7802 break;
7803
7804 case IA64_RS_AR:
7805 if (note == 1)
542d6675
KH		 7806 {
7807 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7808 {
7809 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7810 if ((regno >= 8 && regno <= 15)
7811 || (regno >= 20 && regno <= 23)
7812 || (regno >= 31 && regno <= 39)
7813 || (regno >= 41 && regno <= 47)
7814 || (regno >= 67 && regno <= 111))
7815 {
7816 specs[count] = tmpl;
7817 specs[count++].index = regno;
7818 }
7819 }
7820 }
800eeca4 7821 else
542d6675
KH		 7822 {
7823 UNHANDLED;
7824 }
800eeca4
JW		 7825 break;
7826
7827 case IA64_RS_ARb:
7828 if (note == 1)
542d6675
KH		 7829 {
7830 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7831 {
7832 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7833 if ((regno >= 48 && regno <= 63)
7834 || (regno >= 112 && regno <= 127))
7835 {
7836 specs[count] = tmpl;
7837 specs[count++].index = regno;
7838 }
7839 }
7840 }
800eeca4 7841 else if (note == 0)
542d6675
KH		 7842 {
7843 for (i = 48; i < 64; i++)
7844 {
7845 specs[count] = tmpl;
7846 specs[count++].index = i;
7847 }
7848 for (i = 112; i < 128; i++)
7849 {
7850 specs[count] = tmpl;
7851 specs[count++].index = i;
7852 }
7853 }
197865e8 7854 else
542d6675
KH		 7855 {
7856 UNHANDLED;
7857 }
800eeca4
JW		 7858 break;
7859
7860 case IA64_RS_BR:
7861 if (note != 1)
542d6675
KH		 7862 {
7863 UNHANDLED;
7864 }
800eeca4 7865 else
542d6675
KH		 7866 {
7867 if (rsrc_write)
7868 {
7869 for (i = 0; i < idesc->num_outputs; i++)
7870 if (idesc->operands[i] == IA64_OPND_B1
7871 || idesc->operands[i] == IA64_OPND_B2)
7872 {
7873 specs[count] = tmpl;
7874 specs[count++].index =
7875 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7876 }
7877 }
7878 else
7879 {
40449e9f 7880 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 7881 if (idesc->operands[i] == IA64_OPND_B1
7882 || idesc->operands[i] == IA64_OPND_B2)
7883 {
7884 specs[count] = tmpl;
7885 specs[count++].index =
7886 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7887 }
7888 }
7889 }
800eeca4
JW		 7890 break;
7891
7892 case IA64_RS_CPUID: /* four or more registers */
7893 if (note == 3)
542d6675
KH		 7894 {
7895 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7896 {
7897 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7898 if (regno >= 0 && regno < NELEMS (gr_values)
7899 && KNOWN (regno))
7900 {
7901 specs[count] = tmpl;
7902 specs[count++].index = gr_values[regno].value & 0xFF;
7903 }
7904 else
7905 {
7906 specs[count] = tmpl;
7907 specs[count++].specific = 0;
7908 }
7909 }
7910 }
800eeca4 7911 else
542d6675
KH		 7912 {
7913 UNHANDLED;
7914 }
800eeca4
JW		 7915 break;
7916
7917 case IA64_RS_DBR: /* four or more registers */
7918 if (note == 3)
542d6675
KH		 7919 {
7920 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7921 {
7922 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7923 if (regno >= 0 && regno < NELEMS (gr_values)
7924 && KNOWN (regno))
7925 {
7926 specs[count] = tmpl;
7927 specs[count++].index = gr_values[regno].value & 0xFF;
7928 }
7929 else
7930 {
7931 specs[count] = tmpl;
7932 specs[count++].specific = 0;
7933 }
7934 }
7935 }
800eeca4 7936 else if (note == 0 && !rsrc_write)
542d6675
KH		 7937 {
7938 specs[count] = tmpl;
7939 specs[count++].specific = 0;
7940 }
800eeca4 7941 else
542d6675
KH		 7942 {
7943 UNHANDLED;
7944 }
800eeca4
JW		 7945 break;
7946
7947 case IA64_RS_IBR: /* four or more registers */
7948 if (note == 3)
542d6675
KH		 7949 {
7950 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7951 {
7952 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7953 if (regno >= 0 && regno < NELEMS (gr_values)
7954 && KNOWN (regno))
7955 {
7956 specs[count] = tmpl;
7957 specs[count++].index = gr_values[regno].value & 0xFF;
7958 }
7959 else
7960 {
7961 specs[count] = tmpl;
7962 specs[count++].specific = 0;
7963 }
7964 }
7965 }
800eeca4 7966 else
542d6675
KH		 7967 {
7968 UNHANDLED;
7969 }
800eeca4
JW		 7970 break;
7971
7972 case IA64_RS_MSR:
7973 if (note == 5)
7974 {
7975 /* These are implementation specific. Force all references to
7976 conflict with all other references. */
7977 specs[count] = tmpl;
7978 specs[count++].specific = 0;
7979 }
7980 else
7981 {
7982 UNHANDLED;
7983 }
7984 break;
7985
7986 case IA64_RS_PKR: /* 16 or more registers */
7987 if (note == 3 || note == 4)
542d6675
KH		 7988 {
7989 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7990 {
7991 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7992 if (regno >= 0 && regno < NELEMS (gr_values)
7993 && KNOWN (regno))
7994 {
7995 if (note == 3)
7996 {
7997 specs[count] = tmpl;
7998 specs[count++].index = gr_values[regno].value & 0xFF;
7999 }
8000 else
8001 for (i = 0; i < NELEMS (gr_values); i++)
8002 {
8003 /* Uses all registers *except* the one in R3. */
2434f565 8004 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 8005 {
8006 specs[count] = tmpl;
8007 specs[count++].index = i;
8008 }
8009 }
8010 }
8011 else
8012 {
8013 specs[count] = tmpl;
8014 specs[count++].specific = 0;
8015 }
8016 }
8017 }
8018 else if (note == 0)
8019 {
8020 /* probe et al. */
8021 specs[count] = tmpl;
8022 specs[count++].specific = 0;
8023 }
8024 break;
8025
8026 case IA64_RS_PMC: /* four or more registers */
8027 if (note == 3)
8028 {
8029 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8030 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8031
8032 {
8033 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8034 ? 1 : !rsrc_write);
8035 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8036 if (regno >= 0 && regno < NELEMS (gr_values)
8037 && KNOWN (regno))
8038 {
8039 specs[count] = tmpl;
8040 specs[count++].index = gr_values[regno].value & 0xFF;
8041 }
8042 else
8043 {
8044 specs[count] = tmpl;
8045 specs[count++].specific = 0;
8046 }
8047 }
8048 }
8049 else
8050 {
8051 UNHANDLED;
8052 }
800eeca4
JW		 8053 break;
8054
8055 case IA64_RS_PMD: /* four or more registers */
8056 if (note == 3)
542d6675
KH		 8057 {
8058 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8059 {
8060 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8061 if (regno >= 0 && regno < NELEMS (gr_values)
8062 && KNOWN (regno))
8063 {
8064 specs[count] = tmpl;
8065 specs[count++].index = gr_values[regno].value & 0xFF;
8066 }
8067 else
8068 {
8069 specs[count] = tmpl;
8070 specs[count++].specific = 0;
8071 }
8072 }
8073 }
800eeca4 8074 else
542d6675
KH		 8075 {
8076 UNHANDLED;
8077 }
800eeca4
JW		 8078 break;
8079
8080 case IA64_RS_RR: /* eight registers */
8081 if (note == 6)
542d6675
KH		 8082 {
8083 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8084 {
8085 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8086 if (regno >= 0 && regno < NELEMS (gr_values)
8087 && KNOWN (regno))
8088 {
8089 specs[count] = tmpl;
8090 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8091 }
8092 else
8093 {
8094 specs[count] = tmpl;
8095 specs[count++].specific = 0;
8096 }
8097 }
8098 }
800eeca4 8099 else if (note == 0 && !rsrc_write)
542d6675
KH		 8100 {
8101 specs[count] = tmpl;
8102 specs[count++].specific = 0;
8103 }
197865e8 8104 else
542d6675
KH		 8105 {
8106 UNHANDLED;
8107 }
800eeca4
JW		 8108 break;
8109
8110 case IA64_RS_CR_IRR:
197865e8 8111 if (note == 0)
542d6675
KH		 8112 {
8113 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8114 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8115 if (rsrc_write
8116 && idesc->operands[1] == IA64_OPND_CR3
8117 && regno == CR_IVR)
8118 {
8119 for (i = 0; i < 4; i++)
8120 {
8121 specs[count] = tmpl;
8122 specs[count++].index = CR_IRR0 + i;
8123 }
8124 }
8125 }
800eeca4 8126 else if (note == 1)
542d6675
KH		 8127 {
8128 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8129 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8130 && regno >= CR_IRR0
8131 && regno <= CR_IRR3)
8132 {
8133 specs[count] = tmpl;
8134 specs[count++].index = regno;
8135 }
8136 }
800eeca4 8137 else
542d6675
KH		 8138 {
8139 UNHANDLED;
8140 }
800eeca4
JW		 8141 break;
8142
8143 case IA64_RS_CR_LRR:
8144 if (note != 1)
542d6675
KH		 8145 {
8146 UNHANDLED;
8147 }
197865e8 8148 else
542d6675
KH		 8149 {
8150 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8151 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8152 && (regno == CR_LRR0 || regno == CR_LRR1))
8153 {
8154 specs[count] = tmpl;
8155 specs[count++].index = regno;
8156 }
8157 }
800eeca4
JW		 8158 break;
8159
8160 case IA64_RS_CR:
8161 if (note == 1)
542d6675
KH		 8162 {
8163 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8164 {
8165 specs[count] = tmpl;
8166 specs[count++].index =
8167 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8168 }
8169 }
800eeca4 8170 else
542d6675
KH		 8171 {
8172 UNHANDLED;
8173 }
800eeca4
JW		 8174 break;
8175
8176 case IA64_RS_FR:
8177 case IA64_RS_FRb:
8178 if (note != 1)
542d6675
KH		 8179 {
8180 UNHANDLED;
8181 }
800eeca4 8182 else if (rsrc_write)
542d6675
KH		 8183 {
8184 if (dep->specifier == IA64_RS_FRb
8185 && idesc->operands[0] == IA64_OPND_F1)
8186 {
8187 specs[count] = tmpl;
8188 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8189 }
8190 }
800eeca4 8191 else
542d6675
KH		 8192 {
8193 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8194 {
8195 if (idesc->operands[i] == IA64_OPND_F2
8196 || idesc->operands[i] == IA64_OPND_F3
8197 || idesc->operands[i] == IA64_OPND_F4)
8198 {
8199 specs[count] = tmpl;
8200 specs[count++].index =
8201 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8202 }
8203 }
8204 }
800eeca4
JW		 8205 break;
8206
8207 case IA64_RS_GR:
8208 if (note == 13)
542d6675
KH		 8209 {
8210 /* This reference applies only to the GR whose value is loaded with
8211 data returned from memory. */
8212 specs[count] = tmpl;
8213 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8214 }
800eeca4 8215 else if (note == 1)
542d6675
KH		 8216 {
8217 if (rsrc_write)
8218 {
8219 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8220 if (idesc->operands[i] == IA64_OPND_R1
8221 || idesc->operands[i] == IA64_OPND_R2
8222 || idesc->operands[i] == IA64_OPND_R3)
8223 {
8224 specs[count] = tmpl;
197865e8 8225 specs[count++].index =
50b81f19
JW		 8226 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8227 }
8228 if (idesc->flags & IA64_OPCODE_POSTINC)
8229 for (i = 0; i < NELEMS (idesc->operands); i++)
8230 if (idesc->operands[i] == IA64_OPND_MR3)
8231 {
8232 specs[count] = tmpl;
8233 specs[count++].index =
8234 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8235 }
542d6675
KH		 8236 }
8237 else
8238 {
8239 /* Look for anything that reads a GR. */
8240 for (i = 0; i < NELEMS (idesc->operands); i++)
8241 {
8242 if (idesc->operands[i] == IA64_OPND_MR3
8243 || idesc->operands[i] == IA64_OPND_CPUID_R3
8244 || idesc->operands[i] == IA64_OPND_DBR_R3
8245 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8246 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8247 || idesc->operands[i] == IA64_OPND_PKR_R3
8248 || idesc->operands[i] == IA64_OPND_PMC_R3
8249 || idesc->operands[i] == IA64_OPND_PMD_R3
8250 || idesc->operands[i] == IA64_OPND_RR_R3
8251 || ((i >= idesc->num_outputs)
8252 && (idesc->operands[i] == IA64_OPND_R1
8253 || idesc->operands[i] == IA64_OPND_R2
8254 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8255 /* addl source register. */
8256 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8257 {
8258 specs[count] = tmpl;
8259 specs[count++].index =
8260 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8261 }
8262 }
8263 }
8264 }
197865e8 8265 else
542d6675
KH		 8266 {
8267 UNHANDLED;
8268 }
800eeca4
JW		 8269 break;
8270
139368c9
JW		 8271 /* This is the same as IA64_RS_PRr, except that the register range is
8272 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8273 case IA64_RS_PR:
8274 if (note == 0)
542d6675 8275 {
139368c9 8276 for (i = 1; i < 16; i++)
542d6675 8277 {
139368c9
JW		 8278 specs[count] = tmpl;
8279 specs[count++].index = i;
8280 }
8281 }
8282 else if (note == 7)
8283 {
8284 valueT mask = 0;
8285 /* Mark only those registers indicated by the mask. */
8286 if (rsrc_write)
8287 {
8288 mask = CURR_SLOT.opnd[2].X_add_number;
8289 for (i = 1; i < 16; i++)
8290 if (mask & ((valueT) 1 << i))
8291 {
8292 specs[count] = tmpl;
8293 specs[count++].index = i;
8294 }
8295 }
8296 else
8297 {
8298 UNHANDLED;
8299 }
8300 }
8301 else if (note == 11) /* note 11 implies note 1 as well */
8302 {
8303 if (rsrc_write)
8304 {
8305 for (i = 0; i < idesc->num_outputs; i++)
8306 {
8307 if (idesc->operands[i] == IA64_OPND_P1
8308 || idesc->operands[i] == IA64_OPND_P2)
8309 {
8310 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8311 if (regno >= 1 && regno < 16)
8312 {
8313 specs[count] = tmpl;
8314 specs[count++].index = regno;
8315 }
8316 }
8317 }
8318 }
8319 else
8320 {
8321 UNHANDLED;
8322 }
8323 }
8324 else if (note == 12)
8325 {
8326 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8327 {
8328 specs[count] = tmpl;
8329 specs[count++].index = CURR_SLOT.qp_regno;
8330 }
8331 }
8332 else if (note == 1)
8333 {
8334 if (rsrc_write)
8335 {
8336 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8337 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8338 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8339 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8340
8341 if ((idesc->operands[0] == IA64_OPND_P1
8342 || idesc->operands[0] == IA64_OPND_P2)
8343 && p1 >= 1 && p1 < 16)
542d6675
KH		 8344 {
8345 specs[count] = tmpl;
139368c9
JW		 8346 specs[count].cmp_type =
8347 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8348 specs[count++].index = p1;
8349 }
8350 if ((idesc->operands[1] == IA64_OPND_P1
8351 || idesc->operands[1] == IA64_OPND_P2)
8352 && p2 >= 1 && p2 < 16)
8353 {
8354 specs[count] = tmpl;
8355 specs[count].cmp_type =
8356 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8357 specs[count++].index = p2;
542d6675
KH		 8358 }
8359 }
8360 else
8361 {
139368c9 8362 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8363 {
8364 specs[count] = tmpl;
139368c9
JW		 8365 specs[count++].index = CURR_SLOT.qp_regno;
8366 }
8367 if (idesc->operands[1] == IA64_OPND_PR)
8368 {
8369 for (i = 1; i < 16; i++)
8370 {
8371 specs[count] = tmpl;
8372 specs[count++].index = i;
8373 }
542d6675
KH		 8374 }
8375 }
8376 }
139368c9
JW		 8377 else
8378 {
8379 UNHANDLED;
8380 }
8381 break;
8382
8383 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8384 simplified cases of this. */
8385 case IA64_RS_PRr:
8386 if (note == 0)
8387 {
8388 for (i = 16; i < 63; i++)
8389 {
8390 specs[count] = tmpl;
8391 specs[count++].index = i;
8392 }
8393 }
800eeca4 8394 else if (note == 7)
542d6675
KH		 8395 {
8396 valueT mask = 0;
8397 /* Mark only those registers indicated by the mask. */
8398 if (rsrc_write
8399 && idesc->operands[0] == IA64_OPND_PR)
8400 {
8401 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 8402 if (mask & ((valueT) 1 << 16))
139368c9
JW		 8403 for (i = 16; i < 63; i++)
8404 {
8405 specs[count] = tmpl;
8406 specs[count++].index = i;
8407 }
542d6675
KH		 8408 }
8409 else if (rsrc_write
8410 && idesc->operands[0] == IA64_OPND_PR_ROT)
8411 {
8412 for (i = 16; i < 63; i++)
8413 {
8414 specs[count] = tmpl;
8415 specs[count++].index = i;
8416 }
8417 }
8418 else
8419 {
8420 UNHANDLED;
8421 }
8422 }
800eeca4 8423 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 8424 {
8425 if (rsrc_write)
8426 {
8427 for (i = 0; i < idesc->num_outputs; i++)
8428 {
8429 if (idesc->operands[i] == IA64_OPND_P1
8430 || idesc->operands[i] == IA64_OPND_P2)
8431 {
8432 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 8433 if (regno >= 16 && regno < 63)
542d6675
KH		 8434 {
8435 specs[count] = tmpl;
8436 specs[count++].index = regno;
8437 }
8438 }
8439 }
8440 }
8441 else
8442 {
8443 UNHANDLED;
8444 }
8445 }
800eeca4 8446 else if (note == 12)
542d6675 8447 {
139368c9 8448 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8449 {
8450 specs[count] = tmpl;
8451 specs[count++].index = CURR_SLOT.qp_regno;
8452 }
8453 }
800eeca4 8454 else if (note == 1)
542d6675
KH		 8455 {
8456 if (rsrc_write)
8457 {
8458 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8459 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8460 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8461 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8462
542d6675
KH		 8463 if ((idesc->operands[0] == IA64_OPND_P1
8464 || idesc->operands[0] == IA64_OPND_P2)
139368c9 8465 && p1 >= 16 && p1 < 63)
542d6675
KH		 8466 {
8467 specs[count] = tmpl;
4a4f25cf 8468 specs[count].cmp_type =
7484b8e6 8469 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 8470 specs[count++].index = p1;
8471 }
8472 if ((idesc->operands[1] == IA64_OPND_P1
8473 || idesc->operands[1] == IA64_OPND_P2)
139368c9 8474 && p2 >= 16 && p2 < 63)
542d6675
KH		 8475 {
8476 specs[count] = tmpl;
4a4f25cf 8477 specs[count].cmp_type =
7484b8e6 8478 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 8479 specs[count++].index = p2;
8480 }
8481 }
8482 else
8483 {
139368c9 8484 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8485 {
8486 specs[count] = tmpl;
8487 specs[count++].index = CURR_SLOT.qp_regno;
8488 }
8489 if (idesc->operands[1] == IA64_OPND_PR)
8490 {
139368c9 8491 for (i = 16; i < 63; i++)
542d6675
KH		 8492 {
8493 specs[count] = tmpl;
8494 specs[count++].index = i;
8495 }
8496 }
8497 }
8498 }
197865e8 8499 else
542d6675
KH		 8500 {
8501 UNHANDLED;
8502 }
800eeca4
JW		 8503 break;
8504
8505 case IA64_RS_PSR:
197865e8 8506 /* Verify that the instruction is using the PSR bit indicated in
542d6675 8507 dep->regindex. */
800eeca4 8508 if (note == 0)
542d6675
KH		 8509 {
8510 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8511 {
8512 if (dep->regindex < 6)
8513 {
8514 specs[count++] = tmpl;
8515 }
8516 }
8517 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8518 {
8519 if (dep->regindex < 32
8520 || dep->regindex == 35
8521 || dep->regindex == 36
8522 || (!rsrc_write && dep->regindex == PSR_CPL))
8523 {
8524 specs[count++] = tmpl;
8525 }
8526 }
8527 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8528 {
8529 if (dep->regindex < 32
8530 || dep->regindex == 35
8531 || dep->regindex == 36
8532 || (rsrc_write && dep->regindex == PSR_CPL))
8533 {
8534 specs[count++] = tmpl;
8535 }
8536 }
8537 else
8538 {
8539 /* Several PSR bits have very specific dependencies. */
8540 switch (dep->regindex)
8541 {
8542 default:
8543 specs[count++] = tmpl;
8544 break;
8545 case PSR_IC:
8546 if (rsrc_write)
8547 {
8548 specs[count++] = tmpl;
8549 }
8550 else
8551 {
8552 /* Only certain CR accesses use PSR.ic */
8553 if (idesc->operands[0] == IA64_OPND_CR3
8554 || idesc->operands[1] == IA64_OPND_CR3)
8555 {
8556 int index =
8557 ((idesc->operands[0] == IA64_OPND_CR3)
8558 ? 0 : 1);
8559 int regno =
8560 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8561
8562 switch (regno)
8563 {
8564 default:
8565 break;
8566 case CR_ITIR:
8567 case CR_IFS:
8568 case CR_IIM:
8569 case CR_IIP:
8570 case CR_IPSR:
8571 case CR_ISR:
8572 case CR_IFA:
8573 case CR_IHA:
8574 case CR_IIPA:
8575 specs[count++] = tmpl;
8576 break;
8577 }
8578 }
8579 }
8580 break;
8581 case PSR_CPL:
8582 if (rsrc_write)
8583 {
8584 specs[count++] = tmpl;
8585 }
8586 else
8587 {
8588 /* Only some AR accesses use cpl */
8589 if (idesc->operands[0] == IA64_OPND_AR3
8590 || idesc->operands[1] == IA64_OPND_AR3)
8591 {
8592 int index =
8593 ((idesc->operands[0] == IA64_OPND_AR3)
8594 ? 0 : 1);
8595 int regno =
8596 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8597
8598 if (regno == AR_ITC
8599 || (index == 0
8600 && (regno == AR_ITC
8601 || regno == AR_RSC
8602 || (regno >= AR_K0
8603 && regno <= AR_K7))))
8604 {
8605 specs[count++] = tmpl;
8606 }
8607 }
8608 else
8609 {
8610 specs[count++] = tmpl;
8611 }
8612 break;
8613 }
8614 }
8615 }
8616 }
800eeca4 8617 else if (note == 7)
542d6675
KH		 8618 {
8619 valueT mask = 0;
8620 if (idesc->operands[0] == IA64_OPND_IMMU24)
8621 {
8622 mask = CURR_SLOT.opnd[0].X_add_number;
8623 }
8624 else
8625 {
8626 UNHANDLED;
8627 }
8628 if (mask & ((valueT) 1 << dep->regindex))
8629 {
8630 specs[count++] = tmpl;
8631 }
8632 }
800eeca4 8633 else if (note == 8)
542d6675
KH		 8634 {
8635 int min = dep->regindex == PSR_DFL ? 2 : 32;
8636 int max = dep->regindex == PSR_DFL ? 31 : 127;
8637 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8638 for (i = 0; i < NELEMS (idesc->operands); i++)
8639 {
8640 if (idesc->operands[i] == IA64_OPND_F1
8641 || idesc->operands[i] == IA64_OPND_F2
8642 || idesc->operands[i] == IA64_OPND_F3
8643 || idesc->operands[i] == IA64_OPND_F4)
8644 {
8645 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8646 if (reg >= min && reg <= max)
8647 {
8648 specs[count++] = tmpl;
8649 }
8650 }
8651 }
8652 }
800eeca4 8653 else if (note == 9)
542d6675
KH		 8654 {
8655 int min = dep->regindex == PSR_MFL ? 2 : 32;
8656 int max = dep->regindex == PSR_MFL ? 31 : 127;
8657 /* mfh is read on writes to FR32-127; mfl is read on writes to
8658 FR2-31 */
8659 for (i = 0; i < idesc->num_outputs; i++)
8660 {
8661 if (idesc->operands[i] == IA64_OPND_F1)
8662 {
8663 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8664 if (reg >= min && reg <= max)
8665 {
8666 specs[count++] = tmpl;
8667 }
8668 }
8669 }
8670 }
800eeca4 8671 else if (note == 10)
542d6675
KH		 8672 {
8673 for (i = 0; i < NELEMS (idesc->operands); i++)
8674 {
8675 if (idesc->operands[i] == IA64_OPND_R1
8676 || idesc->operands[i] == IA64_OPND_R2
8677 || idesc->operands[i] == IA64_OPND_R3)
8678 {
8679 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8680 if (regno >= 16 && regno <= 31)
8681 {
8682 specs[count++] = tmpl;
8683 }
8684 }
8685 }
8686 }
800eeca4 8687 else
542d6675
KH		 8688 {
8689 UNHANDLED;
8690 }
800eeca4
JW		 8691 break;
8692
8693 case IA64_RS_AR_FPSR:
8694 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 8695 {
8696 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8697 if (regno == AR_FPSR)
8698 {
8699 specs[count++] = tmpl;
8700 }
8701 }
800eeca4 8702 else
542d6675
KH		 8703 {
8704 specs[count++] = tmpl;
8705 }
800eeca4
JW		 8706 break;
8707
197865e8 8708 case IA64_RS_ARX:
800eeca4
JW		 8709 /* Handle all AR[REG] resources */
8710 if (note == 0 || note == 1)
542d6675
KH		 8711 {
8712 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8713 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8714 && regno == dep->regindex)
8715 {
8716 specs[count++] = tmpl;
8717 }
8718 /* other AR[REG] resources may be affected by AR accesses */
8719 else if (idesc->operands[0] == IA64_OPND_AR3)
8720 {
8721 /* AR[] writes */
8722 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8723 switch (dep->regindex)
8724 {
8725 default:
8726 break;
8727 case AR_BSP:
8728 case AR_RNAT:
8729 if (regno == AR_BSPSTORE)
8730 {
8731 specs[count++] = tmpl;
8732 }
8733 case AR_RSC:
8734 if (!rsrc_write &&
8735 (regno == AR_BSPSTORE
8736 || regno == AR_RNAT))
8737 {
8738 specs[count++] = tmpl;
8739 }
8740 break;
8741 }
8742 }
8743 else if (idesc->operands[1] == IA64_OPND_AR3)
8744 {
8745 /* AR[] reads */
8746 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8747 switch (dep->regindex)
8748 {
8749 default:
8750 break;
8751 case AR_RSC:
8752 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8753 {
8754 specs[count++] = tmpl;
8755 }
8756 break;
8757 }
8758 }
8759 else
8760 {
8761 specs[count++] = tmpl;
8762 }
8763 }
800eeca4 8764 else
542d6675
KH		 8765 {
8766 UNHANDLED;
8767 }
800eeca4
JW		 8768 break;
8769
8770 case IA64_RS_CRX:
8771 /* Handle all CR[REG] resources */
8772 if (note == 0 || note == 1)
542d6675
KH		 8773 {
8774 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8775 {
8776 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8777 if (regno == dep->regindex)
8778 {
8779 specs[count++] = tmpl;
8780 }
8781 else if (!rsrc_write)
8782 {
8783 /* Reads from CR[IVR] affect other resources. */
8784 if (regno == CR_IVR)
8785 {
8786 if ((dep->regindex >= CR_IRR0
8787 && dep->regindex <= CR_IRR3)
8788 || dep->regindex == CR_TPR)
8789 {
8790 specs[count++] = tmpl;
8791 }
8792 }
8793 }
8794 }
8795 else
8796 {
8797 specs[count++] = tmpl;
8798 }
8799 }
800eeca4 8800 else
542d6675
KH		 8801 {
8802 UNHANDLED;
8803 }
800eeca4
JW		 8804 break;
8805
8806 case IA64_RS_INSERVICE:
8807 /* look for write of EOI (67) or read of IVR (65) */
8808 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 8809 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8810 || (idesc->operands[1] == IA64_OPND_CR3
8811 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8812 {
8813 specs[count++] = tmpl;
8814 }
800eeca4
JW		 8815 break;
8816
8817 case IA64_RS_GR0:
8818 if (note == 1)
542d6675
KH		 8819 {
8820 specs[count++] = tmpl;
8821 }
800eeca4 8822 else
542d6675
KH		 8823 {
8824 UNHANDLED;
8825 }
800eeca4
JW		 8826 break;
8827
8828 case IA64_RS_CFM:
8829 if (note != 2)
542d6675
KH		 8830 {
8831 specs[count++] = tmpl;
8832 }
800eeca4 8833 else
542d6675
KH		 8834 {
8835 /* Check if any of the registers accessed are in the rotating region.
8836 mov to/from pr accesses CFM only when qp_regno is in the rotating
8837 region */
8838 for (i = 0; i < NELEMS (idesc->operands); i++)
8839 {
8840 if (idesc->operands[i] == IA64_OPND_R1
8841 || idesc->operands[i] == IA64_OPND_R2
8842 || idesc->operands[i] == IA64_OPND_R3)
8843 {
8844 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8845 /* Assumes that md.rot.num_regs is always valid */
8846 if (md.rot.num_regs > 0
8847 && num > 31
8848 && num < 31 + md.rot.num_regs)
8849 {
8850 specs[count] = tmpl;
8851 specs[count++].specific = 0;
8852 }
8853 }
8854 else if (idesc->operands[i] == IA64_OPND_F1
8855 || idesc->operands[i] == IA64_OPND_F2
8856 || idesc->operands[i] == IA64_OPND_F3
8857 || idesc->operands[i] == IA64_OPND_F4)
8858 {
8859 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8860 if (num > 31)
8861 {
8862 specs[count] = tmpl;
8863 specs[count++].specific = 0;
8864 }
8865 }
8866 else if (idesc->operands[i] == IA64_OPND_P1
8867 || idesc->operands[i] == IA64_OPND_P2)
8868 {
8869 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8870 if (num > 15)
8871 {
8872 specs[count] = tmpl;
8873 specs[count++].specific = 0;
8874 }
8875 }
8876 }
8877 if (CURR_SLOT.qp_regno > 15)
8878 {
8879 specs[count] = tmpl;
8880 specs[count++].specific = 0;
8881 }
8882 }
800eeca4
JW		 8883 break;
8884
139368c9
JW		 8885 /* This is the same as IA64_RS_PRr, except simplified to account for
8886 the fact that there is only one register. */
800eeca4
JW		 8887 case IA64_RS_PR63:
8888 if (note == 0)
542d6675
KH		 8889 {
8890 specs[count++] = tmpl;
8891 }
139368c9 8892 else if (note == 7)
40449e9f
KH		 8893 {
8894 valueT mask = 0;
8895 if (idesc->operands[2] == IA64_OPND_IMM17)
8896 mask = CURR_SLOT.opnd[2].X_add_number;
8897 if (mask & ((valueT) 1 << 63))
139368c9 8898 specs[count++] = tmpl;
40449e9f 8899 }
800eeca4 8900 else if (note == 11)
542d6675
KH		 8901 {
8902 if ((idesc->operands[0] == IA64_OPND_P1
8903 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8904 || (idesc->operands[1] == IA64_OPND_P2
8905 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8906 {
8907 specs[count++] = tmpl;
8908 }
8909 }
800eeca4 8910 else if (note == 12)
542d6675
KH		 8911 {
8912 if (CURR_SLOT.qp_regno == 63)
8913 {
8914 specs[count++] = tmpl;
8915 }
8916 }
800eeca4 8917 else if (note == 1)
542d6675
KH		 8918 {
8919 if (rsrc_write)
8920 {
40449e9f
KH		 8921 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8922 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8923 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8924 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8925
4a4f25cf 8926 if (p1 == 63
7484b8e6
TW		 8927 && (idesc->operands[0] == IA64_OPND_P1
8928 || idesc->operands[0] == IA64_OPND_P2))
8929 {
40449e9f 8930 specs[count] = tmpl;
4a4f25cf 8931 specs[count++].cmp_type =
7484b8e6
TW		 8932 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8933 }
8934 if (p2 == 63
8935 && (idesc->operands[1] == IA64_OPND_P1
8936 || idesc->operands[1] == IA64_OPND_P2))
8937 {
40449e9f 8938 specs[count] = tmpl;
4a4f25cf 8939 specs[count++].cmp_type =
7484b8e6
TW		 8940 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8941 }
542d6675
KH		 8942 }
8943 else
8944 {
8945 if (CURR_SLOT.qp_regno == 63)
8946 {
8947 specs[count++] = tmpl;
8948 }
8949 }
8950 }
800eeca4 8951 else
542d6675
KH		 8952 {
8953 UNHANDLED;
8954 }
800eeca4
JW		 8955 break;
8956
8957 case IA64_RS_RSE:
8958 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 8959 read resources have not yet been completely identified, so for now
8960 treat RSE as a single resource */
800eeca4 8961 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 8962 {
8963 if (rsrc_write)
8964 {
8965 if (idesc->operands[0] == IA64_OPND_AR3
8966 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8967 {
8968 specs[count] = tmpl;
8969 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8970 }
8971 }
8972 else
8973 {
8974 if (idesc->operands[0] == IA64_OPND_AR3)
8975 {
8976 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8977 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8978 {
8979 specs[count++] = tmpl;
8980 }
8981 }
8982 else if (idesc->operands[1] == IA64_OPND_AR3)
8983 {
8984 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8985 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8986 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8987 {
8988 specs[count++] = tmpl;
8989 }
8990 }
8991 }
8992 }
197865e8 8993 else
542d6675
KH		 8994 {
8995 specs[count++] = tmpl;
8996 }
800eeca4
JW		 8997 break;
8998
8999 case IA64_RS_ANY:
9000 /* FIXME -- do any of these need to be non-specific? */
9001 specs[count++] = tmpl;
9002 break;
9003
9004 default:
9005 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9006 break;
9007 }
9008
9009 return count;
9010}
9011
9012/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 9013 QP of the marking instruction and a subsequent branch on the same QP. */
9014
800eeca4
JW		 9015static void
9016clear_qp_branch_flag (mask)
542d6675 9017 valueT mask;
800eeca4
JW		 9018{
9019 int i;
542d6675 9020 for (i = 0; i < regdepslen; i++)
800eeca4 9021 {
197865e8 9022 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 9023 if ((bit & mask) != 0)
542d6675
KH		 9024 {
9025 regdeps[i].link_to_qp_branch = 0;
9026 }
800eeca4
JW		 9027 }
9028}
9029
5e2f6673
L		 9030/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9031 any mutexes which contain one of the PRs and create new ones when
9032 needed. */
9033
9034static int
9035update_qp_mutex (valueT mask)
9036{
9037 int i;
9038 int add = 0;
9039
9040 i = 0;
9041 while (i < qp_mutexeslen)
9042 {
9043 if ((qp_mutexes[i].prmask & mask) != 0)
9044 {
9045 /* If it destroys and creates the same mutex, do nothing. */
9046 if (qp_mutexes[i].prmask == mask
9047 && qp_mutexes[i].path == md.path)
9048 {
9049 i++;
9050 add = -1;
9051 }
9052 else
9053 {
9054 int keep = 0;
9055
9056 if (md.debug_dv)
9057 {
9058 fprintf (stderr, " Clearing mutex relation");
9059 print_prmask (qp_mutexes[i].prmask);
9060 fprintf (stderr, "\n");
9061 }
9062
9063 /* Deal with the old mutex with more than 3+ PRs only if
9064 the new mutex on the same execution path with it.
9065
9066 FIXME: The 3+ mutex support is incomplete.
9067 dot_pred_rel () may be a better place to fix it. */
9068 if (qp_mutexes[i].path == md.path)
9069 {
9070 /* If it is a proper subset of the mutex, create a
9071 new mutex. */
9072 if (add == 0
9073 && (qp_mutexes[i].prmask & mask) == mask)
9074 add = 1;
9075
9076 qp_mutexes[i].prmask &= ~mask;
9077 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9078 {
9079 /* Modify the mutex if there are more than one
9080 PR left. */
9081 keep = 1;
9082 i++;
9083 }
9084 }
9085
9086 if (keep == 0)
9087 /* Remove the mutex. */
9088 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9089 }
9090 }
9091 else
9092 ++i;
9093 }
9094
9095 if (add == 1)
9096 add_qp_mutex (mask);
9097
9098 return add;
9099}
9100
197865e8 9101/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9102
542d6675
KH		 9103 Any changes to a PR clears the mutex relations which include that PR. */
9104
800eeca4
JW		 9105static void
9106clear_qp_mutex (mask)
542d6675 9107 valueT mask;
800eeca4
JW		 9108{
9109 int i;
9110
9111 i = 0;
9112 while (i < qp_mutexeslen)
9113 {
9114 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9115 {
9116 if (md.debug_dv)
9117 {
9118 fprintf (stderr, " Clearing mutex relation");
9119 print_prmask (qp_mutexes[i].prmask);
9120 fprintf (stderr, "\n");
9121 }
9122 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9123 }
800eeca4 9124 else
542d6675 9125 ++i;
800eeca4
JW		 9126 }
9127}
9128
9129/* Clear implies relations which contain PRs in the given masks.
9130 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9131 indicates the implied PR. */
9132
800eeca4
JW		 9133static void
9134clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9135 valueT p1_mask;
9136 valueT p2_mask;
800eeca4
JW		 9137{
9138 int i;
9139
9140 i = 0;
9141 while (i < qp_implieslen)
9142 {
197865e8 9143 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9144 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9145 {
9146 if (md.debug_dv)
9147 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9148 qp_implies[i].p1, qp_implies[i].p2);
9149 qp_implies[i] = qp_implies[--qp_implieslen];
9150 }
197865e8 9151 else
542d6675 9152 ++i;
800eeca4
JW		 9153 }
9154}
9155
542d6675
KH		 9156/* Add the PRs specified to the list of implied relations. */
9157
800eeca4
JW		 9158static void
9159add_qp_imply (p1, p2)
542d6675 9160 int p1, p2;
800eeca4
JW		 9161{
9162 valueT mask;
9163 valueT bit;
9164 int i;
9165
542d6675 9166 /* p0 is not meaningful here. */
800eeca4
JW		 9167 if (p1 == 0 || p2 == 0)
9168 abort ();
9169
9170 if (p1 == p2)
9171 return;
9172
542d6675
KH		 9173 /* If it exists already, ignore it. */
9174 for (i = 0; i < qp_implieslen; i++)
800eeca4 9175 {
197865e8 9176 if (qp_implies[i].p1 == p1
542d6675
KH		 9177 && qp_implies[i].p2 == p2
9178 && qp_implies[i].path == md.path
9179 && !qp_implies[i].p2_branched)
9180 return;
800eeca4
JW		 9181 }
9182
9183 if (qp_implieslen == qp_impliestotlen)
9184 {
9185 qp_impliestotlen += 20;
9186 qp_implies = (struct qp_imply *)
542d6675
KH		 9187 xrealloc ((void *) qp_implies,
9188 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9189 }
9190 if (md.debug_dv)
9191 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9192 qp_implies[qp_implieslen].p1 = p1;
9193 qp_implies[qp_implieslen].p2 = p2;
9194 qp_implies[qp_implieslen].path = md.path;
9195 qp_implies[qp_implieslen++].p2_branched = 0;
9196
9197 /* Add in the implied transitive relations; for everything that p2 implies,
9198 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9199 as well. */
542d6675 9200 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9201 {
9202 if (qp_implies[i].p1 == p2)
542d6675 9203 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9204 if (qp_implies[i].p2 == p1)
542d6675 9205 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9206 }
9207 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9208 relation containing p2, duplicate it and replace p2 with p1. */
9209 bit = (valueT) 1 << p1;
9210 mask = (valueT) 1 << p2;
542d6675 9211 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9212 {
9213 if (qp_mutexes[i].prmask & mask)
542d6675 9214 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9215 }
9216}
9217
800eeca4
JW		 9218/* Add the PRs specified in the mask to the mutex list; this means that only
9219 one of the PRs can be true at any time. PR0 should never be included in
9220 the mask. */
542d6675 9221
800eeca4
JW		 9222static void
9223add_qp_mutex (mask)
542d6675 9224 valueT mask;
800eeca4
JW		 9225{
9226 if (mask & 0x1)
9227 abort ();
9228
9229 if (qp_mutexeslen == qp_mutexestotlen)
9230 {
9231 qp_mutexestotlen += 20;
9232 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9233 xrealloc ((void *) qp_mutexes,
9234 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9235 }
9236 if (md.debug_dv)
9237 {
9238 fprintf (stderr, " Registering mutex on");
9239 print_prmask (mask);
9240 fprintf (stderr, "\n");
9241 }
9242 qp_mutexes[qp_mutexeslen].path = md.path;
9243 qp_mutexes[qp_mutexeslen++].prmask = mask;
9244}
9245
cb5301b6
RH		 9246static int
9247has_suffix_p (name, suffix)
40449e9f
KH		 9248 const char *name;
9249 const char *suffix;
cb5301b6
RH		 9250{
9251 size_t namelen = strlen (name);
9252 size_t sufflen = strlen (suffix);
9253
9254 if (namelen <= sufflen)
9255 return 0;
9256 return strcmp (name + namelen - sufflen, suffix) == 0;
9257}
9258
800eeca4
JW		 9259static void
9260clear_register_values ()
9261{
9262 int i;
9263 if (md.debug_dv)
9264 fprintf (stderr, " Clearing register values\n");
542d6675 9265 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9266 gr_values[i].known = 0;
9267}
9268
9269/* Keep track of register values/changes which affect DV tracking.
9270
9271 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9272 have to examine a group of strings to identify them. */
800eeca4 9273
800eeca4
JW		 9274static void
9275note_register_values (idesc)
542d6675 9276 struct ia64_opcode *idesc;
800eeca4
JW		 9277{
9278 valueT qp_changemask = 0;
9279 int i;
9280
542d6675
KH		 9281 /* Invalidate values for registers being written to. */
9282 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9283 {
197865e8 9284 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9285 || idesc->operands[i] == IA64_OPND_R2
9286 || idesc->operands[i] == IA64_OPND_R3)
9287 {
9288 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9289 if (regno > 0 && regno < NELEMS (gr_values))
9290 gr_values[regno].known = 0;
9291 }
50b81f19
JW		 9292 else if (idesc->operands[i] == IA64_OPND_R3_2)
9293 {
9294 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9295 if (regno > 0 && regno < 4)
9296 gr_values[regno].known = 0;
9297 }
197865e8 9298 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9299 || idesc->operands[i] == IA64_OPND_P2)
9300 {
9301 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9302 qp_changemask |= (valueT) 1 << regno;
9303 }
800eeca4 9304 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9305 {
9306 if (idesc->operands[2] & (valueT) 0x10000)
9307 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9308 else
9309 qp_changemask = idesc->operands[2];
9310 break;
9311 }
800eeca4 9312 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9313 {
9314 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9315 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9316 else
9317 qp_changemask = idesc->operands[1];
9318 qp_changemask &= ~(valueT) 0xFFFF;
9319 break;
9320 }
9321 }
9322
9323 /* Always clear qp branch flags on any PR change. */
9324 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9325 clear_qp_branch_flag (qp_changemask);
9326
542d6675 9327 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9328 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9329 {
197865e8 9330 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9331 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9332 {
9333 for (i = 32; i < 32 + md.rot.num_regs; i++)
9334 gr_values[i].known = 0;
9335 }
800eeca4
JW		 9336 clear_qp_mutex (qp_changemask);
9337 clear_qp_implies (qp_changemask, qp_changemask);
9338 }
542d6675
KH		 9339 /* After a call, all register values are undefined, except those marked
9340 as "safe". */
800eeca4 9341 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9342 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9343 {
56d27c17 9344 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9345 clear_register_values ();
9346 clear_qp_mutex (~qp_safe_across_calls);
9347 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9348 clear_qp_branch_flag (~qp_safe_across_calls);
9349 }
e9718fe1 9350 else if (is_interruption_or_rfi (idesc)
542d6675 9351 || is_taken_branch (idesc))
e9718fe1
TW		 9352 {
9353 clear_register_values ();
197865e8
KH		 9354 clear_qp_mutex (~(valueT) 0);
9355 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9356 }
542d6675 9357 /* Look for mutex and implies relations. */
197865e8 9358 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9359 || idesc->operands[0] == IA64_OPND_P2)
9360 && (idesc->operands[1] == IA64_OPND_P1
9361 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9362 {
9363 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9364 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9365 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9366 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 9367
5e2f6673
L		 9368 /* If both PRs are PR0, we can't really do anything. */
9369 if (p1 == 0 && p2 == 0)
542d6675
KH		 9370 {
9371 if (md.debug_dv)
9372 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9373 }
800eeca4 9374 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 9375 with the following exceptions. */
cb5301b6
RH		 9376 else if (has_suffix_p (idesc->name, ".or.andcm")
9377 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 9378 {
542d6675
KH		 9379 clear_qp_implies (p2mask, p1mask);
9380 }
cb5301b6
RH		 9381 else if (has_suffix_p (idesc->name, ".andcm")
9382 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 9383 {
9384 clear_qp_implies (0, p1mask | p2mask);
9385 }
cb5301b6
RH		 9386 else if (has_suffix_p (idesc->name, ".orcm")
9387 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 9388 {
9389 clear_qp_mutex (p1mask | p2mask);
9390 clear_qp_implies (p1mask | p2mask, 0);
9391 }
800eeca4 9392 else
542d6675 9393 {
5e2f6673
L		 9394 int added = 0;
9395
542d6675 9396 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 9397
9398 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9399 if (p1 == 0 || p2 == 0)
9400 clear_qp_mutex (p1mask | p2mask);
9401 else
9402 added = update_qp_mutex (p1mask | p2mask);
9403
9404 if (CURR_SLOT.qp_regno == 0
9405 || has_suffix_p (idesc->name, ".unc"))
542d6675 9406 {
5e2f6673
L		 9407 if (added == 0 && p1 && p2)
9408 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 9409 if (CURR_SLOT.qp_regno != 0)
9410 {
5e2f6673
L		 9411 if (p1)
9412 add_qp_imply (p1, CURR_SLOT.qp_regno);
9413 if (p2)
9414 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 9415 }
9416 }
542d6675
KH		 9417 }
9418 }
9419 /* Look for mov imm insns into GRs. */
800eeca4 9420 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 9421 && (idesc->operands[1] == IA64_OPND_IMM22
9422 || idesc->operands[1] == IA64_OPND_IMMU64)
9423 && (strcmp (idesc->name, "mov") == 0
9424 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 9425 {
9426 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 9427 if (regno > 0 && regno < NELEMS (gr_values))
9428 {
9429 gr_values[regno].known = 1;
9430 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9431 gr_values[regno].path = md.path;
9432 if (md.debug_dv)
2434f565
JW		 9433 {
9434 fprintf (stderr, " Know gr%d = ", regno);
9435 fprintf_vma (stderr, gr_values[regno].value);
9436 fputs ("\n", stderr);
9437 }
542d6675 9438 }
800eeca4 9439 }
197865e8 9440 else
800eeca4
JW		 9441 {
9442 clear_qp_mutex (qp_changemask);
9443 clear_qp_implies (qp_changemask, qp_changemask);
9444 }
9445}
9446
542d6675
KH		 9447/* Return whether the given predicate registers are currently mutex. */
9448
800eeca4
JW		 9449static int
9450qp_mutex (p1, p2, path)
542d6675
KH		 9451 int p1;
9452 int p2;
9453 int path;
800eeca4
JW		 9454{
9455 int i;
9456 valueT mask;
9457
9458 if (p1 != p2)
9459 {
542d6675
KH		 9460 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9461 for (i = 0; i < qp_mutexeslen; i++)
9462 {
9463 if (qp_mutexes[i].path >= path
9464 && (qp_mutexes[i].prmask & mask) == mask)
9465 return 1;
9466 }
800eeca4
JW		 9467 }
9468 return 0;
9469}
9470
9471/* Return whether the given resource is in the given insn's list of chks
9472 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 9473 conflict. */
9474
800eeca4
JW		 9475static int
9476resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 9477 struct rsrc *rs;
9478 struct ia64_opcode *idesc;
9479 int note;
9480 int qp_regno;
9481 int path;
800eeca4
JW		 9482{
9483 struct rsrc specs[MAX_SPECS];
9484 int count;
9485
9486 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9487 we don't need to check. One exception is note 11, which indicates that
9488 target predicates are written regardless of PR[qp]. */
197865e8 9489 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 9490 && note != 11)
9491 return 0;
9492
9493 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9494 while (count-- > 0)
9495 {
9496 /* UNAT checking is a bit more specific than other resources */
9497 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 9498 && specs[count].mem_offset.hint
9499 && rs->mem_offset.hint)
9500 {
9501 if (rs->mem_offset.base == specs[count].mem_offset.base)
9502 {
9503 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9504 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9505 return 1;
9506 else
9507 continue;
9508 }
9509 }
800eeca4 9510
7484b8e6 9511 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 9512 writes are an OR. */
7484b8e6 9513 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 9514 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 9515 || rs->dependency->specifier == IA64_RS_PR63)
9516 {
9517 if (specs[count].cmp_type != CMP_NONE
9518 && specs[count].cmp_type == rs->cmp_type)
9519 {
9520 if (md.debug_dv)
9521 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9522 dv_mode[rs->dependency->mode],
afa680f8 9523 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 9524 specs[count].index : 63);
9525 continue;
9526 }
9527 if (md.debug_dv)
4a4f25cf 9528 fprintf (stderr,
7484b8e6
TW		 9529 " %s on parallel compare conflict %s vs %s on PR%d\n",
9530 dv_mode[rs->dependency->mode],
4a4f25cf 9531 dv_cmp_type[rs->cmp_type],
7484b8e6 9532 dv_cmp_type[specs[count].cmp_type],
afa680f8 9533 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 9534 specs[count].index : 63);
4a4f25cf 9535
7484b8e6
TW		 9536 }
9537
800eeca4 9538 /* If either resource is not specific, conservatively assume a conflict
197865e8 9539 */
800eeca4 9540 if (!specs[count].specific || !rs->specific)
542d6675 9541 return 2;
800eeca4 9542 else if (specs[count].index == rs->index)
542d6675 9543 return 1;
800eeca4 9544 }
800eeca4
JW		 9545
9546 return 0;
9547}
9548
9549/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9550 insert a stop to create the break. Update all resource dependencies
9551 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9552 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9553 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 9554 instruction. */
800eeca4
JW		 9555
9556static void
9557insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 9558 int insert_stop;
9559 int qp_regno;
9560 int save_current;
800eeca4
JW		 9561{
9562 int i;
9563
9564 if (insert_stop && md.num_slots_in_use > 0)
9565 PREV_SLOT.end_of_insn_group = 1;
9566
9567 if (md.debug_dv)
9568 {
197865e8 9569 fprintf (stderr, " Insn group break%s",
542d6675 9570 (insert_stop ? " (w/stop)" : ""));
800eeca4 9571 if (qp_regno != 0)
542d6675 9572 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 9573 fprintf (stderr, "\n");
9574 }
9575
9576 i = 0;
9577 while (i < regdepslen)
9578 {
9579 const struct ia64_dependency *dep = regdeps[i].dependency;
9580
9581 if (qp_regno != 0
542d6675
KH		 9582 && regdeps[i].qp_regno != qp_regno)
9583 {
9584 ++i;
9585 continue;
9586 }
800eeca4
JW		 9587
9588 if (save_current
542d6675
KH		 9589 && CURR_SLOT.src_file == regdeps[i].file
9590 && CURR_SLOT.src_line == regdeps[i].line)
9591 {
9592 ++i;
9593 continue;
9594 }
800eeca4
JW		 9595
9596 /* clear dependencies which are automatically cleared by a stop, or
542d6675 9597 those that have reached the appropriate state of insn serialization */
800eeca4 9598 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 9599 || dep->semantics == IA64_DVS_IMPLIEDF
9600 || regdeps[i].insn_srlz == STATE_SRLZ)
9601 {
9602 print_dependency ("Removing", i);
9603 regdeps[i] = regdeps[--regdepslen];
9604 }
800eeca4 9605 else
542d6675
KH		 9606 {
9607 if (dep->semantics == IA64_DVS_DATA
9608 || dep->semantics == IA64_DVS_INSTR
800eeca4 9609 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 9610 {
9611 if (regdeps[i].insn_srlz == STATE_NONE)
9612 regdeps[i].insn_srlz = STATE_STOP;
9613 if (regdeps[i].data_srlz == STATE_NONE)
9614 regdeps[i].data_srlz = STATE_STOP;
9615 }
9616 ++i;
9617 }
800eeca4
JW		 9618 }
9619}
9620
542d6675
KH		 9621/* Add the given resource usage spec to the list of active dependencies. */
9622
197865e8 9623static void
800eeca4 9624mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 9625 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9626 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 9627 struct rsrc *spec;
9628 int depind;
9629 int path;
800eeca4
JW		 9630{
9631 if (regdepslen == regdepstotlen)
9632 {
9633 regdepstotlen += 20;
9634 regdeps = (struct rsrc *)
542d6675 9635 xrealloc ((void *) regdeps,
bc805888 9636 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 9637 }
9638
9639 regdeps[regdepslen] = *spec;
9640 regdeps[regdepslen].depind = depind;
9641 regdeps[regdepslen].path = path;
9642 regdeps[regdepslen].file = CURR_SLOT.src_file;
9643 regdeps[regdepslen].line = CURR_SLOT.src_line;
9644
9645 print_dependency ("Adding", regdepslen);
9646
9647 ++regdepslen;
9648}
9649
9650static void
9651print_dependency (action, depind)
542d6675
KH		 9652 const char *action;
9653 int depind;
800eeca4
JW		 9654{
9655 if (md.debug_dv)
9656 {
197865e8 9657 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 9658 action, dv_mode[(regdeps[depind].dependency)->mode],
9659 (regdeps[depind].dependency)->name);
800eeca4 9660 if (regdeps[depind].specific && regdeps[depind].index != 0)
542d6675 9661 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 9662 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 9663 {
9664 fputs (" ", stderr);
9665 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9666 fputs ("+", stderr);
9667 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9668 }
800eeca4
JW		 9669 fprintf (stderr, "\n");
9670 }
9671}
9672
9673static void
9674instruction_serialization ()
9675{
9676 int i;
9677 if (md.debug_dv)
9678 fprintf (stderr, " Instruction serialization\n");
542d6675 9679 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 9680 if (regdeps[i].insn_srlz == STATE_STOP)
9681 regdeps[i].insn_srlz = STATE_SRLZ;
9682}
9683
9684static void
9685data_serialization ()
9686{
9687 int i = 0;
9688 if (md.debug_dv)
9689 fprintf (stderr, " Data serialization\n");
9690 while (i < regdepslen)
9691 {
9692 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 9693 /* Note: as of 991210, all "other" dependencies are cleared by a
9694 data serialization. This might change with new tables */
9695 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9696 {
9697 print_dependency ("Removing", i);
9698 regdeps[i] = regdeps[--regdepslen];
9699 }
800eeca4 9700 else
542d6675 9701 ++i;
800eeca4
JW		 9702 }
9703}
9704
542d6675
KH		 9705/* Insert stops and serializations as needed to avoid DVs. */
9706
800eeca4
JW		 9707static void
9708remove_marked_resource (rs)
542d6675 9709 struct rsrc *rs;
800eeca4
JW		 9710{
9711 switch (rs->dependency->semantics)
9712 {
9713 case IA64_DVS_SPECIFIC:
9714 if (md.debug_dv)
9715 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 9716 /* ...fall through... */
800eeca4
JW		 9717 case IA64_DVS_INSTR:
9718 if (md.debug_dv)
542d6675 9719 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 9720 if (rs->insn_srlz < STATE_STOP)
542d6675 9721 insn_group_break (1, 0, 0);
800eeca4 9722 if (rs->insn_srlz < STATE_SRLZ)
542d6675 9723 {
888a75be 9724 struct slot oldslot = CURR_SLOT;
542d6675 9725 /* Manually jam a srlz.i insn into the stream */
888a75be 9726 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
542d6675
KH		 9727 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9728 instruction_serialization ();
9729 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9730 if (++md.num_slots_in_use >= NUM_SLOTS)
9731 emit_one_bundle ();
888a75be 9732 CURR_SLOT = oldslot;
542d6675 9733 }
800eeca4
JW		 9734 insn_group_break (1, 0, 0);
9735 break;
9736 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 9737 "other" types of DV are eliminated
9738 by a data serialization */
800eeca4
JW		 9739 case IA64_DVS_DATA:
9740 if (md.debug_dv)
542d6675 9741 fprintf (stderr, "Inserting data serialization\n");
800eeca4 9742 if (rs->data_srlz < STATE_STOP)
542d6675 9743 insn_group_break (1, 0, 0);
800eeca4 9744 {
888a75be 9745 struct slot oldslot = CURR_SLOT;
542d6675 9746 /* Manually jam a srlz.d insn into the stream */
888a75be 9747 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
542d6675
KH		 9748 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9749 data_serialization ();
9750 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9751 if (++md.num_slots_in_use >= NUM_SLOTS)
9752 emit_one_bundle ();
888a75be 9753 CURR_SLOT = oldslot;
800eeca4
JW		 9754 }
9755 break;
9756 case IA64_DVS_IMPLIED:
9757 case IA64_DVS_IMPLIEDF:
9758 if (md.debug_dv)
542d6675 9759 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 9760 insn_group_break (1, 0, 0);
9761 break;
9762 default:
9763 break;
9764 }
9765}
9766
9767/* Check the resources used by the given opcode against the current dependency
197865e8 9768 list.
800eeca4
JW		 9769
9770 The check is run once for each execution path encountered. In this case,
9771 a unique execution path is the sequence of instructions following a code
9772 entry point, e.g. the following has three execution paths, one starting
9773 at L0, one at L1, and one at L2.
197865e8 9774
800eeca4
JW		 9775 L0: nop
9776 L1: add
9777 L2: add
197865e8 9778 br.ret
800eeca4 9779*/
542d6675 9780
800eeca4
JW		 9781static void
9782check_dependencies (idesc)
542d6675 9783 struct ia64_opcode *idesc;
800eeca4
JW		 9784{
9785 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9786 int path;
9787 int i;
9788
9789 /* Note that the number of marked resources may change within the
197865e8 9790 loop if in auto mode. */
800eeca4
JW		 9791 i = 0;
9792 while (i < regdepslen)
9793 {
9794 struct rsrc *rs = &regdeps[i];
9795 const struct ia64_dependency *dep = rs->dependency;
9796 int chkind;
9797 int note;
9798 int start_over = 0;
9799
9800 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 9801 || (chkind = depends_on (rs->depind, idesc)) == -1)
9802 {
9803 ++i;
9804 continue;
9805 }
9806
9807 note = NOTE (opdeps->chks[chkind]);
9808
9809 /* Check this resource against each execution path seen thus far. */
9810 for (path = 0; path <= md.path; path++)
9811 {
9812 int matchtype;
9813
9814 /* If the dependency wasn't on the path being checked, ignore it. */
9815 if (rs->path < path)
9816 continue;
9817
9818 /* If the QP for this insn implies a QP which has branched, don't
9819 bother checking. Ed. NOTE: I don't think this check is terribly
9820 useful; what's the point of generating code which will only be
9821 reached if its QP is zero?
9822 This code was specifically inserted to handle the following code,
9823 based on notes from Intel's DV checking code, where p1 implies p2.
9824
9825 mov r4 = 2
9826 (p2) br.cond L
9827 (p1) mov r4 = 7
9828 */
9829 if (CURR_SLOT.qp_regno != 0)
9830 {
9831 int skip = 0;
9832 int implies;
9833 for (implies = 0; implies < qp_implieslen; implies++)
9834 {
9835 if (qp_implies[implies].path >= path
9836 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9837 && qp_implies[implies].p2_branched)
9838 {
9839 skip = 1;
9840 break;
9841 }
9842 }
9843 if (skip)
9844 continue;
9845 }
9846
9847 if ((matchtype = resources_match (rs, idesc, note,
9848 CURR_SLOT.qp_regno, path)) != 0)
9849 {
9850 char msg[1024];
9851 char pathmsg[256] = "";
9852 char indexmsg[256] = "";
9853 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9854
9855 if (path != 0)
9856 sprintf (pathmsg, " when entry is at label '%s'",
9857 md.entry_labels[path - 1]);
9858 if (rs->specific && rs->index != 0)
9859 sprintf (indexmsg, ", specific resource number is %d",
9860 rs->index);
9861 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9862 idesc->name,
9863 (certain ? "violates" : "may violate"),
9864 dv_mode[dep->mode], dep->name,
9865 dv_sem[dep->semantics],
9866 pathmsg, indexmsg);
9867
9868 if (md.explicit_mode)
9869 {
9870 as_warn ("%s", msg);
9871 if (path < md.path)
9872 as_warn (_("Only the first path encountering the conflict "
9873 "is reported"));
9874 as_warn_where (rs->file, rs->line,
9875 _("This is the location of the "
9876 "conflicting usage"));
9877 /* Don't bother checking other paths, to avoid duplicating
9878 the same warning */
9879 break;
9880 }
9881 else
9882 {
9883 if (md.debug_dv)
9884 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9885
9886 remove_marked_resource (rs);
9887
9888 /* since the set of dependencies has changed, start over */
9889 /* FIXME -- since we're removing dvs as we go, we
9890 probably don't really need to start over... */
9891 start_over = 1;
9892 break;
9893 }
9894 }
9895 }
800eeca4 9896 if (start_over)
542d6675 9897 i = 0;
800eeca4 9898 else
542d6675 9899 ++i;
800eeca4
JW		 9900 }
9901}
9902
542d6675
KH		 9903/* Register new dependencies based on the given opcode. */
9904
800eeca4
JW		 9905static void
9906mark_resources (idesc)
542d6675 9907 struct ia64_opcode *idesc;
800eeca4
JW		 9908{
9909 int i;
9910 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9911 int add_only_qp_reads = 0;
9912
9913 /* A conditional branch only uses its resources if it is taken; if it is
9914 taken, we stop following that path. The other branch types effectively
9915 *always* write their resources. If it's not taken, register only QP
197865e8 9916 reads. */
800eeca4
JW		 9917 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9918 {
9919 add_only_qp_reads = 1;
9920 }
9921
9922 if (md.debug_dv)
9923 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9924
542d6675 9925 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 9926 {
9927 const struct ia64_dependency *dep;
9928 struct rsrc specs[MAX_SPECS];
9929 int note;
9930 int path;
9931 int count;
197865e8 9932
800eeca4 9933 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 9934 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 9935
9936 if (add_only_qp_reads
542d6675
KH		 9937 && !(dep->mode == IA64_DV_WAR
9938 && (dep->specifier == IA64_RS_PR
139368c9 9939 || dep->specifier == IA64_RS_PRr
542d6675
KH		 9940 || dep->specifier == IA64_RS_PR63)))
9941 continue;
800eeca4
JW		 9942
9943 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9944
800eeca4 9945 while (count-- > 0)
542d6675
KH		 9946 {
9947 mark_resource (idesc, dep, &specs[count],
9948 DEP (opdeps->regs[i]), md.path);
9949 }
800eeca4
JW		 9950
9951 /* The execution path may affect register values, which may in turn
542d6675 9952 affect which indirect-access resources are accessed. */
800eeca4 9953 switch (dep->specifier)
542d6675
KH		 9954 {
9955 default:
9956 break;
9957 case IA64_RS_CPUID:
9958 case IA64_RS_DBR:
9959 case IA64_RS_IBR:
800eeca4 9960 case IA64_RS_MSR:
542d6675
KH		 9961 case IA64_RS_PKR:
9962 case IA64_RS_PMC:
9963 case IA64_RS_PMD:
9964 case IA64_RS_RR:
9965 for (path = 0; path < md.path; path++)
9966 {
9967 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9968 while (count-- > 0)
9969 mark_resource (idesc, dep, &specs[count],
9970 DEP (opdeps->regs[i]), path);
9971 }
9972 break;
9973 }
9974 }
9975}
9976
9977/* Remove dependencies when they no longer apply. */
9978
800eeca4
JW		 9979static void
9980update_dependencies (idesc)
542d6675 9981 struct ia64_opcode *idesc;
800eeca4
JW		 9982{
9983 int i;
9984
9985 if (strcmp (idesc->name, "srlz.i") == 0)
9986 {
9987 instruction_serialization ();
9988 }
9989 else if (strcmp (idesc->name, "srlz.d") == 0)
9990 {
9991 data_serialization ();
9992 }
9993 else if (is_interruption_or_rfi (idesc)
542d6675 9994 || is_taken_branch (idesc))
800eeca4 9995 {
542d6675
KH		 9996 /* Although technically the taken branch doesn't clear dependencies
9997 which require a srlz.[id], we don't follow the branch; the next
9998 instruction is assumed to start with a clean slate. */
800eeca4 9999 regdepslen = 0;
800eeca4
JW		 10000 md.path = 0;
10001 }
10002 else if (is_conditional_branch (idesc)
542d6675 10003 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 10004 {
10005 int is_call = strstr (idesc->name, ".call") != NULL;
10006
542d6675
KH		 10007 for (i = 0; i < qp_implieslen; i++)
10008 {
10009 /* If the conditional branch's predicate is implied by the predicate
10010 in an existing dependency, remove that dependency. */
10011 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10012 {
10013 int depind = 0;
10014 /* Note that this implied predicate takes a branch so that if
10015 a later insn generates a DV but its predicate implies this
10016 one, we can avoid the false DV warning. */
10017 qp_implies[i].p2_branched = 1;
10018 while (depind < regdepslen)
10019 {
10020 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10021 {
10022 print_dependency ("Removing", depind);
10023 regdeps[depind] = regdeps[--regdepslen];
10024 }
10025 else
10026 ++depind;
10027 }
10028 }
10029 }
800eeca4 10030 /* Any marked resources which have this same predicate should be
542d6675
KH		 10031 cleared, provided that the QP hasn't been modified between the
10032 marking instruction and the branch. */
800eeca4 10033 if (is_call)
542d6675
KH		 10034 {
10035 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10036 }
800eeca4 10037 else
542d6675
KH		 10038 {
10039 i = 0;
10040 while (i < regdepslen)
10041 {
10042 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10043 && regdeps[i].link_to_qp_branch
10044 && (regdeps[i].file != CURR_SLOT.src_file
10045 || regdeps[i].line != CURR_SLOT.src_line))
10046 {
10047 /* Treat like a taken branch */
10048 print_dependency ("Removing", i);
10049 regdeps[i] = regdeps[--regdepslen];
10050 }
10051 else
10052 ++i;
10053 }
10054 }
800eeca4
JW		 10055 }
10056}
10057
10058/* Examine the current instruction for dependency violations. */
542d6675 10059
800eeca4
JW		 10060static int
10061check_dv (idesc)
542d6675 10062 struct ia64_opcode *idesc;
800eeca4
JW		 10063{
10064 if (md.debug_dv)
10065 {
197865e8 10066 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10067 idesc->name, CURR_SLOT.src_line,
10068 idesc->dependencies->nchks,
10069 idesc->dependencies->nregs);
800eeca4
JW		 10070 }
10071
197865e8 10072 /* Look through the list of currently marked resources; if the current
800eeca4 10073 instruction has the dependency in its chks list which uses that resource,
542d6675 10074 check against the specific resources used. */
800eeca4
JW		 10075 check_dependencies (idesc);
10076
542d6675
KH		 10077 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10078 then add them to the list of marked resources. */
800eeca4
JW		 10079 mark_resources (idesc);
10080
10081 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10082 requirements for being cleared
10083
800eeca4
JW		 10084 Instruction serialization (insns separated by interruption, rfi, or
10085 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10086
10087 Data serialization (instruction serialization, or writer + srlz.d +
10088 reader, where writer and srlz.d are in separate groups) clears
10089 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10090 always be the case).
10091
10092 Instruction group break (groups separated by stop, taken branch,
10093 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10094 */
10095 update_dependencies (idesc);
10096
10097 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10098 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10099 note_register_values (idesc);
10100
197865e8 10101 /* We don't need or want this anymore. */
800eeca4
JW		 10102 md.mem_offset.hint = 0;
10103
10104 return 0;
10105}
10106
10107/* Translate one line of assembly. Pseudo ops and labels do not show
10108 here. */
10109void
10110md_assemble (str)
10111 char *str;
10112{
10113 char *saved_input_line_pointer, *mnemonic;
10114 const struct pseudo_opcode *pdesc;
10115 struct ia64_opcode *idesc;
10116 unsigned char qp_regno;
10117 unsigned int flags;
10118 int ch;
10119
10120 saved_input_line_pointer = input_line_pointer;
10121 input_line_pointer = str;
10122
542d6675 10123 /* extract the opcode (mnemonic): */
800eeca4
JW		 10124
10125 mnemonic = input_line_pointer;
10126 ch = get_symbol_end ();
10127 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10128 if (pdesc)
10129 {
10130 *input_line_pointer = ch;
10131 (*pdesc->handler) (pdesc->arg);
10132 goto done;
10133 }
10134
542d6675 10135 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10136
10137 idesc = ia64_find_opcode (mnemonic);
10138 *input_line_pointer = ch;
10139 if (!idesc)
10140 {
10141 as_bad ("Unknown opcode `%s'", mnemonic);
10142 goto done;
10143 }
10144
10145 idesc = parse_operands (idesc);
10146 if (!idesc)
10147 goto done;
10148
542d6675 10149 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10150 if (idesc->type == IA64_TYPE_DYN)
10151 {
10152 if (strcmp (idesc->name, "add") == 0)
10153 {
10154 if (CURR_SLOT.opnd[2].X_op == O_register
10155 && CURR_SLOT.opnd[2].X_add_number < 4)
10156 mnemonic = "addl";
10157 else
10158 mnemonic = "adds";
3d56ab85 10159 ia64_free_opcode (idesc);
800eeca4 10160 idesc = ia64_find_opcode (mnemonic);
800eeca4
JW		 10161 }
10162 else if (strcmp (idesc->name, "mov") == 0)
10163 {
10164 enum ia64_opnd opnd1, opnd2;
10165 int rop;
10166
10167 opnd1 = idesc->operands[0];
10168 opnd2 = idesc->operands[1];
10169 if (opnd1 == IA64_OPND_AR3)
10170 rop = 0;
10171 else if (opnd2 == IA64_OPND_AR3)
10172 rop = 1;
10173 else
10174 abort ();
652ca075
L		 10175 if (CURR_SLOT.opnd[rop].X_op == O_register)
10176 {
10177 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10178 mnemonic = "mov.i";
97762d08 10179 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10180 mnemonic = "mov.m";
97762d08
JB		 10181 else
10182 rop = -1;
652ca075 10183 }
800eeca4 10184 else
652ca075 10185 abort ();
97762d08
JB		 10186 if (rop >= 0)
10187 {
10188 ia64_free_opcode (idesc);
10189 idesc = ia64_find_opcode (mnemonic);
10190 while (idesc != NULL
10191 && (idesc->operands[0] != opnd1
10192 || idesc->operands[1] != opnd2))
10193 idesc = get_next_opcode (idesc);
10194 }
800eeca4
JW		 10195 }
10196 }
652ca075
L		 10197 else if (strcmp (idesc->name, "mov.i") == 0
10198 || strcmp (idesc->name, "mov.m") == 0)
10199 {
10200 enum ia64_opnd opnd1, opnd2;
10201 int rop;
10202
10203 opnd1 = idesc->operands[0];
10204 opnd2 = idesc->operands[1];
10205 if (opnd1 == IA64_OPND_AR3)
10206 rop = 0;
10207 else if (opnd2 == IA64_OPND_AR3)
10208 rop = 1;
10209 else
10210 abort ();
10211 if (CURR_SLOT.opnd[rop].X_op == O_register)
10212 {
10213 char unit = 'a';
10214 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10215 unit = 'i';
10216 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10217 unit = 'm';
10218 if (unit != 'a' && unit != idesc->name [4])
10219 as_bad ("AR %d cannot be accessed by %c-unit",
10220 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10221 TOUPPER (unit));
10222 }
10223 }
800eeca4
JW		 10224
10225 qp_regno = 0;
10226 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10227 {
10228 qp_regno = md.qp.X_add_number - REG_P;
10229 md.qp.X_op = O_absent;
10230 }
800eeca4
JW		 10231
10232 flags = idesc->flags;
10233
10234 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10235 {
10236 /* The alignment frag has to end with a stop bit only if the
10237 next instruction after the alignment directive has to be
10238 the first instruction in an instruction group. */
10239 if (align_frag)
10240 {
10241 while (align_frag->fr_type != rs_align_code)
10242 {
10243 align_frag = align_frag->fr_next;
bae25f19
L		 10244 if (!align_frag)
10245 break;
9545c4ce 10246 }
bae25f19
L		 10247 /* align_frag can be NULL if there are directives in
10248 between. */
10249 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10250 align_frag->tc_frag_data = 1;
10251 }
10252
10253 insn_group_break (1, 0, 0);
10254 }
10255 align_frag = NULL;
800eeca4
JW		 10256
10257 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10258 {
10259 as_bad ("`%s' cannot be predicated", idesc->name);
10260 goto done;
10261 }
10262
542d6675 10263 /* Build the instruction. */
800eeca4
JW		 10264 CURR_SLOT.qp_regno = qp_regno;
10265 CURR_SLOT.idesc = idesc;
10266 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10267 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4
JW		 10268
10269 /* Add unwind entry, if there is one. */
e0c9811a 10270 if (unwind.current_entry)
800eeca4 10271 {
e0c9811a
JW		 10272 CURR_SLOT.unwind_record = unwind.current_entry;
10273 unwind.current_entry = NULL;
800eeca4 10274 }
75e09913
JB		 10275 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10276 unwind.insn = 1;
800eeca4 10277
542d6675 10278 /* Check for dependency violations. */
800eeca4 10279 if (md.detect_dv)
542d6675 10280 check_dv (idesc);
800eeca4
JW		 10281
10282 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10283 if (++md.num_slots_in_use >= NUM_SLOTS)
10284 emit_one_bundle ();
10285
10286 if ((flags & IA64_OPCODE_LAST) != 0)
10287 insn_group_break (1, 0, 0);
10288
10289 md.last_text_seg = now_seg;
10290
10291 done:
10292 input_line_pointer = saved_input_line_pointer;
10293}
10294
10295/* Called when symbol NAME cannot be found in the symbol table.
10296 Should be used for dynamic valued symbols only. */
542d6675
KH		 10297
10298symbolS *
800eeca4 10299md_undefined_symbol (name)
2434f565 10300 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10301{
10302 return 0;
10303}
10304
10305/* Called for any expression that can not be recognized. When the
10306 function is called, `input_line_pointer' will point to the start of
10307 the expression. */
542d6675 10308
800eeca4
JW		 10309void
10310md_operand (e)
10311 expressionS *e;
10312{
10313 enum pseudo_type pseudo_type;
e0c9811a 10314 const char *name;
800eeca4
JW		 10315 size_t len;
10316 int ch, i;
10317
10318 switch (*input_line_pointer)
10319 {
10320 case '@':
542d6675 10321 /* Find what relocation pseudo-function we're dealing with. */
800eeca4
JW		 10322 pseudo_type = 0;
10323 ch = *++input_line_pointer;
10324 for (i = 0; i < NELEMS (pseudo_func); ++i)
10325 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10326 {
10327 len = strlen (pseudo_func[i].name);
10328 if (strncmp (pseudo_func[i].name + 1,
10329 input_line_pointer + 1, len - 1) == 0
10330 && !is_part_of_name (input_line_pointer[len]))
10331 {
10332 input_line_pointer += len;
10333 pseudo_type = pseudo_func[i].type;
10334 break;
10335 }
10336 }
10337 switch (pseudo_type)
10338 {
10339 case PSEUDO_FUNC_RELOC:
10340 SKIP_WHITESPACE ();
10341 if (*input_line_pointer != '(')
10342 {
10343 as_bad ("Expected '('");
10344 goto err;
10345 }
542d6675
KH		 10346 /* Skip '('. */
10347 ++input_line_pointer;
800eeca4
JW		 10348 expression (e);
10349 if (*input_line_pointer++ != ')')
10350 {
10351 as_bad ("Missing ')'");
10352 goto err;
10353 }
10354 if (e->X_op != O_symbol)
10355 {
10356 if (e->X_op != O_pseudo_fixup)
10357 {
10358 as_bad ("Not a symbolic expression");
10359 goto err;
10360 }
13ae64f3
JJ		 10361 if (i != FUNC_LT_RELATIVE)
10362 {
10363 as_bad ("Illegal combination of relocation functions");
10364 goto err;
10365 }
10366 switch (S_GET_VALUE (e->X_op_symbol))
800eeca4 10367 {
13ae64f3
JJ		 10368 case FUNC_FPTR_RELATIVE:
10369 i = FUNC_LT_FPTR_RELATIVE; break;
10370 case FUNC_DTP_MODULE:
10371 i = FUNC_LT_DTP_MODULE; break;
10372 case FUNC_DTP_RELATIVE:
10373 i = FUNC_LT_DTP_RELATIVE; break;
10374 case FUNC_TP_RELATIVE:
10375 i = FUNC_LT_TP_RELATIVE; break;
10376 default:
800eeca4
JW		 10377 as_bad ("Illegal combination of relocation functions");
10378 goto err;
10379 }
10380 }
542d6675
KH		 10381 /* Make sure gas doesn't get rid of local symbols that are used
10382 in relocs. */
800eeca4
JW		 10383 e->X_op = O_pseudo_fixup;
10384 e->X_op_symbol = pseudo_func[i].u.sym;
10385 break;
10386
10387 case PSEUDO_FUNC_CONST:
10388 e->X_op = O_constant;
10389 e->X_add_number = pseudo_func[i].u.ival;
10390 break;
10391
e0c9811a
JW		 10392 case PSEUDO_FUNC_REG:
10393 e->X_op = O_register;
10394 e->X_add_number = pseudo_func[i].u.ival;
10395 break;
10396
800eeca4 10397 default:
e0c9811a
JW		 10398 name = input_line_pointer - 1;
10399 get_symbol_end ();
10400 as_bad ("Unknown pseudo function `%s'", name);
800eeca4
JW		 10401 goto err;
10402 }
10403 break;
10404
10405 case '[':
10406 ++input_line_pointer;
10407 expression (e);
10408 if (*input_line_pointer != ']')
10409 {
10410 as_bad ("Closing bracket misssing");
10411 goto err;
10412 }
10413 else
10414 {
10415 if (e->X_op != O_register)
10416 as_bad ("Register expected as index");
10417
10418 ++input_line_pointer;
10419 e->X_op = O_index;
10420 }
10421 break;
10422
10423 default:
10424 break;
10425 }
10426 return;
10427
10428 err:
10429 ignore_rest_of_line ();
10430}
10431
10432/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10433 a section symbol plus some offset. For relocs involving @fptr(),
10434 directives we don't want such adjustments since we need to have the
10435 original symbol's name in the reloc. */
10436int
10437ia64_fix_adjustable (fix)
10438 fixS *fix;
10439{
10440 /* Prevent all adjustments to global symbols */
10441 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10442 return 0;
10443
10444 switch (fix->fx_r_type)
10445 {
10446 case BFD_RELOC_IA64_FPTR64I:
10447 case BFD_RELOC_IA64_FPTR32MSB:
10448 case BFD_RELOC_IA64_FPTR32LSB:
10449 case BFD_RELOC_IA64_FPTR64MSB:
10450 case BFD_RELOC_IA64_FPTR64LSB:
10451 case BFD_RELOC_IA64_LTOFF_FPTR22:
10452 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10453 return 0;
10454 default:
10455 break;
10456 }
10457
10458 return 1;
10459}
10460
10461int
10462ia64_force_relocation (fix)
10463 fixS *fix;
10464{
10465 switch (fix->fx_r_type)
10466 {
10467 case BFD_RELOC_IA64_FPTR64I:
10468 case BFD_RELOC_IA64_FPTR32MSB:
10469 case BFD_RELOC_IA64_FPTR32LSB:
10470 case BFD_RELOC_IA64_FPTR64MSB:
10471 case BFD_RELOC_IA64_FPTR64LSB:
10472
10473 case BFD_RELOC_IA64_LTOFF22:
10474 case BFD_RELOC_IA64_LTOFF64I:
10475 case BFD_RELOC_IA64_LTOFF_FPTR22:
10476 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10477 case BFD_RELOC_IA64_PLTOFF22:
10478 case BFD_RELOC_IA64_PLTOFF64I:
10479 case BFD_RELOC_IA64_PLTOFF64MSB:
10480 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 10481
10482 case BFD_RELOC_IA64_LTOFF22X:
10483 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 10484 return 1;
10485
10486 default:
a161fe53 10487 break;
800eeca4 10488 }
a161fe53 10489
ae6063d4 10490 return generic_force_reloc (fix);
800eeca4
JW		 10491}
10492
10493/* Decide from what point a pc-relative relocation is relative to,
10494 relative to the pc-relative fixup. Er, relatively speaking. */
10495long
10496ia64_pcrel_from_section (fix, sec)
10497 fixS *fix;
10498 segT sec;
10499{
10500 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 10501
800eeca4
JW		 10502 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10503 off &= ~0xfUL;
10504
10505 return off;
10506}
10507
6174d9c8
RH		 10508
10509/* Used to emit section-relative relocs for the dwarf2 debug data. */
10510void
10511ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10512{
10513 expressionS expr;
10514
10515 expr.X_op = O_pseudo_fixup;
10516 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10517 expr.X_add_number = 0;
10518 expr.X_add_symbol = symbol;
10519 emit_expr (&expr, size);
10520}
10521
800eeca4
JW		 10522/* This is called whenever some data item (not an instruction) needs a
10523 fixup. We pick the right reloc code depending on the byteorder
10524 currently in effect. */
10525void
10526ia64_cons_fix_new (f, where, nbytes, exp)
10527 fragS *f;
10528 int where;
10529 int nbytes;
10530 expressionS *exp;
10531{
10532 bfd_reloc_code_real_type code;
10533 fixS *fix;
10534
10535 switch (nbytes)
10536 {
10537 /* There are no reloc for 8 and 16 bit quantities, but we allow
10538 them here since they will work fine as long as the expression
10539 is fully defined at the end of the pass over the source file. */
10540 case 1: code = BFD_RELOC_8; break;
10541 case 2: code = BFD_RELOC_16; break;
10542 case 4:
10543 if (target_big_endian)
10544 code = BFD_RELOC_IA64_DIR32MSB;
10545 else
10546 code = BFD_RELOC_IA64_DIR32LSB;
10547 break;
10548
10549 case 8:
40449e9f 10550 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 10551 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 10552 && exp->X_op_symbol
10553 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10554 && !(md.flags & EF_IA_64_ABI64))
10555 {
10556 if (target_big_endian)
10557 code = BFD_RELOC_IA64_IPLTMSB;
10558 else
10559 code = BFD_RELOC_IA64_IPLTLSB;
10560 exp->X_op = O_symbol;
10561 break;
10562 }
10563 else
10564 {
10565 if (target_big_endian)
10566 code = BFD_RELOC_IA64_DIR64MSB;
10567 else
10568 code = BFD_RELOC_IA64_DIR64LSB;
10569 break;
10570 }
800eeca4 10571
3969b680
RH		 10572 case 16:
10573 if (exp->X_op == O_pseudo_fixup
10574 && exp->X_op_symbol
10575 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10576 {
10577 if (target_big_endian)
10578 code = BFD_RELOC_IA64_IPLTMSB;
10579 else
10580 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 10581 exp->X_op = O_symbol;
10582 break;
10583 }
10584 /* FALLTHRU */
10585
800eeca4
JW		 10586 default:
10587 as_bad ("Unsupported fixup size %d", nbytes);
10588 ignore_rest_of_line ();
10589 return;
10590 }
6174d9c8 10591
800eeca4
JW		 10592 if (exp->X_op == O_pseudo_fixup)
10593 {
800eeca4
JW		 10594 exp->X_op = O_symbol;
10595 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 10596 /* ??? If code unchanged, unsupported. */
800eeca4 10597 }
3969b680 10598
800eeca4
JW		 10599 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10600 /* We need to store the byte order in effect in case we're going
10601 to fix an 8 or 16 bit relocation (for which there no real
94f592af 10602 relocs available). See md_apply_fix3(). */
800eeca4
JW		 10603 fix->tc_fix_data.bigendian = target_big_endian;
10604}
10605
10606/* Return the actual relocation we wish to associate with the pseudo
10607 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 10608 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 10609
10610static bfd_reloc_code_real_type
10611ia64_gen_real_reloc_type (sym, r_type)
10612 struct symbol *sym;
10613 bfd_reloc_code_real_type r_type;
10614{
10615 bfd_reloc_code_real_type new = 0;
10616
10617 if (sym == NULL)
10618 {
10619 return r_type;
10620 }
10621
10622 switch (S_GET_VALUE (sym))
10623 {
10624 case FUNC_FPTR_RELATIVE:
10625 switch (r_type)
10626 {
10627 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10628 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10629 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10630 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10631 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10632 default: break;
10633 }
10634 break;
10635
10636 case FUNC_GP_RELATIVE:
10637 switch (r_type)
10638 {
10639 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10640 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10641 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10642 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10643 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10644 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10645 default: break;
10646 }
10647 break;
10648
10649 case FUNC_LT_RELATIVE:
10650 switch (r_type)
10651 {
10652 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10653 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10654 default: break;
10655 }
10656 break;
10657
fa2c7eff
RH		 10658 case FUNC_LT_RELATIVE_X:
10659 switch (r_type)
10660 {
10661 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10662 default: break;
10663 }
10664 break;
10665
c67e42c9
RH		 10666 case FUNC_PC_RELATIVE:
10667 switch (r_type)
10668 {
10669 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10670 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10671 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10672 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10673 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10674 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10675 default: break;
10676 }
10677 break;
10678
800eeca4
JW		 10679 case FUNC_PLT_RELATIVE:
10680 switch (r_type)
10681 {
10682 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10683 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10684 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10685 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10686 default: break;
10687 }
10688 break;
10689
10690 case FUNC_SEC_RELATIVE:
10691 switch (r_type)
10692 {
10693 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10694 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10695 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10696 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10697 default: break;
10698 }
10699 break;
10700
10701 case FUNC_SEG_RELATIVE:
10702 switch (r_type)
10703 {
10704 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10705 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10706 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10707 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10708 default: break;
10709 }
10710 break;
10711
10712 case FUNC_LTV_RELATIVE:
10713 switch (r_type)
10714 {
10715 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10716 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10717 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10718 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10719 default: break;
10720 }
10721 break;
10722
10723 case FUNC_LT_FPTR_RELATIVE:
10724 switch (r_type)
10725 {
10726 case BFD_RELOC_IA64_IMM22:
10727 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10728 case BFD_RELOC_IA64_IMM64:
10729 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10730 default:
10731 break;
10732 }
10733 break;
3969b680 10734
13ae64f3
JJ		 10735 case FUNC_TP_RELATIVE:
10736 switch (r_type)
10737 {
10738 case BFD_RELOC_IA64_IMM14:
10739 new = BFD_RELOC_IA64_TPREL14; break;
10740 case BFD_RELOC_IA64_IMM22:
10741 new = BFD_RELOC_IA64_TPREL22; break;
10742 case BFD_RELOC_IA64_IMM64:
10743 new = BFD_RELOC_IA64_TPREL64I; break;
10744 default:
10745 break;
10746 }
10747 break;
10748
10749 case FUNC_LT_TP_RELATIVE:
10750 switch (r_type)
10751 {
10752 case BFD_RELOC_IA64_IMM22:
10753 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10754 default:
10755 break;
10756 }
10757 break;
10758
10759 case FUNC_LT_DTP_MODULE:
10760 switch (r_type)
10761 {
10762 case BFD_RELOC_IA64_IMM22:
10763 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10764 default:
10765 break;
10766 }
10767 break;
10768
10769 case FUNC_DTP_RELATIVE:
10770 switch (r_type)
10771 {
6174d9c8
RH		 10772 case BFD_RELOC_IA64_DIR64MSB:
10773 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10774 case BFD_RELOC_IA64_DIR64LSB:
10775 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 10776 case BFD_RELOC_IA64_IMM14:
10777 new = BFD_RELOC_IA64_DTPREL14; break;
10778 case BFD_RELOC_IA64_IMM22:
10779 new = BFD_RELOC_IA64_DTPREL22; break;
10780 case BFD_RELOC_IA64_IMM64:
10781 new = BFD_RELOC_IA64_DTPREL64I; break;
10782 default:
10783 break;
10784 }
10785 break;
10786
10787 case FUNC_LT_DTP_RELATIVE:
10788 switch (r_type)
10789 {
10790 case BFD_RELOC_IA64_IMM22:
10791 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10792 default:
10793 break;
10794 }
10795 break;
10796
40449e9f
KH		 10797 case FUNC_IPLT_RELOC:
10798 break;
1cd8ff38 10799
800eeca4
JW		 10800 default:
10801 abort ();
10802 }
6174d9c8 10803
800eeca4
JW		 10804 /* Hmmmm. Should this ever occur? */
10805 if (new)
10806 return new;
10807 else
10808 return r_type;
10809}
10810
10811/* Here is where generate the appropriate reloc for pseudo relocation
10812 functions. */
10813void
10814ia64_validate_fix (fix)
10815 fixS *fix;
10816{
10817 switch (fix->fx_r_type)
10818 {
10819 case BFD_RELOC_IA64_FPTR64I:
10820 case BFD_RELOC_IA64_FPTR32MSB:
10821 case BFD_RELOC_IA64_FPTR64LSB:
10822 case BFD_RELOC_IA64_LTOFF_FPTR22:
10823 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10824 if (fix->fx_offset != 0)
10825 as_bad_where (fix->fx_file, fix->fx_line,
10826 "No addend allowed in @fptr() relocation");
10827 break;
10828 default:
10829 break;
10830 }
800eeca4
JW		 10831}
10832
10833static void
10834fix_insn (fix, odesc, value)
10835 fixS *fix;
10836 const struct ia64_operand *odesc;
10837 valueT value;
10838{
10839 bfd_vma insn[3], t0, t1, control_bits;
10840 const char *err;
10841 char *fixpos;
10842 long slot;
10843
10844 slot = fix->fx_where & 0x3;
10845 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10846
c67e42c9 10847 /* Bundles are always in little-endian byte order */
800eeca4
JW		 10848 t0 = bfd_getl64 (fixpos);
10849 t1 = bfd_getl64 (fixpos + 8);
10850 control_bits = t0 & 0x1f;
10851 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10852 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10853 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10854
c67e42c9
RH		 10855 err = NULL;
10856 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 10857 {
c67e42c9
RH		 10858 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10859 insn[2] |= (((value & 0x7f) << 13)
10860 | (((value >> 7) & 0x1ff) << 27)
10861 | (((value >> 16) & 0x1f) << 22)
10862 | (((value >> 21) & 0x1) << 21)
10863 | (((value >> 63) & 0x1) << 36));
800eeca4 10864 }
c67e42c9
RH		 10865 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10866 {
10867 if (value & ~0x3fffffffffffffffULL)
10868 err = "integer operand out of range";
10869 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10870 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10871 }
10872 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10873 {
10874 value >>= 4;
10875 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10876 insn[2] |= ((((value >> 59) & 0x1) << 36)
10877 | (((value >> 0) & 0xfffff) << 13));
10878 }
10879 else
10880 err = (*odesc->insert) (odesc, value, insn + slot);
10881
10882 if (err)
10883 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 10884
10885 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10886 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 10887 number_to_chars_littleendian (fixpos + 0, t0, 8);
10888 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 10889}
10890
10891/* Attempt to simplify or even eliminate a fixup. The return value is
10892 ignored; perhaps it was once meaningful, but now it is historical.
10893 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10894
10895 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 10896 (if possible). */
94f592af
NC		 10897
10898void
10899md_apply_fix3 (fix, valP, seg)
800eeca4 10900 fixS *fix;
40449e9f 10901 valueT *valP;
2434f565 10902 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 10903{
10904 char *fixpos;
40449e9f 10905 valueT value = *valP;
800eeca4
JW		 10906
10907 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10908
10909 if (fix->fx_pcrel)
10910 {
10911 switch (fix->fx_r_type)
10912 {
10913 case BFD_RELOC_IA64_DIR32MSB:
10914 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
800eeca4
JW		 10915 break;
10916
10917 case BFD_RELOC_IA64_DIR32LSB:
10918 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
800eeca4
JW		 10919 break;
10920
10921 case BFD_RELOC_IA64_DIR64MSB:
10922 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
800eeca4
JW		 10923 break;
10924
10925 case BFD_RELOC_IA64_DIR64LSB:
10926 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
800eeca4
JW		 10927 break;
10928
10929 default:
10930 break;
10931 }
10932 }
10933 if (fix->fx_addsy)
10934 {
00f7efb6 10935 switch (fix->fx_r_type)
800eeca4 10936 {
00f7efb6 10937 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 10938 /* This must be a TAG13 or TAG13b operand. There are no external
10939 relocs defined for them, so we must give an error. */
800eeca4
JW		 10940 as_bad_where (fix->fx_file, fix->fx_line,
10941 "%s must have a constant value",
10942 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 10943 fix->fx_done = 1;
94f592af 10944 return;
00f7efb6
JJ		 10945
10946 case BFD_RELOC_IA64_TPREL14:
10947 case BFD_RELOC_IA64_TPREL22:
10948 case BFD_RELOC_IA64_TPREL64I:
10949 case BFD_RELOC_IA64_LTOFF_TPREL22:
10950 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10951 case BFD_RELOC_IA64_DTPREL14:
10952 case BFD_RELOC_IA64_DTPREL22:
10953 case BFD_RELOC_IA64_DTPREL64I:
10954 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10955 S_SET_THREAD_LOCAL (fix->fx_addsy);
10956 break;
7925dd68
JJ		 10957
10958 default:
10959 break;
800eeca4 10960 }
800eeca4
JW		 10961 }
10962 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10963 {
10964 if (fix->tc_fix_data.bigendian)
10965 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10966 else
10967 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10968 fix->fx_done = 1;
800eeca4
JW		 10969 }
10970 else
10971 {
10972 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10973 fix->fx_done = 1;
800eeca4 10974 }
800eeca4
JW		 10975}
10976
10977/* Generate the BFD reloc to be stuck in the object file from the
10978 fixup used internally in the assembler. */
542d6675
KH		 10979
10980arelent *
800eeca4 10981tc_gen_reloc (sec, fixp)
2434f565 10982 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 10983 fixS *fixp;
10984{
10985 arelent *reloc;
10986
10987 reloc = xmalloc (sizeof (*reloc));
10988 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10989 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10990 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10991 reloc->addend = fixp->fx_offset;
10992 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10993
10994 if (!reloc->howto)
10995 {
10996 as_bad_where (fixp->fx_file, fixp->fx_line,
10997 "Cannot represent %s relocation in object file",
10998 bfd_get_reloc_code_name (fixp->fx_r_type));
10999 }
11000 return reloc;
11001}
11002
11003/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 11004 of type TYPE, and store the appropriate bytes in *LIT. The number
11005 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 11006 returned, or NULL on OK. */
11007
11008#define MAX_LITTLENUMS 5
11009
542d6675 11010char *
800eeca4
JW		 11011md_atof (type, lit, size)
11012 int type;
11013 char *lit;
11014 int *size;
11015{
11016 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 11017 char *t;
11018 int prec;
11019
11020 switch (type)
11021 {
11022 /* IEEE floats */
11023 case 'f':
11024 case 'F':
11025 case 's':
11026 case 'S':
11027 prec = 2;
11028 break;
11029
11030 case 'd':
11031 case 'D':
11032 case 'r':
11033 case 'R':
11034 prec = 4;
11035 break;
11036
11037 case 'x':
11038 case 'X':
11039 case 'p':
11040 case 'P':
11041 prec = 5;
11042 break;
11043
11044 default:
11045 *size = 0;
11046 return "Bad call to MD_ATOF()";
11047 }
11048 t = atof_ieee (input_line_pointer, type, words);
11049 if (t)
11050 input_line_pointer = t;
800eeca4 11051
10a98291
L		 11052 (*ia64_float_to_chars) (lit, words, prec);
11053
165a7f90
L		 11054 if (type == 'X')
11055 {
11056 /* It is 10 byte floating point with 6 byte padding. */
10a98291 11057 memset (&lit [10], 0, 6);
165a7f90
L		 11058 *size = 8 * sizeof (LITTLENUM_TYPE);
11059 }
10a98291
L		 11060 else
11061 *size = prec * sizeof (LITTLENUM_TYPE);
11062
800eeca4
JW		 11063 return 0;
11064}
11065
800eeca4
JW		 11066/* Handle ia64 specific semantics of the align directive. */
11067
0a9ef439 11068void
800eeca4 11069ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11070 int n ATTRIBUTE_UNUSED;
11071 const char *fill ATTRIBUTE_UNUSED;
2434f565 11072 int len ATTRIBUTE_UNUSED;
91a2ae2a 11073 int max ATTRIBUTE_UNUSED;
800eeca4 11074{
0a9ef439 11075 if (subseg_text_p (now_seg))
800eeca4 11076 ia64_flush_insns ();
0a9ef439 11077}
800eeca4 11078
0a9ef439
RH		 11079/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11080 of an rs_align_code fragment. */
800eeca4 11081
0a9ef439
RH		 11082void
11083ia64_handle_align (fragp)
11084 fragS *fragp;
11085{
11086 /* Use mfi bundle of nops with no stop bits. */
0a9ef439
RH		 11087 static const unsigned char le_nop[]
11088 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11089 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
9545c4ce
L		 11090 static const unsigned char le_nop_stop[]
11091 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11092 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
0a9ef439
RH		 11093
11094 int bytes;
11095 char *p;
9545c4ce 11096 const unsigned char *nop;
0a9ef439
RH		 11097
11098 if (fragp->fr_type != rs_align_code)
11099 return;
11100
9545c4ce
L		 11101 /* Check if this frag has to end with a stop bit. */
11102 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11103
0a9ef439
RH		 11104 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11105 p = fragp->fr_literal + fragp->fr_fix;
11106
d9201763
L		 11107 /* If no paddings are needed, we check if we need a stop bit. */
11108 if (!bytes && fragp->tc_frag_data)
11109 {
11110 if (fragp->fr_fix < 16)
bae25f19
L		 11111#if 1
11112 /* FIXME: It won't work with
11113 .align 16
11114 alloc r32=ar.pfs,1,2,4,0
11115 */
11116 ;
11117#else
d9201763
L		 11118 as_bad_where (fragp->fr_file, fragp->fr_line,
11119 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11120#endif
d9201763
L		 11121 else
11122 /* Bundles are always in little-endian byte order. Make sure
11123 the previous bundle has the stop bit. */
11124 *(p - 16) |= 1;
11125 }
11126
0a9ef439
RH		 11127 /* Make sure we are on a 16-byte boundary, in case someone has been
11128 putting data into a text section. */
11129 if (bytes & 15)
11130 {
11131 int fix = bytes & 15;
11132 memset (p, 0, fix);
11133 p += fix;
11134 bytes -= fix;
11135 fragp->fr_fix += fix;
800eeca4
JW		 11136 }
11137
012a452b 11138 /* Instruction bundles are always little-endian. */
9545c4ce 11139 memcpy (p, nop, 16);
0a9ef439 11140 fragp->fr_var = 16;
800eeca4 11141}
10a98291
L		 11142
11143static void
11144ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11145 int prec)
11146{
11147 while (prec--)
11148 {
11149 number_to_chars_bigendian (lit, (long) (*words++),
11150 sizeof (LITTLENUM_TYPE));
11151 lit += sizeof (LITTLENUM_TYPE);
11152 }
11153}
11154
11155static void
11156ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11157 int prec)
11158{
11159 while (prec--)
11160 {
11161 number_to_chars_littleendian (lit, (long) (words[prec]),
11162 sizeof (LITTLENUM_TYPE));
11163 lit += sizeof (LITTLENUM_TYPE);
11164 }
11165}
11166
11167void
11168ia64_elf_section_change_hook (void)
11169{
38ce5b11
L		 11170 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11171 && elf_linked_to_section (now_seg) == NULL)
11172 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11173 dot_byteorder (-1);
11174}
a645d1eb
L		 11175
11176/* Check if a label should be made global. */
11177void
11178ia64_check_label (symbolS *label)
11179{
11180 if (*input_line_pointer == ':')
11181 {
11182 S_SET_EXTERNAL (label);
11183 input_line_pointer++;
11184 }
11185}
35f5df7f
L		 11186
11187/* Used to remember where .alias and .secalias directives are seen. We
11188 will rename symbol and section names when we are about to output
11189 the relocatable file. */
11190struct alias
11191{
11192 char *file; /* The file where the directive is seen. */
11193 unsigned int line; /* The line number the directive is at. */
11194 const char *name; /* The orignale name of the symbol. */
11195};
11196
11197/* Called for .alias and .secalias directives. If SECTION is 1, it is
11198 .secalias. Otherwise, it is .alias. */
11199static void
11200dot_alias (int section)
11201{
11202 char *name, *alias;
11203 char delim;
11204 char *end_name;
11205 int len;
11206 const char *error_string;
11207 struct alias *h;
11208 const char *a;
11209 struct hash_control *ahash, *nhash;
11210 const char *kind;
11211
11212 name = input_line_pointer;
11213 delim = get_symbol_end ();
11214 end_name = input_line_pointer;
11215 *end_name = delim;
11216
11217 if (name == end_name)
11218 {
11219 as_bad (_("expected symbol name"));
11220 discard_rest_of_line ();
11221 return;
11222 }
11223
11224 SKIP_WHITESPACE ();
11225
11226 if (*input_line_pointer != ',')
11227 {
11228 *end_name = 0;
11229 as_bad (_("expected comma after \"%s\""), name);
11230 *end_name = delim;
11231 ignore_rest_of_line ();
11232 return;
11233 }
11234
11235 input_line_pointer++;
11236 *end_name = 0;
11237
11238 /* We call demand_copy_C_string to check if alias string is valid.
11239 There should be a closing `"' and no `\0' in the string. */
11240 alias = demand_copy_C_string (&len);
11241 if (alias == NULL)
11242 {
11243 ignore_rest_of_line ();
11244 return;
11245 }
11246
11247 /* Make a copy of name string. */
11248 len = strlen (name) + 1;
11249 obstack_grow (&notes, name, len);
11250 name = obstack_finish (&notes);
11251
11252 if (section)
11253 {
11254 kind = "section";
11255 ahash = secalias_hash;
11256 nhash = secalias_name_hash;
11257 }
11258 else
11259 {
11260 kind = "symbol";
11261 ahash = alias_hash;
11262 nhash = alias_name_hash;
11263 }
11264
11265 /* Check if alias has been used before. */
11266 h = (struct alias *) hash_find (ahash, alias);
11267 if (h)
11268 {
11269 if (strcmp (h->name, name))
11270 as_bad (_("`%s' is already the alias of %s `%s'"),
11271 alias, kind, h->name);
11272 goto out;
11273 }
11274
11275 /* Check if name already has an alias. */
11276 a = (const char *) hash_find (nhash, name);
11277 if (a)
11278 {
11279 if (strcmp (a, alias))
11280 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11281 goto out;
11282 }
11283
11284 h = (struct alias *) xmalloc (sizeof (struct alias));
11285 as_where (&h->file, &h->line);
11286 h->name = name;
11287
11288 error_string = hash_jam (ahash, alias, (PTR) h);
11289 if (error_string)
11290 {
11291 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11292 alias, kind, error_string);
11293 goto out;
11294 }
11295
11296 error_string = hash_jam (nhash, name, (PTR) alias);
11297 if (error_string)
11298 {
11299 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11300 alias, kind, error_string);
11301out:
11302 obstack_free (&notes, name);
11303 obstack_free (&notes, alias);
11304 }
11305
11306 demand_empty_rest_of_line ();
11307}
11308
11309/* It renames the original symbol name to its alias. */
11310static void
11311do_alias (const char *alias, PTR value)
11312{
11313 struct alias *h = (struct alias *) value;
11314 symbolS *sym = symbol_find (h->name);
11315
11316 if (sym == NULL)
11317 as_warn_where (h->file, h->line,
11318 _("symbol `%s' aliased to `%s' is not used"),
11319 h->name, alias);
11320 else
11321 S_SET_NAME (sym, (char *) alias);
11322}
11323
11324/* Called from write_object_file. */
11325void
11326ia64_adjust_symtab (void)
11327{
11328 hash_traverse (alias_hash, do_alias);
11329}
11330
11331/* It renames the original section name to its alias. */
11332static void
11333do_secalias (const char *alias, PTR value)
11334{
11335 struct alias *h = (struct alias *) value;
11336 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11337
11338 if (sec == NULL)
11339 as_warn_where (h->file, h->line,
11340 _("section `%s' aliased to `%s' is not used"),
11341 h->name, alias);
11342 else
11343 sec->name = alias;
11344}
11345
11346/* Called from write_object_file. */
11347void
11348ia64_frob_file (void)
11349{
11350 hash_traverse (secalias_hash, do_secalias);
11351}
GDB Binutils - Deliverables
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