Commit | Line | Data |
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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
744b6414 | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 |
d6afba4b | 3 | Free Software Foundation, Inc. |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
800eeca4 JW |
22 | |
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
a66d2bb7 JB |
54 | #ifdef HAVE_LIMITS_H |
55 | #include <limits.h> | |
56 | #endif | |
57 | ||
800eeca4 | 58 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) |
5faa8e39 JW |
59 | |
60 | /* Some systems define MIN in, e.g., param.h. */ | |
61 | #undef MIN | |
800eeca4 JW |
62 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
63 | ||
64 | #define NUM_SLOTS 4 | |
65 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
66 | #define CURR_SLOT md.slot[md.curr_slot] | |
67 | ||
68 | #define O_pseudo_fixup (O_max + 1) | |
69 | ||
70 | enum special_section | |
71 | { | |
557debba | 72 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
73 | SPECIAL_SECTION_BSS = 0, |
74 | SPECIAL_SECTION_SBSS, | |
75 | SPECIAL_SECTION_SDATA, | |
76 | SPECIAL_SECTION_RODATA, | |
77 | SPECIAL_SECTION_COMMENT, | |
78 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
79 | SPECIAL_SECTION_UNWIND_INFO, |
80 | /* HPUX specific section pseudo-ops. */ | |
81 | SPECIAL_SECTION_INIT_ARRAY, | |
82 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
83 | }; |
84 | ||
85 | enum reloc_func | |
86 | { | |
13ae64f3 JJ |
87 | FUNC_DTP_MODULE, |
88 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
89 | FUNC_FPTR_RELATIVE, |
90 | FUNC_GP_RELATIVE, | |
91 | FUNC_LT_RELATIVE, | |
fa2c7eff | 92 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 93 | FUNC_PC_RELATIVE, |
800eeca4 JW |
94 | FUNC_PLT_RELATIVE, |
95 | FUNC_SEC_RELATIVE, | |
96 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 97 | FUNC_TP_RELATIVE, |
800eeca4 JW |
98 | FUNC_LTV_RELATIVE, |
99 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
100 | FUNC_LT_DTP_MODULE, |
101 | FUNC_LT_DTP_RELATIVE, | |
102 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 103 | FUNC_IPLT_RELOC, |
800eeca4 JW |
104 | }; |
105 | ||
106 | enum reg_symbol | |
107 | { | |
108 | REG_GR = 0, | |
109 | REG_FR = (REG_GR + 128), | |
110 | REG_AR = (REG_FR + 128), | |
111 | REG_CR = (REG_AR + 128), | |
112 | REG_P = (REG_CR + 128), | |
113 | REG_BR = (REG_P + 64), | |
114 | REG_IP = (REG_BR + 8), | |
115 | REG_CFM, | |
116 | REG_PR, | |
117 | REG_PR_ROT, | |
118 | REG_PSR, | |
119 | REG_PSR_L, | |
120 | REG_PSR_UM, | |
121 | /* The following are pseudo-registers for use by gas only. */ | |
122 | IND_CPUID, | |
123 | IND_DBR, | |
124 | IND_DTR, | |
125 | IND_ITR, | |
126 | IND_IBR, | |
127 | IND_MEM, | |
128 | IND_MSR, | |
129 | IND_PKR, | |
130 | IND_PMC, | |
131 | IND_PMD, | |
132 | IND_RR, | |
542d6675 | 133 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
134 | REG_PSP, |
135 | REG_PRIUNAT, | |
800eeca4 JW |
136 | REG_NUM |
137 | }; | |
138 | ||
139 | enum dynreg_type | |
140 | { | |
141 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
142 | DYNREG_FR, /* dynamic floating point register */ | |
143 | DYNREG_PR, /* dynamic predicate register */ | |
144 | DYNREG_NUM_TYPES | |
145 | }; | |
146 | ||
87f8eb97 JW |
147 | enum operand_match_result |
148 | { | |
149 | OPERAND_MATCH, | |
150 | OPERAND_OUT_OF_RANGE, | |
151 | OPERAND_MISMATCH | |
152 | }; | |
153 | ||
800eeca4 JW |
154 | /* On the ia64, we can't know the address of a text label until the |
155 | instructions are packed into a bundle. To handle this, we keep | |
156 | track of the list of labels that appear in front of each | |
157 | instruction. */ | |
158 | struct label_fix | |
542d6675 KH |
159 | { |
160 | struct label_fix *next; | |
161 | struct symbol *sym; | |
07a53e5c | 162 | bfd_boolean dw2_mark_labels; |
542d6675 | 163 | }; |
800eeca4 | 164 | |
549f748d | 165 | /* This is the endianness of the current section. */ |
800eeca4 JW |
166 | extern int target_big_endian; |
167 | ||
549f748d JW |
168 | /* This is the default endianness. */ |
169 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
170 | ||
10a98291 L |
171 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
172 | ||
173 | static void ia64_float_to_chars_bigendian | |
174 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
175 | static void ia64_float_to_chars_littleendian | |
176 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
177 | static void (*ia64_float_to_chars) | |
178 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
179 | ||
35f5df7f L |
180 | static struct hash_control *alias_hash; |
181 | static struct hash_control *alias_name_hash; | |
182 | static struct hash_control *secalias_hash; | |
183 | static struct hash_control *secalias_name_hash; | |
184 | ||
2fac3d48 JB |
185 | /* List of chars besides those in app.c:symbol_chars that can start an |
186 | operand. Used to prevent the scrubber eating vital white-space. */ | |
187 | const char ia64_symbol_chars[] = "@?"; | |
188 | ||
800eeca4 JW |
189 | /* Characters which always start a comment. */ |
190 | const char comment_chars[] = ""; | |
191 | ||
192 | /* Characters which start a comment at the beginning of a line. */ | |
193 | const char line_comment_chars[] = "#"; | |
194 | ||
195 | /* Characters which may be used to separate multiple commands on a | |
196 | single line. */ | |
e4e8248d | 197 | const char line_separator_chars[] = ";{}"; |
800eeca4 JW |
198 | |
199 | /* Characters which are used to indicate an exponent in a floating | |
200 | point number. */ | |
201 | const char EXP_CHARS[] = "eE"; | |
202 | ||
203 | /* Characters which mean that a number is a floating point constant, | |
204 | as in 0d1.0. */ | |
205 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
206 | ||
542d6675 | 207 | /* ia64-specific option processing: */ |
800eeca4 | 208 | |
44f5c83a | 209 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
210 | |
211 | struct option md_longopts[] = | |
212 | { | |
c43c2cc5 JW |
213 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
214 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
215 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
216 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
217 | }; |
218 | ||
219 | size_t md_longopts_size = sizeof (md_longopts); | |
220 | ||
221 | static struct | |
222 | { | |
223 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
224 | struct hash_control *reg_hash; /* register name hash table */ | |
225 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
226 | struct hash_control *const_hash; /* constant hash table */ | |
227 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
228 | ||
229 | symbolS *regsym[REG_NUM]; | |
230 | ||
231 | /* If X_op is != O_absent, the registername for the instruction's | |
232 | qualifying predicate. If NULL, p0 is assumed for instructions | |
233 | that are predicatable. */ | |
234 | expressionS qp; | |
235 | ||
8c2fda1d L |
236 | /* Optimize for which CPU. */ |
237 | enum | |
238 | { | |
239 | itanium1, | |
240 | itanium2 | |
241 | } tune; | |
242 | ||
91d777ee L |
243 | /* What to do when hint.b is used. */ |
244 | enum | |
245 | { | |
246 | hint_b_error, | |
247 | hint_b_warning, | |
248 | hint_b_ok | |
249 | } hint_b; | |
250 | ||
800eeca4 | 251 | unsigned int |
197865e8 | 252 | manual_bundling : 1, |
800eeca4 JW |
253 | debug_dv: 1, |
254 | detect_dv: 1, | |
255 | explicit_mode : 1, /* which mode we're in */ | |
256 | default_explicit_mode : 1, /* which mode is the default */ | |
257 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
258 | auto_align : 1, |
259 | keep_pending_output : 1; | |
800eeca4 | 260 | |
970d6792 L |
261 | /* What to do when something is wrong with unwind directives. */ |
262 | enum | |
263 | { | |
264 | unwind_check_warning, | |
265 | unwind_check_error | |
266 | } unwind_check; | |
267 | ||
800eeca4 JW |
268 | /* Each bundle consists of up to three instructions. We keep |
269 | track of four most recent instructions so we can correctly set | |
197865e8 | 270 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
271 | int curr_slot; |
272 | int num_slots_in_use; | |
273 | struct slot | |
274 | { | |
275 | unsigned int | |
276 | end_of_insn_group : 1, | |
277 | manual_bundling_on : 1, | |
196e8040 JW |
278 | manual_bundling_off : 1, |
279 | loc_directive_seen : 1; | |
800eeca4 JW |
280 | signed char user_template; /* user-selected template, if any */ |
281 | unsigned char qp_regno; /* qualifying predicate */ | |
282 | /* This duplicates a good fraction of "struct fix" but we | |
283 | can't use a "struct fix" instead since we can't call | |
284 | fix_new_exp() until we know the address of the instruction. */ | |
285 | int num_fixups; | |
286 | struct insn_fix | |
287 | { | |
288 | bfd_reloc_code_real_type code; | |
289 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
290 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
291 | expressionS expr; /* the value to be inserted */ | |
292 | } | |
293 | fixup[2]; /* at most two fixups per insn */ | |
294 | struct ia64_opcode *idesc; | |
295 | struct label_fix *label_fixups; | |
f1bcba5b | 296 | struct label_fix *tag_fixups; |
800eeca4 JW |
297 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
298 | expressionS opnd[6]; | |
299 | char *src_file; | |
300 | unsigned int src_line; | |
301 | struct dwarf2_line_info debug_line; | |
302 | } | |
303 | slot[NUM_SLOTS]; | |
304 | ||
305 | segT last_text_seg; | |
306 | ||
307 | struct dynreg | |
308 | { | |
309 | struct dynreg *next; /* next dynamic register */ | |
310 | const char *name; | |
311 | unsigned short base; /* the base register number */ | |
312 | unsigned short num_regs; /* # of registers in this set */ | |
313 | } | |
314 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
315 | ||
316 | flagword flags; /* ELF-header flags */ | |
317 | ||
318 | struct mem_offset { | |
319 | unsigned hint:1; /* is this hint currently valid? */ | |
320 | bfd_vma offset; /* mem.offset offset */ | |
321 | bfd_vma base; /* mem.offset base */ | |
322 | } mem_offset; | |
323 | ||
324 | int path; /* number of alt. entry points seen */ | |
325 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 326 | the current DV-checking block. */ |
800eeca4 | 327 | int maxpaths; /* size currently allocated for |
542d6675 | 328 | entry_labels */ |
557debba JW |
329 | |
330 | int pointer_size; /* size in bytes of a pointer */ | |
331 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
332 | } |
333 | md; | |
334 | ||
f6fe78d6 JW |
335 | /* These are not const, because they are modified to MMI for non-itanium1 |
336 | targets below. */ | |
337 | /* MFI bundle of nops. */ | |
338 | static unsigned char le_nop[16] = | |
339 | { | |
340 | 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
341 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
342 | }; | |
343 | /* MFI bundle of nops with stop-bit. */ | |
344 | static unsigned char le_nop_stop[16] = | |
345 | { | |
346 | 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
347 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 | |
348 | }; | |
349 | ||
542d6675 | 350 | /* application registers: */ |
800eeca4 | 351 | |
e0c9811a JW |
352 | #define AR_K0 0 |
353 | #define AR_K7 7 | |
354 | #define AR_RSC 16 | |
355 | #define AR_BSP 17 | |
356 | #define AR_BSPSTORE 18 | |
357 | #define AR_RNAT 19 | |
358 | #define AR_UNAT 36 | |
359 | #define AR_FPSR 40 | |
360 | #define AR_ITC 44 | |
361 | #define AR_PFS 64 | |
362 | #define AR_LC 65 | |
800eeca4 JW |
363 | |
364 | static const struct | |
365 | { | |
366 | const char *name; | |
367 | int regnum; | |
368 | } | |
369 | ar[] = | |
370 | { | |
371 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
372 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
373 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
374 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
375 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
376 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
377 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
378 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
379 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
380 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
381 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 382 | {"ar.ec", 66}, |
800eeca4 JW |
383 | }; |
384 | ||
385 | #define CR_IPSR 16 | |
386 | #define CR_ISR 17 | |
387 | #define CR_IIP 19 | |
388 | #define CR_IFA 20 | |
389 | #define CR_ITIR 21 | |
390 | #define CR_IIPA 22 | |
391 | #define CR_IFS 23 | |
392 | #define CR_IIM 24 | |
393 | #define CR_IHA 25 | |
394 | #define CR_IVR 65 | |
395 | #define CR_TPR 66 | |
396 | #define CR_EOI 67 | |
397 | #define CR_IRR0 68 | |
398 | #define CR_IRR3 71 | |
399 | #define CR_LRR0 80 | |
400 | #define CR_LRR1 81 | |
401 | ||
542d6675 | 402 | /* control registers: */ |
800eeca4 JW |
403 | static const struct |
404 | { | |
405 | const char *name; | |
406 | int regnum; | |
407 | } | |
408 | cr[] = | |
409 | { | |
410 | {"cr.dcr", 0}, | |
411 | {"cr.itm", 1}, | |
412 | {"cr.iva", 2}, | |
413 | {"cr.pta", 8}, | |
414 | {"cr.gpta", 9}, | |
415 | {"cr.ipsr", 16}, | |
416 | {"cr.isr", 17}, | |
417 | {"cr.iip", 19}, | |
418 | {"cr.ifa", 20}, | |
419 | {"cr.itir", 21}, | |
420 | {"cr.iipa", 22}, | |
421 | {"cr.ifs", 23}, | |
422 | {"cr.iim", 24}, | |
423 | {"cr.iha", 25}, | |
424 | {"cr.lid", 64}, | |
425 | {"cr.ivr", 65}, | |
426 | {"cr.tpr", 66}, | |
427 | {"cr.eoi", 67}, | |
428 | {"cr.irr0", 68}, | |
429 | {"cr.irr1", 69}, | |
430 | {"cr.irr2", 70}, | |
431 | {"cr.irr3", 71}, | |
432 | {"cr.itv", 72}, | |
433 | {"cr.pmv", 73}, | |
434 | {"cr.cmcv", 74}, | |
435 | {"cr.lrr0", 80}, | |
436 | {"cr.lrr1", 81} | |
437 | }; | |
438 | ||
439 | #define PSR_MFL 4 | |
440 | #define PSR_IC 13 | |
441 | #define PSR_DFL 18 | |
442 | #define PSR_CPL 32 | |
443 | ||
444 | static const struct const_desc | |
445 | { | |
446 | const char *name; | |
447 | valueT value; | |
448 | } | |
449 | const_bits[] = | |
450 | { | |
542d6675 | 451 | /* PSR constant masks: */ |
800eeca4 JW |
452 | |
453 | /* 0: reserved */ | |
454 | {"psr.be", ((valueT) 1) << 1}, | |
455 | {"psr.up", ((valueT) 1) << 2}, | |
456 | {"psr.ac", ((valueT) 1) << 3}, | |
457 | {"psr.mfl", ((valueT) 1) << 4}, | |
458 | {"psr.mfh", ((valueT) 1) << 5}, | |
459 | /* 6-12: reserved */ | |
460 | {"psr.ic", ((valueT) 1) << 13}, | |
461 | {"psr.i", ((valueT) 1) << 14}, | |
462 | {"psr.pk", ((valueT) 1) << 15}, | |
463 | /* 16: reserved */ | |
464 | {"psr.dt", ((valueT) 1) << 17}, | |
465 | {"psr.dfl", ((valueT) 1) << 18}, | |
466 | {"psr.dfh", ((valueT) 1) << 19}, | |
467 | {"psr.sp", ((valueT) 1) << 20}, | |
468 | {"psr.pp", ((valueT) 1) << 21}, | |
469 | {"psr.di", ((valueT) 1) << 22}, | |
470 | {"psr.si", ((valueT) 1) << 23}, | |
471 | {"psr.db", ((valueT) 1) << 24}, | |
472 | {"psr.lp", ((valueT) 1) << 25}, | |
473 | {"psr.tb", ((valueT) 1) << 26}, | |
474 | {"psr.rt", ((valueT) 1) << 27}, | |
475 | /* 28-31: reserved */ | |
476 | /* 32-33: cpl (current privilege level) */ | |
477 | {"psr.is", ((valueT) 1) << 34}, | |
478 | {"psr.mc", ((valueT) 1) << 35}, | |
479 | {"psr.it", ((valueT) 1) << 36}, | |
480 | {"psr.id", ((valueT) 1) << 37}, | |
481 | {"psr.da", ((valueT) 1) << 38}, | |
482 | {"psr.dd", ((valueT) 1) << 39}, | |
483 | {"psr.ss", ((valueT) 1) << 40}, | |
484 | /* 41-42: ri (restart instruction) */ | |
485 | {"psr.ed", ((valueT) 1) << 43}, | |
486 | {"psr.bn", ((valueT) 1) << 44}, | |
487 | }; | |
488 | ||
542d6675 | 489 | /* indirect register-sets/memory: */ |
800eeca4 JW |
490 | |
491 | static const struct | |
492 | { | |
493 | const char *name; | |
494 | int regnum; | |
495 | } | |
496 | indirect_reg[] = | |
497 | { | |
498 | { "CPUID", IND_CPUID }, | |
499 | { "cpuid", IND_CPUID }, | |
500 | { "dbr", IND_DBR }, | |
501 | { "dtr", IND_DTR }, | |
502 | { "itr", IND_ITR }, | |
503 | { "ibr", IND_IBR }, | |
504 | { "msr", IND_MSR }, | |
505 | { "pkr", IND_PKR }, | |
506 | { "pmc", IND_PMC }, | |
507 | { "pmd", IND_PMD }, | |
508 | { "rr", IND_RR }, | |
509 | }; | |
510 | ||
511 | /* Pseudo functions used to indicate relocation types (these functions | |
512 | start with an at sign (@). */ | |
513 | static struct | |
514 | { | |
515 | const char *name; | |
516 | enum pseudo_type | |
517 | { | |
518 | PSEUDO_FUNC_NONE, | |
519 | PSEUDO_FUNC_RELOC, | |
520 | PSEUDO_FUNC_CONST, | |
e0c9811a | 521 | PSEUDO_FUNC_REG, |
800eeca4 JW |
522 | PSEUDO_FUNC_FLOAT |
523 | } | |
524 | type; | |
525 | union | |
526 | { | |
527 | unsigned long ival; | |
528 | symbolS *sym; | |
529 | } | |
530 | u; | |
531 | } | |
532 | pseudo_func[] = | |
533 | { | |
542d6675 | 534 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
535 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
536 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
537 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
538 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
539 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 540 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
541 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
542 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
543 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
544 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 545 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 | 546 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
16a48f83 JB |
547 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ |
548 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ | |
549 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
550 | { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 551 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 552 | |
542d6675 | 553 | /* mbtype4 constants: */ |
800eeca4 JW |
554 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
555 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
556 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
557 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
558 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
559 | ||
542d6675 | 560 | /* fclass constants: */ |
bf3ca999 | 561 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
562 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
563 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
564 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
565 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
566 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
567 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
568 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
569 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
570 | |
571 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 572 | |
c10d9d8f JW |
573 | /* hint constants: */ |
574 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
575 | ||
542d6675 | 576 | /* unwind-related constants: */ |
041340ad JW |
577 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
578 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
579 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
580 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
581 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
582 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
583 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 584 | |
542d6675 | 585 | /* unwind-related registers: */ |
e0c9811a | 586 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
587 | }; |
588 | ||
542d6675 | 589 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
590 | static const bfd_vma nop[IA64_NUM_UNITS] = |
591 | { | |
592 | 0x0000000000LL, /* NIL => break 0 */ | |
593 | 0x0008000000LL, /* I-unit nop */ | |
594 | 0x0008000000LL, /* M-unit nop */ | |
595 | 0x4000000000LL, /* B-unit nop */ | |
596 | 0x0008000000LL, /* F-unit nop */ | |
5d5e6db9 | 597 | 0x0000000000LL, /* L-"unit" nop immediate */ |
800eeca4 JW |
598 | 0x0008000000LL, /* X-unit nop */ |
599 | }; | |
600 | ||
601 | /* Can't be `const' as it's passed to input routines (which have the | |
602 | habit of setting temporary sentinels. */ | |
603 | static char special_section_name[][20] = | |
604 | { | |
605 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
606 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
607 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
608 | }; |
609 | ||
610 | /* The best template for a particular sequence of up to three | |
611 | instructions: */ | |
612 | #define N IA64_NUM_TYPES | |
613 | static unsigned char best_template[N][N][N]; | |
614 | #undef N | |
615 | ||
616 | /* Resource dependencies currently in effect */ | |
617 | static struct rsrc { | |
618 | int depind; /* dependency index */ | |
619 | const struct ia64_dependency *dependency; /* actual dependency */ | |
620 | unsigned specific:1, /* is this a specific bit/regno? */ | |
621 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
622 | int index; /* specific regno/bit within dependency */ | |
623 | int note; /* optional qualifying note (0 if none) */ | |
624 | #define STATE_NONE 0 | |
625 | #define STATE_STOP 1 | |
626 | #define STATE_SRLZ 2 | |
627 | int insn_srlz; /* current insn serialization state */ | |
628 | int data_srlz; /* current data serialization state */ | |
629 | int qp_regno; /* qualifying predicate for this usage */ | |
630 | char *file; /* what file marked this dependency */ | |
2434f565 | 631 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 632 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 633 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
634 | int path; /* corresponding code entry index */ |
635 | } *regdeps = NULL; | |
636 | static int regdepslen = 0; | |
637 | static int regdepstotlen = 0; | |
638 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
639 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 640 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 641 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
642 | |
643 | /* Current state of PR mutexation */ | |
644 | static struct qpmutex { | |
645 | valueT prmask; | |
646 | int path; | |
647 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
648 | static int qp_mutexeslen = 0; | |
649 | static int qp_mutexestotlen = 0; | |
197865e8 | 650 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
651 | |
652 | /* Current state of PR implications */ | |
653 | static struct qp_imply { | |
654 | unsigned p1:6; | |
655 | unsigned p2:6; | |
656 | unsigned p2_branched:1; | |
657 | int path; | |
658 | } *qp_implies = NULL; | |
659 | static int qp_implieslen = 0; | |
660 | static int qp_impliestotlen = 0; | |
661 | ||
197865e8 KH |
662 | /* Keep track of static GR values so that indirect register usage can |
663 | sometimes be tracked. */ | |
800eeca4 JW |
664 | static struct gr { |
665 | unsigned known:1; | |
666 | int path; | |
667 | valueT value; | |
a66d2bb7 JB |
668 | } gr_values[128] = { |
669 | { | |
670 | 1, | |
671 | #ifdef INT_MAX | |
672 | INT_MAX, | |
673 | #else | |
674 | (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, | |
675 | #endif | |
676 | 0 | |
677 | } | |
678 | }; | |
800eeca4 | 679 | |
9545c4ce L |
680 | /* Remember the alignment frag. */ |
681 | static fragS *align_frag; | |
682 | ||
800eeca4 JW |
683 | /* These are the routines required to output the various types of |
684 | unwind records. */ | |
685 | ||
f5a30c2e JW |
686 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
687 | frag address here so that if there is a section switch in the middle of | |
688 | a function, then instructions emitted to a different section are not | |
689 | counted. Since there may be more than one frag for a function, this | |
690 | means we also need to keep track of which frag this address belongs to | |
691 | so we can compute inter-frag distances. This also nicely solves the | |
692 | problem with nops emitted for align directives, which can't easily be | |
693 | counted, but can easily be derived from frag sizes. */ | |
694 | ||
800eeca4 JW |
695 | typedef struct unw_rec_list { |
696 | unwind_record r; | |
e0c9811a | 697 | unsigned long slot_number; |
f5a30c2e | 698 | fragS *slot_frag; |
800eeca4 JW |
699 | struct unw_rec_list *next; |
700 | } unw_rec_list; | |
701 | ||
2434f565 | 702 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 703 | |
6290819d NC |
704 | /* Linked list of saved prologue counts. A very poor |
705 | implementation of a map from label numbers to prologue counts. */ | |
706 | typedef struct label_prologue_count | |
707 | { | |
708 | struct label_prologue_count *next; | |
709 | unsigned long label_number; | |
710 | unsigned int prologue_count; | |
711 | } label_prologue_count; | |
712 | ||
5656b6b8 JB |
713 | typedef struct proc_pending |
714 | { | |
715 | symbolS *sym; | |
716 | struct proc_pending *next; | |
717 | } proc_pending; | |
718 | ||
e0c9811a JW |
719 | static struct |
720 | { | |
e0c9811a JW |
721 | /* Maintain a list of unwind entries for the current function. */ |
722 | unw_rec_list *list; | |
723 | unw_rec_list *tail; | |
800eeca4 | 724 | |
e0c9811a JW |
725 | /* Any unwind entires that should be attached to the current slot |
726 | that an insn is being constructed for. */ | |
727 | unw_rec_list *current_entry; | |
800eeca4 | 728 | |
e0c9811a | 729 | /* These are used to create the unwind table entry for this function. */ |
5656b6b8 | 730 | proc_pending proc_pending; |
e0c9811a JW |
731 | symbolS *info; /* pointer to unwind info */ |
732 | symbolS *personality_routine; | |
91a2ae2a RH |
733 | segT saved_text_seg; |
734 | subsegT saved_text_subseg; | |
735 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 736 | |
e0c9811a | 737 | /* TRUE if processing unwind directives in a prologue region. */ |
75e09913 JB |
738 | unsigned int prologue : 1; |
739 | unsigned int prologue_mask : 4; | |
e4e8248d | 740 | unsigned int prologue_gr : 7; |
75e09913 JB |
741 | unsigned int body : 1; |
742 | unsigned int insn : 1; | |
33d01f33 | 743 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
744 | /* Prologue counts at previous .label_state directives. */ |
745 | struct label_prologue_count * saved_prologue_counts; | |
ba825241 JB |
746 | |
747 | /* List of split up .save-s. */ | |
748 | unw_p_record *pending_saves; | |
e0c9811a | 749 | } unwind; |
800eeca4 | 750 | |
9f9a069e JW |
751 | /* The input value is a negated offset from psp, and specifies an address |
752 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
753 | must add 16 and divide by 4 to get the encoded value. */ | |
754 | ||
755 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
756 | ||
800eeca4 JW |
757 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
758 | ||
0234cb7c | 759 | /* Forward declarations: */ |
800eeca4 JW |
760 | static void set_section PARAMS ((char *name)); |
761 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
762 | unsigned int, unsigned int)); | |
d9201763 | 763 | static void dot_align (int); |
800eeca4 JW |
764 | static void dot_radix PARAMS ((int)); |
765 | static void dot_special_section PARAMS ((int)); | |
766 | static void dot_proc PARAMS ((int)); | |
767 | static void dot_fframe PARAMS ((int)); | |
768 | static void dot_vframe PARAMS ((int)); | |
150f24a2 | 769 | static void dot_vframesp PARAMS ((int)); |
800eeca4 JW |
770 | static void dot_save PARAMS ((int)); |
771 | static void dot_restore PARAMS ((int)); | |
150f24a2 | 772 | static void dot_restorereg PARAMS ((int)); |
800eeca4 JW |
773 | static void dot_handlerdata PARAMS ((int)); |
774 | static void dot_unwentry PARAMS ((int)); | |
775 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 776 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
777 | static void dot_saveg PARAMS ((int)); |
778 | static void dot_savef PARAMS ((int)); | |
779 | static void dot_saveb PARAMS ((int)); | |
780 | static void dot_savegf PARAMS ((int)); | |
781 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
782 | static void dot_spillreg PARAMS ((int)); |
783 | static void dot_spillmem PARAMS ((int)); | |
150f24a2 JW |
784 | static void dot_label_state PARAMS ((int)); |
785 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
786 | static void dot_unwabi PARAMS ((int)); |
787 | static void dot_personality PARAMS ((int)); | |
788 | static void dot_body PARAMS ((int)); | |
789 | static void dot_prologue PARAMS ((int)); | |
790 | static void dot_endp PARAMS ((int)); | |
791 | static void dot_template PARAMS ((int)); | |
792 | static void dot_regstk PARAMS ((int)); | |
793 | static void dot_rot PARAMS ((int)); | |
794 | static void dot_byteorder PARAMS ((int)); | |
795 | static void dot_psr PARAMS ((int)); | |
796 | static void dot_alias PARAMS ((int)); | |
797 | static void dot_ln PARAMS ((int)); | |
ef6a2b41 | 798 | static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua)); |
800eeca4 JW |
799 | static void dot_xdata PARAMS ((int)); |
800 | static void stmt_float_cons PARAMS ((int)); | |
801 | static void stmt_cons_ua PARAMS ((int)); | |
802 | static void dot_xfloat_cons PARAMS ((int)); | |
803 | static void dot_xstringer PARAMS ((int)); | |
804 | static void dot_xdata_ua PARAMS ((int)); | |
805 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 806 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
807 | static void dot_pred_rel PARAMS ((int)); |
808 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 809 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
810 | static void dot_dv_mode PARAMS ((int)); |
811 | static void dot_entry PARAMS ((int)); | |
812 | static void dot_mem_offset PARAMS ((int)); | |
e4e8248d | 813 | static void add_unwind_entry PARAMS((unw_rec_list *, int)); |
542d6675 | 814 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
815 | static void declare_register_set PARAMS ((const char *, int, int)); |
816 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
817 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
818 | int index, | |
819 | expressionS *e)); | |
e4e8248d | 820 | static int parse_operand PARAMS ((expressionS *, int)); |
800eeca4 JW |
821 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); |
822 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); | |
823 | static void emit_one_bundle PARAMS ((void)); | |
824 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 825 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
826 | bfd_reloc_code_real_type r_type)); |
827 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
828 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
829 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
830 | static void add_qp_mutex PARAMS((valueT mask)); |
831 | static void add_qp_imply PARAMS((int p1, int p2)); | |
832 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
833 | static void clear_qp_mutex PARAMS((valueT mask)); | |
834 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 835 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
836 | static void clear_register_values PARAMS ((void)); |
837 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
838 | static void instruction_serialization PARAMS ((void)); |
839 | static void data_serialization PARAMS ((void)); | |
840 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 841 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 842 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 843 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
844 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
845 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
846 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
847 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
848 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
849 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
850 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
851 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
852 | static int qp_mutex PARAMS ((int, int, int)); |
853 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
854 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
855 | static void count_output PARAMS ((int, char *, char *)); | |
856 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
857 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 858 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
859 | static void output_P1_format PARAMS ((vbyte_func, int)); |
860 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
861 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
862 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
863 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
864 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
865 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
866 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
867 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
868 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
869 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
870 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
871 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
872 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
873 | static char format_ab_reg PARAMS ((int, int)); |
874 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
875 | unsigned long)); | |
876 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
877 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
878 | unsigned long)); | |
879 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 880 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
881 | static unw_rec_list *output_prologue PARAMS ((void)); |
882 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
883 | static unw_rec_list *output_body PARAMS ((void)); | |
884 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
885 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
886 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
887 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
888 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
889 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
890 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
891 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
892 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
893 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
894 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
895 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
896 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
897 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
898 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
899 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
900 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
901 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
902 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
903 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
904 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
905 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
906 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
907 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
908 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
909 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
910 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
911 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
912 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
913 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
914 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
915 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
916 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
917 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
918 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
919 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
920 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
921 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
922 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
923 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
924 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
925 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
926 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
927 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
928 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
929 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
930 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
931 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
932 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
933 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
934 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
935 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
936 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
937 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
938 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
939 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
940 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
e4e8248d | 941 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int, |
150f24a2 | 942 | unsigned int)); |
e4e8248d | 943 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int, |
150f24a2 JW |
944 | unsigned int)); |
945 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
150f24a2 JW |
946 | unsigned int, unsigned int)); |
947 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
948 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
949 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
950 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 951 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
952 | unsigned long, fragS *, |
953 | int)); | |
91a2ae2a | 954 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 955 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
e4e8248d JB |
956 | static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *)); |
957 | static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int)); | |
958 | static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int)); | |
6290819d NC |
959 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
960 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
961 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 962 | |
652ca075 | 963 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
964 | unit (as opposed to the memory unit). */ |
965 | static int | |
652ca075 | 966 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
967 | { |
968 | reg -= REG_AR; | |
652ca075 L |
969 | return reg >= 64 && reg <= 111; |
970 | } | |
800eeca4 | 971 | |
652ca075 L |
972 | /* Determine if application register REGNUM resides only in the memory |
973 | unit (as opposed to the integer unit). */ | |
974 | static int | |
975 | ar_is_only_in_memory_unit (int reg) | |
976 | { | |
977 | reg -= REG_AR; | |
978 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
979 | } |
980 | ||
981 | /* Switch to section NAME and create section if necessary. It's | |
982 | rather ugly that we have to manipulate input_line_pointer but I | |
983 | don't see any other way to accomplish the same thing without | |
984 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
985 | static void | |
986 | set_section (name) | |
987 | char *name; | |
988 | { | |
989 | char *saved_input_line_pointer; | |
990 | ||
991 | saved_input_line_pointer = input_line_pointer; | |
992 | input_line_pointer = name; | |
993 | obj_elf_section (0); | |
994 | input_line_pointer = saved_input_line_pointer; | |
995 | } | |
996 | ||
d61a78a7 RH |
997 | /* Map 's' to SHF_IA_64_SHORT. */ |
998 | ||
999 | int | |
1000 | ia64_elf_section_letter (letter, ptr_msg) | |
1001 | int letter; | |
1002 | char **ptr_msg; | |
1003 | { | |
1004 | if (letter == 's') | |
1005 | return SHF_IA_64_SHORT; | |
711ef82f L |
1006 | else if (letter == 'o') |
1007 | return SHF_LINK_ORDER; | |
d61a78a7 | 1008 | |
711ef82f L |
1009 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
1010 | return -1; | |
d61a78a7 RH |
1011 | } |
1012 | ||
800eeca4 JW |
1013 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
1014 | ||
1015 | flagword | |
1016 | ia64_elf_section_flags (flags, attr, type) | |
1017 | flagword flags; | |
2434f565 | 1018 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
1019 | { |
1020 | if (attr & SHF_IA_64_SHORT) | |
1021 | flags |= SEC_SMALL_DATA; | |
1022 | return flags; | |
1023 | } | |
1024 | ||
91a2ae2a RH |
1025 | int |
1026 | ia64_elf_section_type (str, len) | |
40449e9f KH |
1027 | const char *str; |
1028 | size_t len; | |
91a2ae2a | 1029 | { |
1cd8ff38 | 1030 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 1031 | |
1cd8ff38 | 1032 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
1033 | return SHT_PROGBITS; |
1034 | ||
1cd8ff38 | 1035 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
1036 | return SHT_PROGBITS; |
1037 | ||
1cd8ff38 | 1038 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
1039 | return SHT_IA_64_UNWIND; |
1040 | ||
1cd8ff38 | 1041 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1042 | return SHT_IA_64_UNWIND; |
1043 | ||
711ef82f L |
1044 | if (STREQ ("unwind")) |
1045 | return SHT_IA_64_UNWIND; | |
1046 | ||
91a2ae2a | 1047 | return -1; |
1cd8ff38 | 1048 | #undef STREQ |
91a2ae2a RH |
1049 | } |
1050 | ||
800eeca4 JW |
1051 | static unsigned int |
1052 | set_regstack (ins, locs, outs, rots) | |
1053 | unsigned int ins, locs, outs, rots; | |
1054 | { | |
542d6675 KH |
1055 | /* Size of frame. */ |
1056 | unsigned int sof; | |
800eeca4 JW |
1057 | |
1058 | sof = ins + locs + outs; | |
1059 | if (sof > 96) | |
1060 | { | |
1061 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1062 | return 0; | |
1063 | } | |
1064 | if (rots > sof) | |
1065 | { | |
1066 | as_warn ("Size of rotating registers exceeds frame size"); | |
1067 | return 0; | |
1068 | } | |
1069 | md.in.base = REG_GR + 32; | |
1070 | md.loc.base = md.in.base + ins; | |
1071 | md.out.base = md.loc.base + locs; | |
1072 | ||
1073 | md.in.num_regs = ins; | |
1074 | md.loc.num_regs = locs; | |
1075 | md.out.num_regs = outs; | |
1076 | md.rot.num_regs = rots; | |
1077 | return sof; | |
1078 | } | |
1079 | ||
1080 | void | |
1081 | ia64_flush_insns () | |
1082 | { | |
1083 | struct label_fix *lfix; | |
1084 | segT saved_seg; | |
1085 | subsegT saved_subseg; | |
b44b1b85 | 1086 | unw_rec_list *ptr; |
07a53e5c | 1087 | bfd_boolean mark; |
800eeca4 JW |
1088 | |
1089 | if (!md.last_text_seg) | |
1090 | return; | |
1091 | ||
1092 | saved_seg = now_seg; | |
1093 | saved_subseg = now_subseg; | |
1094 | ||
1095 | subseg_set (md.last_text_seg, 0); | |
1096 | ||
1097 | while (md.num_slots_in_use > 0) | |
1098 | emit_one_bundle (); /* force out queued instructions */ | |
1099 | ||
1100 | /* In case there are labels following the last instruction, resolve | |
07a53e5c RH |
1101 | those now. */ |
1102 | mark = FALSE; | |
800eeca4 JW |
1103 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1104 | { | |
07a53e5c RH |
1105 | symbol_set_value_now (lfix->sym); |
1106 | mark |= lfix->dw2_mark_labels; | |
800eeca4 | 1107 | } |
07a53e5c | 1108 | if (mark) |
f1bcba5b | 1109 | { |
07a53e5c RH |
1110 | dwarf2_where (&CURR_SLOT.debug_line); |
1111 | CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
1112 | dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); | |
f1bcba5b | 1113 | } |
07a53e5c RH |
1114 | CURR_SLOT.label_fixups = 0; |
1115 | ||
1116 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) | |
1117 | symbol_set_value_now (lfix->sym); | |
f1bcba5b | 1118 | CURR_SLOT.tag_fixups = 0; |
800eeca4 | 1119 | |
b44b1b85 | 1120 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1121 | resolve those now. We only handle prologue, body, and endp directives |
1122 | here. Give an error for others. */ | |
b44b1b85 JW |
1123 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1124 | { | |
9c59842f | 1125 | switch (ptr->r.type) |
b44b1b85 | 1126 | { |
9c59842f JW |
1127 | case prologue: |
1128 | case prologue_gr: | |
1129 | case body: | |
1130 | case endp: | |
b44b1b85 JW |
1131 | ptr->slot_number = (unsigned long) frag_more (0); |
1132 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1133 | break; |
1134 | ||
1135 | /* Allow any record which doesn't have a "t" field (i.e., | |
1136 | doesn't relate to a particular instruction). */ | |
1137 | case unwabi: | |
1138 | case br_gr: | |
1139 | case copy_state: | |
1140 | case fr_mem: | |
1141 | case frgr_mem: | |
1142 | case gr_gr: | |
1143 | case gr_mem: | |
1144 | case label_state: | |
1145 | case rp_br: | |
1146 | case spill_base: | |
1147 | case spill_mask: | |
1148 | /* nothing */ | |
1149 | break; | |
1150 | ||
1151 | default: | |
1152 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1153 | break; | |
b44b1b85 | 1154 | } |
b44b1b85 JW |
1155 | } |
1156 | unwind.current_entry = NULL; | |
1157 | ||
800eeca4 | 1158 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1159 | |
1160 | if (md.qp.X_op == O_register) | |
1161 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1162 | } |
1163 | ||
d9201763 L |
1164 | static void |
1165 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1166 | { |
1167 | char *saved_input_line_pointer = input_line_pointer; | |
1168 | ||
1169 | input_line_pointer = ""; | |
1170 | s_align_bytes (nbytes); | |
1171 | input_line_pointer = saved_input_line_pointer; | |
1172 | } | |
1173 | ||
1174 | void | |
1175 | ia64_cons_align (nbytes) | |
1176 | int nbytes; | |
1177 | { | |
1178 | if (md.auto_align) | |
1179 | { | |
1180 | char *saved_input_line_pointer = input_line_pointer; | |
1181 | input_line_pointer = ""; | |
1182 | s_align_bytes (nbytes); | |
1183 | input_line_pointer = saved_input_line_pointer; | |
1184 | } | |
1185 | } | |
1186 | ||
1187 | /* Output COUNT bytes to a memory location. */ | |
2132e3a3 | 1188 | static char *vbyte_mem_ptr = NULL; |
800eeca4 | 1189 | |
197865e8 | 1190 | void |
800eeca4 JW |
1191 | output_vbyte_mem (count, ptr, comment) |
1192 | int count; | |
1193 | char *ptr; | |
2434f565 | 1194 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1195 | { |
1196 | int x; | |
1197 | if (vbyte_mem_ptr == NULL) | |
1198 | abort (); | |
1199 | ||
1200 | if (count == 0) | |
1201 | return; | |
1202 | for (x = 0; x < count; x++) | |
1203 | *(vbyte_mem_ptr++) = ptr[x]; | |
1204 | } | |
1205 | ||
1206 | /* Count the number of bytes required for records. */ | |
1207 | static int vbyte_count = 0; | |
197865e8 | 1208 | void |
800eeca4 JW |
1209 | count_output (count, ptr, comment) |
1210 | int count; | |
2434f565 JW |
1211 | char *ptr ATTRIBUTE_UNUSED; |
1212 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1213 | { |
1214 | vbyte_count += count; | |
1215 | } | |
1216 | ||
1217 | static void | |
1218 | output_R1_format (f, rtype, rlen) | |
1219 | vbyte_func f; | |
1220 | unw_record_type rtype; | |
1221 | int rlen; | |
1222 | { | |
e0c9811a | 1223 | int r = 0; |
800eeca4 JW |
1224 | char byte; |
1225 | if (rlen > 0x1f) | |
1226 | { | |
1227 | output_R3_format (f, rtype, rlen); | |
1228 | return; | |
1229 | } | |
197865e8 | 1230 | |
e0c9811a JW |
1231 | if (rtype == body) |
1232 | r = 1; | |
1233 | else if (rtype != prologue) | |
1234 | as_bad ("record type is not valid"); | |
1235 | ||
800eeca4 JW |
1236 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1237 | (*f) (1, &byte, NULL); | |
1238 | } | |
1239 | ||
1240 | static void | |
1241 | output_R2_format (f, mask, grsave, rlen) | |
1242 | vbyte_func f; | |
1243 | int mask, grsave; | |
1244 | unsigned long rlen; | |
1245 | { | |
1246 | char bytes[20]; | |
1247 | int count = 2; | |
1248 | mask = (mask & 0x0f); | |
1249 | grsave = (grsave & 0x7f); | |
1250 | ||
1251 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1252 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1253 | count += output_leb128 (bytes + 2, rlen, 0); | |
1254 | (*f) (count, bytes, NULL); | |
1255 | } | |
1256 | ||
1257 | static void | |
1258 | output_R3_format (f, rtype, rlen) | |
1259 | vbyte_func f; | |
1260 | unw_record_type rtype; | |
1261 | unsigned long rlen; | |
1262 | { | |
e0c9811a | 1263 | int r = 0, count; |
800eeca4 JW |
1264 | char bytes[20]; |
1265 | if (rlen <= 0x1f) | |
1266 | { | |
1267 | output_R1_format (f, rtype, rlen); | |
1268 | return; | |
1269 | } | |
197865e8 | 1270 | |
e0c9811a JW |
1271 | if (rtype == body) |
1272 | r = 1; | |
1273 | else if (rtype != prologue) | |
1274 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1275 | bytes[0] = (UNW_R3 | r); |
1276 | count = output_leb128 (bytes + 1, rlen, 0); | |
1277 | (*f) (count + 1, bytes, NULL); | |
1278 | } | |
1279 | ||
1280 | static void | |
1281 | output_P1_format (f, brmask) | |
1282 | vbyte_func f; | |
1283 | int brmask; | |
1284 | { | |
1285 | char byte; | |
1286 | byte = UNW_P1 | (brmask & 0x1f); | |
1287 | (*f) (1, &byte, NULL); | |
1288 | } | |
1289 | ||
1290 | static void | |
1291 | output_P2_format (f, brmask, gr) | |
1292 | vbyte_func f; | |
1293 | int brmask; | |
1294 | int gr; | |
1295 | { | |
1296 | char bytes[2]; | |
1297 | brmask = (brmask & 0x1f); | |
1298 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1299 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1300 | (*f) (2, bytes, NULL); | |
1301 | } | |
1302 | ||
1303 | static void | |
1304 | output_P3_format (f, rtype, reg) | |
1305 | vbyte_func f; | |
1306 | unw_record_type rtype; | |
1307 | int reg; | |
1308 | { | |
1309 | char bytes[2]; | |
e0c9811a | 1310 | int r = 0; |
800eeca4 JW |
1311 | reg = (reg & 0x7f); |
1312 | switch (rtype) | |
542d6675 | 1313 | { |
800eeca4 JW |
1314 | case psp_gr: |
1315 | r = 0; | |
1316 | break; | |
1317 | case rp_gr: | |
1318 | r = 1; | |
1319 | break; | |
1320 | case pfs_gr: | |
1321 | r = 2; | |
1322 | break; | |
1323 | case preds_gr: | |
1324 | r = 3; | |
1325 | break; | |
1326 | case unat_gr: | |
1327 | r = 4; | |
1328 | break; | |
1329 | case lc_gr: | |
1330 | r = 5; | |
1331 | break; | |
1332 | case rp_br: | |
1333 | r = 6; | |
1334 | break; | |
1335 | case rnat_gr: | |
1336 | r = 7; | |
1337 | break; | |
1338 | case bsp_gr: | |
1339 | r = 8; | |
1340 | break; | |
1341 | case bspstore_gr: | |
1342 | r = 9; | |
1343 | break; | |
1344 | case fpsr_gr: | |
1345 | r = 10; | |
1346 | break; | |
1347 | case priunat_gr: | |
1348 | r = 11; | |
1349 | break; | |
1350 | default: | |
1351 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1352 | } |
800eeca4 JW |
1353 | bytes[0] = (UNW_P3 | (r >> 1)); |
1354 | bytes[1] = (((r & 1) << 7) | reg); | |
1355 | (*f) (2, bytes, NULL); | |
1356 | } | |
1357 | ||
800eeca4 | 1358 | static void |
e0c9811a | 1359 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1360 | vbyte_func f; |
e0c9811a JW |
1361 | unsigned char *imask; |
1362 | unsigned long imask_size; | |
800eeca4 | 1363 | { |
e0c9811a | 1364 | imask[0] = UNW_P4; |
2132e3a3 | 1365 | (*f) (imask_size, (char *) imask, NULL); |
800eeca4 JW |
1366 | } |
1367 | ||
1368 | static void | |
1369 | output_P5_format (f, grmask, frmask) | |
1370 | vbyte_func f; | |
1371 | int grmask; | |
1372 | unsigned long frmask; | |
1373 | { | |
1374 | char bytes[4]; | |
1375 | grmask = (grmask & 0x0f); | |
1376 | ||
1377 | bytes[0] = UNW_P5; | |
1378 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1379 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1380 | bytes[3] = (frmask & 0x000000ff); | |
1381 | (*f) (4, bytes, NULL); | |
1382 | } | |
1383 | ||
1384 | static void | |
1385 | output_P6_format (f, rtype, rmask) | |
1386 | vbyte_func f; | |
1387 | unw_record_type rtype; | |
1388 | int rmask; | |
1389 | { | |
1390 | char byte; | |
e0c9811a | 1391 | int r = 0; |
197865e8 | 1392 | |
e0c9811a JW |
1393 | if (rtype == gr_mem) |
1394 | r = 1; | |
1395 | else if (rtype != fr_mem) | |
1396 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1397 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1398 | (*f) (1, &byte, NULL); | |
1399 | } | |
1400 | ||
1401 | static void | |
1402 | output_P7_format (f, rtype, w1, w2) | |
1403 | vbyte_func f; | |
1404 | unw_record_type rtype; | |
1405 | unsigned long w1; | |
1406 | unsigned long w2; | |
1407 | { | |
1408 | char bytes[20]; | |
1409 | int count = 1; | |
e0c9811a | 1410 | int r = 0; |
800eeca4 JW |
1411 | count += output_leb128 (bytes + 1, w1, 0); |
1412 | switch (rtype) | |
1413 | { | |
542d6675 KH |
1414 | case mem_stack_f: |
1415 | r = 0; | |
1416 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1417 | break; | |
1418 | case mem_stack_v: | |
1419 | r = 1; | |
1420 | break; | |
1421 | case spill_base: | |
1422 | r = 2; | |
1423 | break; | |
1424 | case psp_sprel: | |
1425 | r = 3; | |
1426 | break; | |
1427 | case rp_when: | |
1428 | r = 4; | |
1429 | break; | |
1430 | case rp_psprel: | |
1431 | r = 5; | |
1432 | break; | |
1433 | case pfs_when: | |
1434 | r = 6; | |
1435 | break; | |
1436 | case pfs_psprel: | |
1437 | r = 7; | |
1438 | break; | |
1439 | case preds_when: | |
1440 | r = 8; | |
1441 | break; | |
1442 | case preds_psprel: | |
1443 | r = 9; | |
1444 | break; | |
1445 | case lc_when: | |
1446 | r = 10; | |
1447 | break; | |
1448 | case lc_psprel: | |
1449 | r = 11; | |
1450 | break; | |
1451 | case unat_when: | |
1452 | r = 12; | |
1453 | break; | |
1454 | case unat_psprel: | |
1455 | r = 13; | |
1456 | break; | |
1457 | case fpsr_when: | |
1458 | r = 14; | |
1459 | break; | |
1460 | case fpsr_psprel: | |
1461 | r = 15; | |
1462 | break; | |
1463 | default: | |
1464 | break; | |
800eeca4 JW |
1465 | } |
1466 | bytes[0] = (UNW_P7 | r); | |
1467 | (*f) (count, bytes, NULL); | |
1468 | } | |
1469 | ||
1470 | static void | |
1471 | output_P8_format (f, rtype, t) | |
1472 | vbyte_func f; | |
1473 | unw_record_type rtype; | |
1474 | unsigned long t; | |
1475 | { | |
1476 | char bytes[20]; | |
e0c9811a | 1477 | int r = 0; |
800eeca4 JW |
1478 | int count = 2; |
1479 | bytes[0] = UNW_P8; | |
1480 | switch (rtype) | |
1481 | { | |
542d6675 KH |
1482 | case rp_sprel: |
1483 | r = 1; | |
1484 | break; | |
1485 | case pfs_sprel: | |
1486 | r = 2; | |
1487 | break; | |
1488 | case preds_sprel: | |
1489 | r = 3; | |
1490 | break; | |
1491 | case lc_sprel: | |
1492 | r = 4; | |
1493 | break; | |
1494 | case unat_sprel: | |
1495 | r = 5; | |
1496 | break; | |
1497 | case fpsr_sprel: | |
1498 | r = 6; | |
1499 | break; | |
1500 | case bsp_when: | |
1501 | r = 7; | |
1502 | break; | |
1503 | case bsp_psprel: | |
1504 | r = 8; | |
1505 | break; | |
1506 | case bsp_sprel: | |
1507 | r = 9; | |
1508 | break; | |
1509 | case bspstore_when: | |
1510 | r = 10; | |
1511 | break; | |
1512 | case bspstore_psprel: | |
1513 | r = 11; | |
1514 | break; | |
1515 | case bspstore_sprel: | |
1516 | r = 12; | |
1517 | break; | |
1518 | case rnat_when: | |
1519 | r = 13; | |
1520 | break; | |
1521 | case rnat_psprel: | |
1522 | r = 14; | |
1523 | break; | |
1524 | case rnat_sprel: | |
1525 | r = 15; | |
1526 | break; | |
1527 | case priunat_when_gr: | |
1528 | r = 16; | |
1529 | break; | |
1530 | case priunat_psprel: | |
1531 | r = 17; | |
1532 | break; | |
1533 | case priunat_sprel: | |
1534 | r = 18; | |
1535 | break; | |
1536 | case priunat_when_mem: | |
1537 | r = 19; | |
1538 | break; | |
1539 | default: | |
1540 | break; | |
800eeca4 JW |
1541 | } |
1542 | bytes[1] = r; | |
1543 | count += output_leb128 (bytes + 2, t, 0); | |
1544 | (*f) (count, bytes, NULL); | |
1545 | } | |
1546 | ||
1547 | static void | |
1548 | output_P9_format (f, grmask, gr) | |
1549 | vbyte_func f; | |
1550 | int grmask; | |
1551 | int gr; | |
1552 | { | |
1553 | char bytes[3]; | |
1554 | bytes[0] = UNW_P9; | |
1555 | bytes[1] = (grmask & 0x0f); | |
1556 | bytes[2] = (gr & 0x7f); | |
1557 | (*f) (3, bytes, NULL); | |
1558 | } | |
1559 | ||
1560 | static void | |
1561 | output_P10_format (f, abi, context) | |
1562 | vbyte_func f; | |
1563 | int abi; | |
1564 | int context; | |
1565 | { | |
1566 | char bytes[3]; | |
1567 | bytes[0] = UNW_P10; | |
1568 | bytes[1] = (abi & 0xff); | |
1569 | bytes[2] = (context & 0xff); | |
1570 | (*f) (3, bytes, NULL); | |
1571 | } | |
1572 | ||
1573 | static void | |
1574 | output_B1_format (f, rtype, label) | |
1575 | vbyte_func f; | |
1576 | unw_record_type rtype; | |
1577 | unsigned long label; | |
1578 | { | |
1579 | char byte; | |
e0c9811a | 1580 | int r = 0; |
197865e8 | 1581 | if (label > 0x1f) |
800eeca4 JW |
1582 | { |
1583 | output_B4_format (f, rtype, label); | |
1584 | return; | |
1585 | } | |
e0c9811a JW |
1586 | if (rtype == copy_state) |
1587 | r = 1; | |
1588 | else if (rtype != label_state) | |
1589 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1590 | |
1591 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1592 | (*f) (1, &byte, NULL); | |
1593 | } | |
1594 | ||
1595 | static void | |
1596 | output_B2_format (f, ecount, t) | |
1597 | vbyte_func f; | |
1598 | unsigned long ecount; | |
1599 | unsigned long t; | |
1600 | { | |
1601 | char bytes[20]; | |
1602 | int count = 1; | |
1603 | if (ecount > 0x1f) | |
1604 | { | |
1605 | output_B3_format (f, ecount, t); | |
1606 | return; | |
1607 | } | |
1608 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1609 | count += output_leb128 (bytes + 1, t, 0); | |
1610 | (*f) (count, bytes, NULL); | |
1611 | } | |
1612 | ||
1613 | static void | |
1614 | output_B3_format (f, ecount, t) | |
1615 | vbyte_func f; | |
1616 | unsigned long ecount; | |
1617 | unsigned long t; | |
1618 | { | |
1619 | char bytes[20]; | |
1620 | int count = 1; | |
1621 | if (ecount <= 0x1f) | |
1622 | { | |
1623 | output_B2_format (f, ecount, t); | |
1624 | return; | |
1625 | } | |
1626 | bytes[0] = UNW_B3; | |
1627 | count += output_leb128 (bytes + 1, t, 0); | |
1628 | count += output_leb128 (bytes + count, ecount, 0); | |
1629 | (*f) (count, bytes, NULL); | |
1630 | } | |
1631 | ||
1632 | static void | |
1633 | output_B4_format (f, rtype, label) | |
1634 | vbyte_func f; | |
1635 | unw_record_type rtype; | |
1636 | unsigned long label; | |
1637 | { | |
1638 | char bytes[20]; | |
e0c9811a | 1639 | int r = 0; |
800eeca4 | 1640 | int count = 1; |
197865e8 | 1641 | if (label <= 0x1f) |
800eeca4 JW |
1642 | { |
1643 | output_B1_format (f, rtype, label); | |
1644 | return; | |
1645 | } | |
197865e8 | 1646 | |
e0c9811a JW |
1647 | if (rtype == copy_state) |
1648 | r = 1; | |
1649 | else if (rtype != label_state) | |
1650 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1651 | |
1652 | bytes[0] = (UNW_B4 | (r << 3)); | |
1653 | count += output_leb128 (bytes + 1, label, 0); | |
1654 | (*f) (count, bytes, NULL); | |
1655 | } | |
1656 | ||
1657 | static char | |
e0c9811a | 1658 | format_ab_reg (ab, reg) |
542d6675 KH |
1659 | int ab; |
1660 | int reg; | |
800eeca4 JW |
1661 | { |
1662 | int ret; | |
e0c9811a | 1663 | ab = (ab & 3); |
800eeca4 | 1664 | reg = (reg & 0x1f); |
e0c9811a | 1665 | ret = (ab << 5) | reg; |
800eeca4 JW |
1666 | return ret; |
1667 | } | |
1668 | ||
1669 | static void | |
e0c9811a | 1670 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1671 | vbyte_func f; |
1672 | unw_record_type rtype; | |
e0c9811a | 1673 | int ab, reg; |
800eeca4 JW |
1674 | unsigned long t; |
1675 | unsigned long w1; | |
1676 | { | |
1677 | char bytes[20]; | |
e0c9811a | 1678 | int r = 0; |
800eeca4 JW |
1679 | int count = 2; |
1680 | bytes[0] = UNW_X1; | |
197865e8 | 1681 | |
e0c9811a JW |
1682 | if (rtype == spill_sprel) |
1683 | r = 1; | |
1684 | else if (rtype != spill_psprel) | |
1685 | as_bad ("Invalid record type for format X1"); | |
1686 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1687 | count += output_leb128 (bytes + 2, t, 0); |
1688 | count += output_leb128 (bytes + count, w1, 0); | |
1689 | (*f) (count, bytes, NULL); | |
1690 | } | |
1691 | ||
1692 | static void | |
e0c9811a | 1693 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1694 | vbyte_func f; |
e0c9811a | 1695 | int ab, reg; |
800eeca4 JW |
1696 | int x, y, treg; |
1697 | unsigned long t; | |
1698 | { | |
1699 | char bytes[20]; | |
800eeca4 JW |
1700 | int count = 3; |
1701 | bytes[0] = UNW_X2; | |
e0c9811a | 1702 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1703 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1704 | count += output_leb128 (bytes + 3, t, 0); | |
1705 | (*f) (count, bytes, NULL); | |
1706 | } | |
1707 | ||
1708 | static void | |
e0c9811a | 1709 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1710 | vbyte_func f; |
1711 | unw_record_type rtype; | |
1712 | int qp; | |
e0c9811a | 1713 | int ab, reg; |
800eeca4 JW |
1714 | unsigned long t; |
1715 | unsigned long w1; | |
1716 | { | |
1717 | char bytes[20]; | |
e0c9811a | 1718 | int r = 0; |
800eeca4 | 1719 | int count = 3; |
e0c9811a JW |
1720 | bytes[0] = UNW_X3; |
1721 | ||
1722 | if (rtype == spill_sprel_p) | |
1723 | r = 1; | |
1724 | else if (rtype != spill_psprel_p) | |
1725 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1726 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1727 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1728 | count += output_leb128 (bytes + 3, t, 0); |
1729 | count += output_leb128 (bytes + count, w1, 0); | |
1730 | (*f) (count, bytes, NULL); | |
1731 | } | |
1732 | ||
1733 | static void | |
e0c9811a | 1734 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1735 | vbyte_func f; |
1736 | int qp; | |
e0c9811a | 1737 | int ab, reg; |
800eeca4 JW |
1738 | int x, y, treg; |
1739 | unsigned long t; | |
1740 | { | |
1741 | char bytes[20]; | |
800eeca4 | 1742 | int count = 4; |
e0c9811a | 1743 | bytes[0] = UNW_X4; |
800eeca4 | 1744 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1745 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1746 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1747 | count += output_leb128 (bytes + 4, t, 0); | |
1748 | (*f) (count, bytes, NULL); | |
1749 | } | |
1750 | ||
ba825241 JB |
1751 | /* This function checks whether there are any outstanding .save-s and |
1752 | discards them if so. */ | |
1753 | ||
1754 | static void | |
1755 | check_pending_save (void) | |
1756 | { | |
1757 | if (unwind.pending_saves) | |
1758 | { | |
1759 | unw_rec_list *cur, *prev; | |
1760 | ||
1761 | as_warn ("Previous .save incomplete"); | |
1762 | for (cur = unwind.list, prev = NULL; cur; ) | |
1763 | if (&cur->r.record.p == unwind.pending_saves) | |
1764 | { | |
1765 | if (prev) | |
1766 | prev->next = cur->next; | |
1767 | else | |
1768 | unwind.list = cur->next; | |
1769 | if (cur == unwind.tail) | |
1770 | unwind.tail = prev; | |
1771 | if (cur == unwind.current_entry) | |
1772 | unwind.current_entry = cur->next; | |
1773 | /* Don't free the first discarded record, it's being used as | |
1774 | terminator for (currently) br_gr and gr_gr processing, and | |
1775 | also prevents leaving a dangling pointer to it in its | |
1776 | predecessor. */ | |
1777 | cur->r.record.p.grmask = 0; | |
1778 | cur->r.record.p.brmask = 0; | |
1779 | cur->r.record.p.frmask = 0; | |
1780 | prev = cur->r.record.p.next; | |
1781 | cur->r.record.p.next = NULL; | |
1782 | cur = prev; | |
1783 | break; | |
1784 | } | |
1785 | else | |
1786 | { | |
1787 | prev = cur; | |
1788 | cur = cur->next; | |
1789 | } | |
1790 | while (cur) | |
1791 | { | |
1792 | prev = cur; | |
1793 | cur = cur->r.record.p.next; | |
1794 | free (prev); | |
1795 | } | |
1796 | unwind.pending_saves = NULL; | |
1797 | } | |
1798 | } | |
1799 | ||
800eeca4 | 1800 | /* This function allocates a record list structure, and initializes fields. */ |
542d6675 | 1801 | |
800eeca4 | 1802 | static unw_rec_list * |
197865e8 | 1803 | alloc_record (unw_record_type t) |
800eeca4 JW |
1804 | { |
1805 | unw_rec_list *ptr; | |
1806 | ptr = xmalloc (sizeof (*ptr)); | |
ba825241 | 1807 | memset (ptr, 0, sizeof (*ptr)); |
800eeca4 JW |
1808 | ptr->slot_number = SLOT_NUM_NOT_SET; |
1809 | ptr->r.type = t; | |
1810 | return ptr; | |
1811 | } | |
1812 | ||
5738bc24 JW |
1813 | /* Dummy unwind record used for calculating the length of the last prologue or |
1814 | body region. */ | |
1815 | ||
1816 | static unw_rec_list * | |
1817 | output_endp () | |
1818 | { | |
1819 | unw_rec_list *ptr = alloc_record (endp); | |
1820 | return ptr; | |
1821 | } | |
1822 | ||
800eeca4 JW |
1823 | static unw_rec_list * |
1824 | output_prologue () | |
1825 | { | |
1826 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1827 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1828 | return ptr; |
1829 | } | |
1830 | ||
1831 | static unw_rec_list * | |
1832 | output_prologue_gr (saved_mask, reg) | |
1833 | unsigned int saved_mask; | |
1834 | unsigned int reg; | |
1835 | { | |
1836 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1837 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1838 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1839 | ptr->r.record.r.grsave = reg; |
1840 | return ptr; | |
1841 | } | |
1842 | ||
1843 | static unw_rec_list * | |
1844 | output_body () | |
1845 | { | |
1846 | unw_rec_list *ptr = alloc_record (body); | |
1847 | return ptr; | |
1848 | } | |
1849 | ||
1850 | static unw_rec_list * | |
1851 | output_mem_stack_f (size) | |
1852 | unsigned int size; | |
1853 | { | |
1854 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1855 | ptr->r.record.p.size = size; | |
1856 | return ptr; | |
1857 | } | |
1858 | ||
1859 | static unw_rec_list * | |
1860 | output_mem_stack_v () | |
1861 | { | |
1862 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1863 | return ptr; | |
1864 | } | |
1865 | ||
1866 | static unw_rec_list * | |
1867 | output_psp_gr (gr) | |
1868 | unsigned int gr; | |
1869 | { | |
1870 | unw_rec_list *ptr = alloc_record (psp_gr); | |
ba825241 | 1871 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1872 | return ptr; |
1873 | } | |
1874 | ||
1875 | static unw_rec_list * | |
1876 | output_psp_sprel (offset) | |
1877 | unsigned int offset; | |
1878 | { | |
1879 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
ba825241 | 1880 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1881 | return ptr; |
1882 | } | |
1883 | ||
1884 | static unw_rec_list * | |
1885 | output_rp_when () | |
1886 | { | |
1887 | unw_rec_list *ptr = alloc_record (rp_when); | |
1888 | return ptr; | |
1889 | } | |
1890 | ||
1891 | static unw_rec_list * | |
1892 | output_rp_gr (gr) | |
1893 | unsigned int gr; | |
1894 | { | |
1895 | unw_rec_list *ptr = alloc_record (rp_gr); | |
ba825241 | 1896 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1897 | return ptr; |
1898 | } | |
1899 | ||
1900 | static unw_rec_list * | |
1901 | output_rp_br (br) | |
1902 | unsigned int br; | |
1903 | { | |
1904 | unw_rec_list *ptr = alloc_record (rp_br); | |
ba825241 | 1905 | ptr->r.record.p.r.br = br; |
800eeca4 JW |
1906 | return ptr; |
1907 | } | |
1908 | ||
1909 | static unw_rec_list * | |
1910 | output_rp_psprel (offset) | |
1911 | unsigned int offset; | |
1912 | { | |
1913 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
ba825241 | 1914 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1915 | return ptr; |
1916 | } | |
1917 | ||
1918 | static unw_rec_list * | |
1919 | output_rp_sprel (offset) | |
1920 | unsigned int offset; | |
1921 | { | |
1922 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
ba825241 | 1923 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1924 | return ptr; |
1925 | } | |
1926 | ||
1927 | static unw_rec_list * | |
1928 | output_pfs_when () | |
1929 | { | |
1930 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1931 | return ptr; | |
1932 | } | |
1933 | ||
1934 | static unw_rec_list * | |
1935 | output_pfs_gr (gr) | |
1936 | unsigned int gr; | |
1937 | { | |
1938 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
ba825241 | 1939 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1940 | return ptr; |
1941 | } | |
1942 | ||
1943 | static unw_rec_list * | |
1944 | output_pfs_psprel (offset) | |
1945 | unsigned int offset; | |
1946 | { | |
1947 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
ba825241 | 1948 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1949 | return ptr; |
1950 | } | |
1951 | ||
1952 | static unw_rec_list * | |
1953 | output_pfs_sprel (offset) | |
1954 | unsigned int offset; | |
1955 | { | |
1956 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
ba825241 | 1957 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1958 | return ptr; |
1959 | } | |
1960 | ||
1961 | static unw_rec_list * | |
1962 | output_preds_when () | |
1963 | { | |
1964 | unw_rec_list *ptr = alloc_record (preds_when); | |
1965 | return ptr; | |
1966 | } | |
1967 | ||
1968 | static unw_rec_list * | |
1969 | output_preds_gr (gr) | |
1970 | unsigned int gr; | |
1971 | { | |
1972 | unw_rec_list *ptr = alloc_record (preds_gr); | |
ba825241 | 1973 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
1974 | return ptr; |
1975 | } | |
1976 | ||
1977 | static unw_rec_list * | |
1978 | output_preds_psprel (offset) | |
1979 | unsigned int offset; | |
1980 | { | |
1981 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
ba825241 | 1982 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1983 | return ptr; |
1984 | } | |
1985 | ||
1986 | static unw_rec_list * | |
1987 | output_preds_sprel (offset) | |
1988 | unsigned int offset; | |
1989 | { | |
1990 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
ba825241 | 1991 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
1992 | return ptr; |
1993 | } | |
1994 | ||
1995 | static unw_rec_list * | |
1996 | output_fr_mem (mask) | |
1997 | unsigned int mask; | |
1998 | { | |
1999 | unw_rec_list *ptr = alloc_record (fr_mem); | |
ba825241 JB |
2000 | unw_rec_list *cur = ptr; |
2001 | ||
2002 | ptr->r.record.p.frmask = mask; | |
2003 | unwind.pending_saves = &ptr->r.record.p; | |
2004 | for (;;) | |
2005 | { | |
2006 | unw_rec_list *prev = cur; | |
2007 | ||
2008 | /* Clear least significant set bit. */ | |
2009 | mask &= ~(mask & (~mask + 1)); | |
2010 | if (!mask) | |
2011 | return ptr; | |
2012 | cur = alloc_record (fr_mem); | |
2013 | cur->r.record.p.frmask = mask; | |
2014 | /* Retain only least significant bit. */ | |
2015 | prev->r.record.p.frmask ^= mask; | |
2016 | prev->r.record.p.next = cur; | |
2017 | } | |
800eeca4 JW |
2018 | } |
2019 | ||
2020 | static unw_rec_list * | |
2021 | output_frgr_mem (gr_mask, fr_mask) | |
2022 | unsigned int gr_mask; | |
2023 | unsigned int fr_mask; | |
2024 | { | |
2025 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
ba825241 JB |
2026 | unw_rec_list *cur = ptr; |
2027 | ||
2028 | unwind.pending_saves = &cur->r.record.p; | |
2029 | cur->r.record.p.frmask = fr_mask; | |
2030 | while (fr_mask) | |
2031 | { | |
2032 | unw_rec_list *prev = cur; | |
2033 | ||
2034 | /* Clear least significant set bit. */ | |
2035 | fr_mask &= ~(fr_mask & (~fr_mask + 1)); | |
2036 | if (!gr_mask && !fr_mask) | |
2037 | return ptr; | |
2038 | cur = alloc_record (frgr_mem); | |
2039 | cur->r.record.p.frmask = fr_mask; | |
2040 | /* Retain only least significant bit. */ | |
2041 | prev->r.record.p.frmask ^= fr_mask; | |
2042 | prev->r.record.p.next = cur; | |
2043 | } | |
2044 | cur->r.record.p.grmask = gr_mask; | |
2045 | for (;;) | |
2046 | { | |
2047 | unw_rec_list *prev = cur; | |
2048 | ||
2049 | /* Clear least significant set bit. */ | |
2050 | gr_mask &= ~(gr_mask & (~gr_mask + 1)); | |
2051 | if (!gr_mask) | |
2052 | return ptr; | |
2053 | cur = alloc_record (frgr_mem); | |
2054 | cur->r.record.p.grmask = gr_mask; | |
2055 | /* Retain only least significant bit. */ | |
2056 | prev->r.record.p.grmask ^= gr_mask; | |
2057 | prev->r.record.p.next = cur; | |
2058 | } | |
800eeca4 JW |
2059 | } |
2060 | ||
2061 | static unw_rec_list * | |
2062 | output_gr_gr (mask, reg) | |
2063 | unsigned int mask; | |
2064 | unsigned int reg; | |
2065 | { | |
2066 | unw_rec_list *ptr = alloc_record (gr_gr); | |
ba825241 JB |
2067 | unw_rec_list *cur = ptr; |
2068 | ||
800eeca4 | 2069 | ptr->r.record.p.grmask = mask; |
ba825241 JB |
2070 | ptr->r.record.p.r.gr = reg; |
2071 | unwind.pending_saves = &ptr->r.record.p; | |
2072 | for (;;) | |
2073 | { | |
2074 | unw_rec_list *prev = cur; | |
2075 | ||
2076 | /* Clear least significant set bit. */ | |
2077 | mask &= ~(mask & (~mask + 1)); | |
2078 | if (!mask) | |
2079 | return ptr; | |
2080 | cur = alloc_record (gr_gr); | |
2081 | cur->r.record.p.grmask = mask; | |
2082 | /* Indicate this record shouldn't be output. */ | |
2083 | cur->r.record.p.r.gr = REG_NUM; | |
2084 | /* Retain only least significant bit. */ | |
2085 | prev->r.record.p.grmask ^= mask; | |
2086 | prev->r.record.p.next = cur; | |
2087 | } | |
800eeca4 JW |
2088 | } |
2089 | ||
2090 | static unw_rec_list * | |
2091 | output_gr_mem (mask) | |
2092 | unsigned int mask; | |
2093 | { | |
2094 | unw_rec_list *ptr = alloc_record (gr_mem); | |
ba825241 JB |
2095 | unw_rec_list *cur = ptr; |
2096 | ||
2097 | ptr->r.record.p.grmask = mask; | |
2098 | unwind.pending_saves = &ptr->r.record.p; | |
2099 | for (;;) | |
2100 | { | |
2101 | unw_rec_list *prev = cur; | |
2102 | ||
2103 | /* Clear least significant set bit. */ | |
2104 | mask &= ~(mask & (~mask + 1)); | |
2105 | if (!mask) | |
2106 | return ptr; | |
2107 | cur = alloc_record (gr_mem); | |
2108 | cur->r.record.p.grmask = mask; | |
2109 | /* Retain only least significant bit. */ | |
2110 | prev->r.record.p.grmask ^= mask; | |
2111 | prev->r.record.p.next = cur; | |
2112 | } | |
800eeca4 JW |
2113 | } |
2114 | ||
2115 | static unw_rec_list * | |
2116 | output_br_mem (unsigned int mask) | |
2117 | { | |
2118 | unw_rec_list *ptr = alloc_record (br_mem); | |
ba825241 JB |
2119 | unw_rec_list *cur = ptr; |
2120 | ||
800eeca4 | 2121 | ptr->r.record.p.brmask = mask; |
ba825241 JB |
2122 | unwind.pending_saves = &ptr->r.record.p; |
2123 | for (;;) | |
2124 | { | |
2125 | unw_rec_list *prev = cur; | |
2126 | ||
2127 | /* Clear least significant set bit. */ | |
2128 | mask &= ~(mask & (~mask + 1)); | |
2129 | if (!mask) | |
2130 | return ptr; | |
2131 | cur = alloc_record (br_mem); | |
2132 | cur->r.record.p.brmask = mask; | |
2133 | /* Retain only least significant bit. */ | |
2134 | prev->r.record.p.brmask ^= mask; | |
2135 | prev->r.record.p.next = cur; | |
2136 | } | |
800eeca4 JW |
2137 | } |
2138 | ||
2139 | static unw_rec_list * | |
ba825241 JB |
2140 | output_br_gr (mask, reg) |
2141 | unsigned int mask; | |
800eeca4 JW |
2142 | unsigned int reg; |
2143 | { | |
2144 | unw_rec_list *ptr = alloc_record (br_gr); | |
ba825241 JB |
2145 | unw_rec_list *cur = ptr; |
2146 | ||
2147 | ptr->r.record.p.brmask = mask; | |
2148 | ptr->r.record.p.r.gr = reg; | |
2149 | unwind.pending_saves = &ptr->r.record.p; | |
2150 | for (;;) | |
2151 | { | |
2152 | unw_rec_list *prev = cur; | |
2153 | ||
2154 | /* Clear least significant set bit. */ | |
2155 | mask &= ~(mask & (~mask + 1)); | |
2156 | if (!mask) | |
2157 | return ptr; | |
2158 | cur = alloc_record (br_gr); | |
2159 | cur->r.record.p.brmask = mask; | |
2160 | /* Indicate this record shouldn't be output. */ | |
2161 | cur->r.record.p.r.gr = REG_NUM; | |
2162 | /* Retain only least significant bit. */ | |
2163 | prev->r.record.p.brmask ^= mask; | |
2164 | prev->r.record.p.next = cur; | |
2165 | } | |
800eeca4 JW |
2166 | } |
2167 | ||
2168 | static unw_rec_list * | |
2169 | output_spill_base (offset) | |
2170 | unsigned int offset; | |
2171 | { | |
2172 | unw_rec_list *ptr = alloc_record (spill_base); | |
ba825241 | 2173 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2174 | return ptr; |
2175 | } | |
2176 | ||
2177 | static unw_rec_list * | |
2178 | output_unat_when () | |
2179 | { | |
2180 | unw_rec_list *ptr = alloc_record (unat_when); | |
2181 | return ptr; | |
2182 | } | |
2183 | ||
2184 | static unw_rec_list * | |
2185 | output_unat_gr (gr) | |
2186 | unsigned int gr; | |
2187 | { | |
2188 | unw_rec_list *ptr = alloc_record (unat_gr); | |
ba825241 | 2189 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2190 | return ptr; |
2191 | } | |
2192 | ||
2193 | static unw_rec_list * | |
2194 | output_unat_psprel (offset) | |
2195 | unsigned int offset; | |
2196 | { | |
2197 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
ba825241 | 2198 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2199 | return ptr; |
2200 | } | |
2201 | ||
2202 | static unw_rec_list * | |
2203 | output_unat_sprel (offset) | |
2204 | unsigned int offset; | |
2205 | { | |
2206 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
ba825241 | 2207 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2208 | return ptr; |
2209 | } | |
2210 | ||
2211 | static unw_rec_list * | |
2212 | output_lc_when () | |
2213 | { | |
2214 | unw_rec_list *ptr = alloc_record (lc_when); | |
2215 | return ptr; | |
2216 | } | |
2217 | ||
2218 | static unw_rec_list * | |
2219 | output_lc_gr (gr) | |
2220 | unsigned int gr; | |
2221 | { | |
2222 | unw_rec_list *ptr = alloc_record (lc_gr); | |
ba825241 | 2223 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2224 | return ptr; |
2225 | } | |
2226 | ||
2227 | static unw_rec_list * | |
2228 | output_lc_psprel (offset) | |
2229 | unsigned int offset; | |
2230 | { | |
2231 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
ba825241 | 2232 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2233 | return ptr; |
2234 | } | |
2235 | ||
2236 | static unw_rec_list * | |
2237 | output_lc_sprel (offset) | |
2238 | unsigned int offset; | |
2239 | { | |
2240 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
ba825241 | 2241 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2242 | return ptr; |
2243 | } | |
2244 | ||
2245 | static unw_rec_list * | |
2246 | output_fpsr_when () | |
2247 | { | |
2248 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2249 | return ptr; | |
2250 | } | |
2251 | ||
2252 | static unw_rec_list * | |
2253 | output_fpsr_gr (gr) | |
2254 | unsigned int gr; | |
2255 | { | |
2256 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
ba825241 | 2257 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2258 | return ptr; |
2259 | } | |
2260 | ||
2261 | static unw_rec_list * | |
2262 | output_fpsr_psprel (offset) | |
2263 | unsigned int offset; | |
2264 | { | |
2265 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
ba825241 | 2266 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2267 | return ptr; |
2268 | } | |
2269 | ||
2270 | static unw_rec_list * | |
2271 | output_fpsr_sprel (offset) | |
2272 | unsigned int offset; | |
2273 | { | |
2274 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
ba825241 | 2275 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2276 | return ptr; |
2277 | } | |
2278 | ||
2279 | static unw_rec_list * | |
2280 | output_priunat_when_gr () | |
2281 | { | |
2282 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2283 | return ptr; | |
2284 | } | |
2285 | ||
2286 | static unw_rec_list * | |
2287 | output_priunat_when_mem () | |
2288 | { | |
2289 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2290 | return ptr; | |
2291 | } | |
2292 | ||
2293 | static unw_rec_list * | |
2294 | output_priunat_gr (gr) | |
2295 | unsigned int gr; | |
2296 | { | |
2297 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
ba825241 | 2298 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2299 | return ptr; |
2300 | } | |
2301 | ||
2302 | static unw_rec_list * | |
2303 | output_priunat_psprel (offset) | |
2304 | unsigned int offset; | |
2305 | { | |
2306 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
ba825241 | 2307 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2308 | return ptr; |
2309 | } | |
2310 | ||
2311 | static unw_rec_list * | |
2312 | output_priunat_sprel (offset) | |
2313 | unsigned int offset; | |
2314 | { | |
2315 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
ba825241 | 2316 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2317 | return ptr; |
2318 | } | |
2319 | ||
2320 | static unw_rec_list * | |
2321 | output_bsp_when () | |
2322 | { | |
2323 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2324 | return ptr; | |
2325 | } | |
2326 | ||
2327 | static unw_rec_list * | |
2328 | output_bsp_gr (gr) | |
2329 | unsigned int gr; | |
2330 | { | |
2331 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
ba825241 | 2332 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2333 | return ptr; |
2334 | } | |
2335 | ||
2336 | static unw_rec_list * | |
2337 | output_bsp_psprel (offset) | |
2338 | unsigned int offset; | |
2339 | { | |
2340 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
ba825241 | 2341 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2342 | return ptr; |
2343 | } | |
2344 | ||
2345 | static unw_rec_list * | |
2346 | output_bsp_sprel (offset) | |
2347 | unsigned int offset; | |
2348 | { | |
2349 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
ba825241 | 2350 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2351 | return ptr; |
2352 | } | |
2353 | ||
2354 | static unw_rec_list * | |
2355 | output_bspstore_when () | |
2356 | { | |
2357 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2358 | return ptr; | |
2359 | } | |
2360 | ||
2361 | static unw_rec_list * | |
2362 | output_bspstore_gr (gr) | |
2363 | unsigned int gr; | |
2364 | { | |
2365 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
ba825241 | 2366 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2367 | return ptr; |
2368 | } | |
2369 | ||
2370 | static unw_rec_list * | |
2371 | output_bspstore_psprel (offset) | |
2372 | unsigned int offset; | |
2373 | { | |
2374 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
ba825241 | 2375 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2376 | return ptr; |
2377 | } | |
2378 | ||
2379 | static unw_rec_list * | |
2380 | output_bspstore_sprel (offset) | |
2381 | unsigned int offset; | |
2382 | { | |
2383 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
ba825241 | 2384 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2385 | return ptr; |
2386 | } | |
2387 | ||
2388 | static unw_rec_list * | |
2389 | output_rnat_when () | |
2390 | { | |
2391 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2392 | return ptr; | |
2393 | } | |
2394 | ||
2395 | static unw_rec_list * | |
2396 | output_rnat_gr (gr) | |
2397 | unsigned int gr; | |
2398 | { | |
2399 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
ba825241 | 2400 | ptr->r.record.p.r.gr = gr; |
800eeca4 JW |
2401 | return ptr; |
2402 | } | |
2403 | ||
2404 | static unw_rec_list * | |
2405 | output_rnat_psprel (offset) | |
2406 | unsigned int offset; | |
2407 | { | |
2408 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
ba825241 | 2409 | ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2410 | return ptr; |
2411 | } | |
2412 | ||
2413 | static unw_rec_list * | |
2414 | output_rnat_sprel (offset) | |
2415 | unsigned int offset; | |
2416 | { | |
2417 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
ba825241 | 2418 | ptr->r.record.p.off.sp = offset / 4; |
800eeca4 JW |
2419 | return ptr; |
2420 | } | |
2421 | ||
2422 | static unw_rec_list * | |
e0c9811a JW |
2423 | output_unwabi (abi, context) |
2424 | unsigned long abi; | |
2425 | unsigned long context; | |
800eeca4 | 2426 | { |
e0c9811a JW |
2427 | unw_rec_list *ptr = alloc_record (unwabi); |
2428 | ptr->r.record.p.abi = abi; | |
2429 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2430 | return ptr; |
2431 | } | |
2432 | ||
2433 | static unw_rec_list * | |
e0c9811a | 2434 | output_epilogue (unsigned long ecount) |
800eeca4 | 2435 | { |
e0c9811a JW |
2436 | unw_rec_list *ptr = alloc_record (epilogue); |
2437 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2438 | return ptr; |
2439 | } | |
2440 | ||
2441 | static unw_rec_list * | |
e0c9811a | 2442 | output_label_state (unsigned long label) |
800eeca4 | 2443 | { |
e0c9811a JW |
2444 | unw_rec_list *ptr = alloc_record (label_state); |
2445 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2446 | return ptr; |
2447 | } | |
2448 | ||
2449 | static unw_rec_list * | |
e0c9811a JW |
2450 | output_copy_state (unsigned long label) |
2451 | { | |
2452 | unw_rec_list *ptr = alloc_record (copy_state); | |
2453 | ptr->r.record.b.label = label; | |
2454 | return ptr; | |
2455 | } | |
2456 | ||
2457 | static unw_rec_list * | |
e4e8248d | 2458 | output_spill_psprel (ab, reg, offset, predicate) |
e0c9811a | 2459 | unsigned int ab; |
800eeca4 JW |
2460 | unsigned int reg; |
2461 | unsigned int offset; | |
2462 | unsigned int predicate; | |
2463 | { | |
e4e8248d | 2464 | unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); |
e0c9811a | 2465 | ptr->r.record.x.ab = ab; |
800eeca4 | 2466 | ptr->r.record.x.reg = reg; |
ba825241 | 2467 | ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2468 | ptr->r.record.x.qp = predicate; |
2469 | return ptr; | |
2470 | } | |
2471 | ||
2472 | static unw_rec_list * | |
e4e8248d | 2473 | output_spill_sprel (ab, reg, offset, predicate) |
e0c9811a | 2474 | unsigned int ab; |
800eeca4 JW |
2475 | unsigned int reg; |
2476 | unsigned int offset; | |
2477 | unsigned int predicate; | |
2478 | { | |
e4e8248d | 2479 | unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); |
e0c9811a | 2480 | ptr->r.record.x.ab = ab; |
800eeca4 | 2481 | ptr->r.record.x.reg = reg; |
ba825241 | 2482 | ptr->r.record.x.where.spoff = offset / 4; |
800eeca4 JW |
2483 | ptr->r.record.x.qp = predicate; |
2484 | return ptr; | |
2485 | } | |
2486 | ||
2487 | static unw_rec_list * | |
e4e8248d | 2488 | output_spill_reg (ab, reg, targ_reg, xy, predicate) |
e0c9811a | 2489 | unsigned int ab; |
800eeca4 JW |
2490 | unsigned int reg; |
2491 | unsigned int targ_reg; | |
2492 | unsigned int xy; | |
2493 | unsigned int predicate; | |
2494 | { | |
e4e8248d | 2495 | unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); |
e0c9811a | 2496 | ptr->r.record.x.ab = ab; |
800eeca4 | 2497 | ptr->r.record.x.reg = reg; |
ba825241 | 2498 | ptr->r.record.x.where.reg = targ_reg; |
800eeca4 JW |
2499 | ptr->r.record.x.xy = xy; |
2500 | ptr->r.record.x.qp = predicate; | |
2501 | return ptr; | |
2502 | } | |
2503 | ||
197865e8 | 2504 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2505 | specified function. */ |
542d6675 | 2506 | |
800eeca4 JW |
2507 | static void |
2508 | process_one_record (ptr, f) | |
2509 | unw_rec_list *ptr; | |
2510 | vbyte_func f; | |
2511 | { | |
ba825241 | 2512 | unsigned int fr_mask, gr_mask; |
e0c9811a | 2513 | |
197865e8 | 2514 | switch (ptr->r.type) |
800eeca4 | 2515 | { |
5738bc24 JW |
2516 | /* This is a dummy record that takes up no space in the output. */ |
2517 | case endp: | |
2518 | break; | |
2519 | ||
542d6675 KH |
2520 | case gr_mem: |
2521 | case fr_mem: | |
2522 | case br_mem: | |
2523 | case frgr_mem: | |
2524 | /* These are taken care of by prologue/prologue_gr. */ | |
2525 | break; | |
e0c9811a | 2526 | |
542d6675 KH |
2527 | case prologue_gr: |
2528 | case prologue: | |
2529 | if (ptr->r.type == prologue_gr) | |
2530 | output_R2_format (f, ptr->r.record.r.grmask, | |
2531 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2532 | else | |
800eeca4 | 2533 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2534 | |
2535 | /* Output descriptor(s) for union of register spills (if any). */ | |
2536 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2537 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2538 | if (fr_mask) | |
2539 | { | |
2540 | if ((fr_mask & ~0xfUL) == 0) | |
2541 | output_P6_format (f, fr_mem, fr_mask); | |
2542 | else | |
2543 | { | |
2544 | output_P5_format (f, gr_mask, fr_mask); | |
2545 | gr_mask = 0; | |
2546 | } | |
2547 | } | |
2548 | if (gr_mask) | |
2549 | output_P6_format (f, gr_mem, gr_mask); | |
2550 | if (ptr->r.record.r.mask.br_mem) | |
2551 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2552 | ||
2553 | /* output imask descriptor if necessary: */ | |
2554 | if (ptr->r.record.r.mask.i) | |
2555 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2556 | ptr->r.record.r.imask_size); | |
2557 | break; | |
2558 | ||
2559 | case body: | |
2560 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2561 | break; | |
2562 | case mem_stack_f: | |
2563 | case mem_stack_v: | |
2564 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2565 | ptr->r.record.p.size); | |
2566 | break; | |
2567 | case psp_gr: | |
2568 | case rp_gr: | |
2569 | case pfs_gr: | |
2570 | case preds_gr: | |
2571 | case unat_gr: | |
2572 | case lc_gr: | |
2573 | case fpsr_gr: | |
2574 | case priunat_gr: | |
2575 | case bsp_gr: | |
2576 | case bspstore_gr: | |
2577 | case rnat_gr: | |
ba825241 | 2578 | output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); |
542d6675 KH |
2579 | break; |
2580 | case rp_br: | |
ba825241 | 2581 | output_P3_format (f, rp_br, ptr->r.record.p.r.br); |
542d6675 KH |
2582 | break; |
2583 | case psp_sprel: | |
ba825241 | 2584 | output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); |
542d6675 KH |
2585 | break; |
2586 | case rp_when: | |
2587 | case pfs_when: | |
2588 | case preds_when: | |
2589 | case unat_when: | |
2590 | case lc_when: | |
2591 | case fpsr_when: | |
2592 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2593 | break; | |
2594 | case rp_psprel: | |
2595 | case pfs_psprel: | |
2596 | case preds_psprel: | |
2597 | case unat_psprel: | |
2598 | case lc_psprel: | |
2599 | case fpsr_psprel: | |
2600 | case spill_base: | |
ba825241 | 2601 | output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); |
542d6675 KH |
2602 | break; |
2603 | case rp_sprel: | |
2604 | case pfs_sprel: | |
2605 | case preds_sprel: | |
2606 | case unat_sprel: | |
2607 | case lc_sprel: | |
2608 | case fpsr_sprel: | |
2609 | case priunat_sprel: | |
2610 | case bsp_sprel: | |
2611 | case bspstore_sprel: | |
2612 | case rnat_sprel: | |
ba825241 | 2613 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); |
542d6675 KH |
2614 | break; |
2615 | case gr_gr: | |
ba825241 JB |
2616 | if (ptr->r.record.p.r.gr < REG_NUM) |
2617 | { | |
2618 | const unw_rec_list *cur = ptr; | |
2619 | ||
2620 | gr_mask = cur->r.record.p.grmask; | |
2621 | while ((cur = cur->r.record.p.next) != NULL) | |
2622 | gr_mask |= cur->r.record.p.grmask; | |
2623 | output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2624 | } | |
542d6675 KH |
2625 | break; |
2626 | case br_gr: | |
ba825241 JB |
2627 | if (ptr->r.record.p.r.gr < REG_NUM) |
2628 | { | |
2629 | const unw_rec_list *cur = ptr; | |
2630 | ||
2631 | gr_mask = cur->r.record.p.brmask; | |
2632 | while ((cur = cur->r.record.p.next) != NULL) | |
2633 | gr_mask |= cur->r.record.p.brmask; | |
2634 | output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); | |
2635 | } | |
542d6675 KH |
2636 | break; |
2637 | case spill_mask: | |
2638 | as_bad ("spill_mask record unimplemented."); | |
2639 | break; | |
2640 | case priunat_when_gr: | |
2641 | case priunat_when_mem: | |
2642 | case bsp_when: | |
2643 | case bspstore_when: | |
2644 | case rnat_when: | |
2645 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2646 | break; | |
2647 | case priunat_psprel: | |
2648 | case bsp_psprel: | |
2649 | case bspstore_psprel: | |
2650 | case rnat_psprel: | |
ba825241 | 2651 | output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); |
542d6675 KH |
2652 | break; |
2653 | case unwabi: | |
2654 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2655 | break; | |
2656 | case epilogue: | |
2657 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2658 | break; | |
2659 | case label_state: | |
2660 | case copy_state: | |
2661 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2662 | break; | |
2663 | case spill_psprel: | |
2664 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2665 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2666 | ptr->r.record.x.where.pspoff); |
542d6675 KH |
2667 | break; |
2668 | case spill_sprel: | |
2669 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2670 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
ba825241 | 2671 | ptr->r.record.x.where.spoff); |
542d6675 KH |
2672 | break; |
2673 | case spill_reg: | |
2674 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2675 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
ba825241 | 2676 | ptr->r.record.x.where.reg, ptr->r.record.x.t); |
542d6675 KH |
2677 | break; |
2678 | case spill_psprel_p: | |
2679 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2680 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2681 | ptr->r.record.x.t, ptr->r.record.x.where.pspoff); |
542d6675 KH |
2682 | break; |
2683 | case spill_sprel_p: | |
2684 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2685 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
ba825241 | 2686 | ptr->r.record.x.t, ptr->r.record.x.where.spoff); |
542d6675 KH |
2687 | break; |
2688 | case spill_reg_p: | |
2689 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2690 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
ba825241 | 2691 | ptr->r.record.x.xy, ptr->r.record.x.where.reg, |
542d6675 KH |
2692 | ptr->r.record.x.t); |
2693 | break; | |
2694 | default: | |
2695 | as_bad ("record_type_not_valid"); | |
2696 | break; | |
800eeca4 JW |
2697 | } |
2698 | } | |
2699 | ||
197865e8 | 2700 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2701 | the specified function. */ |
2702 | static void | |
2703 | process_unw_records (list, f) | |
2704 | unw_rec_list *list; | |
2705 | vbyte_func f; | |
2706 | { | |
2707 | unw_rec_list *ptr; | |
2708 | for (ptr = list; ptr; ptr = ptr->next) | |
2709 | process_one_record (ptr, f); | |
2710 | } | |
2711 | ||
2712 | /* Determine the size of a record list in bytes. */ | |
2713 | static int | |
2714 | calc_record_size (list) | |
2715 | unw_rec_list *list; | |
2716 | { | |
2717 | vbyte_count = 0; | |
2718 | process_unw_records (list, count_output); | |
2719 | return vbyte_count; | |
2720 | } | |
2721 | ||
e4e8248d JB |
2722 | /* Return the number of bits set in the input value. |
2723 | Perhaps this has a better place... */ | |
2724 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) | |
2725 | # define popcount __builtin_popcount | |
2726 | #else | |
2727 | static int | |
2728 | popcount (unsigned x) | |
2729 | { | |
2730 | static const unsigned char popcnt[16] = | |
2731 | { | |
2732 | 0, 1, 1, 2, | |
2733 | 1, 2, 2, 3, | |
2734 | 1, 2, 2, 3, | |
2735 | 2, 3, 3, 4 | |
2736 | }; | |
2737 | ||
2738 | if (x < NELEMS (popcnt)) | |
2739 | return popcnt[x]; | |
2740 | return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); | |
2741 | } | |
2742 | #endif | |
2743 | ||
e0c9811a JW |
2744 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2745 | of type TYPE are saved starting at instruction with index T. If N | |
2746 | bits are set in REGMASK, it is assumed that instructions T through | |
2747 | T+N-1 save these registers. | |
2748 | ||
2749 | TYPE values: | |
2750 | 0: no save | |
2751 | 1: instruction saves next fp reg | |
2752 | 2: instruction saves next general reg | |
2753 | 3: instruction saves next branch reg */ | |
2754 | static void | |
2755 | set_imask (region, regmask, t, type) | |
2756 | unw_rec_list *region; | |
2757 | unsigned long regmask; | |
2758 | unsigned long t; | |
2759 | unsigned int type; | |
2760 | { | |
2761 | unsigned char *imask; | |
2762 | unsigned long imask_size; | |
2763 | unsigned int i; | |
2764 | int pos; | |
2765 | ||
2766 | imask = region->r.record.r.mask.i; | |
2767 | imask_size = region->r.record.r.imask_size; | |
2768 | if (!imask) | |
2769 | { | |
542d6675 | 2770 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2771 | imask = xmalloc (imask_size); |
2772 | memset (imask, 0, imask_size); | |
2773 | ||
2774 | region->r.record.r.imask_size = imask_size; | |
2775 | region->r.record.r.mask.i = imask; | |
2776 | } | |
2777 | ||
542d6675 KH |
2778 | i = (t / 4) + 1; |
2779 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2780 | while (regmask) |
2781 | { | |
2782 | if (i >= imask_size) | |
2783 | { | |
2784 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2785 | return; | |
2786 | } | |
2787 | ||
2788 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2789 | |
e0c9811a JW |
2790 | regmask &= (regmask - 1); |
2791 | pos -= 2; | |
2792 | if (pos < 0) | |
2793 | { | |
2794 | pos = 0; | |
2795 | ++i; | |
2796 | } | |
2797 | } | |
2798 | } | |
2799 | ||
f5a30c2e JW |
2800 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2801 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2802 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2803 | for frag sizes. */ | |
f5a30c2e | 2804 | |
e0c9811a | 2805 | unsigned long |
b5e0fabd | 2806 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2807 | unsigned long slot_addr; |
2808 | fragS *slot_frag; | |
2809 | unsigned long first_addr; | |
2810 | fragS *first_frag; | |
b5e0fabd | 2811 | int before_relax; |
e0c9811a | 2812 | { |
f5a30c2e JW |
2813 | unsigned long index = 0; |
2814 | ||
2815 | /* First time we are called, the initial address and frag are invalid. */ | |
2816 | if (first_addr == 0) | |
2817 | return 0; | |
2818 | ||
2819 | /* If the two addresses are in different frags, then we need to add in | |
2820 | the remaining size of this frag, and then the entire size of intermediate | |
2821 | frags. */ | |
4dddc1d1 | 2822 | while (slot_frag != first_frag) |
f5a30c2e JW |
2823 | { |
2824 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2825 | ||
b5e0fabd | 2826 | if (! before_relax) |
73f20958 | 2827 | { |
b5e0fabd JW |
2828 | /* We can get the final addresses only during and after |
2829 | relaxation. */ | |
73f20958 L |
2830 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2831 | index += 3 * ((first_frag->fr_next->fr_address | |
2832 | - first_frag->fr_address | |
2833 | - first_frag->fr_fix) >> 4); | |
2834 | } | |
2835 | else | |
2836 | /* We don't know what the final addresses will be. We try our | |
2837 | best to estimate. */ | |
2838 | switch (first_frag->fr_type) | |
2839 | { | |
2840 | default: | |
2841 | break; | |
2842 | ||
2843 | case rs_space: | |
2844 | as_fatal ("only constant space allocation is supported"); | |
2845 | break; | |
2846 | ||
2847 | case rs_align: | |
2848 | case rs_align_code: | |
2849 | case rs_align_test: | |
2850 | /* Take alignment into account. Assume the worst case | |
2851 | before relaxation. */ | |
2852 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2853 | break; | |
2854 | ||
2855 | case rs_org: | |
2856 | if (first_frag->fr_symbol) | |
2857 | { | |
2858 | as_fatal ("only constant offsets are supported"); | |
2859 | break; | |
2860 | } | |
2861 | case rs_fill: | |
2862 | index += 3 * (first_frag->fr_offset >> 4); | |
2863 | break; | |
2864 | } | |
2865 | ||
f5a30c2e JW |
2866 | /* Add in the full size of the frag converted to instruction slots. */ |
2867 | index += 3 * (first_frag->fr_fix >> 4); | |
2868 | /* Subtract away the initial part before first_addr. */ | |
2869 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2870 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2871 | |
f5a30c2e JW |
2872 | /* Move to the beginning of the next frag. */ |
2873 | first_frag = first_frag->fr_next; | |
2874 | first_addr = (unsigned long) &first_frag->fr_literal; | |
4dddc1d1 JW |
2875 | |
2876 | /* This can happen if there is section switching in the middle of a | |
2877 | function, causing the frag chain for the function to be broken. */ | |
2878 | if (first_frag == NULL) | |
2879 | { | |
2880 | /* We get six warnings for one problem, because of the loop in | |
2881 | fixup_unw_records, and because fixup_unw_records is called 3 | |
2882 | times: once before creating the variant frag, once to estimate | |
2883 | its size, and once to relax it. This is unreasonable, so we use | |
2884 | a static var to make sure we only emit the warning once. */ | |
2885 | static int warned = 0; | |
2886 | ||
2887 | if (!warned) | |
2888 | { | |
2889 | as_warn ("Corrupted unwind info due to unsupported section switching"); | |
2890 | warned = 1; | |
2891 | } | |
2892 | ||
2893 | return index; | |
2894 | } | |
f5a30c2e JW |
2895 | } |
2896 | ||
2897 | /* Add in the used part of the last frag. */ | |
2898 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2899 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2900 | return index; | |
2901 | } | |
4a1805b1 | 2902 | |
91a2ae2a RH |
2903 | /* Optimize unwind record directives. */ |
2904 | ||
2905 | static unw_rec_list * | |
2906 | optimize_unw_records (list) | |
2907 | unw_rec_list *list; | |
2908 | { | |
2909 | if (!list) | |
2910 | return NULL; | |
2911 | ||
2912 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2913 | by ".body", then we can optimize the unwind directives away. */ | |
2914 | if (list->r.type == prologue | |
5738bc24 JW |
2915 | && (list->next->r.type == endp |
2916 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2917 | return NULL; |
2918 | ||
2919 | return list; | |
2920 | } | |
2921 | ||
800eeca4 JW |
2922 | /* Given a complete record list, process any records which have |
2923 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2924 | this has been run, all necessary information should be available |
800eeca4 | 2925 | within each record to generate an image. */ |
542d6675 | 2926 | |
800eeca4 | 2927 | static void |
b5e0fabd | 2928 | fixup_unw_records (list, before_relax) |
800eeca4 | 2929 | unw_rec_list *list; |
b5e0fabd | 2930 | int before_relax; |
800eeca4 | 2931 | { |
e0c9811a JW |
2932 | unw_rec_list *ptr, *region = 0; |
2933 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2934 | fragS *first_frag = 0; |
e0c9811a | 2935 | |
800eeca4 JW |
2936 | for (ptr = list; ptr; ptr = ptr->next) |
2937 | { | |
2938 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2939 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2940 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2941 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2942 | switch (ptr->r.type) |
2943 | { | |
542d6675 KH |
2944 | case prologue: |
2945 | case prologue_gr: | |
2946 | case body: | |
2947 | { | |
2948 | unw_rec_list *last; | |
5738bc24 JW |
2949 | int size; |
2950 | unsigned long last_addr = 0; | |
2951 | fragS *last_frag = NULL; | |
542d6675 KH |
2952 | |
2953 | first_addr = ptr->slot_number; | |
f5a30c2e | 2954 | first_frag = ptr->slot_frag; |
542d6675 | 2955 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2956 | the function, and determine the size of the region. */ |
542d6675 KH |
2957 | for (last = ptr->next; last != NULL; last = last->next) |
2958 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2959 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2960 | { |
2961 | last_addr = last->slot_number; | |
f5a30c2e | 2962 | last_frag = last->slot_frag; |
542d6675 KH |
2963 | break; |
2964 | } | |
b5e0fabd JW |
2965 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2966 | before_relax); | |
542d6675 | 2967 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2968 | if (ptr->r.type == body) |
2969 | /* End of region. */ | |
2970 | region = 0; | |
2971 | else | |
2972 | region = ptr; | |
e0c9811a | 2973 | break; |
542d6675 KH |
2974 | } |
2975 | case epilogue: | |
ed7af9f9 L |
2976 | if (t < rlen) |
2977 | ptr->r.record.b.t = rlen - 1 - t; | |
2978 | else | |
2979 | /* This happens when a memory-stack-less procedure uses a | |
2980 | ".restore sp" directive at the end of a region to pop | |
2981 | the frame state. */ | |
2982 | ptr->r.record.b.t = 0; | |
542d6675 | 2983 | break; |
e0c9811a | 2984 | |
542d6675 KH |
2985 | case mem_stack_f: |
2986 | case mem_stack_v: | |
2987 | case rp_when: | |
2988 | case pfs_when: | |
2989 | case preds_when: | |
2990 | case unat_when: | |
2991 | case lc_when: | |
2992 | case fpsr_when: | |
2993 | case priunat_when_gr: | |
2994 | case priunat_when_mem: | |
2995 | case bsp_when: | |
2996 | case bspstore_when: | |
2997 | case rnat_when: | |
2998 | ptr->r.record.p.t = t; | |
2999 | break; | |
e0c9811a | 3000 | |
542d6675 KH |
3001 | case spill_reg: |
3002 | case spill_sprel: | |
3003 | case spill_psprel: | |
3004 | case spill_reg_p: | |
3005 | case spill_sprel_p: | |
3006 | case spill_psprel_p: | |
3007 | ptr->r.record.x.t = t; | |
3008 | break; | |
e0c9811a | 3009 | |
542d6675 KH |
3010 | case frgr_mem: |
3011 | if (!region) | |
3012 | { | |
75e09913 | 3013 | as_bad ("frgr_mem record before region record!"); |
542d6675 KH |
3014 | return; |
3015 | } | |
3016 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
3017 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
3018 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
3019 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
3020 | break; | |
3021 | case fr_mem: | |
3022 | if (!region) | |
3023 | { | |
75e09913 | 3024 | as_bad ("fr_mem record before region record!"); |
542d6675 KH |
3025 | return; |
3026 | } | |
ba825241 JB |
3027 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; |
3028 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
542d6675 KH |
3029 | break; |
3030 | case gr_mem: | |
3031 | if (!region) | |
3032 | { | |
75e09913 | 3033 | as_bad ("gr_mem record before region record!"); |
542d6675 KH |
3034 | return; |
3035 | } | |
ba825241 JB |
3036 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; |
3037 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
542d6675 KH |
3038 | break; |
3039 | case br_mem: | |
3040 | if (!region) | |
3041 | { | |
75e09913 | 3042 | as_bad ("br_mem record before region record!"); |
542d6675 KH |
3043 | return; |
3044 | } | |
3045 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
3046 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
3047 | break; | |
e0c9811a | 3048 | |
542d6675 KH |
3049 | case gr_gr: |
3050 | if (!region) | |
3051 | { | |
75e09913 | 3052 | as_bad ("gr_gr record before region record!"); |
542d6675 KH |
3053 | return; |
3054 | } | |
3055 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
3056 | break; | |
3057 | case br_gr: | |
3058 | if (!region) | |
3059 | { | |
75e09913 | 3060 | as_bad ("br_gr record before region record!"); |
542d6675 KH |
3061 | return; |
3062 | } | |
3063 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
3064 | break; | |
e0c9811a | 3065 | |
542d6675 KH |
3066 | default: |
3067 | break; | |
800eeca4 JW |
3068 | } |
3069 | } | |
3070 | } | |
3071 | ||
b5e0fabd JW |
3072 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
3073 | to handle here, which is the unwind info frag. */ | |
3074 | ||
3075 | int | |
3076 | ia64_estimate_size_before_relax (fragS *frag, | |
3077 | asection *segtype ATTRIBUTE_UNUSED) | |
3078 | { | |
3079 | unw_rec_list *list; | |
3080 | int len, size, pad; | |
3081 | ||
3082 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
3083 | list = (unw_rec_list *) frag->fr_opcode; | |
3084 | fixup_unw_records (list, 0); | |
3085 | ||
3086 | len = calc_record_size (list); | |
3087 | /* pad to pointer-size boundary. */ | |
3088 | pad = len % md.pointer_size; | |
3089 | if (pad != 0) | |
3090 | len += md.pointer_size - pad; | |
f7e323d5 JB |
3091 | /* Add 8 for the header. */ |
3092 | size = len + 8; | |
3093 | /* Add a pointer for the personality offset. */ | |
3094 | if (frag->fr_offset) | |
3095 | size += md.pointer_size; | |
b5e0fabd JW |
3096 | |
3097 | /* fr_var carries the max_chars that we created the fragment with. | |
3098 | We must, of course, have allocated enough memory earlier. */ | |
3099 | assert (frag->fr_var >= size); | |
3100 | ||
3101 | return frag->fr_fix + size; | |
3102 | } | |
3103 | ||
73f20958 L |
3104 | /* This function converts a rs_machine_dependent variant frag into a |
3105 | normal fill frag with the unwind image from the the record list. */ | |
3106 | void | |
3107 | ia64_convert_frag (fragS *frag) | |
557debba | 3108 | { |
73f20958 L |
3109 | unw_rec_list *list; |
3110 | int len, size, pad; | |
1cd8ff38 | 3111 | valueT flag_value; |
557debba | 3112 | |
b5e0fabd | 3113 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 3114 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 3115 | fixup_unw_records (list, 0); |
1cd8ff38 | 3116 | |
73f20958 L |
3117 | len = calc_record_size (list); |
3118 | /* pad to pointer-size boundary. */ | |
3119 | pad = len % md.pointer_size; | |
3120 | if (pad != 0) | |
3121 | len += md.pointer_size - pad; | |
f7e323d5 JB |
3122 | /* Add 8 for the header. */ |
3123 | size = len + 8; | |
3124 | /* Add a pointer for the personality offset. */ | |
3125 | if (frag->fr_offset) | |
3126 | size += md.pointer_size; | |
73f20958 L |
3127 | |
3128 | /* fr_var carries the max_chars that we created the fragment with. | |
3129 | We must, of course, have allocated enough memory earlier. */ | |
3130 | assert (frag->fr_var >= size); | |
3131 | ||
3132 | /* Initialize the header area. fr_offset is initialized with | |
3133 | unwind.personality_routine. */ | |
3134 | if (frag->fr_offset) | |
1cd8ff38 NC |
3135 | { |
3136 | if (md.flags & EF_IA_64_ABI64) | |
3137 | flag_value = (bfd_vma) 3 << 32; | |
3138 | else | |
3139 | /* 32-bit unwind info block. */ | |
3140 | flag_value = (bfd_vma) 0x1003 << 32; | |
3141 | } | |
3142 | else | |
3143 | flag_value = 0; | |
557debba | 3144 | |
73f20958 L |
3145 | md_number_to_chars (frag->fr_literal, |
3146 | (((bfd_vma) 1 << 48) /* Version. */ | |
3147 | | flag_value /* U & E handler flags. */ | |
3148 | | (len / md.pointer_size)), /* Length. */ | |
3149 | 8); | |
557debba | 3150 | |
73f20958 L |
3151 | /* Skip the header. */ |
3152 | vbyte_mem_ptr = frag->fr_literal + 8; | |
3153 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
3154 | |
3155 | /* Fill the padding bytes with zeros. */ | |
3156 | if (pad != 0) | |
3157 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
3158 | md.pointer_size - pad); | |
3159 | ||
73f20958 L |
3160 | frag->fr_fix += size; |
3161 | frag->fr_type = rs_fill; | |
3162 | frag->fr_var = 0; | |
3163 | frag->fr_offset = 0; | |
800eeca4 JW |
3164 | } |
3165 | ||
e0c9811a | 3166 | static int |
e4e8248d JB |
3167 | parse_predicate_and_operand (e, qp, po) |
3168 | expressionS * e; | |
3169 | unsigned * qp; | |
3170 | const char * po; | |
3171 | { | |
3172 | int sep = parse_operand (e, ','); | |
3173 | ||
3174 | *qp = e->X_add_number - REG_P; | |
3175 | if (e->X_op != O_register || *qp > 63) | |
3176 | { | |
3177 | as_bad ("First operand to .%s must be a predicate", po); | |
3178 | *qp = 0; | |
3179 | } | |
3180 | else if (*qp == 0) | |
3181 | as_warn ("Pointless use of p0 as first operand to .%s", po); | |
3182 | if (sep == ',') | |
3183 | sep = parse_operand (e, ','); | |
3184 | else | |
3185 | e->X_op = O_absent; | |
3186 | return sep; | |
3187 | } | |
3188 | ||
3189 | static void | |
3190 | convert_expr_to_ab_reg (e, ab, regp, po, n) | |
3191 | const expressionS *e; | |
e0c9811a JW |
3192 | unsigned int *ab; |
3193 | unsigned int *regp; | |
e4e8248d JB |
3194 | const char * po; |
3195 | int n; | |
e0c9811a | 3196 | { |
e4e8248d JB |
3197 | unsigned int reg = e->X_add_number; |
3198 | ||
3199 | *ab = *regp = 0; /* Anything valid is good here. */ | |
e0c9811a JW |
3200 | |
3201 | if (e->X_op != O_register) | |
e4e8248d | 3202 | reg = REG_GR; /* Anything invalid is good here. */ |
e0c9811a | 3203 | |
2434f565 | 3204 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
3205 | { |
3206 | *ab = 0; | |
3207 | *regp = reg - REG_GR; | |
3208 | } | |
2434f565 JW |
3209 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
3210 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
3211 | { |
3212 | *ab = 1; | |
3213 | *regp = reg - REG_FR; | |
3214 | } | |
2434f565 | 3215 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
3216 | { |
3217 | *ab = 2; | |
3218 | *regp = reg - REG_BR; | |
3219 | } | |
3220 | else | |
3221 | { | |
3222 | *ab = 3; | |
3223 | switch (reg) | |
3224 | { | |
3225 | case REG_PR: *regp = 0; break; | |
3226 | case REG_PSP: *regp = 1; break; | |
3227 | case REG_PRIUNAT: *regp = 2; break; | |
3228 | case REG_BR + 0: *regp = 3; break; | |
3229 | case REG_AR + AR_BSP: *regp = 4; break; | |
3230 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
3231 | case REG_AR + AR_RNAT: *regp = 6; break; | |
3232 | case REG_AR + AR_UNAT: *regp = 7; break; | |
3233 | case REG_AR + AR_FPSR: *regp = 8; break; | |
3234 | case REG_AR + AR_PFS: *regp = 9; break; | |
3235 | case REG_AR + AR_LC: *regp = 10; break; | |
3236 | ||
3237 | default: | |
e4e8248d JB |
3238 | as_bad ("Operand %d to .%s must be a preserved register", n, po); |
3239 | break; | |
e0c9811a JW |
3240 | } |
3241 | } | |
197865e8 | 3242 | } |
e0c9811a | 3243 | |
e4e8248d JB |
3244 | static void |
3245 | convert_expr_to_xy_reg (e, xy, regp, po, n) | |
3246 | const expressionS *e; | |
e0c9811a JW |
3247 | unsigned int *xy; |
3248 | unsigned int *regp; | |
e4e8248d JB |
3249 | const char * po; |
3250 | int n; | |
e0c9811a | 3251 | { |
e4e8248d | 3252 | unsigned int reg = e->X_add_number; |
e0c9811a | 3253 | |
e4e8248d | 3254 | *xy = *regp = 0; /* Anything valid is good here. */ |
e0c9811a | 3255 | |
e4e8248d JB |
3256 | if (e->X_op != O_register) |
3257 | reg = REG_GR; /* Anything invalid is good here. */ | |
e0c9811a | 3258 | |
e4e8248d | 3259 | if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) |
e0c9811a JW |
3260 | { |
3261 | *xy = 0; | |
3262 | *regp = reg - REG_GR; | |
3263 | } | |
e4e8248d | 3264 | else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) |
e0c9811a JW |
3265 | { |
3266 | *xy = 1; | |
3267 | *regp = reg - REG_FR; | |
3268 | } | |
2434f565 | 3269 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3270 | { |
3271 | *xy = 2; | |
3272 | *regp = reg - REG_BR; | |
3273 | } | |
3274 | else | |
e4e8248d | 3275 | as_bad ("Operand %d to .%s must be a writable register", n, po); |
197865e8 | 3276 | } |
e0c9811a | 3277 | |
d9201763 L |
3278 | static void |
3279 | dot_align (int arg) | |
3280 | { | |
3281 | /* The current frag is an alignment frag. */ | |
3282 | align_frag = frag_now; | |
3283 | s_align_bytes (arg); | |
3284 | } | |
3285 | ||
800eeca4 JW |
3286 | static void |
3287 | dot_radix (dummy) | |
2434f565 | 3288 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3289 | { |
fa30c84f JB |
3290 | char *radix; |
3291 | int ch; | |
800eeca4 JW |
3292 | |
3293 | SKIP_WHITESPACE (); | |
800eeca4 | 3294 | |
fa30c84f JB |
3295 | if (is_it_end_of_statement ()) |
3296 | return; | |
3297 | radix = input_line_pointer; | |
3298 | ch = get_symbol_end (); | |
3299 | ia64_canonicalize_symbol_name (radix); | |
3300 | if (strcasecmp (radix, "C")) | |
3301 | as_bad ("Radix `%s' unsupported or invalid", radix); | |
3302 | *input_line_pointer = ch; | |
3303 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3304 | } |
3305 | ||
196e8040 JW |
3306 | /* Helper function for .loc directives. If the assembler is not generating |
3307 | line number info, then we need to remember which instructions have a .loc | |
3308 | directive, and only call dwarf2_gen_line_info for those instructions. */ | |
3309 | ||
3310 | static void | |
3311 | dot_loc (int x) | |
3312 | { | |
3313 | CURR_SLOT.loc_directive_seen = 1; | |
3314 | dwarf2_directive_loc (x); | |
3315 | } | |
3316 | ||
800eeca4 JW |
3317 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ |
3318 | static void | |
3319 | dot_special_section (which) | |
3320 | int which; | |
3321 | { | |
3322 | set_section ((char *) special_section_name[which]); | |
3323 | } | |
3324 | ||
07450571 L |
3325 | /* Return -1 for warning and 0 for error. */ |
3326 | ||
3327 | static int | |
970d6792 L |
3328 | unwind_diagnostic (const char * region, const char *directive) |
3329 | { | |
3330 | if (md.unwind_check == unwind_check_warning) | |
07450571 L |
3331 | { |
3332 | as_warn (".%s outside of %s", directive, region); | |
3333 | return -1; | |
3334 | } | |
970d6792 L |
3335 | else |
3336 | { | |
3337 | as_bad (".%s outside of %s", directive, region); | |
3338 | ignore_rest_of_line (); | |
07450571 | 3339 | return 0; |
970d6792 L |
3340 | } |
3341 | } | |
3342 | ||
07450571 L |
3343 | /* Return 1 if a directive is in a procedure, -1 if a directive isn't in |
3344 | a procedure but the unwind directive check is set to warning, 0 if | |
3345 | a directive isn't in a procedure and the unwind directive check is set | |
3346 | to error. */ | |
3347 | ||
75e09913 JB |
3348 | static int |
3349 | in_procedure (const char *directive) | |
3350 | { | |
5656b6b8 | 3351 | if (unwind.proc_pending.sym |
75e09913 JB |
3352 | && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) |
3353 | return 1; | |
07450571 | 3354 | return unwind_diagnostic ("procedure", directive); |
75e09913 JB |
3355 | } |
3356 | ||
07450571 L |
3357 | /* Return 1 if a directive is in a prologue, -1 if a directive isn't in |
3358 | a prologue but the unwind directive check is set to warning, 0 if | |
3359 | a directive isn't in a prologue and the unwind directive check is set | |
3360 | to error. */ | |
3361 | ||
75e09913 JB |
3362 | static int |
3363 | in_prologue (const char *directive) | |
3364 | { | |
07450571 | 3365 | int in = in_procedure (directive); |
ba825241 JB |
3366 | |
3367 | if (in > 0 && !unwind.prologue) | |
3368 | in = unwind_diagnostic ("prologue", directive); | |
3369 | check_pending_save (); | |
3370 | return in; | |
75e09913 JB |
3371 | } |
3372 | ||
07450571 L |
3373 | /* Return 1 if a directive is in a body, -1 if a directive isn't in |
3374 | a body but the unwind directive check is set to warning, 0 if | |
3375 | a directive isn't in a body and the unwind directive check is set | |
3376 | to error. */ | |
3377 | ||
75e09913 JB |
3378 | static int |
3379 | in_body (const char *directive) | |
3380 | { | |
07450571 | 3381 | int in = in_procedure (directive); |
ba825241 JB |
3382 | |
3383 | if (in > 0 && !unwind.body) | |
3384 | in = unwind_diagnostic ("body region", directive); | |
3385 | return in; | |
75e09913 JB |
3386 | } |
3387 | ||
800eeca4 | 3388 | static void |
e4e8248d | 3389 | add_unwind_entry (ptr, sep) |
800eeca4 | 3390 | unw_rec_list *ptr; |
e4e8248d | 3391 | int sep; |
800eeca4 | 3392 | { |
e4e8248d JB |
3393 | if (ptr) |
3394 | { | |
3395 | if (unwind.tail) | |
3396 | unwind.tail->next = ptr; | |
3397 | else | |
3398 | unwind.list = ptr; | |
3399 | unwind.tail = ptr; | |
3400 | ||
3401 | /* The current entry can in fact be a chain of unwind entries. */ | |
3402 | if (unwind.current_entry == NULL) | |
3403 | unwind.current_entry = ptr; | |
3404 | } | |
800eeca4 JW |
3405 | |
3406 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3407 | if (unwind.current_entry == NULL) |
3408 | unwind.current_entry = ptr; | |
e4e8248d JB |
3409 | |
3410 | if (sep == ',') | |
3411 | { | |
3412 | /* Parse a tag permitted for the current directive. */ | |
3413 | int ch; | |
3414 | ||
3415 | SKIP_WHITESPACE (); | |
3416 | ch = get_symbol_end (); | |
3417 | /* FIXME: For now, just issue a warning that this isn't implemented. */ | |
3418 | { | |
3419 | static int warned; | |
3420 | ||
3421 | if (!warned) | |
3422 | { | |
3423 | warned = 1; | |
3424 | as_warn ("Tags on unwind pseudo-ops aren't supported, yet"); | |
3425 | } | |
3426 | } | |
3427 | *input_line_pointer = ch; | |
3428 | } | |
3429 | if (sep != NOT_A_CHAR) | |
3430 | demand_empty_rest_of_line (); | |
800eeca4 JW |
3431 | } |
3432 | ||
197865e8 | 3433 | static void |
800eeca4 | 3434 | dot_fframe (dummy) |
2434f565 | 3435 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3436 | { |
3437 | expressionS e; | |
e4e8248d | 3438 | int sep; |
e0c9811a | 3439 | |
75e09913 JB |
3440 | if (!in_prologue ("fframe")) |
3441 | return; | |
3442 | ||
e4e8248d | 3443 | sep = parse_operand (&e, ','); |
197865e8 | 3444 | |
800eeca4 | 3445 | if (e.X_op != O_constant) |
e4e8248d JB |
3446 | { |
3447 | as_bad ("First operand to .fframe must be a constant"); | |
3448 | e.X_add_number = 0; | |
3449 | } | |
3450 | add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); | |
e0c9811a JW |
3451 | } |
3452 | ||
197865e8 | 3453 | static void |
e0c9811a | 3454 | dot_vframe (dummy) |
2434f565 | 3455 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3456 | { |
3457 | expressionS e; | |
3458 | unsigned reg; | |
e4e8248d | 3459 | int sep; |
e0c9811a | 3460 | |
75e09913 JB |
3461 | if (!in_prologue ("vframe")) |
3462 | return; | |
3463 | ||
e4e8248d | 3464 | sep = parse_operand (&e, ','); |
e0c9811a | 3465 | reg = e.X_add_number - REG_GR; |
e4e8248d | 3466 | if (e.X_op != O_register || reg > 127) |
800eeca4 | 3467 | { |
e4e8248d JB |
3468 | as_bad ("First operand to .vframe must be a general register"); |
3469 | reg = 0; | |
800eeca4 | 3470 | } |
e4e8248d JB |
3471 | add_unwind_entry (output_mem_stack_v (), sep); |
3472 | if (! (unwind.prologue_mask & 2)) | |
3473 | add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); | |
3474 | else if (reg != unwind.prologue_gr | |
3475 | + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) | |
3476 | as_warn ("Operand of .vframe contradicts .prologue"); | |
800eeca4 JW |
3477 | } |
3478 | ||
197865e8 | 3479 | static void |
e4e8248d JB |
3480 | dot_vframesp (psp) |
3481 | int psp; | |
800eeca4 | 3482 | { |
e0c9811a | 3483 | expressionS e; |
e4e8248d | 3484 | int sep; |
e0c9811a | 3485 | |
e4e8248d JB |
3486 | if (psp) |
3487 | as_warn (".vframepsp is meaningless, assuming .vframesp was meant"); | |
e0c9811a | 3488 | |
e4e8248d | 3489 | if (!in_prologue ("vframesp")) |
75e09913 JB |
3490 | return; |
3491 | ||
e4e8248d JB |
3492 | sep = parse_operand (&e, ','); |
3493 | if (e.X_op != O_constant) | |
e0c9811a | 3494 | { |
e4e8248d JB |
3495 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
3496 | e.X_add_number = 0; | |
e0c9811a | 3497 | } |
e4e8248d JB |
3498 | add_unwind_entry (output_mem_stack_v (), sep); |
3499 | add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); | |
800eeca4 JW |
3500 | } |
3501 | ||
197865e8 | 3502 | static void |
800eeca4 | 3503 | dot_save (dummy) |
2434f565 | 3504 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3505 | { |
3506 | expressionS e1, e2; | |
e4e8248d | 3507 | unsigned reg1, reg2; |
800eeca4 | 3508 | int sep; |
800eeca4 | 3509 | |
75e09913 JB |
3510 | if (!in_prologue ("save")) |
3511 | return; | |
3512 | ||
e4e8248d JB |
3513 | sep = parse_operand (&e1, ','); |
3514 | if (sep == ',') | |
3515 | sep = parse_operand (&e2, ','); | |
3516 | else | |
3517 | e2.X_op = O_absent; | |
800eeca4 | 3518 | |
e0c9811a | 3519 | reg1 = e1.X_add_number; |
800eeca4 | 3520 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3521 | if (e1.X_op != O_register) |
800eeca4 | 3522 | { |
e4e8248d JB |
3523 | as_bad ("First operand to .save not a register"); |
3524 | reg1 = REG_PR; /* Anything valid is good here. */ | |
3525 | } | |
3526 | reg2 = e2.X_add_number - REG_GR; | |
3527 | if (e2.X_op != O_register || reg2 > 127) | |
3528 | { | |
3529 | as_bad ("Second operand to .save not a valid register"); | |
3530 | reg2 = 0; | |
3531 | } | |
3532 | switch (reg1) | |
3533 | { | |
3534 | case REG_AR + AR_BSP: | |
3535 | add_unwind_entry (output_bsp_when (), sep); | |
3536 | add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); | |
3537 | break; | |
3538 | case REG_AR + AR_BSPSTORE: | |
3539 | add_unwind_entry (output_bspstore_when (), sep); | |
3540 | add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); | |
3541 | break; | |
3542 | case REG_AR + AR_RNAT: | |
3543 | add_unwind_entry (output_rnat_when (), sep); | |
3544 | add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); | |
3545 | break; | |
3546 | case REG_AR + AR_UNAT: | |
3547 | add_unwind_entry (output_unat_when (), sep); | |
3548 | add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); | |
3549 | break; | |
3550 | case REG_AR + AR_FPSR: | |
3551 | add_unwind_entry (output_fpsr_when (), sep); | |
3552 | add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); | |
3553 | break; | |
3554 | case REG_AR + AR_PFS: | |
3555 | add_unwind_entry (output_pfs_when (), sep); | |
3556 | if (! (unwind.prologue_mask & 4)) | |
3557 | add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); | |
3558 | else if (reg2 != unwind.prologue_gr | |
3559 | + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) | |
3560 | as_warn ("Second operand of .save contradicts .prologue"); | |
3561 | break; | |
3562 | case REG_AR + AR_LC: | |
3563 | add_unwind_entry (output_lc_when (), sep); | |
3564 | add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); | |
3565 | break; | |
3566 | case REG_BR: | |
3567 | add_unwind_entry (output_rp_when (), sep); | |
3568 | if (! (unwind.prologue_mask & 8)) | |
3569 | add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); | |
3570 | else if (reg2 != unwind.prologue_gr) | |
3571 | as_warn ("Second operand of .save contradicts .prologue"); | |
3572 | break; | |
3573 | case REG_PR: | |
3574 | add_unwind_entry (output_preds_when (), sep); | |
3575 | if (! (unwind.prologue_mask & 1)) | |
3576 | add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); | |
3577 | else if (reg2 != unwind.prologue_gr | |
3578 | + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) | |
3579 | as_warn ("Second operand of .save contradicts .prologue"); | |
3580 | break; | |
3581 | case REG_PRIUNAT: | |
3582 | add_unwind_entry (output_priunat_when_gr (), sep); | |
3583 | add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); | |
3584 | break; | |
3585 | default: | |
3586 | as_bad ("First operand to .save not a valid register"); | |
3587 | add_unwind_entry (NULL, sep); | |
3588 | break; | |
800eeca4 | 3589 | } |
800eeca4 JW |
3590 | } |
3591 | ||
197865e8 | 3592 | static void |
800eeca4 | 3593 | dot_restore (dummy) |
2434f565 | 3594 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3595 | { |
e4e8248d | 3596 | expressionS e1; |
33d01f33 | 3597 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3598 | int sep; |
3599 | ||
75e09913 JB |
3600 | if (!in_body ("restore")) |
3601 | return; | |
3602 | ||
e4e8248d | 3603 | sep = parse_operand (&e1, ','); |
e0c9811a | 3604 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) |
e4e8248d | 3605 | as_bad ("First operand to .restore must be stack pointer (sp)"); |
e0c9811a JW |
3606 | |
3607 | if (sep == ',') | |
3608 | { | |
e4e8248d JB |
3609 | expressionS e2; |
3610 | ||
3611 | sep = parse_operand (&e2, ','); | |
33d01f33 | 3612 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3613 | { |
33d01f33 | 3614 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e4e8248d | 3615 | e2.X_add_number = 0; |
e0c9811a | 3616 | } |
33d01f33 | 3617 | ecount = e2.X_add_number; |
e0c9811a | 3618 | } |
33d01f33 JW |
3619 | else |
3620 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3621 | |
3622 | if (ecount >= unwind.prologue_count) | |
3623 | { | |
3624 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3625 | ecount + 1, unwind.prologue_count); | |
e4e8248d | 3626 | ecount = 0; |
6290819d NC |
3627 | } |
3628 | ||
e4e8248d | 3629 | add_unwind_entry (output_epilogue (ecount), sep); |
33d01f33 JW |
3630 | |
3631 | if (ecount < unwind.prologue_count) | |
3632 | unwind.prologue_count -= ecount + 1; | |
3633 | else | |
3634 | unwind.prologue_count = 0; | |
e0c9811a JW |
3635 | } |
3636 | ||
197865e8 | 3637 | static void |
e4e8248d JB |
3638 | dot_restorereg (pred) |
3639 | int pred; | |
e0c9811a JW |
3640 | { |
3641 | unsigned int qp, ab, reg; | |
e4e8248d | 3642 | expressionS e; |
e0c9811a | 3643 | int sep; |
e4e8248d | 3644 | const char * const po = pred ? "restorereg.p" : "restorereg"; |
e0c9811a | 3645 | |
e4e8248d | 3646 | if (!in_procedure (po)) |
75e09913 JB |
3647 | return; |
3648 | ||
e4e8248d JB |
3649 | if (pred) |
3650 | sep = parse_predicate_and_operand (&e, &qp, po); | |
3651 | else | |
e0c9811a | 3652 | { |
e4e8248d JB |
3653 | sep = parse_operand (&e, ','); |
3654 | qp = 0; | |
e0c9811a | 3655 | } |
e4e8248d | 3656 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 3657 | |
e4e8248d | 3658 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); |
800eeca4 JW |
3659 | } |
3660 | ||
2d6ed997 L |
3661 | static char *special_linkonce_name[] = |
3662 | { | |
3663 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3664 | }; | |
3665 | ||
3666 | static void | |
da9f89d4 | 3667 | start_unwind_section (const segT text_seg, int sec_index) |
2d6ed997 L |
3668 | { |
3669 | /* | |
3670 | Use a slightly ugly scheme to derive the unwind section names from | |
3671 | the text section name: | |
3672 | ||
3673 | text sect. unwind table sect. | |
3674 | name: name: comments: | |
3675 | ---------- ----------------- -------------------------------- | |
3676 | .text .IA_64.unwind | |
3677 | .text.foo .IA_64.unwind.text.foo | |
3678 | .foo .IA_64.unwind.foo | |
3679 | .gnu.linkonce.t.foo | |
3680 | .gnu.linkonce.ia64unw.foo | |
3681 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3682 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3683 | ||
3684 | This mapping is done so that: | |
3685 | ||
3686 | (a) An object file with unwind info only in .text will use | |
3687 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3688 | This follows the letter of the ABI and also ensures backwards | |
3689 | compatibility with older toolchains. | |
3690 | ||
3691 | (b) An object file with unwind info in multiple text sections | |
3692 | will use separate unwind sections for each text section. | |
3693 | This allows us to properly set the "sh_info" and "sh_link" | |
3694 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3695 | lets GNU ld support programs with multiple segments | |
3696 | containing unwind info (as might be the case for certain | |
3697 | embedded applications). | |
3698 | ||
3699 | (c) An error is issued if there would be a name clash. | |
3700 | */ | |
3701 | ||
3702 | const char *text_name, *sec_text_name; | |
3703 | char *sec_name; | |
3704 | const char *prefix = special_section_name [sec_index]; | |
3705 | const char *suffix; | |
3706 | size_t prefix_len, suffix_len, sec_name_len; | |
3707 | ||
3708 | sec_text_name = segment_name (text_seg); | |
3709 | text_name = sec_text_name; | |
3710 | if (strncmp (text_name, "_info", 5) == 0) | |
3711 | { | |
3712 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3713 | text_name); | |
3714 | ignore_rest_of_line (); | |
3715 | return; | |
3716 | } | |
3717 | if (strcmp (text_name, ".text") == 0) | |
3718 | text_name = ""; | |
3719 | ||
3720 | /* Build the unwind section name by appending the (possibly stripped) | |
3721 | text section name to the unwind prefix. */ | |
3722 | suffix = text_name; | |
3723 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3724 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3725 | { | |
3726 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3727 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3728 | } | |
3729 | ||
3730 | prefix_len = strlen (prefix); | |
3731 | suffix_len = strlen (suffix); | |
3732 | sec_name_len = prefix_len + suffix_len; | |
3733 | sec_name = alloca (sec_name_len + 1); | |
3734 | memcpy (sec_name, prefix, prefix_len); | |
3735 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3736 | sec_name [sec_name_len] = '\0'; | |
3737 | ||
3738 | /* Handle COMDAT group. */ | |
6e3f953d L |
3739 | if ((text_seg->flags & SEC_LINK_ONCE) != 0 |
3740 | && (elf_section_flags (text_seg) & SHF_GROUP) != 0) | |
2d6ed997 L |
3741 | { |
3742 | char *section; | |
3743 | size_t len, group_name_len; | |
3744 | const char *group_name = elf_group_name (text_seg); | |
3745 | ||
3746 | if (group_name == NULL) | |
3747 | { | |
3748 | as_bad ("Group section `%s' has no group signature", | |
3749 | sec_text_name); | |
3750 | ignore_rest_of_line (); | |
3751 | return; | |
3752 | } | |
3753 | /* We have to construct a fake section directive. */ | |
3754 | group_name_len = strlen (group_name); | |
3755 | len = (sec_name_len | |
3756 | + 16 /* ,"aG",@progbits, */ | |
3757 | + group_name_len /* ,group_name */ | |
3758 | + 7); /* ,comdat */ | |
3759 | ||
3760 | section = alloca (len + 1); | |
3761 | memcpy (section, sec_name, sec_name_len); | |
3762 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3763 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3764 | memcpy (section + len - 7, ",comdat", 7); | |
3765 | section [len] = '\0'; | |
3766 | set_section (section); | |
3767 | } | |
3768 | else | |
3769 | { | |
3770 | set_section (sec_name); | |
3771 | bfd_set_section_flags (stdoutput, now_seg, | |
3772 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3773 | } | |
38ce5b11 L |
3774 | |
3775 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3776 | } |
3777 | ||
73f20958 | 3778 | static void |
2d6ed997 | 3779 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3780 | { |
73f20958 L |
3781 | int size, pad; |
3782 | unw_rec_list *list; | |
800eeca4 | 3783 | |
c97b7ef6 JW |
3784 | /* Mark the end of the unwind info, so that we can compute the size of the |
3785 | last unwind region. */ | |
e4e8248d | 3786 | add_unwind_entry (output_endp (), NOT_A_CHAR); |
c97b7ef6 | 3787 | |
10850f29 JW |
3788 | /* Force out pending instructions, to make sure all unwind records have |
3789 | a valid slot_number field. */ | |
3790 | ia64_flush_insns (); | |
3791 | ||
800eeca4 | 3792 | /* Generate the unwind record. */ |
73f20958 | 3793 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3794 | fixup_unw_records (list, 1); |
73f20958 L |
3795 | size = calc_record_size (list); |
3796 | ||
3797 | if (size > 0 || unwind.force_unwind_entry) | |
3798 | { | |
3799 | unwind.force_unwind_entry = 0; | |
3800 | /* pad to pointer-size boundary. */ | |
3801 | pad = size % md.pointer_size; | |
3802 | if (pad != 0) | |
3803 | size += md.pointer_size - pad; | |
f7e323d5 JB |
3804 | /* Add 8 for the header. */ |
3805 | size += 8; | |
3806 | /* Add a pointer for the personality offset. */ | |
3807 | if (unwind.personality_routine) | |
3808 | size += md.pointer_size; | |
73f20958 | 3809 | } |
6290819d | 3810 | |
800eeca4 JW |
3811 | /* If there are unwind records, switch sections, and output the info. */ |
3812 | if (size != 0) | |
3813 | { | |
800eeca4 | 3814 | expressionS exp; |
1cd8ff38 | 3815 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3816 | |
da9f89d4 | 3817 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); |
800eeca4 | 3818 | |
557debba JW |
3819 | /* Make sure the section has 4 byte alignment for ILP32 and |
3820 | 8 byte alignment for LP64. */ | |
3821 | frag_align (md.pointer_size_shift, 0, 0); | |
3822 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3823 | |
800eeca4 | 3824 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3825 | unwind.info = expr_build_dot (); |
73f20958 L |
3826 | |
3827 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3828 | (offsetT) (long) unwind.personality_routine, |
3829 | (char *) list); | |
91a2ae2a | 3830 | |
800eeca4 | 3831 | /* Add the personality address to the image. */ |
e0c9811a | 3832 | if (unwind.personality_routine != 0) |
542d6675 | 3833 | { |
40449e9f | 3834 | exp.X_op = O_symbol; |
e0c9811a | 3835 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3836 | exp.X_add_number = 0; |
1cd8ff38 NC |
3837 | |
3838 | if (md.flags & EF_IA_64_BE) | |
3839 | { | |
3840 | if (md.flags & EF_IA_64_ABI64) | |
3841 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3842 | else | |
3843 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3844 | } | |
40449e9f | 3845 | else |
1cd8ff38 NC |
3846 | { |
3847 | if (md.flags & EF_IA_64_ABI64) | |
3848 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3849 | else | |
3850 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3851 | } | |
3852 | ||
3853 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3854 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3855 | unwind.personality_routine = 0; |
542d6675 | 3856 | } |
800eeca4 JW |
3857 | } |
3858 | ||
6290819d | 3859 | free_saved_prologue_counts (); |
e0c9811a | 3860 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3861 | } |
3862 | ||
197865e8 | 3863 | static void |
542d6675 | 3864 | dot_handlerdata (dummy) |
2434f565 | 3865 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3866 | { |
75e09913 JB |
3867 | if (!in_procedure ("handlerdata")) |
3868 | return; | |
91a2ae2a RH |
3869 | unwind.force_unwind_entry = 1; |
3870 | ||
3871 | /* Remember which segment we're in so we can switch back after .endp */ | |
3872 | unwind.saved_text_seg = now_seg; | |
3873 | unwind.saved_text_subseg = now_subseg; | |
3874 | ||
3875 | /* Generate unwind info into unwind-info section and then leave that | |
3876 | section as the currently active one so dataXX directives go into | |
3877 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3878 | generate_unwind_image (now_seg); |
e0c9811a | 3879 | demand_empty_rest_of_line (); |
800eeca4 JW |
3880 | } |
3881 | ||
197865e8 | 3882 | static void |
800eeca4 | 3883 | dot_unwentry (dummy) |
2434f565 | 3884 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3885 | { |
75e09913 JB |
3886 | if (!in_procedure ("unwentry")) |
3887 | return; | |
91a2ae2a | 3888 | unwind.force_unwind_entry = 1; |
e0c9811a | 3889 | demand_empty_rest_of_line (); |
800eeca4 JW |
3890 | } |
3891 | ||
197865e8 | 3892 | static void |
800eeca4 | 3893 | dot_altrp (dummy) |
2434f565 | 3894 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3895 | { |
e0c9811a JW |
3896 | expressionS e; |
3897 | unsigned reg; | |
3898 | ||
75e09913 JB |
3899 | if (!in_prologue ("altrp")) |
3900 | return; | |
3901 | ||
e4e8248d | 3902 | parse_operand (&e, 0); |
e0c9811a | 3903 | reg = e.X_add_number - REG_BR; |
e4e8248d JB |
3904 | if (e.X_op != O_register || reg > 7) |
3905 | { | |
3906 | as_bad ("First operand to .altrp not a valid branch register"); | |
3907 | reg = 0; | |
3908 | } | |
3909 | add_unwind_entry (output_rp_br (reg), 0); | |
800eeca4 JW |
3910 | } |
3911 | ||
197865e8 | 3912 | static void |
e0c9811a JW |
3913 | dot_savemem (psprel) |
3914 | int psprel; | |
800eeca4 JW |
3915 | { |
3916 | expressionS e1, e2; | |
3917 | int sep; | |
3918 | int reg1, val; | |
e4e8248d | 3919 | const char * const po = psprel ? "savepsp" : "savesp"; |
800eeca4 | 3920 | |
e4e8248d | 3921 | if (!in_prologue (po)) |
75e09913 JB |
3922 | return; |
3923 | ||
e4e8248d JB |
3924 | sep = parse_operand (&e1, ','); |
3925 | if (sep == ',') | |
3926 | sep = parse_operand (&e2, ','); | |
3927 | else | |
3928 | e2.X_op = O_absent; | |
800eeca4 | 3929 | |
e0c9811a | 3930 | reg1 = e1.X_add_number; |
800eeca4 | 3931 | val = e2.X_add_number; |
197865e8 | 3932 | |
800eeca4 | 3933 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e4e8248d | 3934 | if (e1.X_op != O_register) |
800eeca4 | 3935 | { |
e4e8248d JB |
3936 | as_bad ("First operand to .%s not a register", po); |
3937 | reg1 = REG_PR; /* Anything valid is good here. */ | |
3938 | } | |
3939 | if (e2.X_op != O_constant) | |
3940 | { | |
3941 | as_bad ("Second operand to .%s not a constant", po); | |
3942 | val = 0; | |
3943 | } | |
3944 | ||
3945 | switch (reg1) | |
3946 | { | |
3947 | case REG_AR + AR_BSP: | |
3948 | add_unwind_entry (output_bsp_when (), sep); | |
3949 | add_unwind_entry ((psprel | |
3950 | ? output_bsp_psprel | |
3951 | : output_bsp_sprel) (val), NOT_A_CHAR); | |
3952 | break; | |
3953 | case REG_AR + AR_BSPSTORE: | |
3954 | add_unwind_entry (output_bspstore_when (), sep); | |
3955 | add_unwind_entry ((psprel | |
3956 | ? output_bspstore_psprel | |
3957 | : output_bspstore_sprel) (val), NOT_A_CHAR); | |
3958 | break; | |
3959 | case REG_AR + AR_RNAT: | |
3960 | add_unwind_entry (output_rnat_when (), sep); | |
3961 | add_unwind_entry ((psprel | |
3962 | ? output_rnat_psprel | |
3963 | : output_rnat_sprel) (val), NOT_A_CHAR); | |
3964 | break; | |
3965 | case REG_AR + AR_UNAT: | |
3966 | add_unwind_entry (output_unat_when (), sep); | |
3967 | add_unwind_entry ((psprel | |
3968 | ? output_unat_psprel | |
3969 | : output_unat_sprel) (val), NOT_A_CHAR); | |
3970 | break; | |
3971 | case REG_AR + AR_FPSR: | |
3972 | add_unwind_entry (output_fpsr_when (), sep); | |
3973 | add_unwind_entry ((psprel | |
3974 | ? output_fpsr_psprel | |
3975 | : output_fpsr_sprel) (val), NOT_A_CHAR); | |
3976 | break; | |
3977 | case REG_AR + AR_PFS: | |
3978 | add_unwind_entry (output_pfs_when (), sep); | |
3979 | add_unwind_entry ((psprel | |
3980 | ? output_pfs_psprel | |
3981 | : output_pfs_sprel) (val), NOT_A_CHAR); | |
3982 | break; | |
3983 | case REG_AR + AR_LC: | |
3984 | add_unwind_entry (output_lc_when (), sep); | |
3985 | add_unwind_entry ((psprel | |
3986 | ? output_lc_psprel | |
3987 | : output_lc_sprel) (val), NOT_A_CHAR); | |
3988 | break; | |
3989 | case REG_BR: | |
3990 | add_unwind_entry (output_rp_when (), sep); | |
3991 | add_unwind_entry ((psprel | |
3992 | ? output_rp_psprel | |
3993 | : output_rp_sprel) (val), NOT_A_CHAR); | |
3994 | break; | |
3995 | case REG_PR: | |
3996 | add_unwind_entry (output_preds_when (), sep); | |
3997 | add_unwind_entry ((psprel | |
3998 | ? output_preds_psprel | |
3999 | : output_preds_sprel) (val), NOT_A_CHAR); | |
4000 | break; | |
4001 | case REG_PRIUNAT: | |
4002 | add_unwind_entry (output_priunat_when_mem (), sep); | |
4003 | add_unwind_entry ((psprel | |
4004 | ? output_priunat_psprel | |
4005 | : output_priunat_sprel) (val), NOT_A_CHAR); | |
4006 | break; | |
4007 | default: | |
4008 | as_bad ("First operand to .%s not a valid register", po); | |
4009 | add_unwind_entry (NULL, sep); | |
4010 | break; | |
800eeca4 | 4011 | } |
800eeca4 JW |
4012 | } |
4013 | ||
197865e8 | 4014 | static void |
800eeca4 | 4015 | dot_saveg (dummy) |
2434f565 | 4016 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4017 | { |
e4e8248d JB |
4018 | expressionS e; |
4019 | unsigned grmask; | |
800eeca4 | 4020 | int sep; |
75e09913 JB |
4021 | |
4022 | if (!in_prologue ("save.g")) | |
4023 | return; | |
4024 | ||
e4e8248d | 4025 | sep = parse_operand (&e, ','); |
197865e8 | 4026 | |
e4e8248d JB |
4027 | grmask = e.X_add_number; |
4028 | if (e.X_op != O_constant | |
4029 | || e.X_add_number <= 0 | |
4030 | || e.X_add_number > 0xf) | |
800eeca4 | 4031 | { |
e4e8248d JB |
4032 | as_bad ("First operand to .save.g must be a positive 4-bit constant"); |
4033 | grmask = 0; | |
4034 | } | |
4035 | ||
4036 | if (sep == ',') | |
4037 | { | |
4038 | unsigned reg; | |
4039 | int n = popcount (grmask); | |
4040 | ||
4041 | parse_operand (&e, 0); | |
4042 | reg = e.X_add_number - REG_GR; | |
4043 | if (e.X_op != O_register || reg > 127) | |
542d6675 | 4044 | { |
e4e8248d JB |
4045 | as_bad ("Second operand to .save.g must be a general register"); |
4046 | reg = 0; | |
4047 | } | |
4048 | else if (reg > 128U - n) | |
4049 | { | |
4050 | as_bad ("Second operand to .save.g must be the first of %d general registers", n); | |
4051 | reg = 0; | |
800eeca4 | 4052 | } |
e4e8248d | 4053 | add_unwind_entry (output_gr_gr (grmask, reg), 0); |
800eeca4 | 4054 | } |
e4e8248d JB |
4055 | else |
4056 | add_unwind_entry (output_gr_mem (grmask), 0); | |
800eeca4 JW |
4057 | } |
4058 | ||
197865e8 | 4059 | static void |
800eeca4 | 4060 | dot_savef (dummy) |
2434f565 | 4061 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4062 | { |
e4e8248d | 4063 | expressionS e; |
75e09913 JB |
4064 | |
4065 | if (!in_prologue ("save.f")) | |
4066 | return; | |
4067 | ||
e4e8248d | 4068 | parse_operand (&e, 0); |
197865e8 | 4069 | |
e4e8248d JB |
4070 | if (e.X_op != O_constant |
4071 | || e.X_add_number <= 0 | |
4072 | || e.X_add_number > 0xfffff) | |
4073 | { | |
4074 | as_bad ("Operand to .save.f must be a positive 20-bit constant"); | |
4075 | e.X_add_number = 0; | |
4076 | } | |
4077 | add_unwind_entry (output_fr_mem (e.X_add_number), 0); | |
800eeca4 JW |
4078 | } |
4079 | ||
197865e8 | 4080 | static void |
800eeca4 | 4081 | dot_saveb (dummy) |
2434f565 | 4082 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4083 | { |
e4e8248d JB |
4084 | expressionS e; |
4085 | unsigned brmask; | |
4086 | int sep; | |
e0c9811a | 4087 | |
75e09913 JB |
4088 | if (!in_prologue ("save.b")) |
4089 | return; | |
4090 | ||
e4e8248d JB |
4091 | sep = parse_operand (&e, ','); |
4092 | ||
4093 | brmask = e.X_add_number; | |
4094 | if (e.X_op != O_constant | |
4095 | || e.X_add_number <= 0 | |
4096 | || e.X_add_number > 0x1f) | |
800eeca4 | 4097 | { |
e4e8248d JB |
4098 | as_bad ("First operand to .save.b must be a positive 5-bit constant"); |
4099 | brmask = 0; | |
800eeca4 | 4100 | } |
e0c9811a JW |
4101 | |
4102 | if (sep == ',') | |
4103 | { | |
e4e8248d JB |
4104 | unsigned reg; |
4105 | int n = popcount (brmask); | |
4106 | ||
4107 | parse_operand (&e, 0); | |
4108 | reg = e.X_add_number - REG_GR; | |
4109 | if (e.X_op != O_register || reg > 127) | |
e0c9811a | 4110 | { |
e4e8248d JB |
4111 | as_bad ("Second operand to .save.b must be a general register"); |
4112 | reg = 0; | |
e0c9811a | 4113 | } |
e4e8248d JB |
4114 | else if (reg > 128U - n) |
4115 | { | |
4116 | as_bad ("Second operand to .save.b must be the first of %d general registers", n); | |
4117 | reg = 0; | |
4118 | } | |
4119 | add_unwind_entry (output_br_gr (brmask, reg), 0); | |
e0c9811a JW |
4120 | } |
4121 | else | |
e4e8248d | 4122 | add_unwind_entry (output_br_mem (brmask), 0); |
800eeca4 JW |
4123 | } |
4124 | ||
197865e8 | 4125 | static void |
800eeca4 | 4126 | dot_savegf (dummy) |
2434f565 | 4127 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4128 | { |
4129 | expressionS e1, e2; | |
75e09913 JB |
4130 | |
4131 | if (!in_prologue ("save.gf")) | |
4132 | return; | |
4133 | ||
e4e8248d JB |
4134 | if (parse_operand (&e1, ',') == ',') |
4135 | parse_operand (&e2, 0); | |
800eeca4 | 4136 | else |
e4e8248d JB |
4137 | e2.X_op = O_absent; |
4138 | ||
4139 | if (e1.X_op != O_constant | |
4140 | || e1.X_add_number < 0 | |
4141 | || e1.X_add_number > 0xf) | |
4142 | { | |
4143 | as_bad ("First operand to .save.gf must be a non-negative 4-bit constant"); | |
4144 | e1.X_op = O_absent; | |
4145 | e1.X_add_number = 0; | |
4146 | } | |
4147 | if (e2.X_op != O_constant | |
4148 | || e2.X_add_number < 0 | |
4149 | || e2.X_add_number > 0xfffff) | |
800eeca4 | 4150 | { |
e4e8248d JB |
4151 | as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant"); |
4152 | e2.X_op = O_absent; | |
4153 | e2.X_add_number = 0; | |
800eeca4 | 4154 | } |
e4e8248d JB |
4155 | if (e1.X_op == O_constant |
4156 | && e2.X_op == O_constant | |
4157 | && e1.X_add_number == 0 | |
4158 | && e2.X_add_number == 0) | |
4159 | as_bad ("Operands to .save.gf may not be both zero"); | |
4160 | ||
4161 | add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); | |
800eeca4 JW |
4162 | } |
4163 | ||
197865e8 | 4164 | static void |
800eeca4 | 4165 | dot_spill (dummy) |
2434f565 | 4166 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4167 | { |
4168 | expressionS e; | |
e0c9811a | 4169 | |
75e09913 JB |
4170 | if (!in_prologue ("spill")) |
4171 | return; | |
4172 | ||
e4e8248d | 4173 | parse_operand (&e, 0); |
197865e8 | 4174 | |
800eeca4 | 4175 | if (e.X_op != O_constant) |
800eeca4 | 4176 | { |
e4e8248d JB |
4177 | as_bad ("Operand to .spill must be a constant"); |
4178 | e.X_add_number = 0; | |
e0c9811a | 4179 | } |
e4e8248d | 4180 | add_unwind_entry (output_spill_base (e.X_add_number), 0); |
e0c9811a JW |
4181 | } |
4182 | ||
4183 | static void | |
e4e8248d JB |
4184 | dot_spillreg (pred) |
4185 | int pred; | |
e0c9811a | 4186 | { |
2132e3a3 | 4187 | int sep; |
e4e8248d JB |
4188 | unsigned int qp, ab, xy, reg, treg; |
4189 | expressionS e; | |
4190 | const char * const po = pred ? "spillreg.p" : "spillreg"; | |
e0c9811a | 4191 | |
e4e8248d | 4192 | if (!in_procedure (po)) |
75e09913 JB |
4193 | return; |
4194 | ||
e4e8248d JB |
4195 | if (pred) |
4196 | sep = parse_predicate_and_operand (&e, &qp, po); | |
e0c9811a | 4197 | else |
e0c9811a | 4198 | { |
e4e8248d JB |
4199 | sep = parse_operand (&e, ','); |
4200 | qp = 0; | |
e0c9811a | 4201 | } |
e4e8248d | 4202 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4203 | |
e4e8248d JB |
4204 | if (sep == ',') |
4205 | sep = parse_operand (&e, ','); | |
4206 | else | |
4207 | e.X_op = O_absent; | |
4208 | convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); | |
e0c9811a | 4209 | |
e4e8248d | 4210 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); |
e0c9811a JW |
4211 | } |
4212 | ||
4213 | static void | |
e4e8248d | 4214 | dot_spillmem (psprel) |
e0c9811a JW |
4215 | int psprel; |
4216 | { | |
e4e8248d JB |
4217 | expressionS e; |
4218 | int pred = (psprel < 0), sep; | |
4219 | unsigned int qp, ab, reg; | |
4220 | const char * po; | |
e0c9811a | 4221 | |
e4e8248d | 4222 | if (pred) |
e0c9811a | 4223 | { |
e4e8248d JB |
4224 | psprel = ~psprel; |
4225 | po = psprel ? "spillpsp.p" : "spillsp.p"; | |
e0c9811a | 4226 | } |
e4e8248d JB |
4227 | else |
4228 | po = psprel ? "spillpsp" : "spillsp"; | |
e0c9811a | 4229 | |
e4e8248d JB |
4230 | if (!in_procedure (po)) |
4231 | return; | |
e0c9811a | 4232 | |
e4e8248d JB |
4233 | if (pred) |
4234 | sep = parse_predicate_and_operand (&e, &qp, po); | |
4235 | else | |
e0c9811a | 4236 | { |
e4e8248d JB |
4237 | sep = parse_operand (&e, ','); |
4238 | qp = 0; | |
e0c9811a | 4239 | } |
e4e8248d | 4240 | convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); |
e0c9811a | 4241 | |
e4e8248d JB |
4242 | if (sep == ',') |
4243 | sep = parse_operand (&e, ','); | |
4244 | else | |
4245 | e.X_op = O_absent; | |
4246 | if (e.X_op != O_constant) | |
e0c9811a | 4247 | { |
e4e8248d JB |
4248 | as_bad ("Operand %d to .%s must be a constant", 2 + pred, po); |
4249 | e.X_add_number = 0; | |
e0c9811a JW |
4250 | } |
4251 | ||
4252 | if (psprel) | |
e4e8248d | 4253 | add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a | 4254 | else |
e4e8248d | 4255 | add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); |
e0c9811a JW |
4256 | } |
4257 | ||
6290819d NC |
4258 | static unsigned int |
4259 | get_saved_prologue_count (lbl) | |
4260 | unsigned long lbl; | |
4261 | { | |
4262 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4263 | ||
4264 | while (lpc != NULL && lpc->label_number != lbl) | |
4265 | lpc = lpc->next; | |
4266 | ||
4267 | if (lpc != NULL) | |
4268 | return lpc->prologue_count; | |
4269 | ||
4270 | as_bad ("Missing .label_state %ld", lbl); | |
4271 | return 1; | |
4272 | } | |
4273 | ||
4274 | static void | |
4275 | save_prologue_count (lbl, count) | |
4276 | unsigned long lbl; | |
4277 | unsigned int count; | |
4278 | { | |
4279 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
4280 | ||
4281 | while (lpc != NULL && lpc->label_number != lbl) | |
4282 | lpc = lpc->next; | |
4283 | ||
4284 | if (lpc != NULL) | |
4285 | lpc->prologue_count = count; | |
4286 | else | |
4287 | { | |
40449e9f | 4288 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
4289 | |
4290 | new_lpc->next = unwind.saved_prologue_counts; | |
4291 | new_lpc->label_number = lbl; | |
4292 | new_lpc->prologue_count = count; | |
4293 | unwind.saved_prologue_counts = new_lpc; | |
4294 | } | |
4295 | } | |
4296 | ||
4297 | static void | |
4298 | free_saved_prologue_counts () | |
4299 | { | |
40449e9f KH |
4300 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
4301 | label_prologue_count *next; | |
6290819d NC |
4302 | |
4303 | while (lpc != NULL) | |
4304 | { | |
4305 | next = lpc->next; | |
4306 | free (lpc); | |
4307 | lpc = next; | |
4308 | } | |
4309 | ||
4310 | unwind.saved_prologue_counts = NULL; | |
4311 | } | |
4312 | ||
e0c9811a JW |
4313 | static void |
4314 | dot_label_state (dummy) | |
2434f565 | 4315 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4316 | { |
4317 | expressionS e; | |
4318 | ||
75e09913 JB |
4319 | if (!in_body ("label_state")) |
4320 | return; | |
4321 | ||
e4e8248d JB |
4322 | parse_operand (&e, 0); |
4323 | if (e.X_op == O_constant) | |
4324 | save_prologue_count (e.X_add_number, unwind.prologue_count); | |
4325 | else | |
e0c9811a JW |
4326 | { |
4327 | as_bad ("Operand to .label_state must be a constant"); | |
e4e8248d | 4328 | e.X_add_number = 0; |
e0c9811a | 4329 | } |
e4e8248d | 4330 | add_unwind_entry (output_label_state (e.X_add_number), 0); |
e0c9811a JW |
4331 | } |
4332 | ||
4333 | static void | |
4334 | dot_copy_state (dummy) | |
2434f565 | 4335 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
4336 | { |
4337 | expressionS e; | |
4338 | ||
75e09913 JB |
4339 | if (!in_body ("copy_state")) |
4340 | return; | |
4341 | ||
e4e8248d JB |
4342 | parse_operand (&e, 0); |
4343 | if (e.X_op == O_constant) | |
4344 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); | |
4345 | else | |
e0c9811a JW |
4346 | { |
4347 | as_bad ("Operand to .copy_state must be a constant"); | |
e4e8248d | 4348 | e.X_add_number = 0; |
e0c9811a | 4349 | } |
e4e8248d | 4350 | add_unwind_entry (output_copy_state (e.X_add_number), 0); |
800eeca4 JW |
4351 | } |
4352 | ||
197865e8 | 4353 | static void |
800eeca4 | 4354 | dot_unwabi (dummy) |
2434f565 | 4355 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4356 | { |
e0c9811a JW |
4357 | expressionS e1, e2; |
4358 | unsigned char sep; | |
4359 | ||
e4e8248d | 4360 | if (!in_prologue ("unwabi")) |
75e09913 JB |
4361 | return; |
4362 | ||
e4e8248d JB |
4363 | sep = parse_operand (&e1, ','); |
4364 | if (sep == ',') | |
4365 | parse_operand (&e2, 0); | |
4366 | else | |
4367 | e2.X_op = O_absent; | |
e0c9811a JW |
4368 | |
4369 | if (e1.X_op != O_constant) | |
4370 | { | |
4371 | as_bad ("First operand to .unwabi must be a constant"); | |
e4e8248d | 4372 | e1.X_add_number = 0; |
e0c9811a JW |
4373 | } |
4374 | ||
4375 | if (e2.X_op != O_constant) | |
4376 | { | |
4377 | as_bad ("Second operand to .unwabi must be a constant"); | |
e4e8248d | 4378 | e2.X_add_number = 0; |
e0c9811a JW |
4379 | } |
4380 | ||
e4e8248d | 4381 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); |
800eeca4 JW |
4382 | } |
4383 | ||
197865e8 | 4384 | static void |
800eeca4 | 4385 | dot_personality (dummy) |
2434f565 | 4386 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4387 | { |
4388 | char *name, *p, c; | |
75e09913 JB |
4389 | if (!in_procedure ("personality")) |
4390 | return; | |
800eeca4 JW |
4391 | SKIP_WHITESPACE (); |
4392 | name = input_line_pointer; | |
4393 | c = get_symbol_end (); | |
4394 | p = input_line_pointer; | |
e0c9811a | 4395 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4396 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4397 | *p = c; |
4398 | SKIP_WHITESPACE (); | |
4399 | demand_empty_rest_of_line (); | |
4400 | } | |
4401 | ||
4402 | static void | |
4403 | dot_proc (dummy) | |
2434f565 | 4404 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4405 | { |
4406 | char *name, *p, c; | |
4407 | symbolS *sym; | |
5656b6b8 JB |
4408 | proc_pending *pending, *last_pending; |
4409 | ||
4410 | if (unwind.proc_pending.sym) | |
4411 | { | |
4412 | (md.unwind_check == unwind_check_warning | |
4413 | ? as_warn | |
4414 | : as_bad) ("Missing .endp after previous .proc"); | |
4415 | while (unwind.proc_pending.next) | |
4416 | { | |
4417 | pending = unwind.proc_pending.next; | |
4418 | unwind.proc_pending.next = pending->next; | |
4419 | free (pending); | |
4420 | } | |
4421 | } | |
4422 | last_pending = NULL; | |
800eeca4 | 4423 | |
e0c9811a | 4424 | /* Parse names of main and alternate entry points and mark them as |
542d6675 | 4425 | function symbols: */ |
800eeca4 JW |
4426 | while (1) |
4427 | { | |
4428 | SKIP_WHITESPACE (); | |
4429 | name = input_line_pointer; | |
4430 | c = get_symbol_end (); | |
4431 | p = input_line_pointer; | |
75e09913 JB |
4432 | if (!*name) |
4433 | as_bad ("Empty argument of .proc"); | |
4434 | else | |
542d6675 | 4435 | { |
75e09913 JB |
4436 | sym = symbol_find_or_make (name); |
4437 | if (S_IS_DEFINED (sym)) | |
4438 | as_bad ("`%s' was already defined", name); | |
5656b6b8 JB |
4439 | else if (!last_pending) |
4440 | { | |
4441 | unwind.proc_pending.sym = sym; | |
4442 | last_pending = &unwind.proc_pending; | |
4443 | } | |
4444 | else | |
75e09913 | 4445 | { |
5656b6b8 JB |
4446 | pending = xmalloc (sizeof (*pending)); |
4447 | pending->sym = sym; | |
4448 | last_pending = last_pending->next = pending; | |
75e09913 JB |
4449 | } |
4450 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
800eeca4 | 4451 | } |
800eeca4 JW |
4452 | *p = c; |
4453 | SKIP_WHITESPACE (); | |
4454 | if (*input_line_pointer != ',') | |
4455 | break; | |
4456 | ++input_line_pointer; | |
4457 | } | |
5656b6b8 JB |
4458 | if (!last_pending) |
4459 | { | |
4460 | unwind.proc_pending.sym = expr_build_dot (); | |
4461 | last_pending = &unwind.proc_pending; | |
4462 | } | |
4463 | last_pending->next = NULL; | |
800eeca4 JW |
4464 | demand_empty_rest_of_line (); |
4465 | ia64_do_align (16); | |
4466 | ||
75e09913 | 4467 | unwind.prologue = 0; |
33d01f33 | 4468 | unwind.prologue_count = 0; |
75e09913 JB |
4469 | unwind.body = 0; |
4470 | unwind.insn = 0; | |
e0c9811a JW |
4471 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4472 | unwind.personality_routine = 0; | |
800eeca4 JW |
4473 | } |
4474 | ||
4475 | static void | |
4476 | dot_body (dummy) | |
2434f565 | 4477 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4478 | { |
75e09913 JB |
4479 | if (!in_procedure ("body")) |
4480 | return; | |
4481 | if (!unwind.prologue && !unwind.body && unwind.insn) | |
4482 | as_warn ("Initial .body should precede any instructions"); | |
ba825241 | 4483 | check_pending_save (); |
75e09913 | 4484 | |
e0c9811a | 4485 | unwind.prologue = 0; |
30d25259 | 4486 | unwind.prologue_mask = 0; |
75e09913 | 4487 | unwind.body = 1; |
30d25259 | 4488 | |
e4e8248d | 4489 | add_unwind_entry (output_body (), 0); |
800eeca4 JW |
4490 | } |
4491 | ||
4492 | static void | |
4493 | dot_prologue (dummy) | |
2434f565 | 4494 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4495 | { |
e4e8248d | 4496 | unsigned mask = 0, grsave = 0; |
e0c9811a | 4497 | |
75e09913 JB |
4498 | if (!in_procedure ("prologue")) |
4499 | return; | |
4500 | if (unwind.prologue) | |
4501 | { | |
4502 | as_bad (".prologue within prologue"); | |
4503 | ignore_rest_of_line (); | |
4504 | return; | |
4505 | } | |
4506 | if (!unwind.body && unwind.insn) | |
4507 | as_warn ("Initial .prologue should precede any instructions"); | |
4508 | ||
e0c9811a | 4509 | if (!is_it_end_of_statement ()) |
800eeca4 | 4510 | { |
e4e8248d JB |
4511 | expressionS e; |
4512 | int n, sep = parse_operand (&e, ','); | |
30d25259 | 4513 | |
e4e8248d JB |
4514 | if (e.X_op != O_constant |
4515 | || e.X_add_number < 0 | |
4516 | || e.X_add_number > 0xf) | |
4517 | as_bad ("First operand to .prologue must be a positive 4-bit constant"); | |
4518 | else if (e.X_add_number == 0) | |
4519 | as_warn ("Pointless use of zero first operand to .prologue"); | |
4520 | else | |
4521 | mask = e.X_add_number; | |
4522 | n = popcount (mask); | |
30d25259 | 4523 | |
e4e8248d JB |
4524 | if (sep == ',') |
4525 | parse_operand (&e, 0); | |
800eeca4 | 4526 | else |
e4e8248d JB |
4527 | e.X_op = O_absent; |
4528 | if (e.X_op == O_constant | |
4529 | && e.X_add_number >= 0 | |
4530 | && e.X_add_number < 128) | |
4531 | { | |
4532 | if (md.unwind_check == unwind_check_error) | |
4533 | as_warn ("Using a constant as second operand to .prologue is deprecated"); | |
4534 | grsave = e.X_add_number; | |
4535 | } | |
4536 | else if (e.X_op != O_register | |
4537 | || (grsave = e.X_add_number - REG_GR) > 127) | |
4538 | { | |
4539 | as_bad ("Second operand to .prologue must be a general register"); | |
4540 | grsave = 0; | |
4541 | } | |
4542 | else if (grsave > 128U - n) | |
4543 | { | |
4544 | as_bad ("Second operand to .prologue must be the first of %d general registers", n); | |
4545 | grsave = 0; | |
4546 | } | |
4547 | ||
800eeca4 | 4548 | } |
e4e8248d JB |
4549 | |
4550 | if (mask) | |
4551 | add_unwind_entry (output_prologue_gr (mask, grsave), 0); | |
800eeca4 | 4552 | else |
e4e8248d | 4553 | add_unwind_entry (output_prologue (), 0); |
30d25259 RH |
4554 | |
4555 | unwind.prologue = 1; | |
4556 | unwind.prologue_mask = mask; | |
e4e8248d | 4557 | unwind.prologue_gr = grsave; |
75e09913 | 4558 | unwind.body = 0; |
33d01f33 | 4559 | ++unwind.prologue_count; |
800eeca4 JW |
4560 | } |
4561 | ||
4562 | static void | |
4563 | dot_endp (dummy) | |
2434f565 | 4564 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4565 | { |
4566 | expressionS e; | |
44f5c83a | 4567 | int bytes_per_address; |
800eeca4 JW |
4568 | long where; |
4569 | segT saved_seg; | |
4570 | subsegT saved_subseg; | |
5656b6b8 | 4571 | proc_pending *pending; |
970d6792 | 4572 | int unwind_check = md.unwind_check; |
800eeca4 | 4573 | |
970d6792 | 4574 | md.unwind_check = unwind_check_error; |
75e09913 JB |
4575 | if (!in_procedure ("endp")) |
4576 | return; | |
970d6792 | 4577 | md.unwind_check = unwind_check; |
75e09913 | 4578 | |
91a2ae2a RH |
4579 | if (unwind.saved_text_seg) |
4580 | { | |
4581 | saved_seg = unwind.saved_text_seg; | |
4582 | saved_subseg = unwind.saved_text_subseg; | |
4583 | unwind.saved_text_seg = NULL; | |
4584 | } | |
4585 | else | |
4586 | { | |
4587 | saved_seg = now_seg; | |
4588 | saved_subseg = now_subseg; | |
4589 | } | |
4590 | ||
800eeca4 | 4591 | insn_group_break (1, 0, 0); |
800eeca4 | 4592 | |
91a2ae2a RH |
4593 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4594 | if (!unwind.info) | |
2d6ed997 | 4595 | generate_unwind_image (saved_seg); |
800eeca4 | 4596 | |
91a2ae2a RH |
4597 | if (unwind.info || unwind.force_unwind_entry) |
4598 | { | |
75e09913 JB |
4599 | symbolS *proc_end; |
4600 | ||
91a2ae2a | 4601 | subseg_set (md.last_text_seg, 0); |
75e09913 | 4602 | proc_end = expr_build_dot (); |
5e7474a7 | 4603 | |
da9f89d4 | 4604 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); |
5e7474a7 | 4605 | |
557debba JW |
4606 | /* Make sure that section has 4 byte alignment for ILP32 and |
4607 | 8 byte alignment for LP64. */ | |
4608 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4609 | |
557debba JW |
4610 | /* Need space for 3 pointers for procedure start, procedure end, |
4611 | and unwind info. */ | |
6baf2b51 | 4612 | memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); |
557debba | 4613 | where = frag_now_fix () - (3 * md.pointer_size); |
91a2ae2a | 4614 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4615 | |
40449e9f | 4616 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4617 | e.X_op = O_pseudo_fixup; |
4618 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4619 | e.X_add_number = 0; | |
5656b6b8 JB |
4620 | if (!S_IS_LOCAL (unwind.proc_pending.sym) |
4621 | && S_IS_DEFINED (unwind.proc_pending.sym)) | |
4622 | e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), | |
4623 | S_GET_VALUE (unwind.proc_pending.sym), | |
4624 | symbol_get_frag (unwind.proc_pending.sym)); | |
4600db48 | 4625 | else |
5656b6b8 | 4626 | e.X_add_symbol = unwind.proc_pending.sym; |
91a2ae2a | 4627 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); |
800eeca4 | 4628 | |
800eeca4 JW |
4629 | e.X_op = O_pseudo_fixup; |
4630 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4631 | e.X_add_number = 0; | |
75e09913 | 4632 | e.X_add_symbol = proc_end; |
91a2ae2a RH |
4633 | ia64_cons_fix_new (frag_now, where + bytes_per_address, |
4634 | bytes_per_address, &e); | |
4635 | ||
4636 | if (unwind.info) | |
4637 | { | |
4638 | e.X_op = O_pseudo_fixup; | |
4639 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4640 | e.X_add_number = 0; | |
4641 | e.X_add_symbol = unwind.info; | |
4642 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4643 | bytes_per_address, &e); | |
4644 | } | |
91a2ae2a | 4645 | } |
800eeca4 | 4646 | subseg_set (saved_seg, saved_subseg); |
c538998c | 4647 | |
5656b6b8 JB |
4648 | /* Set symbol sizes. */ |
4649 | pending = &unwind.proc_pending; | |
4650 | if (S_GET_NAME (pending->sym)) | |
c538998c | 4651 | { |
5656b6b8 | 4652 | do |
75e09913 | 4653 | { |
5656b6b8 JB |
4654 | symbolS *sym = pending->sym; |
4655 | ||
4656 | if (!S_IS_DEFINED (sym)) | |
4657 | as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym)); | |
4658 | else if (S_GET_SIZE (sym) == 0 | |
4659 | && symbol_get_obj (sym)->size == NULL) | |
75e09913 | 4660 | { |
75e09913 JB |
4661 | fragS *frag = symbol_get_frag (sym); |
4662 | ||
5656b6b8 | 4663 | if (frag) |
c538998c | 4664 | { |
75e09913 JB |
4665 | if (frag == frag_now && SEG_NORMAL (now_seg)) |
4666 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4667 | else | |
4668 | { | |
4669 | symbol_get_obj (sym)->size = | |
4670 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4671 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4672 | symbol_get_obj (sym)->size->X_add_symbol | |
4673 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4674 | frag_now_fix (), frag_now); | |
4675 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4676 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4677 | } | |
c538998c JJ |
4678 | } |
4679 | } | |
5656b6b8 JB |
4680 | } while ((pending = pending->next) != NULL); |
4681 | } | |
4682 | ||
4683 | /* Parse names of main and alternate entry points. */ | |
4684 | while (1) | |
4685 | { | |
4686 | char *name, *p, c; | |
4687 | ||
4688 | SKIP_WHITESPACE (); | |
4689 | name = input_line_pointer; | |
4690 | c = get_symbol_end (); | |
4691 | p = input_line_pointer; | |
4692 | if (!*name) | |
4693 | (md.unwind_check == unwind_check_warning | |
4694 | ? as_warn | |
4695 | : as_bad) ("Empty argument of .endp"); | |
4696 | else | |
4697 | { | |
4698 | symbolS *sym = symbol_find (name); | |
4699 | ||
4700 | for (pending = &unwind.proc_pending; pending; pending = pending->next) | |
4701 | { | |
4702 | if (sym == pending->sym) | |
4703 | { | |
4704 | pending->sym = NULL; | |
4705 | break; | |
4706 | } | |
4707 | } | |
4708 | if (!sym || !pending) | |
4709 | as_warn ("`%s' was not specified with previous .proc", name); | |
c538998c JJ |
4710 | } |
4711 | *p = c; | |
4712 | SKIP_WHITESPACE (); | |
4713 | if (*input_line_pointer != ',') | |
4714 | break; | |
4715 | ++input_line_pointer; | |
4716 | } | |
4717 | demand_empty_rest_of_line (); | |
5656b6b8 JB |
4718 | |
4719 | /* Deliberately only checking for the main entry point here; the | |
4720 | language spec even says all arguments to .endp are ignored. */ | |
4721 | if (unwind.proc_pending.sym | |
4722 | && S_GET_NAME (unwind.proc_pending.sym) | |
4723 | && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) | |
4724 | as_warn ("`%s' should be an operand to this .endp", | |
4725 | S_GET_NAME (unwind.proc_pending.sym)); | |
4726 | while (unwind.proc_pending.next) | |
4727 | { | |
4728 | pending = unwind.proc_pending.next; | |
4729 | unwind.proc_pending.next = pending->next; | |
4730 | free (pending); | |
4731 | } | |
4732 | unwind.proc_pending.sym = unwind.info = NULL; | |
800eeca4 JW |
4733 | } |
4734 | ||
4735 | static void | |
4736 | dot_template (template) | |
4737 | int template; | |
4738 | { | |
4739 | CURR_SLOT.user_template = template; | |
4740 | } | |
4741 | ||
4742 | static void | |
4743 | dot_regstk (dummy) | |
2434f565 | 4744 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4745 | { |
4746 | int ins, locs, outs, rots; | |
4747 | ||
4748 | if (is_it_end_of_statement ()) | |
4749 | ins = locs = outs = rots = 0; | |
4750 | else | |
4751 | { | |
4752 | ins = get_absolute_expression (); | |
4753 | if (*input_line_pointer++ != ',') | |
4754 | goto err; | |
4755 | locs = get_absolute_expression (); | |
4756 | if (*input_line_pointer++ != ',') | |
4757 | goto err; | |
4758 | outs = get_absolute_expression (); | |
4759 | if (*input_line_pointer++ != ',') | |
4760 | goto err; | |
4761 | rots = get_absolute_expression (); | |
4762 | } | |
4763 | set_regstack (ins, locs, outs, rots); | |
4764 | return; | |
4765 | ||
4766 | err: | |
4767 | as_bad ("Comma expected"); | |
4768 | ignore_rest_of_line (); | |
4769 | } | |
4770 | ||
4771 | static void | |
4772 | dot_rot (type) | |
4773 | int type; | |
4774 | { | |
4775 | unsigned num_regs, num_alloced = 0; | |
4776 | struct dynreg **drpp, *dr; | |
4777 | int ch, base_reg = 0; | |
4778 | char *name, *start; | |
4779 | size_t len; | |
4780 | ||
4781 | switch (type) | |
4782 | { | |
4783 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4784 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4785 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4786 | default: break; | |
4787 | } | |
4788 | ||
542d6675 | 4789 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4790 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4791 | { | |
4792 | hash_delete (md.dynreg_hash, dr->name); | |
20b36a95 | 4793 | /* FIXME: Free dr->name. */ |
800eeca4 JW |
4794 | dr->num_regs = 0; |
4795 | } | |
4796 | ||
4797 | drpp = &md.dynreg[type]; | |
4798 | while (1) | |
4799 | { | |
4800 | start = input_line_pointer; | |
4801 | ch = get_symbol_end (); | |
20b36a95 | 4802 | len = strlen (ia64_canonicalize_symbol_name (start)); |
800eeca4 | 4803 | *input_line_pointer = ch; |
800eeca4 JW |
4804 | |
4805 | SKIP_WHITESPACE (); | |
4806 | if (*input_line_pointer != '[') | |
4807 | { | |
4808 | as_bad ("Expected '['"); | |
4809 | goto err; | |
4810 | } | |
4811 | ++input_line_pointer; /* skip '[' */ | |
4812 | ||
4813 | num_regs = get_absolute_expression (); | |
4814 | ||
4815 | if (*input_line_pointer++ != ']') | |
4816 | { | |
4817 | as_bad ("Expected ']'"); | |
4818 | goto err; | |
4819 | } | |
4820 | SKIP_WHITESPACE (); | |
4821 | ||
4822 | num_alloced += num_regs; | |
4823 | switch (type) | |
4824 | { | |
4825 | case DYNREG_GR: | |
4826 | if (num_alloced > md.rot.num_regs) | |
4827 | { | |
4828 | as_bad ("Used more than the declared %d rotating registers", | |
4829 | md.rot.num_regs); | |
4830 | goto err; | |
4831 | } | |
4832 | break; | |
4833 | case DYNREG_FR: | |
4834 | if (num_alloced > 96) | |
4835 | { | |
4836 | as_bad ("Used more than the available 96 rotating registers"); | |
4837 | goto err; | |
4838 | } | |
4839 | break; | |
4840 | case DYNREG_PR: | |
4841 | if (num_alloced > 48) | |
4842 | { | |
4843 | as_bad ("Used more than the available 48 rotating registers"); | |
4844 | goto err; | |
4845 | } | |
4846 | break; | |
4847 | ||
4848 | default: | |
4849 | break; | |
4850 | } | |
4851 | ||
800eeca4 JW |
4852 | if (!*drpp) |
4853 | { | |
4854 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4855 | memset (*drpp, 0, sizeof (*dr)); | |
4856 | } | |
4857 | ||
20b36a95 JB |
4858 | name = obstack_alloc (¬es, len + 1); |
4859 | memcpy (name, start, len); | |
4860 | name[len] = '\0'; | |
4861 | ||
800eeca4 JW |
4862 | dr = *drpp; |
4863 | dr->name = name; | |
4864 | dr->num_regs = num_regs; | |
4865 | dr->base = base_reg; | |
4866 | drpp = &dr->next; | |
4867 | base_reg += num_regs; | |
4868 | ||
4869 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4870 | { | |
4871 | as_bad ("Attempt to redefine register set `%s'", name); | |
20b36a95 | 4872 | obstack_free (¬es, name); |
800eeca4 JW |
4873 | goto err; |
4874 | } | |
4875 | ||
4876 | if (*input_line_pointer != ',') | |
4877 | break; | |
4878 | ++input_line_pointer; /* skip comma */ | |
4879 | SKIP_WHITESPACE (); | |
4880 | } | |
4881 | demand_empty_rest_of_line (); | |
4882 | return; | |
4883 | ||
4884 | err: | |
4885 | ignore_rest_of_line (); | |
4886 | } | |
4887 | ||
4888 | static void | |
4889 | dot_byteorder (byteorder) | |
4890 | int byteorder; | |
4891 | { | |
10a98291 L |
4892 | segment_info_type *seginfo = seg_info (now_seg); |
4893 | ||
4894 | if (byteorder == -1) | |
4895 | { | |
4896 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4897 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4898 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4899 | } | |
4900 | else | |
4901 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4902 | ||
4903 | if (target_big_endian != byteorder) | |
4904 | { | |
4905 | target_big_endian = byteorder; | |
4906 | if (target_big_endian) | |
4907 | { | |
4908 | ia64_number_to_chars = number_to_chars_bigendian; | |
4909 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4910 | } | |
4911 | else | |
4912 | { | |
4913 | ia64_number_to_chars = number_to_chars_littleendian; | |
4914 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4915 | } | |
4916 | } | |
800eeca4 JW |
4917 | } |
4918 | ||
4919 | static void | |
4920 | dot_psr (dummy) | |
2434f565 | 4921 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4922 | { |
4923 | char *option; | |
4924 | int ch; | |
4925 | ||
4926 | while (1) | |
4927 | { | |
4928 | option = input_line_pointer; | |
4929 | ch = get_symbol_end (); | |
4930 | if (strcmp (option, "lsb") == 0) | |
4931 | md.flags &= ~EF_IA_64_BE; | |
4932 | else if (strcmp (option, "msb") == 0) | |
4933 | md.flags |= EF_IA_64_BE; | |
4934 | else if (strcmp (option, "abi32") == 0) | |
4935 | md.flags &= ~EF_IA_64_ABI64; | |
4936 | else if (strcmp (option, "abi64") == 0) | |
4937 | md.flags |= EF_IA_64_ABI64; | |
4938 | else | |
4939 | as_bad ("Unknown psr option `%s'", option); | |
4940 | *input_line_pointer = ch; | |
4941 | ||
4942 | SKIP_WHITESPACE (); | |
4943 | if (*input_line_pointer != ',') | |
4944 | break; | |
4945 | ||
4946 | ++input_line_pointer; | |
4947 | SKIP_WHITESPACE (); | |
4948 | } | |
4949 | demand_empty_rest_of_line (); | |
4950 | } | |
4951 | ||
800eeca4 JW |
4952 | static void |
4953 | dot_ln (dummy) | |
2434f565 | 4954 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4955 | { |
4956 | new_logical_line (0, get_absolute_expression ()); | |
4957 | demand_empty_rest_of_line (); | |
4958 | } | |
4959 | ||
ef6a2b41 JB |
4960 | static void |
4961 | cross_section (ref, cons, ua) | |
4962 | int ref; | |
4963 | void (*cons) PARAMS((int)); | |
4964 | int ua; | |
800eeca4 | 4965 | { |
ef6a2b41 JB |
4966 | char *start, *end; |
4967 | int saved_auto_align; | |
4968 | unsigned int section_count; | |
800eeca4 JW |
4969 | |
4970 | SKIP_WHITESPACE (); | |
ef6a2b41 JB |
4971 | start = input_line_pointer; |
4972 | if (*start == '"') | |
4973 | { | |
4974 | int len; | |
4975 | char *name; | |
4976 | ||
b3f19c14 | 4977 | name = demand_copy_C_string (&len); |
ef6a2b41 JB |
4978 | obstack_free(¬es, name); |
4979 | if (!name) | |
4980 | { | |
4981 | ignore_rest_of_line (); | |
4982 | return; | |
4983 | } | |
4984 | } | |
b3f19c14 | 4985 | else |
800eeca4 | 4986 | { |
b3f19c14 JB |
4987 | char c = get_symbol_end (); |
4988 | ||
4989 | if (input_line_pointer == start) | |
4990 | { | |
4991 | as_bad ("Missing section name"); | |
4992 | ignore_rest_of_line (); | |
ef6a2b41 | 4993 | return; |
b3f19c14 | 4994 | } |
b3f19c14 | 4995 | *input_line_pointer = c; |
800eeca4 | 4996 | } |
ef6a2b41 | 4997 | end = input_line_pointer; |
800eeca4 JW |
4998 | SKIP_WHITESPACE (); |
4999 | if (*input_line_pointer != ',') | |
5000 | { | |
5001 | as_bad ("Comma expected after section name"); | |
5002 | ignore_rest_of_line (); | |
ef6a2b41 | 5003 | return; |
800eeca4 | 5004 | } |
ef6a2b41 JB |
5005 | *end = '\0'; |
5006 | end = input_line_pointer + 1; /* skip comma */ | |
5007 | input_line_pointer = start; | |
5008 | md.keep_pending_output = 1; | |
5009 | section_count = bfd_count_sections(stdoutput); | |
5010 | obj_elf_section (0); | |
5011 | if (section_count != bfd_count_sections(stdoutput)) | |
5012 | as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."); | |
5013 | input_line_pointer = end; | |
5014 | saved_auto_align = md.auto_align; | |
5015 | if (ua) | |
5016 | md.auto_align = 0; | |
5017 | (*cons) (ref); | |
5018 | if (ua) | |
5019 | md.auto_align = saved_auto_align; | |
5020 | obj_elf_previous (0); | |
5021 | md.keep_pending_output = 0; | |
800eeca4 JW |
5022 | } |
5023 | ||
5024 | static void | |
5025 | dot_xdata (size) | |
5026 | int size; | |
5027 | { | |
ef6a2b41 | 5028 | cross_section (size, cons, 0); |
800eeca4 JW |
5029 | } |
5030 | ||
5031 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 5032 | |
800eeca4 JW |
5033 | static void |
5034 | stmt_float_cons (kind) | |
5035 | int kind; | |
5036 | { | |
165a7f90 | 5037 | size_t alignment; |
800eeca4 JW |
5038 | |
5039 | switch (kind) | |
5040 | { | |
165a7f90 L |
5041 | case 'd': |
5042 | alignment = 8; | |
5043 | break; | |
5044 | ||
5045 | case 'x': | |
5046 | case 'X': | |
5047 | alignment = 16; | |
5048 | break; | |
800eeca4 JW |
5049 | |
5050 | case 'f': | |
5051 | default: | |
165a7f90 | 5052 | alignment = 4; |
800eeca4 JW |
5053 | break; |
5054 | } | |
165a7f90 | 5055 | ia64_do_align (alignment); |
800eeca4 JW |
5056 | float_cons (kind); |
5057 | } | |
5058 | ||
5059 | static void | |
5060 | stmt_cons_ua (size) | |
5061 | int size; | |
5062 | { | |
5063 | int saved_auto_align = md.auto_align; | |
5064 | ||
5065 | md.auto_align = 0; | |
5066 | cons (size); | |
5067 | md.auto_align = saved_auto_align; | |
5068 | } | |
5069 | ||
5070 | static void | |
5071 | dot_xfloat_cons (kind) | |
5072 | int kind; | |
5073 | { | |
ef6a2b41 | 5074 | cross_section (kind, stmt_float_cons, 0); |
800eeca4 JW |
5075 | } |
5076 | ||
5077 | static void | |
5078 | dot_xstringer (zero) | |
5079 | int zero; | |
5080 | { | |
ef6a2b41 | 5081 | cross_section (zero, stringer, 0); |
800eeca4 JW |
5082 | } |
5083 | ||
5084 | static void | |
5085 | dot_xdata_ua (size) | |
5086 | int size; | |
5087 | { | |
ef6a2b41 | 5088 | cross_section (size, cons, 1); |
800eeca4 JW |
5089 | } |
5090 | ||
5091 | static void | |
5092 | dot_xfloat_cons_ua (kind) | |
5093 | int kind; | |
5094 | { | |
ef6a2b41 | 5095 | cross_section (kind, float_cons, 1); |
800eeca4 JW |
5096 | } |
5097 | ||
5098 | /* .reg.val <regname>,value */ | |
542d6675 | 5099 | |
800eeca4 JW |
5100 | static void |
5101 | dot_reg_val (dummy) | |
2434f565 | 5102 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5103 | { |
5104 | expressionS reg; | |
5105 | ||
5106 | expression (®); | |
5107 | if (reg.X_op != O_register) | |
5108 | { | |
5109 | as_bad (_("Register name expected")); | |
5110 | ignore_rest_of_line (); | |
5111 | } | |
5112 | else if (*input_line_pointer++ != ',') | |
5113 | { | |
5114 | as_bad (_("Comma expected")); | |
5115 | ignore_rest_of_line (); | |
5116 | } | |
197865e8 | 5117 | else |
800eeca4 JW |
5118 | { |
5119 | valueT value = get_absolute_expression (); | |
5120 | int regno = reg.X_add_number; | |
a66d2bb7 | 5121 | if (regno <= REG_GR || regno > REG_GR + 127) |
542d6675 | 5122 | as_warn (_("Register value annotation ignored")); |
800eeca4 | 5123 | else |
542d6675 KH |
5124 | { |
5125 | gr_values[regno - REG_GR].known = 1; | |
5126 | gr_values[regno - REG_GR].value = value; | |
5127 | gr_values[regno - REG_GR].path = md.path; | |
5128 | } | |
800eeca4 JW |
5129 | } |
5130 | demand_empty_rest_of_line (); | |
5131 | } | |
5132 | ||
5e819f9c JW |
5133 | /* |
5134 | .serialize.data | |
5135 | .serialize.instruction | |
5136 | */ | |
5137 | static void | |
5138 | dot_serialize (type) | |
5139 | int type; | |
5140 | { | |
5141 | insn_group_break (0, 0, 0); | |
5142 | if (type) | |
5143 | instruction_serialization (); | |
5144 | else | |
5145 | data_serialization (); | |
5146 | insn_group_break (0, 0, 0); | |
5147 | demand_empty_rest_of_line (); | |
5148 | } | |
5149 | ||
197865e8 | 5150 | /* select dv checking mode |
800eeca4 JW |
5151 | .auto |
5152 | .explicit | |
5153 | .default | |
5154 | ||
197865e8 | 5155 | A stop is inserted when changing modes |
800eeca4 | 5156 | */ |
542d6675 | 5157 | |
800eeca4 JW |
5158 | static void |
5159 | dot_dv_mode (type) | |
542d6675 | 5160 | int type; |
800eeca4 JW |
5161 | { |
5162 | if (md.manual_bundling) | |
5163 | as_warn (_("Directive invalid within a bundle")); | |
5164 | ||
5165 | if (type == 'E' || type == 'A') | |
5166 | md.mode_explicitly_set = 0; | |
5167 | else | |
5168 | md.mode_explicitly_set = 1; | |
5169 | ||
5170 | md.detect_dv = 1; | |
5171 | switch (type) | |
5172 | { | |
5173 | case 'A': | |
5174 | case 'a': | |
5175 | if (md.explicit_mode) | |
542d6675 | 5176 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5177 | md.explicit_mode = 0; |
5178 | break; | |
5179 | case 'E': | |
5180 | case 'e': | |
5181 | if (!md.explicit_mode) | |
542d6675 | 5182 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5183 | md.explicit_mode = 1; |
5184 | break; | |
5185 | default: | |
5186 | case 'd': | |
5187 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 5188 | insn_group_break (1, 0, 0); |
800eeca4 JW |
5189 | md.explicit_mode = md.default_explicit_mode; |
5190 | md.mode_explicitly_set = 0; | |
5191 | break; | |
5192 | } | |
5193 | } | |
5194 | ||
5195 | static void | |
5196 | print_prmask (mask) | |
542d6675 | 5197 | valueT mask; |
800eeca4 JW |
5198 | { |
5199 | int regno; | |
5200 | char *comma = ""; | |
542d6675 | 5201 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 5202 | { |
542d6675 KH |
5203 | if (mask & ((valueT) 1 << regno)) |
5204 | { | |
5205 | fprintf (stderr, "%s p%d", comma, regno); | |
5206 | comma = ","; | |
5207 | } | |
800eeca4 JW |
5208 | } |
5209 | } | |
5210 | ||
5211 | /* | |
05ee4b0f JB |
5212 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) |
5213 | .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) | |
5214 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) | |
800eeca4 JW |
5215 | .pred.safe_across_calls p1 [, p2 [,...]] |
5216 | */ | |
542d6675 | 5217 | |
800eeca4 JW |
5218 | static void |
5219 | dot_pred_rel (type) | |
542d6675 | 5220 | int type; |
800eeca4 JW |
5221 | { |
5222 | valueT mask = 0; | |
5223 | int count = 0; | |
5224 | int p1 = -1, p2 = -1; | |
5225 | ||
5226 | if (type == 0) | |
5227 | { | |
05ee4b0f | 5228 | if (*input_line_pointer == '"') |
542d6675 KH |
5229 | { |
5230 | int len; | |
5231 | char *form = demand_copy_C_string (&len); | |
05ee4b0f | 5232 | |
542d6675 KH |
5233 | if (strcmp (form, "mutex") == 0) |
5234 | type = 'm'; | |
5235 | else if (strcmp (form, "clear") == 0) | |
5236 | type = 'c'; | |
5237 | else if (strcmp (form, "imply") == 0) | |
5238 | type = 'i'; | |
05ee4b0f JB |
5239 | obstack_free (¬es, form); |
5240 | } | |
5241 | else if (*input_line_pointer == '@') | |
5242 | { | |
5243 | char *form = ++input_line_pointer; | |
5244 | char c = get_symbol_end(); | |
5245 | ||
5246 | if (strcmp (form, "mutex") == 0) | |
5247 | type = 'm'; | |
5248 | else if (strcmp (form, "clear") == 0) | |
5249 | type = 'c'; | |
5250 | else if (strcmp (form, "imply") == 0) | |
5251 | type = 'i'; | |
5252 | *input_line_pointer = c; | |
5253 | } | |
5254 | else | |
5255 | { | |
5256 | as_bad (_("Missing predicate relation type")); | |
5257 | ignore_rest_of_line (); | |
5258 | return; | |
5259 | } | |
5260 | if (type == 0) | |
5261 | { | |
5262 | as_bad (_("Unrecognized predicate relation type")); | |
5263 | ignore_rest_of_line (); | |
5264 | return; | |
542d6675 | 5265 | } |
800eeca4 | 5266 | if (*input_line_pointer == ',') |
542d6675 | 5267 | ++input_line_pointer; |
800eeca4 JW |
5268 | SKIP_WHITESPACE (); |
5269 | } | |
5270 | ||
5271 | SKIP_WHITESPACE (); | |
5272 | while (1) | |
5273 | { | |
20b36a95 | 5274 | valueT bits = 1; |
800eeca4 | 5275 | int regno; |
20b36a95 JB |
5276 | expressionS pr, *pr1, *pr2; |
5277 | ||
5278 | expression (&pr); | |
5279 | if (pr.X_op == O_register | |
5280 | && pr.X_add_number >= REG_P | |
5281 | && pr.X_add_number <= REG_P + 63) | |
5282 | { | |
5283 | regno = pr.X_add_number - REG_P; | |
5284 | bits <<= regno; | |
5285 | count++; | |
5286 | if (p1 == -1) | |
5287 | p1 = regno; | |
5288 | else if (p2 == -1) | |
5289 | p2 = regno; | |
5290 | } | |
5291 | else if (type != 'i' | |
5292 | && pr.X_op == O_subtract | |
5293 | && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) | |
5294 | && pr1->X_op == O_register | |
5295 | && pr1->X_add_number >= REG_P | |
5296 | && pr1->X_add_number <= REG_P + 63 | |
5297 | && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) | |
5298 | && pr2->X_op == O_register | |
5299 | && pr2->X_add_number >= REG_P | |
5300 | && pr2->X_add_number <= REG_P + 63) | |
5301 | { | |
5302 | /* It's a range. */ | |
5303 | int stop; | |
5304 | ||
5305 | regno = pr1->X_add_number - REG_P; | |
5306 | stop = pr2->X_add_number - REG_P; | |
5307 | if (regno >= stop) | |
542d6675 KH |
5308 | { |
5309 | as_bad (_("Bad register range")); | |
5310 | ignore_rest_of_line (); | |
5311 | return; | |
5312 | } | |
20b36a95 JB |
5313 | bits = ((bits << stop) << 1) - (bits << regno); |
5314 | count += stop - regno + 1; | |
5315 | } | |
5316 | else | |
5317 | { | |
5318 | as_bad (_("Predicate register expected")); | |
5319 | ignore_rest_of_line (); | |
5320 | return; | |
542d6675 | 5321 | } |
20b36a95 JB |
5322 | if (mask & bits) |
5323 | as_warn (_("Duplicate predicate register ignored")); | |
5324 | mask |= bits; | |
800eeca4 | 5325 | if (*input_line_pointer != ',') |
542d6675 | 5326 | break; |
800eeca4 JW |
5327 | ++input_line_pointer; |
5328 | SKIP_WHITESPACE (); | |
5329 | } | |
5330 | ||
5331 | switch (type) | |
5332 | { | |
5333 | case 'c': | |
5334 | if (count == 0) | |
542d6675 | 5335 | mask = ~(valueT) 0; |
800eeca4 | 5336 | clear_qp_mutex (mask); |
197865e8 | 5337 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
5338 | break; |
5339 | case 'i': | |
5340 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 5341 | as_bad (_("Predicate source and target required")); |
800eeca4 | 5342 | else if (p1 == 0 || p2 == 0) |
542d6675 | 5343 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 5344 | else |
542d6675 | 5345 | add_qp_imply (p1, p2); |
800eeca4 JW |
5346 | break; |
5347 | case 'm': | |
5348 | if (count < 2) | |
542d6675 KH |
5349 | { |
5350 | as_bad (_("At least two PR arguments expected")); | |
5351 | break; | |
5352 | } | |
800eeca4 | 5353 | else if (mask & 1) |
542d6675 KH |
5354 | { |
5355 | as_bad (_("Use of p0 is not valid in this context")); | |
5356 | break; | |
5357 | } | |
800eeca4 JW |
5358 | add_qp_mutex (mask); |
5359 | break; | |
5360 | case 's': | |
5361 | /* note that we don't override any existing relations */ | |
5362 | if (count == 0) | |
542d6675 KH |
5363 | { |
5364 | as_bad (_("At least one PR argument expected")); | |
5365 | break; | |
5366 | } | |
800eeca4 | 5367 | if (md.debug_dv) |
542d6675 KH |
5368 | { |
5369 | fprintf (stderr, "Safe across calls: "); | |
5370 | print_prmask (mask); | |
5371 | fprintf (stderr, "\n"); | |
5372 | } | |
800eeca4 JW |
5373 | qp_safe_across_calls = mask; |
5374 | break; | |
5375 | } | |
5376 | demand_empty_rest_of_line (); | |
5377 | } | |
5378 | ||
5379 | /* .entry label [, label [, ...]] | |
5380 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
5381 | Otherwise, only global labels are considered entry points. */ |
5382 | ||
800eeca4 JW |
5383 | static void |
5384 | dot_entry (dummy) | |
2434f565 | 5385 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5386 | { |
5387 | const char *err; | |
5388 | char *name; | |
5389 | int c; | |
5390 | symbolS *symbolP; | |
5391 | ||
5392 | do | |
5393 | { | |
5394 | name = input_line_pointer; | |
5395 | c = get_symbol_end (); | |
5396 | symbolP = symbol_find_or_make (name); | |
5397 | ||
5398 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
5399 | if (err) | |
542d6675 KH |
5400 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
5401 | name, err); | |
800eeca4 JW |
5402 | |
5403 | *input_line_pointer = c; | |
5404 | SKIP_WHITESPACE (); | |
5405 | c = *input_line_pointer; | |
5406 | if (c == ',') | |
5407 | { | |
5408 | input_line_pointer++; | |
5409 | SKIP_WHITESPACE (); | |
5410 | if (*input_line_pointer == '\n') | |
5411 | c = '\n'; | |
5412 | } | |
5413 | } | |
5414 | while (c == ','); | |
5415 | ||
5416 | demand_empty_rest_of_line (); | |
5417 | } | |
5418 | ||
197865e8 | 5419 | /* .mem.offset offset, base |
542d6675 KH |
5420 | "base" is used to distinguish between offsets from a different base. */ |
5421 | ||
800eeca4 JW |
5422 | static void |
5423 | dot_mem_offset (dummy) | |
2434f565 | 5424 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
5425 | { |
5426 | md.mem_offset.hint = 1; | |
5427 | md.mem_offset.offset = get_absolute_expression (); | |
5428 | if (*input_line_pointer != ',') | |
5429 | { | |
5430 | as_bad (_("Comma expected")); | |
5431 | ignore_rest_of_line (); | |
5432 | return; | |
5433 | } | |
5434 | ++input_line_pointer; | |
5435 | md.mem_offset.base = get_absolute_expression (); | |
5436 | demand_empty_rest_of_line (); | |
5437 | } | |
5438 | ||
542d6675 | 5439 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
5440 | const pseudo_typeS md_pseudo_table[] = |
5441 | { | |
5442 | { "radix", dot_radix, 0 }, | |
5443 | { "lcomm", s_lcomm_bytes, 1 }, | |
196e8040 | 5444 | { "loc", dot_loc, 0 }, |
800eeca4 JW |
5445 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, |
5446 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
5447 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
5448 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
5449 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
5450 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
5451 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
5452 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
5453 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
5454 | { "proc", dot_proc, 0 }, |
5455 | { "body", dot_body, 0 }, | |
5456 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 5457 | { "endp", dot_endp, 0 }, |
2434f565 JW |
5458 | |
5459 | { "fframe", dot_fframe, 0 }, | |
5460 | { "vframe", dot_vframe, 0 }, | |
5461 | { "vframesp", dot_vframesp, 0 }, | |
e4e8248d | 5462 | { "vframepsp", dot_vframesp, 1 }, |
2434f565 JW |
5463 | { "save", dot_save, 0 }, |
5464 | { "restore", dot_restore, 0 }, | |
5465 | { "restorereg", dot_restorereg, 0 }, | |
e4e8248d | 5466 | { "restorereg.p", dot_restorereg, 1 }, |
2434f565 JW |
5467 | { "handlerdata", dot_handlerdata, 0 }, |
5468 | { "unwentry", dot_unwentry, 0 }, | |
5469 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
5470 | { "savesp", dot_savemem, 0 }, |
5471 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
5472 | { "save.g", dot_saveg, 0 }, |
5473 | { "save.f", dot_savef, 0 }, | |
5474 | { "save.b", dot_saveb, 0 }, | |
5475 | { "save.gf", dot_savegf, 0 }, | |
5476 | { "spill", dot_spill, 0 }, | |
5477 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5478 | { "spillsp", dot_spillmem, 0 }, |
5479 | { "spillpsp", dot_spillmem, 1 }, | |
e4e8248d JB |
5480 | { "spillreg.p", dot_spillreg, 1 }, |
5481 | { "spillsp.p", dot_spillmem, ~0 }, | |
5482 | { "spillpsp.p", dot_spillmem, ~1 }, | |
2434f565 JW |
5483 | { "label_state", dot_label_state, 0 }, |
5484 | { "copy_state", dot_copy_state, 0 }, | |
5485 | { "unwabi", dot_unwabi, 0 }, | |
5486 | { "personality", dot_personality, 0 }, | |
800eeca4 JW |
5487 | { "mii", dot_template, 0x0 }, |
5488 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5489 | { "mlx", dot_template, 0x2 }, | |
5490 | { "mmi", dot_template, 0x4 }, | |
5491 | { "mfi", dot_template, 0x6 }, | |
5492 | { "mmf", dot_template, 0x7 }, | |
5493 | { "mib", dot_template, 0x8 }, | |
5494 | { "mbb", dot_template, 0x9 }, | |
5495 | { "bbb", dot_template, 0xb }, | |
5496 | { "mmb", dot_template, 0xc }, | |
5497 | { "mfb", dot_template, 0xe }, | |
d9201763 | 5498 | { "align", dot_align, 0 }, |
800eeca4 JW |
5499 | { "regstk", dot_regstk, 0 }, |
5500 | { "rotr", dot_rot, DYNREG_GR }, | |
5501 | { "rotf", dot_rot, DYNREG_FR }, | |
5502 | { "rotp", dot_rot, DYNREG_PR }, | |
5503 | { "lsb", dot_byteorder, 0 }, | |
5504 | { "msb", dot_byteorder, 1 }, | |
5505 | { "psr", dot_psr, 0 }, | |
5506 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5507 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5508 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5509 | ||
5510 | { "xdata1", dot_xdata, 1 }, | |
5511 | { "xdata2", dot_xdata, 2 }, | |
5512 | { "xdata4", dot_xdata, 4 }, | |
5513 | { "xdata8", dot_xdata, 8 }, | |
b3f19c14 | 5514 | { "xdata16", dot_xdata, 16 }, |
800eeca4 JW |
5515 | { "xreal4", dot_xfloat_cons, 'f' }, |
5516 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5517 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5518 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5519 | { "xstring", dot_xstringer, 0 }, |
5520 | { "xstringz", dot_xstringer, 1 }, | |
5521 | ||
542d6675 | 5522 | /* unaligned versions: */ |
800eeca4 JW |
5523 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5524 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5525 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
b3f19c14 | 5526 | { "xdata16.ua", dot_xdata_ua, 16 }, |
800eeca4 JW |
5527 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, |
5528 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5529 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5530 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5531 | |
5532 | /* annotations/DV checking support */ | |
5533 | { "entry", dot_entry, 0 }, | |
2434f565 | 5534 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5535 | { "pred.rel", dot_pred_rel, 0 }, |
5536 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5537 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5538 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5539 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5540 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5541 | { "serialize.data", dot_serialize, 0 }, |
5542 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5543 | { "auto", dot_dv_mode, 'a' }, |
5544 | { "explicit", dot_dv_mode, 'e' }, | |
5545 | { "default", dot_dv_mode, 'd' }, | |
5546 | ||
87885043 JW |
5547 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5548 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5549 | tell it that these ones are supposed to be unaligned. Long term, | |
5550 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5551 | are aligned by default. */ | |
5552 | {"2byte", stmt_cons_ua, 2}, | |
5553 | {"4byte", stmt_cons_ua, 4}, | |
5554 | {"8byte", stmt_cons_ua, 8}, | |
5555 | ||
800eeca4 JW |
5556 | { NULL, 0, 0 } |
5557 | }; | |
5558 | ||
5559 | static const struct pseudo_opcode | |
5560 | { | |
5561 | const char *name; | |
5562 | void (*handler) (int); | |
5563 | int arg; | |
5564 | } | |
5565 | pseudo_opcode[] = | |
5566 | { | |
5567 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5568 | { "data1", cons, 1 }, | |
5569 | { "data2", cons, 2 }, | |
5570 | { "data4", cons, 4 }, | |
5571 | { "data8", cons, 8 }, | |
3969b680 | 5572 | { "data16", cons, 16 }, |
800eeca4 JW |
5573 | { "real4", stmt_float_cons, 'f' }, |
5574 | { "real8", stmt_float_cons, 'd' }, | |
5575 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5576 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5577 | { "string", stringer, 0 }, |
5578 | { "stringz", stringer, 1 }, | |
5579 | ||
542d6675 | 5580 | /* unaligned versions: */ |
800eeca4 JW |
5581 | { "data2.ua", stmt_cons_ua, 2 }, |
5582 | { "data4.ua", stmt_cons_ua, 4 }, | |
5583 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5584 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5585 | { "real4.ua", float_cons, 'f' }, |
5586 | { "real8.ua", float_cons, 'd' }, | |
5587 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5588 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5589 | }; |
5590 | ||
5591 | /* Declare a register by creating a symbol for it and entering it in | |
5592 | the symbol table. */ | |
542d6675 KH |
5593 | |
5594 | static symbolS * | |
800eeca4 JW |
5595 | declare_register (name, regnum) |
5596 | const char *name; | |
5597 | int regnum; | |
5598 | { | |
5599 | const char *err; | |
5600 | symbolS *sym; | |
5601 | ||
5602 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5603 | ||
5604 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5605 | if (err) | |
5606 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5607 | name, err); | |
5608 | ||
5609 | return sym; | |
5610 | } | |
5611 | ||
5612 | static void | |
5613 | declare_register_set (prefix, num_regs, base_regnum) | |
5614 | const char *prefix; | |
5615 | int num_regs; | |
5616 | int base_regnum; | |
5617 | { | |
5618 | char name[8]; | |
5619 | int i; | |
5620 | ||
5621 | for (i = 0; i < num_regs; ++i) | |
5622 | { | |
5623 | sprintf (name, "%s%u", prefix, i); | |
5624 | declare_register (name, base_regnum + i); | |
5625 | } | |
5626 | } | |
5627 | ||
5628 | static unsigned int | |
5629 | operand_width (opnd) | |
5630 | enum ia64_opnd opnd; | |
5631 | { | |
5632 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5633 | unsigned int bits = 0; | |
5634 | int i; | |
5635 | ||
5636 | bits = 0; | |
5637 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5638 | bits += odesc->field[i].bits; | |
5639 | ||
5640 | return bits; | |
5641 | } | |
5642 | ||
87f8eb97 | 5643 | static enum operand_match_result |
800eeca4 JW |
5644 | operand_match (idesc, index, e) |
5645 | const struct ia64_opcode *idesc; | |
5646 | int index; | |
5647 | expressionS *e; | |
5648 | { | |
5649 | enum ia64_opnd opnd = idesc->operands[index]; | |
5650 | int bits, relocatable = 0; | |
5651 | struct insn_fix *fix; | |
5652 | bfd_signed_vma val; | |
5653 | ||
5654 | switch (opnd) | |
5655 | { | |
542d6675 | 5656 | /* constants: */ |
800eeca4 JW |
5657 | |
5658 | case IA64_OPND_AR_CCV: | |
5659 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5660 | return OPERAND_MATCH; |
800eeca4 JW |
5661 | break; |
5662 | ||
c10d9d8f JW |
5663 | case IA64_OPND_AR_CSD: |
5664 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5665 | return OPERAND_MATCH; | |
5666 | break; | |
5667 | ||
800eeca4 JW |
5668 | case IA64_OPND_AR_PFS: |
5669 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5670 | return OPERAND_MATCH; |
800eeca4 JW |
5671 | break; |
5672 | ||
5673 | case IA64_OPND_GR0: | |
5674 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5675 | return OPERAND_MATCH; |
800eeca4 JW |
5676 | break; |
5677 | ||
5678 | case IA64_OPND_IP: | |
5679 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5680 | return OPERAND_MATCH; |
800eeca4 JW |
5681 | break; |
5682 | ||
5683 | case IA64_OPND_PR: | |
5684 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5685 | return OPERAND_MATCH; |
800eeca4 JW |
5686 | break; |
5687 | ||
5688 | case IA64_OPND_PR_ROT: | |
5689 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5690 | return OPERAND_MATCH; |
800eeca4 JW |
5691 | break; |
5692 | ||
5693 | case IA64_OPND_PSR: | |
5694 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5695 | return OPERAND_MATCH; |
800eeca4 JW |
5696 | break; |
5697 | ||
5698 | case IA64_OPND_PSR_L: | |
5699 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5700 | return OPERAND_MATCH; |
800eeca4 JW |
5701 | break; |
5702 | ||
5703 | case IA64_OPND_PSR_UM: | |
5704 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5705 | return OPERAND_MATCH; |
800eeca4 JW |
5706 | break; |
5707 | ||
5708 | case IA64_OPND_C1: | |
87f8eb97 JW |
5709 | if (e->X_op == O_constant) |
5710 | { | |
5711 | if (e->X_add_number == 1) | |
5712 | return OPERAND_MATCH; | |
5713 | else | |
5714 | return OPERAND_OUT_OF_RANGE; | |
5715 | } | |
800eeca4 JW |
5716 | break; |
5717 | ||
5718 | case IA64_OPND_C8: | |
87f8eb97 JW |
5719 | if (e->X_op == O_constant) |
5720 | { | |
5721 | if (e->X_add_number == 8) | |
5722 | return OPERAND_MATCH; | |
5723 | else | |
5724 | return OPERAND_OUT_OF_RANGE; | |
5725 | } | |
800eeca4 JW |
5726 | break; |
5727 | ||
5728 | case IA64_OPND_C16: | |
87f8eb97 JW |
5729 | if (e->X_op == O_constant) |
5730 | { | |
5731 | if (e->X_add_number == 16) | |
5732 | return OPERAND_MATCH; | |
5733 | else | |
5734 | return OPERAND_OUT_OF_RANGE; | |
5735 | } | |
800eeca4 JW |
5736 | break; |
5737 | ||
542d6675 | 5738 | /* register operands: */ |
800eeca4 JW |
5739 | |
5740 | case IA64_OPND_AR3: | |
5741 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5742 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5743 | return OPERAND_MATCH; |
800eeca4 JW |
5744 | break; |
5745 | ||
5746 | case IA64_OPND_B1: | |
5747 | case IA64_OPND_B2: | |
5748 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5749 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5750 | return OPERAND_MATCH; |
800eeca4 JW |
5751 | break; |
5752 | ||
5753 | case IA64_OPND_CR3: | |
5754 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5755 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5756 | return OPERAND_MATCH; |
800eeca4 JW |
5757 | break; |
5758 | ||
5759 | case IA64_OPND_F1: | |
5760 | case IA64_OPND_F2: | |
5761 | case IA64_OPND_F3: | |
5762 | case IA64_OPND_F4: | |
5763 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5764 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5765 | return OPERAND_MATCH; |
800eeca4 JW |
5766 | break; |
5767 | ||
5768 | case IA64_OPND_P1: | |
5769 | case IA64_OPND_P2: | |
5770 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5771 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5772 | return OPERAND_MATCH; |
800eeca4 JW |
5773 | break; |
5774 | ||
5775 | case IA64_OPND_R1: | |
5776 | case IA64_OPND_R2: | |
5777 | case IA64_OPND_R3: | |
5778 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5779 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5780 | return OPERAND_MATCH; |
800eeca4 JW |
5781 | break; |
5782 | ||
5783 | case IA64_OPND_R3_2: | |
87f8eb97 | 5784 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5785 | { |
87f8eb97 JW |
5786 | if (e->X_add_number < REG_GR + 4) |
5787 | return OPERAND_MATCH; | |
5788 | else if (e->X_add_number < REG_GR + 128) | |
5789 | return OPERAND_OUT_OF_RANGE; | |
5790 | } | |
800eeca4 JW |
5791 | break; |
5792 | ||
542d6675 | 5793 | /* indirect operands: */ |
800eeca4 JW |
5794 | case IA64_OPND_CPUID_R3: |
5795 | case IA64_OPND_DBR_R3: | |
5796 | case IA64_OPND_DTR_R3: | |
5797 | case IA64_OPND_ITR_R3: | |
5798 | case IA64_OPND_IBR_R3: | |
5799 | case IA64_OPND_MSR_R3: | |
5800 | case IA64_OPND_PKR_R3: | |
5801 | case IA64_OPND_PMC_R3: | |
5802 | case IA64_OPND_PMD_R3: | |
5803 | case IA64_OPND_RR_R3: | |
5804 | if (e->X_op == O_index && e->X_op_symbol | |
5805 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5806 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5807 | return OPERAND_MATCH; |
800eeca4 JW |
5808 | break; |
5809 | ||
5810 | case IA64_OPND_MR3: | |
5811 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5812 | return OPERAND_MATCH; |
800eeca4 JW |
5813 | break; |
5814 | ||
542d6675 | 5815 | /* immediate operands: */ |
800eeca4 JW |
5816 | case IA64_OPND_CNT2a: |
5817 | case IA64_OPND_LEN4: | |
5818 | case IA64_OPND_LEN6: | |
5819 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5820 | if (e->X_op == O_constant) |
5821 | { | |
5822 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5823 | return OPERAND_MATCH; | |
5824 | else | |
5825 | return OPERAND_OUT_OF_RANGE; | |
5826 | } | |
800eeca4 JW |
5827 | break; |
5828 | ||
5829 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5830 | if (e->X_op == O_constant) |
5831 | { | |
5832 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5833 | return OPERAND_MATCH; | |
5834 | else | |
5835 | return OPERAND_OUT_OF_RANGE; | |
5836 | } | |
800eeca4 JW |
5837 | break; |
5838 | ||
5839 | case IA64_OPND_CNT2c: | |
5840 | val = e->X_add_number; | |
87f8eb97 JW |
5841 | if (e->X_op == O_constant) |
5842 | { | |
5843 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5844 | return OPERAND_MATCH; | |
5845 | else | |
5846 | return OPERAND_OUT_OF_RANGE; | |
5847 | } | |
800eeca4 JW |
5848 | break; |
5849 | ||
5850 | case IA64_OPND_SOR: | |
5851 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5852 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5853 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5854 | case IA64_OPND_SOF: |
5855 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5856 | if (e->X_op == O_constant) |
5857 | { | |
5858 | if ((bfd_vma) e->X_add_number <= 96) | |
5859 | return OPERAND_MATCH; | |
5860 | else | |
5861 | return OPERAND_OUT_OF_RANGE; | |
5862 | } | |
800eeca4 JW |
5863 | break; |
5864 | ||
5865 | case IA64_OPND_IMMU62: | |
5866 | if (e->X_op == O_constant) | |
542d6675 | 5867 | { |
800eeca4 | 5868 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5869 | return OPERAND_MATCH; |
5870 | else | |
5871 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5872 | } |
197865e8 | 5873 | else |
542d6675 KH |
5874 | { |
5875 | /* FIXME -- need 62-bit relocation type */ | |
5876 | as_bad (_("62-bit relocation not yet implemented")); | |
5877 | } | |
800eeca4 JW |
5878 | break; |
5879 | ||
5880 | case IA64_OPND_IMMU64: | |
5881 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5882 | || e->X_op == O_subtract) | |
5883 | { | |
5884 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5885 | fix->code = BFD_RELOC_IA64_IMM64; | |
5886 | if (e->X_op != O_subtract) | |
5887 | { | |
5888 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5889 | if (e->X_op == O_pseudo_fixup) | |
5890 | e->X_op = O_symbol; | |
5891 | } | |
5892 | ||
5893 | fix->opnd = idesc->operands[index]; | |
5894 | fix->expr = *e; | |
5895 | fix->is_pcrel = 0; | |
5896 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5897 | return OPERAND_MATCH; |
800eeca4 JW |
5898 | } |
5899 | else if (e->X_op == O_constant) | |
87f8eb97 | 5900 | return OPERAND_MATCH; |
800eeca4 JW |
5901 | break; |
5902 | ||
5903 | case IA64_OPND_CCNT5: | |
5904 | case IA64_OPND_CNT5: | |
5905 | case IA64_OPND_CNT6: | |
5906 | case IA64_OPND_CPOS6a: | |
5907 | case IA64_OPND_CPOS6b: | |
5908 | case IA64_OPND_CPOS6c: | |
5909 | case IA64_OPND_IMMU2: | |
5910 | case IA64_OPND_IMMU7a: | |
5911 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5912 | case IA64_OPND_IMMU21: |
5913 | case IA64_OPND_IMMU24: | |
5914 | case IA64_OPND_MBTYPE4: | |
5915 | case IA64_OPND_MHTYPE8: | |
5916 | case IA64_OPND_POS6: | |
5917 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5918 | if (e->X_op == O_constant) |
5919 | { | |
5920 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5921 | return OPERAND_MATCH; | |
5922 | else | |
5923 | return OPERAND_OUT_OF_RANGE; | |
5924 | } | |
800eeca4 JW |
5925 | break; |
5926 | ||
bf3ca999 TW |
5927 | case IA64_OPND_IMMU9: |
5928 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5929 | if (e->X_op == O_constant) |
542d6675 | 5930 | { |
87f8eb97 JW |
5931 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5932 | { | |
5933 | int lobits = e->X_add_number & 0x3; | |
5934 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5935 | e->X_add_number |= (bfd_vma) 0x3; | |
5936 | return OPERAND_MATCH; | |
5937 | } | |
5938 | else | |
5939 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5940 | } |
bf3ca999 TW |
5941 | break; |
5942 | ||
800eeca4 JW |
5943 | case IA64_OPND_IMM44: |
5944 | /* least 16 bits must be zero */ | |
5945 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5946 | /* XXX technically, this is wrong: we should not be issuing warning |
5947 | messages until we're sure this instruction pattern is going to | |
5948 | be used! */ | |
542d6675 | 5949 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5950 | |
87f8eb97 | 5951 | if (e->X_op == O_constant) |
542d6675 | 5952 | { |
87f8eb97 JW |
5953 | if (((e->X_add_number >= 0 |
5954 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5955 | || (e->X_add_number < 0 | |
5956 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5957 | { |
87f8eb97 JW |
5958 | /* sign-extend */ |
5959 | if (e->X_add_number >= 0 | |
5960 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5961 | { | |
5962 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5963 | } | |
5964 | return OPERAND_MATCH; | |
542d6675 | 5965 | } |
87f8eb97 JW |
5966 | else |
5967 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5968 | } |
800eeca4 JW |
5969 | break; |
5970 | ||
5971 | case IA64_OPND_IMM17: | |
5972 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5973 | if (e->X_op == O_constant) |
542d6675 | 5974 | { |
87f8eb97 JW |
5975 | if (((e->X_add_number >= 0 |
5976 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5977 | || (e->X_add_number < 0 | |
5978 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5979 | { |
87f8eb97 JW |
5980 | /* sign-extend */ |
5981 | if (e->X_add_number >= 0 | |
5982 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5983 | { | |
5984 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5985 | } | |
5986 | return OPERAND_MATCH; | |
542d6675 | 5987 | } |
87f8eb97 JW |
5988 | else |
5989 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5990 | } |
800eeca4 JW |
5991 | break; |
5992 | ||
5993 | case IA64_OPND_IMM14: | |
5994 | case IA64_OPND_IMM22: | |
5995 | relocatable = 1; | |
5996 | case IA64_OPND_IMM1: | |
5997 | case IA64_OPND_IMM8: | |
5998 | case IA64_OPND_IMM8U4: | |
5999 | case IA64_OPND_IMM8M1: | |
6000 | case IA64_OPND_IMM8M1U4: | |
6001 | case IA64_OPND_IMM8M1U8: | |
6002 | case IA64_OPND_IMM9a: | |
6003 | case IA64_OPND_IMM9b: | |
6004 | bits = operand_width (idesc->operands[index]); | |
6005 | if (relocatable && (e->X_op == O_symbol | |
6006 | || e->X_op == O_subtract | |
6007 | || e->X_op == O_pseudo_fixup)) | |
6008 | { | |
6009 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6010 | ||
6011 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
6012 | fix->code = BFD_RELOC_IA64_IMM14; | |
6013 | else | |
6014 | fix->code = BFD_RELOC_IA64_IMM22; | |
6015 | ||
6016 | if (e->X_op != O_subtract) | |
6017 | { | |
6018 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
6019 | if (e->X_op == O_pseudo_fixup) | |
6020 | e->X_op = O_symbol; | |
6021 | } | |
6022 | ||
6023 | fix->opnd = idesc->operands[index]; | |
6024 | fix->expr = *e; | |
6025 | fix->is_pcrel = 0; | |
6026 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6027 | return OPERAND_MATCH; |
800eeca4 JW |
6028 | } |
6029 | else if (e->X_op != O_constant | |
6030 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 6031 | return OPERAND_MISMATCH; |
800eeca4 JW |
6032 | |
6033 | if (opnd == IA64_OPND_IMM8M1U4) | |
6034 | { | |
6035 | /* Zero is not valid for unsigned compares that take an adjusted | |
6036 | constant immediate range. */ | |
6037 | if (e->X_add_number == 0) | |
87f8eb97 | 6038 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
6039 | |
6040 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
6041 | checks will work. */ | |
6042 | val = e->X_add_number; | |
197865e8 KH |
6043 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
6044 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
6045 | val = ((val << 32) >> 32); |
6046 | ||
6047 | /* Check for 0x100000000. This is valid because | |
6048 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
6049 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 6050 | return OPERAND_MATCH; |
800eeca4 JW |
6051 | |
6052 | val = val - 1; | |
6053 | } | |
6054 | else if (opnd == IA64_OPND_IMM8M1U8) | |
6055 | { | |
6056 | /* Zero is not valid for unsigned compares that take an adjusted | |
6057 | constant immediate range. */ | |
6058 | if (e->X_add_number == 0) | |
87f8eb97 | 6059 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
6060 | |
6061 | /* Check for 0x10000000000000000. */ | |
6062 | if (e->X_op == O_big) | |
6063 | { | |
6064 | if (generic_bignum[0] == 0 | |
6065 | && generic_bignum[1] == 0 | |
6066 | && generic_bignum[2] == 0 | |
6067 | && generic_bignum[3] == 0 | |
6068 | && generic_bignum[4] == 1) | |
87f8eb97 | 6069 | return OPERAND_MATCH; |
800eeca4 | 6070 | else |
87f8eb97 | 6071 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
6072 | } |
6073 | else | |
6074 | val = e->X_add_number - 1; | |
6075 | } | |
6076 | else if (opnd == IA64_OPND_IMM8M1) | |
6077 | val = e->X_add_number - 1; | |
6078 | else if (opnd == IA64_OPND_IMM8U4) | |
6079 | { | |
6080 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
6081 | checks will work. */ | |
6082 | val = e->X_add_number; | |
197865e8 KH |
6083 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
6084 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
6085 | val = ((val << 32) >> 32); |
6086 | } | |
6087 | else | |
6088 | val = e->X_add_number; | |
6089 | ||
2434f565 JW |
6090 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
6091 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
6092 | return OPERAND_MATCH; |
6093 | else | |
6094 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
6095 | |
6096 | case IA64_OPND_INC3: | |
6097 | /* +/- 1, 4, 8, 16 */ | |
6098 | val = e->X_add_number; | |
6099 | if (val < 0) | |
6100 | val = -val; | |
87f8eb97 JW |
6101 | if (e->X_op == O_constant) |
6102 | { | |
6103 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
6104 | return OPERAND_MATCH; | |
6105 | else | |
6106 | return OPERAND_OUT_OF_RANGE; | |
6107 | } | |
800eeca4 JW |
6108 | break; |
6109 | ||
6110 | case IA64_OPND_TGT25: | |
6111 | case IA64_OPND_TGT25b: | |
6112 | case IA64_OPND_TGT25c: | |
6113 | case IA64_OPND_TGT64: | |
6114 | if (e->X_op == O_symbol) | |
6115 | { | |
6116 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6117 | if (opnd == IA64_OPND_TGT25) | |
6118 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
6119 | else if (opnd == IA64_OPND_TGT25b) | |
6120 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
6121 | else if (opnd == IA64_OPND_TGT25c) | |
6122 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 6123 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
6124 | fix->code = BFD_RELOC_IA64_PCREL60B; |
6125 | else | |
6126 | abort (); | |
6127 | ||
800eeca4 JW |
6128 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
6129 | fix->opnd = idesc->operands[index]; | |
6130 | fix->expr = *e; | |
6131 | fix->is_pcrel = 1; | |
6132 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6133 | return OPERAND_MATCH; |
800eeca4 JW |
6134 | } |
6135 | case IA64_OPND_TAG13: | |
6136 | case IA64_OPND_TAG13b: | |
6137 | switch (e->X_op) | |
6138 | { | |
6139 | case O_constant: | |
87f8eb97 | 6140 | return OPERAND_MATCH; |
800eeca4 JW |
6141 | |
6142 | case O_symbol: | |
6143 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c | 6144 | /* There are no external relocs for TAG13/TAG13b fields, so we |
55cf6793 | 6145 | create a dummy reloc. This will not live past md_apply_fix. */ |
fa1cb89c JW |
6146 | fix->code = BFD_RELOC_UNUSED; |
6147 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
6148 | fix->opnd = idesc->operands[index]; |
6149 | fix->expr = *e; | |
6150 | fix->is_pcrel = 1; | |
6151 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 6152 | return OPERAND_MATCH; |
800eeca4 JW |
6153 | |
6154 | default: | |
6155 | break; | |
6156 | } | |
6157 | break; | |
6158 | ||
a823923b RH |
6159 | case IA64_OPND_LDXMOV: |
6160 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
6161 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
6162 | fix->opnd = idesc->operands[index]; | |
6163 | fix->expr = *e; | |
6164 | fix->is_pcrel = 0; | |
6165 | ++CURR_SLOT.num_fixups; | |
6166 | return OPERAND_MATCH; | |
6167 | ||
800eeca4 JW |
6168 | default: |
6169 | break; | |
6170 | } | |
87f8eb97 | 6171 | return OPERAND_MISMATCH; |
800eeca4 JW |
6172 | } |
6173 | ||
6174 | static int | |
e4e8248d | 6175 | parse_operand (e, more) |
800eeca4 | 6176 | expressionS *e; |
e4e8248d | 6177 | int more; |
800eeca4 JW |
6178 | { |
6179 | int sep = '\0'; | |
6180 | ||
6181 | memset (e, 0, sizeof (*e)); | |
6182 | e->X_op = O_absent; | |
6183 | SKIP_WHITESPACE (); | |
e4e8248d JB |
6184 | expression (e); |
6185 | sep = *input_line_pointer; | |
6186 | if (more && (sep == ',' || sep == more)) | |
6187 | ++input_line_pointer; | |
800eeca4 JW |
6188 | return sep; |
6189 | } | |
6190 | ||
6191 | /* Returns the next entry in the opcode table that matches the one in | |
6192 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 6193 | found, NULL is returned instead. */ |
800eeca4 JW |
6194 | |
6195 | static struct ia64_opcode * | |
6196 | get_next_opcode (struct ia64_opcode *idesc) | |
6197 | { | |
6198 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
6199 | ia64_free_opcode (idesc); | |
6200 | return next; | |
6201 | } | |
6202 | ||
6203 | /* Parse the operands for the opcode and find the opcode variant that | |
6204 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
6205 | |
6206 | static struct ia64_opcode * | |
800eeca4 JW |
6207 | parse_operands (idesc) |
6208 | struct ia64_opcode *idesc; | |
6209 | { | |
6210 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 6211 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
4b09e828 JB |
6212 | int reg1, reg2; |
6213 | char reg_class; | |
800eeca4 | 6214 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 6215 | enum operand_match_result result; |
800eeca4 JW |
6216 | char mnemonic[129]; |
6217 | char *first_arg = 0, *end, *saved_input_pointer; | |
6218 | unsigned int sof; | |
6219 | ||
6220 | assert (strlen (idesc->name) <= 128); | |
6221 | ||
6222 | strcpy (mnemonic, idesc->name); | |
60b9a617 JB |
6223 | if (idesc->operands[2] == IA64_OPND_SOF |
6224 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6225 | { |
6226 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
6227 | can't parse the first operand until we have parsed the | |
6228 | remaining operands of the "alloc" instruction. */ | |
6229 | SKIP_WHITESPACE (); | |
6230 | first_arg = input_line_pointer; | |
6231 | end = strchr (input_line_pointer, '='); | |
6232 | if (!end) | |
6233 | { | |
6234 | as_bad ("Expected separator `='"); | |
6235 | return 0; | |
6236 | } | |
6237 | input_line_pointer = end + 1; | |
6238 | ++i; | |
6239 | ++num_outputs; | |
6240 | } | |
6241 | ||
d3156ecc | 6242 | for (; ; ++i) |
800eeca4 | 6243 | { |
d3156ecc JB |
6244 | if (i < NELEMS (CURR_SLOT.opnd)) |
6245 | { | |
e4e8248d | 6246 | sep = parse_operand (CURR_SLOT.opnd + i, '='); |
d3156ecc JB |
6247 | if (CURR_SLOT.opnd[i].X_op == O_absent) |
6248 | break; | |
6249 | } | |
6250 | else | |
6251 | { | |
6252 | expressionS dummy; | |
6253 | ||
e4e8248d | 6254 | sep = parse_operand (&dummy, '='); |
d3156ecc JB |
6255 | if (dummy.X_op == O_absent) |
6256 | break; | |
6257 | } | |
800eeca4 JW |
6258 | |
6259 | ++num_operands; | |
6260 | ||
6261 | if (sep != '=' && sep != ',') | |
6262 | break; | |
6263 | ||
6264 | if (sep == '=') | |
6265 | { | |
6266 | if (num_outputs > 0) | |
6267 | as_bad ("Duplicate equal sign (=) in instruction"); | |
6268 | else | |
6269 | num_outputs = i + 1; | |
6270 | } | |
6271 | } | |
6272 | if (sep != '\0') | |
6273 | { | |
6274 | as_bad ("Illegal operand separator `%c'", sep); | |
6275 | return 0; | |
6276 | } | |
197865e8 | 6277 | |
60b9a617 JB |
6278 | if (idesc->operands[2] == IA64_OPND_SOF |
6279 | || idesc->operands[1] == IA64_OPND_SOF) | |
800eeca4 JW |
6280 | { |
6281 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
6282 | know (strcmp (idesc->name, "alloc") == 0); | |
60b9a617 JB |
6283 | i = (CURR_SLOT.opnd[1].X_op == O_register |
6284 | && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1; | |
6285 | if (num_operands == i + 3 /* first_arg not included in this count! */ | |
6286 | && CURR_SLOT.opnd[i].X_op == O_constant | |
6287 | && CURR_SLOT.opnd[i + 1].X_op == O_constant | |
6288 | && CURR_SLOT.opnd[i + 2].X_op == O_constant | |
6289 | && CURR_SLOT.opnd[i + 3].X_op == O_constant) | |
800eeca4 | 6290 | { |
60b9a617 JB |
6291 | sof = set_regstack (CURR_SLOT.opnd[i].X_add_number, |
6292 | CURR_SLOT.opnd[i + 1].X_add_number, | |
6293 | CURR_SLOT.opnd[i + 2].X_add_number, | |
6294 | CURR_SLOT.opnd[i + 3].X_add_number); | |
800eeca4 | 6295 | |
542d6675 | 6296 | /* now we can parse the first arg: */ |
800eeca4 JW |
6297 | saved_input_pointer = input_line_pointer; |
6298 | input_line_pointer = first_arg; | |
e4e8248d | 6299 | sep = parse_operand (CURR_SLOT.opnd + 0, '='); |
800eeca4 JW |
6300 | if (sep != '=') |
6301 | --num_outputs; /* force error */ | |
6302 | input_line_pointer = saved_input_pointer; | |
6303 | ||
60b9a617 JB |
6304 | CURR_SLOT.opnd[i].X_add_number = sof; |
6305 | CURR_SLOT.opnd[i + 1].X_add_number | |
6306 | = sof - CURR_SLOT.opnd[i + 2].X_add_number; | |
6307 | CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; | |
800eeca4 JW |
6308 | } |
6309 | } | |
6310 | ||
d3156ecc | 6311 | highest_unmatched_operand = -4; |
87f8eb97 JW |
6312 | curr_out_of_range_pos = -1; |
6313 | error_pos = 0; | |
800eeca4 JW |
6314 | for (; idesc; idesc = get_next_opcode (idesc)) |
6315 | { | |
6316 | if (num_outputs != idesc->num_outputs) | |
6317 | continue; /* mismatch in # of outputs */ | |
d3156ecc JB |
6318 | if (highest_unmatched_operand < 0) |
6319 | highest_unmatched_operand |= 1; | |
6320 | if (num_operands > NELEMS (idesc->operands) | |
6321 | || (num_operands < NELEMS (idesc->operands) | |
6322 | && idesc->operands[num_operands]) | |
6323 | || (num_operands > 0 && !idesc->operands[num_operands - 1])) | |
6324 | continue; /* mismatch in number of arguments */ | |
6325 | if (highest_unmatched_operand < 0) | |
6326 | highest_unmatched_operand |= 2; | |
800eeca4 JW |
6327 | |
6328 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
6329 | |
6330 | /* Try to match all operands. If we see an out-of-range operand, | |
6331 | then continue trying to match the rest of the operands, since if | |
6332 | the rest match, then this idesc will give the best error message. */ | |
6333 | ||
6334 | out_of_range_pos = -1; | |
800eeca4 | 6335 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
6336 | { |
6337 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
6338 | if (result != OPERAND_MATCH) | |
6339 | { | |
6340 | if (result != OPERAND_OUT_OF_RANGE) | |
6341 | break; | |
6342 | if (out_of_range_pos < 0) | |
6343 | /* remember position of the first out-of-range operand: */ | |
6344 | out_of_range_pos = i; | |
6345 | } | |
6346 | } | |
800eeca4 | 6347 | |
87f8eb97 JW |
6348 | /* If we did not match all operands, or if at least one operand was |
6349 | out-of-range, then this idesc does not match. Keep track of which | |
6350 | idesc matched the most operands before failing. If we have two | |
6351 | idescs that failed at the same position, and one had an out-of-range | |
6352 | operand, then prefer the out-of-range operand. Thus if we have | |
6353 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
6354 | of range instead of an error saying that the constant should have been | |
6355 | a register. */ | |
6356 | ||
6357 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 6358 | { |
87f8eb97 JW |
6359 | if (i > highest_unmatched_operand |
6360 | || (i == highest_unmatched_operand | |
6361 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
6362 | { |
6363 | highest_unmatched_operand = i; | |
87f8eb97 JW |
6364 | if (out_of_range_pos >= 0) |
6365 | { | |
6366 | expected_operand = idesc->operands[out_of_range_pos]; | |
6367 | error_pos = out_of_range_pos; | |
6368 | } | |
6369 | else | |
6370 | { | |
6371 | expected_operand = idesc->operands[i]; | |
6372 | error_pos = i; | |
6373 | } | |
6374 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
6375 | } |
6376 | continue; | |
6377 | } | |
6378 | ||
800eeca4 JW |
6379 | break; |
6380 | } | |
6381 | if (!idesc) | |
6382 | { | |
6383 | if (expected_operand) | |
6384 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 6385 | error_pos + 1, mnemonic, |
800eeca4 | 6386 | elf64_ia64_operands[expected_operand].desc); |
d3156ecc JB |
6387 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) |
6388 | as_bad ("Wrong number of output operands"); | |
6389 | else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) | |
6390 | as_bad ("Wrong number of input operands"); | |
800eeca4 JW |
6391 | else |
6392 | as_bad ("Operand mismatch"); | |
6393 | return 0; | |
6394 | } | |
4b09e828 JB |
6395 | |
6396 | /* Check that the instruction doesn't use | |
6397 | - r0, f0, or f1 as output operands | |
6398 | - the same predicate twice as output operands | |
6399 | - r0 as address of a base update load or store | |
6400 | - the same GR as output and address of a base update load | |
6401 | - two even- or two odd-numbered FRs as output operands of a floating | |
6402 | point parallel load. | |
6403 | At most two (conflicting) output (or output-like) operands can exist, | |
6404 | (floating point parallel loads have three outputs, but the base register, | |
6405 | if updated, cannot conflict with the actual outputs). */ | |
6406 | reg2 = reg1 = -1; | |
6407 | for (i = 0; i < num_operands; ++i) | |
6408 | { | |
6409 | int regno = 0; | |
6410 | ||
6411 | reg_class = 0; | |
6412 | switch (idesc->operands[i]) | |
6413 | { | |
6414 | case IA64_OPND_R1: | |
6415 | case IA64_OPND_R2: | |
6416 | case IA64_OPND_R3: | |
6417 | if (i < num_outputs) | |
6418 | { | |
6419 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6420 | reg_class = 'r'; | |
6421 | else if (reg1 < 0) | |
6422 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6423 | else if (reg2 < 0) | |
6424 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6425 | } | |
6426 | break; | |
6427 | case IA64_OPND_P1: | |
6428 | case IA64_OPND_P2: | |
6429 | if (i < num_outputs) | |
6430 | { | |
6431 | if (reg1 < 0) | |
6432 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6433 | else if (reg2 < 0) | |
6434 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6435 | } | |
6436 | break; | |
6437 | case IA64_OPND_F1: | |
6438 | case IA64_OPND_F2: | |
6439 | case IA64_OPND_F3: | |
6440 | case IA64_OPND_F4: | |
6441 | if (i < num_outputs) | |
6442 | { | |
6443 | if (CURR_SLOT.opnd[i].X_add_number >= REG_FR | |
6444 | && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) | |
6445 | { | |
6446 | reg_class = 'f'; | |
6447 | regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
6448 | } | |
6449 | else if (reg1 < 0) | |
6450 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6451 | else if (reg2 < 0) | |
6452 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6453 | } | |
6454 | break; | |
6455 | case IA64_OPND_MR3: | |
6456 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
6457 | { | |
6458 | if (CURR_SLOT.opnd[i].X_add_number == REG_GR) | |
6459 | reg_class = 'm'; | |
6460 | else if (reg1 < 0) | |
6461 | reg1 = CURR_SLOT.opnd[i].X_add_number; | |
6462 | else if (reg2 < 0) | |
6463 | reg2 = CURR_SLOT.opnd[i].X_add_number; | |
6464 | } | |
6465 | break; | |
6466 | default: | |
6467 | break; | |
6468 | } | |
6469 | switch (reg_class) | |
6470 | { | |
6471 | case 0: | |
6472 | break; | |
6473 | default: | |
6474 | as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno); | |
6475 | break; | |
6476 | case 'm': | |
6477 | as_warn ("Invalid use of `r%d' as base update address operand", regno); | |
6478 | break; | |
6479 | } | |
6480 | } | |
6481 | if (reg1 == reg2) | |
6482 | { | |
6483 | if (reg1 >= REG_GR && reg1 <= REG_GR + 127) | |
6484 | { | |
6485 | reg1 -= REG_GR; | |
6486 | reg_class = 'r'; | |
6487 | } | |
6488 | else if (reg1 >= REG_P && reg1 <= REG_P + 63) | |
6489 | { | |
6490 | reg1 -= REG_P; | |
6491 | reg_class = 'p'; | |
6492 | } | |
6493 | else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) | |
6494 | { | |
6495 | reg1 -= REG_FR; | |
6496 | reg_class = 'f'; | |
6497 | } | |
6498 | else | |
6499 | reg_class = 0; | |
6500 | if (reg_class) | |
6501 | as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1); | |
6502 | } | |
6503 | else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6504 | && reg2 >= REG_FR && reg2 <= REG_FR + 31) | |
6505 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6506 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) | |
6507 | && ! ((reg1 ^ reg2) & 1)) | |
6508 | as_warn ("Invalid simultaneous use of `f%d' and `f%d'", | |
6509 | reg1 - REG_FR, reg2 - REG_FR); | |
6510 | else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 | |
6511 | && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) | |
6512 | || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 | |
6513 | && reg2 >= REG_FR && reg2 <= REG_FR + 31)) | |
6514 | as_warn ("Dangerous simultaneous use of `f%d' and `f%d'", | |
6515 | reg1 - REG_FR, reg2 - REG_FR); | |
800eeca4 JW |
6516 | return idesc; |
6517 | } | |
6518 | ||
6519 | static void | |
6520 | build_insn (slot, insnp) | |
6521 | struct slot *slot; | |
6522 | bfd_vma *insnp; | |
6523 | { | |
6524 | const struct ia64_operand *odesc, *o2desc; | |
6525 | struct ia64_opcode *idesc = slot->idesc; | |
2132e3a3 AM |
6526 | bfd_vma insn; |
6527 | bfd_signed_vma val; | |
800eeca4 JW |
6528 | const char *err; |
6529 | int i; | |
6530 | ||
6531 | insn = idesc->opcode | slot->qp_regno; | |
6532 | ||
6533 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6534 | { | |
c67e42c9 RH |
6535 | if (slot->opnd[i].X_op == O_register |
6536 | || slot->opnd[i].X_op == O_constant | |
6537 | || slot->opnd[i].X_op == O_index) | |
6538 | val = slot->opnd[i].X_add_number; | |
6539 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6540 | { |
c67e42c9 RH |
6541 | /* This must be the value 0x10000000000000000. */ |
6542 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6543 | val = 0; | |
6544 | } | |
6545 | else | |
6546 | val = 0; | |
6547 | ||
6548 | switch (idesc->operands[i]) | |
6549 | { | |
6550 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6551 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6552 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6553 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6554 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6555 | continue; |
6556 | ||
6557 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6558 | val &= 0x3fffffffffffffffULL; |
6559 | if (val != slot->opnd[i].X_add_number) | |
6560 | as_warn (_("Value truncated to 62 bits")); | |
6561 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6562 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6563 | continue; |
800eeca4 | 6564 | |
c67e42c9 RH |
6565 | case IA64_OPND_TGT64: |
6566 | val >>= 4; | |
6567 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6568 | insn |= ((((val >> 59) & 0x1) << 36) | |
6569 | | (((val >> 0) & 0xfffff) << 13)); | |
6570 | continue; | |
800eeca4 | 6571 | |
c67e42c9 RH |
6572 | case IA64_OPND_AR3: |
6573 | val -= REG_AR; | |
6574 | break; | |
6575 | ||
6576 | case IA64_OPND_B1: | |
6577 | case IA64_OPND_B2: | |
6578 | val -= REG_BR; | |
6579 | break; | |
6580 | ||
6581 | case IA64_OPND_CR3: | |
6582 | val -= REG_CR; | |
6583 | break; | |
6584 | ||
6585 | case IA64_OPND_F1: | |
6586 | case IA64_OPND_F2: | |
6587 | case IA64_OPND_F3: | |
6588 | case IA64_OPND_F4: | |
6589 | val -= REG_FR; | |
6590 | break; | |
6591 | ||
6592 | case IA64_OPND_P1: | |
6593 | case IA64_OPND_P2: | |
6594 | val -= REG_P; | |
6595 | break; | |
6596 | ||
6597 | case IA64_OPND_R1: | |
6598 | case IA64_OPND_R2: | |
6599 | case IA64_OPND_R3: | |
6600 | case IA64_OPND_R3_2: | |
6601 | case IA64_OPND_CPUID_R3: | |
6602 | case IA64_OPND_DBR_R3: | |
6603 | case IA64_OPND_DTR_R3: | |
6604 | case IA64_OPND_ITR_R3: | |
6605 | case IA64_OPND_IBR_R3: | |
6606 | case IA64_OPND_MR3: | |
6607 | case IA64_OPND_MSR_R3: | |
6608 | case IA64_OPND_PKR_R3: | |
6609 | case IA64_OPND_PMC_R3: | |
6610 | case IA64_OPND_PMD_R3: | |
197865e8 | 6611 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6612 | val -= REG_GR; |
6613 | break; | |
6614 | ||
6615 | default: | |
6616 | break; | |
6617 | } | |
6618 | ||
6619 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6620 | err = (*odesc->insert) (odesc, val, &insn); | |
6621 | if (err) | |
6622 | as_bad_where (slot->src_file, slot->src_line, | |
6623 | "Bad operand value: %s", err); | |
6624 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6625 | { | |
6626 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6627 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6628 | { | |
6629 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6630 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6631 | } |
c67e42c9 RH |
6632 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6633 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6634 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6635 | { |
c67e42c9 RH |
6636 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6637 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6638 | } |
6639 | } | |
6640 | } | |
6641 | *insnp = insn; | |
6642 | } | |
6643 | ||
6644 | static void | |
6645 | emit_one_bundle () | |
6646 | { | |
f4660e2c | 6647 | int manual_bundling_off = 0, manual_bundling = 0; |
800eeca4 JW |
6648 | enum ia64_unit required_unit, insn_unit = 0; |
6649 | enum ia64_insn_type type[3], insn_type; | |
6650 | unsigned int template, orig_template; | |
542d6675 | 6651 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6652 | struct ia64_opcode *idesc; |
6653 | int end_of_insn_group = 0, user_template = -1; | |
9b505842 | 6654 | int n, i, j, first, curr, last_slot; |
800eeca4 JW |
6655 | bfd_vma t0 = 0, t1 = 0; |
6656 | struct label_fix *lfix; | |
07a53e5c | 6657 | bfd_boolean mark_label; |
800eeca4 JW |
6658 | struct insn_fix *ifix; |
6659 | char mnemonic[16]; | |
6660 | fixS *fix; | |
6661 | char *f; | |
5a9ff93d | 6662 | int addr_mod; |
800eeca4 JW |
6663 | |
6664 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6665 | know (first >= 0 & first < NUM_SLOTS); | |
6666 | n = MIN (3, md.num_slots_in_use); | |
6667 | ||
6668 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6669 | otherwise: */ |
800eeca4 JW |
6670 | |
6671 | if (md.slot[first].user_template >= 0) | |
6672 | user_template = template = md.slot[first].user_template; | |
6673 | else | |
6674 | { | |
032efc85 | 6675 | /* Auto select appropriate template. */ |
800eeca4 JW |
6676 | memset (type, 0, sizeof (type)); |
6677 | curr = first; | |
6678 | for (i = 0; i < n; ++i) | |
6679 | { | |
032efc85 RH |
6680 | if (md.slot[curr].label_fixups && i != 0) |
6681 | break; | |
800eeca4 JW |
6682 | type[i] = md.slot[curr].idesc->type; |
6683 | curr = (curr + 1) % NUM_SLOTS; | |
6684 | } | |
6685 | template = best_template[type[0]][type[1]][type[2]]; | |
6686 | } | |
6687 | ||
542d6675 | 6688 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6689 | for (i = 0; i < 3; ++i) |
6690 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6691 | ||
6692 | f = frag_more (16); | |
6693 | ||
5a9ff93d JW |
6694 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6695 | from the start of the frag. */ | |
6696 | addr_mod = frag_now_fix () & 15; | |
6697 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6698 | as_bad (_("instruction address is not a multiple of 16")); | |
6699 | frag_now->insn_addr = addr_mod; | |
6700 | frag_now->has_code = 1; | |
6701 | ||
542d6675 | 6702 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6703 | curr = first; |
6704 | idesc = md.slot[curr].idesc; | |
6705 | end_of_insn_group = 0; | |
9b505842 | 6706 | last_slot = -1; |
800eeca4 JW |
6707 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) |
6708 | { | |
d6e78c11 | 6709 | /* If we have unwind records, we may need to update some now. */ |
75214fb0 JB |
6710 | unw_rec_list *ptr = md.slot[curr].unwind_record; |
6711 | unw_rec_list *end_ptr = NULL; | |
6712 | ||
d6e78c11 JW |
6713 | if (ptr) |
6714 | { | |
6715 | /* Find the last prologue/body record in the list for the current | |
6716 | insn, and set the slot number for all records up to that point. | |
6717 | This needs to be done now, because prologue/body records refer to | |
6718 | the current point, not the point after the instruction has been | |
6719 | issued. This matters because there may have been nops emitted | |
6720 | meanwhile. Any non-prologue non-body record followed by a | |
6721 | prologue/body record must also refer to the current point. */ | |
75214fb0 JB |
6722 | unw_rec_list *last_ptr; |
6723 | ||
6724 | for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) | |
6725 | end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; | |
6726 | for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) | |
d6e78c11 JW |
6727 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr |
6728 | || ptr->r.type == body) | |
6729 | last_ptr = ptr; | |
6730 | if (last_ptr) | |
6731 | { | |
6732 | /* Make last_ptr point one after the last prologue/body | |
6733 | record. */ | |
6734 | last_ptr = last_ptr->next; | |
6735 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6736 | ptr = ptr->next) | |
6737 | { | |
6738 | ptr->slot_number = (unsigned long) f + i; | |
6739 | ptr->slot_frag = frag_now; | |
6740 | } | |
6741 | /* Remove the initialized records, so that we won't accidentally | |
6742 | update them again if we insert a nop and continue. */ | |
6743 | md.slot[curr].unwind_record = last_ptr; | |
6744 | } | |
6745 | } | |
e0c9811a | 6746 | |
f4660e2c JB |
6747 | manual_bundling_off = md.slot[curr].manual_bundling_off; |
6748 | if (md.slot[curr].manual_bundling_on) | |
800eeca4 | 6749 | { |
f4660e2c JB |
6750 | if (curr == first) |
6751 | manual_bundling = 1; | |
800eeca4 | 6752 | else |
f4660e2c JB |
6753 | break; /* Need to start a new bundle. */ |
6754 | } | |
6755 | ||
744b6414 JW |
6756 | /* If this instruction specifies a template, then it must be the first |
6757 | instruction of a bundle. */ | |
6758 | if (curr != first && md.slot[curr].user_template >= 0) | |
6759 | break; | |
6760 | ||
f4660e2c JB |
6761 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6762 | { | |
6763 | if (manual_bundling && !manual_bundling_off) | |
6764 | { | |
6765 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6766 | "`%s' must be last in bundle", idesc->name); | |
6767 | if (i < 2) | |
6768 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6769 | } | |
6770 | i = 2; | |
800eeca4 JW |
6771 | } |
6772 | if (idesc->flags & IA64_OPCODE_LAST) | |
6773 | { | |
2434f565 JW |
6774 | int required_slot; |
6775 | unsigned int required_template; | |
800eeca4 JW |
6776 | |
6777 | /* If we need a stop bit after an M slot, our only choice is | |
6778 | template 5 (M;;MI). If we need a stop bit after a B | |
6779 | slot, our only choice is to place it at the end of the | |
6780 | bundle, because the only available templates are MIB, | |
6781 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6782 | than M and B slots because these are the only kind of | |
6783 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6784 | required_template = template; | |
6785 | switch (idesc->type) | |
6786 | { | |
6787 | case IA64_TYPE_M: | |
6788 | required_slot = 0; | |
6789 | required_template = 5; | |
6790 | break; | |
6791 | ||
6792 | case IA64_TYPE_B: | |
6793 | required_slot = 2; | |
6794 | break; | |
6795 | ||
6796 | default: | |
6797 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6798 | "Internal error: don't know how to force %s to end" | |
6799 | "of instruction group", idesc->name); | |
6800 | required_slot = i; | |
6801 | break; | |
6802 | } | |
f4660e2c JB |
6803 | if (manual_bundling |
6804 | && (i > required_slot | |
6805 | || (required_slot == 2 && !manual_bundling_off) | |
6806 | || (user_template >= 0 | |
6807 | /* Changing from MMI to M;MI is OK. */ | |
6808 | && (template ^ required_template) > 1))) | |
6809 | { | |
6810 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6811 | "`%s' must be last in instruction group", | |
6812 | idesc->name); | |
6813 | if (i < 2 && required_slot == 2 && !manual_bundling_off) | |
6814 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ | |
6815 | } | |
800eeca4 JW |
6816 | if (required_slot < i) |
6817 | /* Can't fit this instruction. */ | |
6818 | break; | |
6819 | ||
6820 | i = required_slot; | |
6821 | if (required_template != template) | |
6822 | { | |
6823 | /* If we switch the template, we need to reset the NOPs | |
6824 | after slot i. The slot-types of the instructions ahead | |
6825 | of i never change, so we don't need to worry about | |
6826 | changing NOPs in front of this slot. */ | |
6827 | for (j = i; j < 3; ++j) | |
6828 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6829 | } | |
6830 | template = required_template; | |
6831 | } | |
6832 | if (curr != first && md.slot[curr].label_fixups) | |
6833 | { | |
f4660e2c JB |
6834 | if (manual_bundling) |
6835 | { | |
6836 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
800eeca4 | 6837 | "Label must be first in a bundle"); |
f4660e2c JB |
6838 | manual_bundling = -1; /* Suppress meaningless post-loop errors. */ |
6839 | } | |
800eeca4 JW |
6840 | /* This insn must go into the first slot of a bundle. */ |
6841 | break; | |
6842 | } | |
6843 | ||
800eeca4 JW |
6844 | if (end_of_insn_group && md.num_slots_in_use >= 1) |
6845 | { | |
6846 | /* We need an instruction group boundary in the middle of a | |
6847 | bundle. See if we can switch to an other template with | |
6848 | an appropriate boundary. */ | |
6849 | ||
6850 | orig_template = template; | |
6851 | if (i == 1 && (user_template == 4 | |
6852 | || (user_template < 0 | |
6853 | && (ia64_templ_desc[template].exec_unit[0] | |
6854 | == IA64_UNIT_M)))) | |
6855 | { | |
6856 | template = 5; | |
6857 | end_of_insn_group = 0; | |
6858 | } | |
6859 | else if (i == 2 && (user_template == 0 | |
6860 | || (user_template < 0 | |
6861 | && (ia64_templ_desc[template].exec_unit[1] | |
6862 | == IA64_UNIT_I))) | |
6863 | /* This test makes sure we don't switch the template if | |
6864 | the next instruction is one that needs to be first in | |
6865 | an instruction group. Since all those instructions are | |
6866 | in the M group, there is no way such an instruction can | |
6867 | fit in this bundle even if we switch the template. The | |
6868 | reason we have to check for this is that otherwise we | |
6869 | may end up generating "MI;;I M.." which has the deadly | |
6870 | effect that the second M instruction is no longer the | |
f4660e2c | 6871 | first in the group! --davidm 99/12/16 */ |
800eeca4 JW |
6872 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) |
6873 | { | |
6874 | template = 1; | |
6875 | end_of_insn_group = 0; | |
6876 | } | |
f4660e2c JB |
6877 | else if (i == 1 |
6878 | && user_template == 0 | |
6879 | && !(idesc->flags & IA64_OPCODE_FIRST)) | |
6880 | /* Use the next slot. */ | |
6881 | continue; | |
800eeca4 JW |
6882 | else if (curr != first) |
6883 | /* can't fit this insn */ | |
6884 | break; | |
6885 | ||
6886 | if (template != orig_template) | |
6887 | /* if we switch the template, we need to reset the NOPs | |
6888 | after slot i. The slot-types of the instructions ahead | |
6889 | of i never change, so we don't need to worry about | |
6890 | changing NOPs in front of this slot. */ | |
6891 | for (j = i; j < 3; ++j) | |
6892 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6893 | } | |
6894 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6895 | ||
c10d9d8f | 6896 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6897 | if (idesc->type == IA64_TYPE_DYN) |
6898 | { | |
97762d08 JB |
6899 | enum ia64_opnd opnd1, opnd2; |
6900 | ||
800eeca4 JW |
6901 | if ((strcmp (idesc->name, "nop") == 0) |
6902 | || (strcmp (idesc->name, "break") == 0)) | |
6903 | insn_unit = required_unit; | |
91d777ee L |
6904 | else if (strcmp (idesc->name, "hint") == 0) |
6905 | { | |
6906 | insn_unit = required_unit; | |
6907 | if (required_unit == IA64_UNIT_B) | |
6908 | { | |
6909 | switch (md.hint_b) | |
6910 | { | |
6911 | case hint_b_ok: | |
6912 | break; | |
6913 | case hint_b_warning: | |
6914 | as_warn ("hint in B unit may be treated as nop"); | |
6915 | break; | |
6916 | case hint_b_error: | |
6917 | /* When manual bundling is off and there is no | |
6918 | user template, we choose a different unit so | |
6919 | that hint won't go into the current slot. We | |
6920 | will fill the current bundle with nops and | |
6921 | try to put hint into the next bundle. */ | |
6922 | if (!manual_bundling && user_template < 0) | |
6923 | insn_unit = IA64_UNIT_I; | |
6924 | else | |
6925 | as_bad ("hint in B unit can't be used"); | |
6926 | break; | |
6927 | } | |
6928 | } | |
6929 | } | |
97762d08 JB |
6930 | else if (strcmp (idesc->name, "chk.s") == 0 |
6931 | || strcmp (idesc->name, "mov") == 0) | |
800eeca4 JW |
6932 | { |
6933 | insn_unit = IA64_UNIT_M; | |
97762d08 JB |
6934 | if (required_unit == IA64_UNIT_I |
6935 | || (required_unit == IA64_UNIT_F && template == 6)) | |
800eeca4 JW |
6936 | insn_unit = IA64_UNIT_I; |
6937 | } | |
6938 | else | |
6939 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6940 | ||
09124b3f | 6941 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]); |
97762d08 JB |
6942 | opnd1 = idesc->operands[0]; |
6943 | opnd2 = idesc->operands[1]; | |
3d56ab85 | 6944 | ia64_free_opcode (idesc); |
97762d08 JB |
6945 | idesc = ia64_find_opcode (mnemonic); |
6946 | /* moves to/from ARs have collisions */ | |
6947 | if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) | |
6948 | { | |
6949 | while (idesc != NULL | |
6950 | && (idesc->operands[0] != opnd1 | |
6951 | || idesc->operands[1] != opnd2)) | |
6952 | idesc = get_next_opcode (idesc); | |
6953 | } | |
97762d08 | 6954 | md.slot[curr].idesc = idesc; |
800eeca4 JW |
6955 | } |
6956 | else | |
6957 | { | |
6958 | insn_type = idesc->type; | |
6959 | insn_unit = IA64_UNIT_NIL; | |
6960 | switch (insn_type) | |
6961 | { | |
6962 | case IA64_TYPE_A: | |
6963 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6964 | insn_unit = required_unit; | |
6965 | break; | |
542d6675 | 6966 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6967 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6968 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6969 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6970 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6971 | default: break; | |
6972 | } | |
6973 | } | |
6974 | ||
6975 | if (insn_unit != required_unit) | |
9b505842 | 6976 | continue; /* Try next slot. */ |
800eeca4 | 6977 | |
07a53e5c RH |
6978 | /* Now is a good time to fix up the labels for this insn. */ |
6979 | mark_label = FALSE; | |
6980 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) | |
6981 | { | |
6982 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6983 | symbol_set_frag (lfix->sym, frag_now); | |
6984 | mark_label |= lfix->dw2_mark_labels; | |
6985 | } | |
6986 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6987 | { | |
6988 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6989 | symbol_set_frag (lfix->sym, frag_now); | |
6990 | } | |
6991 | ||
6992 | if (debug_type == DEBUG_DWARF2 | |
6993 | || md.slot[curr].loc_directive_seen | |
6994 | || mark_label) | |
196e8040 JW |
6995 | { |
6996 | bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; | |
800eeca4 | 6997 | |
196e8040 | 6998 | md.slot[curr].loc_directive_seen = 0; |
07a53e5c RH |
6999 | if (mark_label) |
7000 | md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; | |
7001 | ||
196e8040 JW |
7002 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); |
7003 | } | |
800eeca4 JW |
7004 | |
7005 | build_insn (md.slot + curr, insn + i); | |
7006 | ||
d6e78c11 JW |
7007 | ptr = md.slot[curr].unwind_record; |
7008 | if (ptr) | |
7009 | { | |
7010 | /* Set slot numbers for all remaining unwind records belonging to the | |
7011 | current insn. There can not be any prologue/body unwind records | |
7012 | here. */ | |
d6e78c11 JW |
7013 | for (; ptr != end_ptr; ptr = ptr->next) |
7014 | { | |
7015 | ptr->slot_number = (unsigned long) f + i; | |
7016 | ptr->slot_frag = frag_now; | |
7017 | } | |
7018 | md.slot[curr].unwind_record = NULL; | |
7019 | } | |
10850f29 | 7020 | |
800eeca4 JW |
7021 | if (required_unit == IA64_UNIT_L) |
7022 | { | |
7023 | know (i == 1); | |
7024 | /* skip one slot for long/X-unit instructions */ | |
7025 | ++i; | |
7026 | } | |
7027 | --md.num_slots_in_use; | |
9b505842 | 7028 | last_slot = i; |
800eeca4 | 7029 | |
800eeca4 JW |
7030 | for (j = 0; j < md.slot[curr].num_fixups; ++j) |
7031 | { | |
7032 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 7033 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
7034 | &ifix->expr, ifix->is_pcrel, ifix->code); |
7035 | fix->tc_fix_data.opnd = ifix->opnd; | |
7036 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
7037 | fix->fx_file = md.slot[curr].src_file; | |
7038 | fix->fx_line = md.slot[curr].src_line; | |
7039 | } | |
7040 | ||
7041 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
7042 | ||
542d6675 | 7043 | /* clear slot: */ |
800eeca4 JW |
7044 | ia64_free_opcode (md.slot[curr].idesc); |
7045 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
7046 | md.slot[curr].user_template = -1; | |
7047 | ||
7048 | if (manual_bundling_off) | |
7049 | { | |
7050 | manual_bundling = 0; | |
7051 | break; | |
7052 | } | |
7053 | curr = (curr + 1) % NUM_SLOTS; | |
7054 | idesc = md.slot[curr].idesc; | |
7055 | } | |
f4660e2c | 7056 | if (manual_bundling > 0) |
800eeca4 JW |
7057 | { |
7058 | if (md.num_slots_in_use > 0) | |
ac025970 | 7059 | { |
9b505842 JB |
7060 | if (last_slot >= 2) |
7061 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
7062 | "`%s' does not fit into bundle", idesc->name); | |
7063 | else if (last_slot < 0) | |
7064 | { | |
7065 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
7066 | "`%s' does not fit into %s template", | |
7067 | idesc->name, ia64_templ_desc[template].name); | |
7068 | /* Drop first insn so we don't livelock. */ | |
7069 | --md.num_slots_in_use; | |
7070 | know (curr == first); | |
7071 | ia64_free_opcode (md.slot[curr].idesc); | |
7072 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
7073 | md.slot[curr].user_template = -1; | |
7074 | } | |
7075 | else | |
7076 | { | |
7077 | const char *where; | |
7078 | ||
7079 | if (template == 2) | |
7080 | where = "X slot"; | |
7081 | else if (last_slot == 0) | |
7082 | where = "slots 2 or 3"; | |
7083 | else | |
7084 | where = "slot 3"; | |
7085 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
7086 | "`%s' can't go in %s of %s template", | |
7087 | idesc->name, where, ia64_templ_desc[template].name); | |
7088 | } | |
ac025970 | 7089 | } |
800eeca4 JW |
7090 | else |
7091 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
7092 | "Missing '}' at end of file"); | |
7093 | } | |
7094 | know (md.num_slots_in_use < NUM_SLOTS); | |
7095 | ||
7096 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
7097 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
7098 | ||
44f5c83a JW |
7099 | number_to_chars_littleendian (f + 0, t0, 8); |
7100 | number_to_chars_littleendian (f + 8, t1, 8); | |
800eeca4 JW |
7101 | } |
7102 | ||
7103 | int | |
7104 | md_parse_option (c, arg) | |
7105 | int c; | |
7106 | char *arg; | |
7107 | { | |
7463c317 | 7108 | |
800eeca4 JW |
7109 | switch (c) |
7110 | { | |
c43c2cc5 | 7111 | /* Switches from the Intel assembler. */ |
44f5c83a | 7112 | case 'm': |
800eeca4 JW |
7113 | if (strcmp (arg, "ilp64") == 0 |
7114 | || strcmp (arg, "lp64") == 0 | |
7115 | || strcmp (arg, "p64") == 0) | |
7116 | { | |
7117 | md.flags |= EF_IA_64_ABI64; | |
7118 | } | |
7119 | else if (strcmp (arg, "ilp32") == 0) | |
7120 | { | |
7121 | md.flags &= ~EF_IA_64_ABI64; | |
7122 | } | |
7123 | else if (strcmp (arg, "le") == 0) | |
7124 | { | |
7125 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 7126 | default_big_endian = 0; |
800eeca4 JW |
7127 | } |
7128 | else if (strcmp (arg, "be") == 0) | |
7129 | { | |
7130 | md.flags |= EF_IA_64_BE; | |
549f748d | 7131 | default_big_endian = 1; |
800eeca4 | 7132 | } |
970d6792 L |
7133 | else if (strncmp (arg, "unwind-check=", 13) == 0) |
7134 | { | |
7135 | arg += 13; | |
7136 | if (strcmp (arg, "warning") == 0) | |
7137 | md.unwind_check = unwind_check_warning; | |
7138 | else if (strcmp (arg, "error") == 0) | |
7139 | md.unwind_check = unwind_check_error; | |
7140 | else | |
7141 | return 0; | |
7142 | } | |
91d777ee L |
7143 | else if (strncmp (arg, "hint.b=", 7) == 0) |
7144 | { | |
7145 | arg += 7; | |
7146 | if (strcmp (arg, "ok") == 0) | |
7147 | md.hint_b = hint_b_ok; | |
7148 | else if (strcmp (arg, "warning") == 0) | |
7149 | md.hint_b = hint_b_warning; | |
7150 | else if (strcmp (arg, "error") == 0) | |
7151 | md.hint_b = hint_b_error; | |
7152 | else | |
7153 | return 0; | |
7154 | } | |
8c2fda1d L |
7155 | else if (strncmp (arg, "tune=", 5) == 0) |
7156 | { | |
7157 | arg += 5; | |
7158 | if (strcmp (arg, "itanium1") == 0) | |
7159 | md.tune = itanium1; | |
7160 | else if (strcmp (arg, "itanium2") == 0) | |
7161 | md.tune = itanium2; | |
7162 | else | |
7163 | return 0; | |
7164 | } | |
800eeca4 JW |
7165 | else |
7166 | return 0; | |
7167 | break; | |
7168 | ||
7169 | case 'N': | |
7170 | if (strcmp (arg, "so") == 0) | |
7171 | { | |
542d6675 | 7172 | /* Suppress signon message. */ |
800eeca4 JW |
7173 | } |
7174 | else if (strcmp (arg, "pi") == 0) | |
7175 | { | |
7176 | /* Reject privileged instructions. FIXME */ | |
7177 | } | |
7178 | else if (strcmp (arg, "us") == 0) | |
7179 | { | |
7180 | /* Allow union of signed and unsigned range. FIXME */ | |
7181 | } | |
7182 | else if (strcmp (arg, "close_fcalls") == 0) | |
7183 | { | |
7184 | /* Do not resolve global function calls. */ | |
7185 | } | |
7186 | else | |
7187 | return 0; | |
7188 | break; | |
7189 | ||
7190 | case 'C': | |
7191 | /* temp[="prefix"] Insert temporary labels into the object file | |
7192 | symbol table prefixed by "prefix". | |
7193 | Default prefix is ":temp:". | |
7194 | */ | |
7195 | break; | |
7196 | ||
7197 | case 'a': | |
800eeca4 JW |
7198 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
7199 | according to <tgt> -- | |
7200 | exit: branch out from the current context (default) | |
7201 | labels: all labels in context may be branch targets | |
7202 | */ | |
85b40035 L |
7203 | if (strncmp (arg, "indirect=", 9) != 0) |
7204 | return 0; | |
800eeca4 JW |
7205 | break; |
7206 | ||
7207 | case 'x': | |
7208 | /* -X conflicts with an ignored option, use -x instead */ | |
7209 | md.detect_dv = 1; | |
7210 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
7211 | { |
7212 | /* set default mode to explicit */ | |
7213 | md.default_explicit_mode = 1; | |
7214 | break; | |
7215 | } | |
800eeca4 | 7216 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
7217 | { |
7218 | md.default_explicit_mode = 0; | |
7219 | } | |
f1dab70d JB |
7220 | else if (strcmp (arg, "none") == 0) |
7221 | { | |
7222 | md.detect_dv = 0; | |
7223 | } | |
800eeca4 | 7224 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
7225 | { |
7226 | md.debug_dv = 1; | |
7227 | } | |
800eeca4 | 7228 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
7229 | { |
7230 | md.default_explicit_mode = 1; | |
7231 | md.debug_dv = 1; | |
7232 | } | |
f1dab70d JB |
7233 | else if (strcmp (arg, "debugn") == 0) |
7234 | { | |
7235 | md.debug_dv = 1; | |
7236 | md.detect_dv = 0; | |
7237 | } | |
800eeca4 | 7238 | else |
542d6675 KH |
7239 | { |
7240 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
7241 | } | |
800eeca4 JW |
7242 | break; |
7243 | ||
7244 | case 'S': | |
7245 | /* nops Print nops statistics. */ | |
7246 | break; | |
7247 | ||
c43c2cc5 JW |
7248 | /* GNU specific switches for gcc. */ |
7249 | case OPTION_MCONSTANT_GP: | |
7250 | md.flags |= EF_IA_64_CONS_GP; | |
7251 | break; | |
7252 | ||
7253 | case OPTION_MAUTO_PIC: | |
7254 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
7255 | break; | |
7256 | ||
800eeca4 JW |
7257 | default: |
7258 | return 0; | |
7259 | } | |
7260 | ||
7261 | return 1; | |
7262 | } | |
7263 | ||
7264 | void | |
7265 | md_show_usage (stream) | |
7266 | FILE *stream; | |
7267 | { | |
542d6675 | 7268 | fputs (_("\ |
800eeca4 | 7269 | IA-64 options:\n\ |
6290819d NC |
7270 | --mconstant-gp mark output file as using the constant-GP model\n\ |
7271 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
7272 | --mauto-pic mark output file as using the constant-GP model\n\ | |
7273 | without function descriptors (sets ELF header flag\n\ | |
7274 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
7275 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
7276 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
8c2fda1d L |
7277 | -mtune=[itanium1|itanium2]\n\ |
7278 | tune for a specific CPU (default -mtune=itanium2)\n\ | |
970d6792 L |
7279 | -munwind-check=[warning|error]\n\ |
7280 | unwind directive check (default -munwind-check=warning)\n\ | |
91d777ee L |
7281 | -mhint.b=[ok|warning|error]\n\ |
7282 | hint.b check (default -mhint.b=error)\n\ | |
f1dab70d JB |
7283 | -x | -xexplicit turn on dependency violation checking\n\ |
7284 | -xauto automagically remove dependency violations (default)\n\ | |
7285 | -xnone turn off dependency violation checking\n\ | |
7286 | -xdebug debug dependency violation checker\n\ | |
7287 | -xdebugn debug dependency violation checker but turn off\n\ | |
7288 | dependency violation checking\n\ | |
7289 | -xdebugx debug dependency violation checker and turn on\n\ | |
7290 | dependency violation checking\n"), | |
800eeca4 JW |
7291 | stream); |
7292 | } | |
7293 | ||
acebd4ce AS |
7294 | void |
7295 | ia64_after_parse_args () | |
7296 | { | |
7297 | if (debug_type == DEBUG_STABS) | |
7298 | as_fatal (_("--gstabs is not supported for ia64")); | |
7299 | } | |
7300 | ||
44576e1f RH |
7301 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
7302 | ||
7303 | static int | |
800eeca4 JW |
7304 | match (int templ, int type, int slot) |
7305 | { | |
7306 | enum ia64_unit unit; | |
7307 | int result; | |
7308 | ||
7309 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
7310 | switch (type) | |
7311 | { | |
7312 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
7313 | case IA64_TYPE_A: | |
7314 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
7315 | break; | |
7316 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
7317 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
7318 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
7319 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
7320 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
7321 | default: result = 0; break; | |
7322 | } | |
7323 | return result; | |
7324 | } | |
7325 | ||
7c06efaa JW |
7326 | /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit |
7327 | in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of | |
7328 | type M or I would fit in TEMPL at SLOT. */ | |
44576e1f RH |
7329 | |
7330 | static inline int | |
7331 | extra_goodness (int templ, int slot) | |
7332 | { | |
8c2fda1d L |
7333 | switch (md.tune) |
7334 | { | |
7335 | case itanium1: | |
7336 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) | |
7337 | return 2; | |
7338 | else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) | |
7339 | return 1; | |
7340 | else | |
7341 | return 0; | |
7342 | break; | |
7343 | case itanium2: | |
7344 | if (match (templ, IA64_TYPE_M, slot) | |
7345 | || match (templ, IA64_TYPE_I, slot)) | |
7346 | /* Favor M- and I-unit NOPs. We definitely want to avoid | |
7347 | F-unit and B-unit may cause split-issue or less-than-optimal | |
7348 | branch-prediction. */ | |
7349 | return 2; | |
7350 | else | |
7351 | return 0; | |
7352 | break; | |
7353 | default: | |
7354 | abort (); | |
7355 | return 0; | |
7356 | } | |
44576e1f RH |
7357 | } |
7358 | ||
800eeca4 JW |
7359 | /* This function is called once, at assembler startup time. It sets |
7360 | up all the tables, etc. that the MD part of the assembler will need | |
7361 | that can be determined before arguments are parsed. */ | |
7362 | void | |
7363 | md_begin () | |
7364 | { | |
44f5c83a | 7365 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
7366 | const char *err; |
7367 | char name[8]; | |
7368 | ||
7369 | md.auto_align = 1; | |
7370 | md.explicit_mode = md.default_explicit_mode; | |
7371 | ||
7372 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
7373 | ||
0234cb7c | 7374 | /* Make sure function pointers get initialized. */ |
10a98291 | 7375 | target_big_endian = -1; |
549f748d | 7376 | dot_byteorder (default_big_endian); |
10a98291 | 7377 | |
35f5df7f L |
7378 | alias_hash = hash_new (); |
7379 | alias_name_hash = hash_new (); | |
7380 | secalias_hash = hash_new (); | |
7381 | secalias_name_hash = hash_new (); | |
7382 | ||
13ae64f3 JJ |
7383 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
7384 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
7385 | &zero_address_frag); | |
7386 | ||
7387 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
7388 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
7389 | &zero_address_frag); | |
7390 | ||
800eeca4 | 7391 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
7392 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
7393 | &zero_address_frag); | |
800eeca4 JW |
7394 | |
7395 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
7396 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
7397 | &zero_address_frag); | |
800eeca4 JW |
7398 | |
7399 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
7400 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
7401 | &zero_address_frag); | |
800eeca4 | 7402 | |
fa2c7eff RH |
7403 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
7404 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
7405 | &zero_address_frag); | |
7406 | ||
c67e42c9 | 7407 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
7408 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
7409 | &zero_address_frag); | |
c67e42c9 | 7410 | |
800eeca4 | 7411 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
7412 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
7413 | &zero_address_frag); | |
800eeca4 JW |
7414 | |
7415 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
7416 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
7417 | &zero_address_frag); | |
800eeca4 JW |
7418 | |
7419 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
7420 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
7421 | &zero_address_frag); | |
800eeca4 | 7422 | |
13ae64f3 JJ |
7423 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
7424 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
7425 | &zero_address_frag); | |
7426 | ||
800eeca4 | 7427 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
7428 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
7429 | &zero_address_frag); | |
800eeca4 JW |
7430 | |
7431 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
7432 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
7433 | &zero_address_frag); | |
800eeca4 | 7434 | |
13ae64f3 JJ |
7435 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
7436 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
7437 | &zero_address_frag); | |
7438 | ||
7439 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
7440 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
7441 | &zero_address_frag); | |
7442 | ||
7443 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
7444 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
7445 | &zero_address_frag); | |
7446 | ||
3969b680 RH |
7447 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
7448 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
7449 | &zero_address_frag); | |
7450 | ||
f6fe78d6 JW |
7451 | if (md.tune != itanium1) |
7452 | { | |
7453 | /* Convert MFI NOPs bundles into MMI NOPs bundles. */ | |
7454 | le_nop[0] = 0x8; | |
7455 | le_nop_stop[0] = 0x9; | |
7456 | } | |
7457 | ||
197865e8 | 7458 | /* Compute the table of best templates. We compute goodness as a |
8c2fda1d L |
7459 | base 4 value, in which each match counts for 3. Match-failures |
7460 | result in NOPs and we use extra_goodness() to pick the execution | |
7461 | units that are best suited for issuing the NOP. */ | |
800eeca4 JW |
7462 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
7463 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7464 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7465 | { | |
7466 | best = 0; | |
7467 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
7468 | { | |
7469 | goodness = 0; | |
7470 | if (match (t, i, 0)) | |
7471 | { | |
7472 | if (match (t, j, 1)) | |
7473 | { | |
286cee81 | 7474 | if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) |
44576e1f | 7475 | goodness = 3 + 3 + 3; |
800eeca4 | 7476 | else |
44576e1f | 7477 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
7478 | } |
7479 | else if (match (t, j, 2)) | |
44576e1f | 7480 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 7481 | else |
44576e1f RH |
7482 | { |
7483 | goodness = 3; | |
7484 | goodness += extra_goodness (t, 1); | |
7485 | goodness += extra_goodness (t, 2); | |
7486 | } | |
800eeca4 JW |
7487 | } |
7488 | else if (match (t, i, 1)) | |
7489 | { | |
286cee81 | 7490 | if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) |
44576e1f | 7491 | goodness = 3 + 3; |
800eeca4 | 7492 | else |
44576e1f | 7493 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
7494 | } |
7495 | else if (match (t, i, 2)) | |
44576e1f | 7496 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
7497 | |
7498 | if (goodness > best) | |
7499 | { | |
7500 | best = goodness; | |
7501 | best_template[i][j][k] = t; | |
7502 | } | |
7503 | } | |
7504 | } | |
7505 | ||
7c06efaa JW |
7506 | #ifdef DEBUG_TEMPLATES |
7507 | /* For debugging changes to the best_template calculations. We don't care | |
7508 | about combinations with invalid instructions, so start the loops at 1. */ | |
7509 | for (i = 0; i < IA64_NUM_TYPES; ++i) | |
7510 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
7511 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
7512 | { | |
7513 | char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', | |
7514 | 'x', 'd' }; | |
7515 | fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], | |
7516 | type_letter[k], | |
7517 | ia64_templ_desc[best_template[i][j][k]].name); | |
7518 | } | |
7519 | #endif | |
7520 | ||
800eeca4 JW |
7521 | for (i = 0; i < NUM_SLOTS; ++i) |
7522 | md.slot[i].user_template = -1; | |
7523 | ||
7524 | md.pseudo_hash = hash_new (); | |
7525 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
7526 | { | |
7527 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
7528 | (void *) (pseudo_opcode + i)); | |
7529 | if (err) | |
7530 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
7531 | pseudo_opcode[i].name, err); | |
7532 | } | |
7533 | ||
7534 | md.reg_hash = hash_new (); | |
7535 | md.dynreg_hash = hash_new (); | |
7536 | md.const_hash = hash_new (); | |
7537 | md.entry_hash = hash_new (); | |
7538 | ||
542d6675 | 7539 | /* general registers: */ |
800eeca4 JW |
7540 | |
7541 | total = 128; | |
7542 | for (i = 0; i < total; ++i) | |
7543 | { | |
7544 | sprintf (name, "r%d", i - REG_GR); | |
7545 | md.regsym[i] = declare_register (name, i); | |
7546 | } | |
7547 | ||
542d6675 | 7548 | /* floating point registers: */ |
800eeca4 JW |
7549 | total += 128; |
7550 | for (; i < total; ++i) | |
7551 | { | |
7552 | sprintf (name, "f%d", i - REG_FR); | |
7553 | md.regsym[i] = declare_register (name, i); | |
7554 | } | |
7555 | ||
542d6675 | 7556 | /* application registers: */ |
800eeca4 JW |
7557 | total += 128; |
7558 | ar_base = i; | |
7559 | for (; i < total; ++i) | |
7560 | { | |
7561 | sprintf (name, "ar%d", i - REG_AR); | |
7562 | md.regsym[i] = declare_register (name, i); | |
7563 | } | |
7564 | ||
542d6675 | 7565 | /* control registers: */ |
800eeca4 JW |
7566 | total += 128; |
7567 | cr_base = i; | |
7568 | for (; i < total; ++i) | |
7569 | { | |
7570 | sprintf (name, "cr%d", i - REG_CR); | |
7571 | md.regsym[i] = declare_register (name, i); | |
7572 | } | |
7573 | ||
542d6675 | 7574 | /* predicate registers: */ |
800eeca4 JW |
7575 | total += 64; |
7576 | for (; i < total; ++i) | |
7577 | { | |
7578 | sprintf (name, "p%d", i - REG_P); | |
7579 | md.regsym[i] = declare_register (name, i); | |
7580 | } | |
7581 | ||
542d6675 | 7582 | /* branch registers: */ |
800eeca4 JW |
7583 | total += 8; |
7584 | for (; i < total; ++i) | |
7585 | { | |
7586 | sprintf (name, "b%d", i - REG_BR); | |
7587 | md.regsym[i] = declare_register (name, i); | |
7588 | } | |
7589 | ||
7590 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
7591 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
7592 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
7593 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
7594 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
7595 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
7596 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
7597 | ||
7598 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
7599 | { | |
7600 | regnum = indirect_reg[i].regnum; | |
7601 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
7602 | } | |
7603 | ||
542d6675 | 7604 | /* define synonyms for application registers: */ |
800eeca4 JW |
7605 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
7606 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
7607 | REG_AR + ar[i - REG_AR].regnum); | |
7608 | ||
542d6675 | 7609 | /* define synonyms for control registers: */ |
800eeca4 JW |
7610 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
7611 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
7612 | REG_CR + cr[i - REG_CR].regnum); | |
7613 | ||
7614 | declare_register ("gp", REG_GR + 1); | |
7615 | declare_register ("sp", REG_GR + 12); | |
7616 | declare_register ("rp", REG_BR + 0); | |
7617 | ||
542d6675 | 7618 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
7619 | declare_register ("psp", REG_PSP); |
7620 | ||
800eeca4 JW |
7621 | declare_register_set ("ret", 4, REG_GR + 8); |
7622 | declare_register_set ("farg", 8, REG_FR + 8); | |
7623 | declare_register_set ("fret", 8, REG_FR + 8); | |
7624 | ||
7625 | for (i = 0; i < NELEMS (const_bits); ++i) | |
7626 | { | |
7627 | err = hash_insert (md.const_hash, const_bits[i].name, | |
7628 | (PTR) (const_bits + i)); | |
7629 | if (err) | |
7630 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
7631 | name, err); | |
7632 | } | |
7633 | ||
44f5c83a JW |
7634 | /* Set the architecture and machine depending on defaults and command line |
7635 | options. */ | |
7636 | if (md.flags & EF_IA_64_ABI64) | |
7637 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
7638 | else | |
7639 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
7640 | ||
7641 | if (! ok) | |
7642 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 7643 | |
557debba JW |
7644 | /* Set the pointer size and pointer shift size depending on md.flags */ |
7645 | ||
7646 | if (md.flags & EF_IA_64_ABI64) | |
7647 | { | |
7648 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
7649 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
7650 | } | |
7651 | else | |
7652 | { | |
7653 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
7654 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
7655 | } | |
7656 | ||
800eeca4 JW |
7657 | md.mem_offset.hint = 0; |
7658 | md.path = 0; | |
7659 | md.maxpaths = 0; | |
7660 | md.entry_labels = NULL; | |
7661 | } | |
7662 | ||
970d6792 L |
7663 | /* Set the default options in md. Cannot do this in md_begin because |
7664 | that is called after md_parse_option which is where we set the | |
7665 | options in md based on command line options. */ | |
44f5c83a JW |
7666 | |
7667 | void | |
7668 | ia64_init (argc, argv) | |
2434f565 JW |
7669 | int argc ATTRIBUTE_UNUSED; |
7670 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7671 | { |
1cd8ff38 | 7672 | md.flags = MD_FLAGS_DEFAULT; |
f1dab70d | 7673 | md.detect_dv = 1; |
970d6792 L |
7674 | /* FIXME: We should change it to unwind_check_error someday. */ |
7675 | md.unwind_check = unwind_check_warning; | |
91d777ee | 7676 | md.hint_b = hint_b_error; |
8c2fda1d | 7677 | md.tune = itanium2; |
44f5c83a JW |
7678 | } |
7679 | ||
7680 | /* Return a string for the target object file format. */ | |
7681 | ||
7682 | const char * | |
7683 | ia64_target_format () | |
7684 | { | |
7685 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7686 | { | |
72a76794 JW |
7687 | if (md.flags & EF_IA_64_BE) |
7688 | { | |
7689 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7690 | #if defined(TE_AIX50) |
7463c317 | 7691 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7692 | #elif defined(TE_HPUX) |
7693 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7694 | #else |
72a76794 | 7695 | return "elf64-ia64-big"; |
7463c317 | 7696 | #endif |
72a76794 | 7697 | else |
1cd8ff38 | 7698 | #if defined(TE_AIX50) |
7463c317 | 7699 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7700 | #elif defined(TE_HPUX) |
7701 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7702 | #else |
72a76794 | 7703 | return "elf32-ia64-big"; |
7463c317 | 7704 | #endif |
72a76794 | 7705 | } |
44f5c83a | 7706 | else |
72a76794 JW |
7707 | { |
7708 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7709 | #ifdef TE_AIX50 |
7710 | return "elf64-ia64-aix-little"; | |
7711 | #else | |
72a76794 | 7712 | return "elf64-ia64-little"; |
7463c317 | 7713 | #endif |
72a76794 | 7714 | else |
7463c317 TW |
7715 | #ifdef TE_AIX50 |
7716 | return "elf32-ia64-aix-little"; | |
7717 | #else | |
72a76794 | 7718 | return "elf32-ia64-little"; |
7463c317 | 7719 | #endif |
72a76794 | 7720 | } |
44f5c83a JW |
7721 | } |
7722 | else | |
7723 | return "unknown-format"; | |
7724 | } | |
7725 | ||
800eeca4 JW |
7726 | void |
7727 | ia64_end_of_source () | |
7728 | { | |
542d6675 | 7729 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7730 | insn_group_break (1, 0, 0); |
7731 | ||
542d6675 | 7732 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7733 | ia64_flush_insns (); |
7734 | ||
7735 | bfd_set_private_flags (stdoutput, md.flags); | |
7736 | ||
800eeca4 JW |
7737 | md.mem_offset.hint = 0; |
7738 | } | |
7739 | ||
7740 | void | |
7741 | ia64_start_line () | |
7742 | { | |
e4e8248d JB |
7743 | static int first; |
7744 | ||
7745 | if (!first) { | |
7746 | /* Make sure we don't reference input_line_pointer[-1] when that's | |
7747 | not valid. */ | |
7748 | first = 1; | |
7749 | return; | |
7750 | } | |
7751 | ||
f1bcba5b JW |
7752 | if (md.qp.X_op == O_register) |
7753 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7754 | md.qp.X_op = O_absent; |
7755 | ||
7756 | if (ignore_input ()) | |
7757 | return; | |
7758 | ||
7759 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7760 | { | |
7761 | if (md.detect_dv && !md.explicit_mode) | |
f1dab70d JB |
7762 | { |
7763 | static int warned; | |
7764 | ||
7765 | if (!warned) | |
7766 | { | |
7767 | warned = 1; | |
7768 | as_warn (_("Explicit stops are ignored in auto mode")); | |
7769 | } | |
7770 | } | |
800eeca4 | 7771 | else |
542d6675 | 7772 | insn_group_break (1, 0, 0); |
800eeca4 | 7773 | } |
e4e8248d | 7774 | else if (input_line_pointer[-1] == '{') |
800eeca4 | 7775 | { |
800eeca4 JW |
7776 | if (md.manual_bundling) |
7777 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7778 | else | |
7779 | CURR_SLOT.manual_bundling_on = 1; | |
7780 | md.manual_bundling = 1; | |
7781 | ||
542d6675 KH |
7782 | /* Bundling is only acceptable in explicit mode |
7783 | or when in default automatic mode. */ | |
800eeca4 | 7784 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7785 | { |
7786 | if (!md.mode_explicitly_set | |
7787 | && !md.default_explicit_mode) | |
7788 | dot_dv_mode ('E'); | |
7789 | else | |
7790 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7791 | } | |
e4e8248d JB |
7792 | } |
7793 | else if (input_line_pointer[-1] == '}') | |
7794 | { | |
800eeca4 JW |
7795 | if (!md.manual_bundling) |
7796 | as_warn ("Found '}' when manual bundling is off"); | |
7797 | else | |
7798 | PREV_SLOT.manual_bundling_off = 1; | |
7799 | md.manual_bundling = 0; | |
7800 | ||
7801 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7802 | if (md.detect_dv |
542d6675 KH |
7803 | && md.explicit_mode |
7804 | && !md.mode_explicitly_set | |
7805 | && !md.default_explicit_mode) | |
7806 | dot_dv_mode ('A'); | |
e4e8248d JB |
7807 | } |
7808 | } | |
800eeca4 | 7809 | |
e4e8248d JB |
7810 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7811 | labels. */ | |
7812 | static int defining_tag = 0; | |
7813 | ||
7814 | int | |
7815 | ia64_unrecognized_line (ch) | |
7816 | int ch; | |
7817 | { | |
7818 | switch (ch) | |
7819 | { | |
7820 | case '(': | |
7821 | expression (&md.qp); | |
7822 | if (*input_line_pointer++ != ')') | |
800eeca4 | 7823 | { |
e4e8248d JB |
7824 | as_bad ("Expected ')'"); |
7825 | return 0; | |
7826 | } | |
7827 | if (md.qp.X_op != O_register) | |
7828 | { | |
7829 | as_bad ("Qualifying predicate expected"); | |
7830 | return 0; | |
7831 | } | |
7832 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7833 | { | |
7834 | as_bad ("Predicate register expected"); | |
7835 | return 0; | |
800eeca4 | 7836 | } |
800eeca4 JW |
7837 | return 1; |
7838 | ||
f1bcba5b JW |
7839 | case '[': |
7840 | { | |
7841 | char *s; | |
7842 | char c; | |
7843 | symbolS *tag; | |
4d5a53ff | 7844 | int temp; |
f1bcba5b JW |
7845 | |
7846 | if (md.qp.X_op == O_register) | |
7847 | { | |
7848 | as_bad ("Tag must come before qualifying predicate."); | |
7849 | return 0; | |
7850 | } | |
4d5a53ff JW |
7851 | |
7852 | /* This implements just enough of read_a_source_file in read.c to | |
7853 | recognize labels. */ | |
7854 | if (is_name_beginner (*input_line_pointer)) | |
7855 | { | |
7856 | s = input_line_pointer; | |
7857 | c = get_symbol_end (); | |
7858 | } | |
7859 | else if (LOCAL_LABELS_FB | |
3882b010 | 7860 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7861 | { |
7862 | temp = 0; | |
3882b010 | 7863 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7864 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7865 | fb_label_instance_inc (temp); | |
7866 | s = fb_label_name (temp, 0); | |
7867 | c = *input_line_pointer; | |
7868 | } | |
7869 | else | |
7870 | { | |
7871 | s = NULL; | |
7872 | c = '\0'; | |
7873 | } | |
f1bcba5b JW |
7874 | if (c != ':') |
7875 | { | |
7876 | /* Put ':' back for error messages' sake. */ | |
7877 | *input_line_pointer++ = ':'; | |
7878 | as_bad ("Expected ':'"); | |
7879 | return 0; | |
7880 | } | |
4d5a53ff | 7881 | |
f1bcba5b JW |
7882 | defining_tag = 1; |
7883 | tag = colon (s); | |
7884 | defining_tag = 0; | |
7885 | /* Put ':' back for error messages' sake. */ | |
7886 | *input_line_pointer++ = ':'; | |
7887 | if (*input_line_pointer++ != ']') | |
7888 | { | |
7889 | as_bad ("Expected ']'"); | |
7890 | return 0; | |
7891 | } | |
7892 | if (! tag) | |
7893 | { | |
7894 | as_bad ("Tag name expected"); | |
7895 | return 0; | |
7896 | } | |
7897 | return 1; | |
7898 | } | |
7899 | ||
800eeca4 JW |
7900 | default: |
7901 | break; | |
7902 | } | |
542d6675 KH |
7903 | |
7904 | /* Not a valid line. */ | |
7905 | return 0; | |
800eeca4 JW |
7906 | } |
7907 | ||
7908 | void | |
7909 | ia64_frob_label (sym) | |
7910 | struct symbol *sym; | |
7911 | { | |
7912 | struct label_fix *fix; | |
7913 | ||
f1bcba5b JW |
7914 | /* Tags need special handling since they are not bundle breaks like |
7915 | labels. */ | |
7916 | if (defining_tag) | |
7917 | { | |
7918 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7919 | fix->sym = sym; | |
7920 | fix->next = CURR_SLOT.tag_fixups; | |
07a53e5c | 7921 | fix->dw2_mark_labels = FALSE; |
f1bcba5b JW |
7922 | CURR_SLOT.tag_fixups = fix; |
7923 | ||
7924 | return; | |
7925 | } | |
7926 | ||
800eeca4 JW |
7927 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7928 | { | |
7929 | md.last_text_seg = now_seg; | |
7930 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7931 | fix->sym = sym; | |
7932 | fix->next = CURR_SLOT.label_fixups; | |
07a53e5c | 7933 | fix->dw2_mark_labels = dwarf2_loc_mark_labels; |
800eeca4 JW |
7934 | CURR_SLOT.label_fixups = fix; |
7935 | ||
542d6675 | 7936 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7937 | if (md.path == md.maxpaths) |
542d6675 KH |
7938 | { |
7939 | md.maxpaths += 20; | |
7940 | md.entry_labels = (const char **) | |
7941 | xrealloc ((void *) md.entry_labels, | |
7942 | md.maxpaths * sizeof (char *)); | |
7943 | } | |
800eeca4 JW |
7944 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7945 | } | |
7946 | } | |
7947 | ||
936cf02e JW |
7948 | #ifdef TE_HPUX |
7949 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7950 | that are declared but unused. This routine removes declared, | |
7951 | unused symbols from an object. */ | |
7952 | int | |
7953 | ia64_frob_symbol (sym) | |
7954 | struct symbol *sym; | |
7955 | { | |
7956 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7957 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7958 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7959 | && ! S_IS_EXTERNAL (sym))) | |
7960 | return 1; | |
7961 | return 0; | |
7962 | } | |
7963 | #endif | |
7964 | ||
800eeca4 JW |
7965 | void |
7966 | ia64_flush_pending_output () | |
7967 | { | |
4d5a53ff JW |
7968 | if (!md.keep_pending_output |
7969 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7970 | { |
7971 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7972 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7973 | insn_group_break (1, 0, 0); | |
7974 | ia64_flush_insns (); | |
7975 | } | |
7976 | } | |
7977 | ||
7978 | /* Do ia64-specific expression optimization. All that's done here is | |
7979 | to transform index expressions that are either due to the indexing | |
7980 | of rotating registers or due to the indexing of indirect register | |
7981 | sets. */ | |
7982 | int | |
7983 | ia64_optimize_expr (l, op, r) | |
7984 | expressionS *l; | |
7985 | operatorT op; | |
7986 | expressionS *r; | |
7987 | { | |
7988 | unsigned num_regs; | |
7989 | ||
7990 | if (op == O_index) | |
7991 | { | |
7992 | if (l->X_op == O_register && r->X_op == O_constant) | |
7993 | { | |
7994 | num_regs = (l->X_add_number >> 16); | |
7995 | if ((unsigned) r->X_add_number >= num_regs) | |
7996 | { | |
7997 | if (!num_regs) | |
7998 | as_bad ("No current frame"); | |
7999 | else | |
8000 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
8001 | r->X_add_number = 0; | |
8002 | } | |
8003 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
8004 | return 1; | |
8005 | } | |
8006 | else if (l->X_op == O_register && r->X_op == O_register) | |
8007 | { | |
8008 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
8009 | || l->X_add_number == IND_MEM) | |
8010 | { | |
8011 | as_bad ("Indirect register set name expected"); | |
8012 | l->X_add_number = IND_CPUID; | |
8013 | } | |
8014 | l->X_op = O_index; | |
8015 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
8016 | l->X_add_number = r->X_add_number; | |
8017 | return 1; | |
8018 | } | |
8019 | } | |
8020 | return 0; | |
8021 | } | |
8022 | ||
8023 | int | |
16a48f83 | 8024 | ia64_parse_name (name, e, nextcharP) |
800eeca4 JW |
8025 | char *name; |
8026 | expressionS *e; | |
16a48f83 | 8027 | char *nextcharP; |
800eeca4 JW |
8028 | { |
8029 | struct const_desc *cdesc; | |
8030 | struct dynreg *dr = 0; | |
16a48f83 | 8031 | unsigned int idx; |
800eeca4 JW |
8032 | struct symbol *sym; |
8033 | char *end; | |
8034 | ||
16a48f83 JB |
8035 | if (*name == '@') |
8036 | { | |
8037 | enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; | |
8038 | ||
8039 | /* Find what relocation pseudo-function we're dealing with. */ | |
8040 | for (idx = 0; idx < NELEMS (pseudo_func); ++idx) | |
8041 | if (pseudo_func[idx].name | |
8042 | && pseudo_func[idx].name[0] == name[1] | |
8043 | && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) | |
8044 | { | |
8045 | pseudo_type = pseudo_func[idx].type; | |
8046 | break; | |
8047 | } | |
8048 | switch (pseudo_type) | |
8049 | { | |
8050 | case PSEUDO_FUNC_RELOC: | |
8051 | end = input_line_pointer; | |
8052 | if (*nextcharP != '(') | |
8053 | { | |
8054 | as_bad ("Expected '('"); | |
2f6d622e | 8055 | break; |
16a48f83 JB |
8056 | } |
8057 | /* Skip '('. */ | |
8058 | ++input_line_pointer; | |
8059 | expression (e); | |
8060 | if (*input_line_pointer != ')') | |
8061 | { | |
8062 | as_bad ("Missing ')'"); | |
8063 | goto done; | |
8064 | } | |
8065 | /* Skip ')'. */ | |
8066 | ++input_line_pointer; | |
8067 | if (e->X_op != O_symbol) | |
8068 | { | |
8069 | if (e->X_op != O_pseudo_fixup) | |
8070 | { | |
8071 | as_bad ("Not a symbolic expression"); | |
8072 | goto done; | |
8073 | } | |
8074 | if (idx != FUNC_LT_RELATIVE) | |
8075 | { | |
8076 | as_bad ("Illegal combination of relocation functions"); | |
8077 | goto done; | |
8078 | } | |
8079 | switch (S_GET_VALUE (e->X_op_symbol)) | |
8080 | { | |
8081 | case FUNC_FPTR_RELATIVE: | |
8082 | idx = FUNC_LT_FPTR_RELATIVE; break; | |
8083 | case FUNC_DTP_MODULE: | |
8084 | idx = FUNC_LT_DTP_MODULE; break; | |
8085 | case FUNC_DTP_RELATIVE: | |
8086 | idx = FUNC_LT_DTP_RELATIVE; break; | |
8087 | case FUNC_TP_RELATIVE: | |
8088 | idx = FUNC_LT_TP_RELATIVE; break; | |
8089 | default: | |
8090 | as_bad ("Illegal combination of relocation functions"); | |
8091 | goto done; | |
8092 | } | |
8093 | } | |
8094 | /* Make sure gas doesn't get rid of local symbols that are used | |
8095 | in relocs. */ | |
8096 | e->X_op = O_pseudo_fixup; | |
8097 | e->X_op_symbol = pseudo_func[idx].u.sym; | |
2f6d622e JB |
8098 | done: |
8099 | *nextcharP = *input_line_pointer; | |
16a48f83 JB |
8100 | break; |
8101 | ||
8102 | case PSEUDO_FUNC_CONST: | |
8103 | e->X_op = O_constant; | |
8104 | e->X_add_number = pseudo_func[idx].u.ival; | |
8105 | break; | |
8106 | ||
8107 | case PSEUDO_FUNC_REG: | |
8108 | e->X_op = O_register; | |
8109 | e->X_add_number = pseudo_func[idx].u.ival; | |
8110 | break; | |
8111 | ||
8112 | default: | |
8113 | return 0; | |
8114 | } | |
16a48f83 JB |
8115 | return 1; |
8116 | } | |
8117 | ||
542d6675 | 8118 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
8119 | sym = hash_find (md.reg_hash, name); |
8120 | if (sym) | |
8121 | { | |
8122 | e->X_op = O_register; | |
8123 | e->X_add_number = S_GET_VALUE (sym); | |
8124 | return 1; | |
8125 | } | |
8126 | ||
8127 | cdesc = hash_find (md.const_hash, name); | |
8128 | if (cdesc) | |
8129 | { | |
8130 | e->X_op = O_constant; | |
8131 | e->X_add_number = cdesc->value; | |
8132 | return 1; | |
8133 | } | |
8134 | ||
542d6675 | 8135 | /* check for inN, locN, or outN: */ |
26b810ce | 8136 | idx = 0; |
800eeca4 JW |
8137 | switch (name[0]) |
8138 | { | |
8139 | case 'i': | |
3882b010 | 8140 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
8141 | { |
8142 | dr = &md.in; | |
26b810ce | 8143 | idx = 2; |
800eeca4 JW |
8144 | } |
8145 | break; | |
8146 | ||
8147 | case 'l': | |
3882b010 | 8148 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
8149 | { |
8150 | dr = &md.loc; | |
26b810ce | 8151 | idx = 3; |
800eeca4 JW |
8152 | } |
8153 | break; | |
8154 | ||
8155 | case 'o': | |
3882b010 | 8156 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
8157 | { |
8158 | dr = &md.out; | |
26b810ce | 8159 | idx = 3; |
800eeca4 JW |
8160 | } |
8161 | break; | |
8162 | ||
8163 | default: | |
8164 | break; | |
8165 | } | |
8166 | ||
26b810ce JB |
8167 | /* Ignore register numbers with leading zeroes, except zero itself. */ |
8168 | if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) | |
800eeca4 | 8169 | { |
26b810ce JB |
8170 | unsigned long regnum; |
8171 | ||
542d6675 | 8172 | /* The name is inN, locN, or outN; parse the register number. */ |
26b810ce JB |
8173 | regnum = strtoul (name + idx, &end, 10); |
8174 | if (end > name + idx && *end == '\0' && regnum < 96) | |
800eeca4 | 8175 | { |
26b810ce | 8176 | if (regnum >= dr->num_regs) |
800eeca4 JW |
8177 | { |
8178 | if (!dr->num_regs) | |
8179 | as_bad ("No current frame"); | |
8180 | else | |
542d6675 KH |
8181 | as_bad ("Register number out of range 0..%u", |
8182 | dr->num_regs - 1); | |
800eeca4 JW |
8183 | regnum = 0; |
8184 | } | |
8185 | e->X_op = O_register; | |
8186 | e->X_add_number = dr->base + regnum; | |
8187 | return 1; | |
8188 | } | |
8189 | } | |
8190 | ||
20b36a95 JB |
8191 | end = alloca (strlen (name) + 1); |
8192 | strcpy (end, name); | |
8193 | name = ia64_canonicalize_symbol_name (end); | |
800eeca4 JW |
8194 | if ((dr = hash_find (md.dynreg_hash, name))) |
8195 | { | |
8196 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
8197 | Store the base register number in the low 16 bits of |
8198 | X_add_number and the size of the register set in the top 16 | |
8199 | bits. */ | |
800eeca4 JW |
8200 | e->X_op = O_register; |
8201 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
8202 | return 1; | |
8203 | } | |
8204 | return 0; | |
8205 | } | |
8206 | ||
8207 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
8208 | ||
8209 | char * | |
8210 | ia64_canonicalize_symbol_name (name) | |
8211 | char *name; | |
8212 | { | |
20b36a95 JB |
8213 | size_t len = strlen (name), full = len; |
8214 | ||
8215 | while (len > 0 && name[len - 1] == '#') | |
8216 | --len; | |
8217 | if (len <= 0) | |
8218 | { | |
8219 | if (full > 0) | |
8220 | as_bad ("Standalone `#' is illegal"); | |
20b36a95 JB |
8221 | } |
8222 | else if (len < full - 1) | |
8223 | as_warn ("Redundant `#' suffix operators"); | |
8224 | name[len] = '\0'; | |
800eeca4 JW |
8225 | return name; |
8226 | } | |
8227 | ||
3e37788f JW |
8228 | /* Return true if idesc is a conditional branch instruction. This excludes |
8229 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
8230 | because they always read/write resources regardless of the value of the | |
8231 | qualifying predicate. br.ia must always use p0, and hence is always | |
8232 | taken. Thus this function returns true for branches which can fall | |
8233 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 8234 | |
800eeca4 JW |
8235 | static int |
8236 | is_conditional_branch (idesc) | |
542d6675 | 8237 | struct ia64_opcode *idesc; |
800eeca4 | 8238 | { |
1deb8127 | 8239 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
8240 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
8241 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
8242 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
8243 | && (idesc->name[2] == '\0' | |
3e37788f JW |
8244 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
8245 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
8246 | || idesc->name[2] == 'l' | |
8247 | /* br.cond, br.call, br.clr */ | |
8248 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
8249 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
8250 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
8251 | } |
8252 | ||
8253 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
8254 | returns zero. */ |
8255 | ||
800eeca4 JW |
8256 | static int |
8257 | is_taken_branch (idesc) | |
542d6675 | 8258 | struct ia64_opcode *idesc; |
800eeca4 JW |
8259 | { |
8260 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 8261 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
8262 | } |
8263 | ||
8264 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
8265 | doubt, returns zero. */ |
8266 | ||
800eeca4 JW |
8267 | static int |
8268 | is_interruption_or_rfi (idesc) | |
542d6675 | 8269 | struct ia64_opcode *idesc; |
800eeca4 JW |
8270 | { |
8271 | if (strcmp (idesc->name, "rfi") == 0) | |
8272 | return 1; | |
8273 | return 0; | |
8274 | } | |
8275 | ||
8276 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
8277 | -1 if there is no dependency. */ | |
542d6675 | 8278 | |
800eeca4 JW |
8279 | static int |
8280 | depends_on (depind, idesc) | |
542d6675 KH |
8281 | int depind; |
8282 | struct ia64_opcode *idesc; | |
800eeca4 JW |
8283 | { |
8284 | int i; | |
8285 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 8286 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 8287 | { |
542d6675 KH |
8288 | if (depind == DEP (dep->chks[i])) |
8289 | return i; | |
800eeca4 JW |
8290 | } |
8291 | return -1; | |
8292 | } | |
8293 | ||
8294 | /* Determine a set of specific resources used for a particular resource | |
8295 | class. Returns the number of specific resources identified For those | |
8296 | cases which are not determinable statically, the resource returned is | |
197865e8 | 8297 | marked nonspecific. |
800eeca4 JW |
8298 | |
8299 | Meanings of value in 'NOTE': | |
8300 | 1) only read/write when the register number is explicitly encoded in the | |
8301 | insn. | |
8302 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 8303 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
8304 | 3) general register value is used to specify an indirect register; not |
8305 | determinable statically. | |
8306 | 4) only read the given resource when bits 7:0 of the indirect index | |
8307 | register value does not match the register number of the resource; not | |
8308 | determinable statically. | |
8309 | 5) all rules are implementation specific. | |
8310 | 6) only when both the index specified by the reader and the index specified | |
8311 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 8312 | statically. |
800eeca4 | 8313 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 8314 | set |
800eeca4 JW |
8315 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
8316 | only read when these insns reference FR2-31 | |
8317 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
8318 | written when these insns write FR32-127 | |
8319 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
8320 | instruction | |
8321 | 11) The target predicates are written independently of PR[qp], but source | |
8322 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
8323 | cannot statically be determined, all source registers are marked used. | |
8324 | 12) This insn only reads the specified predicate register when that | |
8325 | register is the PR[qp]. | |
8326 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 8327 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
8328 | 14) The RSE resource includes the implementation-specific RSE internal |
8329 | state resources. At least one (and possibly more) of these resources are | |
8330 | read by each instruction listed in IC:rse-readers. At least one (and | |
8331 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 8332 | IC:rse-writers. |
800eeca4 | 8333 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 8334 | generate. |
800eeca4 JW |
8335 | |
8336 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
8337 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
8338 | */ |
8339 | ||
8340 | #define MAX_SPECS 256 | |
8341 | #define DV_CHK 1 | |
8342 | #define DV_REG 0 | |
8343 | ||
8344 | static int | |
8345 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
8346 | const struct ia64_dependency *dep; |
8347 | struct ia64_opcode *idesc; | |
8348 | int type; /* is this a DV chk or a DV reg? */ | |
8349 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
8350 | int note; /* resource note for this insn's usage */ | |
8351 | int path; /* which execution path to examine */ | |
800eeca4 JW |
8352 | { |
8353 | int count = 0; | |
8354 | int i; | |
8355 | int rsrc_write = 0; | |
8356 | struct rsrc tmpl; | |
197865e8 | 8357 | |
800eeca4 JW |
8358 | if (dep->mode == IA64_DV_WAW |
8359 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
8360 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
8361 | rsrc_write = 1; | |
8362 | ||
8363 | /* template for any resources we identify */ | |
8364 | tmpl.dependency = dep; | |
8365 | tmpl.note = note; | |
8366 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
8367 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
8368 | tmpl.link_to_qp_branch = 1; | |
8369 | tmpl.mem_offset.hint = 0; | |
1f8b1395 AS |
8370 | tmpl.mem_offset.offset = 0; |
8371 | tmpl.mem_offset.base = 0; | |
800eeca4 | 8372 | tmpl.specific = 1; |
a66d2bb7 | 8373 | tmpl.index = -1; |
7484b8e6 | 8374 | tmpl.cmp_type = CMP_NONE; |
1f8b1395 AS |
8375 | tmpl.depind = 0; |
8376 | tmpl.file = NULL; | |
8377 | tmpl.line = 0; | |
8378 | tmpl.path = 0; | |
800eeca4 JW |
8379 | |
8380 | #define UNHANDLED \ | |
8381 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
8382 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
8383 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
8384 | ||
8385 | /* we don't need to track these */ | |
8386 | if (dep->semantics == IA64_DVS_NONE) | |
8387 | return 0; | |
8388 | ||
8389 | switch (dep->specifier) | |
8390 | { | |
8391 | case IA64_RS_AR_K: | |
8392 | if (note == 1) | |
542d6675 KH |
8393 | { |
8394 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8395 | { | |
8396 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8397 | if (regno >= 0 && regno <= 7) | |
8398 | { | |
8399 | specs[count] = tmpl; | |
8400 | specs[count++].index = regno; | |
8401 | } | |
8402 | } | |
8403 | } | |
800eeca4 | 8404 | else if (note == 0) |
542d6675 KH |
8405 | { |
8406 | for (i = 0; i < 8; i++) | |
8407 | { | |
8408 | specs[count] = tmpl; | |
8409 | specs[count++].index = i; | |
8410 | } | |
8411 | } | |
800eeca4 | 8412 | else |
542d6675 KH |
8413 | { |
8414 | UNHANDLED; | |
8415 | } | |
800eeca4 JW |
8416 | break; |
8417 | ||
8418 | case IA64_RS_AR_UNAT: | |
8419 | /* This is a mov =AR or mov AR= instruction. */ | |
8420 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8421 | { | |
8422 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8423 | if (regno == AR_UNAT) | |
8424 | { | |
8425 | specs[count++] = tmpl; | |
8426 | } | |
8427 | } | |
8428 | else | |
8429 | { | |
8430 | /* This is a spill/fill, or other instruction that modifies the | |
8431 | unat register. */ | |
8432 | ||
8433 | /* Unless we can determine the specific bits used, mark the whole | |
8434 | thing; bits 8:3 of the memory address indicate the bit used in | |
8435 | UNAT. The .mem.offset hint may be used to eliminate a small | |
8436 | subset of conflicts. */ | |
8437 | specs[count] = tmpl; | |
8438 | if (md.mem_offset.hint) | |
8439 | { | |
542d6675 KH |
8440 | if (md.debug_dv) |
8441 | fprintf (stderr, " Using hint for spill/fill\n"); | |
8442 | /* The index isn't actually used, just set it to something | |
8443 | approximating the bit index. */ | |
800eeca4 JW |
8444 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
8445 | specs[count].mem_offset.hint = 1; | |
8446 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
8447 | specs[count++].mem_offset.base = md.mem_offset.base; | |
8448 | } | |
8449 | else | |
8450 | { | |
8451 | specs[count++].specific = 0; | |
8452 | } | |
8453 | } | |
8454 | break; | |
8455 | ||
8456 | case IA64_RS_AR: | |
8457 | if (note == 1) | |
542d6675 KH |
8458 | { |
8459 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8460 | { | |
8461 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8462 | if ((regno >= 8 && regno <= 15) | |
8463 | || (regno >= 20 && regno <= 23) | |
8464 | || (regno >= 31 && regno <= 39) | |
8465 | || (regno >= 41 && regno <= 47) | |
8466 | || (regno >= 67 && regno <= 111)) | |
8467 | { | |
8468 | specs[count] = tmpl; | |
8469 | specs[count++].index = regno; | |
8470 | } | |
8471 | } | |
8472 | } | |
800eeca4 | 8473 | else |
542d6675 KH |
8474 | { |
8475 | UNHANDLED; | |
8476 | } | |
800eeca4 JW |
8477 | break; |
8478 | ||
8479 | case IA64_RS_ARb: | |
8480 | if (note == 1) | |
542d6675 KH |
8481 | { |
8482 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
8483 | { | |
8484 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8485 | if ((regno >= 48 && regno <= 63) | |
8486 | || (regno >= 112 && regno <= 127)) | |
8487 | { | |
8488 | specs[count] = tmpl; | |
8489 | specs[count++].index = regno; | |
8490 | } | |
8491 | } | |
8492 | } | |
800eeca4 | 8493 | else if (note == 0) |
542d6675 KH |
8494 | { |
8495 | for (i = 48; i < 64; i++) | |
8496 | { | |
8497 | specs[count] = tmpl; | |
8498 | specs[count++].index = i; | |
8499 | } | |
8500 | for (i = 112; i < 128; i++) | |
8501 | { | |
8502 | specs[count] = tmpl; | |
8503 | specs[count++].index = i; | |
8504 | } | |
8505 | } | |
197865e8 | 8506 | else |
542d6675 KH |
8507 | { |
8508 | UNHANDLED; | |
8509 | } | |
800eeca4 JW |
8510 | break; |
8511 | ||
8512 | case IA64_RS_BR: | |
8513 | if (note != 1) | |
542d6675 KH |
8514 | { |
8515 | UNHANDLED; | |
8516 | } | |
800eeca4 | 8517 | else |
542d6675 KH |
8518 | { |
8519 | if (rsrc_write) | |
8520 | { | |
8521 | for (i = 0; i < idesc->num_outputs; i++) | |
8522 | if (idesc->operands[i] == IA64_OPND_B1 | |
8523 | || idesc->operands[i] == IA64_OPND_B2) | |
8524 | { | |
8525 | specs[count] = tmpl; | |
8526 | specs[count++].index = | |
8527 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8528 | } | |
8529 | } | |
8530 | else | |
8531 | { | |
40449e9f | 8532 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
8533 | if (idesc->operands[i] == IA64_OPND_B1 |
8534 | || idesc->operands[i] == IA64_OPND_B2) | |
8535 | { | |
8536 | specs[count] = tmpl; | |
8537 | specs[count++].index = | |
8538 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
8539 | } | |
8540 | } | |
8541 | } | |
800eeca4 JW |
8542 | break; |
8543 | ||
8544 | case IA64_RS_CPUID: /* four or more registers */ | |
8545 | if (note == 3) | |
542d6675 KH |
8546 | { |
8547 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
8548 | { | |
8549 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8550 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8551 | && KNOWN (regno)) | |
8552 | { | |
8553 | specs[count] = tmpl; | |
8554 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8555 | } | |
8556 | else | |
8557 | { | |
8558 | specs[count] = tmpl; | |
8559 | specs[count++].specific = 0; | |
8560 | } | |
8561 | } | |
8562 | } | |
800eeca4 | 8563 | else |
542d6675 KH |
8564 | { |
8565 | UNHANDLED; | |
8566 | } | |
800eeca4 JW |
8567 | break; |
8568 | ||
8569 | case IA64_RS_DBR: /* four or more registers */ | |
8570 | if (note == 3) | |
542d6675 KH |
8571 | { |
8572 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
8573 | { | |
8574 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8575 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8576 | && KNOWN (regno)) | |
8577 | { | |
8578 | specs[count] = tmpl; | |
8579 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8580 | } | |
8581 | else | |
8582 | { | |
8583 | specs[count] = tmpl; | |
8584 | specs[count++].specific = 0; | |
8585 | } | |
8586 | } | |
8587 | } | |
800eeca4 | 8588 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8589 | { |
8590 | specs[count] = tmpl; | |
8591 | specs[count++].specific = 0; | |
8592 | } | |
800eeca4 | 8593 | else |
542d6675 KH |
8594 | { |
8595 | UNHANDLED; | |
8596 | } | |
800eeca4 JW |
8597 | break; |
8598 | ||
8599 | case IA64_RS_IBR: /* four or more registers */ | |
8600 | if (note == 3) | |
542d6675 KH |
8601 | { |
8602 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
8603 | { | |
8604 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8605 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8606 | && KNOWN (regno)) | |
8607 | { | |
8608 | specs[count] = tmpl; | |
8609 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8610 | } | |
8611 | else | |
8612 | { | |
8613 | specs[count] = tmpl; | |
8614 | specs[count++].specific = 0; | |
8615 | } | |
8616 | } | |
8617 | } | |
800eeca4 | 8618 | else |
542d6675 KH |
8619 | { |
8620 | UNHANDLED; | |
8621 | } | |
800eeca4 JW |
8622 | break; |
8623 | ||
8624 | case IA64_RS_MSR: | |
8625 | if (note == 5) | |
8626 | { | |
8627 | /* These are implementation specific. Force all references to | |
8628 | conflict with all other references. */ | |
8629 | specs[count] = tmpl; | |
8630 | specs[count++].specific = 0; | |
8631 | } | |
8632 | else | |
8633 | { | |
8634 | UNHANDLED; | |
8635 | } | |
8636 | break; | |
8637 | ||
8638 | case IA64_RS_PKR: /* 16 or more registers */ | |
8639 | if (note == 3 || note == 4) | |
542d6675 KH |
8640 | { |
8641 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
8642 | { | |
8643 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8644 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8645 | && KNOWN (regno)) | |
8646 | { | |
8647 | if (note == 3) | |
8648 | { | |
8649 | specs[count] = tmpl; | |
8650 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8651 | } | |
8652 | else | |
8653 | for (i = 0; i < NELEMS (gr_values); i++) | |
8654 | { | |
8655 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 8656 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
8657 | { |
8658 | specs[count] = tmpl; | |
8659 | specs[count++].index = i; | |
8660 | } | |
8661 | } | |
8662 | } | |
8663 | else | |
8664 | { | |
8665 | specs[count] = tmpl; | |
8666 | specs[count++].specific = 0; | |
8667 | } | |
8668 | } | |
8669 | } | |
8670 | else if (note == 0) | |
8671 | { | |
8672 | /* probe et al. */ | |
8673 | specs[count] = tmpl; | |
8674 | specs[count++].specific = 0; | |
8675 | } | |
8676 | break; | |
8677 | ||
8678 | case IA64_RS_PMC: /* four or more registers */ | |
8679 | if (note == 3) | |
8680 | { | |
8681 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
8682 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
8683 | ||
8684 | { | |
8685 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
8686 | ? 1 : !rsrc_write); | |
8687 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
8688 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8689 | && KNOWN (regno)) | |
8690 | { | |
8691 | specs[count] = tmpl; | |
8692 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8693 | } | |
8694 | else | |
8695 | { | |
8696 | specs[count] = tmpl; | |
8697 | specs[count++].specific = 0; | |
8698 | } | |
8699 | } | |
8700 | } | |
8701 | else | |
8702 | { | |
8703 | UNHANDLED; | |
8704 | } | |
800eeca4 JW |
8705 | break; |
8706 | ||
8707 | case IA64_RS_PMD: /* four or more registers */ | |
8708 | if (note == 3) | |
542d6675 KH |
8709 | { |
8710 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
8711 | { | |
8712 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8713 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8714 | && KNOWN (regno)) | |
8715 | { | |
8716 | specs[count] = tmpl; | |
8717 | specs[count++].index = gr_values[regno].value & 0xFF; | |
8718 | } | |
8719 | else | |
8720 | { | |
8721 | specs[count] = tmpl; | |
8722 | specs[count++].specific = 0; | |
8723 | } | |
8724 | } | |
8725 | } | |
800eeca4 | 8726 | else |
542d6675 KH |
8727 | { |
8728 | UNHANDLED; | |
8729 | } | |
800eeca4 JW |
8730 | break; |
8731 | ||
8732 | case IA64_RS_RR: /* eight registers */ | |
8733 | if (note == 6) | |
542d6675 KH |
8734 | { |
8735 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
8736 | { | |
8737 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
8738 | if (regno >= 0 && regno < NELEMS (gr_values) | |
8739 | && KNOWN (regno)) | |
8740 | { | |
8741 | specs[count] = tmpl; | |
8742 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
8743 | } | |
8744 | else | |
8745 | { | |
8746 | specs[count] = tmpl; | |
8747 | specs[count++].specific = 0; | |
8748 | } | |
8749 | } | |
8750 | } | |
800eeca4 | 8751 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
8752 | { |
8753 | specs[count] = tmpl; | |
8754 | specs[count++].specific = 0; | |
8755 | } | |
197865e8 | 8756 | else |
542d6675 KH |
8757 | { |
8758 | UNHANDLED; | |
8759 | } | |
800eeca4 JW |
8760 | break; |
8761 | ||
8762 | case IA64_RS_CR_IRR: | |
197865e8 | 8763 | if (note == 0) |
542d6675 KH |
8764 | { |
8765 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
8766 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
8767 | if (rsrc_write | |
8768 | && idesc->operands[1] == IA64_OPND_CR3 | |
8769 | && regno == CR_IVR) | |
8770 | { | |
8771 | for (i = 0; i < 4; i++) | |
8772 | { | |
8773 | specs[count] = tmpl; | |
8774 | specs[count++].index = CR_IRR0 + i; | |
8775 | } | |
8776 | } | |
8777 | } | |
800eeca4 | 8778 | else if (note == 1) |
542d6675 KH |
8779 | { |
8780 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8781 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8782 | && regno >= CR_IRR0 | |
8783 | && regno <= CR_IRR3) | |
8784 | { | |
8785 | specs[count] = tmpl; | |
8786 | specs[count++].index = regno; | |
8787 | } | |
8788 | } | |
800eeca4 | 8789 | else |
542d6675 KH |
8790 | { |
8791 | UNHANDLED; | |
8792 | } | |
800eeca4 JW |
8793 | break; |
8794 | ||
8795 | case IA64_RS_CR_LRR: | |
8796 | if (note != 1) | |
542d6675 KH |
8797 | { |
8798 | UNHANDLED; | |
8799 | } | |
197865e8 | 8800 | else |
542d6675 KH |
8801 | { |
8802 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8803 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8804 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8805 | { | |
8806 | specs[count] = tmpl; | |
8807 | specs[count++].index = regno; | |
8808 | } | |
8809 | } | |
800eeca4 JW |
8810 | break; |
8811 | ||
8812 | case IA64_RS_CR: | |
8813 | if (note == 1) | |
542d6675 KH |
8814 | { |
8815 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8816 | { | |
8817 | specs[count] = tmpl; | |
8818 | specs[count++].index = | |
8819 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8820 | } | |
8821 | } | |
800eeca4 | 8822 | else |
542d6675 KH |
8823 | { |
8824 | UNHANDLED; | |
8825 | } | |
800eeca4 JW |
8826 | break; |
8827 | ||
8828 | case IA64_RS_FR: | |
8829 | case IA64_RS_FRb: | |
8830 | if (note != 1) | |
542d6675 KH |
8831 | { |
8832 | UNHANDLED; | |
8833 | } | |
800eeca4 | 8834 | else if (rsrc_write) |
542d6675 KH |
8835 | { |
8836 | if (dep->specifier == IA64_RS_FRb | |
8837 | && idesc->operands[0] == IA64_OPND_F1) | |
8838 | { | |
8839 | specs[count] = tmpl; | |
8840 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8841 | } | |
8842 | } | |
800eeca4 | 8843 | else |
542d6675 KH |
8844 | { |
8845 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8846 | { | |
8847 | if (idesc->operands[i] == IA64_OPND_F2 | |
8848 | || idesc->operands[i] == IA64_OPND_F3 | |
8849 | || idesc->operands[i] == IA64_OPND_F4) | |
8850 | { | |
8851 | specs[count] = tmpl; | |
8852 | specs[count++].index = | |
8853 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8854 | } | |
8855 | } | |
8856 | } | |
800eeca4 JW |
8857 | break; |
8858 | ||
8859 | case IA64_RS_GR: | |
8860 | if (note == 13) | |
542d6675 KH |
8861 | { |
8862 | /* This reference applies only to the GR whose value is loaded with | |
8863 | data returned from memory. */ | |
8864 | specs[count] = tmpl; | |
8865 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8866 | } | |
800eeca4 | 8867 | else if (note == 1) |
542d6675 KH |
8868 | { |
8869 | if (rsrc_write) | |
8870 | { | |
8871 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8872 | if (idesc->operands[i] == IA64_OPND_R1 |
8873 | || idesc->operands[i] == IA64_OPND_R2 | |
8874 | || idesc->operands[i] == IA64_OPND_R3) | |
8875 | { | |
8876 | specs[count] = tmpl; | |
197865e8 | 8877 | specs[count++].index = |
50b81f19 JW |
8878 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8879 | } | |
8880 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8881 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8882 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8883 | { | |
8884 | specs[count] = tmpl; | |
8885 | specs[count++].index = | |
8886 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8887 | } | |
542d6675 KH |
8888 | } |
8889 | else | |
8890 | { | |
8891 | /* Look for anything that reads a GR. */ | |
8892 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8893 | { | |
8894 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8895 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8896 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8897 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8898 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8899 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8900 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8901 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8902 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8903 | || ((i >= idesc->num_outputs) | |
8904 | && (idesc->operands[i] == IA64_OPND_R1 | |
8905 | || idesc->operands[i] == IA64_OPND_R2 | |
8906 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8907 | /* addl source register. */ |
8908 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8909 | { |
8910 | specs[count] = tmpl; | |
8911 | specs[count++].index = | |
8912 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8913 | } | |
8914 | } | |
8915 | } | |
8916 | } | |
197865e8 | 8917 | else |
542d6675 KH |
8918 | { |
8919 | UNHANDLED; | |
8920 | } | |
800eeca4 JW |
8921 | break; |
8922 | ||
139368c9 JW |
8923 | /* This is the same as IA64_RS_PRr, except that the register range is |
8924 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8925 | case IA64_RS_PR: |
8926 | if (note == 0) | |
542d6675 | 8927 | { |
139368c9 | 8928 | for (i = 1; i < 16; i++) |
542d6675 | 8929 | { |
139368c9 JW |
8930 | specs[count] = tmpl; |
8931 | specs[count++].index = i; | |
8932 | } | |
8933 | } | |
8934 | else if (note == 7) | |
8935 | { | |
8936 | valueT mask = 0; | |
8937 | /* Mark only those registers indicated by the mask. */ | |
8938 | if (rsrc_write) | |
8939 | { | |
8940 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8941 | for (i = 1; i < 16; i++) | |
8942 | if (mask & ((valueT) 1 << i)) | |
8943 | { | |
8944 | specs[count] = tmpl; | |
8945 | specs[count++].index = i; | |
8946 | } | |
8947 | } | |
8948 | else | |
8949 | { | |
8950 | UNHANDLED; | |
8951 | } | |
8952 | } | |
8953 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8954 | { | |
8955 | if (rsrc_write) | |
8956 | { | |
8957 | for (i = 0; i < idesc->num_outputs; i++) | |
8958 | { | |
8959 | if (idesc->operands[i] == IA64_OPND_P1 | |
8960 | || idesc->operands[i] == IA64_OPND_P2) | |
8961 | { | |
8962 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8963 | if (regno >= 1 && regno < 16) | |
8964 | { | |
8965 | specs[count] = tmpl; | |
8966 | specs[count++].index = regno; | |
8967 | } | |
8968 | } | |
8969 | } | |
8970 | } | |
8971 | else | |
8972 | { | |
8973 | UNHANDLED; | |
8974 | } | |
8975 | } | |
8976 | else if (note == 12) | |
8977 | { | |
8978 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8979 | { | |
8980 | specs[count] = tmpl; | |
8981 | specs[count++].index = CURR_SLOT.qp_regno; | |
8982 | } | |
8983 | } | |
8984 | else if (note == 1) | |
8985 | { | |
8986 | if (rsrc_write) | |
8987 | { | |
8988 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8989 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8990 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8991 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8992 | |
8993 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8994 | || idesc->operands[0] == IA64_OPND_P2) | |
8995 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8996 | { |
8997 | specs[count] = tmpl; | |
139368c9 JW |
8998 | specs[count].cmp_type = |
8999 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
9000 | specs[count++].index = p1; | |
9001 | } | |
9002 | if ((idesc->operands[1] == IA64_OPND_P1 | |
9003 | || idesc->operands[1] == IA64_OPND_P2) | |
9004 | && p2 >= 1 && p2 < 16) | |
9005 | { | |
9006 | specs[count] = tmpl; | |
9007 | specs[count].cmp_type = | |
9008 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
9009 | specs[count++].index = p2; | |
542d6675 KH |
9010 | } |
9011 | } | |
9012 | else | |
9013 | { | |
139368c9 | 9014 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
9015 | { |
9016 | specs[count] = tmpl; | |
139368c9 JW |
9017 | specs[count++].index = CURR_SLOT.qp_regno; |
9018 | } | |
9019 | if (idesc->operands[1] == IA64_OPND_PR) | |
9020 | { | |
9021 | for (i = 1; i < 16; i++) | |
9022 | { | |
9023 | specs[count] = tmpl; | |
9024 | specs[count++].index = i; | |
9025 | } | |
542d6675 KH |
9026 | } |
9027 | } | |
9028 | } | |
139368c9 JW |
9029 | else |
9030 | { | |
9031 | UNHANDLED; | |
9032 | } | |
9033 | break; | |
9034 | ||
9035 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
9036 | simplified cases of this. */ | |
9037 | case IA64_RS_PRr: | |
9038 | if (note == 0) | |
9039 | { | |
9040 | for (i = 16; i < 63; i++) | |
9041 | { | |
9042 | specs[count] = tmpl; | |
9043 | specs[count++].index = i; | |
9044 | } | |
9045 | } | |
800eeca4 | 9046 | else if (note == 7) |
542d6675 KH |
9047 | { |
9048 | valueT mask = 0; | |
9049 | /* Mark only those registers indicated by the mask. */ | |
9050 | if (rsrc_write | |
9051 | && idesc->operands[0] == IA64_OPND_PR) | |
9052 | { | |
9053 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 9054 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
9055 | for (i = 16; i < 63; i++) |
9056 | { | |
9057 | specs[count] = tmpl; | |
9058 | specs[count++].index = i; | |
9059 | } | |
542d6675 KH |
9060 | } |
9061 | else if (rsrc_write | |
9062 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
9063 | { | |
9064 | for (i = 16; i < 63; i++) | |
9065 | { | |
9066 | specs[count] = tmpl; | |
9067 | specs[count++].index = i; | |
9068 | } | |
9069 | } | |
9070 | else | |
9071 | { | |
9072 | UNHANDLED; | |
9073 | } | |
9074 | } | |
800eeca4 | 9075 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
9076 | { |
9077 | if (rsrc_write) | |
9078 | { | |
9079 | for (i = 0; i < idesc->num_outputs; i++) | |
9080 | { | |
9081 | if (idesc->operands[i] == IA64_OPND_P1 | |
9082 | || idesc->operands[i] == IA64_OPND_P2) | |
9083 | { | |
9084 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 9085 | if (regno >= 16 && regno < 63) |
542d6675 KH |
9086 | { |
9087 | specs[count] = tmpl; | |
9088 | specs[count++].index = regno; | |
9089 | } | |
9090 | } | |
9091 | } | |
9092 | } | |
9093 | else | |
9094 | { | |
9095 | UNHANDLED; | |
9096 | } | |
9097 | } | |
800eeca4 | 9098 | else if (note == 12) |
542d6675 | 9099 | { |
139368c9 | 9100 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9101 | { |
9102 | specs[count] = tmpl; | |
9103 | specs[count++].index = CURR_SLOT.qp_regno; | |
9104 | } | |
9105 | } | |
800eeca4 | 9106 | else if (note == 1) |
542d6675 KH |
9107 | { |
9108 | if (rsrc_write) | |
9109 | { | |
9110 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
9111 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9112 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9113 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9114 | |
542d6675 KH |
9115 | if ((idesc->operands[0] == IA64_OPND_P1 |
9116 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 9117 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
9118 | { |
9119 | specs[count] = tmpl; | |
4a4f25cf | 9120 | specs[count].cmp_type = |
7484b8e6 | 9121 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
9122 | specs[count++].index = p1; |
9123 | } | |
9124 | if ((idesc->operands[1] == IA64_OPND_P1 | |
9125 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 9126 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
9127 | { |
9128 | specs[count] = tmpl; | |
4a4f25cf | 9129 | specs[count].cmp_type = |
7484b8e6 | 9130 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
9131 | specs[count++].index = p2; |
9132 | } | |
9133 | } | |
9134 | else | |
9135 | { | |
139368c9 | 9136 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
9137 | { |
9138 | specs[count] = tmpl; | |
9139 | specs[count++].index = CURR_SLOT.qp_regno; | |
9140 | } | |
9141 | if (idesc->operands[1] == IA64_OPND_PR) | |
9142 | { | |
139368c9 | 9143 | for (i = 16; i < 63; i++) |
542d6675 KH |
9144 | { |
9145 | specs[count] = tmpl; | |
9146 | specs[count++].index = i; | |
9147 | } | |
9148 | } | |
9149 | } | |
9150 | } | |
197865e8 | 9151 | else |
542d6675 KH |
9152 | { |
9153 | UNHANDLED; | |
9154 | } | |
800eeca4 JW |
9155 | break; |
9156 | ||
9157 | case IA64_RS_PSR: | |
197865e8 | 9158 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 9159 | dep->regindex. */ |
800eeca4 | 9160 | if (note == 0) |
542d6675 KH |
9161 | { |
9162 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
9163 | { | |
9164 | if (dep->regindex < 6) | |
9165 | { | |
9166 | specs[count++] = tmpl; | |
9167 | } | |
9168 | } | |
9169 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
9170 | { | |
9171 | if (dep->regindex < 32 | |
9172 | || dep->regindex == 35 | |
9173 | || dep->regindex == 36 | |
9174 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
9175 | { | |
9176 | specs[count++] = tmpl; | |
9177 | } | |
9178 | } | |
9179 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
9180 | { | |
9181 | if (dep->regindex < 32 | |
9182 | || dep->regindex == 35 | |
9183 | || dep->regindex == 36 | |
9184 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
9185 | { | |
9186 | specs[count++] = tmpl; | |
9187 | } | |
9188 | } | |
9189 | else | |
9190 | { | |
9191 | /* Several PSR bits have very specific dependencies. */ | |
9192 | switch (dep->regindex) | |
9193 | { | |
9194 | default: | |
9195 | specs[count++] = tmpl; | |
9196 | break; | |
9197 | case PSR_IC: | |
9198 | if (rsrc_write) | |
9199 | { | |
9200 | specs[count++] = tmpl; | |
9201 | } | |
9202 | else | |
9203 | { | |
9204 | /* Only certain CR accesses use PSR.ic */ | |
9205 | if (idesc->operands[0] == IA64_OPND_CR3 | |
9206 | || idesc->operands[1] == IA64_OPND_CR3) | |
9207 | { | |
9208 | int index = | |
9209 | ((idesc->operands[0] == IA64_OPND_CR3) | |
9210 | ? 0 : 1); | |
9211 | int regno = | |
9212 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
9213 | ||
9214 | switch (regno) | |
9215 | { | |
9216 | default: | |
9217 | break; | |
9218 | case CR_ITIR: | |
9219 | case CR_IFS: | |
9220 | case CR_IIM: | |
9221 | case CR_IIP: | |
9222 | case CR_IPSR: | |
9223 | case CR_ISR: | |
9224 | case CR_IFA: | |
9225 | case CR_IHA: | |
9226 | case CR_IIPA: | |
9227 | specs[count++] = tmpl; | |
9228 | break; | |
9229 | } | |
9230 | } | |
9231 | } | |
9232 | break; | |
9233 | case PSR_CPL: | |
9234 | if (rsrc_write) | |
9235 | { | |
9236 | specs[count++] = tmpl; | |
9237 | } | |
9238 | else | |
9239 | { | |
9240 | /* Only some AR accesses use cpl */ | |
9241 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9242 | || idesc->operands[1] == IA64_OPND_AR3) | |
9243 | { | |
9244 | int index = | |
9245 | ((idesc->operands[0] == IA64_OPND_AR3) | |
9246 | ? 0 : 1); | |
9247 | int regno = | |
9248 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
9249 | ||
9250 | if (regno == AR_ITC | |
9251 | || (index == 0 | |
9252 | && (regno == AR_ITC | |
9253 | || regno == AR_RSC | |
9254 | || (regno >= AR_K0 | |
9255 | && regno <= AR_K7)))) | |
9256 | { | |
9257 | specs[count++] = tmpl; | |
9258 | } | |
9259 | } | |
9260 | else | |
9261 | { | |
9262 | specs[count++] = tmpl; | |
9263 | } | |
9264 | break; | |
9265 | } | |
9266 | } | |
9267 | } | |
9268 | } | |
800eeca4 | 9269 | else if (note == 7) |
542d6675 KH |
9270 | { |
9271 | valueT mask = 0; | |
9272 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
9273 | { | |
9274 | mask = CURR_SLOT.opnd[0].X_add_number; | |
9275 | } | |
9276 | else | |
9277 | { | |
9278 | UNHANDLED; | |
9279 | } | |
9280 | if (mask & ((valueT) 1 << dep->regindex)) | |
9281 | { | |
9282 | specs[count++] = tmpl; | |
9283 | } | |
9284 | } | |
800eeca4 | 9285 | else if (note == 8) |
542d6675 KH |
9286 | { |
9287 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
9288 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
9289 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
9290 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9291 | { | |
9292 | if (idesc->operands[i] == IA64_OPND_F1 | |
9293 | || idesc->operands[i] == IA64_OPND_F2 | |
9294 | || idesc->operands[i] == IA64_OPND_F3 | |
9295 | || idesc->operands[i] == IA64_OPND_F4) | |
9296 | { | |
9297 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9298 | if (reg >= min && reg <= max) | |
9299 | { | |
9300 | specs[count++] = tmpl; | |
9301 | } | |
9302 | } | |
9303 | } | |
9304 | } | |
800eeca4 | 9305 | else if (note == 9) |
542d6675 KH |
9306 | { |
9307 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
9308 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
9309 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
9310 | FR2-31 */ | |
9311 | for (i = 0; i < idesc->num_outputs; i++) | |
9312 | { | |
9313 | if (idesc->operands[i] == IA64_OPND_F1) | |
9314 | { | |
9315 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9316 | if (reg >= min && reg <= max) | |
9317 | { | |
9318 | specs[count++] = tmpl; | |
9319 | } | |
9320 | } | |
9321 | } | |
9322 | } | |
800eeca4 | 9323 | else if (note == 10) |
542d6675 KH |
9324 | { |
9325 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9326 | { | |
9327 | if (idesc->operands[i] == IA64_OPND_R1 | |
9328 | || idesc->operands[i] == IA64_OPND_R2 | |
9329 | || idesc->operands[i] == IA64_OPND_R3) | |
9330 | { | |
9331 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9332 | if (regno >= 16 && regno <= 31) | |
9333 | { | |
9334 | specs[count++] = tmpl; | |
9335 | } | |
9336 | } | |
9337 | } | |
9338 | } | |
800eeca4 | 9339 | else |
542d6675 KH |
9340 | { |
9341 | UNHANDLED; | |
9342 | } | |
800eeca4 JW |
9343 | break; |
9344 | ||
9345 | case IA64_RS_AR_FPSR: | |
9346 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
9347 | { |
9348 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9349 | if (regno == AR_FPSR) | |
9350 | { | |
9351 | specs[count++] = tmpl; | |
9352 | } | |
9353 | } | |
800eeca4 | 9354 | else |
542d6675 KH |
9355 | { |
9356 | specs[count++] = tmpl; | |
9357 | } | |
800eeca4 JW |
9358 | break; |
9359 | ||
197865e8 | 9360 | case IA64_RS_ARX: |
800eeca4 JW |
9361 | /* Handle all AR[REG] resources */ |
9362 | if (note == 0 || note == 1) | |
542d6675 KH |
9363 | { |
9364 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
9365 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
9366 | && regno == dep->regindex) | |
9367 | { | |
9368 | specs[count++] = tmpl; | |
9369 | } | |
9370 | /* other AR[REG] resources may be affected by AR accesses */ | |
9371 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
9372 | { | |
9373 | /* AR[] writes */ | |
9374 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
9375 | switch (dep->regindex) | |
9376 | { | |
9377 | default: | |
9378 | break; | |
9379 | case AR_BSP: | |
9380 | case AR_RNAT: | |
9381 | if (regno == AR_BSPSTORE) | |
9382 | { | |
9383 | specs[count++] = tmpl; | |
9384 | } | |
9385 | case AR_RSC: | |
9386 | if (!rsrc_write && | |
9387 | (regno == AR_BSPSTORE | |
9388 | || regno == AR_RNAT)) | |
9389 | { | |
9390 | specs[count++] = tmpl; | |
9391 | } | |
9392 | break; | |
9393 | } | |
9394 | } | |
9395 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9396 | { | |
9397 | /* AR[] reads */ | |
9398 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
9399 | switch (dep->regindex) | |
9400 | { | |
9401 | default: | |
9402 | break; | |
9403 | case AR_RSC: | |
9404 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
9405 | { | |
9406 | specs[count++] = tmpl; | |
9407 | } | |
9408 | break; | |
9409 | } | |
9410 | } | |
9411 | else | |
9412 | { | |
9413 | specs[count++] = tmpl; | |
9414 | } | |
9415 | } | |
800eeca4 | 9416 | else |
542d6675 KH |
9417 | { |
9418 | UNHANDLED; | |
9419 | } | |
800eeca4 JW |
9420 | break; |
9421 | ||
9422 | case IA64_RS_CRX: | |
9423 | /* Handle all CR[REG] resources */ | |
9424 | if (note == 0 || note == 1) | |
542d6675 KH |
9425 | { |
9426 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
9427 | { | |
9428 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
9429 | if (regno == dep->regindex) | |
9430 | { | |
9431 | specs[count++] = tmpl; | |
9432 | } | |
9433 | else if (!rsrc_write) | |
9434 | { | |
9435 | /* Reads from CR[IVR] affect other resources. */ | |
9436 | if (regno == CR_IVR) | |
9437 | { | |
9438 | if ((dep->regindex >= CR_IRR0 | |
9439 | && dep->regindex <= CR_IRR3) | |
9440 | || dep->regindex == CR_TPR) | |
9441 | { | |
9442 | specs[count++] = tmpl; | |
9443 | } | |
9444 | } | |
9445 | } | |
9446 | } | |
9447 | else | |
9448 | { | |
9449 | specs[count++] = tmpl; | |
9450 | } | |
9451 | } | |
800eeca4 | 9452 | else |
542d6675 KH |
9453 | { |
9454 | UNHANDLED; | |
9455 | } | |
800eeca4 JW |
9456 | break; |
9457 | ||
9458 | case IA64_RS_INSERVICE: | |
9459 | /* look for write of EOI (67) or read of IVR (65) */ | |
9460 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
9461 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
9462 | || (idesc->operands[1] == IA64_OPND_CR3 | |
9463 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
9464 | { | |
9465 | specs[count++] = tmpl; | |
9466 | } | |
800eeca4 JW |
9467 | break; |
9468 | ||
9469 | case IA64_RS_GR0: | |
9470 | if (note == 1) | |
542d6675 KH |
9471 | { |
9472 | specs[count++] = tmpl; | |
9473 | } | |
800eeca4 | 9474 | else |
542d6675 KH |
9475 | { |
9476 | UNHANDLED; | |
9477 | } | |
800eeca4 JW |
9478 | break; |
9479 | ||
9480 | case IA64_RS_CFM: | |
9481 | if (note != 2) | |
542d6675 KH |
9482 | { |
9483 | specs[count++] = tmpl; | |
9484 | } | |
800eeca4 | 9485 | else |
542d6675 KH |
9486 | { |
9487 | /* Check if any of the registers accessed are in the rotating region. | |
9488 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
9489 | region */ | |
9490 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
9491 | { | |
9492 | if (idesc->operands[i] == IA64_OPND_R1 | |
9493 | || idesc->operands[i] == IA64_OPND_R2 | |
9494 | || idesc->operands[i] == IA64_OPND_R3) | |
9495 | { | |
9496 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9497 | /* Assumes that md.rot.num_regs is always valid */ | |
9498 | if (md.rot.num_regs > 0 | |
9499 | && num > 31 | |
9500 | && num < 31 + md.rot.num_regs) | |
9501 | { | |
9502 | specs[count] = tmpl; | |
9503 | specs[count++].specific = 0; | |
9504 | } | |
9505 | } | |
9506 | else if (idesc->operands[i] == IA64_OPND_F1 | |
9507 | || idesc->operands[i] == IA64_OPND_F2 | |
9508 | || idesc->operands[i] == IA64_OPND_F3 | |
9509 | || idesc->operands[i] == IA64_OPND_F4) | |
9510 | { | |
9511 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
9512 | if (num > 31) | |
9513 | { | |
9514 | specs[count] = tmpl; | |
9515 | specs[count++].specific = 0; | |
9516 | } | |
9517 | } | |
9518 | else if (idesc->operands[i] == IA64_OPND_P1 | |
9519 | || idesc->operands[i] == IA64_OPND_P2) | |
9520 | { | |
9521 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9522 | if (num > 15) | |
9523 | { | |
9524 | specs[count] = tmpl; | |
9525 | specs[count++].specific = 0; | |
9526 | } | |
9527 | } | |
9528 | } | |
9529 | if (CURR_SLOT.qp_regno > 15) | |
9530 | { | |
9531 | specs[count] = tmpl; | |
9532 | specs[count++].specific = 0; | |
9533 | } | |
9534 | } | |
800eeca4 JW |
9535 | break; |
9536 | ||
139368c9 JW |
9537 | /* This is the same as IA64_RS_PRr, except simplified to account for |
9538 | the fact that there is only one register. */ | |
800eeca4 JW |
9539 | case IA64_RS_PR63: |
9540 | if (note == 0) | |
542d6675 KH |
9541 | { |
9542 | specs[count++] = tmpl; | |
9543 | } | |
139368c9 | 9544 | else if (note == 7) |
40449e9f KH |
9545 | { |
9546 | valueT mask = 0; | |
9547 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
9548 | mask = CURR_SLOT.opnd[2].X_add_number; | |
9549 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 9550 | specs[count++] = tmpl; |
40449e9f | 9551 | } |
800eeca4 | 9552 | else if (note == 11) |
542d6675 KH |
9553 | { |
9554 | if ((idesc->operands[0] == IA64_OPND_P1 | |
9555 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
9556 | || (idesc->operands[1] == IA64_OPND_P2 | |
9557 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
9558 | { | |
9559 | specs[count++] = tmpl; | |
9560 | } | |
9561 | } | |
800eeca4 | 9562 | else if (note == 12) |
542d6675 KH |
9563 | { |
9564 | if (CURR_SLOT.qp_regno == 63) | |
9565 | { | |
9566 | specs[count++] = tmpl; | |
9567 | } | |
9568 | } | |
800eeca4 | 9569 | else if (note == 1) |
542d6675 KH |
9570 | { |
9571 | if (rsrc_write) | |
9572 | { | |
40449e9f KH |
9573 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
9574 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
9575 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
9576 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 9577 | |
4a4f25cf | 9578 | if (p1 == 63 |
7484b8e6 TW |
9579 | && (idesc->operands[0] == IA64_OPND_P1 |
9580 | || idesc->operands[0] == IA64_OPND_P2)) | |
9581 | { | |
40449e9f | 9582 | specs[count] = tmpl; |
4a4f25cf | 9583 | specs[count++].cmp_type = |
7484b8e6 TW |
9584 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
9585 | } | |
9586 | if (p2 == 63 | |
9587 | && (idesc->operands[1] == IA64_OPND_P1 | |
9588 | || idesc->operands[1] == IA64_OPND_P2)) | |
9589 | { | |
40449e9f | 9590 | specs[count] = tmpl; |
4a4f25cf | 9591 | specs[count++].cmp_type = |
7484b8e6 TW |
9592 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
9593 | } | |
542d6675 KH |
9594 | } |
9595 | else | |
9596 | { | |
9597 | if (CURR_SLOT.qp_regno == 63) | |
9598 | { | |
9599 | specs[count++] = tmpl; | |
9600 | } | |
9601 | } | |
9602 | } | |
800eeca4 | 9603 | else |
542d6675 KH |
9604 | { |
9605 | UNHANDLED; | |
9606 | } | |
800eeca4 JW |
9607 | break; |
9608 | ||
9609 | case IA64_RS_RSE: | |
9610 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
9611 | read resources have not yet been completely identified, so for now |
9612 | treat RSE as a single resource */ | |
800eeca4 | 9613 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
9614 | { |
9615 | if (rsrc_write) | |
9616 | { | |
9617 | if (idesc->operands[0] == IA64_OPND_AR3 | |
9618 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
9619 | { | |
a66d2bb7 | 9620 | specs[count++] = tmpl; |
542d6675 KH |
9621 | } |
9622 | } | |
9623 | else | |
9624 | { | |
9625 | if (idesc->operands[0] == IA64_OPND_AR3) | |
9626 | { | |
9627 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
9628 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
9629 | { | |
9630 | specs[count++] = tmpl; | |
9631 | } | |
9632 | } | |
9633 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
9634 | { | |
9635 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
9636 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
9637 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
9638 | { | |
9639 | specs[count++] = tmpl; | |
9640 | } | |
9641 | } | |
9642 | } | |
9643 | } | |
197865e8 | 9644 | else |
542d6675 KH |
9645 | { |
9646 | specs[count++] = tmpl; | |
9647 | } | |
800eeca4 JW |
9648 | break; |
9649 | ||
9650 | case IA64_RS_ANY: | |
9651 | /* FIXME -- do any of these need to be non-specific? */ | |
9652 | specs[count++] = tmpl; | |
9653 | break; | |
9654 | ||
9655 | default: | |
9656 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
9657 | break; | |
9658 | } | |
9659 | ||
9660 | return count; | |
9661 | } | |
9662 | ||
9663 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
9664 | QP of the marking instruction and a subsequent branch on the same QP. */ |
9665 | ||
800eeca4 JW |
9666 | static void |
9667 | clear_qp_branch_flag (mask) | |
542d6675 | 9668 | valueT mask; |
800eeca4 JW |
9669 | { |
9670 | int i; | |
542d6675 | 9671 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 9672 | { |
197865e8 | 9673 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 9674 | if ((bit & mask) != 0) |
542d6675 KH |
9675 | { |
9676 | regdeps[i].link_to_qp_branch = 0; | |
9677 | } | |
800eeca4 JW |
9678 | } |
9679 | } | |
9680 | ||
5e2f6673 L |
9681 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
9682 | any mutexes which contain one of the PRs and create new ones when | |
9683 | needed. */ | |
9684 | ||
9685 | static int | |
9686 | update_qp_mutex (valueT mask) | |
9687 | { | |
9688 | int i; | |
9689 | int add = 0; | |
9690 | ||
9691 | i = 0; | |
9692 | while (i < qp_mutexeslen) | |
9693 | { | |
9694 | if ((qp_mutexes[i].prmask & mask) != 0) | |
9695 | { | |
9696 | /* If it destroys and creates the same mutex, do nothing. */ | |
9697 | if (qp_mutexes[i].prmask == mask | |
9698 | && qp_mutexes[i].path == md.path) | |
9699 | { | |
9700 | i++; | |
9701 | add = -1; | |
9702 | } | |
9703 | else | |
9704 | { | |
9705 | int keep = 0; | |
9706 | ||
9707 | if (md.debug_dv) | |
9708 | { | |
9709 | fprintf (stderr, " Clearing mutex relation"); | |
9710 | print_prmask (qp_mutexes[i].prmask); | |
9711 | fprintf (stderr, "\n"); | |
9712 | } | |
9713 | ||
9714 | /* Deal with the old mutex with more than 3+ PRs only if | |
9715 | the new mutex on the same execution path with it. | |
9716 | ||
9717 | FIXME: The 3+ mutex support is incomplete. | |
9718 | dot_pred_rel () may be a better place to fix it. */ | |
9719 | if (qp_mutexes[i].path == md.path) | |
9720 | { | |
9721 | /* If it is a proper subset of the mutex, create a | |
9722 | new mutex. */ | |
9723 | if (add == 0 | |
9724 | && (qp_mutexes[i].prmask & mask) == mask) | |
9725 | add = 1; | |
9726 | ||
9727 | qp_mutexes[i].prmask &= ~mask; | |
9728 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
9729 | { | |
9730 | /* Modify the mutex if there are more than one | |
9731 | PR left. */ | |
9732 | keep = 1; | |
9733 | i++; | |
9734 | } | |
9735 | } | |
9736 | ||
9737 | if (keep == 0) | |
9738 | /* Remove the mutex. */ | |
9739 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9740 | } | |
9741 | } | |
9742 | else | |
9743 | ++i; | |
9744 | } | |
9745 | ||
9746 | if (add == 1) | |
9747 | add_qp_mutex (mask); | |
9748 | ||
9749 | return add; | |
9750 | } | |
9751 | ||
197865e8 | 9752 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 9753 | |
542d6675 KH |
9754 | Any changes to a PR clears the mutex relations which include that PR. */ |
9755 | ||
800eeca4 JW |
9756 | static void |
9757 | clear_qp_mutex (mask) | |
542d6675 | 9758 | valueT mask; |
800eeca4 JW |
9759 | { |
9760 | int i; | |
9761 | ||
9762 | i = 0; | |
9763 | while (i < qp_mutexeslen) | |
9764 | { | |
9765 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
9766 | { |
9767 | if (md.debug_dv) | |
9768 | { | |
9769 | fprintf (stderr, " Clearing mutex relation"); | |
9770 | print_prmask (qp_mutexes[i].prmask); | |
9771 | fprintf (stderr, "\n"); | |
9772 | } | |
9773 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
9774 | } | |
800eeca4 | 9775 | else |
542d6675 | 9776 | ++i; |
800eeca4 JW |
9777 | } |
9778 | } | |
9779 | ||
9780 | /* Clear implies relations which contain PRs in the given masks. | |
9781 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
9782 | indicates the implied PR. */ |
9783 | ||
800eeca4 JW |
9784 | static void |
9785 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
9786 | valueT p1_mask; |
9787 | valueT p2_mask; | |
800eeca4 JW |
9788 | { |
9789 | int i; | |
9790 | ||
9791 | i = 0; | |
9792 | while (i < qp_implieslen) | |
9793 | { | |
197865e8 | 9794 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9795 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9796 | { | |
9797 | if (md.debug_dv) | |
9798 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9799 | qp_implies[i].p1, qp_implies[i].p2); | |
9800 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9801 | } | |
197865e8 | 9802 | else |
542d6675 | 9803 | ++i; |
800eeca4 JW |
9804 | } |
9805 | } | |
9806 | ||
542d6675 KH |
9807 | /* Add the PRs specified to the list of implied relations. */ |
9808 | ||
800eeca4 JW |
9809 | static void |
9810 | add_qp_imply (p1, p2) | |
542d6675 | 9811 | int p1, p2; |
800eeca4 JW |
9812 | { |
9813 | valueT mask; | |
9814 | valueT bit; | |
9815 | int i; | |
9816 | ||
542d6675 | 9817 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9818 | if (p1 == 0 || p2 == 0) |
9819 | abort (); | |
9820 | ||
9821 | if (p1 == p2) | |
9822 | return; | |
9823 | ||
542d6675 KH |
9824 | /* If it exists already, ignore it. */ |
9825 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9826 | { |
197865e8 | 9827 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9828 | && qp_implies[i].p2 == p2 |
9829 | && qp_implies[i].path == md.path | |
9830 | && !qp_implies[i].p2_branched) | |
9831 | return; | |
800eeca4 JW |
9832 | } |
9833 | ||
9834 | if (qp_implieslen == qp_impliestotlen) | |
9835 | { | |
9836 | qp_impliestotlen += 20; | |
9837 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9838 | xrealloc ((void *) qp_implies, |
9839 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9840 | } |
9841 | if (md.debug_dv) | |
9842 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9843 | qp_implies[qp_implieslen].p1 = p1; | |
9844 | qp_implies[qp_implieslen].p2 = p2; | |
9845 | qp_implies[qp_implieslen].path = md.path; | |
9846 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9847 | ||
9848 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9849 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9850 | as well. */ |
542d6675 | 9851 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9852 | { |
9853 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9854 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9855 | if (qp_implies[i].p2 == p1) |
542d6675 | 9856 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9857 | } |
9858 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9859 | relation containing p2, duplicate it and replace p2 with p1. */ |
9860 | bit = (valueT) 1 << p1; | |
9861 | mask = (valueT) 1 << p2; | |
542d6675 | 9862 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9863 | { |
9864 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9865 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9866 | } |
9867 | } | |
9868 | ||
800eeca4 JW |
9869 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9870 | one of the PRs can be true at any time. PR0 should never be included in | |
9871 | the mask. */ | |
542d6675 | 9872 | |
800eeca4 JW |
9873 | static void |
9874 | add_qp_mutex (mask) | |
542d6675 | 9875 | valueT mask; |
800eeca4 JW |
9876 | { |
9877 | if (mask & 0x1) | |
9878 | abort (); | |
9879 | ||
9880 | if (qp_mutexeslen == qp_mutexestotlen) | |
9881 | { | |
9882 | qp_mutexestotlen += 20; | |
9883 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9884 | xrealloc ((void *) qp_mutexes, |
9885 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9886 | } |
9887 | if (md.debug_dv) | |
9888 | { | |
9889 | fprintf (stderr, " Registering mutex on"); | |
9890 | print_prmask (mask); | |
9891 | fprintf (stderr, "\n"); | |
9892 | } | |
9893 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9894 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9895 | } | |
9896 | ||
cb5301b6 RH |
9897 | static int |
9898 | has_suffix_p (name, suffix) | |
40449e9f KH |
9899 | const char *name; |
9900 | const char *suffix; | |
cb5301b6 RH |
9901 | { |
9902 | size_t namelen = strlen (name); | |
9903 | size_t sufflen = strlen (suffix); | |
9904 | ||
9905 | if (namelen <= sufflen) | |
9906 | return 0; | |
9907 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9908 | } | |
9909 | ||
800eeca4 JW |
9910 | static void |
9911 | clear_register_values () | |
9912 | { | |
9913 | int i; | |
9914 | if (md.debug_dv) | |
9915 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9916 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9917 | gr_values[i].known = 0; |
9918 | } | |
9919 | ||
9920 | /* Keep track of register values/changes which affect DV tracking. | |
9921 | ||
9922 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9923 | have to examine a group of strings to identify them. */ |
800eeca4 | 9924 | |
800eeca4 JW |
9925 | static void |
9926 | note_register_values (idesc) | |
542d6675 | 9927 | struct ia64_opcode *idesc; |
800eeca4 JW |
9928 | { |
9929 | valueT qp_changemask = 0; | |
9930 | int i; | |
9931 | ||
542d6675 KH |
9932 | /* Invalidate values for registers being written to. */ |
9933 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9934 | { |
197865e8 | 9935 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9936 | || idesc->operands[i] == IA64_OPND_R2 |
9937 | || idesc->operands[i] == IA64_OPND_R3) | |
9938 | { | |
9939 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9940 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9941 | gr_values[regno].known = 0; | |
9942 | } | |
50b81f19 JW |
9943 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9944 | { | |
9945 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9946 | if (regno > 0 && regno < 4) | |
9947 | gr_values[regno].known = 0; | |
9948 | } | |
197865e8 | 9949 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9950 | || idesc->operands[i] == IA64_OPND_P2) |
9951 | { | |
9952 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9953 | qp_changemask |= (valueT) 1 << regno; | |
9954 | } | |
800eeca4 | 9955 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9956 | { |
9957 | if (idesc->operands[2] & (valueT) 0x10000) | |
9958 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9959 | else | |
9960 | qp_changemask = idesc->operands[2]; | |
9961 | break; | |
9962 | } | |
800eeca4 | 9963 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9964 | { |
9965 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9966 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9967 | else |
9968 | qp_changemask = idesc->operands[1]; | |
9969 | qp_changemask &= ~(valueT) 0xFFFF; | |
9970 | break; | |
9971 | } | |
9972 | } | |
9973 | ||
9974 | /* Always clear qp branch flags on any PR change. */ | |
9975 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9976 | clear_qp_branch_flag (qp_changemask); |
9977 | ||
542d6675 | 9978 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9979 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9980 | { | |
197865e8 | 9981 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9982 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9983 | { |
9984 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9985 | gr_values[i].known = 0; | |
9986 | } | |
800eeca4 JW |
9987 | clear_qp_mutex (qp_changemask); |
9988 | clear_qp_implies (qp_changemask, qp_changemask); | |
9989 | } | |
542d6675 KH |
9990 | /* After a call, all register values are undefined, except those marked |
9991 | as "safe". */ | |
800eeca4 | 9992 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9993 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9994 | { |
56d27c17 | 9995 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9996 | clear_register_values (); |
9997 | clear_qp_mutex (~qp_safe_across_calls); | |
9998 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9999 | clear_qp_branch_flag (~qp_safe_across_calls); | |
10000 | } | |
e9718fe1 | 10001 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 10002 | || is_taken_branch (idesc)) |
e9718fe1 TW |
10003 | { |
10004 | clear_register_values (); | |
197865e8 KH |
10005 | clear_qp_mutex (~(valueT) 0); |
10006 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 10007 | } |
542d6675 | 10008 | /* Look for mutex and implies relations. */ |
197865e8 | 10009 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
10010 | || idesc->operands[0] == IA64_OPND_P2) |
10011 | && (idesc->operands[1] == IA64_OPND_P1 | |
10012 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
10013 | { |
10014 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 10015 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
10016 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
10017 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 10018 | |
5e2f6673 L |
10019 | /* If both PRs are PR0, we can't really do anything. */ |
10020 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
10021 | { |
10022 | if (md.debug_dv) | |
10023 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
10024 | } | |
800eeca4 | 10025 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 10026 | with the following exceptions. */ |
cb5301b6 RH |
10027 | else if (has_suffix_p (idesc->name, ".or.andcm") |
10028 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 10029 | { |
542d6675 KH |
10030 | clear_qp_implies (p2mask, p1mask); |
10031 | } | |
cb5301b6 RH |
10032 | else if (has_suffix_p (idesc->name, ".andcm") |
10033 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
10034 | { |
10035 | clear_qp_implies (0, p1mask | p2mask); | |
10036 | } | |
cb5301b6 RH |
10037 | else if (has_suffix_p (idesc->name, ".orcm") |
10038 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
10039 | { |
10040 | clear_qp_mutex (p1mask | p2mask); | |
10041 | clear_qp_implies (p1mask | p2mask, 0); | |
10042 | } | |
800eeca4 | 10043 | else |
542d6675 | 10044 | { |
5e2f6673 L |
10045 | int added = 0; |
10046 | ||
542d6675 | 10047 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
10048 | |
10049 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
10050 | if (p1 == 0 || p2 == 0) | |
10051 | clear_qp_mutex (p1mask | p2mask); | |
10052 | else | |
10053 | added = update_qp_mutex (p1mask | p2mask); | |
10054 | ||
10055 | if (CURR_SLOT.qp_regno == 0 | |
10056 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 10057 | { |
5e2f6673 L |
10058 | if (added == 0 && p1 && p2) |
10059 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
10060 | if (CURR_SLOT.qp_regno != 0) |
10061 | { | |
5e2f6673 L |
10062 | if (p1) |
10063 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
10064 | if (p2) | |
10065 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
10066 | } |
10067 | } | |
542d6675 KH |
10068 | } |
10069 | } | |
10070 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 10071 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
10072 | && (idesc->operands[1] == IA64_OPND_IMM22 |
10073 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
a66d2bb7 | 10074 | && CURR_SLOT.opnd[1].X_op == O_constant |
542d6675 KH |
10075 | && (strcmp (idesc->name, "mov") == 0 |
10076 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
10077 | { |
10078 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
10079 | if (regno > 0 && regno < NELEMS (gr_values)) |
10080 | { | |
10081 | gr_values[regno].known = 1; | |
10082 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
10083 | gr_values[regno].path = md.path; | |
10084 | if (md.debug_dv) | |
2434f565 JW |
10085 | { |
10086 | fprintf (stderr, " Know gr%d = ", regno); | |
10087 | fprintf_vma (stderr, gr_values[regno].value); | |
10088 | fputs ("\n", stderr); | |
10089 | } | |
542d6675 | 10090 | } |
800eeca4 | 10091 | } |
a66d2bb7 JB |
10092 | /* Look for dep.z imm insns. */ |
10093 | else if (idesc->operands[0] == IA64_OPND_R1 | |
10094 | && idesc->operands[1] == IA64_OPND_IMM8 | |
10095 | && strcmp (idesc->name, "dep.z") == 0) | |
10096 | { | |
10097 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
10098 | if (regno > 0 && regno < NELEMS (gr_values)) | |
10099 | { | |
10100 | valueT value = CURR_SLOT.opnd[1].X_add_number; | |
10101 | ||
10102 | if (CURR_SLOT.opnd[3].X_add_number < 64) | |
10103 | value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; | |
10104 | value <<= CURR_SLOT.opnd[2].X_add_number; | |
10105 | gr_values[regno].known = 1; | |
10106 | gr_values[regno].value = value; | |
10107 | gr_values[regno].path = md.path; | |
10108 | if (md.debug_dv) | |
10109 | { | |
10110 | fprintf (stderr, " Know gr%d = ", regno); | |
10111 | fprintf_vma (stderr, gr_values[regno].value); | |
10112 | fputs ("\n", stderr); | |
10113 | } | |
10114 | } | |
10115 | } | |
197865e8 | 10116 | else |
800eeca4 JW |
10117 | { |
10118 | clear_qp_mutex (qp_changemask); | |
10119 | clear_qp_implies (qp_changemask, qp_changemask); | |
10120 | } | |
10121 | } | |
10122 | ||
542d6675 KH |
10123 | /* Return whether the given predicate registers are currently mutex. */ |
10124 | ||
800eeca4 JW |
10125 | static int |
10126 | qp_mutex (p1, p2, path) | |
542d6675 KH |
10127 | int p1; |
10128 | int p2; | |
10129 | int path; | |
800eeca4 JW |
10130 | { |
10131 | int i; | |
10132 | valueT mask; | |
10133 | ||
10134 | if (p1 != p2) | |
10135 | { | |
542d6675 KH |
10136 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
10137 | for (i = 0; i < qp_mutexeslen; i++) | |
10138 | { | |
10139 | if (qp_mutexes[i].path >= path | |
10140 | && (qp_mutexes[i].prmask & mask) == mask) | |
10141 | return 1; | |
10142 | } | |
800eeca4 JW |
10143 | } |
10144 | return 0; | |
10145 | } | |
10146 | ||
10147 | /* Return whether the given resource is in the given insn's list of chks | |
10148 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
10149 | conflict. */ |
10150 | ||
800eeca4 JW |
10151 | static int |
10152 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
10153 | struct rsrc *rs; |
10154 | struct ia64_opcode *idesc; | |
10155 | int note; | |
10156 | int qp_regno; | |
10157 | int path; | |
800eeca4 JW |
10158 | { |
10159 | struct rsrc specs[MAX_SPECS]; | |
10160 | int count; | |
10161 | ||
10162 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
10163 | we don't need to check. One exception is note 11, which indicates that | |
10164 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 10165 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
10166 | && note != 11) |
10167 | return 0; | |
10168 | ||
10169 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
10170 | while (count-- > 0) | |
10171 | { | |
10172 | /* UNAT checking is a bit more specific than other resources */ | |
10173 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
10174 | && specs[count].mem_offset.hint |
10175 | && rs->mem_offset.hint) | |
10176 | { | |
10177 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
10178 | { | |
10179 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
10180 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
10181 | return 1; | |
10182 | else | |
10183 | continue; | |
10184 | } | |
10185 | } | |
800eeca4 | 10186 | |
7484b8e6 | 10187 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 10188 | writes are an OR. */ |
7484b8e6 | 10189 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 10190 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
10191 | || rs->dependency->specifier == IA64_RS_PR63) |
10192 | { | |
10193 | if (specs[count].cmp_type != CMP_NONE | |
10194 | && specs[count].cmp_type == rs->cmp_type) | |
10195 | { | |
10196 | if (md.debug_dv) | |
10197 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
10198 | dv_mode[rs->dependency->mode], | |
afa680f8 | 10199 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
10200 | specs[count].index : 63); |
10201 | continue; | |
10202 | } | |
10203 | if (md.debug_dv) | |
4a4f25cf | 10204 | fprintf (stderr, |
7484b8e6 TW |
10205 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
10206 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 10207 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 10208 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 10209 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 10210 | specs[count].index : 63); |
4a4f25cf | 10211 | |
7484b8e6 TW |
10212 | } |
10213 | ||
800eeca4 | 10214 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 10215 | */ |
800eeca4 | 10216 | if (!specs[count].specific || !rs->specific) |
542d6675 | 10217 | return 2; |
800eeca4 | 10218 | else if (specs[count].index == rs->index) |
542d6675 | 10219 | return 1; |
800eeca4 | 10220 | } |
800eeca4 JW |
10221 | |
10222 | return 0; | |
10223 | } | |
10224 | ||
10225 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
10226 | insert a stop to create the break. Update all resource dependencies | |
10227 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
10228 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
10229 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 10230 | instruction. */ |
800eeca4 JW |
10231 | |
10232 | static void | |
10233 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
10234 | int insert_stop; |
10235 | int qp_regno; | |
10236 | int save_current; | |
800eeca4 JW |
10237 | { |
10238 | int i; | |
10239 | ||
10240 | if (insert_stop && md.num_slots_in_use > 0) | |
10241 | PREV_SLOT.end_of_insn_group = 1; | |
10242 | ||
10243 | if (md.debug_dv) | |
10244 | { | |
197865e8 | 10245 | fprintf (stderr, " Insn group break%s", |
542d6675 | 10246 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 10247 | if (qp_regno != 0) |
542d6675 | 10248 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
10249 | fprintf (stderr, "\n"); |
10250 | } | |
10251 | ||
10252 | i = 0; | |
10253 | while (i < regdepslen) | |
10254 | { | |
10255 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
10256 | ||
10257 | if (qp_regno != 0 | |
542d6675 KH |
10258 | && regdeps[i].qp_regno != qp_regno) |
10259 | { | |
10260 | ++i; | |
10261 | continue; | |
10262 | } | |
800eeca4 JW |
10263 | |
10264 | if (save_current | |
542d6675 KH |
10265 | && CURR_SLOT.src_file == regdeps[i].file |
10266 | && CURR_SLOT.src_line == regdeps[i].line) | |
10267 | { | |
10268 | ++i; | |
10269 | continue; | |
10270 | } | |
800eeca4 JW |
10271 | |
10272 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 10273 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 10274 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
10275 | || dep->semantics == IA64_DVS_IMPLIEDF |
10276 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
10277 | { | |
10278 | print_dependency ("Removing", i); | |
10279 | regdeps[i] = regdeps[--regdepslen]; | |
10280 | } | |
800eeca4 | 10281 | else |
542d6675 KH |
10282 | { |
10283 | if (dep->semantics == IA64_DVS_DATA | |
10284 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 10285 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
10286 | { |
10287 | if (regdeps[i].insn_srlz == STATE_NONE) | |
10288 | regdeps[i].insn_srlz = STATE_STOP; | |
10289 | if (regdeps[i].data_srlz == STATE_NONE) | |
10290 | regdeps[i].data_srlz = STATE_STOP; | |
10291 | } | |
10292 | ++i; | |
10293 | } | |
800eeca4 JW |
10294 | } |
10295 | } | |
10296 | ||
542d6675 KH |
10297 | /* Add the given resource usage spec to the list of active dependencies. */ |
10298 | ||
197865e8 | 10299 | static void |
800eeca4 | 10300 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
10301 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
10302 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
10303 | struct rsrc *spec; |
10304 | int depind; | |
10305 | int path; | |
800eeca4 JW |
10306 | { |
10307 | if (regdepslen == regdepstotlen) | |
10308 | { | |
10309 | regdepstotlen += 20; | |
10310 | regdeps = (struct rsrc *) | |
542d6675 | 10311 | xrealloc ((void *) regdeps, |
bc805888 | 10312 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
10313 | } |
10314 | ||
10315 | regdeps[regdepslen] = *spec; | |
10316 | regdeps[regdepslen].depind = depind; | |
10317 | regdeps[regdepslen].path = path; | |
10318 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
10319 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
10320 | ||
10321 | print_dependency ("Adding", regdepslen); | |
10322 | ||
10323 | ++regdepslen; | |
10324 | } | |
10325 | ||
10326 | static void | |
10327 | print_dependency (action, depind) | |
542d6675 KH |
10328 | const char *action; |
10329 | int depind; | |
800eeca4 JW |
10330 | { |
10331 | if (md.debug_dv) | |
10332 | { | |
197865e8 | 10333 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
10334 | action, dv_mode[(regdeps[depind].dependency)->mode], |
10335 | (regdeps[depind].dependency)->name); | |
a66d2bb7 | 10336 | if (regdeps[depind].specific && regdeps[depind].index >= 0) |
542d6675 | 10337 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 10338 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
10339 | { |
10340 | fputs (" ", stderr); | |
10341 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
10342 | fputs ("+", stderr); | |
10343 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
10344 | } | |
800eeca4 JW |
10345 | fprintf (stderr, "\n"); |
10346 | } | |
10347 | } | |
10348 | ||
10349 | static void | |
10350 | instruction_serialization () | |
10351 | { | |
10352 | int i; | |
10353 | if (md.debug_dv) | |
10354 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 10355 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
10356 | if (regdeps[i].insn_srlz == STATE_STOP) |
10357 | regdeps[i].insn_srlz = STATE_SRLZ; | |
10358 | } | |
10359 | ||
10360 | static void | |
10361 | data_serialization () | |
10362 | { | |
10363 | int i = 0; | |
10364 | if (md.debug_dv) | |
10365 | fprintf (stderr, " Data serialization\n"); | |
10366 | while (i < regdepslen) | |
10367 | { | |
10368 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
10369 | /* Note: as of 991210, all "other" dependencies are cleared by a |
10370 | data serialization. This might change with new tables */ | |
10371 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
10372 | { | |
10373 | print_dependency ("Removing", i); | |
10374 | regdeps[i] = regdeps[--regdepslen]; | |
10375 | } | |
800eeca4 | 10376 | else |
542d6675 | 10377 | ++i; |
800eeca4 JW |
10378 | } |
10379 | } | |
10380 | ||
542d6675 KH |
10381 | /* Insert stops and serializations as needed to avoid DVs. */ |
10382 | ||
800eeca4 JW |
10383 | static void |
10384 | remove_marked_resource (rs) | |
542d6675 | 10385 | struct rsrc *rs; |
800eeca4 JW |
10386 | { |
10387 | switch (rs->dependency->semantics) | |
10388 | { | |
10389 | case IA64_DVS_SPECIFIC: | |
10390 | if (md.debug_dv) | |
10391 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 10392 | /* ...fall through... */ |
800eeca4 JW |
10393 | case IA64_DVS_INSTR: |
10394 | if (md.debug_dv) | |
542d6675 | 10395 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 10396 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 10397 | insn_group_break (1, 0, 0); |
800eeca4 | 10398 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 10399 | { |
888a75be | 10400 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10401 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 10402 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10403 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10404 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
10405 | instruction_serialization (); | |
10406 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10407 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10408 | emit_one_bundle (); | |
888a75be | 10409 | CURR_SLOT = oldslot; |
542d6675 | 10410 | } |
800eeca4 JW |
10411 | insn_group_break (1, 0, 0); |
10412 | break; | |
10413 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
10414 | "other" types of DV are eliminated |
10415 | by a data serialization */ | |
800eeca4 JW |
10416 | case IA64_DVS_DATA: |
10417 | if (md.debug_dv) | |
542d6675 | 10418 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 10419 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 10420 | insn_group_break (1, 0, 0); |
800eeca4 | 10421 | { |
888a75be | 10422 | struct slot oldslot = CURR_SLOT; |
542d6675 | 10423 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 10424 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
744b6414 | 10425 | CURR_SLOT.user_template = -1; |
542d6675 KH |
10426 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
10427 | data_serialization (); | |
10428 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10429 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10430 | emit_one_bundle (); | |
888a75be | 10431 | CURR_SLOT = oldslot; |
800eeca4 JW |
10432 | } |
10433 | break; | |
10434 | case IA64_DVS_IMPLIED: | |
10435 | case IA64_DVS_IMPLIEDF: | |
10436 | if (md.debug_dv) | |
542d6675 | 10437 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
10438 | insn_group_break (1, 0, 0); |
10439 | break; | |
10440 | default: | |
10441 | break; | |
10442 | } | |
10443 | } | |
10444 | ||
10445 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 10446 | list. |
800eeca4 JW |
10447 | |
10448 | The check is run once for each execution path encountered. In this case, | |
10449 | a unique execution path is the sequence of instructions following a code | |
10450 | entry point, e.g. the following has three execution paths, one starting | |
10451 | at L0, one at L1, and one at L2. | |
197865e8 | 10452 | |
800eeca4 JW |
10453 | L0: nop |
10454 | L1: add | |
10455 | L2: add | |
197865e8 | 10456 | br.ret |
800eeca4 | 10457 | */ |
542d6675 | 10458 | |
800eeca4 JW |
10459 | static void |
10460 | check_dependencies (idesc) | |
542d6675 | 10461 | struct ia64_opcode *idesc; |
800eeca4 JW |
10462 | { |
10463 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10464 | int path; | |
10465 | int i; | |
10466 | ||
10467 | /* Note that the number of marked resources may change within the | |
197865e8 | 10468 | loop if in auto mode. */ |
800eeca4 JW |
10469 | i = 0; |
10470 | while (i < regdepslen) | |
10471 | { | |
10472 | struct rsrc *rs = ®deps[i]; | |
10473 | const struct ia64_dependency *dep = rs->dependency; | |
10474 | int chkind; | |
10475 | int note; | |
10476 | int start_over = 0; | |
10477 | ||
10478 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
10479 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
10480 | { | |
10481 | ++i; | |
10482 | continue; | |
10483 | } | |
10484 | ||
10485 | note = NOTE (opdeps->chks[chkind]); | |
10486 | ||
10487 | /* Check this resource against each execution path seen thus far. */ | |
10488 | for (path = 0; path <= md.path; path++) | |
10489 | { | |
10490 | int matchtype; | |
10491 | ||
10492 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
10493 | if (rs->path < path) | |
10494 | continue; | |
10495 | ||
10496 | /* If the QP for this insn implies a QP which has branched, don't | |
10497 | bother checking. Ed. NOTE: I don't think this check is terribly | |
10498 | useful; what's the point of generating code which will only be | |
10499 | reached if its QP is zero? | |
10500 | This code was specifically inserted to handle the following code, | |
10501 | based on notes from Intel's DV checking code, where p1 implies p2. | |
10502 | ||
10503 | mov r4 = 2 | |
10504 | (p2) br.cond L | |
10505 | (p1) mov r4 = 7 | |
10506 | */ | |
10507 | if (CURR_SLOT.qp_regno != 0) | |
10508 | { | |
10509 | int skip = 0; | |
10510 | int implies; | |
10511 | for (implies = 0; implies < qp_implieslen; implies++) | |
10512 | { | |
10513 | if (qp_implies[implies].path >= path | |
10514 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
10515 | && qp_implies[implies].p2_branched) | |
10516 | { | |
10517 | skip = 1; | |
10518 | break; | |
10519 | } | |
10520 | } | |
10521 | if (skip) | |
10522 | continue; | |
10523 | } | |
10524 | ||
10525 | if ((matchtype = resources_match (rs, idesc, note, | |
10526 | CURR_SLOT.qp_regno, path)) != 0) | |
10527 | { | |
10528 | char msg[1024]; | |
10529 | char pathmsg[256] = ""; | |
10530 | char indexmsg[256] = ""; | |
10531 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
10532 | ||
10533 | if (path != 0) | |
10534 | sprintf (pathmsg, " when entry is at label '%s'", | |
10535 | md.entry_labels[path - 1]); | |
a66d2bb7 | 10536 | if (matchtype == 1 && rs->index >= 0) |
542d6675 KH |
10537 | sprintf (indexmsg, ", specific resource number is %d", |
10538 | rs->index); | |
10539 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
10540 | idesc->name, | |
10541 | (certain ? "violates" : "may violate"), | |
10542 | dv_mode[dep->mode], dep->name, | |
10543 | dv_sem[dep->semantics], | |
10544 | pathmsg, indexmsg); | |
10545 | ||
10546 | if (md.explicit_mode) | |
10547 | { | |
10548 | as_warn ("%s", msg); | |
10549 | if (path < md.path) | |
10550 | as_warn (_("Only the first path encountering the conflict " | |
10551 | "is reported")); | |
10552 | as_warn_where (rs->file, rs->line, | |
10553 | _("This is the location of the " | |
10554 | "conflicting usage")); | |
10555 | /* Don't bother checking other paths, to avoid duplicating | |
10556 | the same warning */ | |
10557 | break; | |
10558 | } | |
10559 | else | |
10560 | { | |
10561 | if (md.debug_dv) | |
10562 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
10563 | ||
10564 | remove_marked_resource (rs); | |
10565 | ||
10566 | /* since the set of dependencies has changed, start over */ | |
10567 | /* FIXME -- since we're removing dvs as we go, we | |
10568 | probably don't really need to start over... */ | |
10569 | start_over = 1; | |
10570 | break; | |
10571 | } | |
10572 | } | |
10573 | } | |
800eeca4 | 10574 | if (start_over) |
542d6675 | 10575 | i = 0; |
800eeca4 | 10576 | else |
542d6675 | 10577 | ++i; |
800eeca4 JW |
10578 | } |
10579 | } | |
10580 | ||
542d6675 KH |
10581 | /* Register new dependencies based on the given opcode. */ |
10582 | ||
800eeca4 JW |
10583 | static void |
10584 | mark_resources (idesc) | |
542d6675 | 10585 | struct ia64_opcode *idesc; |
800eeca4 JW |
10586 | { |
10587 | int i; | |
10588 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
10589 | int add_only_qp_reads = 0; | |
10590 | ||
10591 | /* A conditional branch only uses its resources if it is taken; if it is | |
10592 | taken, we stop following that path. The other branch types effectively | |
10593 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 10594 | reads. */ |
800eeca4 JW |
10595 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
10596 | { | |
10597 | add_only_qp_reads = 1; | |
10598 | } | |
10599 | ||
10600 | if (md.debug_dv) | |
10601 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
10602 | ||
542d6675 | 10603 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
10604 | { |
10605 | const struct ia64_dependency *dep; | |
10606 | struct rsrc specs[MAX_SPECS]; | |
10607 | int note; | |
10608 | int path; | |
10609 | int count; | |
197865e8 | 10610 | |
800eeca4 | 10611 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 10612 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
10613 | |
10614 | if (add_only_qp_reads | |
542d6675 KH |
10615 | && !(dep->mode == IA64_DV_WAR |
10616 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 10617 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
10618 | || dep->specifier == IA64_RS_PR63))) |
10619 | continue; | |
800eeca4 JW |
10620 | |
10621 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
10622 | ||
800eeca4 | 10623 | while (count-- > 0) |
542d6675 KH |
10624 | { |
10625 | mark_resource (idesc, dep, &specs[count], | |
10626 | DEP (opdeps->regs[i]), md.path); | |
10627 | } | |
800eeca4 JW |
10628 | |
10629 | /* The execution path may affect register values, which may in turn | |
542d6675 | 10630 | affect which indirect-access resources are accessed. */ |
800eeca4 | 10631 | switch (dep->specifier) |
542d6675 KH |
10632 | { |
10633 | default: | |
10634 | break; | |
10635 | case IA64_RS_CPUID: | |
10636 | case IA64_RS_DBR: | |
10637 | case IA64_RS_IBR: | |
800eeca4 | 10638 | case IA64_RS_MSR: |
542d6675 KH |
10639 | case IA64_RS_PKR: |
10640 | case IA64_RS_PMC: | |
10641 | case IA64_RS_PMD: | |
10642 | case IA64_RS_RR: | |
10643 | for (path = 0; path < md.path; path++) | |
10644 | { | |
10645 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
10646 | while (count-- > 0) | |
10647 | mark_resource (idesc, dep, &specs[count], | |
10648 | DEP (opdeps->regs[i]), path); | |
10649 | } | |
10650 | break; | |
10651 | } | |
10652 | } | |
10653 | } | |
10654 | ||
10655 | /* Remove dependencies when they no longer apply. */ | |
10656 | ||
800eeca4 JW |
10657 | static void |
10658 | update_dependencies (idesc) | |
542d6675 | 10659 | struct ia64_opcode *idesc; |
800eeca4 JW |
10660 | { |
10661 | int i; | |
10662 | ||
10663 | if (strcmp (idesc->name, "srlz.i") == 0) | |
10664 | { | |
10665 | instruction_serialization (); | |
10666 | } | |
10667 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
10668 | { | |
10669 | data_serialization (); | |
10670 | } | |
10671 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 10672 | || is_taken_branch (idesc)) |
800eeca4 | 10673 | { |
542d6675 KH |
10674 | /* Although technically the taken branch doesn't clear dependencies |
10675 | which require a srlz.[id], we don't follow the branch; the next | |
10676 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 10677 | regdepslen = 0; |
800eeca4 JW |
10678 | md.path = 0; |
10679 | } | |
10680 | else if (is_conditional_branch (idesc) | |
542d6675 | 10681 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
10682 | { |
10683 | int is_call = strstr (idesc->name, ".call") != NULL; | |
10684 | ||
542d6675 KH |
10685 | for (i = 0; i < qp_implieslen; i++) |
10686 | { | |
10687 | /* If the conditional branch's predicate is implied by the predicate | |
10688 | in an existing dependency, remove that dependency. */ | |
10689 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
10690 | { | |
10691 | int depind = 0; | |
10692 | /* Note that this implied predicate takes a branch so that if | |
10693 | a later insn generates a DV but its predicate implies this | |
10694 | one, we can avoid the false DV warning. */ | |
10695 | qp_implies[i].p2_branched = 1; | |
10696 | while (depind < regdepslen) | |
10697 | { | |
10698 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
10699 | { | |
10700 | print_dependency ("Removing", depind); | |
10701 | regdeps[depind] = regdeps[--regdepslen]; | |
10702 | } | |
10703 | else | |
10704 | ++depind; | |
10705 | } | |
10706 | } | |
10707 | } | |
800eeca4 | 10708 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
10709 | cleared, provided that the QP hasn't been modified between the |
10710 | marking instruction and the branch. */ | |
800eeca4 | 10711 | if (is_call) |
542d6675 KH |
10712 | { |
10713 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
10714 | } | |
800eeca4 | 10715 | else |
542d6675 KH |
10716 | { |
10717 | i = 0; | |
10718 | while (i < regdepslen) | |
10719 | { | |
10720 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
10721 | && regdeps[i].link_to_qp_branch | |
10722 | && (regdeps[i].file != CURR_SLOT.src_file | |
10723 | || regdeps[i].line != CURR_SLOT.src_line)) | |
10724 | { | |
10725 | /* Treat like a taken branch */ | |
10726 | print_dependency ("Removing", i); | |
10727 | regdeps[i] = regdeps[--regdepslen]; | |
10728 | } | |
10729 | else | |
10730 | ++i; | |
10731 | } | |
10732 | } | |
800eeca4 JW |
10733 | } |
10734 | } | |
10735 | ||
10736 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 10737 | |
800eeca4 JW |
10738 | static int |
10739 | check_dv (idesc) | |
542d6675 | 10740 | struct ia64_opcode *idesc; |
800eeca4 JW |
10741 | { |
10742 | if (md.debug_dv) | |
10743 | { | |
197865e8 | 10744 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
10745 | idesc->name, CURR_SLOT.src_line, |
10746 | idesc->dependencies->nchks, | |
10747 | idesc->dependencies->nregs); | |
800eeca4 JW |
10748 | } |
10749 | ||
197865e8 | 10750 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 10751 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 10752 | check against the specific resources used. */ |
800eeca4 JW |
10753 | check_dependencies (idesc); |
10754 | ||
542d6675 KH |
10755 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
10756 | then add them to the list of marked resources. */ | |
800eeca4 JW |
10757 | mark_resources (idesc); |
10758 | ||
10759 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
10760 | requirements for being cleared |
10761 | ||
800eeca4 JW |
10762 | Instruction serialization (insns separated by interruption, rfi, or |
10763 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
10764 | ||
10765 | Data serialization (instruction serialization, or writer + srlz.d + | |
10766 | reader, where writer and srlz.d are in separate groups) clears | |
10767 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
10768 | always be the case). | |
10769 | ||
10770 | Instruction group break (groups separated by stop, taken branch, | |
10771 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
10772 | */ | |
10773 | update_dependencies (idesc); | |
10774 | ||
10775 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 10776 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
10777 | note_register_values (idesc); |
10778 | ||
197865e8 | 10779 | /* We don't need or want this anymore. */ |
800eeca4 JW |
10780 | md.mem_offset.hint = 0; |
10781 | ||
10782 | return 0; | |
10783 | } | |
10784 | ||
10785 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
10786 | here. */ | |
10787 | void | |
10788 | md_assemble (str) | |
10789 | char *str; | |
10790 | { | |
10791 | char *saved_input_line_pointer, *mnemonic; | |
10792 | const struct pseudo_opcode *pdesc; | |
10793 | struct ia64_opcode *idesc; | |
10794 | unsigned char qp_regno; | |
10795 | unsigned int flags; | |
10796 | int ch; | |
10797 | ||
10798 | saved_input_line_pointer = input_line_pointer; | |
10799 | input_line_pointer = str; | |
10800 | ||
542d6675 | 10801 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
10802 | |
10803 | mnemonic = input_line_pointer; | |
10804 | ch = get_symbol_end (); | |
10805 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10806 | if (pdesc) | |
10807 | { | |
10808 | *input_line_pointer = ch; | |
10809 | (*pdesc->handler) (pdesc->arg); | |
10810 | goto done; | |
10811 | } | |
10812 | ||
542d6675 | 10813 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10814 | |
10815 | idesc = ia64_find_opcode (mnemonic); | |
10816 | *input_line_pointer = ch; | |
10817 | if (!idesc) | |
10818 | { | |
10819 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10820 | goto done; | |
10821 | } | |
10822 | ||
10823 | idesc = parse_operands (idesc); | |
10824 | if (!idesc) | |
10825 | goto done; | |
10826 | ||
542d6675 | 10827 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10828 | if (idesc->type == IA64_TYPE_DYN) |
10829 | { | |
10830 | if (strcmp (idesc->name, "add") == 0) | |
10831 | { | |
10832 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10833 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10834 | mnemonic = "addl"; | |
10835 | else | |
10836 | mnemonic = "adds"; | |
3d56ab85 | 10837 | ia64_free_opcode (idesc); |
800eeca4 | 10838 | idesc = ia64_find_opcode (mnemonic); |
800eeca4 JW |
10839 | } |
10840 | else if (strcmp (idesc->name, "mov") == 0) | |
10841 | { | |
10842 | enum ia64_opnd opnd1, opnd2; | |
10843 | int rop; | |
10844 | ||
10845 | opnd1 = idesc->operands[0]; | |
10846 | opnd2 = idesc->operands[1]; | |
10847 | if (opnd1 == IA64_OPND_AR3) | |
10848 | rop = 0; | |
10849 | else if (opnd2 == IA64_OPND_AR3) | |
10850 | rop = 1; | |
10851 | else | |
10852 | abort (); | |
652ca075 L |
10853 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10854 | { | |
10855 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10856 | mnemonic = "mov.i"; | |
97762d08 | 10857 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) |
652ca075 | 10858 | mnemonic = "mov.m"; |
97762d08 JB |
10859 | else |
10860 | rop = -1; | |
652ca075 | 10861 | } |
800eeca4 | 10862 | else |
652ca075 | 10863 | abort (); |
97762d08 JB |
10864 | if (rop >= 0) |
10865 | { | |
10866 | ia64_free_opcode (idesc); | |
10867 | idesc = ia64_find_opcode (mnemonic); | |
10868 | while (idesc != NULL | |
10869 | && (idesc->operands[0] != opnd1 | |
10870 | || idesc->operands[1] != opnd2)) | |
10871 | idesc = get_next_opcode (idesc); | |
10872 | } | |
800eeca4 JW |
10873 | } |
10874 | } | |
652ca075 L |
10875 | else if (strcmp (idesc->name, "mov.i") == 0 |
10876 | || strcmp (idesc->name, "mov.m") == 0) | |
10877 | { | |
10878 | enum ia64_opnd opnd1, opnd2; | |
10879 | int rop; | |
10880 | ||
10881 | opnd1 = idesc->operands[0]; | |
10882 | opnd2 = idesc->operands[1]; | |
10883 | if (opnd1 == IA64_OPND_AR3) | |
10884 | rop = 0; | |
10885 | else if (opnd2 == IA64_OPND_AR3) | |
10886 | rop = 1; | |
10887 | else | |
10888 | abort (); | |
10889 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10890 | { | |
10891 | char unit = 'a'; | |
10892 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10893 | unit = 'i'; | |
10894 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10895 | unit = 'm'; | |
10896 | if (unit != 'a' && unit != idesc->name [4]) | |
80b8152b | 10897 | as_bad ("AR %d can only be accessed by %c-unit", |
652ca075 L |
10898 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), |
10899 | TOUPPER (unit)); | |
10900 | } | |
10901 | } | |
91d777ee L |
10902 | else if (strcmp (idesc->name, "hint.b") == 0) |
10903 | { | |
10904 | switch (md.hint_b) | |
10905 | { | |
10906 | case hint_b_ok: | |
10907 | break; | |
10908 | case hint_b_warning: | |
10909 | as_warn ("hint.b may be treated as nop"); | |
10910 | break; | |
10911 | case hint_b_error: | |
10912 | as_bad ("hint.b shouldn't be used"); | |
10913 | break; | |
10914 | } | |
10915 | } | |
800eeca4 JW |
10916 | |
10917 | qp_regno = 0; | |
10918 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10919 | { |
10920 | qp_regno = md.qp.X_add_number - REG_P; | |
10921 | md.qp.X_op = O_absent; | |
10922 | } | |
800eeca4 JW |
10923 | |
10924 | flags = idesc->flags; | |
10925 | ||
10926 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10927 | { |
10928 | /* The alignment frag has to end with a stop bit only if the | |
10929 | next instruction after the alignment directive has to be | |
10930 | the first instruction in an instruction group. */ | |
10931 | if (align_frag) | |
10932 | { | |
10933 | while (align_frag->fr_type != rs_align_code) | |
10934 | { | |
10935 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10936 | if (!align_frag) |
10937 | break; | |
9545c4ce | 10938 | } |
bae25f19 L |
10939 | /* align_frag can be NULL if there are directives in |
10940 | between. */ | |
10941 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10942 | align_frag->tc_frag_data = 1; |
10943 | } | |
10944 | ||
10945 | insn_group_break (1, 0, 0); | |
10946 | } | |
10947 | align_frag = NULL; | |
800eeca4 JW |
10948 | |
10949 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10950 | { | |
10951 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10952 | goto done; | |
10953 | } | |
10954 | ||
542d6675 | 10955 | /* Build the instruction. */ |
800eeca4 JW |
10956 | CURR_SLOT.qp_regno = qp_regno; |
10957 | CURR_SLOT.idesc = idesc; | |
10958 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10959 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 | 10960 | |
ba825241 | 10961 | /* Add unwind entries, if there are any. */ |
e0c9811a | 10962 | if (unwind.current_entry) |
800eeca4 | 10963 | { |
e0c9811a JW |
10964 | CURR_SLOT.unwind_record = unwind.current_entry; |
10965 | unwind.current_entry = NULL; | |
800eeca4 | 10966 | } |
ba825241 JB |
10967 | if (unwind.pending_saves) |
10968 | { | |
10969 | if (unwind.pending_saves->next) | |
10970 | { | |
10971 | /* Attach the next pending save to the next slot so that its | |
10972 | slot number will get set correctly. */ | |
10973 | add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); | |
10974 | unwind.pending_saves = &unwind.pending_saves->next->r.record.p; | |
10975 | } | |
10976 | else | |
10977 | unwind.pending_saves = NULL; | |
10978 | } | |
5656b6b8 | 10979 | if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) |
75e09913 | 10980 | unwind.insn = 1; |
800eeca4 | 10981 | |
542d6675 | 10982 | /* Check for dependency violations. */ |
800eeca4 | 10983 | if (md.detect_dv) |
542d6675 | 10984 | check_dv (idesc); |
800eeca4 JW |
10985 | |
10986 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10987 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10988 | emit_one_bundle (); | |
10989 | ||
10990 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10991 | insn_group_break (1, 0, 0); | |
10992 | ||
10993 | md.last_text_seg = now_seg; | |
10994 | ||
10995 | done: | |
10996 | input_line_pointer = saved_input_line_pointer; | |
10997 | } | |
10998 | ||
10999 | /* Called when symbol NAME cannot be found in the symbol table. | |
11000 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
11001 | |
11002 | symbolS * | |
800eeca4 | 11003 | md_undefined_symbol (name) |
2434f565 | 11004 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
11005 | { |
11006 | return 0; | |
11007 | } | |
11008 | ||
11009 | /* Called for any expression that can not be recognized. When the | |
11010 | function is called, `input_line_pointer' will point to the start of | |
11011 | the expression. */ | |
542d6675 | 11012 | |
800eeca4 JW |
11013 | void |
11014 | md_operand (e) | |
11015 | expressionS *e; | |
11016 | { | |
800eeca4 JW |
11017 | switch (*input_line_pointer) |
11018 | { | |
800eeca4 JW |
11019 | case '[': |
11020 | ++input_line_pointer; | |
11021 | expression (e); | |
11022 | if (*input_line_pointer != ']') | |
11023 | { | |
16a48f83 | 11024 | as_bad ("Closing bracket missing"); |
800eeca4 JW |
11025 | goto err; |
11026 | } | |
11027 | else | |
11028 | { | |
11029 | if (e->X_op != O_register) | |
11030 | as_bad ("Register expected as index"); | |
11031 | ||
11032 | ++input_line_pointer; | |
11033 | e->X_op = O_index; | |
11034 | } | |
11035 | break; | |
11036 | ||
11037 | default: | |
11038 | break; | |
11039 | } | |
11040 | return; | |
11041 | ||
11042 | err: | |
11043 | ignore_rest_of_line (); | |
11044 | } | |
11045 | ||
11046 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
11047 | a section symbol plus some offset. For relocs involving @fptr(), | |
11048 | directives we don't want such adjustments since we need to have the | |
11049 | original symbol's name in the reloc. */ | |
11050 | int | |
11051 | ia64_fix_adjustable (fix) | |
11052 | fixS *fix; | |
11053 | { | |
11054 | /* Prevent all adjustments to global symbols */ | |
e97b3f28 | 11055 | if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) |
800eeca4 JW |
11056 | return 0; |
11057 | ||
11058 | switch (fix->fx_r_type) | |
11059 | { | |
11060 | case BFD_RELOC_IA64_FPTR64I: | |
11061 | case BFD_RELOC_IA64_FPTR32MSB: | |
11062 | case BFD_RELOC_IA64_FPTR32LSB: | |
11063 | case BFD_RELOC_IA64_FPTR64MSB: | |
11064 | case BFD_RELOC_IA64_FPTR64LSB: | |
11065 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11066 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11067 | return 0; | |
11068 | default: | |
11069 | break; | |
11070 | } | |
11071 | ||
11072 | return 1; | |
11073 | } | |
11074 | ||
11075 | int | |
11076 | ia64_force_relocation (fix) | |
11077 | fixS *fix; | |
11078 | { | |
11079 | switch (fix->fx_r_type) | |
11080 | { | |
11081 | case BFD_RELOC_IA64_FPTR64I: | |
11082 | case BFD_RELOC_IA64_FPTR32MSB: | |
11083 | case BFD_RELOC_IA64_FPTR32LSB: | |
11084 | case BFD_RELOC_IA64_FPTR64MSB: | |
11085 | case BFD_RELOC_IA64_FPTR64LSB: | |
11086 | ||
11087 | case BFD_RELOC_IA64_LTOFF22: | |
11088 | case BFD_RELOC_IA64_LTOFF64I: | |
11089 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11090 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11091 | case BFD_RELOC_IA64_PLTOFF22: | |
11092 | case BFD_RELOC_IA64_PLTOFF64I: | |
11093 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
11094 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
11095 | |
11096 | case BFD_RELOC_IA64_LTOFF22X: | |
11097 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
11098 | return 1; |
11099 | ||
11100 | default: | |
a161fe53 | 11101 | break; |
800eeca4 | 11102 | } |
a161fe53 | 11103 | |
ae6063d4 | 11104 | return generic_force_reloc (fix); |
800eeca4 JW |
11105 | } |
11106 | ||
11107 | /* Decide from what point a pc-relative relocation is relative to, | |
11108 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
11109 | long | |
11110 | ia64_pcrel_from_section (fix, sec) | |
11111 | fixS *fix; | |
11112 | segT sec; | |
11113 | { | |
11114 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 11115 | |
800eeca4 JW |
11116 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
11117 | off &= ~0xfUL; | |
11118 | ||
11119 | return off; | |
11120 | } | |
11121 | ||
6174d9c8 RH |
11122 | |
11123 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
11124 | void | |
11125 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
11126 | { | |
11127 | expressionS expr; | |
11128 | ||
11129 | expr.X_op = O_pseudo_fixup; | |
11130 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
11131 | expr.X_add_number = 0; | |
11132 | expr.X_add_symbol = symbol; | |
11133 | emit_expr (&expr, size); | |
11134 | } | |
11135 | ||
800eeca4 JW |
11136 | /* This is called whenever some data item (not an instruction) needs a |
11137 | fixup. We pick the right reloc code depending on the byteorder | |
11138 | currently in effect. */ | |
11139 | void | |
11140 | ia64_cons_fix_new (f, where, nbytes, exp) | |
11141 | fragS *f; | |
11142 | int where; | |
11143 | int nbytes; | |
11144 | expressionS *exp; | |
11145 | { | |
11146 | bfd_reloc_code_real_type code; | |
11147 | fixS *fix; | |
11148 | ||
11149 | switch (nbytes) | |
11150 | { | |
11151 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
11152 | them here since they will work fine as long as the expression | |
11153 | is fully defined at the end of the pass over the source file. */ | |
11154 | case 1: code = BFD_RELOC_8; break; | |
11155 | case 2: code = BFD_RELOC_16; break; | |
11156 | case 4: | |
11157 | if (target_big_endian) | |
11158 | code = BFD_RELOC_IA64_DIR32MSB; | |
11159 | else | |
11160 | code = BFD_RELOC_IA64_DIR32LSB; | |
11161 | break; | |
11162 | ||
11163 | case 8: | |
40449e9f | 11164 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 11165 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
11166 | && exp->X_op_symbol |
11167 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
11168 | && !(md.flags & EF_IA_64_ABI64)) | |
11169 | { | |
11170 | if (target_big_endian) | |
11171 | code = BFD_RELOC_IA64_IPLTMSB; | |
11172 | else | |
11173 | code = BFD_RELOC_IA64_IPLTLSB; | |
11174 | exp->X_op = O_symbol; | |
11175 | break; | |
11176 | } | |
11177 | else | |
11178 | { | |
11179 | if (target_big_endian) | |
11180 | code = BFD_RELOC_IA64_DIR64MSB; | |
11181 | else | |
11182 | code = BFD_RELOC_IA64_DIR64LSB; | |
11183 | break; | |
11184 | } | |
800eeca4 | 11185 | |
3969b680 RH |
11186 | case 16: |
11187 | if (exp->X_op == O_pseudo_fixup | |
11188 | && exp->X_op_symbol | |
11189 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
11190 | { | |
11191 | if (target_big_endian) | |
11192 | code = BFD_RELOC_IA64_IPLTMSB; | |
11193 | else | |
11194 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
11195 | exp->X_op = O_symbol; |
11196 | break; | |
11197 | } | |
11198 | /* FALLTHRU */ | |
11199 | ||
800eeca4 JW |
11200 | default: |
11201 | as_bad ("Unsupported fixup size %d", nbytes); | |
11202 | ignore_rest_of_line (); | |
11203 | return; | |
11204 | } | |
6174d9c8 | 11205 | |
800eeca4 JW |
11206 | if (exp->X_op == O_pseudo_fixup) |
11207 | { | |
800eeca4 JW |
11208 | exp->X_op = O_symbol; |
11209 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 11210 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 11211 | } |
3969b680 | 11212 | |
800eeca4 JW |
11213 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
11214 | /* We need to store the byte order in effect in case we're going | |
11215 | to fix an 8 or 16 bit relocation (for which there no real | |
55cf6793 | 11216 | relocs available). See md_apply_fix(). */ |
800eeca4 JW |
11217 | fix->tc_fix_data.bigendian = target_big_endian; |
11218 | } | |
11219 | ||
11220 | /* Return the actual relocation we wish to associate with the pseudo | |
11221 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 11222 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
11223 | |
11224 | static bfd_reloc_code_real_type | |
11225 | ia64_gen_real_reloc_type (sym, r_type) | |
11226 | struct symbol *sym; | |
11227 | bfd_reloc_code_real_type r_type; | |
11228 | { | |
11229 | bfd_reloc_code_real_type new = 0; | |
0ca3e455 | 11230 | const char *type = NULL, *suffix = ""; |
800eeca4 JW |
11231 | |
11232 | if (sym == NULL) | |
11233 | { | |
11234 | return r_type; | |
11235 | } | |
11236 | ||
11237 | switch (S_GET_VALUE (sym)) | |
11238 | { | |
11239 | case FUNC_FPTR_RELATIVE: | |
11240 | switch (r_type) | |
11241 | { | |
11242 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
11243 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
11244 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
11245 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
11246 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
0ca3e455 | 11247 | default: type = "FPTR"; break; |
800eeca4 JW |
11248 | } |
11249 | break; | |
11250 | ||
11251 | case FUNC_GP_RELATIVE: | |
11252 | switch (r_type) | |
11253 | { | |
11254 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
11255 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
11256 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
11257 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
11258 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
11259 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
0ca3e455 | 11260 | default: type = "GPREL"; break; |
800eeca4 JW |
11261 | } |
11262 | break; | |
11263 | ||
11264 | case FUNC_LT_RELATIVE: | |
11265 | switch (r_type) | |
11266 | { | |
11267 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
11268 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
0ca3e455 | 11269 | default: type = "LTOFF"; break; |
800eeca4 JW |
11270 | } |
11271 | break; | |
11272 | ||
fa2c7eff RH |
11273 | case FUNC_LT_RELATIVE_X: |
11274 | switch (r_type) | |
11275 | { | |
11276 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
0ca3e455 | 11277 | default: type = "LTOFF"; suffix = "X"; break; |
fa2c7eff RH |
11278 | } |
11279 | break; | |
11280 | ||
c67e42c9 RH |
11281 | case FUNC_PC_RELATIVE: |
11282 | switch (r_type) | |
11283 | { | |
11284 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
11285 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
11286 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
11287 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
11288 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
11289 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
0ca3e455 | 11290 | default: type = "PCREL"; break; |
c67e42c9 RH |
11291 | } |
11292 | break; | |
11293 | ||
800eeca4 JW |
11294 | case FUNC_PLT_RELATIVE: |
11295 | switch (r_type) | |
11296 | { | |
11297 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
11298 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
11299 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
11300 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
0ca3e455 | 11301 | default: type = "PLTOFF"; break; |
800eeca4 JW |
11302 | } |
11303 | break; | |
11304 | ||
11305 | case FUNC_SEC_RELATIVE: | |
11306 | switch (r_type) | |
11307 | { | |
11308 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
11309 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
11310 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
11311 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
0ca3e455 | 11312 | default: type = "SECREL"; break; |
800eeca4 JW |
11313 | } |
11314 | break; | |
11315 | ||
11316 | case FUNC_SEG_RELATIVE: | |
11317 | switch (r_type) | |
11318 | { | |
11319 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
11320 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
11321 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
11322 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
0ca3e455 | 11323 | default: type = "SEGREL"; break; |
800eeca4 JW |
11324 | } |
11325 | break; | |
11326 | ||
11327 | case FUNC_LTV_RELATIVE: | |
11328 | switch (r_type) | |
11329 | { | |
11330 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
11331 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
11332 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
11333 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
0ca3e455 | 11334 | default: type = "LTV"; break; |
800eeca4 JW |
11335 | } |
11336 | break; | |
11337 | ||
11338 | case FUNC_LT_FPTR_RELATIVE: | |
11339 | switch (r_type) | |
11340 | { | |
11341 | case BFD_RELOC_IA64_IMM22: | |
11342 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
11343 | case BFD_RELOC_IA64_IMM64: | |
11344 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
0ca3e455 JB |
11345 | case BFD_RELOC_IA64_DIR32MSB: |
11346 | new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; | |
11347 | case BFD_RELOC_IA64_DIR32LSB: | |
11348 | new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; | |
11349 | case BFD_RELOC_IA64_DIR64MSB: | |
11350 | new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; | |
11351 | case BFD_RELOC_IA64_DIR64LSB: | |
11352 | new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; | |
800eeca4 | 11353 | default: |
0ca3e455 | 11354 | type = "LTOFF_FPTR"; break; |
800eeca4 JW |
11355 | } |
11356 | break; | |
3969b680 | 11357 | |
13ae64f3 JJ |
11358 | case FUNC_TP_RELATIVE: |
11359 | switch (r_type) | |
11360 | { | |
0ca3e455 JB |
11361 | case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; |
11362 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; | |
11363 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; | |
11364 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; | |
11365 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; | |
11366 | default: type = "TPREL"; break; | |
13ae64f3 JJ |
11367 | } |
11368 | break; | |
11369 | ||
11370 | case FUNC_LT_TP_RELATIVE: | |
11371 | switch (r_type) | |
11372 | { | |
11373 | case BFD_RELOC_IA64_IMM22: | |
11374 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
11375 | default: | |
0ca3e455 JB |
11376 | type = "LTOFF_TPREL"; break; |
11377 | } | |
11378 | break; | |
11379 | ||
11380 | case FUNC_DTP_MODULE: | |
11381 | switch (r_type) | |
11382 | { | |
11383 | case BFD_RELOC_IA64_DIR64MSB: | |
11384 | new = BFD_RELOC_IA64_DTPMOD64MSB; break; | |
11385 | case BFD_RELOC_IA64_DIR64LSB: | |
11386 | new = BFD_RELOC_IA64_DTPMOD64LSB; break; | |
11387 | default: | |
11388 | type = "DTPMOD"; break; | |
13ae64f3 JJ |
11389 | } |
11390 | break; | |
11391 | ||
11392 | case FUNC_LT_DTP_MODULE: | |
11393 | switch (r_type) | |
11394 | { | |
11395 | case BFD_RELOC_IA64_IMM22: | |
11396 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
11397 | default: | |
0ca3e455 | 11398 | type = "LTOFF_DTPMOD"; break; |
13ae64f3 JJ |
11399 | } |
11400 | break; | |
11401 | ||
11402 | case FUNC_DTP_RELATIVE: | |
11403 | switch (r_type) | |
11404 | { | |
0ca3e455 JB |
11405 | case BFD_RELOC_IA64_DIR32MSB: |
11406 | new = BFD_RELOC_IA64_DTPREL32MSB; break; | |
11407 | case BFD_RELOC_IA64_DIR32LSB: | |
11408 | new = BFD_RELOC_IA64_DTPREL32LSB; break; | |
6174d9c8 RH |
11409 | case BFD_RELOC_IA64_DIR64MSB: |
11410 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
11411 | case BFD_RELOC_IA64_DIR64LSB: | |
11412 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
11413 | case BFD_RELOC_IA64_IMM14: |
11414 | new = BFD_RELOC_IA64_DTPREL14; break; | |
11415 | case BFD_RELOC_IA64_IMM22: | |
11416 | new = BFD_RELOC_IA64_DTPREL22; break; | |
11417 | case BFD_RELOC_IA64_IMM64: | |
11418 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
11419 | default: | |
0ca3e455 | 11420 | type = "DTPREL"; break; |
13ae64f3 JJ |
11421 | } |
11422 | break; | |
11423 | ||
11424 | case FUNC_LT_DTP_RELATIVE: | |
11425 | switch (r_type) | |
11426 | { | |
11427 | case BFD_RELOC_IA64_IMM22: | |
11428 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
11429 | default: | |
0ca3e455 | 11430 | type = "LTOFF_DTPREL"; break; |
13ae64f3 JJ |
11431 | } |
11432 | break; | |
11433 | ||
40449e9f | 11434 | case FUNC_IPLT_RELOC: |
0ca3e455 JB |
11435 | switch (r_type) |
11436 | { | |
11437 | case BFD_RELOC_IA64_IPLTMSB: return r_type; | |
11438 | case BFD_RELOC_IA64_IPLTLSB: return r_type; | |
11439 | default: type = "IPLT"; break; | |
11440 | } | |
40449e9f | 11441 | break; |
1cd8ff38 | 11442 | |
800eeca4 JW |
11443 | default: |
11444 | abort (); | |
11445 | } | |
6174d9c8 | 11446 | |
800eeca4 JW |
11447 | if (new) |
11448 | return new; | |
11449 | else | |
0ca3e455 JB |
11450 | { |
11451 | int width; | |
11452 | ||
11453 | if (!type) | |
11454 | abort (); | |
11455 | switch (r_type) | |
11456 | { | |
11457 | case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; | |
11458 | case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; | |
11459 | case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; | |
11460 | case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; | |
30ad6cb9 | 11461 | case BFD_RELOC_UNUSED: width = 13; break; |
0ca3e455 JB |
11462 | case BFD_RELOC_IA64_IMM14: width = 14; break; |
11463 | case BFD_RELOC_IA64_IMM22: width = 22; break; | |
11464 | case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; | |
11465 | default: abort (); | |
11466 | } | |
11467 | ||
11468 | /* This should be an error, but since previously there wasn't any | |
11469 | diagnostic here, dont't make it fail because of this for now. */ | |
11470 | as_warn ("Cannot express %s%d%s relocation", type, width, suffix); | |
11471 | return r_type; | |
11472 | } | |
800eeca4 JW |
11473 | } |
11474 | ||
11475 | /* Here is where generate the appropriate reloc for pseudo relocation | |
11476 | functions. */ | |
11477 | void | |
11478 | ia64_validate_fix (fix) | |
11479 | fixS *fix; | |
11480 | { | |
11481 | switch (fix->fx_r_type) | |
11482 | { | |
11483 | case BFD_RELOC_IA64_FPTR64I: | |
11484 | case BFD_RELOC_IA64_FPTR32MSB: | |
11485 | case BFD_RELOC_IA64_FPTR64LSB: | |
11486 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
11487 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
11488 | if (fix->fx_offset != 0) | |
11489 | as_bad_where (fix->fx_file, fix->fx_line, | |
11490 | "No addend allowed in @fptr() relocation"); | |
11491 | break; | |
11492 | default: | |
11493 | break; | |
11494 | } | |
800eeca4 JW |
11495 | } |
11496 | ||
11497 | static void | |
11498 | fix_insn (fix, odesc, value) | |
11499 | fixS *fix; | |
11500 | const struct ia64_operand *odesc; | |
11501 | valueT value; | |
11502 | { | |
11503 | bfd_vma insn[3], t0, t1, control_bits; | |
11504 | const char *err; | |
11505 | char *fixpos; | |
11506 | long slot; | |
11507 | ||
11508 | slot = fix->fx_where & 0x3; | |
11509 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
11510 | ||
c67e42c9 | 11511 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
11512 | t0 = bfd_getl64 (fixpos); |
11513 | t1 = bfd_getl64 (fixpos + 8); | |
11514 | control_bits = t0 & 0x1f; | |
11515 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
11516 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
11517 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
11518 | ||
c67e42c9 RH |
11519 | err = NULL; |
11520 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 11521 | { |
c67e42c9 RH |
11522 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
11523 | insn[2] |= (((value & 0x7f) << 13) | |
11524 | | (((value >> 7) & 0x1ff) << 27) | |
11525 | | (((value >> 16) & 0x1f) << 22) | |
11526 | | (((value >> 21) & 0x1) << 21) | |
11527 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 11528 | } |
c67e42c9 RH |
11529 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
11530 | { | |
11531 | if (value & ~0x3fffffffffffffffULL) | |
11532 | err = "integer operand out of range"; | |
11533 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
11534 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
11535 | } | |
11536 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
11537 | { | |
11538 | value >>= 4; | |
11539 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
11540 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
11541 | | (((value >> 0) & 0xfffff) << 13)); | |
11542 | } | |
11543 | else | |
11544 | err = (*odesc->insert) (odesc, value, insn + slot); | |
11545 | ||
11546 | if (err) | |
11547 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
11548 | |
11549 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
11550 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
11551 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
11552 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
11553 | } |
11554 | ||
11555 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
11556 | ignored; perhaps it was once meaningful, but now it is historical. | |
11557 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
11558 | ||
11559 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 11560 | (if possible). */ |
94f592af NC |
11561 | |
11562 | void | |
55cf6793 | 11563 | md_apply_fix (fix, valP, seg) |
800eeca4 | 11564 | fixS *fix; |
40449e9f | 11565 | valueT *valP; |
2434f565 | 11566 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
11567 | { |
11568 | char *fixpos; | |
40449e9f | 11569 | valueT value = *valP; |
800eeca4 JW |
11570 | |
11571 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
11572 | ||
11573 | if (fix->fx_pcrel) | |
11574 | { | |
7b347e43 JB |
11575 | switch (fix->fx_r_type) |
11576 | { | |
11577 | case BFD_RELOC_IA64_PCREL21B: break; | |
11578 | case BFD_RELOC_IA64_PCREL21BI: break; | |
11579 | case BFD_RELOC_IA64_PCREL21F: break; | |
11580 | case BFD_RELOC_IA64_PCREL21M: break; | |
11581 | case BFD_RELOC_IA64_PCREL60B: break; | |
11582 | case BFD_RELOC_IA64_PCREL22: break; | |
11583 | case BFD_RELOC_IA64_PCREL64I: break; | |
11584 | case BFD_RELOC_IA64_PCREL32MSB: break; | |
11585 | case BFD_RELOC_IA64_PCREL32LSB: break; | |
11586 | case BFD_RELOC_IA64_PCREL64MSB: break; | |
11587 | case BFD_RELOC_IA64_PCREL64LSB: break; | |
11588 | default: | |
11589 | fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, | |
11590 | fix->fx_r_type); | |
11591 | break; | |
11592 | } | |
800eeca4 JW |
11593 | } |
11594 | if (fix->fx_addsy) | |
11595 | { | |
00f7efb6 | 11596 | switch (fix->fx_r_type) |
800eeca4 | 11597 | { |
00f7efb6 | 11598 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
11599 | /* This must be a TAG13 or TAG13b operand. There are no external |
11600 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
11601 | as_bad_where (fix->fx_file, fix->fx_line, |
11602 | "%s must have a constant value", | |
11603 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 11604 | fix->fx_done = 1; |
94f592af | 11605 | return; |
00f7efb6 JJ |
11606 | |
11607 | case BFD_RELOC_IA64_TPREL14: | |
11608 | case BFD_RELOC_IA64_TPREL22: | |
11609 | case BFD_RELOC_IA64_TPREL64I: | |
11610 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
11611 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
11612 | case BFD_RELOC_IA64_DTPREL14: | |
11613 | case BFD_RELOC_IA64_DTPREL22: | |
11614 | case BFD_RELOC_IA64_DTPREL64I: | |
11615 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
11616 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
11617 | break; | |
7925dd68 JJ |
11618 | |
11619 | default: | |
11620 | break; | |
800eeca4 | 11621 | } |
800eeca4 JW |
11622 | } |
11623 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
11624 | { | |
11625 | if (fix->tc_fix_data.bigendian) | |
11626 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
11627 | else | |
11628 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
11629 | fix->fx_done = 1; | |
800eeca4 JW |
11630 | } |
11631 | else | |
11632 | { | |
11633 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
11634 | fix->fx_done = 1; | |
800eeca4 | 11635 | } |
800eeca4 JW |
11636 | } |
11637 | ||
11638 | /* Generate the BFD reloc to be stuck in the object file from the | |
11639 | fixup used internally in the assembler. */ | |
542d6675 KH |
11640 | |
11641 | arelent * | |
800eeca4 | 11642 | tc_gen_reloc (sec, fixp) |
2434f565 | 11643 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
11644 | fixS *fixp; |
11645 | { | |
11646 | arelent *reloc; | |
11647 | ||
11648 | reloc = xmalloc (sizeof (*reloc)); | |
11649 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
11650 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
11651 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
11652 | reloc->addend = fixp->fx_offset; | |
11653 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
11654 | ||
11655 | if (!reloc->howto) | |
11656 | { | |
11657 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
11658 | "Cannot represent %s relocation in object file", | |
11659 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
11660 | } | |
11661 | return reloc; | |
11662 | } | |
11663 | ||
11664 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
11665 | of type TYPE, and store the appropriate bytes in *LIT. The number |
11666 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
11667 | returned, or NULL on OK. */ |
11668 | ||
11669 | #define MAX_LITTLENUMS 5 | |
11670 | ||
542d6675 | 11671 | char * |
800eeca4 JW |
11672 | md_atof (type, lit, size) |
11673 | int type; | |
11674 | char *lit; | |
11675 | int *size; | |
11676 | { | |
11677 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
11678 | char *t; |
11679 | int prec; | |
11680 | ||
11681 | switch (type) | |
11682 | { | |
11683 | /* IEEE floats */ | |
11684 | case 'f': | |
11685 | case 'F': | |
11686 | case 's': | |
11687 | case 'S': | |
11688 | prec = 2; | |
11689 | break; | |
11690 | ||
11691 | case 'd': | |
11692 | case 'D': | |
11693 | case 'r': | |
11694 | case 'R': | |
11695 | prec = 4; | |
11696 | break; | |
11697 | ||
11698 | case 'x': | |
11699 | case 'X': | |
11700 | case 'p': | |
11701 | case 'P': | |
11702 | prec = 5; | |
11703 | break; | |
11704 | ||
11705 | default: | |
11706 | *size = 0; | |
11707 | return "Bad call to MD_ATOF()"; | |
11708 | } | |
11709 | t = atof_ieee (input_line_pointer, type, words); | |
11710 | if (t) | |
11711 | input_line_pointer = t; | |
800eeca4 | 11712 | |
10a98291 L |
11713 | (*ia64_float_to_chars) (lit, words, prec); |
11714 | ||
165a7f90 L |
11715 | if (type == 'X') |
11716 | { | |
11717 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 11718 | memset (&lit [10], 0, 6); |
165a7f90 L |
11719 | *size = 8 * sizeof (LITTLENUM_TYPE); |
11720 | } | |
10a98291 L |
11721 | else |
11722 | *size = prec * sizeof (LITTLENUM_TYPE); | |
11723 | ||
800eeca4 JW |
11724 | return 0; |
11725 | } | |
11726 | ||
800eeca4 JW |
11727 | /* Handle ia64 specific semantics of the align directive. */ |
11728 | ||
0a9ef439 | 11729 | void |
800eeca4 | 11730 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
11731 | int n ATTRIBUTE_UNUSED; |
11732 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 11733 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 11734 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 11735 | { |
0a9ef439 | 11736 | if (subseg_text_p (now_seg)) |
800eeca4 | 11737 | ia64_flush_insns (); |
0a9ef439 | 11738 | } |
800eeca4 | 11739 | |
0a9ef439 RH |
11740 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
11741 | of an rs_align_code fragment. */ | |
800eeca4 | 11742 | |
0a9ef439 RH |
11743 | void |
11744 | ia64_handle_align (fragp) | |
11745 | fragS *fragp; | |
11746 | { | |
0a9ef439 RH |
11747 | int bytes; |
11748 | char *p; | |
9545c4ce | 11749 | const unsigned char *nop; |
0a9ef439 RH |
11750 | |
11751 | if (fragp->fr_type != rs_align_code) | |
11752 | return; | |
11753 | ||
9545c4ce L |
11754 | /* Check if this frag has to end with a stop bit. */ |
11755 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
11756 | ||
0a9ef439 RH |
11757 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
11758 | p = fragp->fr_literal + fragp->fr_fix; | |
11759 | ||
d9201763 L |
11760 | /* If no paddings are needed, we check if we need a stop bit. */ |
11761 | if (!bytes && fragp->tc_frag_data) | |
11762 | { | |
11763 | if (fragp->fr_fix < 16) | |
bae25f19 L |
11764 | #if 1 |
11765 | /* FIXME: It won't work with | |
11766 | .align 16 | |
11767 | alloc r32=ar.pfs,1,2,4,0 | |
11768 | */ | |
11769 | ; | |
11770 | #else | |
d9201763 L |
11771 | as_bad_where (fragp->fr_file, fragp->fr_line, |
11772 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 11773 | #endif |
d9201763 L |
11774 | else |
11775 | /* Bundles are always in little-endian byte order. Make sure | |
11776 | the previous bundle has the stop bit. */ | |
11777 | *(p - 16) |= 1; | |
11778 | } | |
11779 | ||
0a9ef439 RH |
11780 | /* Make sure we are on a 16-byte boundary, in case someone has been |
11781 | putting data into a text section. */ | |
11782 | if (bytes & 15) | |
11783 | { | |
11784 | int fix = bytes & 15; | |
11785 | memset (p, 0, fix); | |
11786 | p += fix; | |
11787 | bytes -= fix; | |
11788 | fragp->fr_fix += fix; | |
800eeca4 JW |
11789 | } |
11790 | ||
012a452b | 11791 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11792 | memcpy (p, nop, 16); |
0a9ef439 | 11793 | fragp->fr_var = 16; |
800eeca4 | 11794 | } |
10a98291 L |
11795 | |
11796 | static void | |
11797 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11798 | int prec) | |
11799 | { | |
11800 | while (prec--) | |
11801 | { | |
11802 | number_to_chars_bigendian (lit, (long) (*words++), | |
11803 | sizeof (LITTLENUM_TYPE)); | |
11804 | lit += sizeof (LITTLENUM_TYPE); | |
11805 | } | |
11806 | } | |
11807 | ||
11808 | static void | |
11809 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11810 | int prec) | |
11811 | { | |
11812 | while (prec--) | |
11813 | { | |
11814 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11815 | sizeof (LITTLENUM_TYPE)); | |
11816 | lit += sizeof (LITTLENUM_TYPE); | |
11817 | } | |
11818 | } | |
11819 | ||
11820 | void | |
11821 | ia64_elf_section_change_hook (void) | |
11822 | { | |
38ce5b11 L |
11823 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11824 | && elf_linked_to_section (now_seg) == NULL) | |
11825 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11826 | dot_byteorder (-1); |
11827 | } | |
a645d1eb L |
11828 | |
11829 | /* Check if a label should be made global. */ | |
11830 | void | |
11831 | ia64_check_label (symbolS *label) | |
11832 | { | |
11833 | if (*input_line_pointer == ':') | |
11834 | { | |
11835 | S_SET_EXTERNAL (label); | |
11836 | input_line_pointer++; | |
11837 | } | |
11838 | } | |
35f5df7f L |
11839 | |
11840 | /* Used to remember where .alias and .secalias directives are seen. We | |
11841 | will rename symbol and section names when we are about to output | |
11842 | the relocatable file. */ | |
11843 | struct alias | |
11844 | { | |
11845 | char *file; /* The file where the directive is seen. */ | |
11846 | unsigned int line; /* The line number the directive is at. */ | |
11847 | const char *name; /* The orignale name of the symbol. */ | |
11848 | }; | |
11849 | ||
11850 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11851 | .secalias. Otherwise, it is .alias. */ | |
11852 | static void | |
11853 | dot_alias (int section) | |
11854 | { | |
11855 | char *name, *alias; | |
11856 | char delim; | |
11857 | char *end_name; | |
11858 | int len; | |
11859 | const char *error_string; | |
11860 | struct alias *h; | |
11861 | const char *a; | |
11862 | struct hash_control *ahash, *nhash; | |
11863 | const char *kind; | |
11864 | ||
11865 | name = input_line_pointer; | |
11866 | delim = get_symbol_end (); | |
11867 | end_name = input_line_pointer; | |
11868 | *end_name = delim; | |
11869 | ||
11870 | if (name == end_name) | |
11871 | { | |
11872 | as_bad (_("expected symbol name")); | |
e4e8248d | 11873 | ignore_rest_of_line (); |
35f5df7f L |
11874 | return; |
11875 | } | |
11876 | ||
11877 | SKIP_WHITESPACE (); | |
11878 | ||
11879 | if (*input_line_pointer != ',') | |
11880 | { | |
11881 | *end_name = 0; | |
11882 | as_bad (_("expected comma after \"%s\""), name); | |
11883 | *end_name = delim; | |
11884 | ignore_rest_of_line (); | |
11885 | return; | |
11886 | } | |
11887 | ||
11888 | input_line_pointer++; | |
11889 | *end_name = 0; | |
20b36a95 | 11890 | ia64_canonicalize_symbol_name (name); |
35f5df7f L |
11891 | |
11892 | /* We call demand_copy_C_string to check if alias string is valid. | |
11893 | There should be a closing `"' and no `\0' in the string. */ | |
11894 | alias = demand_copy_C_string (&len); | |
11895 | if (alias == NULL) | |
11896 | { | |
11897 | ignore_rest_of_line (); | |
11898 | return; | |
11899 | } | |
11900 | ||
11901 | /* Make a copy of name string. */ | |
11902 | len = strlen (name) + 1; | |
11903 | obstack_grow (¬es, name, len); | |
11904 | name = obstack_finish (¬es); | |
11905 | ||
11906 | if (section) | |
11907 | { | |
11908 | kind = "section"; | |
11909 | ahash = secalias_hash; | |
11910 | nhash = secalias_name_hash; | |
11911 | } | |
11912 | else | |
11913 | { | |
11914 | kind = "symbol"; | |
11915 | ahash = alias_hash; | |
11916 | nhash = alias_name_hash; | |
11917 | } | |
11918 | ||
11919 | /* Check if alias has been used before. */ | |
11920 | h = (struct alias *) hash_find (ahash, alias); | |
11921 | if (h) | |
11922 | { | |
11923 | if (strcmp (h->name, name)) | |
11924 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11925 | alias, kind, h->name); | |
11926 | goto out; | |
11927 | } | |
11928 | ||
11929 | /* Check if name already has an alias. */ | |
11930 | a = (const char *) hash_find (nhash, name); | |
11931 | if (a) | |
11932 | { | |
11933 | if (strcmp (a, alias)) | |
11934 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11935 | goto out; | |
11936 | } | |
11937 | ||
11938 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11939 | as_where (&h->file, &h->line); | |
11940 | h->name = name; | |
11941 | ||
11942 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11943 | if (error_string) | |
11944 | { | |
11945 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11946 | alias, kind, error_string); | |
11947 | goto out; | |
11948 | } | |
11949 | ||
11950 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11951 | if (error_string) | |
11952 | { | |
11953 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11954 | alias, kind, error_string); | |
11955 | out: | |
11956 | obstack_free (¬es, name); | |
11957 | obstack_free (¬es, alias); | |
11958 | } | |
11959 | ||
11960 | demand_empty_rest_of_line (); | |
11961 | } | |
11962 | ||
11963 | /* It renames the original symbol name to its alias. */ | |
11964 | static void | |
11965 | do_alias (const char *alias, PTR value) | |
11966 | { | |
11967 | struct alias *h = (struct alias *) value; | |
11968 | symbolS *sym = symbol_find (h->name); | |
11969 | ||
11970 | if (sym == NULL) | |
11971 | as_warn_where (h->file, h->line, | |
11972 | _("symbol `%s' aliased to `%s' is not used"), | |
11973 | h->name, alias); | |
11974 | else | |
11975 | S_SET_NAME (sym, (char *) alias); | |
11976 | } | |
11977 | ||
11978 | /* Called from write_object_file. */ | |
11979 | void | |
11980 | ia64_adjust_symtab (void) | |
11981 | { | |
11982 | hash_traverse (alias_hash, do_alias); | |
11983 | } | |
11984 | ||
11985 | /* It renames the original section name to its alias. */ | |
11986 | static void | |
11987 | do_secalias (const char *alias, PTR value) | |
11988 | { | |
11989 | struct alias *h = (struct alias *) value; | |
11990 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11991 | ||
11992 | if (sec == NULL) | |
11993 | as_warn_where (h->file, h->line, | |
11994 | _("section `%s' aliased to `%s' is not used"), | |
11995 | h->name, alias); | |
11996 | else | |
11997 | sec->name = alias; | |
11998 | } | |
11999 | ||
12000 | /* Called from write_object_file. */ | |
12001 | void | |
12002 | ia64_frob_file (void) | |
12003 | { | |
12004 | hash_traverse (secalias_hash, do_secalias); | |
12005 | } |