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* doc/gdb.texinfo (appendix "Installing GDB"): changes in configure.
[deliverable/binutils-gdb.git] / gas / config / tc-m68k.c
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fecd2382
RP		 1/* m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3 Copyright (C) 1987, 1991 Free Software Foundation, Inc.
4
5This file is part of GAS, the GNU Assembler.
6
7GAS is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
f6e504fe 9the Free Software Foundation; either version 2, or (at your option)
fecd2382
RP		 10any later version.
11
12GAS is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GAS; see the file COPYING. If not, write to
19the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20
21#include <ctype.h>
22
23#include "as.h"
24
25#include "obstack.h"
26
27 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
28#include "m68k-opcode.h"
f6e504fe
RP		 29#ifdef TE_SUN
30/* This variable contains the value to write out at the beginning of
31 the a.out file. The 2<<16 means that this is a 68020 file instead
32 of an old-style 68000 file */
33
34long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
35#else
36long omagic = OMAGIC;
37#endif
fecd2382
RP		 38
39/* This array holds the chars that always start a comment. If the
40 pre-processor is disabled, these aren't very useful */
41const char comment_chars[] = "|";
42
43/* This array holds the chars that only start a comment at the beginning of
44 a line. If the line seems to have the form '# 123 filename'
45 .line and .file directives will appear in the pre-processed output */
46/* Note that input_file.c hand checks for '#' at the beginning of the
47 first line of the input file. This is because the compiler outputs
48 #NO_APP at the beginning of its output. */
49/* Also note that comments like this one will always work. */
50const char line_comment_chars[] = "#";
51
52/* Chars that can be used to separate mant from exp in floating point nums */
53const char EXP_CHARS[] = "eE";
54
55/* Chars that mean this number is a floating point constant */
56/* As in 0f12.456 */
57/* or 0d1.2345e12 */
58
59const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
60
61/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
62 changed in read.c . Ideally it shouldn't have to know about it at all,
63 but nothing is ideal around here.
64 */
65
66int md_reloc_size = 8; /* Size of relocation record */
67
68/* Its an arbitrary name: This means I don't approve of it */
69/* See flames below */
70static struct obstack robyn;
71
72#define TAB(x,y) (((x)<<2)+(y))
73#define TABTYPE(xy) ((xy) >> 2)
74#define BYTE 0
75#define SHORT 1
76#define LONG 2
77#define SZ_UNDEF 3
78
79#define BRANCH 1
80#define FBRANCH 2
81#define PCREL 3
82#define BCC68000 4
83#define DBCC 5
84#define PCLEA 6
85
f6e504fe
RP		 86/* Operands we can parse: (And associated modes)
87
88numb: 8 bit num
89numw: 16 bit num
90numl: 32 bit num
91dreg: data reg 0-7
92reg: address or data register
93areg: address register
94apc: address register, PC, ZPC or empty string
95num: 16 or 32 bit num
96num2: like num
97sz: w or l if omitted, l assumed
98scale: 1 2 4 or 8 if omitted, 1 assumed
99
1007.4 IMMED #num --> NUM
1010.? DREG dreg --> dreg
1021.? AREG areg --> areg
1032.? AINDR areg@ --> *(areg)
1043.? AINC areg@+ --> *(areg++)
1054.? ADEC areg@- --> *(--areg)
1065.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
1076.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
1086.? AINDX apc@(reg:sz:scale) --> same, with num=0
1096.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
1106.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
1116.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
1126.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
1136.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
1147.0 ABSL num:sz --> *(num)
115 num --> *(num) (sz L assumed)
116*** MSCR otherreg --> Magic
117With -l option
1185.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
119
120examples:
121 #foo #0x35 #12
122 d2
123 a4
124 a3@
125 a5@+
126 a6@-
127 a2@(12) pc@(14)
128 a1@(5,d2:w:1) @(45,d6:l:4)
129 pc@(a2) @(d4)
130 etc . . .
131
132
133#name@(numw) -->turn into PC rel mode
134apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
135
136*/
137
138enum operand_type {
139 IMMED = 1,
140 DREG,
141 AREG,
142 AINDR,
143 ADEC,
144 AINC,
145 AOFF,
146 AINDX,
147 APODX,
148 AMIND,
149 APRDX,
150 ABSL,
151 MSCR,
152 REGLST,
153};
154
155
fecd2382
RP		 156struct m68k_exp {
157 char *e_beg;
158 char *e_end;
159 expressionS e_exp;
160 short e_siz; /* 0== default 1==short/byte 2==word 3==long */
161};
162
163/* Internal form of an operand. */
164struct m68k_op {
165 char *error; /* Couldn't parse it */
f6e504fe 166 enum operand_type mode; /* What mode this instruction is in. */
fecd2382
RP		 167 unsigned long reg; /* Base register */
168 struct m68k_exp *con1;
169 int ireg; /* Index register */
170 int isiz; /* 0==unspec 1==byte(?) 2==short 3==long */
171 int imul; /* Multipy ireg by this (1,2,4,or 8) */
172 struct m68k_exp *con2;
173};
174
175/* internal form of a 68020 instruction */
176struct m68_it {
177 char *error;
178 char *args; /* list of opcode info */
179 int numargs;
180
181 int numo; /* Number of shorts in opcode */
182 short opcode[11];
183
184 struct m68k_op operands[6];
185
186 int nexp; /* number of exprs in use */
187 struct m68k_exp exprs[4];
188
189 int nfrag; /* Number of frags we have to produce */
190 struct {
191 int fragoff; /* Where in the current opcode[] the frag ends */
192 symbolS *fadd;
193 long foff;
194 int fragty;
195 } fragb[4];
196
197 int nrel; /* Num of reloc strucs in use */
198 struct {
199 int n;
200 symbolS *add,
201 *sub;
202 long off;
203 char wid;
204 char pcrel;
205 } reloc[5]; /* Five is enough??? */
206};
207
208struct m68_it the_ins; /* the instruction being assembled */
209
210
211/* Macros for adding things to the m68_it struct */
212
213#define addword(w) the_ins.opcode[the_ins.numo++]=(w)
214
215/* Like addword, but goes BEFORE general operands */
216#define insop(w) {int z;\
217 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
218 the_ins.opcode[z]=the_ins.opcode[z-1];\
219 for(z=0;z<the_ins.nrel;z++)\
220 the_ins.reloc[z].n+=2;\
221 the_ins.opcode[opcode->m_codenum]=w;\
222 the_ins.numo++;\
223}
224
225
226#define add_exp(beg,end) (\
227 the_ins.exprs[the_ins.nexp].e_beg=beg,\
228 the_ins.exprs[the_ins.nexp].e_end=end,\
229 &the_ins.exprs[the_ins.nexp++]\
230)
231
232
233/* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
234#define add_fix(width,exp,pc_rel) {\
235 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
236 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
237 the_ins.reloc[the_ins.nrel].add=adds((exp));\
238 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
239 the_ins.reloc[the_ins.nrel].off=offs((exp));\
240 the_ins.reloc[the_ins.nrel].wid=width;\
241 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
242}
243
244#define add_frag(add,off,type) {\
245 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
246 the_ins.fragb[the_ins.nfrag].fadd=add;\
247 the_ins.fragb[the_ins.nfrag].foff=off;\
248 the_ins.fragb[the_ins.nfrag++].fragty=type;\
249}
250
251#define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
252
253#define seg(exp) ((exp)->e_exp.X_seg)
254#define adds(exp) ((exp)->e_exp.X_add_symbol)
255#define subs(exp) ((exp)->e_exp.X_subtract_symbol)
256#define offs(exp) ((exp)->e_exp.X_add_number)
257
258
259struct m68_incant {
260 char *m_operands;
261 unsigned long m_opcode;
262 short m_opnum;
263 short m_codenum;
264 struct m68_incant *m_next;
265};
266
267#define getone(x) ((((x)->m_opcode)>>16)&0xffff)
268#define gettwo(x) (((x)->m_opcode)&0xffff)
269
270
271#ifdef __STDC__
272
273static char *crack_operand(char *str, struct m68k_op *opP);
274static int get_num(struct m68k_exp *exp, int ok);
275static int get_regs(int i, char *str, struct m68k_op *opP);
276static int reverse_16_bits(int in);
277static int reverse_8_bits(int in);
278static int try_index(char **s, struct m68k_op *opP);
279static void install_gen_operand(int mode, int val);
280static void install_operand(int mode, int val);
281static void s_bss(void);
282static void s_data1(void);
283static void s_data2(void);
284static void s_even(void);
285static void s_proc(void);
286
287#else /* __STDC__ */
288
289static char *crack_operand();
290static int get_num();
291static int get_regs();
292static int reverse_16_bits();
293static int reverse_8_bits();
294static int try_index();
295static void install_gen_operand();
296static void install_operand();
297static void s_bss();
298static void s_data1();
299static void s_data2();
300static void s_even();
301static void s_proc();
302
303#endif /* __STDC__ */
304
305/* BCC68000 is for patching in an extra jmp instruction for long offsets
306 on the 68000. The 68000 doesn't support long branches with branchs */
307
308/* This table desribes how you change sizes for the various types of variable
309 size expressions. This version only supports two kinds. */
310
311/* Note that calls to frag_var need to specify the maximum expansion needed */
312/* This is currently 10 bytes for DBCC */
313
314/* The fields are:
315 How far Forward this mode will reach:
316 How far Backward this mode will reach:
317 How many bytes this mode will add to the size of the frag
318 Which mode to go to if the offset won't fit in this one
319 */
320const relax_typeS
321md_relax_table[] = {
322{ 1, 1, 0, 0 }, /* First entries aren't used */
323{ 1, 1, 0, 0 }, /* For no good reason except */
324{ 1, 1, 0, 0 }, /* that the VAX doesn't either */
325{ 1, 1, 0, 0 },
326
327{ (127), (-128), 0, TAB(BRANCH,SHORT)},
328{ (32767), (-32768), 2, TAB(BRANCH,LONG) },
329{ 0, 0, 4, 0 },
330{ 1, 1, 0, 0 },
331
332{ 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
333{ (32767), (-32768), 2, TAB(FBRANCH,LONG)},
334{ 0, 0, 4, 0 },
335{ 1, 1, 0, 0 },
336
337{ 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
338{ (32767), (-32768), 2, TAB(PCREL,LONG)},
339{ 0, 0, 4, 0 },
340{ 1, 1, 0, 0 },
341
342{ (127), (-128), 0, TAB(BCC68000,SHORT)},
343{ (32767), (-32768), 2, TAB(BCC68000,LONG) },
344{ 0, 0, 6, 0 }, /* jmp long space */
345{ 1, 1, 0, 0 },
346
347{ 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
348{ (32767), (-32768), 2, TAB(DBCC,LONG) },
349{ 0, 0, 10, 0 }, /* bra/jmp long space */
350{ 1, 1, 0, 0 },
351
352{ 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
353{ 32767, -32768, 2, TAB(PCLEA,LONG) },
354{ 0, 0, 6, 0 },
355{ 1, 1, 0, 0 },
356
357};
358
359/* These are the machine dependent pseudo-ops. These are included so
360 the assembler can work on the output from the SUN C compiler, which
361 generates these.
362 */
363
364/* This table describes all the machine specific pseudo-ops the assembler
365 has to support. The fields are:
366 pseudo-op name without dot
367 function to call to execute this pseudo-op
368 Integer arg to pass to the function
369 */
370const pseudo_typeS md_pseudo_table[] = {
371 { "data1", s_data1, 0 },
372 { "data2", s_data2, 0 },
373 { "bss", s_bss, 0 },
374 { "even", s_even, 0 },
375 { "skip", s_space, 0 },
376 { "proc", s_proc, 0 },
377 { 0, 0, 0 }
378};
379
380
381/* #define isbyte(x) ((x)>=-128 && (x)<=127) */
382/* #define isword(x) ((x)>=-32768 && (x)<=32767) */
383
384#define issbyte(x) ((x)>=-128 && (x)<=127)
385#define isubyte(x) ((x)>=0 && (x)<=255)
386#define issword(x) ((x)>=-32768 && (x)<=32767)
387#define isuword(x) ((x)>=0 && (x)<=65535)
388
389#define isbyte(x) ((x)>=-128 && (x)<=255)
390#define isword(x) ((x)>=-32768 && (x)<=65535)
391#define islong(x) (1)
392
393extern char *input_line_pointer;
394
fecd2382
RP		 395#define FAIL 0
396#define OK 1
397
398/* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
399 8-15==addr reg for operands that take both types */
400#define DATA 1 /* 1- 8 == data registers 0-7 */
401#define ADDR (DATA+8) /* 9-16 == address regs 0-7 */
402#define FPREG (ADDR+8) /* 17-24 Eight FP registers */
403#define COPNUM (FPREG+8) /* 25-32 Co-processor #1-#8 */
404
405#define PC (COPNUM+8) /* 33 Program counter */
406#define ZPC (PC+1) /* 34 Hack for Program space, but 0 addressing */
407#define SR (ZPC+1) /* 35 Status Reg */
408#define CCR (SR+1) /* 36 Condition code Reg */
409
410/* These have to be in order for the movec instruction to work. */
411#define USP (CCR+1) /* 37 User Stack Pointer */
412#define ISP (USP+1) /* 38 Interrupt stack pointer */
413#define SFC (ISP+1) /* 39 */
414#define DFC (SFC+1) /* 40 */
415#define CACR (DFC+1) /* 41 */
416#define VBR (CACR+1) /* 42 */
417#define CAAR (VBR+1) /* 43 */
418#define MSP (CAAR+1) /* 44 */
419
420#define FPI (MSP+1) /* 45 */
421#define FPS (FPI+1) /* 46 */
422#define FPC (FPS+1) /* 47 */
423/*
424 * these defines should be in m68k.c but
425 * i put them here to keep all the m68851 stuff
426 * together -rab
427 * JF--Make sure these #s don't clash with the ones in m68k.c
428 * That would be BAD.
429 */
430#define TC (FPC+1) /* 48 */
431#define DRP (TC+1) /* 49 */
432#define SRP (DRP+1) /* 50 */
433#define CRP (SRP+1) /* 51 */
434#define CAL (CRP+1) /* 52 */
435#define VAL (CAL+1) /* 53 */
436#define SCC (VAL+1) /* 54 */
437#define AC (SCC+1) /* 55 */
438#define BAD (AC+1) /* 56,57,58,59, 60,61,62,63 */
439#define BAC (BAD+8) /* 64,65,66,67, 68,69,70,71 */
440#define PSR (BAC+8) /* 72 */
441#define PCSR (PSR+1) /* 73 */
442
443
444/* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
445/* I think. . . */
446
447#define SP ADDR+7
448
449/* JF these tables here are for speed at the expense of size */
450/* You can replace them with the #if 0 versions if you really
451 need space and don't mind it running a bit slower */
452
453static char mklower_table[256];
454#define mklower(c) (mklower_table[(unsigned char)(c)])
455static char notend_table[256];
456static char alt_notend_table[256];
457#define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
458 alt_notend_table[(unsigned char)(s[1])])))
459
460#if 0
461#define mklower(c) (isupper(c) ? tolower(c) : c)
462#endif
463
464
465/* JF modified this to handle cases where the first part of a symbol name
466 looks like a register */
467
468int
469m68k_reg_parse(ccp)
470register char **ccp;
471{
472 register char c1,
473 c2,
474 c3,
475 c4;
476 register int n = 0,
477 ret = FAIL;
478
479 c1=mklower(ccp[0][0]);
480#ifdef REGISTER_PREFIX
481 if(c1!=REGISTER_PREFIX)
482 return FAIL;
483 c1=mklower(ccp[0][1]);
484 c2=mklower(ccp[0][2]);
485 c3=mklower(ccp[0][3]);
486 c4=mklower(ccp[0][4]);
487#else
488 c2=mklower(ccp[0][1]);
489 c3=mklower(ccp[0][2]);
490 c4=mklower(ccp[0][3]);
491#endif
492 switch(c1) {
493 case 'a':
494 if(c2>='0' && c2<='7') {
495 n=2;
496 ret=ADDR+c2-'0';
497 }
498#ifdef m68851
499 else if (c2 == 'c') {
500 n = 2;
501 ret = AC;
502 }
503#endif
504 break;
505#ifdef m68851
506 case 'b':
507 if (c2 == 'a') {
508 if (c3 == 'd') {
509 if (c4 >= '0' && c4 <= '7') {
510 n = 4;
511 ret = BAD + c4 - '0';
512 }
513 }
514 if (c3 == 'c') {
515 if (c4 >= '0' && c4 <= '7') {
516 n = 4;
517 ret = BAC + c4 - '0';
518 }
519 }
520 }
521 break;
522#endif
523 case 'c':
524#ifdef m68851
525 if (c2 == 'a' && c3 == 'l') {
526 n = 3;
527 ret = CAL;
528 } else
529#endif
530 /* This supports both CCR and CC as the ccr reg. */
531 if(c2=='c' && c3=='r') {
532 n=3;
533 ret = CCR;
534 } else if(c2=='c') {
535 n=2;
536 ret = CCR;
537 } else if(c2=='a' && (c3=='a' || c3=='c') && c4=='r') {
538 n=4;
539 ret = c3=='a' ? CAAR : CACR;
540 }
541#ifdef m68851
542 else if (c2 == 'r' && c3 == 'p') {
543 n = 3;
544 ret = (CRP);
545 }
546#endif
547 break;
548 case 'd':
549 if(c2>='0' && c2<='7') {
550 n=2;
551 ret = DATA+c2-'0';
552 } else if(c2=='f' && c3=='c') {
553 n=3;
554 ret = DFC;
555 }
556#ifdef m68851
557 else if (c2 == 'r' && c3 == 'p') {
558 n = 3;
559 ret = (DRP);
560 }
561#endif
562 break;
563 case 'f':
564 if(c2=='p') {
565 if(c3>='0' && c3<='7') {
566 n=3;
567 ret = FPREG+c3-'0';
568 if(c4==':')
569 ccp[0][3]=',';
570 } else if(c3=='i') {
571 n=3;
572 ret = FPI;
573 } else if(c3=='s') {
574 n= (c4 == 'r' ? 4 : 3);
575 ret = FPS;
576 } else if(c3=='c') {
577 n= (c4 == 'r' ? 4 : 3);
578 ret = FPC;
579 }
580 }
581 break;
582 case 'i':
583 if(c2=='s' && c3=='p') {
584 n=3;
585 ret = ISP;
586 }
587 break;
588 case 'm':
589 if(c2=='s' && c3=='p') {
590 n=3;
591 ret = MSP;
592 }
593 break;
594 case 'p':
595 if(c2=='c') {
596#ifdef m68851
597 if(c3 == 's' && c4=='r') {
598 n=4;
599 ret = (PCSR);
600 } else
601#endif
602 {
603 n=2;
604 ret = PC;
605 }
606 }
607#ifdef m68851
608 else if (c2 == 's' && c3 == 'r') {
609 n = 3;
610 ret = (PSR);
611 }
612#endif
613 break;
614 case 's':
615#ifdef m68851
616 if (c2 == 'c' && c3 == 'c') {
617 n = 3;
618 ret = (SCC);
619 } else if (c2 == 'r' && c3 == 'p') {
620 n = 3;
621 ret = (SRP);
622 } else
623#endif
624 if(c2=='r') {
625 n=2;
626 ret = SR;
627 } else if(c2=='p') {
628 n=2;
629 ret = ADDR+7;
630 } else if(c2=='f' && c3=='c') {
631 n=3;
632 ret = SFC;
633 }
634 break;
635#ifdef m68851
636 case 't':
637 if(c2 == 'c') {
638 n=2;
639 ret=TC;
640 }
641 break;
642#endif
643 case 'u':
644 if(c2=='s' && c3=='p') {
645 n=3;
646 ret = USP;
647 }
648 break;
649 case 'v':
650#ifdef m68851
651 if (c2 == 'a' && c3 == 'l') {
652 n = 3;
653 ret = (VAL);
654 } else
655#endif
656 if(c2=='b' && c3=='r') {
657 n=3;
658 ret = VBR;
659 }
660 break;
661 case 'z':
662 if(c2=='p' && c3=='c') {
663 n=3;
664 ret = ZPC;
665 }
666 break;
667 default:
668 break;
669 }
670 if(n) {
671#ifdef REGISTER_PREFIX
672 n++;
673#endif
674 if(isalnum(ccp[0][n]) || ccp[0][n]=='_')
675 ret=FAIL;
676 else
677 ccp[0]+=n;
678 } else
679 ret = FAIL;
680 return ret;
681}
682
683#define SKIP_WHITE() { str++; if(*str==' ') str++;}
684
685int
686m68k_ip_op(str,opP)
687char *str;
688register struct m68k_op *opP;
689{
690 char *strend;
691 long i;
f6e504fe 692 char *parse_index();
fecd2382
RP		 693
694 if(*str==' ')
695 str++;
696 /* Find the end of the string */
697 if(!*str) {
698 /* Out of gas */
699 opP->error="Missing operand";
700 return FAIL;
701 }
702 for(strend=str;*strend;strend++)
703 ;
704 --strend;
705
706 /* Guess what: A constant. Shar and enjoy */
707 if(*str=='#') {
708 str++;
709 opP->con1=add_exp(str,strend);
710 opP->mode=IMMED;
711 return OK;
712 }
713 i=m68k_reg_parse(&str);
714 if((i==FAIL || *str!='\0') && *str!='@') {
715 char *stmp;
716
717 if(i!=FAIL && (*str=='/' || *str=='-')) {
718 opP->mode=REGLST;
719 return get_regs(i,str,opP);
720 }
f6e504fe 721 if ((stmp=strchr(str,'@')) != '\0') {
fecd2382
RP		 722 opP->con1=add_exp(str,stmp-1);
723 if(stmp==strend) {
724 opP->mode=AINDX;
725 return OK;
726 }
727 stmp++;
728 if(*stmp++!='(' || *strend--!=')') {
729 opP->error="Malformed operand";
730 return FAIL;
731 }
732 i=try_index(&stmp,opP);
733 opP->con2=add_exp(stmp,strend);
734 if(i==FAIL) opP->mode=AMIND;
735 else opP->mode=APODX;
736 return OK;
737 }
738 opP->mode=ABSL;
739 opP->con1=add_exp(str,strend);
740 return OK;
741 }
742 opP->reg=i;
743 if(*str=='\0') {
744 if(i>=DATA+0 && i<=DATA+7)
745 opP->mode=DREG;
746 else if(i>=ADDR+0 && i<=ADDR+7)
747 opP->mode=AREG;
748 else
749 opP->mode=MSCR;
750 return OK;
751 }
752 if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */
753 opP->error="Invalid indirect register";
754 return FAIL;
755 }
ac1ac0cd
RP		 756 know(*str == '@');
757
fecd2382
RP		 758 str++;
759 switch(*str) {
760 case '\0':
761 opP->mode=AINDR;
762 return OK;
763 case '-':
764 opP->mode=ADEC;
765 return OK;
766 case '+':
767 opP->mode=AINC;
768 return OK;
769 case '(':
770 str++;
771 break;
772 default:
773 opP->error="Junk after indirect";
774 return FAIL;
775 }
776 /* Some kind of indexing involved. Lets find out how bad it is */
777 i=try_index(&str,opP);
778 /* Didn't start with an index reg, maybe its offset or offset,reg */
779 if(i==FAIL) {
780 char *beg_str;
781
782 beg_str=str;
783 for(i=1;i;) {
784 switch(*str++) {
785 case '\0':
786 opP->error="Missing )";
787 return FAIL;
788 case ',': i=0; break;
789 case '(': i++; break;
790 case ')': --i; break;
791 }
792 }
793 /* if(str[-3]==':') {
794 int siz;
795
796 switch(str[-2]) {
797 case 'b':
798 case 'B':
799 siz=1;
800 break;
801 case 'w':
802 case 'W':
803 siz=2;
804 break;
805 case 'l':
806 case 'L':
807 siz=3;
808 break;
809 default:
810 opP->error="Specified size isn't :w or :l";
811 return FAIL;
812 }
813 opP->con1=add_exp(beg_str,str-4);
814 opP->con1->e_siz=siz;
815 } else */
816 opP->con1=add_exp(beg_str,str-2);
817 /* Should be offset,reg */
818 if(str[-1]==',') {
819 i=try_index(&str,opP);
820 if(i==FAIL) {
821 opP->error="Malformed index reg";
822 return FAIL;
823 }
824 }
825 }
826 /* We've now got offset) offset,reg) or reg) */
827
828 if(*str=='\0') {
829 /* Th-the-thats all folks */
830 if(opP->reg==FAIL) opP->mode=AINDX; /* Other form of indirect */
831 else if(opP->ireg==FAIL) opP->mode=AOFF;
832 else opP->mode=AINDX;
833 return OK;
834 }
835 /* Next thing had better be another @ */
836 if(*str!='@' || str[1]!='(') {
837 opP->error="junk after indirect";
838 return FAIL;
839 }
840 str+=2;
841 if(opP->ireg!=FAIL) {
842 opP->mode=APRDX;
843 i=try_index(&str,opP);
844 if(i!=FAIL) {
845 opP->error="Two index registers! not allowed!";
846 return FAIL;
847 }
848 } else
849 i=try_index(&str,opP);
850 if(i==FAIL) {
851 char *beg_str;
852
853 beg_str=str;
854 for(i=1;i;) {
855 switch(*str++) {
856 case '\0':
857 opP->error="Missing )";
858 return FAIL;
859 case ',': i=0; break;
860 case '(': i++; break;
861 case ')': --i; break;
862 }
863 }
864 opP->con2=add_exp(beg_str,str-2);
865 if(str[-1]==',') {
866 if(opP->ireg!=FAIL) {
867 opP->error="Can't have two index regs";
868 return FAIL;
869 }
870 i=try_index(&str,opP);
871 if(i==FAIL) {
872 opP->error="malformed index reg";
873 return FAIL;
874 }
875 opP->mode=APODX;
876 } else if(opP->ireg!=FAIL)
877 opP->mode=APRDX;
878 else
879 opP->mode=AMIND;
880 } else
881 opP->mode=APODX;
882 if(*str!='\0') {
883 opP->error="Junk after indirect";
884 return FAIL;
885 }
886 return OK;
887}
888
889static int try_index(s,opP)
890char **s;
891struct m68k_op *opP;
892{
893 register int i;
894 char *ss;
895#define SKIP_W() { ss++; if(*ss==' ') ss++;}
896
897 ss= *s;
898 /* SKIP_W(); */
899 i=m68k_reg_parse(&ss);
900 if(!(i>=DATA+0 && i<=ADDR+7)) { /* if i is not DATA or ADDR reg */
901 *s=ss;
902 return FAIL;
903 }
904 opP->ireg=i;
905 /* SKIP_W(); */
906 if(*ss==')') {
907 opP->isiz=0;
908 opP->imul=1;
909 SKIP_W();
910 *s=ss;
911 return OK;
912 }
913 if(*ss!=':') {
914 opP->error="Missing : in index register";
915 *s=ss;
916 return FAIL;
917 }
918 SKIP_W();
919 switch(*ss) {
920 case 'w':
921 case 'W':
922 opP->isiz=2;
923 break;
924 case 'l':
925 case 'L':
926 opP->isiz=3;
927 break;
928 default:
929 opP->error="Index register size spec not :w or :l";
930 *s=ss;
931 return FAIL;
932 }
933 SKIP_W();
934 if(*ss==':') {
935 SKIP_W();
936 switch(*ss) {
937 case '1':
938 case '2':
939 case '4':
940 case '8':
941 opP->imul= *ss-'0';
942 break;
943 default:
944 opP->error="index multiplier not 1, 2, 4 or 8";
945 *s=ss;
946 return FAIL;
947 }
948 SKIP_W();
949 } else opP->imul=1;
950 if(*ss!=')') {
951 opP->error="Missing )";
952 *s=ss;
953 return FAIL;
954 }
955 SKIP_W();
956 *s=ss;
957 return OK;
958} /* try_index() */
959
960#ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
961main()
962{
963 char buf[128];
964 struct m68k_op thark;
965
966 for(;;) {
967 if(!gets(buf))
968 break;
969 bzero(&thark,sizeof(thark));
970 if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
971 if(thark.error)
972 printf("op1 error %s in %s\n",thark.error,buf);
973 printf("mode %d, reg %d, ",thark.mode,thark.reg);
974 if(thark.b_const)
975 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
976 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
977 if(thark.b_iadd)
978 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
979 printf("\n");
980 }
981 exit(0);
982}
983
984#endif
985
986
987static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
988 NULL means any use before m68_ip_begin()
989 will crash */
990
991\f
992/*
993 * m 6 8 _ i p ( )
994 *
995 * This converts a string into a 68k instruction.
996 * The string must be a bare single instruction in sun format
997 * with RMS-style 68020 indirects
998 * (example: )
999 *
1000 * It provides some error messages: at most one fatal error message (which
1001 * stops the scan) and at most one warning message for each operand.
1002 * The 68k instruction is returned in exploded form, since we have no
1003 * knowledge of how you parse (or evaluate) your expressions.
1004 * We do however strip off and decode addressing modes and operation
1005 * mnemonic.
1006 *
1007 * This function's value is a string. If it is not "" then an internal
1008 * logic error was found: read this code to assign meaning to the string.
1009 * No argument string should generate such an error string:
1010 * it means a bug in our code, not in the user's text.
1011 *
a79c6033 1012 * You MUST have called m68_ip_begin() once and m86_ip_end() never before using
fecd2382
RP		 1013 * this function.
1014 */
1015
1016/* JF this function no longer returns a useful value. Sorry */
1017void
1018m68_ip (instring)
1019char *instring;
1020{
1021 register char *p;
1022 register struct m68k_op *opP;
1023 register struct m68_incant *opcode;
1024 register char *s;
dd61f09e
RP		 1025 register int tmpreg = 0,
1026 baseo = 0,
1027 outro = 0,
fecd2382
RP		 1028 nextword;
1029 int siz1,
1030 siz2;
1031 char c;
1032 int losing;
1033 int opsfound;
f6e504fe 1034 char *crack_operand();
fecd2382
RP		 1035 LITTLENUM_TYPE words[6];
1036 LITTLENUM_TYPE *wordp;
1037
1038 if (*instring == ' ')
1039 instring++; /* skip leading whitespace */
1040
1041 /* Scan up to end of operation-code, which MUST end in end-of-string
1042 or exactly 1 space. */
1043 for (p = instring; *p != '\0'; p++)
1044 if (*p == ' ')
1045 break;
1046
1047
1048 if (p == instring) {
1049 the_ins.error = "No operator";
f6e504fe 1050 the_ins.opcode[0] = NULL;
fecd2382
RP		 1051 /* the_ins.numo=1; */
1052 return;
1053 }
1054
1055 /* p now points to the end of the opcode name, probably whitespace.
1056 make sure the name is null terminated by clobbering the whitespace,
1057 look it up in the hash table, then fix it back. */
1058 c = *p;
1059 *p = '\0';
1060 opcode = (struct m68_incant *)hash_find (op_hash, instring);
1061 *p = c;
1062
1063 if (opcode == NULL) {
1064 the_ins.error = "Unknown operator";
f6e504fe 1065 the_ins.opcode[0] = NULL;
fecd2382
RP		 1066 /* the_ins.numo=1; */
1067 return;
1068 }
1069
1070 /* found a legitimate opcode, start matching operands */
a79c6033
RP		 1071 while (*p == ' ') ++p;
1072
1073 for(opP = &the_ins.operands[0]; *p; opP++) {
1074
1075 p = crack_operand(p, opP);
1076
1077 if (opP->error) {
fecd2382
RP		 1078 the_ins.error=opP->error;
1079 return;
1080 }
1081 }
1082
1083 opsfound=opP- &the_ins.operands[0];
1084 /* This ugly hack is to support the floating pt opcodes in their standard form */
1085 /* Essentially, we fake a first enty of type COP#1 */
1086 if(opcode->m_operands[0]=='I') {
1087 int n;
1088
1089 for(n=opsfound;n>0;--n)
1090 the_ins.operands[n]=the_ins.operands[n-1];
1091
1092 /* bcopy((char *)(&the_ins.operands[0]),(char *)(&the_ins.operands[1]),opsfound*sizeof(the_ins.operands[0])); */
1093 bzero((char *)(&the_ins.operands[0]),sizeof(the_ins.operands[0]));
1094 the_ins.operands[0].mode=MSCR;
1095 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1096 opsfound++;
1097 }
1098 /* We've got the operands. Find an opcode that'll
1099 accept them */
ac1ac0cd
RP		 1100 for (losing = 0; ; ) {
1101 if (opsfound != opcode->m_opnum)
fecd2382 1102 losing++;
ac1ac0cd 1103 else for (s=opcode->m_operands,opP= &the_ins.operands[0];*s && !losing;s+=2,opP++) {
fecd2382
RP		 1104 /* Warning: this switch is huge! */
1105 /* I've tried to organize the cases into this order:
1106 non-alpha first, then alpha by letter. lower-case goes directly
1107 before uppercase counterpart. */
1108 /* Code with multiple case ...: gets sorted by the lowest case ...
1109 it belongs to. I hope this makes sense. */
1110 switch(*s) {
1111 case '!':
1112 if(opP->mode==MSCR || opP->mode==IMMED ||
1113 opP->mode==DREG || opP->mode==AREG || opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1114 losing++;
1115 break;
1116
1117 case '#':
1118 if(opP->mode!=IMMED)
1119 losing++;
1120 else {
1121 long t;
1122
1123 t=get_num(opP->con1,80);
1124 if(s[1]=='b' && !isbyte(t))
1125 losing++;
1126 else if(s[1]=='w' && !isword(t))
1127 losing++;
1128 }
1129 break;
1130
1131 case '^':
1132 case 'T':
1133 if(opP->mode!=IMMED)
1134 losing++;
1135 break;
1136
1137 case '$':
1138 if(opP->mode==MSCR || opP->mode==AREG ||
1139 opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1140 losing++;
1141 break;
1142
1143 case '%':
1144 if(opP->mode==MSCR || opP->reg==PC ||
1145 opP->reg==ZPC || opP->mode==REGLST)
1146 losing++;
1147 break;
1148
1149
1150 case '&':
1151 if(opP->mode==MSCR || opP->mode==DREG ||
1152 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1153 opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1154 losing++;
1155 break;
1156
1157 case '*':
1158 if(opP->mode==MSCR || opP->mode==REGLST)
1159 losing++;
1160 break;
1161
1162 case '+':
1163 if(opP->mode!=AINC)
1164 losing++;
1165 break;
1166
1167 case '-':
1168 if(opP->mode!=ADEC)
1169 losing++;
1170 break;
1171
1172 case '/':
1173 if(opP->mode==MSCR || opP->mode==AREG ||
1174 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
1175 losing++;
1176 break;
1177
1178 case ';':
1179 if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
1180 losing++;
1181 break;
1182
1183 case '?':
1184 if(opP->mode==MSCR || opP->mode==AREG ||
1185 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1186 opP->reg==ZPC || opP->mode==REGLST)
1187 losing++;
1188 break;
1189
1190 case '@':
1191 if(opP->mode==MSCR || opP->mode==AREG ||
1192 opP->mode==IMMED || opP->mode==REGLST)
1193 losing++;
1194 break;
1195
1196 case '~': /* For now! (JF FOO is this right?) */
1197 if(opP->mode==MSCR || opP->mode==DREG ||
1198 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1199 losing++;
1200 break;
1201
1202 case 'A':
1203 if(opP->mode!=AREG)
1204 losing++;
1205 break;
1206
1207 case 'B': /* FOO */
dd61f09e
RP		 1208 if(opP->mode!=ABSL || (flagseen['S'] && instring[0] == 'j'
1209 && instring[1] == 'b'
1210 && instring[2] == 's'
1211 && instring[3] == 'r'))
fecd2382
RP		 1212 losing++;
1213 break;
1214
1215 case 'C':
1216 if(opP->mode!=MSCR || opP->reg!=CCR)
1217 losing++;
1218 break;
1219
1220 case 'd': /* FOO This mode is a KLUDGE!! */
1221 if(opP->mode!=AOFF && (opP->mode!=ABSL ||
1222 opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
1223 losing++;
1224 break;
1225
1226 case 'D':
1227 if(opP->mode!=DREG)
1228 losing++;
1229 break;
1230
1231 case 'F':
1232 if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1233 losing++;
1234 break;
1235
1236 case 'I':
1237 if(opP->mode!=MSCR || opP->reg<COPNUM ||
1238 opP->reg>=COPNUM+7)
1239 losing++;
1240 break;
1241
1242 case 'J':
1243 if(opP->mode!=MSCR || opP->reg<USP || opP->reg>MSP)
1244 losing++;
1245 break;
1246
1247 case 'k':
1248 if(opP->mode!=IMMED)
1249 losing++;
1250 break;
1251
1252 case 'l':
1253 case 'L':
1254 if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
1255 if(s[1]=='8')
1256 losing++;
1257 else {
1258 opP->mode=REGLST;
1259 opP->reg=1<<(opP->reg-DATA);
1260 }
1261 } else if(opP->mode!=REGLST) {
1262 losing++;
1263 } else if(s[1]=='8' && opP->reg&0x0FFffFF)
1264 losing++;
1265 else if(s[1]=='3' && opP->reg&0x7000000)
1266 losing++;
1267 break;
1268
1269 case 'M':
1270 if(opP->mode!=IMMED)
1271 losing++;
1272 else {
1273 long t;
1274
1275 t=get_num(opP->con1,80);
1276 if(!issbyte(t) || isvar(opP->con1))
1277 losing++;
1278 }
1279 break;
1280
1281 case 'O':
1282 if(opP->mode!=DREG && opP->mode!=IMMED)
1283 losing++;
1284 break;
1285
1286 case 'Q':
1287 if(opP->mode!=IMMED)
1288 losing++;
1289 else {
1290 long t;
1291
1292 t=get_num(opP->con1,80);
1293 if(t<1 || t>8 || isvar(opP->con1))
1294 losing++;
1295 }
1296 break;
1297
1298 case 'R':
1299 if(opP->mode!=DREG && opP->mode!=AREG)
1300 losing++;
1301 break;
1302
1303 case 's':
1304 if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1305 losing++;
1306 break;
1307
1308 case 'S':
1309 if(opP->mode!=MSCR || opP->reg!=SR)
1310 losing++;
1311 break;
1312
1313 case 'U':
1314 if(opP->mode!=MSCR || opP->reg!=USP)
1315 losing++;
1316 break;
1317
1318 /* JF these are out of order. We could put them
1319 in order if we were willing to put up with
1320 bunches of #ifdef m68851s in the code */
1321#ifdef m68851
1322 /* Memory addressing mode used by pflushr */
1323 case '|':
1324 if(opP->mode==MSCR || opP->mode==DREG ||
1325 opP->mode==AREG || opP->mode==REGLST)
1326 losing++;
1327 break;
1328
1329 case 'f':
1330 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1331 losing++;
1332 break;
1333
1334 case 'P':
1335 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1336 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1337 losing++;
1338 break;
1339
1340 case 'V':
1341 if (opP->reg != VAL)
1342 losing++;
1343 break;
1344
1345 case 'W':
1346 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1347 opP->reg != CRP))
1348 losing++;
1349 break;
1350
1351 case 'X':
1352 if (opP->mode != MSCR ||
1353 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1354 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1355 losing++;
1356 break;
1357
1358 case 'Y':
1359 if (opP->reg != PSR)
1360 losing++;
1361 break;
1362
1363 case 'Z':
1364 if (opP->reg != PCSR)
1365 losing++;
1366 break;
1367#endif
1368 default:
1369 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1370 *s, __LINE__, __FILE__);
1371 }
1372 }
1373 if(!losing)
1374 break;
1375 opcode=opcode->m_next;
1376 if(!opcode) { /* Fell off the end */
1377 the_ins.error="instruction/operands mismatch";
1378 return;
1379 }
1380 losing=0;
1381 }
1382 the_ins.args=opcode->m_operands;
1383 the_ins.numargs=opcode->m_opnum;
1384 the_ins.numo=opcode->m_codenum;
1385 the_ins.opcode[0]=getone(opcode);
1386 the_ins.opcode[1]=gettwo(opcode);
1387
1388 for(s=the_ins.args,opP= &the_ins.operands[0];*s;s+=2,opP++) {
1389 /* This switch is a doozy.
1390 What the first step; its a big one! */
1391 switch(s[0]) {
1392
1393 case '*':
1394 case '~':
1395 case '%':
1396 case ';':
1397 case '@':
1398 case '!':
1399 case '&':
1400 case '$':
1401 case '?':
1402 case '/':
1403#ifdef m68851
1404 case '|':
1405#endif
1406 switch(opP->mode) {
1407 case IMMED:
1408 tmpreg=0x3c; /* 7.4 */
f6e504fe 1409 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
fecd2382
RP		 1410 else nextword=nextword=get_num(opP->con1,0);
1411 if(isvar(opP->con1))
1412 add_fix(s[1],opP->con1,0);
1413 switch(s[1]) {
1414 case 'b':
1415 if(!isbyte(nextword))
1416 opP->error="operand out of range";
1417 addword(nextword);
1418 baseo=0;
1419 break;
1420 case 'w':
1421 if(!isword(nextword))
1422 opP->error="operand out of range";
1423 addword(nextword);
1424 baseo=0;
1425 break;
1426 case 'l':
1427 addword(nextword>>16);
1428 addword(nextword);
1429 baseo=0;
1430 break;
1431
1432 case 'f':
1433 baseo=2;
1434 outro=8;
1435 break;
1436 case 'F':
1437 baseo=4;
1438 outro=11;
1439 break;
1440 case 'x':
1441 baseo=6;
1442 outro=15;
1443 break;
1444 case 'p':
1445 baseo=6;
1446 outro= -1;
1447 break;
1448 default:
1449 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1450 *s, s[1], __LINE__, __FILE__);
1451 }
1452 if(!baseo)
1453 break;
1454
1455 /* We gotta put out some float */
1456 if(seg(opP->con1)!=SEG_BIG) {
1457 int_to_gen(nextword);
f6e504fe 1458 gen_to_words(words,baseo,(long int)outro);
fecd2382
RP		 1459 for(wordp=words;baseo--;wordp++)
1460 addword(*wordp);
1461 break;
1462 } /* Its BIG */
1463 if(offs(opP->con1)>0) {
1464 as_warn("Bignum assumed to be binary bit-pattern");
1465 if(offs(opP->con1)>baseo) {
f6e504fe 1466 as_warn("Bignum too big for %c format; truncated",s[1]);
fecd2382
RP		 1467 offs(opP->con1)=baseo;
1468 }
1469 baseo-=offs(opP->con1);
1470 for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1471 addword(*wordp);
1472 while(baseo--)
1473 addword(0);
1474 break;
1475 }
1476 gen_to_words(words,baseo,(long)outro);
f6e504fe 1477 for (wordp=words;baseo--;wordp++)
fecd2382
RP		 1478 addword(*wordp);
1479 break;
1480 case DREG:
1481 tmpreg=opP->reg-DATA; /* 0.dreg */
1482 break;
1483 case AREG:
1484 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1485 break;
1486 case AINDR:
1487 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1488 break;
1489 case ADEC:
1490 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1491 break;
1492 case AINC:
1493 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1494 break;
1495 case AOFF:
1496
1497 nextword=get_num(opP->con1,80);
1498 /* Force into index mode. Hope this works */
1499
1500 /* We do the first bit for 32-bit displacements,
1501 and the second bit for 16 bit ones. It is
1502 possible that we should make the default be
1503 WORD instead of LONG, but I think that'd
1504 break GCC, so we put up with a little
1505 inefficiency for the sake of working output.
1506 */
1507
1508 if( !issword(nextword)
1509 || ( isvar(opP->con1)
1510 && ( ( opP->con1->e_siz==0
1511 && flagseen['l']==0)
1512 || opP->con1->e_siz==3))) {
1513
1514 if(opP->reg==PC)
1515 tmpreg=0x3B; /* 7.3 */
1516 else
1517 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1518 if(isvar(opP->con1)) {
1519 if(opP->reg==PC) {
1520 add_frag(adds(opP->con1),
1521 offs(opP->con1),
1522 TAB(PCLEA,SZ_UNDEF));
1523 break;
1524 } else {
1525 addword(0x0170);
1526 add_fix('l',opP->con1,1);
1527 }
1528 } else
1529 addword(0x0170);
1530 addword(nextword>>16);
1531 } else {
1532 if(opP->reg==PC)
1533 tmpreg=0x3A; /* 7.2 */
1534 else
1535 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1536
1537 if(isvar(opP->con1)) {
1538 if(opP->reg==PC) {
1539 add_fix('w',opP->con1,1);
1540 } else
1541 add_fix('w',opP->con1,0);
1542 }
1543 }
1544 addword(nextword);
1545 break;
1546 case AINDX:
1547 case APODX:
1548 case AMIND:
1549 case APRDX:
1550 nextword=0;
1551 baseo=get_num(opP->con1,80);
1552 outro=get_num(opP->con2,80);
1553 /* Figure out the 'addressing mode' */
1554 /* Also turn on the BASE_DISABLE bit, if needed */
1555 if(opP->reg==PC || opP->reg==ZPC) {
1556 tmpreg=0x3b; /* 7.3 */
1557 if(opP->reg==ZPC)
1558 nextword|=0x80;
1559 } else if(opP->reg==FAIL) {
1560 nextword|=0x80;
1561 tmpreg=0x30; /* 6.garbage */
1562 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1563
1564 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1565 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1566
1567 /* Index register stuff */
1568 if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
1569 nextword|=(opP->ireg-DATA)<<12;
1570
1571 if(opP->isiz==0 || opP->isiz==3)
1572 nextword|=0x800;
1573 switch(opP->imul) {
1574 case 1: break;
1575 case 2: nextword|=0x200; break;
1576 case 4: nextword|=0x400; break;
1577 case 8: nextword|=0x600; break;
ac1ac0cd 1578 default: as_fatal("failed sanity check.");
fecd2382
RP		 1579 }
1580 /* IF its simple,
1581 GET US OUT OF HERE! */
1582
1583 /* Must be INDEX, with an index
1584 register. Address register
1585 cannot be ZERO-PC, and either
1586 :b was forced, or we know
1587 it will fit */
1588 if( opP->mode==AINDX
1589 && opP->reg!=FAIL
1590 && opP->reg!=ZPC
1591 && ( siz1==1
1592 || ( issbyte(baseo)
1593 && !isvar(opP->con1)))) {
1594 nextword +=baseo&0xff;
1595 addword(nextword);
1596 if(isvar(opP->con1))
1597 add_fix('B',opP->con1,0);
1598 break;
1599 }
1600 } else
1601 nextword|=0x40; /* No index reg */
1602
1603 /* It aint simple */
1604 nextword|=0x100;
1605 /* If the guy specified a width, we assume that
1606 it is wide enough. Maybe it isn't. Ifso, we lose
1607 */
1608 switch(siz1) {
1609 case 0:
1610 if(isvar(opP->con1) || !issword(baseo)) {
1611 siz1=3;
1612 nextword|=0x30;
1613 } else if(baseo==0)
1614 nextword|=0x10;
1615 else {
1616 nextword|=0x20;
1617 siz1=2;
1618 }
1619 break;
1620 case 1:
1621 as_warn("Byte dispacement won't work. Defaulting to :w");
1622 case 2:
1623 nextword|=0x20;
1624 break;
1625 case 3:
1626 nextword|=0x30;
1627 break;
1628 }
1629
1630 /* Figure out innner displacement stuff */
1631 if(opP->mode!=AINDX) {
1632 switch(siz2) {
1633 case 0:
1634 if(isvar(opP->con2) || !issword(outro)) {
1635 siz2=3;
1636 nextword|=0x3;
1637 } else if(outro==0)
1638 nextword|=0x1;
1639 else {
1640 nextword|=0x2;
1641 siz2=2;
1642 }
1643 break;
1644 case 1:
1645 as_warn("Byte dispacement won't work. Defaulting to :w");
1646 case 2:
1647 nextword|=0x2;
1648 break;
1649 case 3:
1650 nextword|=0x3;
1651 break;
1652 }
1653 if(opP->mode==APODX) nextword|=0x04;
1654 else if(opP->mode==AMIND) nextword|=0x40;
1655 }
1656 addword(nextword);
1657
1658 if(isvar(opP->con1)) {
1659 if(opP->reg==PC || opP->reg==ZPC) {
1660 add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
1661 opP->con1->e_exp.X_add_number+=6;
1662 } else
1663 add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
1664 }
1665 if(siz1==3)
1666 addword(baseo>>16);
1667 if(siz1)
1668 addword(baseo);
1669
1670 if(isvar(opP->con2)) {
1671 if(opP->reg==PC || opP->reg==ZPC) {
1672 add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
1673 opP->con1->e_exp.X_add_number+=6;
1674 } else
1675 add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
1676 }
1677 if(siz2==3)
1678 addword(outro>>16);
1679 if(siz2)
1680 addword(outro);
1681
1682 break;
1683
1684 case ABSL:
1685 nextword=get_num(opP->con1,80);
1686 switch(opP->con1->e_siz) {
1687 default:
f6e504fe 1688 as_warn("Unknown size for absolute reference");
fecd2382
RP		 1689 case 0:
1690 if(!isvar(opP->con1) && issword(offs(opP->con1))) {
1691 tmpreg=0x38; /* 7.0 */
1692 addword(nextword);
1693 break;
1694 }
f6e504fe
RP		 1695 /* Don't generate pc relative code
1696 on 68010 and 68000 */
dd61f09e
RP		 1697 if(isvar(opP->con1)
1698 && !subs(opP->con1)
1699 && seg(opP->con1) == SEG_TEXT
1700 && now_seg == SEG_TEXT
1701 && flagseen['m'] == 0
1702 && !flagseen['S']
1703 && !strchr("~%&$?", s[0])) {
fecd2382
RP		 1704 tmpreg=0x3A; /* 7.2 */
1705 add_frag(adds(opP->con1),
1706 offs(opP->con1),
1707 TAB(PCREL,SZ_UNDEF));
1708 break;
1709 }
1710 case 3: /* Fall through into long */
1711 if(isvar(opP->con1))
1712 add_fix('l',opP->con1,0);
1713
1714 tmpreg=0x39; /* 7.1 mode */
1715 addword(nextword>>16);
1716 addword(nextword);
1717 break;
1718
1719 case 2: /* Word */
1720 if(isvar(opP->con1))
1721 add_fix('w',opP->con1,0);
1722
1723 tmpreg=0x38; /* 7.0 mode */
1724 addword(nextword);
1725 break;
1726 }
1727 break;
1728 case MSCR:
1729 default:
1730 as_bad("unknown/incorrect operand");
1731 /* abort(); */
1732 }
1733 install_gen_operand(s[1],tmpreg);
1734 break;
1735
1736 case '#':
1737 case '^':
1738 switch(s[1]) { /* JF: I hate floating point! */
1739 case 'j':
1740 tmpreg=70;
1741 break;
1742 case '8':
1743 tmpreg=20;
1744 break;
1745 case 'C':
1746 tmpreg=50;
1747 break;
1748 case '3':
1749 default:
1750 tmpreg=80;
1751 break;
1752 }
1753 tmpreg=get_num(opP->con1,tmpreg);
1754 if(isvar(opP->con1))
1755 add_fix(s[1],opP->con1,0);
1756 switch(s[1]) {
1757 case 'b': /* Danger: These do no check for
1758 certain types of overflow.
1759 user beware! */
1760 if(!isbyte(tmpreg))
1761 opP->error="out of range";
1762 insop(tmpreg);
1763 if(isvar(opP->con1))
1764 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1765 break;
1766 case 'w':
1767 if(!isword(tmpreg))
1768 opP->error="out of range";
1769 insop(tmpreg);
1770 if(isvar(opP->con1))
1771 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1772 break;
1773 case 'l':
1774 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
1775 insop(tmpreg>>16);
1776 if(isvar(opP->con1))
1777 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1778 break;
1779 case '3':
1780 tmpreg&=0xFF;
1781 case '8':
1782 case 'C':
1783 install_operand(s[1],tmpreg);
1784 break;
1785 default:
1786 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
1787 }
1788 break;
1789
1790 case '+':
1791 case '-':
1792 case 'A':
1793 install_operand(s[1],opP->reg-ADDR);
1794 break;
1795
1796 case 'B':
1797 tmpreg=get_num(opP->con1,80);
1798 switch(s[1]) {
f6e504fe
RP		 1799 case 'B':
1800 /* Needs no offsetting */
1801 add_fix('B',opP->con1,1);
1802 break;
1803 case 'W':
1804 /* Offset the displacement to be relative to byte disp location */
1805 opP->con1->e_exp.X_add_number+=2;
1806 add_fix('w',opP->con1,1);
1807 addword(0);
1808 break;
1809 case 'L':
1810 long_branch:
1811 if(flagseen['m']) /* 68000 or 010 */
1812 as_warn("Can't use long branches on 68000/68010");
1813 the_ins.opcode[the_ins.numo-1]|=0xff;
1814 /* Offset the displacement to be relative to byte disp location */
1815 opP->con1->e_exp.X_add_number+=4;
1816 add_fix('l',opP->con1,1);
1817 addword(0);
1818 addword(0);
1819 break;
fecd2382 1820 case 'g':
f6e504fe
RP		 1821 if(subs(opP->con1)) /* We can't relax it */
1822 goto long_branch;
1823
1824 /* This could either be a symbol, or an
1825 absolute address. No matter, the
1826 frag hacking will finger it out.
1827 Not quite: it can't switch from
1828 BRANCH to BCC68000 for the case
1829 where opnd is absolute (it needs
1830 to use the 68000 hack since no
1831 conditional abs jumps). */
dd61f09e
RP		 1832 if ((flagseen['m'] || (0==adds(opP->con1)))
1833 && (the_ins.opcode[0] >= 0x6200)
1834 && (the_ins.opcode[0] <= 0x6f00)) {
1835 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
fecd2382 1836 } else {
dd61f09e 1837 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
fecd2382
RP		 1838 }
1839 break;
1840 case 'w':
1841 if(isvar(opP->con1)) {
1842 /* check for DBcc instruction */
1843 if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
1844 /* size varies if patch */
1845 /* needed for long form */
1846 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
1847 break;
1848 }
1849
1850 /* Don't ask! */
1851 opP->con1->e_exp.X_add_number+=2;
1852 add_fix('w',opP->con1,1);
1853 }
1854 addword(0);
1855 break;
f6e504fe
RP		 1856 case 'C': /* Fixed size LONG coproc branches */
1857 the_ins.opcode[the_ins.numo-1]|=0x40;
1858 /* Offset the displacement to be relative to byte disp location */
1859 /* Coproc branches don't have a byte disp option, but they are
1860 compatible with the ordinary branches, which do... */
1861 opP->con1->e_exp.X_add_number+=4;
1862 add_fix('l',opP->con1,1);
1863 addword(0);
1864 addword(0);
1865 break;
1866 case 'c': /* Var size Coprocesssor branches */
1867 if(subs(opP->con1)) {
fecd2382
RP		 1868 add_fix('l',opP->con1,1);
1869 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
1870 } else if(adds(opP->con1)) {
1871 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
1872 } else {
1873 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
1874 the_ins.opcode[the_ins.numo-1]|=0x40;
1875 add_fix('l',opP->con1,1);
1876 addword(0);
1877 addword(4);
1878 }
1879 break;
1880 default:
1881 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
1882 s[1], __LINE__, __FILE__);
1883 }
1884 break;
1885
1886 case 'C': /* Ignore it */
1887 break;
1888
1889 case 'd': /* JF this is a kludge */
1890 if(opP->mode==AOFF) {
1891 install_operand('s',opP->reg-ADDR);
1892 } else {
1893 char *tmpP;
1894
1895 tmpP=opP->con1->e_end-2;
1896 opP->con1->e_beg++;
1897 opP->con1->e_end-=4; /* point to the , */
1898 baseo=m68k_reg_parse(&tmpP);
1899 if(baseo<ADDR+0 || baseo>ADDR+7) {
1900 as_bad("Unknown address reg, using A0");
1901 baseo=0;
1902 } else baseo-=ADDR;
1903 install_operand('s',baseo);
1904 }
1905 tmpreg=get_num(opP->con1,80);
1906 if(!issword(tmpreg)) {
f6e504fe 1907 as_warn("Expression out of range, using 0");
fecd2382
RP		 1908 tmpreg=0;
1909 }
1910 addword(tmpreg);
1911 break;
1912
1913 case 'D':
1914 install_operand(s[1],opP->reg-DATA);
1915 break;
1916
1917 case 'F':
1918 install_operand(s[1],opP->reg-FPREG);
1919 break;
1920
1921 case 'I':
1922 tmpreg=1+opP->reg-COPNUM;
1923 if(tmpreg==8)
1924 tmpreg=0;
1925 install_operand(s[1],tmpreg);
1926 break;
1927
1928 case 'J': /* JF foo */
1929 switch(opP->reg) {
1930 case SFC:
1931 tmpreg=0;
1932 break;
1933 case DFC:
1934 tmpreg=0x001;
1935 break;
1936 case CACR:
1937 tmpreg=0x002;
1938 break;
1939 case USP:
1940 tmpreg=0x800;
1941 break;
1942 case VBR:
1943 tmpreg=0x801;
1944 break;
1945 case CAAR:
1946 tmpreg=0x802;
1947 break;
1948 case MSP:
1949 tmpreg=0x803;
1950 break;
1951 case ISP:
1952 tmpreg=0x804;
1953 break;
1954 default:
ac1ac0cd 1955 as_fatal("failed sanity check.");
fecd2382
RP		 1956 }
1957 install_operand(s[1],tmpreg);
1958 break;
1959
1960 case 'k':
1961 tmpreg=get_num(opP->con1,55);
1962 install_operand(s[1],tmpreg&0x7f);
1963 break;
1964
1965 case 'l':
1966 tmpreg=opP->reg;
1967 if(s[1]=='w') {
1968 if(tmpreg&0x7FF0000)
1969 as_bad("Floating point register in register list");
1970 insop(reverse_16_bits(tmpreg));
1971 } else {
1972 if(tmpreg&0x700FFFF)
1973 as_bad("Wrong register in floating-point reglist");
1974 install_operand(s[1],reverse_8_bits(tmpreg>>16));
1975 }
1976 break;
1977
1978 case 'L':
1979 tmpreg=opP->reg;
1980 if(s[1]=='w') {
1981 if(tmpreg&0x7FF0000)
1982 as_bad("Floating point register in register list");
1983 insop(tmpreg);
1984 } else if(s[1]=='8') {
1985 if(tmpreg&0x0FFFFFF)
1986 as_bad("incorrect register in reglist");
1987 install_operand(s[1],tmpreg>>24);
1988 } else {
1989 if(tmpreg&0x700FFFF)
1990 as_bad("wrong register in floating-point reglist");
1991 else
1992 install_operand(s[1],tmpreg>>16);
1993 }
1994 break;
1995
1996 case 'M':
1997 install_operand(s[1],get_num(opP->con1,60));
1998 break;
1999
2000 case 'O':
2001 tmpreg= (opP->mode==DREG)
2002 ? 0x20+opP->reg-DATA
2003 : (get_num(opP->con1,40)&0x1F);
2004 install_operand(s[1],tmpreg);
2005 break;
2006
2007 case 'Q':
2008 tmpreg=get_num(opP->con1,10);
2009 if(tmpreg==8)
2010 tmpreg=0;
2011 install_operand(s[1],tmpreg);
2012 break;
2013
2014 case 'R':
2015 /* This depends on the fact that ADDR registers are
2016 eight more than their corresponding DATA regs, so
2017 the result will have the ADDR_REG bit set */
2018 install_operand(s[1],opP->reg-DATA);
2019 break;
2020
2021 case 's':
2022 if(opP->reg==FPI) tmpreg=0x1;
2023 else if(opP->reg==FPS) tmpreg=0x2;
2024 else if(opP->reg==FPC) tmpreg=0x4;
ac1ac0cd 2025 else as_fatal("failed sanity check.");
fecd2382
RP		 2026 install_operand(s[1],tmpreg);
2027 break;
2028
2029 case 'S': /* Ignore it */
2030 break;
2031
2032 case 'T':
2033 install_operand(s[1],get_num(opP->con1,30));
2034 break;
2035
2036 case 'U': /* Ignore it */
2037 break;
2038
2039#ifdef m68851
2040 /* JF: These are out of order, I fear. */
2041 case 'f':
2042 switch (opP->reg) {
2043 case SFC:
2044 tmpreg=0;
2045 break;
2046 case DFC:
2047 tmpreg=1;
2048 break;
2049 default:
ac1ac0cd 2050 as_fatal("failed sanity check.");
fecd2382
RP		 2051 }
2052 install_operand(s[1],tmpreg);
2053 break;
2054
2055 case 'P':
2056 switch(opP->reg) {
2057 case TC:
2058 tmpreg=0;
2059 break;
2060 case CAL:
2061 tmpreg=4;
2062 break;
2063 case VAL:
2064 tmpreg=5;
2065 break;
2066 case SCC:
2067 tmpreg=6;
2068 break;
2069 case AC:
2070 tmpreg=7;
2071 break;
2072 default:
ac1ac0cd 2073 as_fatal("failed sanity check.");
fecd2382
RP		 2074 }
2075 install_operand(s[1],tmpreg);
2076 break;
2077
2078 case 'V':
2079 if (opP->reg == VAL)
2080 break;
ac1ac0cd 2081 as_fatal("failed sanity check.");
fecd2382
RP		 2082
2083 case 'W':
2084 switch(opP->reg) {
2085
2086 case DRP:
2087 tmpreg=1;
2088 break;
2089 case SRP:
2090 tmpreg=2;
2091 break;
2092 case CRP:
2093 tmpreg=3;
2094 break;
2095 default:
ac1ac0cd 2096 as_fatal("failed sanity check.");
fecd2382
RP		 2097 }
2098 install_operand(s[1],tmpreg);
2099 break;
2100
2101 case 'X':
2102 switch (opP->reg) {
2103 case BAD: case BAD+1: case BAD+2: case BAD+3:
2104 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2105 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2106 break;
2107
2108 case BAC: case BAC+1: case BAC+2: case BAC+3:
2109 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2110 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2111 break;
2112
2113 default:
ac1ac0cd 2114 as_fatal("failed sanity check.");
fecd2382
RP		 2115 }
2116 install_operand(s[1], tmpreg);
2117 break;
2118 case 'Y':
2119 if (opP->reg == PSR)
2120 break;
ac1ac0cd 2121 as_fatal("failed sanity check.");
fecd2382
RP		 2122
2123 case 'Z':
2124 if (opP->reg == PCSR)
2125 break;
ac1ac0cd 2126 as_fatal("failed sanity check.");
fecd2382
RP		 2127#endif /* m68851 */
2128 default:
2129 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2130 }
2131 }
2132 /* By the time whe get here (FINALLY) the_ins contains the complete
2133 instruction, ready to be emitted. . . */
2134}
2135
2136static int get_regs(i,str,opP)
2137int i;
2138struct m68k_op *opP;
2139char *str;
2140{
2141 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2142 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2143 unsigned long cur_regs = 0;
2144 int reg1,
2145 reg2;
2146
2147#define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2148 else if(x==FPS) cur_regs|=(1<<25);\
2149 else if(x==FPC) cur_regs|=(1<<26);\
2150 else cur_regs|=(1<<(x-1)); }
2151
2152 reg1=i;
2153 for(;;) {
2154 if(*str=='/') {
2155 ADD_REG(reg1);
2156 str++;
2157 } else if(*str=='-') {
2158 str++;
2159 reg2=m68k_reg_parse(&str);
2160 if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
2161 opP->error="unknown register in register list";
2162 return FAIL;
2163 }
2164 while(reg1<=reg2) {
2165 ADD_REG(reg1);
2166 reg1++;
2167 }
2168 if(*str=='\0')
2169 break;
2170 } else if(*str=='\0') {
2171 ADD_REG(reg1);
2172 break;
2173 } else {
2174 opP->error="unknow character in register list";
2175 return FAIL;
2176 }
2177/* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2178 if (*str=='/')
2179 str ++;
2180 reg1=m68k_reg_parse(&str);
2181 if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
2182 opP->error="unknown register in register list";
2183 return FAIL;
2184 }
2185 }
2186 opP->reg=cur_regs;
2187 return OK;
2188} /* get_regs() */
2189
2190static int reverse_16_bits(in)
2191int in;
2192{
2193 int out=0;
2194 int n;
2195
2196 static int mask[16] = {
21970x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
21980x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2199 };
2200 for(n=0;n<16;n++) {
2201 if(in&mask[n])
2202 out|=mask[15-n];
2203 }
2204 return out;
2205} /* reverse_16_bits() */
2206
2207static int reverse_8_bits(in)
2208int in;
2209{
2210 int out=0;
2211 int n;
2212
2213 static int mask[8] = {
22140x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2215 };
2216
2217 for(n=0;n<8;n++) {
2218 if(in&mask[n])
2219 out|=mask[7-n];
2220 }
2221 return out;
2222} /* reverse_8_bits() */
2223
2224static void install_operand(mode,val)
2225int mode;
2226int val;
2227{
2228 switch(mode) {
2229 case 's':
2230 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2231 break;
2232 case 'd':
2233 the_ins.opcode[0]|=val<<9;
2234 break;
2235 case '1':
2236 the_ins.opcode[1]|=val<<12;
2237 break;
2238 case '2':
2239 the_ins.opcode[1]|=val<<6;
2240 break;
2241 case '3':
2242 the_ins.opcode[1]|=val;
2243 break;
2244 case '4':
2245 the_ins.opcode[2]|=val<<12;
2246 break;
2247 case '5':
2248 the_ins.opcode[2]|=val<<6;
2249 break;
2250 case '6':
2251 /* DANGER! This is a hack to force cas2l and cas2w cmds
2252 to be three words long! */
2253 the_ins.numo++;
2254 the_ins.opcode[2]|=val;
2255 break;
2256 case '7':
2257 the_ins.opcode[1]|=val<<7;
2258 break;
2259 case '8':
2260 the_ins.opcode[1]|=val<<10;
2261 break;
2262#ifdef m68851
2263 case '9':
2264 the_ins.opcode[1]|=val<<5;
2265 break;
2266#endif
2267
2268 case 't':
2269 the_ins.opcode[1]|=(val<<10)|(val<<7);
2270 break;
2271 case 'D':
2272 the_ins.opcode[1]|=(val<<12)|val;
2273 break;
2274 case 'g':
2275 the_ins.opcode[0]|=val=0xff;
2276 break;
2277 case 'i':
2278 the_ins.opcode[0]|=val<<9;
2279 break;
2280 case 'C':
2281 the_ins.opcode[1]|=val;
2282 break;
2283 case 'j':
2284 the_ins.opcode[1]|=val;
2285 the_ins.numo++; /* What a hack */
2286 break;
2287 case 'k':
2288 the_ins.opcode[1]|=val<<4;
2289 break;
2290 case 'b':
2291 case 'w':
2292 case 'l':
2293 break;
2294 case 'c':
2295 default:
ac1ac0cd 2296 as_fatal("failed sanity check.");
fecd2382
RP		 2297 }
2298} /* install_operand() */
2299
2300static void install_gen_operand(mode,val)
2301int mode;
2302int val;
2303{
2304 switch(mode) {
2305 case 's':
2306 the_ins.opcode[0]|=val;
2307 break;
2308 case 'd':
2309 /* This is a kludge!!! */
2310 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2311 break;
2312 case 'b':
2313 case 'w':
2314 case 'l':
2315 case 'f':
2316 case 'F':
2317 case 'x':
2318 case 'p':
2319 the_ins.opcode[0]|=val;
2320 break;
2321 /* more stuff goes here */
2322 default:
ac1ac0cd 2323 as_fatal("failed sanity check.");
fecd2382
RP		 2324 }
2325} /* install_gen_operand() */
2326
2327static char *crack_operand(str,opP)
2328register char *str;
2329register struct m68k_op *opP;
2330{
2331 register int parens;
2332 register int c;
2333 register char *beg_str;
2334
2335 if(!str) {
2336 return str;
2337 }
2338 beg_str=str;
2339 for(parens=0;*str && (parens>0 || notend(str));str++) {
2340 if(*str=='(') parens++;
2341 else if(*str==')') {
2342 if(!parens) { /* ERROR */
2343 opP->error="Extra )";
2344 return str;
2345 }
2346 --parens;
2347 }
2348 }
2349 if(!*str && parens) { /* ERROR */
2350 opP->error="Missing )";
2351 return str;
2352 }
2353 c= *str;
2354 *str='\0';
2355 if(m68k_ip_op(beg_str,opP)==FAIL) {
2356 *str=c;
2357 return str;
2358 }
2359 *str=c;
2360 if(c=='}')
2361 c= *++str; /* JF bitfield hack */
2362 if(c) {
2363 c= *++str;
2364 if(!c)
2365 as_bad("Missing operand");
2366 }
2367 return str;
2368}
2369
2370/* See the comment up above where the #define notend(... is */
2371#if 0
2372notend(s)
2373char *s;
2374{
2375 if(*s==',') return 0;
2376 if(*s=='{' || *s=='}')
2377 return 0;
2378 if(*s!=':') return 1;
2379 /* This kludge here is for the division cmd, which is a kludge */
f6e504fe 2380 if(index("aAdD#",s[1])) return 0;
fecd2382
RP		 2381 return 1;
2382}
2383#endif
2384
2385/* This is the guts of the machine-dependent assembler. STR points to a
2386 machine dependent instruction. This funciton is supposed to emit
2387 the frags/bytes it assembles to.
2388 */
2389void
2390md_assemble(str)
2391char *str;
2392{
2393 char *er;
2394 short *fromP;
dd61f09e
RP		 2395 char *toP = NULL;
2396 int m,n = 0;
fecd2382
RP		 2397 char *to_beg_P;
2398 int shorts_this_frag;
2399
2400 bzero((char *)(&the_ins),sizeof(the_ins)); /* JF for paranoia sake */
2401 m68_ip(str);
2402 er=the_ins.error;
2403 if(!er) {
2404 for(n=the_ins.numargs;n;--n)
2405 if(the_ins.operands[n].error) {
2406 er=the_ins.operands[n].error;
2407 break;
2408 }
2409 }
2410 if(er) {
2411 as_bad("\"%s\" -- Statement '%s' ignored",er,str);
2412 return;
2413 }
2414
2415 if(the_ins.nfrag==0) { /* No frag hacking involved; just put it out */
2416 toP=frag_more(2*the_ins.numo);
2417 fromP= &the_ins.opcode[0];
2418 for(m=the_ins.numo;m;--m) {
2419 md_number_to_chars(toP,(long)(*fromP),2);
2420 toP+=2;
2421 fromP++;
2422 }
2423 /* put out symbol-dependent info */
2424 for(m=0;m<the_ins.nrel;m++) {
2425 switch(the_ins.reloc[m].wid) {
2426 case 'B':
2427 n=1;
2428 break;
2429 case 'b':
2430 n=1;
2431 break;
2432 case '3':
2433 n=2;
2434 break;
2435 case 'w':
2436 n=2;
2437 break;
2438 case 'l':
2439 n=4;
2440 break;
2441 default:
2442 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2443 }
2444
2445 fix_new(frag_now,
2446 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2447 n,
2448 the_ins.reloc[m].add,
2449 the_ins.reloc[m].sub,
2450 the_ins.reloc[m].off,
2451 the_ins.reloc[m].pcrel,
2452 NO_RELOC);
2453 }
2454 return;
2455 }
2456
2457 /* There's some frag hacking */
2458 for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2459 int wid;
2460
2461 if(n==0) wid=2*the_ins.fragb[n].fragoff;
2462 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2463 toP=frag_more(wid);
2464 to_beg_P=toP;
2465 shorts_this_frag=0;
2466 for(m=wid/2;m;--m) {
2467 md_number_to_chars(toP,(long)(*fromP),2);
2468 toP+=2;
2469 fromP++;
2470 shorts_this_frag++;
2471 }
2472 for(m=0;m<the_ins.nrel;m++) {
2473 if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2474 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2475 break;
2476 }
2477 wid=the_ins.reloc[m].wid;
2478 if(wid==0)
2479 continue;
2480 the_ins.reloc[m].wid=0;
2481 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2482
2483 fix_new(frag_now,
2484 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2485 wid,
2486 the_ins.reloc[m].add,
2487 the_ins.reloc[m].sub,
2488 the_ins.reloc[m].off,
2489 the_ins.reloc[m].pcrel,
2490 NO_RELOC);
2491 }
2492 know(the_ins.fragb[n].fadd);
2493 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2494 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2495 }
2496 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2497 shorts_this_frag=0;
2498 if(n) {
2499 toP=frag_more(n*sizeof(short));
2500 while(n--) {
2501 md_number_to_chars(toP,(long)(*fromP),2);
2502 toP+=2;
2503 fromP++;
2504 shorts_this_frag++;
2505 }
2506 }
2507 for(m=0;m<the_ins.nrel;m++) {
2508 int wid;
2509
2510 wid=the_ins.reloc[m].wid;
2511 if(wid==0)
2512 continue;
2513 the_ins.reloc[m].wid=0;
2514 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2515
2516 fix_new(frag_now,
2517 (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
2518 wid,
2519 the_ins.reloc[m].add,
2520 the_ins.reloc[m].sub,
2521 the_ins.reloc[m].off,
2522 the_ins.reloc[m].pcrel,
2523 NO_RELOC);
2524 }
2525}
2526
2527/* This function is called once, at assembler startup time. This should
2528 set up all the tables, etc that the MD part of the assembler needs
2529 */
2530void
2531md_begin()
2532{
2533/*
2534 * md_begin -- set up hash tables with 68000 instructions.
2535 * similar to what the vax assembler does. ---phr
2536 */
2537 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2538 a copy of it at runtime, adding in the information we want but isn't
2539 there. I think it'd be better to have an awk script hack the table
2540 at compile time. Or even just xstr the table and use it as-is. But
2541 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2542 names. */
2543
2544 register const struct m68k_opcode *ins;
2545 register struct m68_incant *hack,
2546 *slak;
2547 register char *retval = 0; /* empty string, or error msg text */
2548 register unsigned int i;
2549 register char c;
2550
2551 if ((op_hash = hash_new()) == NULL)
2552 as_fatal("Virtual memory exhausted");
2553
2554 obstack_begin(&robyn,4000);
2555 for (ins = m68k_opcodes; ins < endop; ins++) {
2556 hack=slak=(struct m68_incant *)obstack_alloc(&robyn,sizeof(struct m68_incant));
2557 do {
2558 slak->m_operands=ins->args;
2559 slak->m_opnum=strlen(slak->m_operands)/2;
2560 slak->m_opcode=ins->opcode;
2561 /* This is kludgey */
2562 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2563 if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
2564 slak->m_next=(struct m68_incant *)
2565obstack_alloc(&robyn,sizeof(struct m68_incant));
2566 ins++;
2567 } else
2568 slak->m_next=0;
2569 slak=slak->m_next;
2570 } while(slak);
2571
2572 retval = hash_insert (op_hash, ins->name,(char *)hack);
2573 /* Didn't his mommy tell him about null pointers? */
2574 if(retval && *retval)
f6e504fe 2575 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
fecd2382
RP		 2576 }
2577
2578 for (i = 0; i < sizeof(mklower_table) ; i++)
2579 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2580
2581 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2582 notend_table[i] = 0;
2583 alt_notend_table[i] = 0;
2584 }
2585 notend_table[','] = 1;
2586 notend_table['{'] = 1;
2587 notend_table['}'] = 1;
2588 alt_notend_table['a'] = 1;
2589 alt_notend_table['A'] = 1;
2590 alt_notend_table['d'] = 1;
2591 alt_notend_table['D'] = 1;
2592 alt_notend_table['#'] = 1;
2593 alt_notend_table['f'] = 1;
2594 alt_notend_table['F'] = 1;
2595#ifdef REGISTER_PREFIX
2596 alt_notend_table[REGISTER_PREFIX] = 1;
2597#endif
2598}
2599
2600#if 0
2601#define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2602 || (*s == ':' && strchr("aAdD#", s[1]))) \
2603 ? 0 : 1)
2604#endif
2605
2606/* This funciton is called once, before the assembler exits. It is
2607 supposed to do any final cleanup for this part of the assembler.
2608 */
2609void
2610md_end()
2611{
2612}
2613
2614/* Equal to MAX_PRECISION in atof-ieee.c */
2615#define MAX_LITTLENUMS 6
2616
2617/* Turn a string in input_line_pointer into a floating point constant of type
2618 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2619 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2620 */
2621char *
2622md_atof(type,litP,sizeP)
2623char type;
2624char *litP;
2625int *sizeP;
2626{
2627 int prec;
2628 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2629 LITTLENUM_TYPE *wordP;
2630 char *t;
f6e504fe 2631 char *atof_ieee();
fecd2382
RP		 2632
2633 switch(type) {
2634 case 'f':
2635 case 'F':
2636 case 's':
2637 case 'S':
2638 prec = 2;
2639 break;
2640
2641 case 'd':
2642 case 'D':
2643 case 'r':
2644 case 'R':
2645 prec = 4;
2646 break;
2647
2648 case 'x':
2649 case 'X':
2650 prec = 6;
2651 break;
2652
2653 case 'p':
2654 case 'P':
2655 prec = 6;
2656 break;
2657
2658 default:
2659 *sizeP=0;
2660 return "Bad call to MD_ATOF()";
2661 }
2662 t=atof_ieee(input_line_pointer,type,words);
2663 if(t)
2664 input_line_pointer=t;
2665
2666 *sizeP=prec * sizeof(LITTLENUM_TYPE);
2667 for(wordP=words;prec--;) {
2668 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
2669 litP+=sizeof(LITTLENUM_TYPE);
2670 }
2671 return ""; /* Someone should teach Dean about null pointers */
2672}
2673
2674/* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2675 for use in the a.out file, and stores them in the array pointed to by buf.
2676 This knows about the endian-ness of the target machine and does
2677 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2678 2 (short) and 4 (long) Floating numbers are put out as a series of
2679 LITTLENUMS (shorts, here at least)
2680 */
2681void
2682md_number_to_chars(buf,val,n)
2683char *buf;
2684long val;
2685int n;
2686{
2687 switch(n) {
2688 case 1:
2689 *buf++=val;
2690 break;
2691 case 2:
2692 *buf++=(val>>8);
2693 *buf++=val;
2694 break;
2695 case 4:
2696 *buf++=(val>>24);
2697 *buf++=(val>>16);
2698 *buf++=(val>>8);
2699 *buf++=val;
2700 break;
2701 default:
ac1ac0cd 2702 as_fatal("failed sanity check.");
fecd2382
RP		 2703 }
2704}
2705
2706void
2707md_apply_fix(fixP, val)
2708 fixS *fixP;
2709 long val;
2710{
2711 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2712
2713 switch(fixP->fx_size) {
2714 case 1:
2715 *buf++=val;
2716 break;
2717 case 2:
2718 *buf++=(val>>8);
2719 *buf++=val;
2720 break;
2721 case 4:
2722 *buf++=(val>>24);
2723 *buf++=(val>>16);
2724 *buf++=(val>>8);
2725 *buf++=val;
2726 break;
2727 default:
2728 BAD_CASE (fixP->fx_size);
2729 }
2730}
2731
2732
2733/* *fragP has been relaxed to its final size, and now needs to have
2734 the bytes inside it modified to conform to the new size There is UGLY
2735 MAGIC here. ..
2736 */
2737void
f6e504fe
RP		 2738md_convert_frag(headers, fragP)
2739object_headers *headers;
fecd2382
RP		 2740register fragS *fragP;
2741{
2742 long disp;
dd61f09e 2743 long ext = 0;
fecd2382 2744
fecd2382
RP		 2745 /* Address in object code of the displacement. */
2746 register int object_address = fragP -> fr_fix + fragP -> fr_address;
2747
f6e504fe
RP		 2748#ifdef IBM_COMPILER_SUX
2749 /* This is wrong but it convinces the native rs6000 compiler to
2750 generate the code we want. */
2751 register char *buffer_address = fragP -> fr_literal;
2752 buffer_address += fragP -> fr_fix;
2753#else /* IBM_COMPILER_SUX */
2754 /* Address in gas core of the place to store the displacement. */
2755 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
2756#endif /* IBM_COMPILER_SUX */
2757
2758 /* No longer true: know(fragP->fr_symbol); */
fecd2382
RP		 2759
2760 /* The displacement of the address, from current location. */
f6e504fe
RP		 2761 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
2762 disp = (disp + fragP->fr_offset) - object_address;
fecd2382
RP		 2763
2764 switch(fragP->fr_subtype) {
2765 case TAB(BCC68000,BYTE):
2766 case TAB(BRANCH,BYTE):
2767 know(issbyte(disp));
2768 if(disp==0)
2769 as_bad("short branch with zero offset: use :w");
2770 fragP->fr_opcode[1]=disp;
2771 ext=0;
2772 break;
2773 case TAB(DBCC,SHORT):
2774 know(issword(disp));
2775 ext=2;
2776 break;
2777 case TAB(BCC68000,SHORT):
2778 case TAB(BRANCH,SHORT):
2779 know(issword(disp));
2780 fragP->fr_opcode[1]=0x00;
2781 ext=2;
2782 break;
2783 case TAB(BRANCH,LONG):
dd61f09e
RP		 2784 if (flagseen['m']) {
2785 if (fragP->fr_opcode[0]==0x61) {
fecd2382 2786 fragP->fr_opcode[0]= 0x4E;
f6e504fe 2787 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
fecd2382
RP		 2788 subseg_change(SEG_TEXT, 0);
2789
2790 fix_new(fragP,
2791 fragP->fr_fix,
2792 4,
2793 fragP->fr_symbol,
2794 0,
2795 fragP->fr_offset,
2796 0,
2797 NO_RELOC);
2798
2799 fragP->fr_fix+=4;
2800 ext=0;
dd61f09e 2801 } else if (fragP->fr_opcode[0]==0x60) {
fecd2382
RP		 2802 fragP->fr_opcode[0]= 0x4E;
2803 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
2804 subseg_change(SEG_TEXT, 0);
2805 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
2806 NO_RELOC);
2807 fragP->fr_fix+=4;
2808 ext=0;
dd61f09e 2809 } else {
fecd2382
RP		 2810 as_bad("Long branch offset not supported.");
2811 }
2812 } else {
2813 fragP->fr_opcode[1]=0xff;
2814 ext=4;
2815 }
2816 break;
2817 case TAB(BCC68000,LONG):
2818 /* only Bcc 68000 instructions can come here */
2819 /* change bcc into b!cc/jmp absl long */
2820 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
2821 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
2822
2823 /* JF: these used to be fr_opcode[2,3], but they may be in a
2824 different frag, in which case refering to them is a no-no.
2825 Only fr_opcode[0,1] are guaranteed to work. */
2826 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
2827 *buffer_address++ = 0xf9;
2828 fragP->fr_fix += 2; /* account for jmp instruction */
2829 subseg_change(SEG_TEXT,0);
2830 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
2831 fragP->fr_offset,0,
2832 NO_RELOC);
2833 fragP->fr_fix += 4;
2834 ext=0;
2835 break;
2836 case TAB(DBCC,LONG):
2837 /* only DBcc 68000 instructions can come here */
2838 /* change dbcc into dbcc/jmp absl long */
2839 /* JF: these used to be fr_opcode[2-7], but that's wrong */
2840 *buffer_address++ = 0x00; /* branch offset = 4 */
2841 *buffer_address++ = 0x04;
2842 *buffer_address++ = 0x60; /* put in bra pc+6 */
2843 *buffer_address++ = 0x06;
2844 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
2845 *buffer_address++ = 0xf9;
2846
2847 fragP->fr_fix += 6; /* account for bra/jmp instructions */
2848 subseg_change(SEG_TEXT,0);
2849 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
2850 fragP->fr_offset,0,
2851 NO_RELOC);
2852 fragP->fr_fix += 4;
2853 ext=0;
2854 break;
2855 case TAB(FBRANCH,SHORT):
2856 know((fragP->fr_opcode[1]&0x40)==0);
2857 ext=2;
2858 break;
2859 case TAB(FBRANCH,LONG):
2860 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
2861 ext=4;
2862 break;
2863 case TAB(PCREL,SHORT):
2864 ext=2;
2865 break;
2866 case TAB(PCREL,LONG):
fecd2382
RP		 2867 /* The thing to do here is force it to ABSOLUTE LONG, since
2868 PCREL is really trying to shorten an ABSOLUTE address anyway */
f6e504fe 2869 /* JF FOO This code has not been tested */
fecd2382 2870 subseg_change(SEG_TEXT,0);
f6e504fe 2871 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
fecd2382
RP		 2872 if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
2873 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
2874 fragP->fr_opcode[0],fragP->fr_address);
2875 fragP->fr_opcode[1]&= ~0x3F;
2876 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
2877 fragP->fr_fix+=4;
f6e504fe
RP		 2878 /* md_number_to_chars(buffer_address,
2879 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
2880 4); */
fecd2382
RP		 2881 ext=0;
2882 break;
2883 case TAB(PCLEA,SHORT):
2884 subseg_change(SEG_TEXT,0);
2885 fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
2886 NO_RELOC);
2887 fragP->fr_opcode[1] &= ~0x3F;
2888 fragP->fr_opcode[1] |= 0x3A;
2889 ext=2;
2890 break;
2891 case TAB(PCLEA,LONG):
2892 subseg_change(SEG_TEXT,0);
2893 fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
2894 NO_RELOC);
2895 *buffer_address++ = 0x01;
2896 *buffer_address++ = 0x70;
2897 fragP->fr_fix+=2;
2898 /* buffer_address+=2; */
2899 ext=4;
2900 break;
2901
f6e504fe
RP		 2902 } /* switch on subtype */
2903
2904 if (ext) {
2905 md_number_to_chars(buffer_address, (long) disp, (int) ext);
2906 fragP->fr_fix += ext;
2907/* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
2908 } /* if extending */
2909
f6e504fe
RP		 2910 return;
2911} /* md_convert_frag() */
fecd2382
RP		 2912
2913/* Force truly undefined symbols to their maximum size, and generally set up
2914 the frag list to be relaxed
2915 */
2916int md_estimate_size_before_relax(fragP, segment)
2917register fragS *fragP;
2918segT segment;
2919{
2920 int old_fix;
dd61f09e 2921 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
fecd2382 2922
dd61f09e 2923 old_fix = fragP->fr_fix;
fecd2382
RP		 2924
2925 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
2926 switch(fragP->fr_subtype) {
fecd2382 2927
f6e504fe
RP		 2928 case TAB(BCC68000,SZ_UNDEF): {
2929 if((fragP->fr_symbol != NULL)
2930 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
fecd2382
RP		 2931 fragP->fr_subtype=TAB(BCC68000,BYTE);
2932 break;
2933 }
2934 /* only Bcc 68000 instructions can come here */
2935 /* change bcc into b!cc/jmp absl long */
2936 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
2937 if(flagseen['l']) {
2938 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
2939 /* JF: these were fr_opcode[2,3] */
2940 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
2941 buffer_address[1] = 0xf8;
2942 fragP->fr_fix += 2; /* account for jmp instruction */
2943 subseg_change(SEG_TEXT,0);
2944 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
f6e504fe 2945 fragP->fr_offset, 0, NO_RELOC);
fecd2382
RP		 2946 fragP->fr_fix += 2;
2947 } else {
2948 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
2949 /* JF: these were fr_opcode[2,3] */
2950 buffer_address[2] = 0x4e; /* put in jmp long (0x4ef9) */
2951 buffer_address[3] = 0xf9;
2952 fragP->fr_fix += 2; /* account for jmp instruction */
2953 subseg_change(SEG_TEXT,0);
2954 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
f6e504fe 2955 fragP->fr_offset, 0, NO_RELOC);
fecd2382
RP		 2956 fragP->fr_fix += 4;
2957 }
2958 frag_wane(fragP);
2959 break;
f6e504fe 2960 } /* case TAB(BCC68000,SZ_UNDEF) */
fecd2382 2961
f6e504fe
RP		 2962 case TAB(DBCC,SZ_UNDEF): {
2963 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
fecd2382
RP		 2964 fragP->fr_subtype=TAB(DBCC,SHORT);
2965 fragP->fr_var+=2;
2966 break;
2967 }
2968 /* only DBcc 68000 instructions can come here */
2969 /* change dbcc into dbcc/jmp absl long */
2970 /* JF: these used to be fr_opcode[2-4], which is wrong. */
2971 buffer_address[0] = 0x00; /* branch offset = 4 */
2972 buffer_address[1] = 0x04;
f6e504fe
RP		 2973 buffer_address[2] = 0x60; /* put in bra pc + ... */
2974
fecd2382
RP		 2975 if(flagseen['l']) {
2976 /* JF: these were fr_opcode[5-7] */
2977 buffer_address[3] = 0x04; /* plus 4 */
2978 buffer_address[4] = 0x4e;/* Put in Jump Word */
2979 buffer_address[5] = 0xf8;
2980 fragP->fr_fix += 6; /* account for bra/jmp instruction */
2981 subseg_change(SEG_TEXT,0);
2982 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
f6e504fe
RP		 2983 fragP->fr_offset, 0, NO_RELOC);
2984 fragP->fr_fix += 2;
fecd2382
RP		 2985 } else {
2986 /* JF: these were fr_opcode[5-7] */
2987 buffer_address[3] = 0x06; /* Plus 6 */
2988 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
2989 buffer_address[5] = 0xf9;
2990 fragP->fr_fix += 6; /* account for bra/jmp instruction */
2991 subseg_change(SEG_TEXT,0);
2992 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
f6e504fe 2993 fragP->fr_offset, 0, NO_RELOC);
fecd2382
RP		 2994 fragP->fr_fix += 4;
2995 }
f6e504fe 2996
fecd2382
RP		 2997 frag_wane(fragP);
2998 break;
f6e504fe 2999 } /* case TAB(DBCC,SZ_UNDEF) */
fecd2382 3000
f6e504fe
RP		 3001 case TAB(BRANCH,SZ_UNDEF): {
3002 if((fragP->fr_symbol != NULL) /* Not absolute */
3003 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3004 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
3005 break;
3006 } else if((fragP->fr_symbol == 0) || flagseen['m']) {
3007 /* On 68000, or for absolute value, switch to abs long */
3008 /* FIXME, we should check abs val, pick short or long */
3009 if(fragP->fr_opcode[0]==0x61) {
3010 fragP->fr_opcode[0]= 0x4E;
3011 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3012 subseg_change(SEG_TEXT, 0);
3013 fix_new(fragP, fragP->fr_fix, 4,
3014 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3015 fragP->fr_fix+=4;
3016 frag_wane(fragP);
3017 } else if(fragP->fr_opcode[0]==0x60) {
3018 fragP->fr_opcode[0]= 0x4E;
3019 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3020 subseg_change(SEG_TEXT, 0);
3021 fix_new(fragP, fragP->fr_fix, 4,
3022 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3023 fragP->fr_fix+=4;
3024 frag_wane(fragP);
3025 } else {
3026 as_warn("Long branch offset to extern symbol not supported.");
3027 }
3028 } else { /* Symbol is still undefined. Make it simple */
3029 fix_new(fragP, (int)(fragP->fr_fix), 4, fragP->fr_symbol,
3030 (symbolS *)0, fragP->fr_offset+4, 1, NO_RELOC);
3031 fragP->fr_fix+=4;
3032 fragP->fr_opcode[1]=0xff;
3033 frag_wane(fragP);
3034 break;
3035 }
dd61f09e
RP		 3036
3037 break;
f6e504fe
RP		 3038 } /* case TAB(BRANCH,SZ_UNDEF) */
3039
3040 case TAB(PCLEA,SZ_UNDEF): {
3041 if ((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
fecd2382
RP		 3042 fragP->fr_subtype=TAB(PCLEA,SHORT);
3043 fragP->fr_var+=2;
3044 } else {
3045 fragP->fr_subtype=TAB(PCLEA,LONG);
3046 fragP->fr_var+=6;
3047 }
3048 break;
f6e504fe
RP		 3049 } /* TAB(PCLEA,SZ_UNDEF) */
3050
3051 case TAB(PCREL,SZ_UNDEF): {
3052 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3053 fragP->fr_subtype = TAB(PCREL,SHORT);
3054 fragP->fr_var += 2;
3055 } else {
3056 fragP->fr_subtype = TAB(PCREL,LONG);
3057 fragP->fr_var += 4;
3058 }
3059 break;
3060 } /* TAB(PCREL,SZ_UNDEF) */
fecd2382
RP		 3061
3062 default:
3063 break;
dd61f09e
RP		 3064
3065 } /* switch on subtype looking for SZ_UNDEF's. */
fecd2382
RP		 3066
3067 /* now that SZ_UNDEF are taken care of, check others */
3068 switch(fragP->fr_subtype) {
3069 case TAB(BCC68000,BYTE):
3070 case TAB(BRANCH,BYTE):
3071 /* We can't do a short jump to the next instruction,
3072 so we force word mode. */
f6e504fe 3073 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
fecd2382
RP		 3074 fragP->fr_symbol->sy_frag==fragP->fr_next) {
3075 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3076 fragP->fr_var+=2;
3077 }
3078 break;
3079 default:
3080 break;
3081 }
3082 return fragP->fr_var + fragP->fr_fix - old_fix;
3083}
3084
3085#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3086/* the bit-field entries in the relocation_info struct plays hell
3087 with the byte-order problems of cross-assembly. So as a hack,
3088 I added this mach. dependent ri twiddler. Ugly, but it gets
3089 you there. -KWK */
3090/* on m68k: first 4 bytes are normal unsigned long, next three bytes
3091are symbolnum, most sig. byte first. Last byte is broken up with
3092bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3093nibble as nuthin. (on Sun 3 at least) */
3094/* Translate the internal relocation information into target-specific
3095 format. */
a79c6033 3096#ifdef comment
fecd2382
RP		 3097void
3098md_ri_to_chars(the_bytes, ri)
3099 char *the_bytes;
3100 struct reloc_info_generic *ri;
3101{
3102 /* this is easy */
3103 md_number_to_chars(the_bytes, ri->r_address, 4);
3104 /* now the fun stuff */
3105 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3106 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3107 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3108 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3109 ((ri->r_extern << 4) & 0x10));
3110}
a79c6033
RP		 3111#endif /* comment */
3112
3113void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
3114char *where;
3115fixS *fixP;
3116relax_addressT segment_address_in_file;
3117{
3118 /*
3119 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3120 * Out: GNU LD relocation length code: 0, 1, or 2.
3121 */
3122
3123 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
3124
3125 long r_extern;
3126 long r_symbolnum;
3127
3128 /* this is easy */
3129 md_number_to_chars(where,
3130 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
3131 4);
3132
3133 /* now the fun stuff */
3134 if (S_GET_TYPE(fixP->fx_addsy) == N_UNDF) {
3135 r_extern = 1;
3136 r_symbolnum = fixP->fx_addsy->sy_number;
3137 } else {
3138 r_extern = 0;
3139 r_symbolnum = S_GET_TYPE(fixP->fx_addsy);
3140 }
3141
3142 where[4] = (r_symbolnum >> 16) & 0x0ff;
3143 where[5] = (r_symbolnum >> 8) & 0x0ff;
3144 where[6] = r_symbolnum & 0x0ff;
3145 where[7] = (((fixP->fx_pcrel << 7) & 0x80) | ((nbytes_r_length[fixP->fx_size] << 5) & 0x60) |
3146 ((r_extern << 4) & 0x10));
3147
3148 return;
3149} /* tc_aout_fix_to_chars() */
3150
fecd2382
RP		 3151#endif /* OBJ_AOUT or OBJ_BOUT */
3152
3153#ifndef WORKING_DOT_WORD
3154const int md_short_jump_size = 4;
3155const int md_long_jump_size = 6;
3156
3157void
3158md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3159char *ptr;
3160long from_addr,
3161 to_addr;
3162fragS *frag;
3163symbolS *to_symbol;
3164{
3165 long offset;
3166
3167 offset = to_addr - (from_addr+2);
3168
3169 md_number_to_chars(ptr ,(long)0x6000,2);
3170 md_number_to_chars(ptr+2,(long)offset,2);
3171}
3172
3173void
3174md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3175char *ptr;
3176long from_addr,
3177 to_addr;
3178fragS *frag;
3179symbolS *to_symbol;
3180{
3181 long offset;
3182
f6e504fe 3183 if (flagseen['m']) {
fecd2382
RP		 3184 offset=to_addr-S_GET_VALUE(to_symbol);
3185 md_number_to_chars(ptr ,(long)0x4EF9,2);
3186 md_number_to_chars(ptr+2,(long)offset,4);
3187 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3188 NO_RELOC);
3189 } else {
3190 offset=to_addr - (from_addr+2);
3191 md_number_to_chars(ptr ,(long)0x60ff,2);
3192 md_number_to_chars(ptr+2,(long)offset,4);
3193 }
3194}
3195
3196#endif
3197/* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3198
3199 0: Everything is OK
3200 10: Absolute 1:8 only
3201 20: Absolute 0:7 only
3202 30: absolute 0:15 only
3203 40: Absolute 0:31 only
3204 50: absolute 0:127 only
3205 55: absolute -64:63 only
3206 60: absolute -128:127 only
3207 70: absolute 0:4095 only
3208 80: No bignums
3209
3210*/
3211
3212static int get_num(exp,ok)
3213struct m68k_exp *exp;
3214int ok;
3215{
3216#ifdef TEST2
3217 long l = 0;
3218
3219 if(!exp->e_beg)
3220 return 0;
3221 if(*exp->e_beg=='0') {
3222 if(exp->e_beg[1]=='x')
3223 sscanf(exp->e_beg+2,"%x",&l);
3224 else
3225 sscanf(exp->e_beg+1,"%O",&l);
3226 return l;
3227 }
3228 return atol(exp->e_beg);
3229#else
3230 char *save_in;
3231 char c_save;
3232
3233 if(!exp) {
3234 /* Can't do anything */
3235 return 0;
3236 }
3237 if(!exp->e_beg || !exp->e_end) {
3238 seg(exp)=SEG_ABSOLUTE;
3239 adds(exp)=0;
3240 subs(exp)=0;
3241 offs(exp)= (ok==10) ? 1 : 0;
f6e504fe 3242 as_warn("Null expression defaults to %ld",offs(exp));
fecd2382
RP		 3243 return 0;
3244 }
3245
3246 exp->e_siz=0;
3247 if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
3248 switch(exp->e_end[0]) {
3249 case 's':
3250 case 'S':
3251 case 'b':
3252 case 'B':
3253 exp->e_siz=1;
3254 break;
3255 case 'w':
3256 case 'W':
3257 exp->e_siz=2;
3258 break;
3259 case 'l':
3260 case 'L':
3261 exp->e_siz=3;
3262 break;
3263 default:
f6e504fe 3264 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
fecd2382
RP		 3265 }
3266 exp->e_end-=2;
3267 }
3268 c_save=exp->e_end[1];
3269 exp->e_end[1]='\0';
3270 save_in=input_line_pointer;
3271 input_line_pointer=exp->e_beg;
3272 switch(expression(&(exp->e_exp))) {
3273 case SEG_PASS1:
3274 seg(exp)=SEG_ABSOLUTE;
3275 adds(exp)=0;
3276 subs(exp)=0;
3277 offs(exp)= (ok==10) ? 1 : 0;
f6e504fe 3278 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
fecd2382
RP		 3279 break;
3280
3281 case SEG_ABSENT:
3282 /* Do the same thing the VAX asm does */
3283 seg(exp)=SEG_ABSOLUTE;
3284 adds(exp)=0;
3285 subs(exp)=0;
3286 offs(exp)=0;
3287 if(ok==10) {
f6e504fe 3288 as_warn("expression out of range: defaulting to 1");
fecd2382
RP		 3289 offs(exp)=1;
3290 }
3291 break;
3292 case SEG_ABSOLUTE:
3293 switch(ok) {
3294 case 10:
3295 if(offs(exp)<1 || offs(exp)>8) {
f6e504fe 3296 as_warn("expression out of range: defaulting to 1");
fecd2382
RP		 3297 offs(exp)=1;
3298 }
3299 break;
3300 case 20:
3301 if(offs(exp)<0 || offs(exp)>7)
3302 goto outrange;
3303 break;
3304 case 30:
3305 if(offs(exp)<0 || offs(exp)>15)
3306 goto outrange;
3307 break;
3308 case 40:
3309 if(offs(exp)<0 || offs(exp)>32)
3310 goto outrange;
3311 break;
3312 case 50:
3313 if(offs(exp)<0 || offs(exp)>127)
3314 goto outrange;
3315 break;
3316 case 55:
3317 if(offs(exp)<-64 || offs(exp)>63)
3318 goto outrange;
3319 break;
3320 case 60:
3321 if(offs(exp)<-128 || offs(exp)>127)
3322 goto outrange;
3323 break;
3324 case 70:
3325 if(offs(exp)<0 || offs(exp)>4095) {
3326 outrange:
f6e504fe 3327 as_warn("expression out of range: defaulting to 0");
fecd2382
RP		 3328 offs(exp)=0;
3329 }
3330 break;
3331 default:
3332 break;
3333 }
3334 break;
3335 case SEG_TEXT:
3336 case SEG_DATA:
3337 case SEG_BSS:
3338 case SEG_UNKNOWN:
3339 case SEG_DIFFERENCE:
3340 if(ok>=10 && ok<=70) {
3341 seg(exp)=SEG_ABSOLUTE;
3342 adds(exp)=0;
3343 subs(exp)=0;
3344 offs(exp)= (ok==10) ? 1 : 0;
f6e504fe 3345 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
fecd2382
RP		 3346 }
3347 break;
3348 case SEG_BIG:
3349 if(ok==80 && offs(exp)<0) { /* HACK! Turn it into a long */
3350 LITTLENUM_TYPE words[6];
3351
3352 gen_to_words(words,2,8L);/* These numbers are magic! */
3353 seg(exp)=SEG_ABSOLUTE;
3354 adds(exp)=0;
3355 subs(exp)=0;
3356 offs(exp)=words[1]|(words[0]<<16);
3357 } else if(ok!=0) {
3358 seg(exp)=SEG_ABSOLUTE;
3359 adds(exp)=0;
3360 subs(exp)=0;
3361 offs(exp)= (ok==10) ? 1 : 0;
f6e504fe 3362 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
fecd2382
RP		 3363 }
3364 break;
3365 default:
ac1ac0cd 3366 as_fatal("failed sanity check.");
fecd2382
RP		 3367 }
3368 if(input_line_pointer!=exp->e_end+1)
3369 as_bad("Ignoring junk after expression");
3370 exp->e_end[1]=c_save;
3371 input_line_pointer=save_in;
3372 if(exp->e_siz) {
3373 switch(exp->e_siz) {
3374 case 1:
3375 if(!isbyte(offs(exp)))
f6e504fe 3376 as_warn("expression doesn't fit in BYTE");
fecd2382
RP		 3377 break;
3378 case 2:
3379 if(!isword(offs(exp)))
f6e504fe 3380 as_warn("expression doesn't fit in WORD");
fecd2382
RP		 3381 break;
3382 }
3383 }
3384 return offs(exp);
3385#endif
3386} /* get_num() */
3387
3388/* These are the back-ends for the various machine dependent pseudo-ops. */
f6e504fe 3389void demand_empty_rest_of_line(); /* Hate those extra verbose names */
fecd2382
RP		 3390
3391static void s_data1() {
3392 subseg_new(SEG_DATA,1);
3393 demand_empty_rest_of_line();
3394} /* s_data1() */
3395
3396static void s_data2() {
3397 subseg_new(SEG_DATA,2);
3398 demand_empty_rest_of_line();
3399} /* s_data2() */
3400
3401static void s_bss() {
3402 /* We don't support putting frags in the BSS segment, but we
3403 can put them into initialized data for now... */
3404 subseg_new(SEG_DATA,255); /* FIXME-SOON */
3405 demand_empty_rest_of_line();
3406} /* s_bss() */
3407
3408static void s_even() {
3409 register int temp;
3410 register long temp_fill;
3411
3412 temp = 1; /* JF should be 2? */
3413 temp_fill = get_absolute_expression ();
3414 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3415 frag_align (temp, (int)temp_fill);
3416 demand_empty_rest_of_line();
3417} /* s_even() */
3418
3419static void s_proc() {
3420 demand_empty_rest_of_line();
3421} /* s_proc() */
3422
3423/* s_space is defined in read.c .skip is simply an alias to it. */
3424
3425int
3426md_parse_option(argP,cntP,vecP)
3427char **argP;
3428int *cntP;
3429char ***vecP;
3430{
3431 switch(**argP) {
f6e504fe
RP		 3432 case 'l': /* -l means keep external to 2 bit offset
3433 rather than 16 bit one */
fecd2382
RP		 3434 break;
3435
dd61f09e
RP		 3436 case 'S': /* -S means that jbsr's always turn into jsr's. */
3437 break;
3438
fecd2382
RP		 3439 case 'm':
3440 /* Gas almost ignores this option! */
3441 (*argP)++;
3442 if(**argP=='c')
3443 (*argP)++;
3444 if(!strcmp(*argP,"68000"))
3445 flagseen['m']=2;
3446 else if(!strcmp(*argP,"68010")) {
3447#ifdef TE_SUN
f6e504fe 3448 omagic= 1<<16|OMAGIC;
fecd2382
RP		 3449#endif
3450 flagseen['m']=1;
3451 } else if(!strcmp(*argP,"68020"))
3452 flagseen['m']=0;
3453 else
3454 as_warn("Unknown -m option ignored");
3455 while(**argP)
3456 (*argP)++;
3457 break;
3458
3459 case 'p':
3460 if (!strcmp(*argP,"pic")) {
3461 (*argP) += 3;
3462 break; /* -pic, Position Independent Code */
3463 }
3464 else
3465 return 0;
3466 default:
3467 return 0;
3468 }
3469 return 1;
3470}
3471
3472
3473#ifdef TEST2
3474
3475/* TEST2: Test md_assemble() */
3476/* Warning, this routine probably doesn't work anymore */
3477
3478main()
3479{
3480 struct m68_it the_ins;
3481 char buf[120];
3482 char *cp;
3483 int n;
3484
3485 m68_ip_begin();
3486 for(;;) {
3487 if(!gets(buf) || !*buf)
3488 break;
3489 if(buf[0]=='|' || buf[1]=='.')
3490 continue;
3491 for(cp=buf;*cp;cp++)
3492 if(*cp=='\t')
3493 *cp=' ';
3494 if(is_label(buf))
3495 continue;
3496 bzero(&the_ins,sizeof(the_ins));
3497 m68_ip(&the_ins,buf);
3498 if(the_ins.error) {
3499 printf("Error %s in %s\n",the_ins.error,buf);
3500 } else {
3501 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3502 for(n=0;n<the_ins.numo;n++)
3503 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3504 printf(" ");
3505 print_the_insn(&the_ins.opcode[0],stdout);
3506 (void)putchar('\n');
3507 }
3508 for(n=0;n<strlen(the_ins.args)/2;n++) {
3509 if(the_ins.operands[n].error) {
3510 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3511 continue;
3512 }
3513 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3514 if(the_ins.operands[n].b_const)
3515 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3516 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3517 if(the_ins.operands[n].b_iadd)
3518 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3519 (void)putchar('\n');
3520 }
3521 }
3522 m68_ip_end();
3523 return 0;
3524}
3525
3526is_label(str)
3527char *str;
3528{
3529 while(*str==' ')
3530 str++;
3531 while(*str && *str!=' ')
3532 str++;
3533 if(str[-1]==':' || str[1]=='=')
3534 return 1;
3535 return 0;
3536}
3537
3538#endif
3539
3540/* Possible states for relaxation:
3541
35420 0 branch offset byte (bra, etc)
35430 1 word
35440 2 long
3545
35461 0 indexed offsets byte a0@(32,d4:w:1) etc
35471 1 word
35481 2 long
3549
35502 0 two-offset index word-word a0@(32,d4)@(45) etc
35512 1 word-long
35522 2 long-word
35532 3 long-long
3554
3555*/
3556
3557
3558
3559#ifdef DONTDEF
3560abort()
3561{
3562 printf("ABORT!\n");
3563 exit(12);
3564}
3565
3566char *index(s,c)
3567char *s;
3568{
3569 while(*s!=c) {
3570 if(!*s) return 0;
3571 s++;
3572 }
3573 return s;
3574}
3575
3576bzero(s,n)
3577char *s;
3578{
3579 while(n--)
3580 *s++=0;
3581}
3582
3583print_frags()
3584{
3585 fragS *fragP;
3586 extern fragS *text_frag_root;
3587
3588 for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
3589 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3590 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
3591 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
3592 }
3593 fflush(stdout);
3594 return 0;
3595}
3596#endif
3597
3598#ifdef DONTDEF
3599/*VARARGS1*/
3600panic(format,args)
3601char *format;
3602{
3603 fputs("Internal error:",stderr);
3604 _doprnt(format,&args,stderr);
3605 (void)putc('\n',stderr);
3606 as_where();
3607 abort();
3608}
3609#endif
3610
3611/* We have no need to default values of symbols. */
3612
3613/* ARGSUSED */
3614symbolS *
3615md_undefined_symbol (name)
3616 char *name;
3617{
3618 return 0;
3619}
3620
3621/* Parse an operand that is machine-specific.
3622 We just return without modifying the expression if we have nothing
3623 to do. */
3624
3625/* ARGSUSED */
3626void
3627md_operand (expressionP)
3628 expressionS *expressionP;
3629{
3630}
3631
3632/* Round up a section size to the appropriate boundary. */
3633long
3634md_section_align (segment, size)
3635 segT segment;
3636 long size;
3637{
3638 return size; /* Byte alignment is fine */
3639}
3640
3641/* Exactly what point is a PC-relative offset relative TO?
3642 On the 68k, they're relative to the address of the offset, plus
3643 its size. (??? Is this right? FIXME-SOON!) */
3644long
3645md_pcrel_from (fixP)
3646 fixS *fixP;
3647{
3648 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
3649}
3650
3651/* Opcode table for m68000/m68020 and m68881.
3652 Copyright (C) 1989, Free Software Foundation.
3653
3654This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
3655
3656Both GDB and GAS are free software; you can redistribute and/or modify
3657it under the terms of the GNU General Public License as published by
f6e504fe 3658the Free Software Foundation; either version 2, or (at your option)
fecd2382
RP		 3659any later version.
3660
3661GDB and GAS are distributed in the hope that it will be useful,
3662but WITHOUT ANY WARRANTY; without even the implied warranty of
3663MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3664GNU General Public License for more details.
3665
3666You should have received a copy of the GNU General Public License
3667along with GDB or GAS; see the file COPYING. If not, write to
3668the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
3669
3670/* We store four bytes of opcode for all opcodes because that
3671 is the most any of them need. The actual length of an instruction
3672 is always at least 2 bytes, and is as much longer as necessary to
3673 hold the operands it has.
3674
3675 The match component is a mask saying which bits must match
3676 particular opcode in order for an instruction to be an instance
3677 of that opcode.
3678
3679 The args component is a string containing two characters
3680 for each operand of the instruction. The first specifies
3681 the kind of operand; the second, the place it is stored. */
3682
3683/* Kinds of operands:
3684 D data register only. Stored as 3 bits.
3685 A address register only. Stored as 3 bits.
3686 R either kind of register. Stored as 4 bits.
3687 F floating point coprocessor register only. Stored as 3 bits.
3688 O an offset (or width): immediate data 0-31 or data register.
3689 Stored as 6 bits in special format for BF... insns.
3690 + autoincrement only. Stored as 3 bits (number of the address register).
3691 - autodecrement only. Stored as 3 bits (number of the address register).
3692 Q quick immediate data. Stored as 3 bits.
3693 This matches an immediate operand only when value is in range 1 .. 8.
3694 M moveq immediate data. Stored as 8 bits.
3695 This matches an immediate operand only when value is in range -128..127
3696 T trap vector immediate data. Stored as 4 bits.
3697
3698 k K-factor for fmove.p instruction. Stored as a 7-bit constant or
3699 a three bit register offset, depending on the field type.
3700
3701 # immediate data. Stored in special places (b, w or l)
3702 which say how many bits to store.
3703 ^ immediate data for floating point instructions. Special places
3704 are offset by 2 bytes from '#'...
3705 B pc-relative address, converted to an offset
3706 that is treated as immediate data.
3707 d displacement and register. Stores the register as 3 bits
3708 and stores the displacement in the entire second word.
3709
3710 C the CCR. No need to store it; this is just for filtering validity.
3711 S the SR. No need to store, just as with CCR.
3712 U the USP. No need to store, just as with CCR.
3713
3714 I Coprocessor ID. Not printed if 1. The Coprocessor ID is always
3715 extracted from the 'd' field of word one, which means that an extended
3716 coprocessor opcode can be skipped using the 'i' place, if needed.
3717
3718 s System Control register for the floating point coprocessor.
3719 S List of system control registers for floating point coprocessor.
3720
3721 J Misc register for movec instruction, stored in 'j' format.
3722 Possible values:
3723 000 SFC Source Function Code reg
3724 001 DFC Data Function Code reg
3725 002 CACR Cache Control Register
3726 800 USP User Stack Pointer
3727 801 VBR Vector Base reg
3728 802 CAAR Cache Address Register
3729 803 MSP Master Stack Pointer
3730 804 ISP Interrupt Stack Pointer
3731
3732 L Register list of the type d0-d7/a0-a7 etc.
3733 (New! Improved! Can also hold fp0-fp7, as well!)
3734 The assembler tries to see if the registers match the insn by
3735 looking at where the insn wants them stored.
3736
3737 l Register list like L, but with all the bits reversed.
3738 Used for going the other way. . .
3739
3740 They are all stored as 6 bits using an address mode and a register number;
3741 they differ in which addressing modes they match.
3742
3743 * all (modes 0-6,7.*)
3744 ~ alterable memory (modes 2-6,7.0,7.1)(not 0,1,7.~)
3745 % alterable (modes 0-6,7.0,7.1)(not 7.~)
3746 ; data (modes 0,2-6,7.*)(not 1)
3747 @ data, but not immediate (modes 0,2-6,7.? ? ?)(not 1,7.?) This may really be ;, the 68020 book says it is
3748 ! control (modes 2,5,6,7.*-)(not 0,1,3,4,7.4)
3749 & alterable control (modes 2,5,6,7.0,7.1)(not 0,1,7.? ? ?)
3750 $ alterable data (modes 0,2-6,7.0,7.1)(not 1,7.~)
3751 ? alterable control, or data register (modes 0,2,5,6,7.0,7.1)(not 1,3,4,7.~)
3752 / control, or data register (modes 0,2,5,6,7.0,7.1,7.2,7.3)(not 1,3,4,7.4)
3753*/
3754
3755/* JF: for the 68851 */
3756/*
3757 I didn't use much imagination in choosing the
3758 following codes, so many of them aren't very
3759 mnemonic. -rab
3760
3761 P pmmu register
3762 Possible values:
3763 000 TC Translation Control reg
3764 100 CAL Current Access Level
3765 101 VAL Validate Access Level
3766 110 SCC Stack Change Control
3767 111 AC Access Control
3768
3769 W wide pmmu registers
3770 Possible values:
3771 001 DRP Dma Root Pointer
3772 010 SRP Supervisor Root Pointer
3773 011 CRP Cpu Root Pointer
3774
3775 f function code register
3776 0 SFC
3777 1 DFC
3778
3779 V VAL register only
3780
3781 X BADx, BACx
3782 100 BAD Breakpoint Acknowledge Data
3783 101 BAC Breakpoint Acknowledge Control
3784
3785 Y PSR
3786 Z PCSR
3787
3788 | memory (modes 2-6, 7.*)
3789
3790*/
3791
3792/* Places to put an operand, for non-general operands:
3793 s source, low bits of first word.
3794 d dest, shifted 9 in first word
3795 1 second word, shifted 12
3796 2 second word, shifted 6
3797 3 second word, shifted 0
3798 4 third word, shifted 12
3799 5 third word, shifted 6
3800 6 third word, shifted 0
3801 7 second word, shifted 7
3802 8 second word, shifted 10
3803 D store in both place 1 and place 3; for divul and divsl.
3804 b second word, low byte
3805 w second word (entire)
3806 l second and third word (entire)
3807 g branch offset for bra and similar instructions.
3808 The place to store depends on the magnitude of offset.
3809 t store in both place 7 and place 8; for floating point operations
3810 c branch offset for cpBcc operations.
3811 The place to store is word two if bit six of word one is zero,
3812 and words two and three if bit six of word one is one.
3813 i Increment by two, to skip over coprocessor extended operands. Only
3814 works with the 'I' format.
3815 k Dynamic K-factor field. Bits 6-4 of word 2, used as a register number.
3816 Also used for dynamic fmovem instruction.
3817 C floating point coprocessor constant - 7 bits. Also used for static
3818 K-factors...
3819 j Movec register #, stored in 12 low bits of second word.
3820
3821 Places to put operand, for general operands:
3822 d destination, shifted 6 bits in first word
3823 b source, at low bit of first word, and immediate uses one byte
3824 w source, at low bit of first word, and immediate uses two bytes
3825 l source, at low bit of first word, and immediate uses four bytes
3826 s source, at low bit of first word.
3827 Used sometimes in contexts where immediate is not allowed anyway.
3828 f single precision float, low bit of 1st word, immediate uses 4 bytes
3829 F double precision float, low bit of 1st word, immediate uses 8 bytes
3830 x extended precision float, low bit of 1st word, immediate uses 12 bytes
3831 p packed float, low bit of 1st word, immediate uses 12 bytes
3832*/
3833
3834#define one(x) ((x) << 16)
3835#define two(x, y) (((x) << 16) + y)
3836
3837/*
3838 * Local Variables:
3839 * comment-column: 0
3840 * fill-column: 131
3841 * End:
3842 */
3843
3844/* end of tc-m68k.c */
GDB Binutils - Deliverables
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