Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-mcore.c -- Assemble code for M*Core |
04f8d83b | 2 | Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007 |
f17c130b | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
d7f1f2b0 | 18 | along with GAS; see the file COPYING. If not, write to the Free |
4b4da160 NC |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "as.h" |
252b5132 RH |
23 | #include "subsegs.h" |
24 | #define DEFINE_TABLE | |
25 | #include "../opcodes/mcore-opc.h" | |
3882b010 | 26 | #include "safe-ctype.h" |
252b5132 RH |
27 | |
28 | #ifdef OBJ_ELF | |
29 | #include "elf/mcore.h" | |
30 | #endif | |
31 | ||
32 | #ifndef streq | |
33 | #define streq(a,b) (strcmp (a, b) == 0) | |
34 | #endif | |
35 | ||
36 | /* Forward declarations for dumb compilers. */ | |
252b5132 RH |
37 | |
38 | /* Several places in this file insert raw instructions into the | |
39 | object. They should use MCORE_INST_XXX macros to get the opcodes | |
40 | and then use these two macros to crack the MCORE_INST value into | |
41 | the appropriate byte values. */ | |
bec50466 NC |
42 | #define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) |
43 | #define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) | |
252b5132 RH |
44 | |
45 | const char comment_chars[] = "#/"; | |
46 | const char line_separator_chars[] = ";"; | |
47 | const char line_comment_chars[] = "#/"; | |
48 | ||
eaa15ab8 | 49 | static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ |
252b5132 RH |
50 | static int sifilter_mode = 0; |
51 | ||
52 | const char EXP_CHARS[] = "eE"; | |
53 | ||
eaa15ab8 NC |
54 | /* Chars that mean this number is a floating point constant |
55 | As in 0f12.456 | |
56 | or 0d1.2345e12 */ | |
252b5132 RH |
57 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
58 | ||
59 | #define C(what,length) (((what) << 2) + (length)) | |
60 | #define GET_WHAT(x) ((x >> 2)) | |
61 | ||
ea1562b3 | 62 | /* These are the two types of relaxable instruction. */ |
252b5132 RH |
63 | #define COND_JUMP 1 |
64 | #define UNCD_JUMP 2 | |
65 | ||
66 | #define UNDEF_DISP 0 | |
93c2a809 AM |
67 | #define DISP12 1 |
68 | #define DISP32 2 | |
69 | #define UNDEF_WORD_DISP 3 | |
252b5132 RH |
70 | |
71 | #define C12_LEN 2 | |
ea1562b3 | 72 | #define C32_LEN 10 /* Allow for align. */ |
252b5132 | 73 | #define U12_LEN 2 |
ea1562b3 | 74 | #define U32_LEN 8 /* Allow for align. */ |
252b5132 | 75 | |
bec50466 NC |
76 | typedef enum |
77 | { | |
78 | M210, | |
79 | M340 | |
80 | } | |
81 | cpu_type; | |
82 | ||
83 | cpu_type cpu = M340; | |
252b5132 | 84 | |
eaa15ab8 | 85 | /* Initialize the relax table. */ |
ea1562b3 NC |
86 | const relax_typeS md_relax_table[] = |
87 | { | |
e66457fb AM |
88 | { 0, 0, 0, 0 }, |
89 | { 0, 0, 0, 0 }, | |
90 | { 0, 0, 0, 0 }, | |
91 | { 0, 0, 0, 0 }, | |
92 | ||
93 | /* COND_JUMP */ | |
94 | { 0, 0, 0, 0 }, /* UNDEF_DISP */ | |
95 | { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ | |
96 | { 0, 0, C32_LEN, 0 }, /* DISP32 */ | |
97 | { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ | |
98 | ||
99 | /* UNCD_JUMP */ | |
5d6255fe KH |
100 | { 0, 0, 0, 0 }, /* UNDEF_DISP */ |
101 | { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ | |
102 | { 0, 0, U32_LEN, 0 }, /* DISP32 */ | |
e66457fb AM |
103 | { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ |
104 | ||
252b5132 RH |
105 | }; |
106 | ||
eaa15ab8 | 107 | /* Literal pool data structures. */ |
252b5132 RH |
108 | struct literal |
109 | { | |
110 | unsigned short refcnt; | |
111 | unsigned char ispcrel; | |
112 | unsigned char unused; | |
113 | expressionS e; | |
114 | }; | |
115 | ||
116 | #define MAX_POOL_SIZE (1024/4) | |
117 | static struct literal litpool [MAX_POOL_SIZE]; | |
118 | static unsigned poolsize; | |
119 | static unsigned poolnumber; | |
120 | static unsigned long poolspan; | |
121 | ||
122 | /* SPANPANIC: the point at which we get too scared and force a dump | |
123 | of the literal pool, and perhaps put a branch in place. | |
124 | Calculated as: | |
125 | 1024 span of lrw/jmpi/jsri insn (actually span+1) | |
126 | -2 possible alignment at the insn. | |
127 | -2 possible alignment to get the table aligned. | |
128 | -2 an inserted branch around the table. | |
129 | == 1018 | |
130 | at 1018, we might be in trouble. | |
131 | -- so we have to be smaller than 1018 and since we deal with 2-byte | |
132 | instructions, the next good choice is 1016. | |
133 | -- Note we have a test case that fails when we've got 1018 here. */ | |
eaa15ab8 | 134 | #define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ |
252b5132 RH |
135 | #define SPANCLOSE (900) |
136 | #define SPANEXIT (600) | |
ea1562b3 | 137 | static symbolS * poolsym; /* Label for current pool. */ |
252b5132 | 138 | static char poolname[8]; |
eaa15ab8 | 139 | static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ |
252b5132 | 140 | |
ea1562b3 NC |
141 | #define POOL_END_LABEL ".LE" |
142 | #define POOL_START_LABEL ".LS" | |
143 | ||
144 | static void | |
145 | make_name (char * s, char * p, int n) | |
252b5132 | 146 | { |
ea1562b3 | 147 | static const char hex[] = "0123456789ABCDEF"; |
252b5132 | 148 | |
ea1562b3 NC |
149 | s[0] = p[0]; |
150 | s[1] = p[1]; | |
151 | s[2] = p[2]; | |
152 | s[3] = hex[(n >> 12) & 0xF]; | |
153 | s[4] = hex[(n >> 8) & 0xF]; | |
154 | s[5] = hex[(n >> 4) & 0xF]; | |
155 | s[6] = hex[(n) & 0xF]; | |
156 | s[7] = 0; | |
157 | } | |
252b5132 | 158 | |
ea1562b3 NC |
159 | static void |
160 | dump_literals (int isforce) | |
161 | { | |
162 | unsigned int i; | |
163 | struct literal * p; | |
164 | symbolS * brarsym = NULL; | |
a75214e5 | 165 | |
ea1562b3 NC |
166 | if (poolsize == 0) |
167 | return; | |
168 | ||
169 | /* Must we branch around the literal table? */ | |
170 | if (isforce) | |
171 | { | |
172 | char * output; | |
173 | char brarname[8]; | |
174 | ||
175 | make_name (brarname, POOL_END_LABEL, poolnumber); | |
176 | ||
177 | brarsym = symbol_make (brarname); | |
178 | ||
179 | symbol_table_insert (brarsym); | |
180 | ||
181 | output = frag_var (rs_machine_dependent, | |
182 | md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, | |
183 | md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, | |
184 | C (UNCD_JUMP, 0), brarsym, 0, 0); | |
185 | output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ | |
186 | output[1] = INST_BYTE1 (MCORE_INST_BR); | |
187 | } | |
188 | ||
189 | /* Make sure that the section is sufficiently aligned and that | |
190 | the literal table is aligned within it. */ | |
191 | record_alignment (now_seg, 2); | |
192 | frag_align (2, 0, 0); | |
193 | ||
194 | colon (S_GET_NAME (poolsym)); | |
195 | ||
196 | for (i = 0, p = litpool; i < poolsize; i++, p++) | |
197 | emit_expr (& p->e, 4); | |
198 | ||
199 | if (brarsym != NULL) | |
200 | colon (S_GET_NAME (brarsym)); | |
201 | ||
202 | poolsize = 0; | |
203 | } | |
252b5132 RH |
204 | |
205 | static void | |
ea1562b3 | 206 | mcore_s_literals (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
207 | { |
208 | dump_literals (0); | |
209 | demand_empty_rest_of_line (); | |
210 | } | |
211 | ||
5f8075fa AM |
212 | /* Perform FUNC (ARG), and track number of bytes added to frag. */ |
213 | ||
252b5132 | 214 | static void |
ea1562b3 | 215 | mcore_pool_count (void (*func) (int), int arg) |
252b5132 | 216 | { |
5f8075fa AM |
217 | const fragS *curr_frag = frag_now; |
218 | offsetT added = -frag_now_fix_octets (); | |
a75214e5 | 219 | |
5f8075fa | 220 | (*func) (arg); |
a75214e5 | 221 | |
5f8075fa AM |
222 | while (curr_frag != frag_now) |
223 | { | |
224 | added += curr_frag->fr_fix; | |
225 | curr_frag = curr_frag->fr_next; | |
252b5132 | 226 | } |
a75214e5 | 227 | |
5f8075fa AM |
228 | added += frag_now_fix_octets (); |
229 | poolspan += added; | |
230 | } | |
231 | ||
232 | static void | |
ea1562b3 NC |
233 | check_literals (int kind, int offset) |
234 | { | |
235 | poolspan += offset; | |
236 | ||
237 | /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. | |
238 | SPANPANIC means that we must dump now. | |
239 | kind == 0 is any old instruction. | |
240 | kind > 0 means we just had a control transfer instruction. | |
241 | kind == 1 means within a function | |
242 | kind == 2 means we just left a function | |
243 | ||
244 | The dump_literals (1) call inserts a branch around the table, so | |
245 | we first look to see if its a situation where we won't have to | |
246 | insert a branch (e.g., the previous instruction was an unconditional | |
247 | branch). | |
248 | ||
249 | SPANPANIC is the point where we must dump a single-entry pool. | |
250 | it accounts for alignments and an inserted branch. | |
251 | the 'poolsize*2' accounts for the scenario where we do: | |
252 | lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 | |
253 | Note that the 'lit2' reference is 2 bytes further along | |
254 | but the literal it references will be 4 bytes further along, | |
255 | so we must consider the poolsize into this equation. | |
256 | This is slightly over-cautious, but guarantees that we won't | |
257 | panic because a relocation is too distant. */ | |
258 | ||
259 | if (poolspan > SPANCLOSE && kind > 0) | |
260 | dump_literals (0); | |
261 | else if (poolspan > SPANEXIT && kind > 1) | |
262 | dump_literals (0); | |
263 | else if (poolspan >= (SPANPANIC - poolsize * 2)) | |
264 | dump_literals (1); | |
265 | } | |
266 | ||
267 | static void | |
268 | mcore_cons (int nbytes) | |
5f8075fa AM |
269 | { |
270 | if (now_seg == text_section) | |
271 | mcore_pool_count (cons, nbytes); | |
272 | else | |
273 | cons (nbytes); | |
252b5132 RH |
274 | |
275 | /* In theory we ought to call check_literals (2,0) here in case | |
276 | we need to dump the literal table. We cannot do this however, | |
277 | as the directives that we are intercepting may be being used | |
278 | to build a switch table, and we must not interfere with its | |
a75214e5 | 279 | contents. Instead we cross our fingers and pray... */ |
252b5132 RH |
280 | } |
281 | ||
282 | static void | |
ea1562b3 | 283 | mcore_float_cons (int float_type) |
252b5132 RH |
284 | { |
285 | if (now_seg == text_section) | |
5f8075fa AM |
286 | mcore_pool_count (float_cons, float_type); |
287 | else | |
288 | float_cons (float_type); | |
a75214e5 | 289 | |
252b5132 RH |
290 | /* See the comment in mcore_cons () about calling check_literals. |
291 | It is unlikely that a switch table will be constructed using | |
292 | floating point values, but it is still likely that an indexed | |
293 | table of floating point constants is being created by these | |
294 | directives, so again we must not interfere with their placement. */ | |
295 | } | |
296 | ||
297 | static void | |
ea1562b3 | 298 | mcore_stringer (int append_zero) |
252b5132 RH |
299 | { |
300 | if (now_seg == text_section) | |
5f8075fa AM |
301 | mcore_pool_count (stringer, append_zero); |
302 | else | |
303 | stringer (append_zero); | |
252b5132 RH |
304 | |
305 | /* We call check_literals here in case a large number of strings are | |
306 | being placed into the text section with a sequence of stringer | |
307 | directives. In theory we could be upsetting something if these | |
308 | strings are actually in an indexed table instead of referenced by | |
309 | individual labels. Let us hope that that never happens. */ | |
310 | check_literals (2, 0); | |
311 | } | |
312 | ||
bcef92fa | 313 | static void |
ea1562b3 | 314 | mcore_fill (int unused) |
bcef92fa NC |
315 | { |
316 | if (now_seg == text_section) | |
5f8075fa AM |
317 | mcore_pool_count (s_fill, unused); |
318 | else | |
319 | s_fill (unused); | |
bcef92fa | 320 | |
4c1102fd | 321 | check_literals (2, 0); |
bcef92fa NC |
322 | } |
323 | ||
16b93d88 NC |
324 | /* Handle the section changing pseudo-ops. These call through to the |
325 | normal implementations, but they dump the literal pool first. */ | |
ea1562b3 | 326 | |
252b5132 | 327 | static void |
ea1562b3 | 328 | mcore_s_text (int ignore) |
252b5132 RH |
329 | { |
330 | dump_literals (0); | |
a75214e5 | 331 | |
16b93d88 NC |
332 | #ifdef OBJ_ELF |
333 | obj_elf_text (ignore); | |
334 | #else | |
252b5132 | 335 | s_text (ignore); |
16b93d88 | 336 | #endif |
252b5132 RH |
337 | } |
338 | ||
339 | static void | |
ea1562b3 | 340 | mcore_s_data (int ignore) |
252b5132 RH |
341 | { |
342 | dump_literals (0); | |
a75214e5 | 343 | |
16b93d88 NC |
344 | #ifdef OBJ_ELF |
345 | obj_elf_data (ignore); | |
346 | #else | |
252b5132 | 347 | s_data (ignore); |
16b93d88 NC |
348 | #endif |
349 | } | |
350 | ||
351 | static void | |
ea1562b3 | 352 | mcore_s_section (int ignore) |
16b93d88 | 353 | { |
bcef92fa NC |
354 | /* Scan forwards to find the name of the section. If the section |
355 | being switched to is ".line" then this is a DWARF1 debug section | |
67c1ffbe | 356 | which is arbitrarily placed inside generated code. In this case |
bcef92fa NC |
357 | do not dump the literal pool because it is a) inefficient and |
358 | b) would require the generation of extra code to jump around the | |
359 | pool. */ | |
360 | char * ilp = input_line_pointer; | |
361 | ||
3882b010 | 362 | while (*ilp != 0 && ISSPACE (*ilp)) |
bcef92fa NC |
363 | ++ ilp; |
364 | ||
365 | if (strncmp (ilp, ".line", 5) == 0 | |
3882b010 | 366 | && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) |
bcef92fa NC |
367 | ; |
368 | else | |
369 | dump_literals (0); | |
16b93d88 NC |
370 | |
371 | #ifdef OBJ_ELF | |
372 | obj_elf_section (ignore); | |
373 | #endif | |
374 | #ifdef OBJ_COFF | |
375 | obj_coff_section (ignore); | |
376 | #endif | |
252b5132 RH |
377 | } |
378 | ||
16b93d88 | 379 | static void |
ea1562b3 | 380 | mcore_s_bss (int needs_align) |
16b93d88 NC |
381 | { |
382 | dump_literals (0); | |
a75214e5 | 383 | |
16b93d88 NC |
384 | s_lcomm_bytes (needs_align); |
385 | } | |
386 | ||
387 | #ifdef OBJ_ELF | |
388 | static void | |
ea1562b3 | 389 | mcore_s_comm (int needs_align) |
16b93d88 NC |
390 | { |
391 | dump_literals (0); | |
a75214e5 | 392 | |
16b93d88 NC |
393 | obj_elf_common (needs_align); |
394 | } | |
395 | #endif | |
396 | ||
ea1562b3 NC |
397 | /* This table describes all the machine specific pseudo-ops the assembler |
398 | has to support. The fields are: | |
399 | Pseudo-op name without dot | |
400 | Function to call to execute this pseudo-op | |
401 | Integer arg to pass to the function. */ | |
402 | const pseudo_typeS md_pseudo_table[] = | |
403 | { | |
404 | { "export", s_globl, 0 }, | |
405 | { "import", s_ignore, 0 }, | |
406 | { "literals", mcore_s_literals, 0 }, | |
407 | { "page", listing_eject, 0 }, | |
408 | ||
409 | /* The following are to intercept the placement of data into the text | |
410 | section (eg addresses for a switch table), so that the space they | |
411 | occupy can be taken into account when deciding whether or not to | |
412 | dump the current literal pool. | |
413 | XXX - currently we do not cope with the .space and .dcb.d directives. */ | |
414 | { "ascii", mcore_stringer, 0 }, | |
415 | { "asciz", mcore_stringer, 1 }, | |
416 | { "byte", mcore_cons, 1 }, | |
417 | { "dc", mcore_cons, 2 }, | |
418 | { "dc.b", mcore_cons, 1 }, | |
419 | { "dc.d", mcore_float_cons, 'd'}, | |
420 | { "dc.l", mcore_cons, 4 }, | |
421 | { "dc.s", mcore_float_cons, 'f'}, | |
422 | { "dc.w", mcore_cons, 2 }, | |
423 | { "dc.x", mcore_float_cons, 'x'}, | |
424 | { "double", mcore_float_cons, 'd'}, | |
425 | { "float", mcore_float_cons, 'f'}, | |
426 | { "hword", mcore_cons, 2 }, | |
427 | { "int", mcore_cons, 4 }, | |
428 | { "long", mcore_cons, 4 }, | |
429 | { "octa", mcore_cons, 16 }, | |
430 | { "quad", mcore_cons, 8 }, | |
431 | { "short", mcore_cons, 2 }, | |
432 | { "single", mcore_float_cons, 'f'}, | |
433 | { "string", mcore_stringer, 1 }, | |
434 | { "word", mcore_cons, 2 }, | |
435 | { "fill", mcore_fill, 0 }, | |
436 | ||
437 | /* Allow for the effect of section changes. */ | |
438 | { "text", mcore_s_text, 0 }, | |
439 | { "data", mcore_s_data, 0 }, | |
440 | { "bss", mcore_s_bss, 1 }, | |
441 | #ifdef OBJ_ELF | |
442 | { "comm", mcore_s_comm, 0 }, | |
443 | #endif | |
444 | { "section", mcore_s_section, 0 }, | |
445 | { "section.s", mcore_s_section, 0 }, | |
446 | { "sect", mcore_s_section, 0 }, | |
447 | { "sect.s", mcore_s_section, 0 }, | |
448 | ||
449 | { 0, 0, 0 } | |
450 | }; | |
451 | ||
252b5132 | 452 | /* This function is called once, at assembler startup time. This should |
bcef92fa | 453 | set up all the tables, etc that the MD part of the assembler needs. */ |
ea1562b3 | 454 | |
252b5132 | 455 | void |
ea1562b3 | 456 | md_begin (void) |
252b5132 | 457 | { |
5ff37431 | 458 | const mcore_opcode_info * opcode; |
252b5132 RH |
459 | char * prev_name = ""; |
460 | ||
461 | opcode_hash_control = hash_new (); | |
462 | ||
ea1562b3 | 463 | /* Insert unique names into hash table. */ |
252b5132 RH |
464 | for (opcode = mcore_table; opcode->name; opcode ++) |
465 | { | |
5ff37431 | 466 | if (! streq (prev_name, opcode->name)) |
252b5132 RH |
467 | { |
468 | prev_name = opcode->name; | |
469 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
470 | } | |
471 | } | |
472 | } | |
473 | ||
252b5132 | 474 | /* Get a log2(val). */ |
ea1562b3 | 475 | |
252b5132 | 476 | static int |
ea1562b3 | 477 | mylog2 (unsigned int val) |
252b5132 | 478 | { |
ea1562b3 NC |
479 | int log = -1; |
480 | ||
481 | while (val != 0) | |
252b5132 | 482 | { |
5f8075fa AM |
483 | log ++; |
484 | val >>= 1; | |
252b5132 | 485 | } |
a75214e5 | 486 | |
ea1562b3 | 487 | return log; |
252b5132 RH |
488 | } |
489 | ||
490 | /* Try to parse a reg name. */ | |
ea1562b3 | 491 | |
252b5132 | 492 | static char * |
ea1562b3 | 493 | parse_reg (char * s, unsigned * reg) |
252b5132 RH |
494 | { |
495 | /* Strip leading whitespace. */ | |
3882b010 | 496 | while (ISSPACE (* s)) |
252b5132 | 497 | ++ s; |
a75214e5 | 498 | |
3882b010 | 499 | if (TOLOWER (s[0]) == 'r') |
252b5132 RH |
500 | { |
501 | if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') | |
502 | { | |
503 | *reg = 10 + s[2] - '0'; | |
504 | return s + 3; | |
505 | } | |
a75214e5 | 506 | |
252b5132 RH |
507 | if (s[1] >= '0' && s[1] <= '9') |
508 | { | |
509 | *reg = s[1] - '0'; | |
510 | return s + 2; | |
511 | } | |
512 | } | |
3882b010 L |
513 | else if ( TOLOWER (s[0]) == 's' |
514 | && TOLOWER (s[1]) == 'p' | |
515 | && ! ISALNUM (s[2])) | |
252b5132 RH |
516 | { |
517 | * reg = 0; | |
518 | return s + 2; | |
519 | } | |
a75214e5 | 520 | |
252b5132 RH |
521 | as_bad (_("register expected, but saw '%.6s'"), s); |
522 | return s; | |
523 | } | |
524 | ||
525 | static struct Cregs | |
526 | { | |
527 | char * name; | |
528 | unsigned int crnum; | |
529 | } | |
530 | cregs[] = | |
531 | { | |
532 | { "psr", 0}, | |
533 | { "vbr", 1}, | |
534 | { "epsr", 2}, | |
535 | { "fpsr", 3}, | |
536 | { "epc", 4}, | |
537 | { "fpc", 5}, | |
538 | { "ss0", 6}, | |
539 | { "ss1", 7}, | |
540 | { "ss2", 8}, | |
541 | { "ss3", 9}, | |
542 | { "ss4", 10}, | |
543 | { "gcr", 11}, | |
544 | { "gsr", 12}, | |
545 | { "", 0} | |
546 | }; | |
547 | ||
548 | static char * | |
ea1562b3 | 549 | parse_creg (char * s, unsigned * reg) |
252b5132 RH |
550 | { |
551 | int i; | |
552 | ||
553 | /* Strip leading whitespace. */ | |
3882b010 | 554 | while (ISSPACE (* s)) |
252b5132 | 555 | ++s; |
a75214e5 | 556 | |
3882b010 | 557 | if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) |
252b5132 RH |
558 | { |
559 | if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') | |
560 | { | |
561 | *reg = 30 + s[3] - '0'; | |
562 | return s + 4; | |
563 | } | |
a75214e5 | 564 | |
252b5132 RH |
565 | if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') |
566 | { | |
567 | *reg = 20 + s[3] - '0'; | |
568 | return s + 4; | |
569 | } | |
a75214e5 | 570 | |
252b5132 RH |
571 | if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') |
572 | { | |
573 | *reg = 10 + s[3] - '0'; | |
574 | return s + 4; | |
575 | } | |
a75214e5 | 576 | |
252b5132 RH |
577 | if (s[2] >= '0' && s[2] <= '9') |
578 | { | |
579 | *reg = s[2] - '0'; | |
580 | return s + 3; | |
581 | } | |
582 | } | |
a75214e5 | 583 | |
252b5132 RH |
584 | /* Look at alternate creg names before giving error. */ |
585 | for (i = 0; cregs[i].name[0] != '\0'; i++) | |
586 | { | |
587 | char buf [10]; | |
588 | int length; | |
589 | int j; | |
a75214e5 | 590 | |
252b5132 | 591 | length = strlen (cregs[i].name); |
a75214e5 | 592 | |
252b5132 | 593 | for (j = 0; j < length; j++) |
3882b010 | 594 | buf[j] = TOLOWER (s[j]); |
a75214e5 | 595 | |
252b5132 RH |
596 | if (strncmp (cregs[i].name, buf, length) == 0) |
597 | { | |
598 | *reg = cregs[i].crnum; | |
599 | return s + length; | |
600 | } | |
601 | } | |
a75214e5 | 602 | |
252b5132 | 603 | as_bad (_("control register expected, but saw '%.6s'"), s); |
a75214e5 | 604 | |
252b5132 RH |
605 | return s; |
606 | } | |
607 | ||
bec50466 | 608 | static char * |
ea1562b3 | 609 | parse_psrmod (char * s, unsigned * reg) |
bec50466 NC |
610 | { |
611 | int i; | |
612 | char buf[10]; | |
613 | static struct psrmods | |
614 | { | |
615 | char * name; | |
616 | unsigned int value; | |
617 | } | |
618 | psrmods[] = | |
619 | { | |
620 | { "ie", 1 }, | |
621 | { "fe", 2 }, | |
622 | { "ee", 4 }, | |
623 | { "af", 8 } /* Really 0 and non-combinable. */ | |
624 | }; | |
a75214e5 | 625 | |
bec50466 | 626 | for (i = 0; i < 2; i++) |
3882b010 | 627 | buf[i] = TOLOWER (s[i]); |
a75214e5 | 628 | |
bec50466 NC |
629 | for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) |
630 | { | |
631 | if (! strncmp (psrmods[i].name, buf, 2)) | |
632 | { | |
5f8075fa | 633 | * reg = psrmods[i].value; |
a75214e5 | 634 | |
5f8075fa | 635 | return s + 2; |
bec50466 NC |
636 | } |
637 | } | |
a75214e5 | 638 | |
bec50466 | 639 | as_bad (_("bad/missing psr specifier")); |
a75214e5 | 640 | |
bec50466 | 641 | * reg = 0; |
a75214e5 | 642 | |
bec50466 NC |
643 | return s; |
644 | } | |
645 | ||
252b5132 | 646 | static char * |
ea1562b3 | 647 | parse_exp (char * s, expressionS * e) |
252b5132 RH |
648 | { |
649 | char * save; | |
650 | char * new; | |
651 | ||
652 | /* Skip whitespace. */ | |
3882b010 | 653 | while (ISSPACE (* s)) |
252b5132 | 654 | ++ s; |
a75214e5 | 655 | |
252b5132 RH |
656 | save = input_line_pointer; |
657 | input_line_pointer = s; | |
658 | ||
659 | expression (e); | |
a75214e5 | 660 | |
252b5132 RH |
661 | if (e->X_op == O_absent) |
662 | as_bad (_("missing operand")); | |
a75214e5 | 663 | |
252b5132 RH |
664 | new = input_line_pointer; |
665 | input_line_pointer = save; | |
a75214e5 | 666 | |
252b5132 RH |
667 | return new; |
668 | } | |
669 | ||
252b5132 | 670 | static int |
ea1562b3 | 671 | enter_literal (expressionS * e, int ispcrel) |
252b5132 | 672 | { |
aa699a2c | 673 | unsigned int i; |
252b5132 RH |
674 | struct literal * p; |
675 | ||
676 | if (poolsize >= MAX_POOL_SIZE - 2) | |
ea1562b3 NC |
677 | /* The literal pool is as full as we can handle. We have |
678 | to be 2 entries shy of the 1024/4=256 entries because we | |
679 | have to allow for the branch (2 bytes) and the alignment | |
680 | (2 bytes before the first insn referencing the pool and | |
681 | 2 bytes before the pool itself) == 6 bytes, rounds up | |
682 | to 2 entries. */ | |
683 | dump_literals (1); | |
252b5132 RH |
684 | |
685 | if (poolsize == 0) | |
686 | { | |
687 | /* Create new literal pool. */ | |
688 | if (++ poolnumber > 0xFFFF) | |
689 | as_fatal (_("more than 65K literal pools")); | |
a75214e5 | 690 | |
b8a40f53 | 691 | make_name (poolname, POOL_START_LABEL, poolnumber); |
252b5132 RH |
692 | poolsym = symbol_make (poolname); |
693 | symbol_table_insert (poolsym); | |
694 | poolspan = 0; | |
695 | } | |
a75214e5 | 696 | |
252b5132 RH |
697 | /* Search pool for value so we don't have duplicates. */ |
698 | for (p = litpool, i = 0; i < poolsize; i++, p++) | |
699 | { | |
700 | if (e->X_op == p->e.X_op | |
701 | && e->X_add_symbol == p->e.X_add_symbol | |
702 | && e->X_add_number == p->e.X_add_number | |
703 | && ispcrel == p->ispcrel) | |
704 | { | |
705 | p->refcnt ++; | |
706 | return i; | |
707 | } | |
708 | } | |
709 | ||
710 | p->refcnt = 1; | |
711 | p->ispcrel = ispcrel; | |
712 | p->e = * e; | |
a75214e5 | 713 | |
252b5132 RH |
714 | poolsize ++; |
715 | ||
a75214e5 | 716 | return i; |
252b5132 RH |
717 | } |
718 | ||
719 | /* Parse a literal specification. -- either new or old syntax. | |
720 | old syntax: the user supplies the label and places the literal. | |
721 | new syntax: we put it into the literal pool. */ | |
ea1562b3 | 722 | |
252b5132 | 723 | static char * |
ea1562b3 NC |
724 | parse_rt (char * s, |
725 | char ** outputp, | |
726 | int ispcrel, | |
727 | expressionS * ep) | |
252b5132 RH |
728 | { |
729 | expressionS e; | |
730 | int n; | |
a75214e5 | 731 | |
252b5132 RH |
732 | if (ep) |
733 | /* Indicate nothing there. */ | |
734 | ep->X_op = O_absent; | |
a75214e5 | 735 | |
252b5132 RH |
736 | if (*s == '[') |
737 | { | |
738 | s = parse_exp (s + 1, & e); | |
a75214e5 | 739 | |
252b5132 RH |
740 | if (*s == ']') |
741 | s++; | |
742 | else | |
743 | as_bad (_("missing ']'")); | |
744 | } | |
745 | else | |
746 | { | |
747 | s = parse_exp (s, & e); | |
a75214e5 | 748 | |
252b5132 | 749 | n = enter_literal (& e, ispcrel); |
a75214e5 | 750 | |
252b5132 RH |
751 | if (ep) |
752 | *ep = e; | |
753 | ||
754 | /* Create a reference to pool entry. */ | |
755 | e.X_op = O_symbol; | |
756 | e.X_add_symbol = poolsym; | |
757 | e.X_add_number = n << 2; | |
758 | } | |
a75214e5 | 759 | |
252b5132 RH |
760 | * outputp = frag_more (2); |
761 | ||
762 | fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, | |
763 | BFD_RELOC_MCORE_PCREL_IMM8BY4); | |
764 | ||
765 | return s; | |
766 | } | |
767 | ||
768 | static char * | |
ea1562b3 NC |
769 | parse_imm (char * s, |
770 | unsigned * val, | |
771 | unsigned min, | |
772 | unsigned max) | |
252b5132 RH |
773 | { |
774 | char * new; | |
775 | expressionS e; | |
a75214e5 | 776 | |
252b5132 | 777 | new = parse_exp (s, & e); |
a75214e5 | 778 | |
252b5132 RH |
779 | if (e.X_op == O_absent) |
780 | ; /* An error message has already been emitted. */ | |
781 | else if (e.X_op != O_constant) | |
782 | as_bad (_("operand must be a constant")); | |
aa699a2c AM |
783 | else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) |
784 | as_bad (_("operand must be absolute in range %u..%u, not %ld"), | |
785 | min, max, (long) e.X_add_number); | |
252b5132 RH |
786 | |
787 | * val = e.X_add_number; | |
a75214e5 | 788 | |
252b5132 RH |
789 | return new; |
790 | } | |
791 | ||
792 | static char * | |
ea1562b3 NC |
793 | parse_mem (char * s, |
794 | unsigned * reg, | |
795 | unsigned * off, | |
796 | unsigned siz) | |
252b5132 | 797 | { |
252b5132 | 798 | * off = 0; |
a75214e5 | 799 | |
3882b010 | 800 | while (ISSPACE (* s)) |
252b5132 | 801 | ++ s; |
a75214e5 | 802 | |
252b5132 RH |
803 | if (* s == '(') |
804 | { | |
805 | s = parse_reg (s + 1, reg); | |
806 | ||
3882b010 | 807 | while (ISSPACE (* s)) |
252b5132 | 808 | ++ s; |
a75214e5 | 809 | |
252b5132 RH |
810 | if (* s == ',') |
811 | { | |
812 | s = parse_imm (s + 1, off, 0, 63); | |
a75214e5 | 813 | |
252b5132 RH |
814 | if (siz > 1) |
815 | { | |
816 | if (siz > 2) | |
817 | { | |
818 | if (* off & 0x3) | |
819 | as_bad (_("operand must be a multiple of 4")); | |
a75214e5 | 820 | |
252b5132 RH |
821 | * off >>= 2; |
822 | } | |
823 | else | |
824 | { | |
825 | if (* off & 0x1) | |
826 | as_bad (_("operand must be a multiple of 2")); | |
a75214e5 | 827 | |
252b5132 RH |
828 | * off >>= 1; |
829 | } | |
830 | } | |
831 | } | |
a75214e5 | 832 | |
3882b010 | 833 | while (ISSPACE (* s)) |
252b5132 | 834 | ++ s; |
a75214e5 | 835 | |
252b5132 RH |
836 | if (* s == ')') |
837 | s ++; | |
838 | } | |
839 | else | |
840 | as_bad (_("base register expected")); | |
a75214e5 | 841 | |
252b5132 RH |
842 | return s; |
843 | } | |
844 | ||
845 | /* This is the guts of the machine-dependent assembler. STR points to a | |
846 | machine dependent instruction. This function is supposed to emit | |
847 | the frags/bytes it assembles to. */ | |
848 | ||
849 | void | |
ea1562b3 | 850 | md_assemble (char * str) |
252b5132 RH |
851 | { |
852 | char * op_start; | |
853 | char * op_end; | |
854 | mcore_opcode_info * opcode; | |
855 | char * output; | |
856 | int nlen = 0; | |
857 | unsigned short inst; | |
858 | unsigned reg; | |
859 | unsigned off; | |
860 | unsigned isize; | |
861 | expressionS e; | |
862 | char name[20]; | |
863 | ||
864 | /* Drop leading whitespace. */ | |
3882b010 | 865 | while (ISSPACE (* str)) |
252b5132 RH |
866 | str ++; |
867 | ||
868 | /* Find the op code end. */ | |
869 | for (op_start = op_end = str; | |
b75c0c92 | 870 | nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; |
252b5132 RH |
871 | op_end++) |
872 | { | |
873 | name[nlen] = op_start[nlen]; | |
874 | nlen++; | |
875 | } | |
a75214e5 | 876 | |
252b5132 | 877 | name [nlen] = 0; |
a75214e5 | 878 | |
252b5132 RH |
879 | if (nlen == 0) |
880 | { | |
881 | as_bad (_("can't find opcode ")); | |
882 | return; | |
883 | } | |
884 | ||
885 | opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name); | |
886 | if (opcode == NULL) | |
887 | { | |
888 | as_bad (_("unknown opcode \"%s\""), name); | |
889 | return; | |
890 | } | |
a75214e5 | 891 | |
252b5132 RH |
892 | inst = opcode->inst; |
893 | isize = 2; | |
a75214e5 | 894 | |
252b5132 RH |
895 | switch (opcode->opclass) |
896 | { | |
897 | case O0: | |
898 | output = frag_more (2); | |
899 | break; | |
a75214e5 | 900 | |
252b5132 RH |
901 | case OT: |
902 | op_end = parse_imm (op_end + 1, & reg, 0, 3); | |
903 | inst |= reg; | |
904 | output = frag_more (2); | |
905 | break; | |
a75214e5 | 906 | |
252b5132 RH |
907 | case O1: |
908 | op_end = parse_reg (op_end + 1, & reg); | |
909 | inst |= reg; | |
910 | output = frag_more (2); | |
911 | break; | |
a75214e5 | 912 | |
252b5132 RH |
913 | case JMP: |
914 | op_end = parse_reg (op_end + 1, & reg); | |
915 | inst |= reg; | |
916 | output = frag_more (2); | |
917 | /* In a sifilter mode, we emit this insn 2 times, | |
5f8075fa | 918 | fixes problem of an interrupt during a jmp.. */ |
252b5132 RH |
919 | if (sifilter_mode) |
920 | { | |
b8a40f53 NC |
921 | output[0] = INST_BYTE0 (inst); |
922 | output[1] = INST_BYTE1 (inst); | |
252b5132 RH |
923 | output = frag_more (2); |
924 | } | |
925 | break; | |
a75214e5 | 926 | |
252b5132 RH |
927 | case JSR: |
928 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 929 | |
252b5132 RH |
930 | if (reg == 15) |
931 | as_bad (_("invalid register: r15 illegal")); | |
a75214e5 | 932 | |
252b5132 RH |
933 | inst |= reg; |
934 | output = frag_more (2); | |
a75214e5 | 935 | |
252b5132 RH |
936 | if (sifilter_mode) |
937 | { | |
ea1562b3 NC |
938 | /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */ |
939 | inst = MCORE_INST_BSR; /* With 0 displacement. */ | |
b8a40f53 NC |
940 | output[0] = INST_BYTE0 (inst); |
941 | output[1] = INST_BYTE1 (inst); | |
252b5132 RH |
942 | |
943 | output = frag_more (2); | |
944 | inst = MCORE_INST_ADDI; | |
ea1562b3 NC |
945 | inst |= 15; /* addi r15,6 */ |
946 | inst |= (6 - 1) << 4; /* Over the jmp's. */ | |
b8a40f53 NC |
947 | output[0] = INST_BYTE0 (inst); |
948 | output[1] = INST_BYTE1 (inst); | |
252b5132 RH |
949 | |
950 | output = frag_more (2); | |
951 | inst = MCORE_INST_JMP | reg; | |
b8a40f53 NC |
952 | output[0] = INST_BYTE0 (inst); |
953 | output[1] = INST_BYTE1 (inst); | |
252b5132 | 954 | |
ea1562b3 NC |
955 | /* 2nd emitted in fallthrough. */ |
956 | output = frag_more (2); | |
252b5132 RH |
957 | } |
958 | break; | |
a75214e5 | 959 | |
252b5132 RH |
960 | case OC: |
961 | op_end = parse_reg (op_end + 1, & reg); | |
962 | inst |= reg; | |
a75214e5 | 963 | |
252b5132 | 964 | /* Skip whitespace. */ |
3882b010 | 965 | while (ISSPACE (* op_end)) |
252b5132 | 966 | ++ op_end; |
a75214e5 | 967 | |
252b5132 RH |
968 | if (*op_end == ',') |
969 | { | |
970 | op_end = parse_creg (op_end + 1, & reg); | |
971 | inst |= reg << 4; | |
972 | } | |
a75214e5 | 973 | |
252b5132 RH |
974 | output = frag_more (2); |
975 | break; | |
976 | ||
bec50466 NC |
977 | case MULSH: |
978 | if (cpu == M210) | |
979 | { | |
980 | as_bad (_("M340 specific opcode used when assembling for M210")); | |
981 | break; | |
982 | } | |
a75214e5 | 983 | /* drop through... */ |
252b5132 RH |
984 | case O2: |
985 | op_end = parse_reg (op_end + 1, & reg); | |
986 | inst |= reg; | |
a75214e5 | 987 | |
252b5132 | 988 | /* Skip whitespace. */ |
3882b010 | 989 | while (ISSPACE (* op_end)) |
252b5132 | 990 | ++ op_end; |
a75214e5 | 991 | |
252b5132 RH |
992 | if (* op_end == ',') |
993 | { | |
994 | op_end = parse_reg (op_end + 1, & reg); | |
995 | inst |= reg << 4; | |
996 | } | |
997 | else | |
998 | as_bad (_("second operand missing")); | |
a75214e5 | 999 | |
252b5132 RH |
1000 | output = frag_more (2); |
1001 | break; | |
a75214e5 | 1002 | |
ea1562b3 NC |
1003 | case X1: |
1004 | /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */ | |
252b5132 | 1005 | op_end = parse_reg (op_end + 1, & reg); |
a75214e5 | 1006 | |
252b5132 | 1007 | /* Skip whitespace. */ |
3882b010 | 1008 | while (ISSPACE (* op_end)) |
252b5132 | 1009 | ++ op_end; |
a75214e5 | 1010 | |
ea1562b3 | 1011 | if (* op_end == ',') /* xtrb- r1,rx. */ |
252b5132 RH |
1012 | { |
1013 | if (reg != 1) | |
1014 | as_bad (_("destination register must be r1")); | |
a75214e5 | 1015 | |
252b5132 RH |
1016 | op_end = parse_reg (op_end + 1, & reg); |
1017 | } | |
a75214e5 | 1018 | |
252b5132 RH |
1019 | inst |= reg; |
1020 | output = frag_more (2); | |
1021 | break; | |
a75214e5 | 1022 | |
ea1562b3 | 1023 | case O1R1: /* div- rx,r1. */ |
252b5132 RH |
1024 | op_end = parse_reg (op_end + 1, & reg); |
1025 | inst |= reg; | |
a75214e5 | 1026 | |
252b5132 | 1027 | /* Skip whitespace. */ |
3882b010 | 1028 | while (ISSPACE (* op_end)) |
252b5132 | 1029 | ++ op_end; |
a75214e5 | 1030 | |
252b5132 RH |
1031 | if (* op_end == ',') |
1032 | { | |
1033 | op_end = parse_reg (op_end + 1, & reg); | |
1034 | if (reg != 1) | |
1035 | as_bad (_("source register must be r1")); | |
1036 | } | |
1037 | else | |
1038 | as_bad (_("second operand missing")); | |
a75214e5 | 1039 | |
252b5132 RH |
1040 | output = frag_more (2); |
1041 | break; | |
a75214e5 | 1042 | |
252b5132 RH |
1043 | case OI: |
1044 | op_end = parse_reg (op_end + 1, & reg); | |
1045 | inst |= reg; | |
a75214e5 | 1046 | |
252b5132 | 1047 | /* Skip whitespace. */ |
3882b010 | 1048 | while (ISSPACE (* op_end)) |
252b5132 | 1049 | ++ op_end; |
a75214e5 | 1050 | |
252b5132 RH |
1051 | if (* op_end == ',') |
1052 | { | |
1053 | op_end = parse_imm (op_end + 1, & reg, 1, 32); | |
1054 | inst |= (reg - 1) << 4; | |
1055 | } | |
1056 | else | |
1057 | as_bad (_("second operand missing")); | |
a75214e5 | 1058 | |
252b5132 RH |
1059 | output = frag_more (2); |
1060 | break; | |
a75214e5 | 1061 | |
252b5132 RH |
1062 | case OB: |
1063 | op_end = parse_reg (op_end + 1, & reg); | |
1064 | inst |= reg; | |
a75214e5 | 1065 | |
252b5132 | 1066 | /* Skip whitespace. */ |
3882b010 | 1067 | while (ISSPACE (* op_end)) |
252b5132 | 1068 | ++ op_end; |
a75214e5 | 1069 | |
252b5132 RH |
1070 | if (* op_end == ',') |
1071 | { | |
1072 | op_end = parse_imm (op_end + 1, & reg, 0, 31); | |
1073 | inst |= reg << 4; | |
1074 | } | |
1075 | else | |
1076 | as_bad (_("second operand missing")); | |
a75214e5 | 1077 | |
252b5132 RH |
1078 | output = frag_more (2); |
1079 | break; | |
a75214e5 | 1080 | |
ea1562b3 NC |
1081 | case OB2: |
1082 | /* Like OB, but arg is 2^n instead of n. */ | |
252b5132 RH |
1083 | op_end = parse_reg (op_end + 1, & reg); |
1084 | inst |= reg; | |
a75214e5 | 1085 | |
252b5132 | 1086 | /* Skip whitespace. */ |
3882b010 | 1087 | while (ISSPACE (* op_end)) |
252b5132 | 1088 | ++ op_end; |
a75214e5 | 1089 | |
252b5132 RH |
1090 | if (* op_end == ',') |
1091 | { | |
1092 | op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); | |
a75214e5 | 1093 | /* Further restrict the immediate to a power of two. */ |
252b5132 | 1094 | if ((reg & (reg - 1)) == 0) |
f17c130b | 1095 | reg = mylog2 (reg); |
252b5132 RH |
1096 | else |
1097 | { | |
1098 | reg = 0; | |
1099 | as_bad (_("immediate is not a power of two")); | |
1100 | } | |
1101 | inst |= (reg) << 4; | |
1102 | } | |
1103 | else | |
1104 | as_bad (_("second operand missing")); | |
a75214e5 | 1105 | |
252b5132 RH |
1106 | output = frag_more (2); |
1107 | break; | |
a75214e5 KH |
1108 | |
1109 | case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ | |
252b5132 RH |
1110 | case OBRb: |
1111 | case OBRc: | |
1112 | op_end = parse_reg (op_end + 1, & reg); | |
1113 | inst |= reg; | |
a75214e5 | 1114 | |
252b5132 | 1115 | /* Skip whitespace. */ |
3882b010 | 1116 | while (ISSPACE (* op_end)) |
252b5132 | 1117 | ++ op_end; |
a75214e5 | 1118 | |
252b5132 RH |
1119 | if (* op_end == ',') |
1120 | { | |
1121 | op_end = parse_imm (op_end + 1, & reg, 0, 31); | |
ea1562b3 | 1122 | /* Immediate values of 0 -> 6 translate to movi. */ |
252b5132 RH |
1123 | if (reg <= 6) |
1124 | { | |
1125 | inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; | |
1126 | reg = 0x1 << reg; | |
1127 | as_warn (_("translating bgeni to movi")); | |
1128 | } | |
1129 | inst &= ~ 0x01f0; | |
1130 | inst |= reg << 4; | |
1131 | } | |
1132 | else | |
1133 | as_bad (_("second operand missing")); | |
a75214e5 | 1134 | |
252b5132 RH |
1135 | output = frag_more (2); |
1136 | break; | |
a75214e5 | 1137 | |
ea1562b3 | 1138 | case OBR2: /* Like OBR, but arg is 2^n instead of n. */ |
252b5132 RH |
1139 | op_end = parse_reg (op_end + 1, & reg); |
1140 | inst |= reg; | |
a75214e5 | 1141 | |
252b5132 | 1142 | /* Skip whitespace. */ |
3882b010 | 1143 | while (ISSPACE (* op_end)) |
252b5132 | 1144 | ++ op_end; |
a75214e5 | 1145 | |
252b5132 RH |
1146 | if (* op_end == ',') |
1147 | { | |
1148 | op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); | |
a75214e5 | 1149 | |
252b5132 RH |
1150 | /* Further restrict the immediate to a power of two. */ |
1151 | if ((reg & (reg - 1)) == 0) | |
f17c130b | 1152 | reg = mylog2 (reg); |
252b5132 RH |
1153 | else |
1154 | { | |
1155 | reg = 0; | |
1156 | as_bad (_("immediate is not a power of two")); | |
1157 | } | |
a75214e5 KH |
1158 | |
1159 | /* Immediate values of 0 -> 6 translate to movi. */ | |
252b5132 RH |
1160 | if (reg <= 6) |
1161 | { | |
1162 | inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; | |
1163 | reg = 0x1 << reg; | |
1164 | as_warn (_("translating mgeni to movi")); | |
1165 | } | |
a75214e5 | 1166 | |
252b5132 RH |
1167 | inst |= reg << 4; |
1168 | } | |
1169 | else | |
1170 | as_bad (_("second operand missing")); | |
a75214e5 | 1171 | |
252b5132 RH |
1172 | output = frag_more (2); |
1173 | break; | |
a75214e5 | 1174 | |
252b5132 RH |
1175 | case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ |
1176 | case OMb: | |
1177 | case OMc: | |
1178 | op_end = parse_reg (op_end + 1, & reg); | |
1179 | inst |= reg; | |
a75214e5 | 1180 | |
252b5132 | 1181 | /* Skip whitespace. */ |
3882b010 | 1182 | while (ISSPACE (* op_end)) |
252b5132 | 1183 | ++ op_end; |
a75214e5 | 1184 | |
252b5132 RH |
1185 | if (* op_end == ',') |
1186 | { | |
1187 | op_end = parse_imm (op_end + 1, & reg, 1, 32); | |
a75214e5 KH |
1188 | |
1189 | /* Immediate values of 1 -> 7 translate to movi. */ | |
252b5132 RH |
1190 | if (reg <= 7) |
1191 | { | |
1192 | inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; | |
1193 | reg = (0x1 << reg) - 1; | |
1194 | inst |= reg << 4; | |
a75214e5 | 1195 | |
252b5132 RH |
1196 | as_warn (_("translating bmaski to movi")); |
1197 | } | |
1198 | else | |
1199 | { | |
1200 | inst &= ~ 0x01F0; | |
1201 | inst |= (reg & 0x1F) << 4; | |
1202 | } | |
1203 | } | |
1204 | else | |
1205 | as_bad (_("second operand missing")); | |
a75214e5 | 1206 | |
252b5132 RH |
1207 | output = frag_more (2); |
1208 | break; | |
a75214e5 | 1209 | |
252b5132 RH |
1210 | case SI: |
1211 | op_end = parse_reg (op_end + 1, & reg); | |
1212 | inst |= reg; | |
a75214e5 | 1213 | |
252b5132 | 1214 | /* Skip whitespace. */ |
3882b010 | 1215 | while (ISSPACE (* op_end)) |
252b5132 | 1216 | ++ op_end; |
a75214e5 | 1217 | |
252b5132 RH |
1218 | if (* op_end == ',') |
1219 | { | |
1220 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
1221 | inst |= reg << 4; | |
1222 | } | |
1223 | else | |
1224 | as_bad (_("second operand missing")); | |
a75214e5 | 1225 | |
252b5132 RH |
1226 | output = frag_more (2); |
1227 | break; | |
1228 | ||
1229 | case I7: | |
1230 | op_end = parse_reg (op_end + 1, & reg); | |
1231 | inst |= reg; | |
a75214e5 | 1232 | |
252b5132 | 1233 | /* Skip whitespace. */ |
3882b010 | 1234 | while (ISSPACE (* op_end)) |
252b5132 | 1235 | ++ op_end; |
a75214e5 | 1236 | |
252b5132 RH |
1237 | if (* op_end == ',') |
1238 | { | |
1239 | op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); | |
1240 | inst |= reg << 4; | |
1241 | } | |
1242 | else | |
1243 | as_bad (_("second operand missing")); | |
a75214e5 | 1244 | |
252b5132 RH |
1245 | output = frag_more (2); |
1246 | break; | |
a75214e5 | 1247 | |
252b5132 RH |
1248 | case LS: |
1249 | op_end = parse_reg (op_end + 1, & reg); | |
1250 | inst |= reg << 8; | |
a75214e5 | 1251 | |
252b5132 | 1252 | /* Skip whitespace. */ |
3882b010 | 1253 | while (ISSPACE (* op_end)) |
252b5132 | 1254 | ++ op_end; |
a75214e5 | 1255 | |
252b5132 RH |
1256 | if (* op_end == ',') |
1257 | { | |
1258 | int size; | |
a75214e5 | 1259 | |
252b5132 RH |
1260 | if ((inst & 0x6000) == 0) |
1261 | size = 4; | |
1262 | else if ((inst & 0x6000) == 0x4000) | |
1263 | size = 2; | |
1264 | else if ((inst & 0x6000) == 0x2000) | |
1265 | size = 1; | |
aa699a2c AM |
1266 | else |
1267 | abort (); | |
a75214e5 | 1268 | |
252b5132 | 1269 | op_end = parse_mem (op_end + 1, & reg, & off, size); |
a75214e5 | 1270 | |
252b5132 RH |
1271 | if (off > 16) |
1272 | as_bad (_("displacement too large (%d)"), off); | |
1273 | else | |
1274 | inst |= (reg) | (off << 4); | |
1275 | } | |
1276 | else | |
1277 | as_bad (_("second operand missing")); | |
a75214e5 | 1278 | |
252b5132 RH |
1279 | output = frag_more (2); |
1280 | break; | |
a75214e5 | 1281 | |
252b5132 RH |
1282 | case LR: |
1283 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1284 | |
252b5132 RH |
1285 | if (reg == 0 || reg == 15) |
1286 | as_bad (_("Invalid register: r0 and r15 illegal")); | |
a75214e5 | 1287 | |
252b5132 | 1288 | inst |= (reg << 8); |
a75214e5 | 1289 | |
252b5132 | 1290 | /* Skip whitespace. */ |
3882b010 | 1291 | while (ISSPACE (* op_end)) |
252b5132 | 1292 | ++ op_end; |
a75214e5 | 1293 | |
252b5132 | 1294 | if (* op_end == ',') |
2d473ce9 NC |
1295 | { |
1296 | /* parse_rt calls frag_more() for us. */ | |
1297 | input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); | |
5f8075fa | 1298 | op_end = input_line_pointer; |
2d473ce9 | 1299 | } |
252b5132 RH |
1300 | else |
1301 | { | |
1302 | as_bad (_("second operand missing")); | |
1303 | output = frag_more (2); /* save its space */ | |
1304 | } | |
1305 | break; | |
a75214e5 | 1306 | |
252b5132 RH |
1307 | case LJ: |
1308 | input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); | |
1309 | /* parse_rt() calls frag_more() for us. */ | |
2d473ce9 | 1310 | op_end = input_line_pointer; |
252b5132 | 1311 | break; |
a75214e5 | 1312 | |
252b5132 RH |
1313 | case RM: |
1314 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1315 | |
252b5132 RH |
1316 | if (reg == 0 || reg == 15) |
1317 | as_bad (_("bad starting register: r0 and r15 invalid")); | |
a75214e5 | 1318 | |
252b5132 | 1319 | inst |= reg; |
a75214e5 | 1320 | |
252b5132 | 1321 | /* Skip whitespace. */ |
3882b010 | 1322 | while (ISSPACE (* op_end)) |
252b5132 | 1323 | ++ op_end; |
a75214e5 | 1324 | |
252b5132 RH |
1325 | if (* op_end == '-') |
1326 | { | |
1327 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1328 | |
252b5132 RH |
1329 | if (reg != 15) |
1330 | as_bad (_("ending register must be r15")); | |
a75214e5 | 1331 | |
252b5132 | 1332 | /* Skip whitespace. */ |
3882b010 | 1333 | while (ISSPACE (* op_end)) |
252b5132 RH |
1334 | ++ op_end; |
1335 | } | |
a75214e5 | 1336 | |
252b5132 RH |
1337 | if (* op_end == ',') |
1338 | { | |
1339 | op_end ++; | |
a75214e5 | 1340 | |
252b5132 | 1341 | /* Skip whitespace. */ |
3882b010 | 1342 | while (ISSPACE (* op_end)) |
252b5132 | 1343 | ++ op_end; |
a75214e5 | 1344 | |
252b5132 RH |
1345 | if (* op_end == '(') |
1346 | { | |
1347 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1348 | |
252b5132 RH |
1349 | if (reg != 0) |
1350 | as_bad (_("bad base register: must be r0")); | |
a75214e5 | 1351 | |
252b5132 RH |
1352 | if (* op_end == ')') |
1353 | op_end ++; | |
1354 | } | |
1355 | else | |
1356 | as_bad (_("base register expected")); | |
1357 | } | |
1358 | else | |
1359 | as_bad (_("second operand missing")); | |
a75214e5 | 1360 | |
252b5132 RH |
1361 | output = frag_more (2); |
1362 | break; | |
a75214e5 | 1363 | |
252b5132 RH |
1364 | case RQ: |
1365 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1366 | |
252b5132 RH |
1367 | if (reg != 4) |
1368 | as_fatal (_("first register must be r4")); | |
a75214e5 | 1369 | |
252b5132 | 1370 | /* Skip whitespace. */ |
3882b010 | 1371 | while (ISSPACE (* op_end)) |
252b5132 | 1372 | ++ op_end; |
a75214e5 | 1373 | |
252b5132 RH |
1374 | if (* op_end == '-') |
1375 | { | |
1376 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1377 | |
252b5132 RH |
1378 | if (reg != 7) |
1379 | as_fatal (_("last register must be r7")); | |
a75214e5 | 1380 | |
252b5132 | 1381 | /* Skip whitespace. */ |
3882b010 | 1382 | while (ISSPACE (* op_end)) |
252b5132 | 1383 | ++ op_end; |
a75214e5 | 1384 | |
252b5132 RH |
1385 | if (* op_end == ',') |
1386 | { | |
1387 | op_end ++; | |
a75214e5 | 1388 | |
252b5132 | 1389 | /* Skip whitespace. */ |
3882b010 | 1390 | while (ISSPACE (* op_end)) |
252b5132 | 1391 | ++ op_end; |
a75214e5 | 1392 | |
252b5132 RH |
1393 | if (* op_end == '(') |
1394 | { | |
1395 | op_end = parse_reg (op_end + 1, & reg); | |
a75214e5 | 1396 | |
252b5132 RH |
1397 | if (reg >= 4 && reg <= 7) |
1398 | as_fatal ("base register cannot be r4, r5, r6, or r7"); | |
a75214e5 | 1399 | |
252b5132 | 1400 | inst |= reg; |
a75214e5 | 1401 | |
252b5132 | 1402 | /* Skip whitespace. */ |
3882b010 | 1403 | while (ISSPACE (* op_end)) |
252b5132 | 1404 | ++ op_end; |
a75214e5 | 1405 | |
252b5132 RH |
1406 | if (* op_end == ')') |
1407 | op_end ++; | |
1408 | } | |
1409 | else | |
1410 | as_bad (_("base register expected")); | |
1411 | } | |
1412 | else | |
1413 | as_bad (_("second operand missing")); | |
1414 | } | |
1415 | else | |
1416 | as_bad (_("reg-reg expected")); | |
a75214e5 | 1417 | |
252b5132 RH |
1418 | output = frag_more (2); |
1419 | break; | |
a75214e5 | 1420 | |
252b5132 RH |
1421 | case BR: |
1422 | input_line_pointer = parse_exp (op_end + 1, & e); | |
2d473ce9 | 1423 | op_end = input_line_pointer; |
a75214e5 | 1424 | |
252b5132 | 1425 | output = frag_more (2); |
a75214e5 KH |
1426 | |
1427 | fix_new_exp (frag_now, output-frag_now->fr_literal, | |
252b5132 RH |
1428 | 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); |
1429 | break; | |
a75214e5 | 1430 | |
252b5132 RH |
1431 | case BL: |
1432 | op_end = parse_reg (op_end + 1, & reg); | |
1433 | inst |= reg << 4; | |
a75214e5 | 1434 | |
252b5132 | 1435 | /* Skip whitespace. */ |
3882b010 | 1436 | while (ISSPACE (* op_end)) |
252b5132 | 1437 | ++ op_end; |
a75214e5 | 1438 | |
252b5132 RH |
1439 | if (* op_end == ',') |
1440 | { | |
1441 | op_end = parse_exp (op_end + 1, & e); | |
1442 | output = frag_more (2); | |
a75214e5 KH |
1443 | |
1444 | fix_new_exp (frag_now, output-frag_now->fr_literal, | |
252b5132 RH |
1445 | 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); |
1446 | } | |
1447 | else | |
1448 | { | |
1449 | as_bad (_("second operand missing")); | |
1450 | output = frag_more (2); | |
1451 | } | |
1452 | break; | |
a75214e5 | 1453 | |
252b5132 RH |
1454 | case JC: |
1455 | input_line_pointer = parse_exp (op_end + 1, & e); | |
2d473ce9 | 1456 | op_end = input_line_pointer; |
a75214e5 | 1457 | |
252b5132 | 1458 | output = frag_var (rs_machine_dependent, |
93c2a809 AM |
1459 | md_relax_table[C (COND_JUMP, DISP32)].rlx_length, |
1460 | md_relax_table[C (COND_JUMP, DISP12)].rlx_length, | |
252b5132 RH |
1461 | C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); |
1462 | isize = C32_LEN; | |
1463 | break; | |
a75214e5 | 1464 | |
252b5132 RH |
1465 | case JU: |
1466 | input_line_pointer = parse_exp (op_end + 1, & e); | |
2d473ce9 NC |
1467 | op_end = input_line_pointer; |
1468 | ||
252b5132 | 1469 | output = frag_var (rs_machine_dependent, |
93c2a809 AM |
1470 | md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, |
1471 | md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, | |
252b5132 RH |
1472 | C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); |
1473 | isize = U32_LEN; | |
1474 | break; | |
a75214e5 | 1475 | |
252b5132 RH |
1476 | case JL: |
1477 | inst = MCORE_INST_JSRI; /* jsri */ | |
1478 | input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); | |
bcef92fa | 1479 | /* parse_rt() calls frag_more for us. */ |
2d473ce9 | 1480 | op_end = input_line_pointer; |
a75214e5 KH |
1481 | |
1482 | /* Only do this if we know how to do it ... */ | |
252b5132 RH |
1483 | if (e.X_op != O_absent && do_jsri2bsr) |
1484 | { | |
1485 | /* Look at adding the R_PCREL_JSRIMM11BY2. */ | |
a75214e5 | 1486 | fix_new_exp (frag_now, output-frag_now->fr_literal, |
252b5132 RH |
1487 | 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); |
1488 | } | |
1489 | break; | |
1490 | ||
ea1562b3 NC |
1491 | case RSI: |
1492 | /* SI, but imm becomes 32-imm. */ | |
252b5132 RH |
1493 | op_end = parse_reg (op_end + 1, & reg); |
1494 | inst |= reg; | |
a75214e5 | 1495 | |
252b5132 | 1496 | /* Skip whitespace. */ |
3882b010 | 1497 | while (ISSPACE (* op_end)) |
252b5132 | 1498 | ++ op_end; |
a75214e5 | 1499 | |
252b5132 RH |
1500 | if (* op_end == ',') |
1501 | { | |
1502 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
a75214e5 | 1503 | |
252b5132 RH |
1504 | reg = 32 - reg; |
1505 | inst |= reg << 4; | |
1506 | } | |
1507 | else | |
1508 | as_bad (_("second operand missing")); | |
a75214e5 | 1509 | |
252b5132 RH |
1510 | output = frag_more (2); |
1511 | break; | |
a75214e5 | 1512 | |
252b5132 RH |
1513 | case DO21: /* O2, dup rd, lit must be 1 */ |
1514 | op_end = parse_reg (op_end + 1, & reg); | |
1515 | inst |= reg; | |
1516 | inst |= reg << 4; | |
a75214e5 | 1517 | |
252b5132 | 1518 | /* Skip whitespace. */ |
3882b010 | 1519 | while (ISSPACE (* op_end)) |
252b5132 | 1520 | ++ op_end; |
a75214e5 | 1521 | |
252b5132 RH |
1522 | if (* op_end == ',') |
1523 | { | |
1524 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
a75214e5 | 1525 | |
252b5132 RH |
1526 | if (reg != 1) |
1527 | as_bad (_("second operand must be 1")); | |
1528 | } | |
1529 | else | |
1530 | as_bad (_("second operand missing")); | |
a75214e5 | 1531 | |
252b5132 RH |
1532 | output = frag_more (2); |
1533 | break; | |
a75214e5 | 1534 | |
252b5132 RH |
1535 | case SIa: |
1536 | op_end = parse_reg (op_end + 1, & reg); | |
1537 | inst |= reg; | |
a75214e5 | 1538 | |
252b5132 | 1539 | /* Skip whitespace. */ |
3882b010 | 1540 | while (ISSPACE (* op_end)) |
252b5132 | 1541 | ++ op_end; |
a75214e5 | 1542 | |
252b5132 RH |
1543 | if (* op_end == ',') |
1544 | { | |
1545 | op_end = parse_imm (op_end + 1, & reg, 1, 31); | |
1546 | ||
1547 | if (reg == 0) | |
1548 | as_bad (_("zero used as immediate value")); | |
a75214e5 | 1549 | |
252b5132 RH |
1550 | inst |= reg << 4; |
1551 | } | |
1552 | else | |
1553 | as_bad (_("second operand missing")); | |
a75214e5 | 1554 | |
252b5132 RH |
1555 | output = frag_more (2); |
1556 | break; | |
1557 | ||
bec50466 NC |
1558 | case OPSR: |
1559 | if (cpu == M210) | |
1560 | { | |
1561 | as_bad (_("M340 specific opcode used when assembling for M210")); | |
1562 | break; | |
1563 | } | |
a75214e5 | 1564 | |
bec50466 | 1565 | op_end = parse_psrmod (op_end + 1, & reg); |
a75214e5 | 1566 | |
bec50466 NC |
1567 | /* Look for further selectors. */ |
1568 | while (* op_end == ',') | |
1569 | { | |
1570 | unsigned value; | |
a75214e5 | 1571 | |
bec50466 | 1572 | op_end = parse_psrmod (op_end + 1, & value); |
a75214e5 | 1573 | |
bec50466 NC |
1574 | if (value & reg) |
1575 | as_bad (_("duplicated psr bit specifier")); | |
a75214e5 | 1576 | |
bec50466 NC |
1577 | reg |= value; |
1578 | } | |
a75214e5 | 1579 | |
bec50466 NC |
1580 | if (reg > 8) |
1581 | as_bad (_("`af' must appear alone")); | |
a75214e5 | 1582 | |
bec50466 NC |
1583 | inst |= (reg & 0x7); |
1584 | output = frag_more (2); | |
1585 | break; | |
a75214e5 | 1586 | |
252b5132 RH |
1587 | default: |
1588 | as_bad (_("unimplemented opcode \"%s\""), name); | |
1589 | } | |
2d473ce9 NC |
1590 | |
1591 | /* Drop whitespace after all the operands have been parsed. */ | |
3882b010 | 1592 | while (ISSPACE (* op_end)) |
2d473ce9 NC |
1593 | op_end ++; |
1594 | ||
a75214e5 | 1595 | /* Give warning message if the insn has more operands than required. */ |
2d473ce9 NC |
1596 | if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) |
1597 | as_warn (_("ignoring operands: %s "), op_end); | |
a75214e5 | 1598 | |
b8a40f53 NC |
1599 | output[0] = INST_BYTE0 (inst); |
1600 | output[1] = INST_BYTE1 (inst); | |
a75214e5 | 1601 | |
252b5132 RH |
1602 | check_literals (opcode->transfer, isize); |
1603 | } | |
1604 | ||
1605 | symbolS * | |
ea1562b3 | 1606 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
1607 | { |
1608 | return 0; | |
1609 | } | |
1610 | ||
1611 | void | |
ea1562b3 | 1612 | md_mcore_end (void) |
252b5132 RH |
1613 | { |
1614 | dump_literals (0); | |
1615 | subseg_set (text_section, 0); | |
1616 | } | |
1617 | ||
1618 | /* Various routines to kill one day. */ | |
ea1562b3 | 1619 | /* Equal to MAX_PRECISION in atof-ieee.c. */ |
252b5132 RH |
1620 | #define MAX_LITTLENUMS 6 |
1621 | ||
1622 | /* Turn a string in input_line_pointer into a floating point constant of type | |
1623 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
ea1562b3 NC |
1624 | emitted is stored in *sizeP. An error message is returned, or NULL on OK. */ |
1625 | ||
252b5132 | 1626 | char * |
ea1562b3 | 1627 | md_atof (int type, char * litP, int * sizeP) |
252b5132 RH |
1628 | { |
1629 | int prec; | |
1630 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
b8a40f53 | 1631 | int i; |
252b5132 | 1632 | char * t; |
252b5132 RH |
1633 | |
1634 | switch (type) | |
1635 | { | |
1636 | case 'f': | |
1637 | case 'F': | |
1638 | case 's': | |
1639 | case 'S': | |
1640 | prec = 2; | |
1641 | break; | |
1642 | ||
1643 | case 'd': | |
1644 | case 'D': | |
1645 | case 'r': | |
1646 | case 'R': | |
1647 | prec = 4; | |
1648 | break; | |
1649 | ||
1650 | case 'x': | |
1651 | case 'X': | |
1652 | prec = 6; | |
1653 | break; | |
1654 | ||
1655 | case 'p': | |
1656 | case 'P': | |
1657 | prec = 6; | |
1658 | break; | |
1659 | ||
1660 | default: | |
1661 | *sizeP = 0; | |
1662 | return _("Bad call to MD_NTOF()"); | |
1663 | } | |
a75214e5 | 1664 | |
252b5132 | 1665 | t = atof_ieee (input_line_pointer, type, words); |
a75214e5 | 1666 | |
252b5132 RH |
1667 | if (t) |
1668 | input_line_pointer = t; | |
1669 | ||
1670 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
a75214e5 | 1671 | |
bec50466 NC |
1672 | if (! target_big_endian) |
1673 | { | |
1674 | for (i = prec - 1; i >= 0; i--) | |
1675 | { | |
1676 | md_number_to_chars (litP, (valueT) words[i], | |
1677 | sizeof (LITTLENUM_TYPE)); | |
1678 | litP += sizeof (LITTLENUM_TYPE); | |
1679 | } | |
1680 | } | |
1681 | else | |
b8a40f53 NC |
1682 | for (i = 0; i < prec; i++) |
1683 | { | |
1684 | md_number_to_chars (litP, (valueT) words[i], | |
1685 | sizeof (LITTLENUM_TYPE)); | |
1686 | litP += sizeof (LITTLENUM_TYPE); | |
1687 | } | |
a75214e5 | 1688 | |
252b5132 RH |
1689 | return 0; |
1690 | } | |
1691 | \f | |
5a38dc70 | 1692 | const char * md_shortopts = ""; |
252b5132 | 1693 | |
ea1562b3 NC |
1694 | enum options |
1695 | { | |
1696 | OPTION_JSRI2BSR_ON = OPTION_MD_BASE, | |
1697 | OPTION_JSRI2BSR_OFF, | |
1698 | OPTION_SIFILTER_ON, | |
1699 | OPTION_SIFILTER_OFF, | |
1700 | OPTION_CPU, | |
1701 | OPTION_EB, | |
1702 | OPTION_EL, | |
1703 | }; | |
252b5132 RH |
1704 | |
1705 | struct option md_longopts[] = | |
1706 | { | |
252b5132 RH |
1707 | { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, |
1708 | { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, | |
1709 | { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, | |
1710 | { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, | |
bec50466 NC |
1711 | { "cpu", required_argument, NULL, OPTION_CPU}, |
1712 | { "EB", no_argument, NULL, OPTION_EB}, | |
1713 | { "EL", no_argument, NULL, OPTION_EL}, | |
252b5132 RH |
1714 | { NULL, no_argument, NULL, 0} |
1715 | }; | |
1716 | ||
1717 | size_t md_longopts_size = sizeof (md_longopts); | |
1718 | ||
1719 | int | |
ea1562b3 | 1720 | md_parse_option (int c, char * arg) |
252b5132 | 1721 | { |
252b5132 RH |
1722 | switch (c) |
1723 | { | |
bec50466 NC |
1724 | case OPTION_CPU: |
1725 | if (streq (arg, "210")) | |
1726 | { | |
1727 | cpu = M210; | |
1728 | target_big_endian = 1; | |
1729 | } | |
1730 | else if (streq (arg, "340")) | |
1731 | cpu = M340; | |
1732 | else | |
5f8075fa | 1733 | as_warn (_("unrecognised cpu type '%s'"), arg); |
bec50466 | 1734 | break; |
a75214e5 | 1735 | |
bec50466 NC |
1736 | case OPTION_EB: target_big_endian = 1; break; |
1737 | case OPTION_EL: target_big_endian = 0; cpu = M340; break; | |
252b5132 RH |
1738 | case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; |
1739 | case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; | |
1740 | case OPTION_SIFILTER_ON: sifilter_mode = 1; break; | |
1741 | case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; | |
1742 | default: return 0; | |
1743 | } | |
1744 | ||
1745 | return 1; | |
1746 | } | |
1747 | ||
1748 | void | |
ea1562b3 | 1749 | md_show_usage (FILE * stream) |
252b5132 RH |
1750 | { |
1751 | fprintf (stream, _("\ | |
1752 | MCORE specific options:\n\ | |
b8a40f53 | 1753 | -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ |
bec50466 NC |
1754 | -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ |
1755 | -cpu=[210|340] select CPU type\n\ | |
1756 | -EB assemble for a big endian system (default)\n\ | |
1757 | -EL assemble for a little endian system\n")); | |
252b5132 RH |
1758 | } |
1759 | \f | |
1760 | int md_short_jump_size; | |
1761 | ||
1762 | void | |
ea1562b3 NC |
1763 | md_create_short_jump (char * ptr ATTRIBUTE_UNUSED, |
1764 | addressT from_Nddr ATTRIBUTE_UNUSED, | |
1765 | addressT to_Nddr ATTRIBUTE_UNUSED, | |
1766 | fragS * frag ATTRIBUTE_UNUSED, | |
1767 | symbolS * to_symbol ATTRIBUTE_UNUSED) | |
252b5132 RH |
1768 | { |
1769 | as_fatal (_("failed sanity check: short_jump")); | |
1770 | } | |
1771 | ||
1772 | void | |
ea1562b3 NC |
1773 | md_create_long_jump (char * ptr ATTRIBUTE_UNUSED, |
1774 | addressT from_Nddr ATTRIBUTE_UNUSED, | |
1775 | addressT to_Nddr ATTRIBUTE_UNUSED, | |
1776 | fragS * frag ATTRIBUTE_UNUSED, | |
1777 | symbolS * to_symbol ATTRIBUTE_UNUSED) | |
252b5132 RH |
1778 | { |
1779 | as_fatal (_("failed sanity check: long_jump")); | |
1780 | } | |
1781 | ||
1782 | /* Called after relaxing, change the frags so they know how big they are. */ | |
ea1562b3 | 1783 | |
252b5132 | 1784 | void |
ea1562b3 NC |
1785 | md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, |
1786 | segT sec ATTRIBUTE_UNUSED, | |
1787 | fragS * fragP) | |
252b5132 | 1788 | { |
2132e3a3 | 1789 | char *buffer; |
252b5132 | 1790 | int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; |
a75214e5 | 1791 | |
2132e3a3 | 1792 | buffer = fragP->fr_fix + fragP->fr_literal; |
252b5132 RH |
1793 | |
1794 | switch (fragP->fr_subtype) | |
1795 | { | |
93c2a809 AM |
1796 | case C (COND_JUMP, DISP12): |
1797 | case C (UNCD_JUMP, DISP12): | |
252b5132 | 1798 | { |
bcef92fa | 1799 | /* Get the address of the end of the instruction. */ |
252b5132 RH |
1800 | int next_inst = fragP->fr_fix + fragP->fr_address + 2; |
1801 | unsigned char t0; | |
1802 | int disp = targ_addr - next_inst; | |
a75214e5 | 1803 | |
252b5132 | 1804 | if (disp & 1) |
b8a40f53 | 1805 | as_bad (_("odd displacement at %x"), next_inst - 2); |
a75214e5 | 1806 | |
252b5132 | 1807 | disp >>= 1; |
a75214e5 | 1808 | |
bec50466 NC |
1809 | if (! target_big_endian) |
1810 | { | |
1811 | t0 = buffer[1] & 0xF8; | |
a75214e5 | 1812 | |
bec50466 | 1813 | md_number_to_chars (buffer, disp, 2); |
a75214e5 | 1814 | |
bec50466 NC |
1815 | buffer[1] = (buffer[1] & 0x07) | t0; |
1816 | } | |
1817 | else | |
b8a40f53 NC |
1818 | { |
1819 | t0 = buffer[0] & 0xF8; | |
a75214e5 | 1820 | |
b8a40f53 | 1821 | md_number_to_chars (buffer, disp, 2); |
a75214e5 | 1822 | |
b8a40f53 NC |
1823 | buffer[0] = (buffer[0] & 0x07) | t0; |
1824 | } | |
a75214e5 | 1825 | |
252b5132 | 1826 | fragP->fr_fix += 2; |
252b5132 RH |
1827 | } |
1828 | break; | |
1829 | ||
93c2a809 | 1830 | case C (COND_JUMP, DISP32): |
252b5132 RH |
1831 | case C (COND_JUMP, UNDEF_WORD_DISP): |
1832 | { | |
1833 | /* A conditional branch wont fit into 12 bits so: | |
ea1562b3 NC |
1834 | b!cond 1f |
1835 | jmpi 0f | |
1836 | .align 2 | |
1837 | 0: .long disp | |
1838 | 1: | |
1839 | ||
1840 | If the b!cond is 4 byte aligned, the literal which would | |
1841 | go at x+4 will also be aligned. */ | |
252b5132 RH |
1842 | int first_inst = fragP->fr_fix + fragP->fr_address; |
1843 | int needpad = (first_inst & 3); | |
1844 | ||
bec50466 NC |
1845 | if (! target_big_endian) |
1846 | buffer[1] ^= 0x08; | |
1847 | else | |
ea1562b3 | 1848 | buffer[0] ^= 0x08; /* Toggle T/F bit. */ |
252b5132 | 1849 | |
ea1562b3 | 1850 | buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ |
252b5132 | 1851 | buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); |
a75214e5 | 1852 | |
252b5132 RH |
1853 | if (needpad) |
1854 | { | |
bec50466 NC |
1855 | if (! target_big_endian) |
1856 | { | |
ea1562b3 NC |
1857 | buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */ |
1858 | buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */ | |
bec50466 NC |
1859 | } |
1860 | else | |
b8a40f53 | 1861 | { |
ea1562b3 NC |
1862 | buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */ |
1863 | buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */ | |
b8a40f53 | 1864 | } |
a75214e5 | 1865 | |
ea1562b3 | 1866 | buffer[4] = 0; /* Alignment/pad. */ |
252b5132 | 1867 | buffer[5] = 0; |
ea1562b3 | 1868 | buffer[6] = 0; /* Space for 32 bit address. */ |
252b5132 RH |
1869 | buffer[7] = 0; |
1870 | buffer[8] = 0; | |
1871 | buffer[9] = 0; | |
a75214e5 | 1872 | |
ea1562b3 | 1873 | /* Make reloc for the long disp. */ |
252b5132 RH |
1874 | fix_new (fragP, fragP->fr_fix + 6, 4, |
1875 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
a75214e5 | 1876 | |
252b5132 RH |
1877 | fragP->fr_fix += C32_LEN; |
1878 | } | |
1879 | else | |
1880 | { | |
1881 | /* See comment below about this given gas' limitations for | |
1882 | shrinking the fragment. '3' is the amount of code that | |
1883 | we inserted here, but '4' is right for the space we reserved | |
a75214e5 | 1884 | for this fragment. */ |
bec50466 NC |
1885 | if (! target_big_endian) |
1886 | { | |
ea1562b3 NC |
1887 | buffer[0] = 3; /* Branch over jmpi, and ptr. */ |
1888 | buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */ | |
bec50466 NC |
1889 | } |
1890 | else | |
b8a40f53 | 1891 | { |
ea1562b3 NC |
1892 | buffer[1] = 3; /* Branch over jmpi, and ptr. */ |
1893 | buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */ | |
b8a40f53 | 1894 | } |
a75214e5 | 1895 | |
ea1562b3 | 1896 | buffer[4] = 0; /* Space for 32 bit address. */ |
252b5132 RH |
1897 | buffer[5] = 0; |
1898 | buffer[6] = 0; | |
1899 | buffer[7] = 0; | |
a75214e5 | 1900 | |
252b5132 RH |
1901 | /* Make reloc for the long disp. */ |
1902 | fix_new (fragP, fragP->fr_fix + 4, 4, | |
1903 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
1904 | fragP->fr_fix += C32_LEN; | |
1905 | ||
b8a40f53 NC |
1906 | /* Frag is actually shorter (see the other side of this ifdef) |
1907 | but gas isn't prepared for that. We have to re-adjust | |
a75214e5 | 1908 | the branch displacement so that it goes beyond the |
252b5132 RH |
1909 | full length of the fragment, not just what we actually |
1910 | filled in. */ | |
bec50466 | 1911 | if (! target_big_endian) |
ea1562b3 | 1912 | buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */ |
bec50466 | 1913 | else |
ea1562b3 | 1914 | buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */ |
252b5132 | 1915 | } |
252b5132 RH |
1916 | } |
1917 | break; | |
1918 | ||
93c2a809 | 1919 | case C (UNCD_JUMP, DISP32): |
252b5132 RH |
1920 | case C (UNCD_JUMP, UNDEF_WORD_DISP): |
1921 | { | |
1922 | /* An unconditional branch will not fit in 12 bits, make code which | |
1923 | looks like: | |
1924 | jmpi 0f | |
1925 | .align 2 | |
1926 | 0: .long disp | |
1927 | we need a pad if "first_inst" is 4 byte aligned. | |
ea1562b3 | 1928 | [because the natural literal place is x + 2]. */ |
252b5132 RH |
1929 | int first_inst = fragP->fr_fix + fragP->fr_address; |
1930 | int needpad = !(first_inst & 3); | |
1931 | ||
ea1562b3 | 1932 | buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ |
252b5132 RH |
1933 | buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); |
1934 | ||
1935 | if (needpad) | |
1936 | { | |
bec50466 | 1937 | if (! target_big_endian) |
ea1562b3 | 1938 | buffer[0] = 1; /* Jmpi offset of 1 since padded. */ |
bec50466 | 1939 | else |
ea1562b3 NC |
1940 | buffer[1] = 1; /* Jmpi offset of 1 since padded. */ |
1941 | buffer[2] = 0; /* Alignment. */ | |
252b5132 | 1942 | buffer[3] = 0; |
ea1562b3 | 1943 | buffer[4] = 0; /* Space for 32 bit address. */ |
252b5132 RH |
1944 | buffer[5] = 0; |
1945 | buffer[6] = 0; | |
1946 | buffer[7] = 0; | |
a75214e5 | 1947 | |
bcef92fa | 1948 | /* Make reloc for the long disp. */ |
252b5132 RH |
1949 | fix_new (fragP, fragP->fr_fix + 4, 4, |
1950 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
a75214e5 | 1951 | |
252b5132 RH |
1952 | fragP->fr_fix += U32_LEN; |
1953 | } | |
1954 | else | |
1955 | { | |
bec50466 | 1956 | if (! target_big_endian) |
ea1562b3 | 1957 | buffer[0] = 0; /* Jmpi offset of 0 if no pad. */ |
bec50466 | 1958 | else |
ea1562b3 NC |
1959 | buffer[1] = 0; /* Jmpi offset of 0 if no pad. */ |
1960 | buffer[2] = 0; /* Space for 32 bit address. */ | |
252b5132 RH |
1961 | buffer[3] = 0; |
1962 | buffer[4] = 0; | |
1963 | buffer[5] = 0; | |
a75214e5 | 1964 | |
bcef92fa | 1965 | /* Make reloc for the long disp. */ |
252b5132 RH |
1966 | fix_new (fragP, fragP->fr_fix + 2, 4, |
1967 | fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); | |
1968 | fragP->fr_fix += U32_LEN; | |
1969 | } | |
252b5132 RH |
1970 | } |
1971 | break; | |
1972 | ||
1973 | default: | |
1974 | abort (); | |
1975 | } | |
1976 | } | |
1977 | ||
1978 | /* Applies the desired value to the specified location. | |
1979 | Also sets up addends for 'rela' type relocations. */ | |
94f592af NC |
1980 | |
1981 | void | |
55cf6793 | 1982 | md_apply_fix (fixS * fixP, |
ea1562b3 NC |
1983 | valueT * valP, |
1984 | segT segment ATTRIBUTE_UNUSED) | |
252b5132 RH |
1985 | { |
1986 | char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
1987 | char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); | |
1988 | const char * symname; | |
1989 | /* Note: use offsetT because it is signed, valueT is unsigned. */ | |
a161fe53 | 1990 | offsetT val = *valP; |
a75214e5 | 1991 | |
252b5132 RH |
1992 | symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); |
1993 | /* Save this for the addend in the relocation record. */ | |
1994 | fixP->fx_addnumber = val; | |
1995 | ||
a161fe53 | 1996 | if (fixP->fx_addsy != NULL) |
252b5132 | 1997 | { |
252b5132 RH |
1998 | #ifdef OBJ_ELF |
1999 | /* For ELF we can just return and let the reloc that will be generated | |
2000 | take care of everything. For COFF we still have to insert 'val' | |
2001 | into the insn since the addend field will be ignored. */ | |
94f592af | 2002 | return; |
252b5132 RH |
2003 | #endif |
2004 | } | |
2005 | else | |
2006 | fixP->fx_done = 1; | |
a75214e5 | 2007 | |
252b5132 RH |
2008 | switch (fixP->fx_r_type) |
2009 | { | |
ea1562b3 NC |
2010 | /* Second byte of 2 byte opcode. */ |
2011 | case BFD_RELOC_MCORE_PCREL_IMM11BY2: | |
252b5132 RH |
2012 | if ((val & 1) != 0) |
2013 | as_bad_where (file, fixP->fx_line, | |
aa699a2c | 2014 | _("odd distance branch (0x%lx bytes)"), (long) val); |
252b5132 RH |
2015 | val /= 2; |
2016 | if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) | |
2017 | as_bad_where (file, fixP->fx_line, | |
aa699a2c AM |
2018 | _("pcrel for branch to %s too far (0x%lx)"), |
2019 | symname, (long) val); | |
bec50466 NC |
2020 | if (target_big_endian) |
2021 | { | |
2022 | buf[0] |= ((val >> 8) & 0x7); | |
2023 | buf[1] |= (val & 0xff); | |
2024 | } | |
2025 | else | |
2026 | { | |
eaa15ab8 NC |
2027 | buf[1] |= ((val >> 8) & 0x7); |
2028 | buf[0] |= (val & 0xff); | |
bec50466 | 2029 | } |
b8a40f53 | 2030 | break; |
252b5132 | 2031 | |
ea1562b3 NC |
2032 | /* Lower 8 bits of 2 byte opcode. */ |
2033 | case BFD_RELOC_MCORE_PCREL_IMM8BY4: | |
252b5132 RH |
2034 | val += 3; |
2035 | val /= 4; | |
2036 | if (val & ~0xff) | |
2037 | as_bad_where (file, fixP->fx_line, | |
aa699a2c AM |
2038 | _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), |
2039 | symname, (long) val); | |
bec50466 NC |
2040 | else if (! target_big_endian) |
2041 | buf[0] |= (val & 0xff); | |
252b5132 RH |
2042 | else |
2043 | buf[1] |= (val & 0xff); | |
b8a40f53 | 2044 | break; |
252b5132 | 2045 | |
ea1562b3 NC |
2046 | /* Loopt instruction. */ |
2047 | case BFD_RELOC_MCORE_PCREL_IMM4BY2: | |
252b5132 RH |
2048 | if ((val < -32) || (val > -2)) |
2049 | as_bad_where (file, fixP->fx_line, | |
aa699a2c | 2050 | _("pcrel for loopt too far (0x%lx)"), (long) val); |
252b5132 | 2051 | val /= 2; |
bec50466 NC |
2052 | if (! target_big_endian) |
2053 | buf[0] |= (val & 0xf); | |
2054 | else | |
2d473ce9 | 2055 | buf[1] |= (val & 0xf); |
252b5132 RH |
2056 | break; |
2057 | ||
2058 | case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: | |
2059 | /* Conditional linker map jsri to bsr. */ | |
a75214e5 | 2060 | /* If its a local target and close enough, fix it. |
5f8075fa | 2061 | NB: >= -2k for backwards bsr; < 2k for forwards... */ |
252b5132 RH |
2062 | if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) |
2063 | { | |
2064 | long nval = (val / 2) & 0x7ff; | |
2065 | nval |= MCORE_INST_BSR; | |
a75214e5 | 2066 | |
252b5132 | 2067 | /* REPLACE the instruction, don't just modify it. */ |
b8a40f53 NC |
2068 | buf[0] = INST_BYTE0 (nval); |
2069 | buf[1] = INST_BYTE1 (nval); | |
252b5132 RH |
2070 | } |
2071 | else | |
2072 | fixP->fx_done = 0; | |
2073 | break; | |
2074 | ||
2075 | case BFD_RELOC_MCORE_PCREL_32: | |
2076 | case BFD_RELOC_VTABLE_INHERIT: | |
2077 | case BFD_RELOC_VTABLE_ENTRY: | |
2078 | fixP->fx_done = 0; | |
2079 | break; | |
a75214e5 | 2080 | |
252b5132 RH |
2081 | default: |
2082 | if (fixP->fx_addsy != NULL) | |
2083 | { | |
2084 | /* If the fix is an absolute reloc based on a symbol's | |
2085 | address, then it cannot be resolved until the final link. */ | |
2086 | fixP->fx_done = 0; | |
2087 | } | |
a75214e5 | 2088 | #ifdef OBJ_ELF |
252b5132 RH |
2089 | else |
2090 | #endif | |
2091 | { | |
2092 | if (fixP->fx_size == 4) | |
b8a40f53 | 2093 | ; |
252b5132 | 2094 | else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) |
b8a40f53 | 2095 | ; |
252b5132 | 2096 | else if (fixP->fx_size == 1 && val >= -256 && val <= 255) |
b8a40f53 | 2097 | ; |
252b5132 RH |
2098 | else |
2099 | abort (); | |
b8a40f53 | 2100 | md_number_to_chars (buf, val, fixP->fx_size); |
252b5132 RH |
2101 | } |
2102 | break; | |
2103 | } | |
252b5132 RH |
2104 | } |
2105 | ||
2106 | void | |
ea1562b3 | 2107 | md_operand (expressionS * expressionP) |
252b5132 RH |
2108 | { |
2109 | /* Ignore leading hash symbol, if poresent. */ | |
2110 | if (* input_line_pointer == '#') | |
2111 | { | |
2112 | input_line_pointer ++; | |
2113 | expression (expressionP); | |
2114 | } | |
2115 | } | |
2116 | ||
2117 | int md_long_jump_size; | |
2118 | ||
2119 | /* Called just before address relaxation, return the length | |
2120 | by which a fragment must grow to reach it's destination. */ | |
2121 | int | |
ea1562b3 | 2122 | md_estimate_size_before_relax (fragS * fragP, segT segment_type) |
252b5132 RH |
2123 | { |
2124 | switch (fragP->fr_subtype) | |
2125 | { | |
93c2a809 AM |
2126 | default: |
2127 | abort (); | |
2128 | ||
252b5132 RH |
2129 | case C (UNCD_JUMP, UNDEF_DISP): |
2130 | /* Used to be a branch to somewhere which was unknown. */ | |
2131 | if (!fragP->fr_symbol) | |
ea1562b3 | 2132 | fragP->fr_subtype = C (UNCD_JUMP, DISP12); |
252b5132 | 2133 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) |
ea1562b3 | 2134 | fragP->fr_subtype = C (UNCD_JUMP, DISP12); |
252b5132 | 2135 | else |
ea1562b3 | 2136 | fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); |
252b5132 RH |
2137 | break; |
2138 | ||
252b5132 | 2139 | case C (COND_JUMP, UNDEF_DISP): |
a75214e5 | 2140 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
2141 | if (fragP->fr_symbol |
2142 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
ea1562b3 NC |
2143 | /* Got a symbol and it's defined in this segment, become byte |
2144 | sized - maybe it will fix up */ | |
2145 | fragP->fr_subtype = C (COND_JUMP, DISP12); | |
252b5132 | 2146 | else if (fragP->fr_symbol) |
ea1562b3 NC |
2147 | /* Its got a segment, but its not ours, so it will always be long. */ |
2148 | fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); | |
252b5132 | 2149 | else |
ea1562b3 NC |
2150 | /* We know the abs value. */ |
2151 | fragP->fr_subtype = C (COND_JUMP, DISP12); | |
93c2a809 | 2152 | break; |
252b5132 | 2153 | |
93c2a809 | 2154 | case C (UNCD_JUMP, DISP12): |
e66457fb | 2155 | case C (UNCD_JUMP, DISP32): |
93c2a809 AM |
2156 | case C (UNCD_JUMP, UNDEF_WORD_DISP): |
2157 | case C (COND_JUMP, DISP12): | |
e66457fb | 2158 | case C (COND_JUMP, DISP32): |
93c2a809 AM |
2159 | case C (COND_JUMP, UNDEF_WORD_DISP): |
2160 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 2161 | do anything besides return the current size. */ |
252b5132 RH |
2162 | break; |
2163 | } | |
a75214e5 | 2164 | |
606ab118 | 2165 | return md_relax_table[fragP->fr_subtype].rlx_length; |
252b5132 RH |
2166 | } |
2167 | ||
bcef92fa | 2168 | /* Put number into target byte order. */ |
ea1562b3 | 2169 | |
252b5132 | 2170 | void |
ea1562b3 | 2171 | md_number_to_chars (char * ptr, valueT use, int nbytes) |
252b5132 | 2172 | { |
04f8d83b NC |
2173 | if (target_big_endian) |
2174 | number_to_chars_bigendian (ptr, use, nbytes); | |
bec50466 | 2175 | else |
04f8d83b | 2176 | number_to_chars_littleendian (ptr, use, nbytes); |
252b5132 RH |
2177 | } |
2178 | ||
2179 | /* Round up a section size to the appropriate boundary. */ | |
ea1562b3 | 2180 | |
252b5132 | 2181 | valueT |
ea1562b3 NC |
2182 | md_section_align (segT segment ATTRIBUTE_UNUSED, |
2183 | valueT size) | |
252b5132 | 2184 | { |
ea1562b3 NC |
2185 | /* Byte alignment is fine. */ |
2186 | return size; | |
252b5132 RH |
2187 | } |
2188 | ||
252b5132 RH |
2189 | /* The location from which a PC relative jump should be calculated, |
2190 | given a PC relative reloc. */ | |
ea1562b3 | 2191 | |
252b5132 | 2192 | long |
ea1562b3 | 2193 | md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
2194 | { |
2195 | #ifdef OBJ_ELF | |
2196 | /* If the symbol is undefined or defined in another section | |
2197 | we leave the add number alone for the linker to fix it later. | |
a75214e5 | 2198 | Only account for the PC pre-bump (which is 2 bytes on the MCore). */ |
252b5132 RH |
2199 | if (fixp->fx_addsy != (symbolS *) NULL |
2200 | && (! S_IS_DEFINED (fixp->fx_addsy) | |
2201 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
a75214e5 | 2202 | |
252b5132 RH |
2203 | { |
2204 | assert (fixp->fx_size == 2); /* must be an insn */ | |
2205 | return fixp->fx_size; | |
2206 | } | |
2207 | #endif | |
2208 | ||
a75214e5 | 2209 | /* The case where we are going to resolve things... */ |
252b5132 RH |
2210 | return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; |
2211 | } | |
2212 | ||
2213 | #define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) | |
2214 | #define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break | |
2215 | ||
2216 | arelent * | |
ea1562b3 | 2217 | tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
252b5132 RH |
2218 | { |
2219 | arelent * rel; | |
2220 | bfd_reloc_code_real_type code; | |
252b5132 RH |
2221 | |
2222 | switch (fixp->fx_r_type) | |
2223 | { | |
a75214e5 | 2224 | /* These confuse the size/pcrel macro approach. */ |
252b5132 RH |
2225 | case BFD_RELOC_VTABLE_INHERIT: |
2226 | case BFD_RELOC_VTABLE_ENTRY: | |
2227 | case BFD_RELOC_MCORE_PCREL_IMM4BY2: | |
2228 | case BFD_RELOC_MCORE_PCREL_IMM8BY4: | |
2229 | case BFD_RELOC_MCORE_PCREL_IMM11BY2: | |
2230 | case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: | |
a75214e5 | 2231 | case BFD_RELOC_RVA: |
252b5132 RH |
2232 | code = fixp->fx_r_type; |
2233 | break; | |
a75214e5 | 2234 | |
252b5132 RH |
2235 | default: |
2236 | switch (F (fixp->fx_size, fixp->fx_pcrel)) | |
5f8075fa AM |
2237 | { |
2238 | MAP (1, 0, BFD_RELOC_8); | |
2239 | MAP (2, 0, BFD_RELOC_16); | |
2240 | MAP (4, 0, BFD_RELOC_32); | |
2241 | MAP (1, 1, BFD_RELOC_8_PCREL); | |
2242 | MAP (2, 1, BFD_RELOC_16_PCREL); | |
2243 | MAP (4, 1, BFD_RELOC_32_PCREL); | |
2244 | default: | |
252b5132 | 2245 | code = fixp->fx_r_type; |
5f8075fa | 2246 | as_bad (_("Can not do %d byte %srelocation"), |
252b5132 | 2247 | fixp->fx_size, |
5f8075fa AM |
2248 | fixp->fx_pcrel ? _("pc-relative") : ""); |
2249 | } | |
252b5132 RH |
2250 | break; |
2251 | } | |
2252 | ||
ea1562b3 NC |
2253 | rel = xmalloc (sizeof (arelent)); |
2254 | rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
310b5aa2 | 2255 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
2256 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
2257 | /* Always pass the addend along! */ | |
2258 | rel->addend = fixp->fx_addnumber; | |
2259 | ||
2260 | rel->howto = bfd_reloc_type_lookup (stdoutput, code); | |
a75214e5 | 2261 | |
252b5132 RH |
2262 | if (rel->howto == NULL) |
2263 | { | |
2264 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
5f8075fa AM |
2265 | _("Cannot represent relocation type %s"), |
2266 | bfd_get_reloc_code_name (code)); | |
a75214e5 | 2267 | |
252b5132 RH |
2268 | /* Set howto to a garbage value so that we can keep going. */ |
2269 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
2270 | assert (rel->howto != NULL); | |
2271 | } | |
2272 | ||
2273 | return rel; | |
2274 | } | |
2275 | ||
2276 | #ifdef OBJ_ELF | |
2277 | /* See whether we need to force a relocation into the output file. | |
2278 | This is used to force out switch and PC relative relocations when | |
2279 | relaxing. */ | |
2280 | int | |
ea1562b3 | 2281 | mcore_force_relocation (fixS * fix) |
252b5132 | 2282 | { |
ae6063d4 | 2283 | if (fix->fx_r_type == BFD_RELOC_RVA) |
252b5132 RH |
2284 | return 1; |
2285 | ||
ae6063d4 | 2286 | return generic_force_reloc (fix); |
252b5132 RH |
2287 | } |
2288 | ||
2289 | /* Return true if the fix can be handled by GAS, false if it must | |
2290 | be passed through to the linker. */ | |
ea1562b3 | 2291 | |
b34976b6 | 2292 | bfd_boolean |
ea1562b3 | 2293 | mcore_fix_adjustable (fixS * fixP) |
252b5132 | 2294 | { |
252b5132 RH |
2295 | /* We need the symbol name for the VTABLE entries. */ |
2296 | if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2297 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2298 | return 0; | |
2299 | ||
2300 | return 1; | |
2301 | } | |
252b5132 | 2302 | #endif /* OBJ_ELF */ |