gas/
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
8ad7c533
NC
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
4b4da160
NC
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
87271fa6 24#include "subsegs.h"
252b5132 25#include "opcode/mn10300.h"
e8b1cae5 26#include "dwarf2dbg.h"
252b5132
RH
27\f
28/* Structure to hold information about predefined registers. */
29struct reg_name
30{
31 const char *name;
32 int value;
33};
34
87271fa6
NC
35/* Generic assembler global variables which must be defined by all
36 targets. */
252b5132 37
87271fa6 38/* Characters which always start a comment. */
252b5132
RH
39const char comment_chars[] = "#";
40
41/* Characters which start a comment at the beginning of a line. */
42const char line_comment_chars[] = ";#";
43
87271fa6 44/* Characters which may be used to separate multiple commands on a
252b5132
RH
45 single line. */
46const char line_separator_chars[] = ";";
47
87271fa6 48/* Characters which are used to indicate an exponent in a floating
252b5132
RH
49 point number. */
50const char EXP_CHARS[] = "eE";
51
87271fa6 52/* Characters which mean that a number is a floating point constant,
252b5132
RH
53 as in 0d1.0. */
54const char FLT_CHARS[] = "dD";
55\f
dae1b34e
NC
56const relax_typeS md_relax_table[] =
57{
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
87271fa6 62 /* bCC relaxing */
252b5132 63 {0x7f, -0x80, 2, 1},
dae1b34e 64 {0x7fff + 2, -0x8000 + 2, 5, 2},
252b5132
RH
65 {0x7fffffff, -0x80000000, 7, 0},
66
dae1b34e 67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
252b5132 68 {0x7f, -0x80, 3, 4},
dae1b34e 69 {0x7fff + 3, -0x8000 + 3, 6, 5},
252b5132
RH
70 {0x7fffffff, -0x80000000, 8, 0},
71
87271fa6 72 /* call relaxing */
252b5132
RH
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
75
87271fa6 76 /* calls relaxing */
252b5132
RH
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
79
87271fa6 80 /* jmp relaxing */
252b5132
RH
81 {0x7f, -0x80, 2, 11},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
84
e7b71525
AO
85 /* fbCC relaxing */
86 {0x7f, -0x80, 3, 14},
dae1b34e 87 {0x7fff + 3, -0x8000 + 3, 6, 15},
e7b71525
AO
88 {0x7fffffff, -0x80000000, 8, 0},
89
252b5132
RH
90};
91
87271fa6 92/* Local functions. */
252b5132
RH
93static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
94 const struct mn10300_operand *,
95 offsetT, char *, unsigned,
96 unsigned));
97static unsigned long check_operand PARAMS ((unsigned long,
98 const struct mn10300_operand *,
99 offsetT));
100static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
b34976b6
AM
101static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
102static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
103static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
497f322d
AO
104static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
105static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
106static void set_arch_mach PARAMS ((int));
252b5132 107
1485d400
EC
108/* Set linkrelax here to avoid fixups in most sections. */
109int linkrelax = 1;
110
252b5132
RH
111static int current_machine;
112
87271fa6 113/* Fixups. */
252b5132
RH
114#define MAX_INSN_FIXUPS (5)
115struct mn10300_fixup
116{
117 expressionS exp;
118 int opindex;
119 bfd_reloc_code_real_type reloc;
120};
121struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
122static int fc;
123
124/* We must store the value of each register operand so that we can
125 verify that certain registers do not match. */
126int mn10300_reg_operands[MN10300_MAX_OPERANDS];
127\f
128const char *md_shortopts = "";
129struct option md_longopts[] = {
130 {NULL, no_argument, NULL, 0}
131};
87271fa6 132size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
133
134/* The target specific pseudo-ops which we support. */
135const pseudo_typeS md_pseudo_table[] =
136{
0a727238
AO
137 { "am30", set_arch_mach, AM30 },
138 { "am33", set_arch_mach, AM33 },
e7b71525 139 { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
0a727238 140 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
141 {NULL, 0, 0}
142};
143
e7b71525
AO
144#define HAVE_AM33_2 (current_machine == AM33_2)
145#define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
aa15f6f7 146#define HAVE_AM30 (current_machine == AM30)
0a727238 147
252b5132
RH
148/* Opcode hash table. */
149static struct hash_control *mn10300_hash;
150
87271fa6 151/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
152static const struct reg_name data_registers[] =
153{
154 { "d0", 0 },
155 { "d1", 1 },
156 { "d2", 2 },
157 { "d3", 3 },
158};
87271fa6
NC
159#define DATA_REG_NAME_CNT \
160 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
161
162static const struct reg_name address_registers[] =
163{
164 { "a0", 0 },
165 { "a1", 1 },
166 { "a2", 2 },
167 { "a3", 3 },
168};
87271fa6
NC
169
170#define ADDRESS_REG_NAME_CNT \
171 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 172
85cb2cf9
JL
173static const struct reg_name r_registers[] =
174{
175 { "a0", 8 },
176 { "a1", 9 },
177 { "a2", 10 },
178 { "a3", 11 },
179 { "d0", 12 },
180 { "d1", 13 },
181 { "d2", 14 },
182 { "d3", 15 },
183 { "e0", 0 },
184 { "e1", 1 },
185 { "e10", 10 },
186 { "e11", 11 },
187 { "e12", 12 },
188 { "e13", 13 },
189 { "e14", 14 },
190 { "e15", 15 },
191 { "e2", 2 },
192 { "e3", 3 },
193 { "e4", 4 },
194 { "e5", 5 },
195 { "e6", 6 },
196 { "e7", 7 },
197 { "e8", 8 },
198 { "e9", 9 },
199 { "r0", 0 },
200 { "r1", 1 },
201 { "r10", 10 },
202 { "r11", 11 },
203 { "r12", 12 },
204 { "r13", 13 },
205 { "r14", 14 },
206 { "r15", 15 },
207 { "r2", 2 },
208 { "r3", 3 },
209 { "r4", 4 },
210 { "r5", 5 },
211 { "r6", 6 },
212 { "r7", 7 },
213 { "r8", 8 },
214 { "r9", 9 },
215};
87271fa6
NC
216
217#define R_REG_NAME_CNT \
218 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
219
220static const struct reg_name xr_registers[] =
221{
222 { "mcrh", 2 },
223 { "mcrl", 3 },
224 { "mcvf", 4 },
225 { "mdrq", 1 },
226 { "sp", 0 },
227 { "xr0", 0 },
228 { "xr1", 1 },
229 { "xr10", 10 },
230 { "xr11", 11 },
231 { "xr12", 12 },
232 { "xr13", 13 },
233 { "xr14", 14 },
234 { "xr15", 15 },
235 { "xr2", 2 },
236 { "xr3", 3 },
237 { "xr4", 4 },
238 { "xr5", 5 },
239 { "xr6", 6 },
240 { "xr7", 7 },
241 { "xr8", 8 },
242 { "xr9", 9 },
243};
85cb2cf9 244
87271fa6
NC
245#define XR_REG_NAME_CNT \
246 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132 247
913572ec
AO
248/* We abuse the `value' field, that would be otherwise unused, to
249 encode the architecture on which (access to) the register was
250 introduced. FIXME: we should probably warn when we encounter a
251 register name when assembling for an architecture that doesn't
252 support it, before parsing it as a symbol name. */
252b5132
RH
253static const struct reg_name other_registers[] =
254{
913572ec 255 { "epsw", AM33 },
252b5132 256 { "mdr", 0 },
913572ec 257 { "pc", AM33 },
252b5132
RH
258 { "psw", 0 },
259 { "sp", 0 },
260};
87271fa6
NC
261
262#define OTHER_REG_NAME_CNT \
263 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132 264
e7b71525
AO
265static const struct reg_name float_registers[] =
266{
267 { "fs0", 0 },
268 { "fs1", 1 },
269 { "fs10", 10 },
270 { "fs11", 11 },
271 { "fs12", 12 },
272 { "fs13", 13 },
273 { "fs14", 14 },
274 { "fs15", 15 },
275 { "fs16", 16 },
276 { "fs17", 17 },
277 { "fs18", 18 },
278 { "fs19", 19 },
279 { "fs2", 2 },
280 { "fs20", 20 },
281 { "fs21", 21 },
282 { "fs22", 22 },
283 { "fs23", 23 },
284 { "fs24", 24 },
285 { "fs25", 25 },
286 { "fs26", 26 },
287 { "fs27", 27 },
288 { "fs28", 28 },
289 { "fs29", 29 },
290 { "fs3", 3 },
291 { "fs30", 30 },
292 { "fs31", 31 },
293 { "fs4", 4 },
294 { "fs5", 5 },
295 { "fs6", 6 },
296 { "fs7", 7 },
297 { "fs8", 8 },
298 { "fs9", 9 },
299};
300
301#define FLOAT_REG_NAME_CNT \
302 (sizeof (float_registers) / sizeof (struct reg_name))
303
304static const struct reg_name double_registers[] =
305{
306 { "fd0", 0 },
307 { "fd10", 10 },
308 { "fd12", 12 },
309 { "fd14", 14 },
310 { "fd16", 16 },
311 { "fd18", 18 },
312 { "fd2", 2 },
313 { "fd20", 20 },
314 { "fd22", 22 },
315 { "fd24", 24 },
316 { "fd26", 26 },
317 { "fd28", 28 },
318 { "fd30", 30 },
319 { "fd4", 4 },
320 { "fd6", 6 },
321 { "fd8", 8 },
322};
323
324#define DOUBLE_REG_NAME_CNT \
325 (sizeof (double_registers) / sizeof (struct reg_name))
326
327
252b5132
RH
328/* reg_name_search does a binary search of the given register table
329 to see if "name" is a valid regiter name. Returns the register
87271fa6 330 number from the array on success, or -1 on failure. */
252b5132
RH
331
332static int
333reg_name_search (regs, regcount, name)
334 const struct reg_name *regs;
335 int regcount;
336 const char *name;
337{
338 int middle, low, high;
339 int cmp;
340
341 low = 0;
342 high = regcount - 1;
343
344 do
345 {
346 middle = (low + high) / 2;
347 cmp = strcasecmp (name, regs[middle].name);
348 if (cmp < 0)
349 high = middle - 1;
350 else if (cmp > 0)
351 low = middle + 1;
87271fa6
NC
352 else
353 return regs[middle].value;
252b5132
RH
354 }
355 while (low <= high);
356 return -1;
357}
358
85cb2cf9
JL
359/* Summary of register_name().
360 *
361 * in: Input_line_pointer points to 1st char of operand.
362 *
b6ff326e 363 * out: An expressionS.
85cb2cf9
JL
364 * The operand may have been a register: in this case, X_op == O_register,
365 * X_add_number is set to the register number, and truth is returned.
366 * Input_line_pointer->(next non-blank) char after operand, or is in
367 * its original state.
368 */
87271fa6 369
b34976b6 370static bfd_boolean
85cb2cf9
JL
371r_register_name (expressionP)
372 expressionS *expressionP;
373{
374 int reg_number;
375 char *name;
376 char *start;
377 char c;
378
87271fa6 379 /* Find the spelling of the operand. */
85cb2cf9
JL
380 start = name = input_line_pointer;
381
382 c = get_symbol_end ();
383 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
384
468cced8
AM
385 /* Put back the delimiting char. */
386 *input_line_pointer = c;
387
87271fa6
NC
388 /* Look to see if it's in the register table. */
389 if (reg_number >= 0)
85cb2cf9
JL
390 {
391 expressionP->X_op = O_register;
392 expressionP->X_add_number = reg_number;
393
87271fa6 394 /* Make the rest nice. */
85cb2cf9
JL
395 expressionP->X_add_symbol = NULL;
396 expressionP->X_op_symbol = NULL;
87271fa6 397
b34976b6 398 return TRUE;
85cb2cf9 399 }
87271fa6 400
468cced8
AM
401 /* Reset the line as if we had not done anything. */
402 input_line_pointer = start;
b34976b6 403 return FALSE;
85cb2cf9
JL
404}
405
406/* Summary of register_name().
407 *
408 * in: Input_line_pointer points to 1st char of operand.
409 *
b6ff326e 410 * out: An expressionS.
85cb2cf9
JL
411 * The operand may have been a register: in this case, X_op == O_register,
412 * X_add_number is set to the register number, and truth is returned.
413 * Input_line_pointer->(next non-blank) char after operand, or is in
414 * its original state.
415 */
87271fa6 416
b34976b6 417static bfd_boolean
85cb2cf9
JL
418xr_register_name (expressionP)
419 expressionS *expressionP;
420{
421 int reg_number;
422 char *name;
423 char *start;
424 char c;
425
87271fa6 426 /* Find the spelling of the operand. */
85cb2cf9
JL
427 start = name = input_line_pointer;
428
429 c = get_symbol_end ();
430 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
431
468cced8
AM
432 /* Put back the delimiting char. */
433 *input_line_pointer = c;
434
87271fa6
NC
435 /* Look to see if it's in the register table. */
436 if (reg_number >= 0)
85cb2cf9
JL
437 {
438 expressionP->X_op = O_register;
439 expressionP->X_add_number = reg_number;
440
87271fa6 441 /* Make the rest nice. */
85cb2cf9
JL
442 expressionP->X_add_symbol = NULL;
443 expressionP->X_op_symbol = NULL;
87271fa6 444
b34976b6 445 return TRUE;
85cb2cf9 446 }
87271fa6 447
468cced8
AM
448 /* Reset the line as if we had not done anything. */
449 input_line_pointer = start;
b34976b6 450 return FALSE;
85cb2cf9 451}
252b5132
RH
452
453/* Summary of register_name().
454 *
455 * in: Input_line_pointer points to 1st char of operand.
456 *
b6ff326e 457 * out: An expressionS.
252b5132
RH
458 * The operand may have been a register: in this case, X_op == O_register,
459 * X_add_number is set to the register number, and truth is returned.
460 * Input_line_pointer->(next non-blank) char after operand, or is in
461 * its original state.
462 */
87271fa6 463
b34976b6 464static bfd_boolean
252b5132
RH
465data_register_name (expressionP)
466 expressionS *expressionP;
467{
468 int reg_number;
469 char *name;
470 char *start;
471 char c;
472
87271fa6 473 /* Find the spelling of the operand. */
252b5132
RH
474 start = name = input_line_pointer;
475
476 c = get_symbol_end ();
477 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
478
468cced8
AM
479 /* Put back the delimiting char. */
480 *input_line_pointer = c;
481
87271fa6
NC
482 /* Look to see if it's in the register table. */
483 if (reg_number >= 0)
252b5132
RH
484 {
485 expressionP->X_op = O_register;
486 expressionP->X_add_number = reg_number;
487
87271fa6 488 /* Make the rest nice. */
252b5132
RH
489 expressionP->X_add_symbol = NULL;
490 expressionP->X_op_symbol = NULL;
87271fa6 491
b34976b6 492 return TRUE;
252b5132 493 }
87271fa6 494
468cced8
AM
495 /* Reset the line as if we had not done anything. */
496 input_line_pointer = start;
b34976b6 497 return FALSE;
252b5132
RH
498}
499
500/* Summary of register_name().
501 *
502 * in: Input_line_pointer points to 1st char of operand.
503 *
b6ff326e 504 * out: An expressionS.
252b5132
RH
505 * The operand may have been a register: in this case, X_op == O_register,
506 * X_add_number is set to the register number, and truth is returned.
507 * Input_line_pointer->(next non-blank) char after operand, or is in
508 * its original state.
509 */
87271fa6 510
b34976b6 511static bfd_boolean
252b5132
RH
512address_register_name (expressionP)
513 expressionS *expressionP;
514{
515 int reg_number;
516 char *name;
517 char *start;
518 char c;
519
87271fa6 520 /* Find the spelling of the operand. */
252b5132
RH
521 start = name = input_line_pointer;
522
523 c = get_symbol_end ();
524 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
525
468cced8
AM
526 /* Put back the delimiting char. */
527 *input_line_pointer = c;
528
87271fa6
NC
529 /* Look to see if it's in the register table. */
530 if (reg_number >= 0)
252b5132
RH
531 {
532 expressionP->X_op = O_register;
533 expressionP->X_add_number = reg_number;
534
87271fa6 535 /* Make the rest nice. */
252b5132
RH
536 expressionP->X_add_symbol = NULL;
537 expressionP->X_op_symbol = NULL;
87271fa6 538
b34976b6 539 return TRUE;
252b5132 540 }
87271fa6 541
468cced8
AM
542 /* Reset the line as if we had not done anything. */
543 input_line_pointer = start;
b34976b6 544 return FALSE;
252b5132
RH
545}
546
547/* Summary of register_name().
548 *
549 * in: Input_line_pointer points to 1st char of operand.
550 *
b6ff326e 551 * out: An expressionS.
252b5132
RH
552 * The operand may have been a register: in this case, X_op == O_register,
553 * X_add_number is set to the register number, and truth is returned.
554 * Input_line_pointer->(next non-blank) char after operand, or is in
555 * its original state.
556 */
87271fa6 557
b34976b6 558static bfd_boolean
252b5132
RH
559other_register_name (expressionP)
560 expressionS *expressionP;
561{
562 int reg_number;
563 char *name;
564 char *start;
565 char c;
566
87271fa6 567 /* Find the spelling of the operand. */
252b5132
RH
568 start = name = input_line_pointer;
569
570 c = get_symbol_end ();
571 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
572
468cced8
AM
573 /* Put back the delimiting char. */
574 *input_line_pointer = c;
575
87271fa6 576 /* Look to see if it's in the register table. */
913572ec
AO
577 if (reg_number == 0
578 || (reg_number == AM33 && HAVE_AM33))
252b5132
RH
579 {
580 expressionP->X_op = O_register;
913572ec 581 expressionP->X_add_number = 0;
252b5132 582
87271fa6 583 /* Make the rest nice. */
252b5132
RH
584 expressionP->X_add_symbol = NULL;
585 expressionP->X_op_symbol = NULL;
87271fa6 586
b34976b6 587 return TRUE;
252b5132 588 }
87271fa6 589
468cced8
AM
590 /* Reset the line as if we had not done anything. */
591 input_line_pointer = start;
b34976b6 592 return FALSE;
252b5132
RH
593}
594
e7b71525
AO
595static bfd_boolean double_register_name PARAMS ((expressionS *));
596static bfd_boolean float_register_name PARAMS ((expressionS *));
597
598/* Summary of float_register_name:
599
600 in: Input_line_pointer points to 1st char of operand.
601
602 out: A expressionS.
603 The operand may have been a register: in this case, X_op == O_register,
604 X_add_number is set to the register number, and truth is returned.
605 Input_line_pointer->(next non-blank) char after operand, or is in
606 its original state. */
607
608static bfd_boolean
609float_register_name (expressionP)
610 expressionS *expressionP;
611{
612 int reg_number;
613 char *name;
614 char *start;
615 char c;
616
617 /* Find the spelling of the operand. */
618 start = name = input_line_pointer;
619
620 c = get_symbol_end ();
621 reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
622
623 /* Put back the delimiting char. */
624 * input_line_pointer = c;
625
626 /* Look to see if it's in the register table. */
627 if (reg_number >= 0)
628 {
629 expressionP->X_op = O_register;
630 expressionP->X_add_number = reg_number;
631
632 /* Make the rest nice. */
633 expressionP->X_add_symbol = NULL;
634 expressionP->X_op_symbol = NULL;
635
636 return TRUE;
637 }
638
639 /* Reset the line as if we had not done anything. */
640 input_line_pointer = start;
641 return FALSE;
642}
643
644/* Summary of double_register_name:
645
646 in: Input_line_pointer points to 1st char of operand.
647
648 out: A expressionS.
649 The operand may have been a register: in this case, X_op == O_register,
650 X_add_number is set to the register number, and truth is returned.
651 Input_line_pointer->(next non-blank) char after operand, or is in
652 its original state. */
653
654static bfd_boolean
655double_register_name (expressionP)
656 expressionS *expressionP;
657{
658 int reg_number;
659 char *name;
660 char *start;
661 char c;
662
663 /* Find the spelling of the operand. */
664 start = name = input_line_pointer;
665
666 c = get_symbol_end ();
667 reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
668
669 /* Put back the delimiting char. */
670 * input_line_pointer = c;
671
672 /* Look to see if it's in the register table. */
673 if (reg_number >= 0)
674 {
675 expressionP->X_op = O_register;
676 expressionP->X_add_number = reg_number;
677
678 /* Make the rest nice. */
679 expressionP->X_add_symbol = NULL;
680 expressionP->X_op_symbol = NULL;
681
682 return TRUE;
683 }
684
685 /* Reset the line as if we had not done anything. */
686 input_line_pointer = start;
687 return FALSE;
688}
689
252b5132
RH
690void
691md_show_usage (stream)
87271fa6 692 FILE *stream;
252b5132 693{
87271fa6 694 fprintf (stream, _("MN10300 options:\n\
252b5132 695none yet\n"));
87271fa6 696}
252b5132
RH
697
698int
699md_parse_option (c, arg)
b4c1ea07
EC
700 int c ATTRIBUTE_UNUSED;
701 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
702{
703 return 0;
704}
705
706symbolS *
707md_undefined_symbol (name)
b4c1ea07 708 char *name ATTRIBUTE_UNUSED;
252b5132
RH
709{
710 return 0;
711}
712
713char *
714md_atof (type, litp, sizep)
87271fa6
NC
715 int type;
716 char *litp;
717 int *sizep;
252b5132
RH
718{
719 int prec;
720 LITTLENUM_TYPE words[4];
721 char *t;
722 int i;
723
724 switch (type)
725 {
726 case 'f':
727 prec = 2;
728 break;
729
730 case 'd':
731 prec = 4;
732 break;
733
734 default:
735 *sizep = 0;
736 return "bad call to md_atof";
737 }
87271fa6 738
252b5132
RH
739 t = atof_ieee (input_line_pointer, type, words);
740 if (t)
741 input_line_pointer = t;
742
743 *sizep = prec * 2;
744
745 for (i = prec - 1; i >= 0; i--)
746 {
747 md_number_to_chars (litp, (valueT) words[i], 2);
748 litp += 2;
749 }
750
751 return NULL;
752}
753
252b5132
RH
754void
755md_convert_frag (abfd, sec, fragP)
b4c1ea07 756 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
757 asection *sec;
758 fragS *fragP;
252b5132
RH
759{
760 static unsigned long label_count = 0;
761 char buf[40];
762
763 subseg_change (sec, 0);
764 if (fragP->fr_subtype == 0)
765 {
766 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
767 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
768 fragP->fr_var = 0;
769 fragP->fr_fix += 2;
770 }
771 else if (fragP->fr_subtype == 1)
772 {
773 /* Reverse the condition of the first branch. */
774 int offset = fragP->fr_fix;
775 int opcode = fragP->fr_literal[offset] & 0xff;
776
777 switch (opcode)
778 {
779 case 0xc8:
780 opcode = 0xc9;
781 break;
782 case 0xc9:
783 opcode = 0xc8;
784 break;
785 case 0xc0:
786 opcode = 0xc2;
787 break;
788 case 0xc2:
789 opcode = 0xc0;
790 break;
791 case 0xc3:
792 opcode = 0xc1;
793 break;
794 case 0xc1:
795 opcode = 0xc3;
796 break;
797 case 0xc4:
798 opcode = 0xc6;
799 break;
800 case 0xc6:
801 opcode = 0xc4;
802 break;
803 case 0xc7:
804 opcode = 0xc5;
805 break;
806 case 0xc5:
807 opcode = 0xc7;
808 break;
809 default:
810 abort ();
811 }
812 fragP->fr_literal[offset] = opcode;
813
814 /* Create a fixup for the reversed conditional branch. */
0aa529cb 815 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
816 fix_new (fragP, fragP->fr_fix + 1, 1,
817 symbol_new (buf, sec, 0, fragP->fr_next),
818 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
819
820 /* Now create the unconditional branch + fixup to the
821 final target. */
822 fragP->fr_literal[offset + 2] = 0xcc;
823 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
824 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
825 fragP->fr_var = 0;
826 fragP->fr_fix += 5;
827 }
828 else if (fragP->fr_subtype == 2)
829 {
830 /* Reverse the condition of the first branch. */
831 int offset = fragP->fr_fix;
832 int opcode = fragP->fr_literal[offset] & 0xff;
833
834 switch (opcode)
835 {
836 case 0xc8:
837 opcode = 0xc9;
838 break;
839 case 0xc9:
840 opcode = 0xc8;
841 break;
842 case 0xc0:
843 opcode = 0xc2;
844 break;
845 case 0xc2:
846 opcode = 0xc0;
847 break;
848 case 0xc3:
849 opcode = 0xc1;
850 break;
851 case 0xc1:
852 opcode = 0xc3;
853 break;
854 case 0xc4:
855 opcode = 0xc6;
856 break;
857 case 0xc6:
858 opcode = 0xc4;
859 break;
860 case 0xc7:
861 opcode = 0xc5;
862 break;
863 case 0xc5:
864 opcode = 0xc7;
865 break;
866 default:
867 abort ();
868 }
869 fragP->fr_literal[offset] = opcode;
870
871 /* Create a fixup for the reversed conditional branch. */
0aa529cb 872 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
873 fix_new (fragP, fragP->fr_fix + 1, 1,
874 symbol_new (buf, sec, 0, fragP->fr_next),
875 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
876
877 /* Now create the unconditional branch + fixup to the
878 final target. */
879 fragP->fr_literal[offset + 2] = 0xdc;
880 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
881 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
882 fragP->fr_var = 0;
883 fragP->fr_fix += 7;
884 }
885 else if (fragP->fr_subtype == 3)
886 {
887 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
888 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
889 fragP->fr_var = 0;
890 fragP->fr_fix += 3;
891 }
892 else if (fragP->fr_subtype == 4)
893 {
894 /* Reverse the condition of the first branch. */
895 int offset = fragP->fr_fix;
896 int opcode = fragP->fr_literal[offset + 1] & 0xff;
897
898 switch (opcode)
899 {
900 case 0xe8:
901 opcode = 0xe9;
902 break;
903 case 0xe9:
904 opcode = 0xe8;
905 break;
906 case 0xea:
907 opcode = 0xeb;
908 break;
909 case 0xeb:
910 opcode = 0xea;
911 break;
912 default:
913 abort ();
914 }
915 fragP->fr_literal[offset + 1] = opcode;
916
917 /* Create a fixup for the reversed conditional branch. */
0aa529cb 918 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
919 fix_new (fragP, fragP->fr_fix + 2, 1,
920 symbol_new (buf, sec, 0, fragP->fr_next),
921 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
922
923 /* Now create the unconditional branch + fixup to the
924 final target. */
925 fragP->fr_literal[offset + 3] = 0xcc;
926 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
927 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
928 fragP->fr_var = 0;
929 fragP->fr_fix += 6;
930 }
931 else if (fragP->fr_subtype == 5)
932 {
933 /* Reverse the condition of the first branch. */
934 int offset = fragP->fr_fix;
935 int opcode = fragP->fr_literal[offset + 1] & 0xff;
936
937 switch (opcode)
938 {
939 case 0xe8:
940 opcode = 0xe9;
941 break;
942 case 0xea:
943 opcode = 0xeb;
944 break;
945 case 0xeb:
946 opcode = 0xea;
947 break;
948 default:
949 abort ();
950 }
951 fragP->fr_literal[offset + 1] = opcode;
952
953 /* Create a fixup for the reversed conditional branch. */
0aa529cb 954 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
955 fix_new (fragP, fragP->fr_fix + 2, 1,
956 symbol_new (buf, sec, 0, fragP->fr_next),
957 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
958
959 /* Now create the unconditional branch + fixup to the
960 final target. */
961 fragP->fr_literal[offset + 3] = 0xdc;
962 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
963 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
964 fragP->fr_var = 0;
965 fragP->fr_fix += 8;
966 }
967 else if (fragP->fr_subtype == 6)
968 {
969 int offset = fragP->fr_fix;
970 fragP->fr_literal[offset] = 0xcd;
971 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
972 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
973 fragP->fr_var = 0;
974 fragP->fr_fix += 5;
975 }
976 else if (fragP->fr_subtype == 7)
977 {
978 int offset = fragP->fr_fix;
979 fragP->fr_literal[offset] = 0xdd;
980 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
981 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
982
983 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
984 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
985 fragP->fr_var = 0;
986 fragP->fr_fix += 7;
987 }
988 else if (fragP->fr_subtype == 8)
989 {
990 int offset = fragP->fr_fix;
991 fragP->fr_literal[offset] = 0xfa;
992 fragP->fr_literal[offset + 1] = 0xff;
993 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
994 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
995 fragP->fr_var = 0;
996 fragP->fr_fix += 4;
997 }
998 else if (fragP->fr_subtype == 9)
999 {
1000 int offset = fragP->fr_fix;
1001 fragP->fr_literal[offset] = 0xfc;
1002 fragP->fr_literal[offset + 1] = 0xff;
1003
1004 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1005 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
1006 fragP->fr_var = 0;
1007 fragP->fr_fix += 6;
1008 }
1009 else if (fragP->fr_subtype == 10)
1010 {
1011 fragP->fr_literal[fragP->fr_fix] = 0xca;
1012 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
1013 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
1014 fragP->fr_var = 0;
1015 fragP->fr_fix += 2;
1016 }
1017 else if (fragP->fr_subtype == 11)
1018 {
1019 int offset = fragP->fr_fix;
1020 fragP->fr_literal[offset] = 0xcc;
1021
1022 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1023 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1024 fragP->fr_var = 0;
1025 fragP->fr_fix += 3;
1026 }
1027 else if (fragP->fr_subtype == 12)
1028 {
1029 int offset = fragP->fr_fix;
1030 fragP->fr_literal[offset] = 0xdc;
1031
1032 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1033 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1034 fragP->fr_var = 0;
1035 fragP->fr_fix += 5;
1036 }
e7b71525
AO
1037 else if (fragP->fr_subtype == 13)
1038 {
1039 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
1040 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1041 fragP->fr_var = 0;
1042 fragP->fr_fix += 3;
1043 }
1044 else if (fragP->fr_subtype == 14)
1045 {
1046 /* Reverse the condition of the first branch. */
1047 int offset = fragP->fr_fix;
1048 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1049
1050 switch (opcode)
1051 {
1052 case 0xd0:
1053 opcode = 0xd1;
1054 break;
1055 case 0xd1:
1056 opcode = 0xd0;
1057 break;
1058 case 0xd2:
1059 opcode = 0xdc;
1060 break;
1061 case 0xd3:
1062 opcode = 0xdb;
1063 break;
1064 case 0xd4:
1065 opcode = 0xda;
1066 break;
1067 case 0xd5:
1068 opcode = 0xd9;
1069 break;
1070 case 0xd6:
1071 opcode = 0xd8;
1072 break;
1073 case 0xd7:
1074 opcode = 0xdd;
1075 break;
1076 case 0xd8:
1077 opcode = 0xd6;
1078 break;
1079 case 0xd9:
1080 opcode = 0xd5;
1081 break;
1082 case 0xda:
1083 opcode = 0xd4;
1084 break;
1085 case 0xdb:
1086 opcode = 0xd3;
1087 break;
1088 case 0xdc:
1089 opcode = 0xd2;
1090 break;
1091 case 0xdd:
1092 opcode = 0xd7;
1093 break;
1094 default:
1095 abort ();
1096 }
1097 fragP->fr_literal[offset + 1] = opcode;
1098
1099 /* Create a fixup for the reversed conditional branch. */
1100 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1101 fix_new (fragP, fragP->fr_fix + 2, 1,
1102 symbol_new (buf, sec, 0, fragP->fr_next),
1103 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1104
1105 /* Now create the unconditional branch + fixup to the
1106 final target. */
1107 fragP->fr_literal[offset + 3] = 0xcc;
1108 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
1109 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1110 fragP->fr_var = 0;
1111 fragP->fr_fix += 6;
1112 }
1113 else if (fragP->fr_subtype == 15)
1114 {
1115 /* Reverse the condition of the first branch. */
1116 int offset = fragP->fr_fix;
1117 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1118
1119 switch (opcode)
1120 {
1121 case 0xd0:
1122 opcode = 0xd1;
1123 break;
1124 case 0xd1:
1125 opcode = 0xd0;
1126 break;
1127 case 0xd2:
1128 opcode = 0xdc;
1129 break;
1130 case 0xd3:
1131 opcode = 0xdb;
1132 break;
1133 case 0xd4:
1134 opcode = 0xda;
1135 break;
1136 case 0xd5:
1137 opcode = 0xd9;
1138 break;
1139 case 0xd6:
1140 opcode = 0xd8;
1141 break;
1142 case 0xd7:
1143 opcode = 0xdd;
1144 break;
1145 case 0xd8:
1146 opcode = 0xd6;
1147 break;
1148 case 0xd9:
1149 opcode = 0xd5;
1150 break;
1151 case 0xda:
1152 opcode = 0xd4;
1153 break;
1154 case 0xdb:
1155 opcode = 0xd3;
1156 break;
1157 case 0xdc:
1158 opcode = 0xd2;
1159 break;
1160 case 0xdd:
1161 opcode = 0xd7;
1162 break;
1163 default:
1164 abort ();
1165 }
1166 fragP->fr_literal[offset + 1] = opcode;
1167
1168 /* Create a fixup for the reversed conditional branch. */
1169 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1170 fix_new (fragP, fragP->fr_fix + 2, 1,
1171 symbol_new (buf, sec, 0, fragP->fr_next),
1172 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1173
1174 /* Now create the unconditional branch + fixup to the
1175 final target. */
1176 fragP->fr_literal[offset + 3] = 0xdc;
1177 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
1178 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1179 fragP->fr_var = 0;
1180 fragP->fr_fix += 8;
1181 }
252b5132
RH
1182 else
1183 abort ();
1184}
1185
1186valueT
1187md_section_align (seg, addr)
1188 asection *seg;
1189 valueT addr;
1190{
1191 int align = bfd_get_section_alignment (stdoutput, seg);
1192 return ((addr + (1 << align) - 1) & (-1 << align));
1193}
1194
1195void
1196md_begin ()
1197{
1198 char *prev_name = "";
1199 register const struct mn10300_opcode *op;
1200
87271fa6 1201 mn10300_hash = hash_new ();
252b5132
RH
1202
1203 /* Insert unique names into hash table. The MN10300 instruction set
1204 has many identical opcode names that have different opcodes based
1205 on the operands. This hash table then provides a quick index to
1206 the first opcode with a particular name in the opcode table. */
1207
1208 op = mn10300_opcodes;
1209 while (op->name)
1210 {
87271fa6 1211 if (strcmp (prev_name, op->name))
252b5132
RH
1212 {
1213 prev_name = (char *) op->name;
1214 hash_insert (mn10300_hash, op->name, (char *) op);
1215 }
1216 op++;
1217 }
1218
252b5132 1219 /* Set the default machine type. */
2ce28d43
AO
1220#ifdef TE_LINUX
1221 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
1222 as_warn (_("could not set architecture and machine"));
1223
1224 current_machine = AM33_2;
1225#else
0a727238 1226 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
1227 as_warn (_("could not set architecture and machine"));
1228
0a727238 1229 current_machine = MN103;
2ce28d43 1230#endif
252b5132
RH
1231}
1232
bf6f0d0c
AO
1233static symbolS *GOT_symbol;
1234
1235static inline int mn10300_check_fixup PARAMS ((struct mn10300_fixup *));
1236static inline int mn10300_PIC_related_p PARAMS ((symbolS *));
1237
1238static inline int
1239mn10300_PIC_related_p (sym)
1240 symbolS *sym;
1241{
1242 expressionS *exp;
1243
1244 if (! sym)
1245 return 0;
1246
1247 if (sym == GOT_symbol)
1248 return 1;
1249
1250 exp = symbol_get_value_expression (sym);
1251
1252 return (exp->X_op == O_PIC_reloc
1253 || mn10300_PIC_related_p (exp->X_add_symbol)
1254 || mn10300_PIC_related_p (exp->X_op_symbol));
1255}
1256
1257static inline int
1258mn10300_check_fixup (fixup)
1259 struct mn10300_fixup *fixup;
1260{
1261 expressionS *exp = &fixup->exp;
1262
1263 repeat:
1264 switch (exp->X_op)
1265 {
1266 case O_add:
1267 case O_subtract: /* If we're sufficiently unlucky that the label
1268 and the expression that references it happen
1269 to end up in different frags, the subtract
1270 won't be simplified within expression(). */
1271 /* The PIC-related operand must be the first operand of a sum. */
1272 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
1273 return 1;
1274
1275 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1276 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1277
1278 exp = symbol_get_value_expression (exp->X_add_symbol);
1279 goto repeat;
1280
1281 case O_symbol:
1282 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1283 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1284 break;
1285
1286 case O_PIC_reloc:
1287 fixup->reloc = exp->X_md;
1288 exp->X_op = O_symbol;
1289 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1290 && fixup->opindex >= 0
1291 && (mn10300_operands[fixup->opindex].flags
1292 & MN10300_OPERAND_RELAX))
1293 return 1;
1294 break;
1295
1296 default:
1297 return (mn10300_PIC_related_p (exp->X_add_symbol)
1298 || mn10300_PIC_related_p (exp->X_op_symbol));
1299 }
1300
1301 return 0;
1302}
1303
1304void
1305mn10300_cons_fix_new (frag, off, size, exp)
1306 fragS *frag;
1307 int off, size;
1308 expressionS *exp;
1309{
1310 struct mn10300_fixup fixup;
1311
1312 fixup.opindex = -1;
1313 fixup.exp = *exp;
1314 fixup.reloc = BFD_RELOC_UNUSED;
1315
1316 mn10300_check_fixup (&fixup);
1317
1318 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1319 switch (size)
1320 {
1321 case 2:
1322 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1323 break;
1324
1325 case 3:
1326 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1327 break;
1328
1329 case 4:
1330 break;
1331
1332 default:
1333 goto error;
1334 }
1335 else if (fixup.reloc == BFD_RELOC_UNUSED)
1336 switch (size)
1337 {
1338 case 1:
1339 fixup.reloc = BFD_RELOC_8;
1340 break;
1341
1342 case 2:
1343 fixup.reloc = BFD_RELOC_16;
1344 break;
1345
1346 case 3:
1347 fixup.reloc = BFD_RELOC_24;
1348 break;
1349
1350 case 4:
1351 fixup.reloc = BFD_RELOC_32;
1352 break;
1353
1354 default:
1355 goto error;
1356 }
1357 else if (size != 4)
1358 {
1359 error:
1360 as_bad (_("unsupported BFD relocation size %u"), size);
1361 fixup.reloc = BFD_RELOC_UNUSED;
1362 }
1363
1364 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1365}
1366
252b5132 1367void
87271fa6 1368md_assemble (str)
252b5132
RH
1369 char *str;
1370{
1371 char *s;
1372 struct mn10300_opcode *opcode;
1373 struct mn10300_opcode *next_opcode;
1374 const unsigned char *opindex_ptr;
1375 int next_opindex, relaxable;
eb0dfd58 1376 unsigned long insn, extension, size = 0;
252b5132
RH
1377 char *f;
1378 int i;
1379 int match;
1380
1381 /* Get the opcode. */
3882b010 1382 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
252b5132
RH
1383 ;
1384 if (*s != '\0')
1385 *s++ = '\0';
1386
87271fa6
NC
1387 /* Find the first opcode with the proper name. */
1388 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
1389 if (opcode == NULL)
1390 {
1391 as_bad (_("Unrecognized opcode: `%s'"), str);
1392 return;
1393 }
1394
1395 str = s;
3882b010 1396 while (ISSPACE (*str))
252b5132
RH
1397 ++str;
1398
1399 input_line_pointer = str;
1400
87271fa6 1401 for (;;)
252b5132
RH
1402 {
1403 const char *errmsg;
1404 int op_idx;
1405 char *hold;
1406 int extra_shift = 0;
1407
252b5132
RH
1408 errmsg = _("Invalid opcode/operands");
1409
1410 /* Reset the array of register operands. */
1411 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1412
1413 relaxable = 0;
1414 fc = 0;
1415 match = 0;
1416 next_opindex = 0;
1417 insn = opcode->opcode;
1418 extension = 0;
1419
1420 /* If the instruction is not available on the current machine
1421 then it can not possibly match. */
1422 if (opcode->machine
e7b71525 1423 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
aa15f6f7
AO
1424 && !(opcode->machine == AM33 && HAVE_AM33)
1425 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
1426 goto error;
1427
1428 for (op_idx = 1, opindex_ptr = opcode->operands;
1429 *opindex_ptr != 0;
1430 opindex_ptr++, op_idx++)
1431 {
1432 const struct mn10300_operand *operand;
1433 expressionS ex;
1434
1435 if (next_opindex == 0)
1436 {
1437 operand = &mn10300_operands[*opindex_ptr];
1438 }
1439 else
1440 {
1441 operand = &mn10300_operands[next_opindex];
1442 next_opindex = 0;
1443 }
1444
1445 while (*str == ' ' || *str == ',')
1446 ++str;
1447
1448 if (operand->flags & MN10300_OPERAND_RELAX)
1449 relaxable = 1;
1450
87271fa6 1451 /* Gather the operand. */
252b5132
RH
1452 hold = input_line_pointer;
1453 input_line_pointer = str;
1454
1455 if (operand->flags & MN10300_OPERAND_PAREN)
1456 {
1457 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1458 {
1459 input_line_pointer = hold;
1460 str = hold;
1461 goto error;
1462 }
1463 input_line_pointer++;
1464 goto keep_going;
1465 }
1466 /* See if we can match the operands. */
1467 else if (operand->flags & MN10300_OPERAND_DREG)
1468 {
1469 if (!data_register_name (&ex))
1470 {
1471 input_line_pointer = hold;
1472 str = hold;
1473 goto error;
1474 }
1475 }
1476 else if (operand->flags & MN10300_OPERAND_AREG)
1477 {
1478 if (!address_register_name (&ex))
1479 {
1480 input_line_pointer = hold;
1481 str = hold;
1482 goto error;
1483 }
1484 }
1485 else if (operand->flags & MN10300_OPERAND_SP)
1486 {
1487 char *start = input_line_pointer;
1488 char c = get_symbol_end ();
1489
1490 if (strcasecmp (start, "sp") != 0)
1491 {
1492 *input_line_pointer = c;
1493 input_line_pointer = hold;
1494 str = hold;
1495 goto error;
1496 }
1497 *input_line_pointer = c;
1498 goto keep_going;
1499 }
85cb2cf9
JL
1500 else if (operand->flags & MN10300_OPERAND_RREG)
1501 {
1502 if (!r_register_name (&ex))
1503 {
1504 input_line_pointer = hold;
1505 str = hold;
1506 goto error;
1507 }
1508 }
1509 else if (operand->flags & MN10300_OPERAND_XRREG)
1510 {
1511 if (!xr_register_name (&ex))
1512 {
1513 input_line_pointer = hold;
1514 str = hold;
1515 goto error;
1516 }
1517 }
e7b71525
AO
1518 else if (operand->flags & MN10300_OPERAND_FSREG)
1519 {
1520 if (!float_register_name (&ex))
1521 {
1522 input_line_pointer = hold;
1523 str = hold;
1524 goto error;
1525 }
1526 }
1527 else if (operand->flags & MN10300_OPERAND_FDREG)
1528 {
1529 if (!double_register_name (&ex))
1530 {
1531 input_line_pointer = hold;
1532 str = hold;
1533 goto error;
1534 }
1535 }
1536 else if (operand->flags & MN10300_OPERAND_FPCR)
1537 {
1538 char *start = input_line_pointer;
1539 char c = get_symbol_end ();
1540
1541 if (strcasecmp (start, "fpcr") != 0)
1542 {
1543 *input_line_pointer = c;
1544 input_line_pointer = hold;
1545 str = hold;
1546 goto error;
1547 }
1548 *input_line_pointer = c;
1549 goto keep_going;
1550 }
85cb2cf9
JL
1551 else if (operand->flags & MN10300_OPERAND_USP)
1552 {
1553 char *start = input_line_pointer;
1554 char c = get_symbol_end ();
1555
1556 if (strcasecmp (start, "usp") != 0)
1557 {
1558 *input_line_pointer = c;
1559 input_line_pointer = hold;
1560 str = hold;
1561 goto error;
1562 }
1563 *input_line_pointer = c;
1564 goto keep_going;
1565 }
1566 else if (operand->flags & MN10300_OPERAND_SSP)
1567 {
1568 char *start = input_line_pointer;
1569 char c = get_symbol_end ();
1570
1571 if (strcasecmp (start, "ssp") != 0)
1572 {
1573 *input_line_pointer = c;
1574 input_line_pointer = hold;
1575 str = hold;
1576 goto error;
1577 }
1578 *input_line_pointer = c;
1579 goto keep_going;
1580 }
1581 else if (operand->flags & MN10300_OPERAND_MSP)
1582 {
1583 char *start = input_line_pointer;
1584 char c = get_symbol_end ();
1585
1586 if (strcasecmp (start, "msp") != 0)
1587 {
1588 *input_line_pointer = c;
1589 input_line_pointer = hold;
1590 str = hold;
1591 goto error;
1592 }
1593 *input_line_pointer = c;
1594 goto keep_going;
1595 }
1596 else if (operand->flags & MN10300_OPERAND_PC)
1597 {
1598 char *start = input_line_pointer;
1599 char c = get_symbol_end ();
1600
1601 if (strcasecmp (start, "pc") != 0)
1602 {
1603 *input_line_pointer = c;
1604 input_line_pointer = hold;
1605 str = hold;
1606 goto error;
1607 }
1608 *input_line_pointer = c;
1609 goto keep_going;
1610 }
1611 else if (operand->flags & MN10300_OPERAND_EPSW)
1612 {
1613 char *start = input_line_pointer;
1614 char c = get_symbol_end ();
1615
1616 if (strcasecmp (start, "epsw") != 0)
1617 {
1618 *input_line_pointer = c;
1619 input_line_pointer = hold;
1620 str = hold;
1621 goto error;
1622 }
1623 *input_line_pointer = c;
1624 goto keep_going;
1625 }
1626 else if (operand->flags & MN10300_OPERAND_PLUS)
1627 {
1628 if (*input_line_pointer != '+')
1629 {
1630 input_line_pointer = hold;
1631 str = hold;
1632 goto error;
1633 }
1634 input_line_pointer++;
1635 goto keep_going;
1636 }
252b5132
RH
1637 else if (operand->flags & MN10300_OPERAND_PSW)
1638 {
1639 char *start = input_line_pointer;
1640 char c = get_symbol_end ();
1641
1642 if (strcasecmp (start, "psw") != 0)
1643 {
1644 *input_line_pointer = c;
1645 input_line_pointer = hold;
1646 str = hold;
1647 goto error;
1648 }
1649 *input_line_pointer = c;
1650 goto keep_going;
1651 }
1652 else if (operand->flags & MN10300_OPERAND_MDR)
1653 {
1654 char *start = input_line_pointer;
1655 char c = get_symbol_end ();
1656
1657 if (strcasecmp (start, "mdr") != 0)
1658 {
1659 *input_line_pointer = c;
1660 input_line_pointer = hold;
1661 str = hold;
1662 goto error;
1663 }
1664 *input_line_pointer = c;
1665 goto keep_going;
1666 }
1667 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1668 {
1669 unsigned int value = 0;
1670 if (*input_line_pointer != '[')
1671 {
1672 input_line_pointer = hold;
1673 str = hold;
1674 goto error;
1675 }
1676
1677 /* Eat the '['. */
1678 input_line_pointer++;
87271fa6 1679
252b5132 1680 /* We used to reject a null register list here; however,
87271fa6
NC
1681 we accept it now so the compiler can emit "call"
1682 instructions for all calls to named functions.
252b5132
RH
1683
1684 The linker can then fill in the appropriate bits for the
1685 register list and stack size or change the instruction
1686 into a "calls" if using "call" is not profitable. */
1687 while (*input_line_pointer != ']')
1688 {
1689 char *start;
1690 char c;
1691
1692 if (*input_line_pointer == ',')
1693 input_line_pointer++;
1694
1695 start = input_line_pointer;
1696 c = get_symbol_end ();
1697
1698 if (strcasecmp (start, "d2") == 0)
1699 {
1700 value |= 0x80;
1701 *input_line_pointer = c;
1702 }
1703 else if (strcasecmp (start, "d3") == 0)
1704 {
1705 value |= 0x40;
1706 *input_line_pointer = c;
1707 }
1708 else if (strcasecmp (start, "a2") == 0)
1709 {
1710 value |= 0x20;
1711 *input_line_pointer = c;
1712 }
1713 else if (strcasecmp (start, "a3") == 0)
1714 {
1715 value |= 0x10;
1716 *input_line_pointer = c;
1717 }
1718 else if (strcasecmp (start, "other") == 0)
1719 {
1720 value |= 0x08;
1721 *input_line_pointer = c;
1722 }
0a727238 1723 else if (HAVE_AM33
85cb2cf9
JL
1724 && strcasecmp (start, "exreg0") == 0)
1725 {
1726 value |= 0x04;
1727 *input_line_pointer = c;
1728 }
0a727238 1729 else if (HAVE_AM33
85cb2cf9
JL
1730 && strcasecmp (start, "exreg1") == 0)
1731 {
1732 value |= 0x02;
1733 *input_line_pointer = c;
1734 }
0a727238 1735 else if (HAVE_AM33
85cb2cf9
JL
1736 && strcasecmp (start, "exother") == 0)
1737 {
1738 value |= 0x01;
1739 *input_line_pointer = c;
1740 }
0a727238 1741 else if (HAVE_AM33
85cb2cf9
JL
1742 && strcasecmp (start, "all") == 0)
1743 {
1744 value |= 0xff;
1745 *input_line_pointer = c;
1746 }
252b5132
RH
1747 else
1748 {
1749 input_line_pointer = hold;
1750 str = hold;
1751 goto error;
1752 }
1753 }
1754 input_line_pointer++;
1755 mn10300_insert_operand (&insn, &extension, operand,
1756 value, (char *) NULL, 0, 0);
1757 goto keep_going;
1758
1759 }
1760 else if (data_register_name (&ex))
1761 {
1762 input_line_pointer = hold;
1763 str = hold;
1764 goto error;
1765 }
1766 else if (address_register_name (&ex))
1767 {
1768 input_line_pointer = hold;
1769 str = hold;
1770 goto error;
1771 }
1772 else if (other_register_name (&ex))
1773 {
1774 input_line_pointer = hold;
1775 str = hold;
1776 goto error;
1777 }
0a727238 1778 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1779 {
1780 input_line_pointer = hold;
1781 str = hold;
1782 goto error;
1783 }
0a727238 1784 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1785 {
1786 input_line_pointer = hold;
1787 str = hold;
1788 goto error;
1789 }
e7b71525
AO
1790 else if (HAVE_AM33_2 && float_register_name (&ex))
1791 {
1792 input_line_pointer = hold;
1793 str = hold;
1794 goto error;
1795 }
1796 else if (HAVE_AM33_2 && double_register_name (&ex))
1797 {
1798 input_line_pointer = hold;
1799 str = hold;
1800 goto error;
1801 }
252b5132
RH
1802 else if (*str == ')' || *str == '(')
1803 {
1804 input_line_pointer = hold;
1805 str = hold;
1806 goto error;
1807 }
1808 else
1809 {
1810 expression (&ex);
1811 }
1812
87271fa6 1813 switch (ex.X_op)
252b5132
RH
1814 {
1815 case O_illegal:
1816 errmsg = _("illegal operand");
1817 goto error;
1818 case O_absent:
1819 errmsg = _("missing operand");
1820 goto error;
1821 case O_register:
1822 {
1823 int mask;
1824
1825 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1826 if (HAVE_AM33)
1827 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
e7b71525
AO
1828 if (HAVE_AM33_2)
1829 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
252b5132
RH
1830 if ((operand->flags & mask) == 0)
1831 {
1832 input_line_pointer = hold;
1833 str = hold;
1834 goto error;
1835 }
87271fa6 1836
252b5132
RH
1837 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1838 extra_shift = 8;
1839 else if (opcode->format == FMT_D2
1840 || opcode->format == FMT_D4
1841 || opcode->format == FMT_S2
1842 || opcode->format == FMT_S4
1843 || opcode->format == FMT_S6
1844 || opcode->format == FMT_D5)
1845 extra_shift = 16;
85cb2cf9
JL
1846 else if (opcode->format == FMT_D7)
1847 extra_shift = 8;
1848 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1849 extra_shift = 8;
252b5132
RH
1850 else
1851 extra_shift = 0;
87271fa6 1852
252b5132
RH
1853 mn10300_insert_operand (&insn, &extension, operand,
1854 ex.X_add_number, (char *) NULL,
1855 0, extra_shift);
1856
252b5132
RH
1857 /* And note the register number in the register array. */
1858 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1859 break;
1860 }
1861
1862 case O_constant:
1863 /* If this operand can be promoted, and it doesn't
1864 fit into the allocated bitfield for this insn,
1865 then promote it (ie this opcode does not match). */
1866 if (operand->flags
1867 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1868 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1869 {
1870 input_line_pointer = hold;
1871 str = hold;
1872 goto error;
1873 }
1874
1875 mn10300_insert_operand (&insn, &extension, operand,
1876 ex.X_add_number, (char *) NULL,
1877 0, 0);
1878 break;
1879
1880 default:
1881 /* If this operand can be promoted, then this opcode didn't
1882 match since we can't know if it needed promotion! */
1883 if (operand->flags & MN10300_OPERAND_PROMOTE)
1884 {
1885 input_line_pointer = hold;
1886 str = hold;
1887 goto error;
1888 }
1889
1890 /* We need to generate a fixup for this expression. */
1891 if (fc >= MAX_INSN_FIXUPS)
1892 as_fatal (_("too many fixups"));
1893 fixups[fc].exp = ex;
1894 fixups[fc].opindex = *opindex_ptr;
1895 fixups[fc].reloc = BFD_RELOC_UNUSED;
bf6f0d0c
AO
1896 if (mn10300_check_fixup (& fixups[fc]))
1897 goto error;
252b5132
RH
1898 ++fc;
1899 break;
1900 }
1901
1902keep_going:
1903 str = input_line_pointer;
1904 input_line_pointer = hold;
1905
1906 while (*str == ' ' || *str == ',')
1907 ++str;
1908
1909 }
1910
1911 /* Make sure we used all the operands! */
1912 if (*str != ',')
1913 match = 1;
1914
1915 /* If this instruction has registers that must not match, verify
1916 that they do indeed not match. */
1917 if (opcode->no_match_operands)
1918 {
1919 int i;
1920
1921 /* Look at each operand to see if it's marked. */
1922 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1923 {
1924 if ((1 << i) & opcode->no_match_operands)
1925 {
1926 int j;
1927
1928 /* operand I is marked. Check that it does not match any
1929 operands > I which are marked. */
1930 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1931 {
1932 if (((1 << j) & opcode->no_match_operands)
1933 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1934 {
1935 errmsg = _("Invalid register specification.");
1936 match = 0;
1937 goto error;
1938 }
1939 }
1940 }
1941 }
1942 }
1943
1944 error:
1945 if (match == 0)
87271fa6 1946 {
252b5132 1947 next_opcode = opcode + 1;
87271fa6 1948 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1949 {
1950 opcode = next_opcode;
1951 continue;
1952 }
87271fa6 1953
252b5132
RH
1954 as_bad ("%s", errmsg);
1955 return;
87271fa6 1956 }
252b5132
RH
1957 break;
1958 }
87271fa6 1959
3882b010 1960 while (ISSPACE (*str))
252b5132
RH
1961 ++str;
1962
1963 if (*str != '\0')
1964 as_bad (_("junk at end of line: `%s'"), str);
1965
1966 input_line_pointer = str;
1967
1968 /* Determine the size of the instruction. */
1969 if (opcode->format == FMT_S0)
1970 size = 1;
1971
1972 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1973 size = 2;
1974
1975 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1976 size = 3;
1977
85cb2cf9
JL
1978 if (opcode->format == FMT_D6)
1979 size = 3;
1980
1981 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1982 size = 4;
1983
1984 if (opcode->format == FMT_D8)
1985 size = 6;
1986
1987 if (opcode->format == FMT_D9)
1988 size = 7;
252b5132
RH
1989
1990 if (opcode->format == FMT_S4)
1991 size = 5;
1992
1993 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1994 size = 7;
1995
1996 if (opcode->format == FMT_D2)
1997 size = 4;
1998
e7b71525
AO
1999 if (opcode->format == FMT_D3)
2000 size = 5;
2001
252b5132
RH
2002 if (opcode->format == FMT_D4)
2003 size = 6;
2004
2005 if (relaxable && fc > 0)
2006 {
8ad7c533
NC
2007 /* On a 64-bit host the size of an 'int' is not the same
2008 as the size of a pointer, so we need a union to convert
2009 the opindex field of the fr_cgen structure into a char *
2010 so that it can be stored in the frag. We do not have
2011 to worry about loosing accuracy as we are not going to
2012 be even close to the 32bit limit of the int. */
2013 union
2014 {
2015 int opindex;
2016 char * ptr;
2017 }
2018 opindex_converter;
252b5132
RH
2019 int type;
2020
076dc439
AO
2021 /* We want to anchor the line info to the previous frag (if
2022 there isn't one, create it), so that, when the insn is
2023 resized, we still get the right address for the beginning of
2024 the region. */
2025 f = frag_more (0);
2026 dwarf2_emit_insn (0);
2027
87271fa6 2028 /* bCC */
252b5132
RH
2029 if (size == 2)
2030 {
2031 /* Handle bra specially. Basically treat it like jmp so
2032 that we automatically handle 8, 16 and 32 bit offsets
2033 correctly as well as jumps to an undefined address.
2034
2035 It is also important to not treat it like other bCC
2036 instructions since the long forms of bra is different
2037 from other bCC instructions. */
2038 if (opcode->opcode == 0xca00)
2039 type = 10;
2040 else
2041 type = 0;
2042 }
87271fa6 2043 /* call */
252b5132 2044 else if (size == 5)
87271fa6
NC
2045 type = 6;
2046 /* calls */
252b5132
RH
2047 else if (size == 4)
2048 type = 8;
87271fa6 2049 /* jmp */
252b5132
RH
2050 else if (size == 3 && opcode->opcode == 0xcc0000)
2051 type = 10;
e7b71525
AO
2052 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
2053 type = 13;
87271fa6 2054 /* bCC (uncommon cases) */
252b5132
RH
2055 else
2056 type = 3;
2057
8ad7c533 2058 opindex_converter.opindex = fixups[0].opindex;
252b5132
RH
2059 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
2060 fixups[0].exp.X_add_symbol,
2061 fixups[0].exp.X_add_number,
8ad7c533 2062 opindex_converter.ptr);
87271fa6 2063
252b5132
RH
2064 /* This is pretty hokey. We basically just care about the
2065 opcode, so we have to write out the first word big endian.
2066
2067 The exception is "call", which has two operands that we
2068 care about.
2069
2070 The first operand (the register list) happens to be in the
2071 first instruction word, and will be in the right place if
2072 we output the first word in big endian mode.
2073
2074 The second operand (stack size) is in the extension word,
2075 and we want it to appear as the first character in the extension
2076 word (as it appears in memory). Luckily, writing the extension
2077 word in big endian format will do what we want. */
2078 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
2079 if (size > 8)
2080 {
2081 number_to_chars_bigendian (f + 4, extension, 4);
2082 number_to_chars_bigendian (f + 8, 0, size - 8);
2083 }
2084 else if (size > 4)
2085 number_to_chars_bigendian (f + 4, extension, size - 4);
2086 }
2087 else
2088 {
2089 /* Allocate space for the instruction. */
2090 f = frag_more (size);
2091
2092 /* Fill in bytes for the instruction. Note that opcode fields
2093 are written big-endian, 16 & 32bit immediates are written
2094 little endian. Egad. */
2095 if (opcode->format == FMT_S0
2096 || opcode->format == FMT_S1
2097 || opcode->format == FMT_D0
85cb2cf9
JL
2098 || opcode->format == FMT_D6
2099 || opcode->format == FMT_D7
2100 || opcode->format == FMT_D10
252b5132
RH
2101 || opcode->format == FMT_D1)
2102 {
2103 number_to_chars_bigendian (f, insn, size);
2104 }
2105 else if (opcode->format == FMT_S2
2106 && opcode->opcode != 0xdf0000
2107 && opcode->opcode != 0xde0000)
2108 {
2109 /* A format S2 instruction that is _not_ "ret" and "retf". */
2110 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
2111 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
2112 }
2113 else if (opcode->format == FMT_S2)
2114 {
2115 /* This must be a ret or retf, which is written entirely in
2116 big-endian format. */
2117 number_to_chars_bigendian (f, insn, 3);
2118 }
2119 else if (opcode->format == FMT_S4
2120 && opcode->opcode != 0xdc000000)
2121 {
2122 /* This must be a format S4 "call" instruction. What a pain. */
2123 unsigned long temp = (insn >> 8) & 0xffff;
2124 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2125 number_to_chars_littleendian (f + 1, temp, 2);
2126 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
2127 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2128 }
2129 else if (opcode->format == FMT_S4)
2130 {
2131 /* This must be a format S4 "jmp" instruction. */
2132 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
2133 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2134 number_to_chars_littleendian (f + 1, temp, 4);
2135 }
2136 else if (opcode->format == FMT_S6)
2137 {
2138 unsigned long temp = ((insn & 0xffffff) << 8)
2139 | ((extension >> 16) & 0xff);
2140 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2141 number_to_chars_littleendian (f + 1, temp, 4);
2142 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2143 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2144 }
2145 else if (opcode->format == FMT_D2
2146 && opcode->opcode != 0xfaf80000
2147 && opcode->opcode != 0xfaf00000
2148 && opcode->opcode != 0xfaf40000)
2149 {
2150 /* A format D2 instruction where the 16bit immediate is
2151 really a single 16bit value, not two 8bit values. */
2152 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2153 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2154 }
2155 else if (opcode->format == FMT_D2)
2156 {
2157 /* A format D2 instruction where the 16bit immediate
2158 is really two 8bit immediates. */
2159 number_to_chars_bigendian (f, insn, 4);
2160 }
e7b71525
AO
2161 else if (opcode->format == FMT_D3)
2162 {
2163 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2164 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2165 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2166 }
252b5132
RH
2167 else if (opcode->format == FMT_D4)
2168 {
2169 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 2170
252b5132
RH
2171 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2172 number_to_chars_littleendian (f + 2, temp, 4);
2173 }
2174 else if (opcode->format == FMT_D5)
2175 {
87271fa6
NC
2176 unsigned long temp = (((insn & 0xffff) << 16)
2177 | ((extension >> 8) & 0xffff));
2178
252b5132
RH
2179 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2180 number_to_chars_littleendian (f + 2, temp, 4);
2181 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2182 }
85cb2cf9
JL
2183 else if (opcode->format == FMT_D8)
2184 {
87271fa6
NC
2185 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2186
2187 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2188 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2189 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
2190 }
2191 else if (opcode->format == FMT_D9)
2192 {
87271fa6
NC
2193 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2194
2195 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2196 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 2197 }
252b5132
RH
2198
2199 /* Create any fixups. */
2200 for (i = 0; i < fc; i++)
2201 {
2202 const struct mn10300_operand *operand;
2203
2204 operand = &mn10300_operands[fixups[i].opindex];
bf6f0d0c
AO
2205 if (fixups[i].reloc != BFD_RELOC_UNUSED
2206 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2207 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2208 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2209 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
252b5132
RH
2210 {
2211 reloc_howto_type *reloc_howto;
2212 int size;
2213 int offset;
2214 fixS *fixP;
2215
87271fa6
NC
2216 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2217 fixups[i].reloc);
252b5132
RH
2218
2219 if (!reloc_howto)
87271fa6
NC
2220 abort ();
2221
252b5132
RH
2222 size = bfd_get_reloc_size (reloc_howto);
2223
2224 if (size < 1 || size > 4)
87271fa6 2225 abort ();
252b5132
RH
2226
2227 offset = 4 - size;
2228 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2229 size, &fixups[i].exp,
2230 reloc_howto->pc_relative,
2231 fixups[i].reloc);
2232 }
2233 else
2234 {
2235 int reloc, pcrel, reloc_size, offset;
2236 fixS *fixP;
2237
2238 reloc = BFD_RELOC_NONE;
bf6f0d0c
AO
2239 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2240 reloc = fixups[i].reloc;
252b5132
RH
2241 /* How big is the reloc? Remember SPLIT relocs are
2242 implicitly 32bits. */
2243 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2244 reloc_size = 32;
85cb2cf9
JL
2245 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2246 reloc_size = 24;
252b5132
RH
2247 else
2248 reloc_size = operand->bits;
2249
2250 /* Is the reloc pc-relative? */
2251 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
bf6f0d0c
AO
2252 if (reloc != BFD_RELOC_NONE)
2253 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
252b5132 2254
a7c92dae 2255 offset = size - (reloc_size + operand->shift) / 8;
eb0dfd58 2256
252b5132 2257 /* Choose a proper BFD relocation type. */
bf6f0d0c
AO
2258 if (reloc != BFD_RELOC_NONE)
2259 ;
2260 else if (pcrel)
252b5132
RH
2261 {
2262 if (reloc_size == 32)
2263 reloc = BFD_RELOC_32_PCREL;
2264 else if (reloc_size == 16)
2265 reloc = BFD_RELOC_16_PCREL;
2266 else if (reloc_size == 8)
2267 reloc = BFD_RELOC_8_PCREL;
2268 else
2269 abort ();
2270 }
2271 else
2272 {
2273 if (reloc_size == 32)
2274 reloc = BFD_RELOC_32;
2275 else if (reloc_size == 16)
2276 reloc = BFD_RELOC_16;
2277 else if (reloc_size == 8)
2278 reloc = BFD_RELOC_8;
2279 else
2280 abort ();
2281 }
2282
2283 /* Convert the size of the reloc into what fix_new_exp wants. */
2284 reloc_size = reloc_size / 8;
2285 if (reloc_size == 8)
2286 reloc_size = 0;
2287 else if (reloc_size == 16)
2288 reloc_size = 1;
2289 else if (reloc_size == 32)
2290 reloc_size = 2;
2291
2292 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2293 reloc_size, &fixups[i].exp, pcrel,
2294 ((bfd_reloc_code_real_type) reloc));
2295
2296 if (pcrel)
2297 fixP->fx_offset += offset;
2298 }
2299 }
e8b1cae5 2300
076dc439
AO
2301 dwarf2_emit_insn (size);
2302 }
252b5132
RH
2303}
2304
87271fa6
NC
2305/* If while processing a fixup, a reloc really needs to be created
2306 then it is done here. */
252b5132 2307
252b5132
RH
2308arelent *
2309tc_gen_reloc (seg, fixp)
b4c1ea07 2310 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
2311 fixS *fixp;
2312{
2313 arelent *reloc;
2314 reloc = (arelent *) xmalloc (sizeof (arelent));
2315
2316 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2317 if (reloc->howto == (reloc_howto_type *) NULL)
2318 {
2319 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
2320 _("reloc %d not supported by object file format"),
2321 (int) fixp->fx_r_type);
252b5132
RH
2322 return NULL;
2323 }
2324 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2325
bf6f0d0c
AO
2326 if (fixp->fx_subsy
2327 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2328 {
2329 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2330 fixp->fx_subsy = 0;
2331 }
2332
252b5132
RH
2333 if (fixp->fx_addsy && fixp->fx_subsy)
2334 {
7dc8f5ce
AO
2335 reloc->sym_ptr_ptr = NULL;
2336
4e75439a
AO
2337 /* If we got a difference between two symbols, and the
2338 subtracted symbol is in the current section, use a
2339 PC-relative relocation. If both symbols are in the same
2340 section, the difference would have already been simplified
2341 to a constant. */
2342 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
2343 {
2344 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2345 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2346 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
2347 + fixp->fx_offset);
2348
2349 switch (fixp->fx_r_type)
2350 {
2351 case BFD_RELOC_8:
2352 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2353 BFD_RELOC_8_PCREL);
2354 return reloc;
5d6255fe 2355
4e75439a
AO
2356 case BFD_RELOC_16:
2357 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2358 BFD_RELOC_16_PCREL);
2359 return reloc;
2360
2361 case BFD_RELOC_24:
2362 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2363 BFD_RELOC_24_PCREL);
2364 return reloc;
2365
2366 case BFD_RELOC_32:
2367 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2368 BFD_RELOC_32_PCREL);
2369 return reloc;
2370
2371 default:
2372 /* Try to compute the absolute value below. */
2373 break;
2374 }
2375 }
87271fa6 2376
252b5132
RH
2377 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2378 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2379 {
2380 as_bad_where (fixp->fx_file, fixp->fx_line,
2381 "Difference of symbols in different sections is not supported");
252b5132 2382 }
6e22e505
AO
2383 else
2384 {
2385 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2386
2387 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2388 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2389
2390 switch (fixp->fx_r_type)
2391 {
2392 case BFD_RELOC_8:
2393 md_number_to_chars (fixpos, reloc->addend, 1);
2394 break;
5d6255fe 2395
6e22e505
AO
2396 case BFD_RELOC_16:
2397 md_number_to_chars (fixpos, reloc->addend, 2);
2398 break;
252b5132 2399
6e22e505
AO
2400 case BFD_RELOC_24:
2401 md_number_to_chars (fixpos, reloc->addend, 3);
2402 break;
2403
2404 case BFD_RELOC_32:
2405 md_number_to_chars (fixpos, reloc->addend, 4);
2406 break;
2407
2408 default:
f592407e
AM
2409 reloc->sym_ptr_ptr
2410 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
6e22e505
AO
2411 return reloc;
2412 }
2413 }
2414
7dc8f5ce
AO
2415 if (reloc->sym_ptr_ptr)
2416 free (reloc->sym_ptr_ptr);
6e22e505
AO
2417 free (reloc);
2418 return NULL;
252b5132 2419 }
87271fa6 2420 else
252b5132 2421 {
87271fa6 2422 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 2423 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2424 reloc->addend = fixp->fx_offset;
2425 }
2426 return reloc;
2427}
2428
2429int
2430md_estimate_size_before_relax (fragp, seg)
2431 fragS *fragp;
2432 asection *seg;
2433{
93c2a809
AM
2434 if (fragp->fr_subtype == 6
2435 && (!S_IS_DEFINED (fragp->fr_symbol)
2436 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2437 fragp->fr_subtype = 7;
2438 else if (fragp->fr_subtype == 8
2439 && (!S_IS_DEFINED (fragp->fr_symbol)
2440 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2441 fragp->fr_subtype = 9;
2442 else if (fragp->fr_subtype == 10
2443 && (!S_IS_DEFINED (fragp->fr_symbol)
2444 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2445 fragp->fr_subtype = 12;
2446
e7b71525
AO
2447 if (fragp->fr_subtype == 13)
2448 return 3;
93c2a809
AM
2449 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2450 abort ();
2451
2452 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 2453}
252b5132
RH
2454
2455long
2456md_pcrel_from (fixp)
2457 fixS *fixp;
2458{
87271fa6 2459 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
2460 {
2461 /* The symbol is undefined. Let the linker figure it out. */
2462 return 0;
2463 }
2464 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
2465}
2466
94f592af 2467void
55cf6793 2468md_apply_fix (fixP, valP, seg)
94f592af
NC
2469 fixS * fixP;
2470 valueT * valP;
252b5132
RH
2471 segT seg;
2472{
94f592af 2473 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
58a77e41 2474 int size = 0;
94f592af 2475 int value = (int) * valP;
58a77e41 2476
94f592af 2477 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
58a77e41
EC
2478
2479 /* This should never happen. */
2480 if (seg->flags & SEC_ALLOC)
94f592af 2481 abort ();
58a77e41 2482
c51ce5f0 2483 /* The value we are passed in *valuep includes the symbol values.
7be1c489
AM
2484 If we are doing this relocation the code in write.c is going to
2485 call bfd_install_relocation, which is also going to use the symbol
2486 value. That means that if the reloc is fully resolved we want to
2487 use *valuep since bfd_install_relocation is not being used.
c51ce5f0
EC
2488
2489 However, if the reloc is not fully resolved we do not want to use
2490 *valuep, and must use fx_offset instead. However, if the reloc
2491 is PC relative, we do want to use *valuep since it includes the
2492 result of md_pcrel_from. */
94f592af
NC
2493 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
2494 value = fixP->fx_offset;
c51ce5f0 2495
58a77e41
EC
2496 /* If the fix is relative to a symbol which is not defined, or not
2497 in the same segment as the fix, we cannot resolve it here. */
94f592af
NC
2498 if (fixP->fx_addsy != NULL
2499 && (! S_IS_DEFINED (fixP->fx_addsy)
2500 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
58a77e41 2501 {
94f592af
NC
2502 fixP->fx_done = 0;
2503 return;
58a77e41
EC
2504 }
2505
94f592af 2506 switch (fixP->fx_r_type)
58a77e41
EC
2507 {
2508 case BFD_RELOC_8:
96f37af6 2509 case BFD_RELOC_8_PCREL:
58a77e41
EC
2510 size = 1;
2511 break;
2512
2513 case BFD_RELOC_16:
96f37af6 2514 case BFD_RELOC_16_PCREL:
58a77e41
EC
2515 size = 2;
2516 break;
2517
2518 case BFD_RELOC_32:
96f37af6 2519 case BFD_RELOC_32_PCREL:
58a77e41
EC
2520 size = 4;
2521 break;
2522
2523 case BFD_RELOC_VTABLE_INHERIT:
2524 case BFD_RELOC_VTABLE_ENTRY:
94f592af
NC
2525 fixP->fx_done = 0;
2526 return;
58a77e41
EC
2527
2528 case BFD_RELOC_NONE:
2529 default:
94f592af
NC
2530 as_bad_where (fixP->fx_file, fixP->fx_line,
2531 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
58a77e41
EC
2532 }
2533
c51ce5f0 2534 md_number_to_chars (fixpos, value, size);
58a77e41 2535
b653e7f9 2536 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
94f592af
NC
2537 if (fixP->fx_addsy == NULL)
2538 fixP->fx_done = 1;
58a77e41
EC
2539}
2540
58a77e41
EC
2541/* Return zero if the fixup in fixp should be left alone and not
2542 adjusted. */
2543
b34976b6 2544bfd_boolean
58a77e41
EC
2545mn10300_fix_adjustable (fixp)
2546 struct fix *fixp;
2547{
bf6f0d0c
AO
2548 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixp))
2549 return 0;
2550
58a77e41
EC
2551 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2552 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2553 return 0;
2554
7e8f4100
AO
2555 /* Do not adjust relocations involving symbols in code sections,
2556 because it breaks linker relaxations. This could be fixed in the
2557 linker, but this fix is simpler, and it pretty much only affects
2558 object size a little bit. */
2559 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2560 return 0;
2561
53cb0362
DD
2562 /* Likewise, do not adjust symbols that won't be merged, or debug
2563 symbols, because they too break relaxation. We do want to adjust
2564 other mergable symbols, like .rodata, because code relaxations
2565 need section-relative symbols to properly relax them. */
2566 if (! (S_GET_SEGMENT(fixp->fx_addsy)->flags & SEC_MERGE))
2567 return 0;
2568 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2569 return 0;
2570
58a77e41 2571 return 1;
252b5132
RH
2572}
2573
2574/* Insert an operand value into an instruction. */
2575
2576static void
2577mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2578 unsigned long *insnp;
2579 unsigned long *extensionp;
2580 const struct mn10300_operand *operand;
2581 offsetT val;
2582 char *file;
2583 unsigned int line;
2584 unsigned int shift;
2585{
2586 /* No need to check 32bit operands for a bit. Note that
2587 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2588 if (operand->bits != 32
2589 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2590 {
2591 long min, max;
2592 offsetT test;
2593 int bits;
2594
2595 bits = operand->bits;
85cb2cf9
JL
2596 if (operand->flags & MN10300_OPERAND_24BIT)
2597 bits = 24;
252b5132
RH
2598
2599 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2600 {
2601 max = (1 << (bits - 1)) - 1;
2602 min = - (1 << (bits - 1));
2603 }
2604 else
87271fa6
NC
2605 {
2606 max = (1 << bits) - 1;
2607 min = 0;
2608 }
252b5132
RH
2609
2610 test = val;
2611
252b5132 2612 if (test < (offsetT) min || test > (offsetT) max)
e5976317 2613 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH
2614 }
2615
2616 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2617 {
2618 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2619 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2620 << operand->shift);
2621 }
85cb2cf9
JL
2622 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2623 {
2624 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2625 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2626 << operand->shift);
2627 }
e7b71525
AO
2628 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
2629 {
2630 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
2631 explanation of these variables. Note that FMT-implied shifts
2632 are not taken into account for FP registers. */
2633 unsigned long mask_low, mask_high;
2634 int shl_low, shr_high, shl_high;
2635
2636 switch (operand->bits)
2637 {
2638 case 5:
2639 /* Handle regular FP registers. */
2640 if (operand->shift >= 0)
2641 {
2642 /* This is an `m' register. */
2643 shl_low = operand->shift;
2644 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
2645 }
2646 else
2647 {
2648 /* This is an `n' register. */
2649 shl_low = -operand->shift;
2650 shl_high = shl_low / 4;
2651 }
2652
2653 mask_low = 0x0f;
2654 mask_high = 0x10;
2655 shr_high = 4;
2656 break;
2657
2658 case 3:
2659 /* Handle accumulators. */
2660 shl_low = -operand->shift;
2661 shl_high = 0;
2662 mask_low = 0x03;
2663 mask_high = 0x04;
2664 shr_high = 2;
2665 break;
2666
2667 default:
2668 abort ();
2669 }
2670 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
2671 | ((val & mask_low) << shl_low));
2672 }
252b5132
RH
2673 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2674 {
2675 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2676 << (operand->shift + shift));
2677
2678 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2679 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2680 << (operand->shift + shift + operand->bits));
2681 }
2682 else
2683 {
2684 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2685 << (operand->shift + shift));
2686
2687 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2688 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2689 << (operand->shift + shift + operand->bits));
2690 }
2691}
2692
2693static unsigned long
2694check_operand (insn, operand, val)
b4c1ea07 2695 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2696 const struct mn10300_operand *operand;
2697 offsetT val;
2698{
2699 /* No need to check 32bit operands for a bit. Note that
2700 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2701 if (operand->bits != 32
2702 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2703 {
2704 long min, max;
2705 offsetT test;
2706 int bits;
2707
2708 bits = operand->bits;
85cb2cf9
JL
2709 if (operand->flags & MN10300_OPERAND_24BIT)
2710 bits = 24;
252b5132
RH
2711
2712 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2713 {
2714 max = (1 << (bits - 1)) - 1;
2715 min = - (1 << (bits - 1));
2716 }
2717 else
87271fa6
NC
2718 {
2719 max = (1 << bits) - 1;
2720 min = 0;
2721 }
252b5132
RH
2722
2723 test = val;
2724
252b5132
RH
2725 if (test < (offsetT) min || test > (offsetT) max)
2726 return 0;
2727 else
2728 return 1;
2729 }
2730 return 1;
2731}
2732
2733static void
2734set_arch_mach (mach)
497f322d 2735 int mach;
252b5132
RH
2736{
2737 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2738 as_warn (_("could not set architecture and machine"));
2739
2740 current_machine = mach;
2741}
bf6f0d0c
AO
2742
2743static inline char * mn10300_end_of_match PARAMS ((char *, char *));
2744
2745static inline char *
2746mn10300_end_of_match (cont, what)
2747 char *cont, *what;
2748{
2749 int len = strlen (what);
2750
2751 if (strncmp (cont, what, strlen (what)) == 0
2752 && ! is_part_of_name (cont[len]))
2753 return cont + len;
2754
2755 return NULL;
2756}
2757
2758int
9497f5ac 2759mn10300_parse_name (name, exprP, mode, nextcharP)
bf6f0d0c
AO
2760 char const *name;
2761 expressionS *exprP;
9497f5ac 2762 enum expr_mode mode;
bf6f0d0c
AO
2763 char *nextcharP;
2764{
2765 char *next = input_line_pointer;
2766 char *next_end;
2767 int reloc_type;
2768 segT segment;
2769
2770 exprP->X_op_symbol = NULL;
2771
2772 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2773 {
2774 if (! GOT_symbol)
2775 GOT_symbol = symbol_find_or_make (name);
2776
2777 exprP->X_add_symbol = GOT_symbol;
2778 no_suffix:
2779 /* If we have an absolute symbol or a reg,
2780 then we know its value now. */
2781 segment = S_GET_SEGMENT (exprP->X_add_symbol);
9497f5ac 2782 if (mode != expr_defer && segment == absolute_section)
bf6f0d0c
AO
2783 {
2784 exprP->X_op = O_constant;
2785 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2786 exprP->X_add_symbol = NULL;
2787 }
9497f5ac 2788 else if (mode != expr_defer && segment == reg_section)
bf6f0d0c
AO
2789 {
2790 exprP->X_op = O_register;
2791 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2792 exprP->X_add_symbol = NULL;
2793 }
2794 else
2795 {
2796 exprP->X_op = O_symbol;
2797 exprP->X_add_number = 0;
2798 }
2799
2800 return 1;
2801 }
2802
2803 exprP->X_add_symbol = symbol_find_or_make (name);
2804
2805 if (*nextcharP != '@')
2806 goto no_suffix;
2807 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2808 reloc_type = BFD_RELOC_32_GOTOFF;
2809 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2810 reloc_type = BFD_RELOC_MN10300_GOT32;
2811 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2812 reloc_type = BFD_RELOC_32_PLT_PCREL;
2813 else
2814 goto no_suffix;
2815
2816 *input_line_pointer = *nextcharP;
2817 input_line_pointer = next_end;
2818 *nextcharP = *input_line_pointer;
2819 *input_line_pointer = '\0';
2820
2821 exprP->X_op = O_PIC_reloc;
2822 exprP->X_add_number = 0;
2823 exprP->X_md = reloc_type;
2824
2825 return 1;
2826}
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