Add v850e debug registers.
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
ae6063d4 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
87271fa6 25#include "subsegs.h"
252b5132 26#include "opcode/mn10300.h"
e8b1cae5 27#include "dwarf2dbg.h"
252b5132
RH
28\f
29/* Structure to hold information about predefined registers. */
30struct reg_name
31{
32 const char *name;
33 int value;
34};
35
87271fa6
NC
36/* Generic assembler global variables which must be defined by all
37 targets. */
252b5132 38
87271fa6 39/* Characters which always start a comment. */
252b5132
RH
40const char comment_chars[] = "#";
41
42/* Characters which start a comment at the beginning of a line. */
43const char line_comment_chars[] = ";#";
44
87271fa6 45/* Characters which may be used to separate multiple commands on a
252b5132
RH
46 single line. */
47const char line_separator_chars[] = ";";
48
87271fa6 49/* Characters which are used to indicate an exponent in a floating
252b5132
RH
50 point number. */
51const char EXP_CHARS[] = "eE";
52
87271fa6 53/* Characters which mean that a number is a floating point constant,
252b5132
RH
54 as in 0d1.0. */
55const char FLT_CHARS[] = "dD";
56\f
252b5132 57const relax_typeS md_relax_table[] = {
87271fa6 58 /* bCC relaxing */
252b5132
RH
59 {0x7f, -0x80, 2, 1},
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
62
87271fa6 63 /* bCC relaxing (uncommon cases) */
252b5132
RH
64 {0x7f, -0x80, 3, 4},
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
67
87271fa6 68 /* call relaxing */
252b5132
RH
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
71
87271fa6 72 /* calls relaxing */
252b5132
RH
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
75
87271fa6 76 /* jmp relaxing */
252b5132
RH
77 {0x7f, -0x80, 2, 11},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
80
81};
82
87271fa6 83/* Local functions. */
252b5132
RH
84static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
85 const struct mn10300_operand *,
86 offsetT, char *, unsigned,
87 unsigned));
88static unsigned long check_operand PARAMS ((unsigned long,
89 const struct mn10300_operand *,
90 offsetT));
91static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
b34976b6
AM
92static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
93static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
94static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
497f322d
AO
95static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
96static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
97static void set_arch_mach PARAMS ((int));
252b5132 98
1485d400
EC
99/* Set linkrelax here to avoid fixups in most sections. */
100int linkrelax = 1;
101
252b5132
RH
102static int current_machine;
103
87271fa6 104/* Fixups. */
252b5132
RH
105#define MAX_INSN_FIXUPS (5)
106struct mn10300_fixup
107{
108 expressionS exp;
109 int opindex;
110 bfd_reloc_code_real_type reloc;
111};
112struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
113static int fc;
114
115/* We must store the value of each register operand so that we can
116 verify that certain registers do not match. */
117int mn10300_reg_operands[MN10300_MAX_OPERANDS];
118\f
119const char *md_shortopts = "";
120struct option md_longopts[] = {
121 {NULL, no_argument, NULL, 0}
122};
87271fa6 123size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
124
125/* The target specific pseudo-ops which we support. */
126const pseudo_typeS md_pseudo_table[] =
127{
9f1838ed 128 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
b4c1ea07 129 { "loc", dwarf2_directive_loc, 0 },
0a727238
AO
130 { "am30", set_arch_mach, AM30 },
131 { "am33", set_arch_mach, AM33 },
132 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
133 {NULL, 0, 0}
134};
135
0a727238 136#define HAVE_AM33 (current_machine == AM33)
aa15f6f7 137#define HAVE_AM30 (current_machine == AM30)
0a727238 138
252b5132
RH
139/* Opcode hash table. */
140static struct hash_control *mn10300_hash;
141
87271fa6 142/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
143static const struct reg_name data_registers[] =
144{
145 { "d0", 0 },
146 { "d1", 1 },
147 { "d2", 2 },
148 { "d3", 3 },
149};
87271fa6
NC
150#define DATA_REG_NAME_CNT \
151 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
152
153static const struct reg_name address_registers[] =
154{
155 { "a0", 0 },
156 { "a1", 1 },
157 { "a2", 2 },
158 { "a3", 3 },
159};
87271fa6
NC
160
161#define ADDRESS_REG_NAME_CNT \
162 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 163
85cb2cf9
JL
164static const struct reg_name r_registers[] =
165{
166 { "a0", 8 },
167 { "a1", 9 },
168 { "a2", 10 },
169 { "a3", 11 },
170 { "d0", 12 },
171 { "d1", 13 },
172 { "d2", 14 },
173 { "d3", 15 },
174 { "e0", 0 },
175 { "e1", 1 },
176 { "e10", 10 },
177 { "e11", 11 },
178 { "e12", 12 },
179 { "e13", 13 },
180 { "e14", 14 },
181 { "e15", 15 },
182 { "e2", 2 },
183 { "e3", 3 },
184 { "e4", 4 },
185 { "e5", 5 },
186 { "e6", 6 },
187 { "e7", 7 },
188 { "e8", 8 },
189 { "e9", 9 },
190 { "r0", 0 },
191 { "r1", 1 },
192 { "r10", 10 },
193 { "r11", 11 },
194 { "r12", 12 },
195 { "r13", 13 },
196 { "r14", 14 },
197 { "r15", 15 },
198 { "r2", 2 },
199 { "r3", 3 },
200 { "r4", 4 },
201 { "r5", 5 },
202 { "r6", 6 },
203 { "r7", 7 },
204 { "r8", 8 },
205 { "r9", 9 },
206};
87271fa6
NC
207
208#define R_REG_NAME_CNT \
209 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
210
211static const struct reg_name xr_registers[] =
212{
213 { "mcrh", 2 },
214 { "mcrl", 3 },
215 { "mcvf", 4 },
216 { "mdrq", 1 },
217 { "sp", 0 },
218 { "xr0", 0 },
219 { "xr1", 1 },
220 { "xr10", 10 },
221 { "xr11", 11 },
222 { "xr12", 12 },
223 { "xr13", 13 },
224 { "xr14", 14 },
225 { "xr15", 15 },
226 { "xr2", 2 },
227 { "xr3", 3 },
228 { "xr4", 4 },
229 { "xr5", 5 },
230 { "xr6", 6 },
231 { "xr7", 7 },
232 { "xr8", 8 },
233 { "xr9", 9 },
234};
85cb2cf9 235
87271fa6
NC
236#define XR_REG_NAME_CNT \
237 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132 238
913572ec
AO
239/* We abuse the `value' field, that would be otherwise unused, to
240 encode the architecture on which (access to) the register was
241 introduced. FIXME: we should probably warn when we encounter a
242 register name when assembling for an architecture that doesn't
243 support it, before parsing it as a symbol name. */
252b5132
RH
244static const struct reg_name other_registers[] =
245{
913572ec 246 { "epsw", AM33 },
252b5132 247 { "mdr", 0 },
913572ec 248 { "pc", AM33 },
252b5132
RH
249 { "psw", 0 },
250 { "sp", 0 },
251};
87271fa6
NC
252
253#define OTHER_REG_NAME_CNT \
254 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132
RH
255
256/* reg_name_search does a binary search of the given register table
257 to see if "name" is a valid regiter name. Returns the register
87271fa6 258 number from the array on success, or -1 on failure. */
252b5132
RH
259
260static int
261reg_name_search (regs, regcount, name)
262 const struct reg_name *regs;
263 int regcount;
264 const char *name;
265{
266 int middle, low, high;
267 int cmp;
268
269 low = 0;
270 high = regcount - 1;
271
272 do
273 {
274 middle = (low + high) / 2;
275 cmp = strcasecmp (name, regs[middle].name);
276 if (cmp < 0)
277 high = middle - 1;
278 else if (cmp > 0)
279 low = middle + 1;
87271fa6
NC
280 else
281 return regs[middle].value;
252b5132
RH
282 }
283 while (low <= high);
284 return -1;
285}
286
85cb2cf9
JL
287/* Summary of register_name().
288 *
289 * in: Input_line_pointer points to 1st char of operand.
290 *
b6ff326e 291 * out: An expressionS.
85cb2cf9
JL
292 * The operand may have been a register: in this case, X_op == O_register,
293 * X_add_number is set to the register number, and truth is returned.
294 * Input_line_pointer->(next non-blank) char after operand, or is in
295 * its original state.
296 */
87271fa6 297
b34976b6 298static bfd_boolean
85cb2cf9
JL
299r_register_name (expressionP)
300 expressionS *expressionP;
301{
302 int reg_number;
303 char *name;
304 char *start;
305 char c;
306
87271fa6 307 /* Find the spelling of the operand. */
85cb2cf9
JL
308 start = name = input_line_pointer;
309
310 c = get_symbol_end ();
311 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
312
468cced8
AM
313 /* Put back the delimiting char. */
314 *input_line_pointer = c;
315
87271fa6
NC
316 /* Look to see if it's in the register table. */
317 if (reg_number >= 0)
85cb2cf9
JL
318 {
319 expressionP->X_op = O_register;
320 expressionP->X_add_number = reg_number;
321
87271fa6 322 /* Make the rest nice. */
85cb2cf9
JL
323 expressionP->X_add_symbol = NULL;
324 expressionP->X_op_symbol = NULL;
87271fa6 325
b34976b6 326 return TRUE;
85cb2cf9 327 }
87271fa6 328
468cced8
AM
329 /* Reset the line as if we had not done anything. */
330 input_line_pointer = start;
b34976b6 331 return FALSE;
85cb2cf9
JL
332}
333
334/* Summary of register_name().
335 *
336 * in: Input_line_pointer points to 1st char of operand.
337 *
b6ff326e 338 * out: An expressionS.
85cb2cf9
JL
339 * The operand may have been a register: in this case, X_op == O_register,
340 * X_add_number is set to the register number, and truth is returned.
341 * Input_line_pointer->(next non-blank) char after operand, or is in
342 * its original state.
343 */
87271fa6 344
b34976b6 345static bfd_boolean
85cb2cf9
JL
346xr_register_name (expressionP)
347 expressionS *expressionP;
348{
349 int reg_number;
350 char *name;
351 char *start;
352 char c;
353
87271fa6 354 /* Find the spelling of the operand. */
85cb2cf9
JL
355 start = name = input_line_pointer;
356
357 c = get_symbol_end ();
358 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
359
468cced8
AM
360 /* Put back the delimiting char. */
361 *input_line_pointer = c;
362
87271fa6
NC
363 /* Look to see if it's in the register table. */
364 if (reg_number >= 0)
85cb2cf9
JL
365 {
366 expressionP->X_op = O_register;
367 expressionP->X_add_number = reg_number;
368
87271fa6 369 /* Make the rest nice. */
85cb2cf9
JL
370 expressionP->X_add_symbol = NULL;
371 expressionP->X_op_symbol = NULL;
87271fa6 372
b34976b6 373 return TRUE;
85cb2cf9 374 }
87271fa6 375
468cced8
AM
376 /* Reset the line as if we had not done anything. */
377 input_line_pointer = start;
b34976b6 378 return FALSE;
85cb2cf9 379}
252b5132
RH
380
381/* Summary of register_name().
382 *
383 * in: Input_line_pointer points to 1st char of operand.
384 *
b6ff326e 385 * out: An expressionS.
252b5132
RH
386 * The operand may have been a register: in this case, X_op == O_register,
387 * X_add_number is set to the register number, and truth is returned.
388 * Input_line_pointer->(next non-blank) char after operand, or is in
389 * its original state.
390 */
87271fa6 391
b34976b6 392static bfd_boolean
252b5132
RH
393data_register_name (expressionP)
394 expressionS *expressionP;
395{
396 int reg_number;
397 char *name;
398 char *start;
399 char c;
400
87271fa6 401 /* Find the spelling of the operand. */
252b5132
RH
402 start = name = input_line_pointer;
403
404 c = get_symbol_end ();
405 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
406
468cced8
AM
407 /* Put back the delimiting char. */
408 *input_line_pointer = c;
409
87271fa6
NC
410 /* Look to see if it's in the register table. */
411 if (reg_number >= 0)
252b5132
RH
412 {
413 expressionP->X_op = O_register;
414 expressionP->X_add_number = reg_number;
415
87271fa6 416 /* Make the rest nice. */
252b5132
RH
417 expressionP->X_add_symbol = NULL;
418 expressionP->X_op_symbol = NULL;
87271fa6 419
b34976b6 420 return TRUE;
252b5132 421 }
87271fa6 422
468cced8
AM
423 /* Reset the line as if we had not done anything. */
424 input_line_pointer = start;
b34976b6 425 return FALSE;
252b5132
RH
426}
427
428/* Summary of register_name().
429 *
430 * in: Input_line_pointer points to 1st char of operand.
431 *
b6ff326e 432 * out: An expressionS.
252b5132
RH
433 * The operand may have been a register: in this case, X_op == O_register,
434 * X_add_number is set to the register number, and truth is returned.
435 * Input_line_pointer->(next non-blank) char after operand, or is in
436 * its original state.
437 */
87271fa6 438
b34976b6 439static bfd_boolean
252b5132
RH
440address_register_name (expressionP)
441 expressionS *expressionP;
442{
443 int reg_number;
444 char *name;
445 char *start;
446 char c;
447
87271fa6 448 /* Find the spelling of the operand. */
252b5132
RH
449 start = name = input_line_pointer;
450
451 c = get_symbol_end ();
452 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
453
468cced8
AM
454 /* Put back the delimiting char. */
455 *input_line_pointer = c;
456
87271fa6
NC
457 /* Look to see if it's in the register table. */
458 if (reg_number >= 0)
252b5132
RH
459 {
460 expressionP->X_op = O_register;
461 expressionP->X_add_number = reg_number;
462
87271fa6 463 /* Make the rest nice. */
252b5132
RH
464 expressionP->X_add_symbol = NULL;
465 expressionP->X_op_symbol = NULL;
87271fa6 466
b34976b6 467 return TRUE;
252b5132 468 }
87271fa6 469
468cced8
AM
470 /* Reset the line as if we had not done anything. */
471 input_line_pointer = start;
b34976b6 472 return FALSE;
252b5132
RH
473}
474
475/* Summary of register_name().
476 *
477 * in: Input_line_pointer points to 1st char of operand.
478 *
b6ff326e 479 * out: An expressionS.
252b5132
RH
480 * The operand may have been a register: in this case, X_op == O_register,
481 * X_add_number is set to the register number, and truth is returned.
482 * Input_line_pointer->(next non-blank) char after operand, or is in
483 * its original state.
484 */
87271fa6 485
b34976b6 486static bfd_boolean
252b5132
RH
487other_register_name (expressionP)
488 expressionS *expressionP;
489{
490 int reg_number;
491 char *name;
492 char *start;
493 char c;
494
87271fa6 495 /* Find the spelling of the operand. */
252b5132
RH
496 start = name = input_line_pointer;
497
498 c = get_symbol_end ();
499 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
500
468cced8
AM
501 /* Put back the delimiting char. */
502 *input_line_pointer = c;
503
87271fa6 504 /* Look to see if it's in the register table. */
913572ec
AO
505 if (reg_number == 0
506 || (reg_number == AM33 && HAVE_AM33))
252b5132
RH
507 {
508 expressionP->X_op = O_register;
913572ec 509 expressionP->X_add_number = 0;
252b5132 510
87271fa6 511 /* Make the rest nice. */
252b5132
RH
512 expressionP->X_add_symbol = NULL;
513 expressionP->X_op_symbol = NULL;
87271fa6 514
b34976b6 515 return TRUE;
252b5132 516 }
87271fa6 517
468cced8
AM
518 /* Reset the line as if we had not done anything. */
519 input_line_pointer = start;
b34976b6 520 return FALSE;
252b5132
RH
521}
522
523void
524md_show_usage (stream)
87271fa6 525 FILE *stream;
252b5132 526{
87271fa6 527 fprintf (stream, _("MN10300 options:\n\
252b5132 528none yet\n"));
87271fa6 529}
252b5132
RH
530
531int
532md_parse_option (c, arg)
b4c1ea07
EC
533 int c ATTRIBUTE_UNUSED;
534 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
535{
536 return 0;
537}
538
539symbolS *
540md_undefined_symbol (name)
b4c1ea07 541 char *name ATTRIBUTE_UNUSED;
252b5132
RH
542{
543 return 0;
544}
545
546char *
547md_atof (type, litp, sizep)
87271fa6
NC
548 int type;
549 char *litp;
550 int *sizep;
252b5132
RH
551{
552 int prec;
553 LITTLENUM_TYPE words[4];
554 char *t;
555 int i;
556
557 switch (type)
558 {
559 case 'f':
560 prec = 2;
561 break;
562
563 case 'd':
564 prec = 4;
565 break;
566
567 default:
568 *sizep = 0;
569 return "bad call to md_atof";
570 }
87271fa6 571
252b5132
RH
572 t = atof_ieee (input_line_pointer, type, words);
573 if (t)
574 input_line_pointer = t;
575
576 *sizep = prec * 2;
577
578 for (i = prec - 1; i >= 0; i--)
579 {
580 md_number_to_chars (litp, (valueT) words[i], 2);
581 litp += 2;
582 }
583
584 return NULL;
585}
586
252b5132
RH
587void
588md_convert_frag (abfd, sec, fragP)
b4c1ea07 589 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
590 asection *sec;
591 fragS *fragP;
252b5132
RH
592{
593 static unsigned long label_count = 0;
594 char buf[40];
595
596 subseg_change (sec, 0);
597 if (fragP->fr_subtype == 0)
598 {
599 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
600 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
601 fragP->fr_var = 0;
602 fragP->fr_fix += 2;
603 }
604 else if (fragP->fr_subtype == 1)
605 {
606 /* Reverse the condition of the first branch. */
607 int offset = fragP->fr_fix;
608 int opcode = fragP->fr_literal[offset] & 0xff;
609
610 switch (opcode)
611 {
612 case 0xc8:
613 opcode = 0xc9;
614 break;
615 case 0xc9:
616 opcode = 0xc8;
617 break;
618 case 0xc0:
619 opcode = 0xc2;
620 break;
621 case 0xc2:
622 opcode = 0xc0;
623 break;
624 case 0xc3:
625 opcode = 0xc1;
626 break;
627 case 0xc1:
628 opcode = 0xc3;
629 break;
630 case 0xc4:
631 opcode = 0xc6;
632 break;
633 case 0xc6:
634 opcode = 0xc4;
635 break;
636 case 0xc7:
637 opcode = 0xc5;
638 break;
639 case 0xc5:
640 opcode = 0xc7;
641 break;
642 default:
643 abort ();
644 }
645 fragP->fr_literal[offset] = opcode;
646
647 /* Create a fixup for the reversed conditional branch. */
0aa529cb 648 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
649 fix_new (fragP, fragP->fr_fix + 1, 1,
650 symbol_new (buf, sec, 0, fragP->fr_next),
651 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
652
653 /* Now create the unconditional branch + fixup to the
654 final target. */
655 fragP->fr_literal[offset + 2] = 0xcc;
656 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
657 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
658 fragP->fr_var = 0;
659 fragP->fr_fix += 5;
660 }
661 else if (fragP->fr_subtype == 2)
662 {
663 /* Reverse the condition of the first branch. */
664 int offset = fragP->fr_fix;
665 int opcode = fragP->fr_literal[offset] & 0xff;
666
667 switch (opcode)
668 {
669 case 0xc8:
670 opcode = 0xc9;
671 break;
672 case 0xc9:
673 opcode = 0xc8;
674 break;
675 case 0xc0:
676 opcode = 0xc2;
677 break;
678 case 0xc2:
679 opcode = 0xc0;
680 break;
681 case 0xc3:
682 opcode = 0xc1;
683 break;
684 case 0xc1:
685 opcode = 0xc3;
686 break;
687 case 0xc4:
688 opcode = 0xc6;
689 break;
690 case 0xc6:
691 opcode = 0xc4;
692 break;
693 case 0xc7:
694 opcode = 0xc5;
695 break;
696 case 0xc5:
697 opcode = 0xc7;
698 break;
699 default:
700 abort ();
701 }
702 fragP->fr_literal[offset] = opcode;
703
704 /* Create a fixup for the reversed conditional branch. */
0aa529cb 705 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
706 fix_new (fragP, fragP->fr_fix + 1, 1,
707 symbol_new (buf, sec, 0, fragP->fr_next),
708 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
709
710 /* Now create the unconditional branch + fixup to the
711 final target. */
712 fragP->fr_literal[offset + 2] = 0xdc;
713 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
714 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
715 fragP->fr_var = 0;
716 fragP->fr_fix += 7;
717 }
718 else if (fragP->fr_subtype == 3)
719 {
720 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
721 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
722 fragP->fr_var = 0;
723 fragP->fr_fix += 3;
724 }
725 else if (fragP->fr_subtype == 4)
726 {
727 /* Reverse the condition of the first branch. */
728 int offset = fragP->fr_fix;
729 int opcode = fragP->fr_literal[offset + 1] & 0xff;
730
731 switch (opcode)
732 {
733 case 0xe8:
734 opcode = 0xe9;
735 break;
736 case 0xe9:
737 opcode = 0xe8;
738 break;
739 case 0xea:
740 opcode = 0xeb;
741 break;
742 case 0xeb:
743 opcode = 0xea;
744 break;
745 default:
746 abort ();
747 }
748 fragP->fr_literal[offset + 1] = opcode;
749
750 /* Create a fixup for the reversed conditional branch. */
0aa529cb 751 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
752 fix_new (fragP, fragP->fr_fix + 2, 1,
753 symbol_new (buf, sec, 0, fragP->fr_next),
754 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
755
756 /* Now create the unconditional branch + fixup to the
757 final target. */
758 fragP->fr_literal[offset + 3] = 0xcc;
759 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
760 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
761 fragP->fr_var = 0;
762 fragP->fr_fix += 6;
763 }
764 else if (fragP->fr_subtype == 5)
765 {
766 /* Reverse the condition of the first branch. */
767 int offset = fragP->fr_fix;
768 int opcode = fragP->fr_literal[offset + 1] & 0xff;
769
770 switch (opcode)
771 {
772 case 0xe8:
773 opcode = 0xe9;
774 break;
775 case 0xea:
776 opcode = 0xeb;
777 break;
778 case 0xeb:
779 opcode = 0xea;
780 break;
781 default:
782 abort ();
783 }
784 fragP->fr_literal[offset + 1] = opcode;
785
786 /* Create a fixup for the reversed conditional branch. */
0aa529cb 787 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
788 fix_new (fragP, fragP->fr_fix + 2, 1,
789 symbol_new (buf, sec, 0, fragP->fr_next),
790 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
791
792 /* Now create the unconditional branch + fixup to the
793 final target. */
794 fragP->fr_literal[offset + 3] = 0xdc;
795 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
796 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
797 fragP->fr_var = 0;
798 fragP->fr_fix += 8;
799 }
800 else if (fragP->fr_subtype == 6)
801 {
802 int offset = fragP->fr_fix;
803 fragP->fr_literal[offset] = 0xcd;
804 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
805 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
806 fragP->fr_var = 0;
807 fragP->fr_fix += 5;
808 }
809 else if (fragP->fr_subtype == 7)
810 {
811 int offset = fragP->fr_fix;
812 fragP->fr_literal[offset] = 0xdd;
813 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
814 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
815
816 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
817 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
818 fragP->fr_var = 0;
819 fragP->fr_fix += 7;
820 }
821 else if (fragP->fr_subtype == 8)
822 {
823 int offset = fragP->fr_fix;
824 fragP->fr_literal[offset] = 0xfa;
825 fragP->fr_literal[offset + 1] = 0xff;
826 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
827 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
828 fragP->fr_var = 0;
829 fragP->fr_fix += 4;
830 }
831 else if (fragP->fr_subtype == 9)
832 {
833 int offset = fragP->fr_fix;
834 fragP->fr_literal[offset] = 0xfc;
835 fragP->fr_literal[offset + 1] = 0xff;
836
837 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
838 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
839 fragP->fr_var = 0;
840 fragP->fr_fix += 6;
841 }
842 else if (fragP->fr_subtype == 10)
843 {
844 fragP->fr_literal[fragP->fr_fix] = 0xca;
845 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
846 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
847 fragP->fr_var = 0;
848 fragP->fr_fix += 2;
849 }
850 else if (fragP->fr_subtype == 11)
851 {
852 int offset = fragP->fr_fix;
853 fragP->fr_literal[offset] = 0xcc;
854
855 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
856 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
857 fragP->fr_var = 0;
858 fragP->fr_fix += 3;
859 }
860 else if (fragP->fr_subtype == 12)
861 {
862 int offset = fragP->fr_fix;
863 fragP->fr_literal[offset] = 0xdc;
864
865 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
866 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
867 fragP->fr_var = 0;
868 fragP->fr_fix += 5;
869 }
870 else
871 abort ();
872}
873
874valueT
875md_section_align (seg, addr)
876 asection *seg;
877 valueT addr;
878{
879 int align = bfd_get_section_alignment (stdoutput, seg);
880 return ((addr + (1 << align) - 1) & (-1 << align));
881}
882
883void
884md_begin ()
885{
886 char *prev_name = "";
887 register const struct mn10300_opcode *op;
888
87271fa6 889 mn10300_hash = hash_new ();
252b5132
RH
890
891 /* Insert unique names into hash table. The MN10300 instruction set
892 has many identical opcode names that have different opcodes based
893 on the operands. This hash table then provides a quick index to
894 the first opcode with a particular name in the opcode table. */
895
896 op = mn10300_opcodes;
897 while (op->name)
898 {
87271fa6 899 if (strcmp (prev_name, op->name))
252b5132
RH
900 {
901 prev_name = (char *) op->name;
902 hash_insert (mn10300_hash, op->name, (char *) op);
903 }
904 op++;
905 }
906
252b5132 907 /* Set the default machine type. */
0a727238 908 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
909 as_warn (_("could not set architecture and machine"));
910
0a727238 911 current_machine = MN103;
252b5132
RH
912}
913
914void
87271fa6 915md_assemble (str)
252b5132
RH
916 char *str;
917{
918 char *s;
919 struct mn10300_opcode *opcode;
920 struct mn10300_opcode *next_opcode;
921 const unsigned char *opindex_ptr;
922 int next_opindex, relaxable;
eb0dfd58 923 unsigned long insn, extension, size = 0;
252b5132
RH
924 char *f;
925 int i;
926 int match;
927
928 /* Get the opcode. */
3882b010 929 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
252b5132
RH
930 ;
931 if (*s != '\0')
932 *s++ = '\0';
933
87271fa6
NC
934 /* Find the first opcode with the proper name. */
935 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
936 if (opcode == NULL)
937 {
938 as_bad (_("Unrecognized opcode: `%s'"), str);
939 return;
940 }
941
942 str = s;
3882b010 943 while (ISSPACE (*str))
252b5132
RH
944 ++str;
945
946 input_line_pointer = str;
947
87271fa6 948 for (;;)
252b5132
RH
949 {
950 const char *errmsg;
951 int op_idx;
952 char *hold;
953 int extra_shift = 0;
954
252b5132
RH
955 errmsg = _("Invalid opcode/operands");
956
957 /* Reset the array of register operands. */
958 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
959
960 relaxable = 0;
961 fc = 0;
962 match = 0;
963 next_opindex = 0;
964 insn = opcode->opcode;
965 extension = 0;
966
967 /* If the instruction is not available on the current machine
968 then it can not possibly match. */
969 if (opcode->machine
aa15f6f7
AO
970 && !(opcode->machine == AM33 && HAVE_AM33)
971 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
972 goto error;
973
974 for (op_idx = 1, opindex_ptr = opcode->operands;
975 *opindex_ptr != 0;
976 opindex_ptr++, op_idx++)
977 {
978 const struct mn10300_operand *operand;
979 expressionS ex;
980
981 if (next_opindex == 0)
982 {
983 operand = &mn10300_operands[*opindex_ptr];
984 }
985 else
986 {
987 operand = &mn10300_operands[next_opindex];
988 next_opindex = 0;
989 }
990
991 while (*str == ' ' || *str == ',')
992 ++str;
993
994 if (operand->flags & MN10300_OPERAND_RELAX)
995 relaxable = 1;
996
87271fa6 997 /* Gather the operand. */
252b5132
RH
998 hold = input_line_pointer;
999 input_line_pointer = str;
1000
1001 if (operand->flags & MN10300_OPERAND_PAREN)
1002 {
1003 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1004 {
1005 input_line_pointer = hold;
1006 str = hold;
1007 goto error;
1008 }
1009 input_line_pointer++;
1010 goto keep_going;
1011 }
1012 /* See if we can match the operands. */
1013 else if (operand->flags & MN10300_OPERAND_DREG)
1014 {
1015 if (!data_register_name (&ex))
1016 {
1017 input_line_pointer = hold;
1018 str = hold;
1019 goto error;
1020 }
1021 }
1022 else if (operand->flags & MN10300_OPERAND_AREG)
1023 {
1024 if (!address_register_name (&ex))
1025 {
1026 input_line_pointer = hold;
1027 str = hold;
1028 goto error;
1029 }
1030 }
1031 else if (operand->flags & MN10300_OPERAND_SP)
1032 {
1033 char *start = input_line_pointer;
1034 char c = get_symbol_end ();
1035
1036 if (strcasecmp (start, "sp") != 0)
1037 {
1038 *input_line_pointer = c;
1039 input_line_pointer = hold;
1040 str = hold;
1041 goto error;
1042 }
1043 *input_line_pointer = c;
1044 goto keep_going;
1045 }
85cb2cf9
JL
1046 else if (operand->flags & MN10300_OPERAND_RREG)
1047 {
1048 if (!r_register_name (&ex))
1049 {
1050 input_line_pointer = hold;
1051 str = hold;
1052 goto error;
1053 }
1054 }
1055 else if (operand->flags & MN10300_OPERAND_XRREG)
1056 {
1057 if (!xr_register_name (&ex))
1058 {
1059 input_line_pointer = hold;
1060 str = hold;
1061 goto error;
1062 }
1063 }
1064 else if (operand->flags & MN10300_OPERAND_USP)
1065 {
1066 char *start = input_line_pointer;
1067 char c = get_symbol_end ();
1068
1069 if (strcasecmp (start, "usp") != 0)
1070 {
1071 *input_line_pointer = c;
1072 input_line_pointer = hold;
1073 str = hold;
1074 goto error;
1075 }
1076 *input_line_pointer = c;
1077 goto keep_going;
1078 }
1079 else if (operand->flags & MN10300_OPERAND_SSP)
1080 {
1081 char *start = input_line_pointer;
1082 char c = get_symbol_end ();
1083
1084 if (strcasecmp (start, "ssp") != 0)
1085 {
1086 *input_line_pointer = c;
1087 input_line_pointer = hold;
1088 str = hold;
1089 goto error;
1090 }
1091 *input_line_pointer = c;
1092 goto keep_going;
1093 }
1094 else if (operand->flags & MN10300_OPERAND_MSP)
1095 {
1096 char *start = input_line_pointer;
1097 char c = get_symbol_end ();
1098
1099 if (strcasecmp (start, "msp") != 0)
1100 {
1101 *input_line_pointer = c;
1102 input_line_pointer = hold;
1103 str = hold;
1104 goto error;
1105 }
1106 *input_line_pointer = c;
1107 goto keep_going;
1108 }
1109 else if (operand->flags & MN10300_OPERAND_PC)
1110 {
1111 char *start = input_line_pointer;
1112 char c = get_symbol_end ();
1113
1114 if (strcasecmp (start, "pc") != 0)
1115 {
1116 *input_line_pointer = c;
1117 input_line_pointer = hold;
1118 str = hold;
1119 goto error;
1120 }
1121 *input_line_pointer = c;
1122 goto keep_going;
1123 }
1124 else if (operand->flags & MN10300_OPERAND_EPSW)
1125 {
1126 char *start = input_line_pointer;
1127 char c = get_symbol_end ();
1128
1129 if (strcasecmp (start, "epsw") != 0)
1130 {
1131 *input_line_pointer = c;
1132 input_line_pointer = hold;
1133 str = hold;
1134 goto error;
1135 }
1136 *input_line_pointer = c;
1137 goto keep_going;
1138 }
1139 else if (operand->flags & MN10300_OPERAND_PLUS)
1140 {
1141 if (*input_line_pointer != '+')
1142 {
1143 input_line_pointer = hold;
1144 str = hold;
1145 goto error;
1146 }
1147 input_line_pointer++;
1148 goto keep_going;
1149 }
252b5132
RH
1150 else if (operand->flags & MN10300_OPERAND_PSW)
1151 {
1152 char *start = input_line_pointer;
1153 char c = get_symbol_end ();
1154
1155 if (strcasecmp (start, "psw") != 0)
1156 {
1157 *input_line_pointer = c;
1158 input_line_pointer = hold;
1159 str = hold;
1160 goto error;
1161 }
1162 *input_line_pointer = c;
1163 goto keep_going;
1164 }
1165 else if (operand->flags & MN10300_OPERAND_MDR)
1166 {
1167 char *start = input_line_pointer;
1168 char c = get_symbol_end ();
1169
1170 if (strcasecmp (start, "mdr") != 0)
1171 {
1172 *input_line_pointer = c;
1173 input_line_pointer = hold;
1174 str = hold;
1175 goto error;
1176 }
1177 *input_line_pointer = c;
1178 goto keep_going;
1179 }
1180 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1181 {
1182 unsigned int value = 0;
1183 if (*input_line_pointer != '[')
1184 {
1185 input_line_pointer = hold;
1186 str = hold;
1187 goto error;
1188 }
1189
1190 /* Eat the '['. */
1191 input_line_pointer++;
87271fa6 1192
252b5132 1193 /* We used to reject a null register list here; however,
87271fa6
NC
1194 we accept it now so the compiler can emit "call"
1195 instructions for all calls to named functions.
252b5132
RH
1196
1197 The linker can then fill in the appropriate bits for the
1198 register list and stack size or change the instruction
1199 into a "calls" if using "call" is not profitable. */
1200 while (*input_line_pointer != ']')
1201 {
1202 char *start;
1203 char c;
1204
1205 if (*input_line_pointer == ',')
1206 input_line_pointer++;
1207
1208 start = input_line_pointer;
1209 c = get_symbol_end ();
1210
1211 if (strcasecmp (start, "d2") == 0)
1212 {
1213 value |= 0x80;
1214 *input_line_pointer = c;
1215 }
1216 else if (strcasecmp (start, "d3") == 0)
1217 {
1218 value |= 0x40;
1219 *input_line_pointer = c;
1220 }
1221 else if (strcasecmp (start, "a2") == 0)
1222 {
1223 value |= 0x20;
1224 *input_line_pointer = c;
1225 }
1226 else if (strcasecmp (start, "a3") == 0)
1227 {
1228 value |= 0x10;
1229 *input_line_pointer = c;
1230 }
1231 else if (strcasecmp (start, "other") == 0)
1232 {
1233 value |= 0x08;
1234 *input_line_pointer = c;
1235 }
0a727238 1236 else if (HAVE_AM33
85cb2cf9
JL
1237 && strcasecmp (start, "exreg0") == 0)
1238 {
1239 value |= 0x04;
1240 *input_line_pointer = c;
1241 }
0a727238 1242 else if (HAVE_AM33
85cb2cf9
JL
1243 && strcasecmp (start, "exreg1") == 0)
1244 {
1245 value |= 0x02;
1246 *input_line_pointer = c;
1247 }
0a727238 1248 else if (HAVE_AM33
85cb2cf9
JL
1249 && strcasecmp (start, "exother") == 0)
1250 {
1251 value |= 0x01;
1252 *input_line_pointer = c;
1253 }
0a727238 1254 else if (HAVE_AM33
85cb2cf9
JL
1255 && strcasecmp (start, "all") == 0)
1256 {
1257 value |= 0xff;
1258 *input_line_pointer = c;
1259 }
252b5132
RH
1260 else
1261 {
1262 input_line_pointer = hold;
1263 str = hold;
1264 goto error;
1265 }
1266 }
1267 input_line_pointer++;
1268 mn10300_insert_operand (&insn, &extension, operand,
1269 value, (char *) NULL, 0, 0);
1270 goto keep_going;
1271
1272 }
1273 else if (data_register_name (&ex))
1274 {
1275 input_line_pointer = hold;
1276 str = hold;
1277 goto error;
1278 }
1279 else if (address_register_name (&ex))
1280 {
1281 input_line_pointer = hold;
1282 str = hold;
1283 goto error;
1284 }
1285 else if (other_register_name (&ex))
1286 {
1287 input_line_pointer = hold;
1288 str = hold;
1289 goto error;
1290 }
0a727238 1291 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1292 {
1293 input_line_pointer = hold;
1294 str = hold;
1295 goto error;
1296 }
0a727238 1297 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1298 {
1299 input_line_pointer = hold;
1300 str = hold;
1301 goto error;
1302 }
252b5132
RH
1303 else if (*str == ')' || *str == '(')
1304 {
1305 input_line_pointer = hold;
1306 str = hold;
1307 goto error;
1308 }
1309 else
1310 {
1311 expression (&ex);
1312 }
1313
87271fa6 1314 switch (ex.X_op)
252b5132
RH
1315 {
1316 case O_illegal:
1317 errmsg = _("illegal operand");
1318 goto error;
1319 case O_absent:
1320 errmsg = _("missing operand");
1321 goto error;
1322 case O_register:
1323 {
1324 int mask;
1325
1326 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1327 if (HAVE_AM33)
1328 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
252b5132
RH
1329 if ((operand->flags & mask) == 0)
1330 {
1331 input_line_pointer = hold;
1332 str = hold;
1333 goto error;
1334 }
87271fa6 1335
252b5132
RH
1336 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1337 extra_shift = 8;
1338 else if (opcode->format == FMT_D2
1339 || opcode->format == FMT_D4
1340 || opcode->format == FMT_S2
1341 || opcode->format == FMT_S4
1342 || opcode->format == FMT_S6
1343 || opcode->format == FMT_D5)
1344 extra_shift = 16;
85cb2cf9
JL
1345 else if (opcode->format == FMT_D7)
1346 extra_shift = 8;
1347 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1348 extra_shift = 8;
252b5132
RH
1349 else
1350 extra_shift = 0;
87271fa6 1351
252b5132
RH
1352 mn10300_insert_operand (&insn, &extension, operand,
1353 ex.X_add_number, (char *) NULL,
1354 0, extra_shift);
1355
252b5132
RH
1356 /* And note the register number in the register array. */
1357 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1358 break;
1359 }
1360
1361 case O_constant:
1362 /* If this operand can be promoted, and it doesn't
1363 fit into the allocated bitfield for this insn,
1364 then promote it (ie this opcode does not match). */
1365 if (operand->flags
1366 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1367 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1368 {
1369 input_line_pointer = hold;
1370 str = hold;
1371 goto error;
1372 }
1373
1374 mn10300_insert_operand (&insn, &extension, operand,
1375 ex.X_add_number, (char *) NULL,
1376 0, 0);
1377 break;
1378
1379 default:
1380 /* If this operand can be promoted, then this opcode didn't
1381 match since we can't know if it needed promotion! */
1382 if (operand->flags & MN10300_OPERAND_PROMOTE)
1383 {
1384 input_line_pointer = hold;
1385 str = hold;
1386 goto error;
1387 }
1388
1389 /* We need to generate a fixup for this expression. */
1390 if (fc >= MAX_INSN_FIXUPS)
1391 as_fatal (_("too many fixups"));
1392 fixups[fc].exp = ex;
1393 fixups[fc].opindex = *opindex_ptr;
1394 fixups[fc].reloc = BFD_RELOC_UNUSED;
1395 ++fc;
1396 break;
1397 }
1398
1399keep_going:
1400 str = input_line_pointer;
1401 input_line_pointer = hold;
1402
1403 while (*str == ' ' || *str == ',')
1404 ++str;
1405
1406 }
1407
1408 /* Make sure we used all the operands! */
1409 if (*str != ',')
1410 match = 1;
1411
1412 /* If this instruction has registers that must not match, verify
1413 that they do indeed not match. */
1414 if (opcode->no_match_operands)
1415 {
1416 int i;
1417
1418 /* Look at each operand to see if it's marked. */
1419 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1420 {
1421 if ((1 << i) & opcode->no_match_operands)
1422 {
1423 int j;
1424
1425 /* operand I is marked. Check that it does not match any
1426 operands > I which are marked. */
1427 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1428 {
1429 if (((1 << j) & opcode->no_match_operands)
1430 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1431 {
1432 errmsg = _("Invalid register specification.");
1433 match = 0;
1434 goto error;
1435 }
1436 }
1437 }
1438 }
1439 }
1440
1441 error:
1442 if (match == 0)
87271fa6 1443 {
252b5132 1444 next_opcode = opcode + 1;
87271fa6 1445 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1446 {
1447 opcode = next_opcode;
1448 continue;
1449 }
87271fa6 1450
252b5132
RH
1451 as_bad ("%s", errmsg);
1452 return;
87271fa6 1453 }
252b5132
RH
1454 break;
1455 }
87271fa6 1456
3882b010 1457 while (ISSPACE (*str))
252b5132
RH
1458 ++str;
1459
1460 if (*str != '\0')
1461 as_bad (_("junk at end of line: `%s'"), str);
1462
1463 input_line_pointer = str;
1464
1465 /* Determine the size of the instruction. */
1466 if (opcode->format == FMT_S0)
1467 size = 1;
1468
1469 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1470 size = 2;
1471
1472 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1473 size = 3;
1474
85cb2cf9
JL
1475 if (opcode->format == FMT_D6)
1476 size = 3;
1477
1478 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1479 size = 4;
1480
1481 if (opcode->format == FMT_D8)
1482 size = 6;
1483
1484 if (opcode->format == FMT_D9)
1485 size = 7;
252b5132
RH
1486
1487 if (opcode->format == FMT_S4)
1488 size = 5;
1489
1490 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1491 size = 7;
1492
1493 if (opcode->format == FMT_D2)
1494 size = 4;
1495
1496 if (opcode->format == FMT_D4)
1497 size = 6;
1498
1499 if (relaxable && fc > 0)
1500 {
1501 int type;
1502
076dc439
AO
1503 /* We want to anchor the line info to the previous frag (if
1504 there isn't one, create it), so that, when the insn is
1505 resized, we still get the right address for the beginning of
1506 the region. */
1507 f = frag_more (0);
1508 dwarf2_emit_insn (0);
1509
87271fa6 1510 /* bCC */
252b5132
RH
1511 if (size == 2)
1512 {
1513 /* Handle bra specially. Basically treat it like jmp so
1514 that we automatically handle 8, 16 and 32 bit offsets
1515 correctly as well as jumps to an undefined address.
1516
1517 It is also important to not treat it like other bCC
1518 instructions since the long forms of bra is different
1519 from other bCC instructions. */
1520 if (opcode->opcode == 0xca00)
1521 type = 10;
1522 else
1523 type = 0;
1524 }
87271fa6 1525 /* call */
252b5132 1526 else if (size == 5)
87271fa6
NC
1527 type = 6;
1528 /* calls */
252b5132
RH
1529 else if (size == 4)
1530 type = 8;
87271fa6 1531 /* jmp */
252b5132
RH
1532 else if (size == 3 && opcode->opcode == 0xcc0000)
1533 type = 10;
87271fa6 1534 /* bCC (uncommon cases) */
252b5132
RH
1535 else
1536 type = 3;
1537
1538 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1539 fixups[0].exp.X_add_symbol,
1540 fixups[0].exp.X_add_number,
1541 (char *)fixups[0].opindex);
87271fa6 1542
252b5132
RH
1543 /* This is pretty hokey. We basically just care about the
1544 opcode, so we have to write out the first word big endian.
1545
1546 The exception is "call", which has two operands that we
1547 care about.
1548
1549 The first operand (the register list) happens to be in the
1550 first instruction word, and will be in the right place if
1551 we output the first word in big endian mode.
1552
1553 The second operand (stack size) is in the extension word,
1554 and we want it to appear as the first character in the extension
1555 word (as it appears in memory). Luckily, writing the extension
1556 word in big endian format will do what we want. */
1557 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1558 if (size > 8)
1559 {
1560 number_to_chars_bigendian (f + 4, extension, 4);
1561 number_to_chars_bigendian (f + 8, 0, size - 8);
1562 }
1563 else if (size > 4)
1564 number_to_chars_bigendian (f + 4, extension, size - 4);
1565 }
1566 else
1567 {
1568 /* Allocate space for the instruction. */
1569 f = frag_more (size);
1570
1571 /* Fill in bytes for the instruction. Note that opcode fields
1572 are written big-endian, 16 & 32bit immediates are written
1573 little endian. Egad. */
1574 if (opcode->format == FMT_S0
1575 || opcode->format == FMT_S1
1576 || opcode->format == FMT_D0
85cb2cf9
JL
1577 || opcode->format == FMT_D6
1578 || opcode->format == FMT_D7
1579 || opcode->format == FMT_D10
252b5132
RH
1580 || opcode->format == FMT_D1)
1581 {
1582 number_to_chars_bigendian (f, insn, size);
1583 }
1584 else if (opcode->format == FMT_S2
1585 && opcode->opcode != 0xdf0000
1586 && opcode->opcode != 0xde0000)
1587 {
1588 /* A format S2 instruction that is _not_ "ret" and "retf". */
1589 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1590 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1591 }
1592 else if (opcode->format == FMT_S2)
1593 {
1594 /* This must be a ret or retf, which is written entirely in
1595 big-endian format. */
1596 number_to_chars_bigendian (f, insn, 3);
1597 }
1598 else if (opcode->format == FMT_S4
1599 && opcode->opcode != 0xdc000000)
1600 {
1601 /* This must be a format S4 "call" instruction. What a pain. */
1602 unsigned long temp = (insn >> 8) & 0xffff;
1603 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1604 number_to_chars_littleendian (f + 1, temp, 2);
1605 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1606 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1607 }
1608 else if (opcode->format == FMT_S4)
1609 {
1610 /* This must be a format S4 "jmp" instruction. */
1611 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1612 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1613 number_to_chars_littleendian (f + 1, temp, 4);
1614 }
1615 else if (opcode->format == FMT_S6)
1616 {
1617 unsigned long temp = ((insn & 0xffffff) << 8)
1618 | ((extension >> 16) & 0xff);
1619 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1620 number_to_chars_littleendian (f + 1, temp, 4);
1621 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1622 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1623 }
1624 else if (opcode->format == FMT_D2
1625 && opcode->opcode != 0xfaf80000
1626 && opcode->opcode != 0xfaf00000
1627 && opcode->opcode != 0xfaf40000)
1628 {
1629 /* A format D2 instruction where the 16bit immediate is
1630 really a single 16bit value, not two 8bit values. */
1631 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1632 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1633 }
1634 else if (opcode->format == FMT_D2)
1635 {
1636 /* A format D2 instruction where the 16bit immediate
1637 is really two 8bit immediates. */
1638 number_to_chars_bigendian (f, insn, 4);
1639 }
1640 else if (opcode->format == FMT_D4)
1641 {
1642 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 1643
252b5132
RH
1644 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1645 number_to_chars_littleendian (f + 2, temp, 4);
1646 }
1647 else if (opcode->format == FMT_D5)
1648 {
87271fa6
NC
1649 unsigned long temp = (((insn & 0xffff) << 16)
1650 | ((extension >> 8) & 0xffff));
1651
252b5132
RH
1652 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1653 number_to_chars_littleendian (f + 2, temp, 4);
1654 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1655 }
85cb2cf9
JL
1656 else if (opcode->format == FMT_D8)
1657 {
87271fa6
NC
1658 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1659
1660 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1661 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1662 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
1663 }
1664 else if (opcode->format == FMT_D9)
1665 {
87271fa6
NC
1666 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1667
1668 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1669 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 1670 }
252b5132
RH
1671
1672 /* Create any fixups. */
1673 for (i = 0; i < fc; i++)
1674 {
1675 const struct mn10300_operand *operand;
1676
1677 operand = &mn10300_operands[fixups[i].opindex];
1678 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1679 {
1680 reloc_howto_type *reloc_howto;
1681 int size;
1682 int offset;
1683 fixS *fixP;
1684
87271fa6
NC
1685 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1686 fixups[i].reloc);
252b5132
RH
1687
1688 if (!reloc_howto)
87271fa6
NC
1689 abort ();
1690
252b5132
RH
1691 size = bfd_get_reloc_size (reloc_howto);
1692
1693 if (size < 1 || size > 4)
87271fa6 1694 abort ();
252b5132
RH
1695
1696 offset = 4 - size;
1697 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1698 size, &fixups[i].exp,
1699 reloc_howto->pc_relative,
1700 fixups[i].reloc);
1701 }
1702 else
1703 {
1704 int reloc, pcrel, reloc_size, offset;
1705 fixS *fixP;
1706
1707 reloc = BFD_RELOC_NONE;
1708 /* How big is the reloc? Remember SPLIT relocs are
1709 implicitly 32bits. */
1710 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1711 reloc_size = 32;
85cb2cf9
JL
1712 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1713 reloc_size = 24;
252b5132
RH
1714 else
1715 reloc_size = operand->bits;
1716
1717 /* Is the reloc pc-relative? */
1718 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1719
a7c92dae 1720 offset = size - (reloc_size + operand->shift) / 8;
eb0dfd58 1721
252b5132
RH
1722 /* Choose a proper BFD relocation type. */
1723 if (pcrel)
1724 {
1725 if (reloc_size == 32)
1726 reloc = BFD_RELOC_32_PCREL;
1727 else if (reloc_size == 16)
1728 reloc = BFD_RELOC_16_PCREL;
1729 else if (reloc_size == 8)
1730 reloc = BFD_RELOC_8_PCREL;
1731 else
1732 abort ();
1733 }
1734 else
1735 {
1736 if (reloc_size == 32)
1737 reloc = BFD_RELOC_32;
1738 else if (reloc_size == 16)
1739 reloc = BFD_RELOC_16;
1740 else if (reloc_size == 8)
1741 reloc = BFD_RELOC_8;
1742 else
1743 abort ();
1744 }
1745
1746 /* Convert the size of the reloc into what fix_new_exp wants. */
1747 reloc_size = reloc_size / 8;
1748 if (reloc_size == 8)
1749 reloc_size = 0;
1750 else if (reloc_size == 16)
1751 reloc_size = 1;
1752 else if (reloc_size == 32)
1753 reloc_size = 2;
1754
1755 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1756 reloc_size, &fixups[i].exp, pcrel,
1757 ((bfd_reloc_code_real_type) reloc));
1758
1759 if (pcrel)
1760 fixP->fx_offset += offset;
1761 }
1762 }
e8b1cae5 1763
076dc439
AO
1764 dwarf2_emit_insn (size);
1765 }
252b5132
RH
1766}
1767
87271fa6
NC
1768/* If while processing a fixup, a reloc really needs to be created
1769 then it is done here. */
252b5132 1770
252b5132
RH
1771arelent *
1772tc_gen_reloc (seg, fixp)
b4c1ea07 1773 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
1774 fixS *fixp;
1775{
1776 arelent *reloc;
1777 reloc = (arelent *) xmalloc (sizeof (arelent));
1778
1779 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1780 if (reloc->howto == (reloc_howto_type *) NULL)
1781 {
1782 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
1783 _("reloc %d not supported by object file format"),
1784 (int) fixp->fx_r_type);
252b5132
RH
1785 return NULL;
1786 }
1787 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1788
1789 if (fixp->fx_addsy && fixp->fx_subsy)
1790 {
7dc8f5ce
AO
1791 reloc->sym_ptr_ptr = NULL;
1792
4e75439a
AO
1793 /* If we got a difference between two symbols, and the
1794 subtracted symbol is in the current section, use a
1795 PC-relative relocation. If both symbols are in the same
1796 section, the difference would have already been simplified
1797 to a constant. */
1798 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
1799 {
1800 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1801 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1802 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
1803 + fixp->fx_offset);
1804
1805 switch (fixp->fx_r_type)
1806 {
1807 case BFD_RELOC_8:
1808 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1809 BFD_RELOC_8_PCREL);
1810 return reloc;
5d6255fe 1811
4e75439a
AO
1812 case BFD_RELOC_16:
1813 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1814 BFD_RELOC_16_PCREL);
1815 return reloc;
1816
1817 case BFD_RELOC_24:
1818 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1819 BFD_RELOC_24_PCREL);
1820 return reloc;
1821
1822 case BFD_RELOC_32:
1823 reloc->howto = bfd_reloc_type_lookup (stdoutput,
1824 BFD_RELOC_32_PCREL);
1825 return reloc;
1826
1827 default:
1828 /* Try to compute the absolute value below. */
1829 break;
1830 }
1831 }
87271fa6 1832
252b5132
RH
1833 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1834 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1835 {
1836 as_bad_where (fixp->fx_file, fixp->fx_line,
1837 "Difference of symbols in different sections is not supported");
252b5132 1838 }
6e22e505
AO
1839 else
1840 {
1841 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
1842
1843 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1844 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1845
1846 switch (fixp->fx_r_type)
1847 {
1848 case BFD_RELOC_8:
1849 md_number_to_chars (fixpos, reloc->addend, 1);
1850 break;
5d6255fe 1851
6e22e505
AO
1852 case BFD_RELOC_16:
1853 md_number_to_chars (fixpos, reloc->addend, 2);
1854 break;
252b5132 1855
6e22e505
AO
1856 case BFD_RELOC_24:
1857 md_number_to_chars (fixpos, reloc->addend, 3);
1858 break;
1859
1860 case BFD_RELOC_32:
1861 md_number_to_chars (fixpos, reloc->addend, 4);
1862 break;
1863
1864 default:
1865 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
1866 return reloc;
1867 }
1868 }
1869
7dc8f5ce
AO
1870 if (reloc->sym_ptr_ptr)
1871 free (reloc->sym_ptr_ptr);
6e22e505
AO
1872 free (reloc);
1873 return NULL;
252b5132 1874 }
87271fa6 1875 else
252b5132 1876 {
87271fa6 1877 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 1878 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
1879 reloc->addend = fixp->fx_offset;
1880 }
1881 return reloc;
1882}
1883
1884int
1885md_estimate_size_before_relax (fragp, seg)
1886 fragS *fragp;
1887 asection *seg;
1888{
93c2a809
AM
1889 if (fragp->fr_subtype == 6
1890 && (!S_IS_DEFINED (fragp->fr_symbol)
1891 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1892 fragp->fr_subtype = 7;
1893 else if (fragp->fr_subtype == 8
1894 && (!S_IS_DEFINED (fragp->fr_symbol)
1895 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1896 fragp->fr_subtype = 9;
1897 else if (fragp->fr_subtype == 10
1898 && (!S_IS_DEFINED (fragp->fr_symbol)
1899 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1900 fragp->fr_subtype = 12;
1901
1902 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
1903 abort ();
1904
1905 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 1906}
252b5132
RH
1907
1908long
1909md_pcrel_from (fixp)
1910 fixS *fixp;
1911{
87271fa6 1912 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
1913 {
1914 /* The symbol is undefined. Let the linker figure it out. */
1915 return 0;
1916 }
1917 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
1918}
1919
94f592af
NC
1920void
1921md_apply_fix3 (fixP, valP, seg)
1922 fixS * fixP;
1923 valueT * valP;
252b5132
RH
1924 segT seg;
1925{
94f592af 1926 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
58a77e41 1927 int size = 0;
94f592af 1928 int value = (int) * valP;
58a77e41 1929
94f592af 1930 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
58a77e41
EC
1931
1932 /* This should never happen. */
1933 if (seg->flags & SEC_ALLOC)
94f592af 1934 abort ();
58a77e41 1935
c51ce5f0
EC
1936 /* The value we are passed in *valuep includes the symbol values.
1937 Since we are using BFD_ASSEMBLER, if we are doing this relocation
1938 the code in write.c is going to call bfd_install_relocation, which
1939 is also going to use the symbol value. That means that if the
1940 reloc is fully resolved we want to use *valuep since
1941 bfd_install_relocation is not being used.
1942
1943 However, if the reloc is not fully resolved we do not want to use
1944 *valuep, and must use fx_offset instead. However, if the reloc
1945 is PC relative, we do want to use *valuep since it includes the
1946 result of md_pcrel_from. */
94f592af
NC
1947 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
1948 value = fixP->fx_offset;
c51ce5f0 1949
58a77e41
EC
1950 /* If the fix is relative to a symbol which is not defined, or not
1951 in the same segment as the fix, we cannot resolve it here. */
94f592af
NC
1952 if (fixP->fx_addsy != NULL
1953 && (! S_IS_DEFINED (fixP->fx_addsy)
1954 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
58a77e41 1955 {
94f592af
NC
1956 fixP->fx_done = 0;
1957 return;
58a77e41
EC
1958 }
1959
94f592af 1960 switch (fixP->fx_r_type)
58a77e41
EC
1961 {
1962 case BFD_RELOC_8:
96f37af6 1963 case BFD_RELOC_8_PCREL:
58a77e41
EC
1964 size = 1;
1965 break;
1966
1967 case BFD_RELOC_16:
96f37af6 1968 case BFD_RELOC_16_PCREL:
58a77e41
EC
1969 size = 2;
1970 break;
1971
1972 case BFD_RELOC_32:
96f37af6 1973 case BFD_RELOC_32_PCREL:
58a77e41
EC
1974 size = 4;
1975 break;
1976
1977 case BFD_RELOC_VTABLE_INHERIT:
1978 case BFD_RELOC_VTABLE_ENTRY:
94f592af
NC
1979 fixP->fx_done = 0;
1980 return;
58a77e41
EC
1981
1982 case BFD_RELOC_NONE:
1983 default:
94f592af
NC
1984 as_bad_where (fixP->fx_file, fixP->fx_line,
1985 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
58a77e41
EC
1986 }
1987
c51ce5f0 1988 md_number_to_chars (fixpos, value, size);
58a77e41 1989
b653e7f9 1990 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
94f592af
NC
1991 if (fixP->fx_addsy == NULL)
1992 fixP->fx_done = 1;
58a77e41
EC
1993}
1994
58a77e41
EC
1995/* Return zero if the fixup in fixp should be left alone and not
1996 adjusted. */
1997
b34976b6 1998bfd_boolean
58a77e41
EC
1999mn10300_fix_adjustable (fixp)
2000 struct fix *fixp;
2001{
58a77e41
EC
2002 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2003 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2004 return 0;
2005
7e8f4100
AO
2006 /* Do not adjust relocations involving symbols in code sections,
2007 because it breaks linker relaxations. This could be fixed in the
2008 linker, but this fix is simpler, and it pretty much only affects
2009 object size a little bit. */
2010 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2011 return 0;
2012
58a77e41 2013 return 1;
252b5132
RH
2014}
2015
2016/* Insert an operand value into an instruction. */
2017
2018static void
2019mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2020 unsigned long *insnp;
2021 unsigned long *extensionp;
2022 const struct mn10300_operand *operand;
2023 offsetT val;
2024 char *file;
2025 unsigned int line;
2026 unsigned int shift;
2027{
2028 /* No need to check 32bit operands for a bit. Note that
2029 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2030 if (operand->bits != 32
2031 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2032 {
2033 long min, max;
2034 offsetT test;
2035 int bits;
2036
2037 bits = operand->bits;
85cb2cf9
JL
2038 if (operand->flags & MN10300_OPERAND_24BIT)
2039 bits = 24;
252b5132
RH
2040
2041 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2042 {
2043 max = (1 << (bits - 1)) - 1;
2044 min = - (1 << (bits - 1));
2045 }
2046 else
87271fa6
NC
2047 {
2048 max = (1 << bits) - 1;
2049 min = 0;
2050 }
252b5132
RH
2051
2052 test = val;
2053
252b5132 2054 if (test < (offsetT) min || test > (offsetT) max)
87271fa6
NC
2055 {
2056 const char *err =
2057 _("operand out of range (%s not between %ld and %ld)");
2058 char buf[100];
2059
2060 sprint_value (buf, test);
2061 if (file == (char *) NULL)
2062 as_warn (err, buf, min, max);
2063 else
2064 as_warn_where (file, line, err, buf, min, max);
2065 }
252b5132
RH
2066 }
2067
2068 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2069 {
2070 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2071 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2072 << operand->shift);
2073 }
85cb2cf9
JL
2074 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2075 {
2076 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2077 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2078 << operand->shift);
2079 }
252b5132
RH
2080 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2081 {
2082 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2083 << (operand->shift + shift));
2084
2085 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2086 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2087 << (operand->shift + shift + operand->bits));
2088 }
2089 else
2090 {
2091 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2092 << (operand->shift + shift));
2093
2094 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2095 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2096 << (operand->shift + shift + operand->bits));
2097 }
2098}
2099
2100static unsigned long
2101check_operand (insn, operand, val)
b4c1ea07 2102 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2103 const struct mn10300_operand *operand;
2104 offsetT val;
2105{
2106 /* No need to check 32bit operands for a bit. Note that
2107 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2108 if (operand->bits != 32
2109 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2110 {
2111 long min, max;
2112 offsetT test;
2113 int bits;
2114
2115 bits = operand->bits;
85cb2cf9
JL
2116 if (operand->flags & MN10300_OPERAND_24BIT)
2117 bits = 24;
252b5132
RH
2118
2119 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2120 {
2121 max = (1 << (bits - 1)) - 1;
2122 min = - (1 << (bits - 1));
2123 }
2124 else
87271fa6
NC
2125 {
2126 max = (1 << bits) - 1;
2127 min = 0;
2128 }
252b5132
RH
2129
2130 test = val;
2131
252b5132
RH
2132 if (test < (offsetT) min || test > (offsetT) max)
2133 return 0;
2134 else
2135 return 1;
2136 }
2137 return 1;
2138}
2139
2140static void
2141set_arch_mach (mach)
497f322d 2142 int mach;
252b5132
RH
2143{
2144 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2145 as_warn (_("could not set architecture and machine"));
2146
2147 current_machine = mach;
2148}
This page took 0.253797 seconds and 4 git commands to generate.