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252b5132 RH |
1 | /* tc-mn10300.c -- Assembler code for the Matsushita 10300 |
2 | ||
3 | Copyright (C) 1996, 1997, 1998 Free Software Foundation. | |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include <stdio.h> | |
23 | #include <ctype.h> | |
24 | #include "as.h" | |
25 | #include "subsegs.h" | |
26 | #include "opcode/mn10300.h" | |
27 | \f | |
28 | /* Structure to hold information about predefined registers. */ | |
29 | struct reg_name | |
30 | { | |
31 | const char *name; | |
32 | int value; | |
33 | }; | |
34 | ||
35 | /* Generic assembler global variables which must be defined by all targets. */ | |
36 | ||
37 | /* Characters which always start a comment. */ | |
38 | const char comment_chars[] = "#"; | |
39 | ||
40 | /* Characters which start a comment at the beginning of a line. */ | |
41 | const char line_comment_chars[] = ";#"; | |
42 | ||
43 | /* Characters which may be used to separate multiple commands on a | |
44 | single line. */ | |
45 | const char line_separator_chars[] = ";"; | |
46 | ||
47 | /* Characters which are used to indicate an exponent in a floating | |
48 | point number. */ | |
49 | const char EXP_CHARS[] = "eE"; | |
50 | ||
51 | /* Characters which mean that a number is a floating point constant, | |
52 | as in 0d1.0. */ | |
53 | const char FLT_CHARS[] = "dD"; | |
54 | \f | |
55 | ||
56 | const relax_typeS md_relax_table[] = { | |
57 | /* bCC relaxing */ | |
58 | {0x7f, -0x80, 2, 1}, | |
59 | {0x7fff, -0x8000, 5, 2}, | |
60 | {0x7fffffff, -0x80000000, 7, 0}, | |
61 | ||
62 | /* bCC relaxing (uncommon cases) */ | |
63 | {0x7f, -0x80, 3, 4}, | |
64 | {0x7fff, -0x8000, 6, 5}, | |
65 | {0x7fffffff, -0x80000000, 8, 0}, | |
66 | ||
67 | /* call relaxing */ | |
68 | {0x7fff, -0x8000, 5, 7}, | |
69 | {0x7fffffff, -0x80000000, 7, 0}, | |
70 | ||
71 | /* calls relaxing */ | |
72 | {0x7fff, -0x8000, 4, 9}, | |
73 | {0x7fffffff, -0x80000000, 6, 0}, | |
74 | ||
75 | /* jmp relaxing */ | |
76 | {0x7f, -0x80, 2, 11}, | |
77 | {0x7fff, -0x8000, 3, 12}, | |
78 | {0x7fffffff, -0x80000000, 5, 0}, | |
79 | ||
80 | }; | |
81 | ||
82 | /* local functions */ | |
83 | static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *, | |
84 | const struct mn10300_operand *, | |
85 | offsetT, char *, unsigned, | |
86 | unsigned)); | |
87 | static unsigned long check_operand PARAMS ((unsigned long, | |
88 | const struct mn10300_operand *, | |
89 | offsetT)); | |
90 | static int reg_name_search PARAMS ((const struct reg_name *, int, const char *)); | |
91 | static boolean data_register_name PARAMS ((expressionS *expressionP)); | |
92 | static boolean address_register_name PARAMS ((expressionS *expressionP)); | |
93 | static boolean other_register_name PARAMS ((expressionS *expressionP)); | |
94 | static void set_arch_mach PARAMS ((int)); | |
95 | ||
96 | static int current_machine; | |
97 | ||
98 | /* fixups */ | |
99 | #define MAX_INSN_FIXUPS (5) | |
100 | struct mn10300_fixup | |
101 | { | |
102 | expressionS exp; | |
103 | int opindex; | |
104 | bfd_reloc_code_real_type reloc; | |
105 | }; | |
106 | struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; | |
107 | static int fc; | |
108 | ||
109 | /* We must store the value of each register operand so that we can | |
110 | verify that certain registers do not match. */ | |
111 | int mn10300_reg_operands[MN10300_MAX_OPERANDS]; | |
112 | \f | |
113 | const char *md_shortopts = ""; | |
114 | struct option md_longopts[] = { | |
115 | {NULL, no_argument, NULL, 0} | |
116 | }; | |
117 | size_t md_longopts_size = sizeof(md_longopts); | |
118 | ||
119 | /* The target specific pseudo-ops which we support. */ | |
120 | const pseudo_typeS md_pseudo_table[] = | |
121 | { | |
122 | { "am30", set_arch_mach, 300 }, | |
123 | { "mn10300", set_arch_mach, 300 }, | |
124 | {NULL, 0, 0} | |
125 | }; | |
126 | ||
127 | /* Opcode hash table. */ | |
128 | static struct hash_control *mn10300_hash; | |
129 | ||
130 | /* This table is sorted. Suitable for searching by a binary search. */ | |
131 | static const struct reg_name data_registers[] = | |
132 | { | |
133 | { "d0", 0 }, | |
134 | { "d1", 1 }, | |
135 | { "d2", 2 }, | |
136 | { "d3", 3 }, | |
137 | }; | |
138 | #define DATA_REG_NAME_CNT (sizeof(data_registers) / sizeof(struct reg_name)) | |
139 | ||
140 | static const struct reg_name address_registers[] = | |
141 | { | |
142 | { "a0", 0 }, | |
143 | { "a1", 1 }, | |
144 | { "a2", 2 }, | |
145 | { "a3", 3 }, | |
146 | }; | |
147 | #define ADDRESS_REG_NAME_CNT (sizeof(address_registers) / sizeof(struct reg_name)) | |
148 | ||
149 | ||
150 | static const struct reg_name other_registers[] = | |
151 | { | |
152 | { "mdr", 0 }, | |
153 | { "psw", 0 }, | |
154 | { "sp", 0 }, | |
155 | }; | |
156 | #define OTHER_REG_NAME_CNT (sizeof(other_registers) / sizeof(struct reg_name)) | |
157 | ||
158 | /* reg_name_search does a binary search of the given register table | |
159 | to see if "name" is a valid regiter name. Returns the register | |
160 | number from the array on success, or -1 on failure. */ | |
161 | ||
162 | static int | |
163 | reg_name_search (regs, regcount, name) | |
164 | const struct reg_name *regs; | |
165 | int regcount; | |
166 | const char *name; | |
167 | { | |
168 | int middle, low, high; | |
169 | int cmp; | |
170 | ||
171 | low = 0; | |
172 | high = regcount - 1; | |
173 | ||
174 | do | |
175 | { | |
176 | middle = (low + high) / 2; | |
177 | cmp = strcasecmp (name, regs[middle].name); | |
178 | if (cmp < 0) | |
179 | high = middle - 1; | |
180 | else if (cmp > 0) | |
181 | low = middle + 1; | |
182 | else | |
183 | return regs[middle].value; | |
184 | } | |
185 | while (low <= high); | |
186 | return -1; | |
187 | } | |
188 | ||
189 | ||
190 | ||
191 | /* Summary of register_name(). | |
192 | * | |
193 | * in: Input_line_pointer points to 1st char of operand. | |
194 | * | |
195 | * out: A expressionS. | |
196 | * The operand may have been a register: in this case, X_op == O_register, | |
197 | * X_add_number is set to the register number, and truth is returned. | |
198 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
199 | * its original state. | |
200 | */ | |
201 | static boolean | |
202 | data_register_name (expressionP) | |
203 | expressionS *expressionP; | |
204 | { | |
205 | int reg_number; | |
206 | char *name; | |
207 | char *start; | |
208 | char c; | |
209 | ||
210 | /* Find the spelling of the operand */ | |
211 | start = name = input_line_pointer; | |
212 | ||
213 | c = get_symbol_end (); | |
214 | reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name); | |
215 | ||
216 | /* look to see if it's in the register table */ | |
217 | if (reg_number >= 0) | |
218 | { | |
219 | expressionP->X_op = O_register; | |
220 | expressionP->X_add_number = reg_number; | |
221 | ||
222 | /* make the rest nice */ | |
223 | expressionP->X_add_symbol = NULL; | |
224 | expressionP->X_op_symbol = NULL; | |
225 | *input_line_pointer = c; /* put back the delimiting char */ | |
226 | return true; | |
227 | } | |
228 | else | |
229 | { | |
230 | /* reset the line as if we had not done anything */ | |
231 | *input_line_pointer = c; /* put back the delimiting char */ | |
232 | input_line_pointer = start; /* reset input_line pointer */ | |
233 | return false; | |
234 | } | |
235 | } | |
236 | ||
237 | /* Summary of register_name(). | |
238 | * | |
239 | * in: Input_line_pointer points to 1st char of operand. | |
240 | * | |
241 | * out: A expressionS. | |
242 | * The operand may have been a register: in this case, X_op == O_register, | |
243 | * X_add_number is set to the register number, and truth is returned. | |
244 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
245 | * its original state. | |
246 | */ | |
247 | static boolean | |
248 | address_register_name (expressionP) | |
249 | expressionS *expressionP; | |
250 | { | |
251 | int reg_number; | |
252 | char *name; | |
253 | char *start; | |
254 | char c; | |
255 | ||
256 | /* Find the spelling of the operand */ | |
257 | start = name = input_line_pointer; | |
258 | ||
259 | c = get_symbol_end (); | |
260 | reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name); | |
261 | ||
262 | /* look to see if it's in the register table */ | |
263 | if (reg_number >= 0) | |
264 | { | |
265 | expressionP->X_op = O_register; | |
266 | expressionP->X_add_number = reg_number; | |
267 | ||
268 | /* make the rest nice */ | |
269 | expressionP->X_add_symbol = NULL; | |
270 | expressionP->X_op_symbol = NULL; | |
271 | *input_line_pointer = c; /* put back the delimiting char */ | |
272 | return true; | |
273 | } | |
274 | else | |
275 | { | |
276 | /* reset the line as if we had not done anything */ | |
277 | *input_line_pointer = c; /* put back the delimiting char */ | |
278 | input_line_pointer = start; /* reset input_line pointer */ | |
279 | return false; | |
280 | } | |
281 | } | |
282 | ||
283 | /* Summary of register_name(). | |
284 | * | |
285 | * in: Input_line_pointer points to 1st char of operand. | |
286 | * | |
287 | * out: A expressionS. | |
288 | * The operand may have been a register: in this case, X_op == O_register, | |
289 | * X_add_number is set to the register number, and truth is returned. | |
290 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
291 | * its original state. | |
292 | */ | |
293 | static boolean | |
294 | other_register_name (expressionP) | |
295 | expressionS *expressionP; | |
296 | { | |
297 | int reg_number; | |
298 | char *name; | |
299 | char *start; | |
300 | char c; | |
301 | ||
302 | /* Find the spelling of the operand */ | |
303 | start = name = input_line_pointer; | |
304 | ||
305 | c = get_symbol_end (); | |
306 | reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name); | |
307 | ||
308 | /* look to see if it's in the register table */ | |
309 | if (reg_number >= 0) | |
310 | { | |
311 | expressionP->X_op = O_register; | |
312 | expressionP->X_add_number = reg_number; | |
313 | ||
314 | /* make the rest nice */ | |
315 | expressionP->X_add_symbol = NULL; | |
316 | expressionP->X_op_symbol = NULL; | |
317 | *input_line_pointer = c; /* put back the delimiting char */ | |
318 | return true; | |
319 | } | |
320 | else | |
321 | { | |
322 | /* reset the line as if we had not done anything */ | |
323 | *input_line_pointer = c; /* put back the delimiting char */ | |
324 | input_line_pointer = start; /* reset input_line pointer */ | |
325 | return false; | |
326 | } | |
327 | } | |
328 | ||
329 | void | |
330 | md_show_usage (stream) | |
331 | FILE *stream; | |
332 | { | |
333 | fprintf(stream, _("MN10300 options:\n\ | |
334 | none yet\n")); | |
335 | } | |
336 | ||
337 | int | |
338 | md_parse_option (c, arg) | |
339 | int c; | |
340 | char *arg; | |
341 | { | |
342 | return 0; | |
343 | } | |
344 | ||
345 | symbolS * | |
346 | md_undefined_symbol (name) | |
347 | char *name; | |
348 | { | |
349 | return 0; | |
350 | } | |
351 | ||
352 | char * | |
353 | md_atof (type, litp, sizep) | |
354 | int type; | |
355 | char *litp; | |
356 | int *sizep; | |
357 | { | |
358 | int prec; | |
359 | LITTLENUM_TYPE words[4]; | |
360 | char *t; | |
361 | int i; | |
362 | ||
363 | switch (type) | |
364 | { | |
365 | case 'f': | |
366 | prec = 2; | |
367 | break; | |
368 | ||
369 | case 'd': | |
370 | prec = 4; | |
371 | break; | |
372 | ||
373 | default: | |
374 | *sizep = 0; | |
375 | return "bad call to md_atof"; | |
376 | } | |
377 | ||
378 | t = atof_ieee (input_line_pointer, type, words); | |
379 | if (t) | |
380 | input_line_pointer = t; | |
381 | ||
382 | *sizep = prec * 2; | |
383 | ||
384 | for (i = prec - 1; i >= 0; i--) | |
385 | { | |
386 | md_number_to_chars (litp, (valueT) words[i], 2); | |
387 | litp += 2; | |
388 | } | |
389 | ||
390 | return NULL; | |
391 | } | |
392 | ||
393 | ||
394 | void | |
395 | md_convert_frag (abfd, sec, fragP) | |
396 | bfd *abfd; | |
397 | asection *sec; | |
398 | fragS *fragP; | |
399 | { | |
400 | static unsigned long label_count = 0; | |
401 | char buf[40]; | |
402 | ||
403 | subseg_change (sec, 0); | |
404 | if (fragP->fr_subtype == 0) | |
405 | { | |
406 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
407 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
408 | fragP->fr_var = 0; | |
409 | fragP->fr_fix += 2; | |
410 | } | |
411 | else if (fragP->fr_subtype == 1) | |
412 | { | |
413 | /* Reverse the condition of the first branch. */ | |
414 | int offset = fragP->fr_fix; | |
415 | int opcode = fragP->fr_literal[offset] & 0xff; | |
416 | ||
417 | switch (opcode) | |
418 | { | |
419 | case 0xc8: | |
420 | opcode = 0xc9; | |
421 | break; | |
422 | case 0xc9: | |
423 | opcode = 0xc8; | |
424 | break; | |
425 | case 0xc0: | |
426 | opcode = 0xc2; | |
427 | break; | |
428 | case 0xc2: | |
429 | opcode = 0xc0; | |
430 | break; | |
431 | case 0xc3: | |
432 | opcode = 0xc1; | |
433 | break; | |
434 | case 0xc1: | |
435 | opcode = 0xc3; | |
436 | break; | |
437 | case 0xc4: | |
438 | opcode = 0xc6; | |
439 | break; | |
440 | case 0xc6: | |
441 | opcode = 0xc4; | |
442 | break; | |
443 | case 0xc7: | |
444 | opcode = 0xc5; | |
445 | break; | |
446 | case 0xc5: | |
447 | opcode = 0xc7; | |
448 | break; | |
449 | default: | |
450 | abort (); | |
451 | } | |
452 | fragP->fr_literal[offset] = opcode; | |
453 | ||
454 | /* Create a fixup for the reversed conditional branch. */ | |
455 | sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++); | |
456 | fix_new (fragP, fragP->fr_fix + 1, 1, | |
457 | symbol_new (buf, sec, 0, fragP->fr_next), | |
458 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
459 | ||
460 | /* Now create the unconditional branch + fixup to the | |
461 | final target. */ | |
462 | fragP->fr_literal[offset + 2] = 0xcc; | |
463 | fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, | |
464 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
465 | fragP->fr_var = 0; | |
466 | fragP->fr_fix += 5; | |
467 | } | |
468 | else if (fragP->fr_subtype == 2) | |
469 | { | |
470 | /* Reverse the condition of the first branch. */ | |
471 | int offset = fragP->fr_fix; | |
472 | int opcode = fragP->fr_literal[offset] & 0xff; | |
473 | ||
474 | switch (opcode) | |
475 | { | |
476 | case 0xc8: | |
477 | opcode = 0xc9; | |
478 | break; | |
479 | case 0xc9: | |
480 | opcode = 0xc8; | |
481 | break; | |
482 | case 0xc0: | |
483 | opcode = 0xc2; | |
484 | break; | |
485 | case 0xc2: | |
486 | opcode = 0xc0; | |
487 | break; | |
488 | case 0xc3: | |
489 | opcode = 0xc1; | |
490 | break; | |
491 | case 0xc1: | |
492 | opcode = 0xc3; | |
493 | break; | |
494 | case 0xc4: | |
495 | opcode = 0xc6; | |
496 | break; | |
497 | case 0xc6: | |
498 | opcode = 0xc4; | |
499 | break; | |
500 | case 0xc7: | |
501 | opcode = 0xc5; | |
502 | break; | |
503 | case 0xc5: | |
504 | opcode = 0xc7; | |
505 | break; | |
506 | default: | |
507 | abort (); | |
508 | } | |
509 | fragP->fr_literal[offset] = opcode; | |
510 | ||
511 | /* Create a fixup for the reversed conditional branch. */ | |
512 | sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++); | |
513 | fix_new (fragP, fragP->fr_fix + 1, 1, | |
514 | symbol_new (buf, sec, 0, fragP->fr_next), | |
515 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
516 | ||
517 | /* Now create the unconditional branch + fixup to the | |
518 | final target. */ | |
519 | fragP->fr_literal[offset + 2] = 0xdc; | |
520 | fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, | |
521 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
522 | fragP->fr_var = 0; | |
523 | fragP->fr_fix += 7; | |
524 | } | |
525 | else if (fragP->fr_subtype == 3) | |
526 | { | |
527 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
528 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
529 | fragP->fr_var = 0; | |
530 | fragP->fr_fix += 3; | |
531 | } | |
532 | else if (fragP->fr_subtype == 4) | |
533 | { | |
534 | /* Reverse the condition of the first branch. */ | |
535 | int offset = fragP->fr_fix; | |
536 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
537 | ||
538 | switch (opcode) | |
539 | { | |
540 | case 0xe8: | |
541 | opcode = 0xe9; | |
542 | break; | |
543 | case 0xe9: | |
544 | opcode = 0xe8; | |
545 | break; | |
546 | case 0xea: | |
547 | opcode = 0xeb; | |
548 | break; | |
549 | case 0xeb: | |
550 | opcode = 0xea; | |
551 | break; | |
552 | default: | |
553 | abort (); | |
554 | } | |
555 | fragP->fr_literal[offset + 1] = opcode; | |
556 | ||
557 | /* Create a fixup for the reversed conditional branch. */ | |
558 | sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++); | |
559 | fix_new (fragP, fragP->fr_fix + 2, 1, | |
560 | symbol_new (buf, sec, 0, fragP->fr_next), | |
561 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
562 | ||
563 | /* Now create the unconditional branch + fixup to the | |
564 | final target. */ | |
565 | fragP->fr_literal[offset + 3] = 0xcc; | |
566 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
567 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
568 | fragP->fr_var = 0; | |
569 | fragP->fr_fix += 6; | |
570 | } | |
571 | else if (fragP->fr_subtype == 5) | |
572 | { | |
573 | /* Reverse the condition of the first branch. */ | |
574 | int offset = fragP->fr_fix; | |
575 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
576 | ||
577 | switch (opcode) | |
578 | { | |
579 | case 0xe8: | |
580 | opcode = 0xe9; | |
581 | break; | |
582 | case 0xea: | |
583 | opcode = 0xeb; | |
584 | break; | |
585 | case 0xeb: | |
586 | opcode = 0xea; | |
587 | break; | |
588 | default: | |
589 | abort (); | |
590 | } | |
591 | fragP->fr_literal[offset + 1] = opcode; | |
592 | ||
593 | /* Create a fixup for the reversed conditional branch. */ | |
594 | sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++); | |
595 | fix_new (fragP, fragP->fr_fix + 2, 1, | |
596 | symbol_new (buf, sec, 0, fragP->fr_next), | |
597 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
598 | ||
599 | /* Now create the unconditional branch + fixup to the | |
600 | final target. */ | |
601 | fragP->fr_literal[offset + 3] = 0xdc; | |
602 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
603 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
604 | fragP->fr_var = 0; | |
605 | fragP->fr_fix += 8; | |
606 | } | |
607 | else if (fragP->fr_subtype == 6) | |
608 | { | |
609 | int offset = fragP->fr_fix; | |
610 | fragP->fr_literal[offset] = 0xcd; | |
611 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, | |
612 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
613 | fragP->fr_var = 0; | |
614 | fragP->fr_fix += 5; | |
615 | } | |
616 | else if (fragP->fr_subtype == 7) | |
617 | { | |
618 | int offset = fragP->fr_fix; | |
619 | fragP->fr_literal[offset] = 0xdd; | |
620 | fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; | |
621 | fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; | |
622 | ||
623 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
624 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
625 | fragP->fr_var = 0; | |
626 | fragP->fr_fix += 7; | |
627 | } | |
628 | else if (fragP->fr_subtype == 8) | |
629 | { | |
630 | int offset = fragP->fr_fix; | |
631 | fragP->fr_literal[offset] = 0xfa; | |
632 | fragP->fr_literal[offset + 1] = 0xff; | |
633 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
634 | fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); | |
635 | fragP->fr_var = 0; | |
636 | fragP->fr_fix += 4; | |
637 | } | |
638 | else if (fragP->fr_subtype == 9) | |
639 | { | |
640 | int offset = fragP->fr_fix; | |
641 | fragP->fr_literal[offset] = 0xfc; | |
642 | fragP->fr_literal[offset + 1] = 0xff; | |
643 | ||
644 | fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, | |
645 | fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); | |
646 | fragP->fr_var = 0; | |
647 | fragP->fr_fix += 6; | |
648 | } | |
649 | else if (fragP->fr_subtype == 10) | |
650 | { | |
651 | fragP->fr_literal[fragP->fr_fix] = 0xca; | |
652 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
653 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
654 | fragP->fr_var = 0; | |
655 | fragP->fr_fix += 2; | |
656 | } | |
657 | else if (fragP->fr_subtype == 11) | |
658 | { | |
659 | int offset = fragP->fr_fix; | |
660 | fragP->fr_literal[offset] = 0xcc; | |
661 | ||
662 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
663 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
664 | fragP->fr_var = 0; | |
665 | fragP->fr_fix += 3; | |
666 | } | |
667 | else if (fragP->fr_subtype == 12) | |
668 | { | |
669 | int offset = fragP->fr_fix; | |
670 | fragP->fr_literal[offset] = 0xdc; | |
671 | ||
672 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
673 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
674 | fragP->fr_var = 0; | |
675 | fragP->fr_fix += 5; | |
676 | } | |
677 | else | |
678 | abort (); | |
679 | } | |
680 | ||
681 | valueT | |
682 | md_section_align (seg, addr) | |
683 | asection *seg; | |
684 | valueT addr; | |
685 | { | |
686 | int align = bfd_get_section_alignment (stdoutput, seg); | |
687 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
688 | } | |
689 | ||
690 | void | |
691 | md_begin () | |
692 | { | |
693 | char *prev_name = ""; | |
694 | register const struct mn10300_opcode *op; | |
695 | ||
696 | mn10300_hash = hash_new(); | |
697 | ||
698 | /* Insert unique names into hash table. The MN10300 instruction set | |
699 | has many identical opcode names that have different opcodes based | |
700 | on the operands. This hash table then provides a quick index to | |
701 | the first opcode with a particular name in the opcode table. */ | |
702 | ||
703 | op = mn10300_opcodes; | |
704 | while (op->name) | |
705 | { | |
706 | if (strcmp (prev_name, op->name)) | |
707 | { | |
708 | prev_name = (char *) op->name; | |
709 | hash_insert (mn10300_hash, op->name, (char *) op); | |
710 | } | |
711 | op++; | |
712 | } | |
713 | ||
714 | /* This is both a simplification (we don't have to write md_apply_fix) | |
715 | and support for future optimizations (branch shortening and similar | |
716 | stuff in the linker). */ | |
717 | linkrelax = 1; | |
718 | ||
719 | /* Set the default machine type. */ | |
720 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, 300)) | |
721 | as_warn (_("could not set architecture and machine")); | |
722 | ||
723 | current_machine = 300; | |
724 | } | |
725 | ||
726 | void | |
727 | md_assemble (str) | |
728 | char *str; | |
729 | { | |
730 | char *s; | |
731 | struct mn10300_opcode *opcode; | |
732 | struct mn10300_opcode *next_opcode; | |
733 | const unsigned char *opindex_ptr; | |
734 | int next_opindex, relaxable; | |
735 | unsigned long insn, extension, size = 0; | |
736 | char *f; | |
737 | int i; | |
738 | int match; | |
739 | ||
740 | /* Get the opcode. */ | |
741 | for (s = str; *s != '\0' && ! isspace (*s); s++) | |
742 | ; | |
743 | if (*s != '\0') | |
744 | *s++ = '\0'; | |
745 | ||
746 | /* find the first opcode with the proper name */ | |
747 | opcode = (struct mn10300_opcode *)hash_find (mn10300_hash, str); | |
748 | if (opcode == NULL) | |
749 | { | |
750 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
751 | return; | |
752 | } | |
753 | ||
754 | str = s; | |
755 | while (isspace (*str)) | |
756 | ++str; | |
757 | ||
758 | input_line_pointer = str; | |
759 | ||
760 | for(;;) | |
761 | { | |
762 | const char *errmsg; | |
763 | int op_idx; | |
764 | char *hold; | |
765 | int extra_shift = 0; | |
766 | ||
767 | ||
768 | errmsg = _("Invalid opcode/operands"); | |
769 | ||
770 | /* Reset the array of register operands. */ | |
771 | memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); | |
772 | ||
773 | relaxable = 0; | |
774 | fc = 0; | |
775 | match = 0; | |
776 | next_opindex = 0; | |
777 | insn = opcode->opcode; | |
778 | extension = 0; | |
779 | ||
780 | /* If the instruction is not available on the current machine | |
781 | then it can not possibly match. */ | |
782 | if (opcode->machine | |
783 | && (opcode->machine != current_machine)) | |
784 | goto error; | |
785 | ||
786 | for (op_idx = 1, opindex_ptr = opcode->operands; | |
787 | *opindex_ptr != 0; | |
788 | opindex_ptr++, op_idx++) | |
789 | { | |
790 | const struct mn10300_operand *operand; | |
791 | expressionS ex; | |
792 | ||
793 | if (next_opindex == 0) | |
794 | { | |
795 | operand = &mn10300_operands[*opindex_ptr]; | |
796 | } | |
797 | else | |
798 | { | |
799 | operand = &mn10300_operands[next_opindex]; | |
800 | next_opindex = 0; | |
801 | } | |
802 | ||
803 | while (*str == ' ' || *str == ',') | |
804 | ++str; | |
805 | ||
806 | if (operand->flags & MN10300_OPERAND_RELAX) | |
807 | relaxable = 1; | |
808 | ||
809 | /* Gather the operand. */ | |
810 | hold = input_line_pointer; | |
811 | input_line_pointer = str; | |
812 | ||
813 | if (operand->flags & MN10300_OPERAND_PAREN) | |
814 | { | |
815 | if (*input_line_pointer != ')' && *input_line_pointer != '(') | |
816 | { | |
817 | input_line_pointer = hold; | |
818 | str = hold; | |
819 | goto error; | |
820 | } | |
821 | input_line_pointer++; | |
822 | goto keep_going; | |
823 | } | |
824 | /* See if we can match the operands. */ | |
825 | else if (operand->flags & MN10300_OPERAND_DREG) | |
826 | { | |
827 | if (!data_register_name (&ex)) | |
828 | { | |
829 | input_line_pointer = hold; | |
830 | str = hold; | |
831 | goto error; | |
832 | } | |
833 | } | |
834 | else if (operand->flags & MN10300_OPERAND_AREG) | |
835 | { | |
836 | if (!address_register_name (&ex)) | |
837 | { | |
838 | input_line_pointer = hold; | |
839 | str = hold; | |
840 | goto error; | |
841 | } | |
842 | } | |
843 | else if (operand->flags & MN10300_OPERAND_SP) | |
844 | { | |
845 | char *start = input_line_pointer; | |
846 | char c = get_symbol_end (); | |
847 | ||
848 | if (strcasecmp (start, "sp") != 0) | |
849 | { | |
850 | *input_line_pointer = c; | |
851 | input_line_pointer = hold; | |
852 | str = hold; | |
853 | goto error; | |
854 | } | |
855 | *input_line_pointer = c; | |
856 | goto keep_going; | |
857 | } | |
858 | else if (operand->flags & MN10300_OPERAND_PSW) | |
859 | { | |
860 | char *start = input_line_pointer; | |
861 | char c = get_symbol_end (); | |
862 | ||
863 | if (strcasecmp (start, "psw") != 0) | |
864 | { | |
865 | *input_line_pointer = c; | |
866 | input_line_pointer = hold; | |
867 | str = hold; | |
868 | goto error; | |
869 | } | |
870 | *input_line_pointer = c; | |
871 | goto keep_going; | |
872 | } | |
873 | else if (operand->flags & MN10300_OPERAND_MDR) | |
874 | { | |
875 | char *start = input_line_pointer; | |
876 | char c = get_symbol_end (); | |
877 | ||
878 | if (strcasecmp (start, "mdr") != 0) | |
879 | { | |
880 | *input_line_pointer = c; | |
881 | input_line_pointer = hold; | |
882 | str = hold; | |
883 | goto error; | |
884 | } | |
885 | *input_line_pointer = c; | |
886 | goto keep_going; | |
887 | } | |
888 | else if (operand->flags & MN10300_OPERAND_REG_LIST) | |
889 | { | |
890 | unsigned int value = 0; | |
891 | if (*input_line_pointer != '[') | |
892 | { | |
893 | input_line_pointer = hold; | |
894 | str = hold; | |
895 | goto error; | |
896 | } | |
897 | ||
898 | /* Eat the '['. */ | |
899 | input_line_pointer++; | |
900 | ||
901 | /* We used to reject a null register list here; however, | |
902 | we accept it now so the compiler can emit "call" instructions | |
903 | for all calls to named functions. | |
904 | ||
905 | The linker can then fill in the appropriate bits for the | |
906 | register list and stack size or change the instruction | |
907 | into a "calls" if using "call" is not profitable. */ | |
908 | while (*input_line_pointer != ']') | |
909 | { | |
910 | char *start; | |
911 | char c; | |
912 | ||
913 | if (*input_line_pointer == ',') | |
914 | input_line_pointer++; | |
915 | ||
916 | start = input_line_pointer; | |
917 | c = get_symbol_end (); | |
918 | ||
919 | if (strcasecmp (start, "d2") == 0) | |
920 | { | |
921 | value |= 0x80; | |
922 | *input_line_pointer = c; | |
923 | } | |
924 | else if (strcasecmp (start, "d3") == 0) | |
925 | { | |
926 | value |= 0x40; | |
927 | *input_line_pointer = c; | |
928 | } | |
929 | else if (strcasecmp (start, "a2") == 0) | |
930 | { | |
931 | value |= 0x20; | |
932 | *input_line_pointer = c; | |
933 | } | |
934 | else if (strcasecmp (start, "a3") == 0) | |
935 | { | |
936 | value |= 0x10; | |
937 | *input_line_pointer = c; | |
938 | } | |
939 | else if (strcasecmp (start, "other") == 0) | |
940 | { | |
941 | value |= 0x08; | |
942 | *input_line_pointer = c; | |
943 | } | |
944 | else | |
945 | { | |
946 | input_line_pointer = hold; | |
947 | str = hold; | |
948 | goto error; | |
949 | } | |
950 | } | |
951 | input_line_pointer++; | |
952 | mn10300_insert_operand (&insn, &extension, operand, | |
953 | value, (char *) NULL, 0, 0); | |
954 | goto keep_going; | |
955 | ||
956 | } | |
957 | else if (data_register_name (&ex)) | |
958 | { | |
959 | input_line_pointer = hold; | |
960 | str = hold; | |
961 | goto error; | |
962 | } | |
963 | else if (address_register_name (&ex)) | |
964 | { | |
965 | input_line_pointer = hold; | |
966 | str = hold; | |
967 | goto error; | |
968 | } | |
969 | else if (other_register_name (&ex)) | |
970 | { | |
971 | input_line_pointer = hold; | |
972 | str = hold; | |
973 | goto error; | |
974 | } | |
975 | else if (*str == ')' || *str == '(') | |
976 | { | |
977 | input_line_pointer = hold; | |
978 | str = hold; | |
979 | goto error; | |
980 | } | |
981 | else | |
982 | { | |
983 | expression (&ex); | |
984 | } | |
985 | ||
986 | switch (ex.X_op) | |
987 | { | |
988 | case O_illegal: | |
989 | errmsg = _("illegal operand"); | |
990 | goto error; | |
991 | case O_absent: | |
992 | errmsg = _("missing operand"); | |
993 | goto error; | |
994 | case O_register: | |
995 | { | |
996 | int mask; | |
997 | ||
998 | mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; | |
999 | if ((operand->flags & mask) == 0) | |
1000 | { | |
1001 | input_line_pointer = hold; | |
1002 | str = hold; | |
1003 | goto error; | |
1004 | } | |
1005 | ||
1006 | if (opcode->format == FMT_D1 || opcode->format == FMT_S1) | |
1007 | extra_shift = 8; | |
1008 | else if (opcode->format == FMT_D2 | |
1009 | || opcode->format == FMT_D4 | |
1010 | || opcode->format == FMT_S2 | |
1011 | || opcode->format == FMT_S4 | |
1012 | || opcode->format == FMT_S6 | |
1013 | || opcode->format == FMT_D5) | |
1014 | extra_shift = 16; | |
1015 | else | |
1016 | extra_shift = 0; | |
1017 | ||
1018 | mn10300_insert_operand (&insn, &extension, operand, | |
1019 | ex.X_add_number, (char *) NULL, | |
1020 | 0, extra_shift); | |
1021 | ||
1022 | ||
1023 | /* And note the register number in the register array. */ | |
1024 | mn10300_reg_operands[op_idx - 1] = ex.X_add_number; | |
1025 | break; | |
1026 | } | |
1027 | ||
1028 | case O_constant: | |
1029 | /* If this operand can be promoted, and it doesn't | |
1030 | fit into the allocated bitfield for this insn, | |
1031 | then promote it (ie this opcode does not match). */ | |
1032 | if (operand->flags | |
1033 | & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) | |
1034 | && ! check_operand (insn, operand, ex.X_add_number)) | |
1035 | { | |
1036 | input_line_pointer = hold; | |
1037 | str = hold; | |
1038 | goto error; | |
1039 | } | |
1040 | ||
1041 | mn10300_insert_operand (&insn, &extension, operand, | |
1042 | ex.X_add_number, (char *) NULL, | |
1043 | 0, 0); | |
1044 | break; | |
1045 | ||
1046 | default: | |
1047 | /* If this operand can be promoted, then this opcode didn't | |
1048 | match since we can't know if it needed promotion! */ | |
1049 | if (operand->flags & MN10300_OPERAND_PROMOTE) | |
1050 | { | |
1051 | input_line_pointer = hold; | |
1052 | str = hold; | |
1053 | goto error; | |
1054 | } | |
1055 | ||
1056 | /* We need to generate a fixup for this expression. */ | |
1057 | if (fc >= MAX_INSN_FIXUPS) | |
1058 | as_fatal (_("too many fixups")); | |
1059 | fixups[fc].exp = ex; | |
1060 | fixups[fc].opindex = *opindex_ptr; | |
1061 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
1062 | ++fc; | |
1063 | break; | |
1064 | } | |
1065 | ||
1066 | keep_going: | |
1067 | str = input_line_pointer; | |
1068 | input_line_pointer = hold; | |
1069 | ||
1070 | while (*str == ' ' || *str == ',') | |
1071 | ++str; | |
1072 | ||
1073 | } | |
1074 | ||
1075 | /* Make sure we used all the operands! */ | |
1076 | if (*str != ',') | |
1077 | match = 1; | |
1078 | ||
1079 | /* If this instruction has registers that must not match, verify | |
1080 | that they do indeed not match. */ | |
1081 | if (opcode->no_match_operands) | |
1082 | { | |
1083 | int i; | |
1084 | ||
1085 | /* Look at each operand to see if it's marked. */ | |
1086 | for (i = 0; i < MN10300_MAX_OPERANDS; i++) | |
1087 | { | |
1088 | if ((1 << i) & opcode->no_match_operands) | |
1089 | { | |
1090 | int j; | |
1091 | ||
1092 | /* operand I is marked. Check that it does not match any | |
1093 | operands > I which are marked. */ | |
1094 | for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) | |
1095 | { | |
1096 | if (((1 << j) & opcode->no_match_operands) | |
1097 | && mn10300_reg_operands[i] == mn10300_reg_operands[j]) | |
1098 | { | |
1099 | errmsg = _("Invalid register specification."); | |
1100 | match = 0; | |
1101 | goto error; | |
1102 | } | |
1103 | } | |
1104 | } | |
1105 | } | |
1106 | } | |
1107 | ||
1108 | error: | |
1109 | if (match == 0) | |
1110 | { | |
1111 | next_opcode = opcode + 1; | |
1112 | if (!strcmp(next_opcode->name, opcode->name)) | |
1113 | { | |
1114 | opcode = next_opcode; | |
1115 | continue; | |
1116 | } | |
1117 | ||
1118 | as_bad ("%s", errmsg); | |
1119 | return; | |
1120 | } | |
1121 | break; | |
1122 | } | |
1123 | ||
1124 | while (isspace (*str)) | |
1125 | ++str; | |
1126 | ||
1127 | if (*str != '\0') | |
1128 | as_bad (_("junk at end of line: `%s'"), str); | |
1129 | ||
1130 | input_line_pointer = str; | |
1131 | ||
1132 | /* Determine the size of the instruction. */ | |
1133 | if (opcode->format == FMT_S0) | |
1134 | size = 1; | |
1135 | ||
1136 | if (opcode->format == FMT_S1 || opcode->format == FMT_D0) | |
1137 | size = 2; | |
1138 | ||
1139 | if (opcode->format == FMT_S2 || opcode->format == FMT_D1) | |
1140 | size = 3; | |
1141 | ||
1142 | ||
1143 | if (opcode->format == FMT_S4) | |
1144 | size = 5; | |
1145 | ||
1146 | if (opcode->format == FMT_S6 || opcode->format == FMT_D5) | |
1147 | size = 7; | |
1148 | ||
1149 | if (opcode->format == FMT_D2) | |
1150 | size = 4; | |
1151 | ||
1152 | if (opcode->format == FMT_D4) | |
1153 | size = 6; | |
1154 | ||
1155 | if (relaxable && fc > 0) | |
1156 | { | |
1157 | int type; | |
1158 | ||
1159 | /* bCC */ | |
1160 | if (size == 2) | |
1161 | { | |
1162 | /* Handle bra specially. Basically treat it like jmp so | |
1163 | that we automatically handle 8, 16 and 32 bit offsets | |
1164 | correctly as well as jumps to an undefined address. | |
1165 | ||
1166 | It is also important to not treat it like other bCC | |
1167 | instructions since the long forms of bra is different | |
1168 | from other bCC instructions. */ | |
1169 | if (opcode->opcode == 0xca00) | |
1170 | type = 10; | |
1171 | else | |
1172 | type = 0; | |
1173 | } | |
1174 | /* call */ | |
1175 | else if (size == 5) | |
1176 | type = 6; | |
1177 | /* calls */ | |
1178 | else if (size == 4) | |
1179 | type = 8; | |
1180 | /* jmp */ | |
1181 | else if (size == 3 && opcode->opcode == 0xcc0000) | |
1182 | type = 10; | |
1183 | /* bCC (uncommon cases) */ | |
1184 | else | |
1185 | type = 3; | |
1186 | ||
1187 | f = frag_var (rs_machine_dependent, 8, 8 - size, type, | |
1188 | fixups[0].exp.X_add_symbol, | |
1189 | fixups[0].exp.X_add_number, | |
1190 | (char *)fixups[0].opindex); | |
1191 | ||
1192 | /* This is pretty hokey. We basically just care about the | |
1193 | opcode, so we have to write out the first word big endian. | |
1194 | ||
1195 | The exception is "call", which has two operands that we | |
1196 | care about. | |
1197 | ||
1198 | The first operand (the register list) happens to be in the | |
1199 | first instruction word, and will be in the right place if | |
1200 | we output the first word in big endian mode. | |
1201 | ||
1202 | The second operand (stack size) is in the extension word, | |
1203 | and we want it to appear as the first character in the extension | |
1204 | word (as it appears in memory). Luckily, writing the extension | |
1205 | word in big endian format will do what we want. */ | |
1206 | number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); | |
1207 | if (size > 8) | |
1208 | { | |
1209 | number_to_chars_bigendian (f + 4, extension, 4); | |
1210 | number_to_chars_bigendian (f + 8, 0, size - 8); | |
1211 | } | |
1212 | else if (size > 4) | |
1213 | number_to_chars_bigendian (f + 4, extension, size - 4); | |
1214 | } | |
1215 | else | |
1216 | { | |
1217 | /* Allocate space for the instruction. */ | |
1218 | f = frag_more (size); | |
1219 | ||
1220 | /* Fill in bytes for the instruction. Note that opcode fields | |
1221 | are written big-endian, 16 & 32bit immediates are written | |
1222 | little endian. Egad. */ | |
1223 | if (opcode->format == FMT_S0 | |
1224 | || opcode->format == FMT_S1 | |
1225 | || opcode->format == FMT_D0 | |
1226 | || opcode->format == FMT_D1) | |
1227 | { | |
1228 | number_to_chars_bigendian (f, insn, size); | |
1229 | } | |
1230 | else if (opcode->format == FMT_S2 | |
1231 | && opcode->opcode != 0xdf0000 | |
1232 | && opcode->opcode != 0xde0000) | |
1233 | { | |
1234 | /* A format S2 instruction that is _not_ "ret" and "retf". */ | |
1235 | number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); | |
1236 | number_to_chars_littleendian (f + 1, insn & 0xffff, 2); | |
1237 | } | |
1238 | else if (opcode->format == FMT_S2) | |
1239 | { | |
1240 | /* This must be a ret or retf, which is written entirely in | |
1241 | big-endian format. */ | |
1242 | number_to_chars_bigendian (f, insn, 3); | |
1243 | } | |
1244 | else if (opcode->format == FMT_S4 | |
1245 | && opcode->opcode != 0xdc000000) | |
1246 | { | |
1247 | /* This must be a format S4 "call" instruction. What a pain. */ | |
1248 | unsigned long temp = (insn >> 8) & 0xffff; | |
1249 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1250 | number_to_chars_littleendian (f + 1, temp, 2); | |
1251 | number_to_chars_bigendian (f + 3, insn & 0xff, 1); | |
1252 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
1253 | } | |
1254 | else if (opcode->format == FMT_S4) | |
1255 | { | |
1256 | /* This must be a format S4 "jmp" instruction. */ | |
1257 | unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); | |
1258 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1259 | number_to_chars_littleendian (f + 1, temp, 4); | |
1260 | } | |
1261 | else if (opcode->format == FMT_S6) | |
1262 | { | |
1263 | unsigned long temp = ((insn & 0xffffff) << 8) | |
1264 | | ((extension >> 16) & 0xff); | |
1265 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1266 | number_to_chars_littleendian (f + 1, temp, 4); | |
1267 | number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); | |
1268 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
1269 | } | |
1270 | else if (opcode->format == FMT_D2 | |
1271 | && opcode->opcode != 0xfaf80000 | |
1272 | && opcode->opcode != 0xfaf00000 | |
1273 | && opcode->opcode != 0xfaf40000) | |
1274 | { | |
1275 | /* A format D2 instruction where the 16bit immediate is | |
1276 | really a single 16bit value, not two 8bit values. */ | |
1277 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
1278 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
1279 | } | |
1280 | else if (opcode->format == FMT_D2) | |
1281 | { | |
1282 | /* A format D2 instruction where the 16bit immediate | |
1283 | is really two 8bit immediates. */ | |
1284 | number_to_chars_bigendian (f, insn, 4); | |
1285 | } | |
1286 | else if (opcode->format == FMT_D4) | |
1287 | { | |
1288 | unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); | |
1289 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
1290 | number_to_chars_littleendian (f + 2, temp, 4); | |
1291 | } | |
1292 | else if (opcode->format == FMT_D5) | |
1293 | { | |
1294 | unsigned long temp = ((insn & 0xffff) << 16) | |
1295 | | ((extension >> 8) & 0xffff); | |
1296 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
1297 | number_to_chars_littleendian (f + 2, temp, 4); | |
1298 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
1299 | } | |
1300 | ||
1301 | /* Create any fixups. */ | |
1302 | for (i = 0; i < fc; i++) | |
1303 | { | |
1304 | const struct mn10300_operand *operand; | |
1305 | ||
1306 | operand = &mn10300_operands[fixups[i].opindex]; | |
1307 | if (fixups[i].reloc != BFD_RELOC_UNUSED) | |
1308 | { | |
1309 | reloc_howto_type *reloc_howto; | |
1310 | int size; | |
1311 | int offset; | |
1312 | fixS *fixP; | |
1313 | ||
1314 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); | |
1315 | ||
1316 | if (!reloc_howto) | |
1317 | abort(); | |
1318 | ||
1319 | size = bfd_get_reloc_size (reloc_howto); | |
1320 | ||
1321 | if (size < 1 || size > 4) | |
1322 | abort(); | |
1323 | ||
1324 | offset = 4 - size; | |
1325 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, | |
1326 | size, &fixups[i].exp, | |
1327 | reloc_howto->pc_relative, | |
1328 | fixups[i].reloc); | |
1329 | } | |
1330 | else | |
1331 | { | |
1332 | int reloc, pcrel, reloc_size, offset; | |
1333 | fixS *fixP; | |
1334 | ||
1335 | reloc = BFD_RELOC_NONE; | |
1336 | /* How big is the reloc? Remember SPLIT relocs are | |
1337 | implicitly 32bits. */ | |
1338 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
1339 | reloc_size = 32; | |
1340 | else | |
1341 | reloc_size = operand->bits; | |
1342 | ||
1343 | /* Is the reloc pc-relative? */ | |
1344 | pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; | |
1345 | ||
1346 | /* Gross. This disgusting hack is to make sure we | |
1347 | get the right offset for the 16/32 bit reloc in | |
1348 | "call" instructions. Basically they're a pain | |
1349 | because the reloc isn't at the end of the instruction. */ | |
1350 | if ((size == 5 || size == 7) | |
1351 | && (((insn >> 24) & 0xff) == 0xcd | |
1352 | || ((insn >> 24) & 0xff) == 0xdd)) | |
1353 | size -= 2; | |
1354 | ||
1355 | /* Similarly for certain bit instructions which don't | |
1356 | hav their 32bit reloc at the tail of the instruction. */ | |
1357 | if (size == 7 | |
1358 | && (((insn >> 16) & 0xffff) == 0xfe00 | |
1359 | || ((insn >> 16) & 0xffff) == 0xfe01 | |
1360 | || ((insn >> 16) & 0xffff) == 0xfe02)) | |
1361 | size -= 1; | |
1362 | ||
1363 | offset = size - reloc_size / 8; | |
1364 | ||
1365 | /* Choose a proper BFD relocation type. */ | |
1366 | if (pcrel) | |
1367 | { | |
1368 | if (reloc_size == 32) | |
1369 | reloc = BFD_RELOC_32_PCREL; | |
1370 | else if (reloc_size == 16) | |
1371 | reloc = BFD_RELOC_16_PCREL; | |
1372 | else if (reloc_size == 8) | |
1373 | reloc = BFD_RELOC_8_PCREL; | |
1374 | else | |
1375 | abort (); | |
1376 | } | |
1377 | else | |
1378 | { | |
1379 | if (reloc_size == 32) | |
1380 | reloc = BFD_RELOC_32; | |
1381 | else if (reloc_size == 16) | |
1382 | reloc = BFD_RELOC_16; | |
1383 | else if (reloc_size == 8) | |
1384 | reloc = BFD_RELOC_8; | |
1385 | else | |
1386 | abort (); | |
1387 | } | |
1388 | ||
1389 | /* Convert the size of the reloc into what fix_new_exp wants. */ | |
1390 | reloc_size = reloc_size / 8; | |
1391 | if (reloc_size == 8) | |
1392 | reloc_size = 0; | |
1393 | else if (reloc_size == 16) | |
1394 | reloc_size = 1; | |
1395 | else if (reloc_size == 32) | |
1396 | reloc_size = 2; | |
1397 | ||
1398 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, | |
1399 | reloc_size, &fixups[i].exp, pcrel, | |
1400 | ((bfd_reloc_code_real_type) reloc)); | |
1401 | ||
1402 | if (pcrel) | |
1403 | fixP->fx_offset += offset; | |
1404 | } | |
1405 | } | |
1406 | } | |
1407 | } | |
1408 | ||
1409 | ||
1410 | /* if while processing a fixup, a reloc really needs to be created */ | |
1411 | /* then it is done here */ | |
1412 | ||
1413 | arelent * | |
1414 | tc_gen_reloc (seg, fixp) | |
1415 | asection *seg; | |
1416 | fixS *fixp; | |
1417 | { | |
1418 | arelent *reloc; | |
1419 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1420 | ||
1421 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1422 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1423 | { | |
1424 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1425 | _("reloc %d not supported by object file format"), | |
1426 | (int)fixp->fx_r_type); | |
1427 | return NULL; | |
1428 | } | |
1429 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1430 | ||
1431 | if (fixp->fx_addsy && fixp->fx_subsy) | |
1432 | { | |
1433 | ||
1434 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) | |
1435 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1436 | { | |
1437 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1438 | "Difference of symbols in different sections is not supported"); | |
1439 | return NULL; | |
1440 | } | |
1441 | ||
1442 | reloc->sym_ptr_ptr = &bfd_abs_symbol; | |
1443 | reloc->addend = (S_GET_VALUE (fixp->fx_addsy) | |
1444 | - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); | |
1445 | } | |
1446 | else | |
1447 | { | |
1448 | reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym; | |
1449 | reloc->addend = fixp->fx_offset; | |
1450 | } | |
1451 | return reloc; | |
1452 | } | |
1453 | ||
1454 | int | |
1455 | md_estimate_size_before_relax (fragp, seg) | |
1456 | fragS *fragp; | |
1457 | asection *seg; | |
1458 | { | |
1459 | if (fragp->fr_subtype == 0) | |
1460 | return 2; | |
1461 | if (fragp->fr_subtype == 3) | |
1462 | return 3; | |
1463 | if (fragp->fr_subtype == 6) | |
1464 | { | |
1465 | if (!S_IS_DEFINED (fragp->fr_symbol) | |
1466 | || seg != S_GET_SEGMENT (fragp->fr_symbol)) | |
1467 | { | |
1468 | fragp->fr_subtype = 7; | |
1469 | return 7; | |
1470 | } | |
1471 | else | |
1472 | return 5; | |
1473 | } | |
1474 | if (fragp->fr_subtype == 8) | |
1475 | { | |
1476 | if (!S_IS_DEFINED (fragp->fr_symbol) | |
1477 | || seg != S_GET_SEGMENT (fragp->fr_symbol)) | |
1478 | { | |
1479 | fragp->fr_subtype = 9; | |
1480 | return 6; | |
1481 | } | |
1482 | else | |
1483 | return 4; | |
1484 | } | |
1485 | if (fragp->fr_subtype == 10) | |
1486 | { | |
1487 | if (!S_IS_DEFINED (fragp->fr_symbol) | |
1488 | || seg != S_GET_SEGMENT (fragp->fr_symbol)) | |
1489 | { | |
1490 | fragp->fr_subtype = 12; | |
1491 | return 5; | |
1492 | } | |
1493 | else | |
1494 | return 2; | |
1495 | } | |
1496 | } | |
1497 | ||
1498 | long | |
1499 | md_pcrel_from (fixp) | |
1500 | fixS *fixp; | |
1501 | { | |
1502 | return fixp->fx_frag->fr_address; | |
1503 | #if 0 | |
1504 | if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy)) | |
1505 | { | |
1506 | /* The symbol is undefined. Let the linker figure it out. */ | |
1507 | return 0; | |
1508 | } | |
1509 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
1510 | #endif | |
1511 | } | |
1512 | ||
1513 | int | |
1514 | md_apply_fix3 (fixp, valuep, seg) | |
1515 | fixS *fixp; | |
1516 | valueT *valuep; | |
1517 | segT seg; | |
1518 | { | |
1519 | /* We shouldn't ever get here because linkrelax is nonzero. */ | |
1520 | abort (); | |
1521 | fixp->fx_done = 1; | |
1522 | return 0; | |
1523 | } | |
1524 | ||
1525 | /* Insert an operand value into an instruction. */ | |
1526 | ||
1527 | static void | |
1528 | mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift) | |
1529 | unsigned long *insnp; | |
1530 | unsigned long *extensionp; | |
1531 | const struct mn10300_operand *operand; | |
1532 | offsetT val; | |
1533 | char *file; | |
1534 | unsigned int line; | |
1535 | unsigned int shift; | |
1536 | { | |
1537 | /* No need to check 32bit operands for a bit. Note that | |
1538 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
1539 | if (operand->bits != 32 | |
1540 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
1541 | { | |
1542 | long min, max; | |
1543 | offsetT test; | |
1544 | int bits; | |
1545 | ||
1546 | bits = operand->bits; | |
1547 | ||
1548 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
1549 | { | |
1550 | max = (1 << (bits - 1)) - 1; | |
1551 | min = - (1 << (bits - 1)); | |
1552 | } | |
1553 | else | |
1554 | { | |
1555 | max = (1 << bits) - 1; | |
1556 | min = 0; | |
1557 | } | |
1558 | ||
1559 | test = val; | |
1560 | ||
1561 | ||
1562 | if (test < (offsetT) min || test > (offsetT) max) | |
1563 | { | |
1564 | const char *err = | |
1565 | _("operand out of range (%s not between %ld and %ld)"); | |
1566 | char buf[100]; | |
1567 | ||
1568 | sprint_value (buf, test); | |
1569 | if (file == (char *) NULL) | |
1570 | as_warn (err, buf, min, max); | |
1571 | else | |
1572 | as_warn_where (file, line, err, buf, min, max); | |
1573 | } | |
1574 | } | |
1575 | ||
1576 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
1577 | { | |
1578 | *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); | |
1579 | *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) | |
1580 | << operand->shift); | |
1581 | } | |
1582 | else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) | |
1583 | { | |
1584 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
1585 | << (operand->shift + shift)); | |
1586 | ||
1587 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
1588 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
1589 | << (operand->shift + shift + operand->bits)); | |
1590 | } | |
1591 | else | |
1592 | { | |
1593 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
1594 | << (operand->shift + shift)); | |
1595 | ||
1596 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
1597 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
1598 | << (operand->shift + shift + operand->bits)); | |
1599 | } | |
1600 | } | |
1601 | ||
1602 | static unsigned long | |
1603 | check_operand (insn, operand, val) | |
1604 | unsigned long insn; | |
1605 | const struct mn10300_operand *operand; | |
1606 | offsetT val; | |
1607 | { | |
1608 | /* No need to check 32bit operands for a bit. Note that | |
1609 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
1610 | if (operand->bits != 32 | |
1611 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
1612 | { | |
1613 | long min, max; | |
1614 | offsetT test; | |
1615 | int bits; | |
1616 | ||
1617 | bits = operand->bits; | |
1618 | ||
1619 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
1620 | { | |
1621 | max = (1 << (bits - 1)) - 1; | |
1622 | min = - (1 << (bits - 1)); | |
1623 | } | |
1624 | else | |
1625 | { | |
1626 | max = (1 << bits) - 1; | |
1627 | min = 0; | |
1628 | } | |
1629 | ||
1630 | test = val; | |
1631 | ||
1632 | ||
1633 | if (test < (offsetT) min || test > (offsetT) max) | |
1634 | return 0; | |
1635 | else | |
1636 | return 1; | |
1637 | } | |
1638 | return 1; | |
1639 | } | |
1640 | ||
1641 | static void | |
1642 | set_arch_mach (mach) | |
1643 | int mach; | |
1644 | { | |
1645 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) | |
1646 | as_warn (_("could not set architecture and machine")); | |
1647 | ||
1648 | current_machine = mach; | |
1649 | } |